Converter device

Abstract

The present invention addresses the problem of providing a converter device capable of achieving high efficiency. A converter device (A1) comprises a rectifier (20), a first inverter (30), a transformer (Tr1), an inductor (Ld), a second inverter (40), and a control circuit (50). The electrostatic capacitance of a first capacitor (C2) is set such that a resonance frequency of the first capacitor (C2) and the inductor (Ld) is lower than switching frequencies of both a switching frequency of a first switching element (Q1) and a second switching element (Q2) and a switching frequency of at least two switching elements (Q4, Q6) of the second inverter (40). The electrostatic capacitance of a second capacitor (C3) is set such that a resonance frequency of the second capacitor (C3) and the inductor (Ld) is lower than both switching frequencies described above.

Description

Converter Device

[0001] The present disclosure relates generally to converter devices, and more particularly to converter devices including a transformer.

[0002] An example of a power conversion device (converter device) is disclosed in Patent Document 1. The power conversion device disclosed in Patent Document 1 includes a transformer and converts AC power from an AC power source into DC power.

[0003] Converter devices such as the power conversion device described in Patent Document 1 are desired to have even higher efficiency.

[0004] Patent No. 6388745

[0005] An object of the present disclosure is to provide a converter device that can achieve high efficiency.

[0006] A converter device according to one aspect of the present disclosure includes a rectifier, a first inverter, a transformer, an inductor, a second inverter, and a control circuit. The rectifier rectifies an AC voltage. The first inverter includes a first series circuit in which a first switching element and a second switching element are connected in series, and a second series circuit in which a first capacitor and a second capacitor are connected in series, the first series circuit and the second series circuit being connected in parallel to the rectifier. The transformer has a primary winding and a secondary winding, and a first end of the primary winding is electrically connected to a connection point between the first capacitor and the second capacitor of the first inverter. The inductor has one end electrically connected to a second end of the primary winding of the transformer and the other end electrically connected to a connection point between the first switching element and the second switching element of the first inverter. The second inverter includes a pair of input terminals, a pair of output terminals, and at least two switching elements, and the secondary winding of the transformer is electrically connected between the pair of input terminals. The control circuit controls the first inverter and the second inverter. The capacitance of the first capacitor is set so that a resonant frequency between the first capacitor and the inductor is lower than both a switching frequency of the first switching element and the second switching element and a switching frequency of the at least two switching elements of the second inverter. The capacitance of the second capacitor is set so that a resonant frequency between the second capacitor and the inductor is lower than both switching frequencies.

[0007] A converter device according to one aspect of the present disclosure includes a rectifier, a first inverter, a transformer, an inductor, and a control circuit. The rectifier rectifies an AC voltage. The first inverter includes a capacitor connected in parallel to the rectifier, a first series circuit in which a first switching element and a second switching element are connected in series, and a second series circuit in which a third switching element and a fourth switching element are connected in series, all of which are connected in parallel. The transformer has a primary winding and a secondary winding, and a first end of the primary winding is electrically connected to a connection point between the third switching element and the fourth switching element of the first inverter. The inductor has one end electrically connected to a second end of the primary winding of the transformer and the other end electrically connected to a connection point between the first switching element and the second switching element of the first inverter. The second inverter includes a pair of input terminals, a pair of output terminals, and at least two switching elements, and the secondary winding of the transformer is electrically connected between the pair of input terminals. The control circuit controls the first inverter and the second inverter.

[0008] FIG. 1 is a circuit diagram of a converter device according to a first embodiment. FIG. 2 is a block diagram showing the configuration of a control circuit of the converter device according to the same. FIG. 3 is a timing chart showing the operation of the converter device according to the same. FIG. 4 is a waveform diagram showing the operation of the converter device according to the same. FIG. 5 is a graph showing the relationship between output power and transformer current for the converter device according to the same. FIG. 6 is another waveform diagram showing the operation of the converter device according to the same. FIG. 7 is a block diagram showing the configuration of a control circuit of a converter device according to a second embodiment. FIG. 8 is a waveform diagram showing the output voltage during load fluctuation for the converter device according to the same. FIG. 9 is a circuit diagram of a converter device according to a third embodiment. FIG. 10 is a timing chart showing the operation of the converter device according to the same. FIG. 11 is a waveform diagram showing the operation of the converter device according to the same.

[0009] Converter devices according to embodiments 1 to 3 will be described below with reference to the drawings. The configurations described in the following embodiments are merely examples of the present disclosure. The present disclosure is not limited to the following embodiments, and various modifications are possible depending on the design, etc., as long as the effects of the present disclosure can be achieved.

[0010] First Embodiment A converter device according to a first embodiment will be described below with reference to FIGS. 1 to 6. FIG.

[0011] (1) Converter Device The converter device A1 according to the first embodiment is an isolated AC-DC converter including a transformer Tr1, as shown in Fig. 1. The converter device A1 includes a pair of input terminals 1a and 1b, an input filter 10, a rectifier 20, a first inverter 30, the transformer Tr1, an inductor Ld, a second inverter 40, an output filter C4, a control circuit 50, and a pair of output terminals 2a and 2b.

[0012] The pair of input terminals 1a, 1b are, for example, a pair of connection terminals (first connection terminals) of a first connector (not shown). The pair of input terminals 1a, 1b are, for example, electrically and mechanically connected to an AC power supply 90 via a pair of power supply lines (not shown). That is, in the converter device A1, the AC power supply 90 is electrically connected between the pair of input terminals 1a, 1b. The AC power supply 90 includes, for example, a commercial power supply. The voltage between the pair of input terminals 1a, 1b is a voltage (input voltage) Vin from the AC power supply 90. The input voltage Vin is, for example, a sinusoidal AC voltage.

[0013] The pair of output terminals 2a, 2b are, for example, a pair of connection terminals (second connection terminals) of a second connector (not shown). The pair of output terminals 2a, 2b are, for example, electrically and mechanically connected to the load 100 via a pair of connection wires (not shown). That is, the converter device A1 has the load 100 electrically connected between the pair of output terminals 2a, 2b. The load 100 is, for example, an information device, a home appliance, a communication device, a lighting fixture, a wiring device, etc. The information device is, for example, a smartphone, a tablet terminal, a notebook PC, etc. The home appliance is, for example, a television, an air conditioner, etc. The communication device is, for example, a wireless adapter capable of wireless communication, etc. The lighting device is, for example, an LED lighting device, etc. The wiring device is, for example, a power outlet (outlet), a wall switch, etc.

[0014] (1.1) Input Filter The input filter 10 is, for example, an EMI (Electromagnetic Interference) filter. For example, as shown in FIG. 1 , the input filter 10 includes a common mode filter Lc and a T-type filter 11. The T-type filter 11 has an inductor L1, an inductor L2, and a capacitor C1. A first end of the inductor L1 is electrically connected to the input terminal 1a via a first winding of the common mode filter Lc. A second end of the inductor L1 is electrically connected to a first end of the capacitor C1. The second end of the inductor L1 is electrically connected to a first end of the inductor L2. The second end of the inductor L2 is electrically connected to the rectifier 20. A second end of the capacitor C1 is electrically connected to the input terminal 1b via a second winding of the common mode filter Lc. The second end of the capacitor C1 is electrically connected to the rectifier 20.

[0015] (1.2) Rectifier The rectifier 20 is configured to rectify the input voltage Vin from the AC power supply 90. The rectifier 20 is, for example, a full-wave rectifier. The rectifier 20 includes four diodes D1 to D4. The rectifier 20 includes a series circuit in which the diodes D1 and D2 are connected in series, and a series circuit in which the diodes D3 and D4 are connected directly, connected in parallel. More specifically, the anode of the diode D1 is electrically connected to the second end of the inductor L2 of the T-type filter 11. The anode of the diode D1 is electrically connected to the cathode of the diode D2. The anode of the diode D2 is electrically connected to the anode of the diode D4. The anode of the diode D4 is electrically connected to the first inverter 30. The cathode of the diode D4 is electrically connected to the second end of the capacitor C1 of the T-type filter 11. The cathode of the diode D4 is electrically connected to the anode of the diode D3. The cathode of diode D3 is electrically connected to the cathode of diode D1. The cathode of diode D3 is also electrically connected to the first inverter 30. In this embodiment, the connection point of diodes D1 and D2 is the input end (first input end) 3a of the rectifier 20. The connection point of diodes D3 and D4 is the input end (second input end) 3b of the rectifier 20. The connection point of diodes D1 and D3 is the output end (first output end) 4a of the rectifier 20. The connection point of diodes D2 and D4 is the output end (second output end) 4b of the rectifier 20.

[0016] (1.3) First Inverter The first inverter 30 is, for example, a half-bridge inverter. The first inverter 30 includes two switching elements Q1 and Q2 and two capacitors C2 and C3. The first inverter 30 includes a series circuit 31 in which the switching elements Q1 and Q2 are connected in series, and a series circuit 32 in which the capacitors C2 and C3 are connected in series, connected in parallel. The series circuit 31 in which the switching elements Q1 and Q2 are connected in series is electrically connected between a pair of output terminals 4a and 4b of the rectifier 20. In other words, the series circuit 31 in which the switching elements Q1 and Q2 are connected in series is connected in parallel to the rectifier 20. The series circuit 32 in which the capacitors C2 and C3 are connected in series is connected in parallel to the series circuit 31 in which the switching elements Q1 and Q2 are connected in series. In other words, the series circuit 32 in which the capacitors C2 and C3 are connected in series is also connected in parallel to the rectifier 20. Each of the switching elements Q1 and Q2 is, for example, a GaN-based GIT (Gate Injection Transistor). Each of the switching elements Q1 and Q2 has a first main terminal, a second main terminal, and a control terminal. In the following description, to facilitate understanding of the embodiment, the first main terminal will be referred to as a drain terminal, the second main terminal will be referred to as a source terminal, and the control terminal will be referred to as a gate terminal.

[0017] The drain terminal of the switching element Q1 is electrically connected to the cathode of the diode D3 of the rectifier 20. The drain terminal of the switching element Q1 is also electrically connected to a first end of a capacitor C2. The second end of the capacitor C2 is electrically connected to a primary winding N1 (described later) of the transformer Tr1. The second end of the capacitor C2 is also electrically connected to a first end of a capacitor C3. The second end of the capacitor C3 is electrically connected to a source terminal of the switching element Q2. The gate terminal of the switching element Q2 is electrically connected to the control circuit 50. The drain terminal of the switching element Q2 is electrically connected to the inductor Ld. The drain terminal of the switching element Q2 is also electrically connected to the source terminal of the switching element Q1. The gate terminal of the switching element Q1 is electrically connected to the control circuit 50.

[0018] (1.4) Transformer and Inductor The transformer Tr1 has a primary winding N1 and a secondary winding N2. A first end of the primary winding N1 is electrically connected to a connection point 5b between the capacitors C2 and C3 in the first inverter 30. A second end of the primary winding N1 is electrically connected to a connection point 5a between the switching elements Q1 and Q2 in the first inverter 30 via an inductor Ld. In other words, one end (first end) of the inductor Ld is electrically connected to a second end of the primary winding N1 of the transformer Tr1. The other end (second end) of the inductor Ld is electrically connected to the connection point 5a between the switching elements Q1 and Q2. A first end of the secondary winding N2 is electrically connected to an input terminal 6a (described later) of the second inverter 40. A second end of the secondary winding N2 is electrically connected to an input terminal 6b (described later) of the second inverter 40.

[0019] (1.5) Second Inverter The second inverter 40 is, for example, a full-bridge inverter. The second inverter 40 includes four switching elements Q3 to Q6. Each of the switching elements Q3 to Q6 is, for example, a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). More specifically, each of the switching elements Q3 to Q6 is, for example, an n-channel MOSFET. The n-channel MOSFET is, for example, a normally-off Si-based MOSFET. Each of the switching elements Q3 to Q6 has a first main terminal, a second main terminal, and a control terminal. Each of the switching elements Q3 to Q6 also has a parasitic diode. Note that, hereinafter, to facilitate understanding of the description of the embodiment, the first main terminal will be referred to as the drain terminal, the second main terminal will be referred to as the source terminal, and the control terminal will be referred to as the gate terminal.

[0020] The drain terminal of the switching element Q3 is electrically connected to the drain terminal of the switching element Q5. The gate terminal of the switching element Q3 is electrically connected to the control circuit 50. The source terminal of the switching element Q3 is electrically connected to a first end of the secondary winding N2 of the transformer Tr1. The source terminal of the switching element Q3 is electrically connected to the drain terminal of the switching element Q4. The gate terminal of the switching element Q4 is electrically connected to the control circuit 50. The source terminal of the switching element Q4 is electrically connected to the source terminal of the switching element Q6. The source terminal of the switching element Q6 is electrically connected to the output filter C4. The gate terminal of the switching element Q6 is electrically connected to the control circuit 50. The drain terminal of the switching element Q6 is electrically connected to a second end of the secondary winding N2 of the transformer Tr1. The drain terminal of the switching element Q6 is electrically connected to the source terminal of the switching element Q5. The gate terminal of the switching element Q5 is electrically connected to the control circuit 50. The drain terminal of the switching element Q5 is electrically connected to the output filter C4. In this embodiment, the connection point between the switching elements Q3 and Q4 is the input terminal (first input terminal) 6a of the second inverter 40. Also, the connection point between the switching elements Q5 and Q6 is the input terminal (second input terminal) 6b of the second inverter 40. That is, the secondary winding N2 of the transformer Tr1 is electrically connected between the pair of input terminals 6a, 6b of the second inverter 40. Also, in this embodiment, the connection point between the switching elements Q3 and Q5 is the output terminal (first output terminal) 7a of the second inverter 40. Also, the connection point between the switching elements Q4 and Q6 is the output terminal (second output terminal) 7b of the second inverter 40.

[0021] (1.6) Output Filter The output filter C4 is configured to smooth the output voltage of the second inverter 40. The output filter C4 is, for example, a capacitor. More specifically, the output filter C4 is, for example, an electrolytic capacitor. A first terminal (a terminal on the high potential side) of the output filter C4 is electrically connected to the drain terminal of the switching element Q5 in the second inverter 40. The first terminal of the output filter C4 is also electrically connected to the output terminal 2a. A second terminal (a terminal on the low potential side) of the output filter C4 is electrically connected to the source terminal of the switching element Q6 in the second inverter 40. The second terminal of the output filter C4 is also electrically connected to the output terminal 2b. That is, the output filter C4 is electrically connected between the pair of output terminals 7a and 7b of the second inverter 40.

[0022] (1.7) Control Circuit The control circuit 50 is realized, for example, by a computer system having one or more processors and one or more memories. In other words, the functions of the control circuit 50 are realized by the one or more processors executing a program recorded in the memory. The program may be pre-recorded in the memory, or may be provided via a telecommunications line such as the Internet, or may be recorded on a non-transitory recording medium such as a memory card and provided.

[0023] The control circuit 50 controls the first inverter 30. More specifically, the control circuit 50 controls the two switching elements Q1 and Q2 in the first inverter 30. The control circuit 50 outputs a control signal S1 to the switching element Q1. The control signal S1 is a signal for controlling the switching element Q1 of the first inverter 30. More specifically, the control signal S1 is a signal for switching the switching element Q1 between an on state and an off state. As shown in FIG. 3 , the control signal S1 is, for example, a pulse-shaped signal (e.g., a PWM signal). The duty of the control signal S1 is, for example, 50%. The duty represents the ratio of the high-level period to the total period of the period during which the signal level of the control signal is high (high-level period) and the period during which the signal level is low (low-level period). Furthermore, period P1 in FIG. 3 represents the high-level period of the control signal S1.

[0024] The control circuit 50 also outputs a control signal S2 to the switching element Q2. The control signal S2 is a signal for controlling the switching element Q2 of the first inverter 30. More specifically, the control signal S2 is a signal for switching the switching element Q2 to either an ON state or an OFF state. As shown in FIG. 3 , the control signal S2 is, for example, a pulse-shaped signal (e.g., a PWM signal). The duty of the control signal S2 is, for example, 50%. That is, the control circuit 50 controls the first inverter 30 so that the duties of the two switching elements Q1 and Q2 in the first inverter 30 are the same.

[0025] The control circuit 50 synchronizes the control signal S1 and the control signal S2 and outputs the control signal S1 and the control signal S2 to the first inverter 30. The control circuit 50 also outputs the control signal S1 and the control signal S2 to the first inverter 30 so that the control signal S1 and the control signal S2 have a trade-off relationship. For example, the control circuit 50 outputs the control signal S1 and the control signal S2 to the first inverter 30 so that the signal level of the control signal S2 becomes low when the signal level of the control signal S1 is high. The control circuit 50 also outputs the control signal S1 and the control signal S2 to the first inverter 30 so that the signal level of the control signal S2 becomes high when the signal level of the control signal S1 is low. In other words, the control circuit 50 outputs the control signal S1 and the control signal S2 to the first inverter 30 so that the switching element Q2 is in an off state when the switching element Q1 is in an on state. Furthermore, the control circuit 50 outputs the control signal S1 and the control signal S2 to the first inverter 30 so that the switching element Q2 is in the on state when the switching element Q1 is in the off state.

[0026] The control circuit 50 controls the second inverter 40. More specifically, the control circuit 50 controls the four switching elements Q3 to Q6 in the second inverter 40. The control circuit 50 outputs a control signal S3 to the switching element Q3. The control signal S3 is a signal for controlling the switching element Q3 of the second inverter 40. More specifically, the control signal S3 is a signal for switching the switching element Q3 between an on state and an off state. As shown in FIG. 3 , the control signal S3 is, for example, a pulse-shaped signal (e.g., a PWM signal). The duty of the control signal S3 is smaller than the duties of the control signals S1 and S2. The duty of the control signal S3 is, for example, 20%. The control circuit 50 also outputs a control signal S4 to the switching element Q4. The control signal S4 is a signal for controlling the switching element Q4 of the second inverter 40. More specifically, the control signal S4 is a signal for switching the switching element Q4 between an on state and an off state. As shown in Fig. 3, the control signal S4 is, for example, a pulse signal (e.g., a PWM signal). The duty of the control signal S4 is smaller than the duties of the control signals S1 and S2. The duty of the control signal S4 is, for example, 20%. Note that a period P2 in Fig. 3 indicates a high-level period of the control signal S3.

[0027] The control circuit 50 also outputs a control signal S5 to the switching element Q5. The control signal S5 is a signal for controlling the switching element Q5 of the second inverter 40. More specifically, the control signal S5 is a signal for switching the switching element Q5 between an ON state and an OFF state. As shown in FIG. 3 , the control signal S5 is, for example, a pulse-shaped signal (e.g., a PWM signal). The duty of the control signal S5 is smaller than the duties of the control signals S1 and S2. The duty of the control signal S5 is, for example, 20%. The control circuit 50 also outputs a control signal S6 to the switching element Q6. The control signal S6 is a signal for controlling the switching element Q6 of the second inverter 40. More specifically, the control signal S6 is a signal for switching the switching element Q6 between an ON state and an OFF state. As shown in FIG. 3 , the control signal S6 is, for example, a pulse-shaped signal (e.g., a PWM signal). The duty of the control signal S6 is smaller than the duties of the control signals S1 and S2. The duty of the control signal S6 is, for example, 20%.

[0028] The control circuit 50 synchronizes the control signal S3 and the control signal S4 and outputs the control signal S3 and the control signal S4 to the second inverter 40. The control circuit 50 also outputs the control signal S3 and the control signal S4 to the second inverter 40 so that the control signal S3 and the control signal S4 have a trade-off relationship. For example, the control circuit 50 outputs the control signal S3 and the control signal S4 to the second inverter 40 so that the signal level of the control signal S4 becomes low when the signal level of the control signal S3 is high. The control circuit 50 also outputs the control signal S3 and the control signal S4 to the second inverter 40 so that the signal level of the control signal S4 becomes high when the signal level of the control signal S3 is low. In other words, the control circuit 50 outputs the control signal S3 and the control signal S4 to the second inverter 40 so that the switching element Q4 is in an off state when the switching element Q3 is in an on state. Furthermore, when the switching element Q3 is in the OFF state, the control circuit 50 outputs the control signal S3 and the control signal S4 to the second inverter 40 so that the switching element Q4 is in the ON state.

[0029] The control circuit 50 also synchronizes the control signal S5 and the control signal S6 and outputs the control signal S5 and the control signal S6 to the second inverter 40. The control circuit 50 also outputs the control signal S5 and the control signal S6 to the second inverter 40 so that the control signal S5 and the control signal S6 have a trade-off relationship. For example, the control circuit 50 outputs the control signal S5 and the control signal S6 to the second inverter 40 so that the signal level of the control signal S6 becomes low when the signal level of the control signal S5 is high. The control circuit 50 also outputs the control signal S5 and the control signal S6 to the second inverter 40 so that the signal level of the control signal S6 becomes high when the signal level of the control signal S5 is low. In other words, the control circuit 50 outputs the control signal S5 and the control signal S6 to the second inverter 40 so that the switching element Q6 is in an off state when the switching element Q5 is in an on state. Furthermore, when the switching element Q5 is in the OFF state, the control circuit 50 outputs the control signal S5 and the control signal S6 to the second inverter 40 so that the switching element Q6 is in the ON state.

[0030] As shown in FIG. 3 , the control circuit 50 outputs the control signal S1 and the control signal S3 such that the control signal S1 has a phase difference δ1 with respect to the control signal S3. The control circuit 50 also outputs the control signal S2 and the control signal S3 such that the control signal S2 has a phase difference δ1 with respect to the control signal S3. That is, the control circuit 50 outputs multiple control signals (e.g., the control signal S2 and the control signal S3) such that the control signal to the first inverter 30 (e.g., the control signal S2) has a phase difference δ1 with respect to the control signal to the second inverter 40 (e.g., the control signal S3). The control circuit 50 detects the output voltage Vo of the output filter C4 (see FIG. 2 ). The control circuit 50 determines the phase difference δ1 based on the output voltage Vo of the output filter C4.

[0031] 3, the control circuit 50 outputs the control signal S3 and the control signal S5 such that the control signal S5 has a phase difference δ2 with respect to the control signal S3. The control circuit 50 also outputs the control signal S3 and the control signal S6 such that the control signal S6 has a phase difference δ2 with respect to the control signal S3. The phase difference δ2 is, for example, 180°.

[0032] The configuration of the control circuit 50 that realizes the phase differences of the control signals S1 to S6 will be described in detail below.

[0033] 2 , the control circuit 50 includes a first processing unit 51, a control unit 52, a first generation unit 53, a second generation unit 54, a first calculation unit 55, a second calculation unit 56, a first comparator 57, and a second comparator 58. The control circuit 50 also includes a phase adjustment unit 59, a first NOT circuit (first inversion circuit) 67, a second NOT circuit (second inversion circuit) 60, and a third NOT circuit (third inversion circuit) 61.

[0034] The first processing unit 51 calculates, for example, the voltage value of the output voltage Vo of the output filter C4 and the output voltage command value Vo ＊ The deviation (deviation value) between the output voltage command value Vo ＊ is, for example, an average value (reference value) of the output voltage Vo stored in advance in a memory. The first processing unit 51 is electrically connected to the control unit 52.

[0035] The control unit 52 is configured to perform, for example, PI control. The control unit 52 generates a phase difference δ1 for performing feedback control to bring the deviation value calculated by the first processing unit 51 closer to zero, and outputs the phase difference δ1 to the first generation unit 53. The control unit 52 is electrically connected to the first generation unit 53.

[0036] The first generator 53 generates a control signal S1 based on the phase difference δ1 from the controller 52 and outputs the control signal S1 to the switching element Q1 of the first inverter 30 and the first NOT circuit 67. That is, the first generator 53 generates the control signal S1 including the phase difference δ1 and outputs the control signal S1 to the switching element Q1 and the first NOT circuit 67. In other words, the first generator 53 generates the control signal S1 such that the control signal S1 has a phase difference δ1 with respect to the control signal S3 (see FIG. 3 ). The first generator 53 is electrically connected to the gate terminal of the switching element Q1. The first generator 53 is also electrically connected to the first NOT circuit 67.

[0037] The first NOT circuit 67 inverts the control signal S1 from the first generator 53 to generate the control signal S2 and outputs the control signal S2 to the switching element Q2 of the first inverter 30. In other words, the first NOT circuit 67 generates the control signal S2 having a phase difference δ1. In other words, the first NOT circuit 67 generates the control signal S2 such that the control signal S2 has a phase difference δ1 with respect to the control signal S3 (see FIG. 3 ). The first NOT circuit 67 is electrically connected to the gate terminal of the switching element Q2.

[0038] The second generator 54 outputs a base signal (carrier signal) for generating each of the control signals S3 to S6 to the first comparator 57 and the phase adjuster 59. The base signal is, for example, a pulse-shaped signal (PWM signal). The second generator 54 is electrically connected to the inverting input terminal of the first comparator 57. The second generator 54 is also electrically connected to the phase adjuster 59.

[0039] The first calculation unit 55 multiplies the voltage value of the output voltage Va (see FIG. 4 ) of the rectifier 20 by the reciprocal of the maximum value Vap (see FIG. 4 ) of the output voltage Va, and outputs the result of the multiplication (first calculation result) to the second calculation unit 56. The reciprocal of the maximum value Vap of the output voltage Va is 1 / Vap. The first calculation unit 55 is electrically connected to the second calculation unit 56.

[0040] The second calculation unit 56 multiplies the first calculation result of the first calculation unit 55 by a variable m1 (described later) and outputs the multiplied calculation result (second calculation result) to the first comparator 57. The second calculation unit 56 is electrically connected to the non-inverting input terminal of the first comparator 57. The second calculation unit 56 is also electrically connected to the non-inverting input terminal of the second comparator 58.

[0041] The first comparator 57 compares the second calculation result of the second calculation unit 56 with the signal level (voltage value) of the fundamental signal from the second generation unit 54. The first comparator 57 outputs the comparison result as a control signal S3 to the switching element Q3 of the second inverter 40 and the second NOT circuit 60. The output terminal of the first comparator 57 is electrically connected to the gate terminal of the switching element Q3. The output terminal of the first comparator 57 is also electrically connected to the second NOT circuit 60.

[0042] The second NOT circuit 60 inverts the control signal S3 from the first comparator 57 to generate the control signal S4, and outputs the control signal S4 to the switching element Q4 of the second inverter 40. In other words, the second NOT circuit 60 generates the control signal S4 (see FIG. 3). The second NOT circuit 60 is electrically connected to the gate terminal of the switching element Q4.

[0043] The phase adjustment unit 59 adjusts the phase of the fundamental signal from the second generation unit 54. More specifically, the phase adjustment unit 59 generates a signal (second fundamental signal) with a phase delayed by, for example, 180° from the fundamental signal (first fundamental signal) from the second generation unit 54, and outputs the generated signal to the second comparator 58. In other words, the phase adjustment unit 59 generates the second fundamental signal such that the second fundamental signal has a phase difference δ2 with respect to the first fundamental signal, and outputs the generated signal to the second comparator 58. The phase adjustment unit 59 is electrically connected to the inverting input terminal of the second comparator 58.

[0044] The second comparator 58 compares the second calculation result of the second calculation unit 56 with the signal level (voltage value) of the second fundamental signal from the phase adjustment unit 59. The second comparator 58 outputs the comparison result as a control signal S5 to the switching element Q5 of the second inverter 40 and to the third NOT circuit 61. The output terminal of the second comparator 58 is electrically connected to the gate terminal of the switching element Q5. The output terminal of the second comparator 58 is also electrically connected to the third NOT circuit 61.

[0045] The third NOT circuit 61 inverts the control signal S5 from the second comparator 58 to generate the control signal S6, and outputs the control signal S6 to the switching element Q6 of the second inverter 40. In other words, the third NOT circuit 61 generates the control signal S6 (see FIG. 3). The third NOT circuit 61 is electrically connected to the gate terminal of the switching element Q6.

[0046] (2) Capacitor Constants The capacitance of capacitor C2 (see FIG. 1) is, for example, the same as the capacitance of capacitor C3. The switching frequency of switching element Q1 is, for example, the same as the switching frequency of switching element Q2. In other words, the switching frequencies of switching elements Q1 and Q2 are the same. The switching frequency of switching element Q3 is, for example, the same as the switching frequency of switching element Q4. The switching frequency of switching element Q3 is, for example, the same as the switching frequency of switching element Q5. The switching frequency of switching element Q3 is, for example, the same as the switching frequency of switching element Q6. In other words, in this embodiment, the switching frequencies of switching elements Q3 to Q6 are the same. The switching frequency of switching element Q3 is, for example, the same as the switching frequency of switching element Q1.

[0047] The capacitance of the capacitor C2 is set, for example, so that the resonant frequency (first resonant frequency) between the capacitor C2 and the inductor Ld is lower than the switching frequency (first switching frequency) of the two switching elements Q1 and Q2. The capacitance of the capacitor C2 is also set, for example, so that the first resonant frequency is lower than the switching frequency (second switching frequency) of the four switching elements Q3 to Q6. That is, the capacitance of the capacitor C2 is set so that the first resonant frequency is lower than both the first switching frequency and the second switching frequency. The first switching frequency is the same as the switching frequency of each of the switching elements Q1 and Q2. The second switching frequency is the same as the switching frequency of each of the switching elements Q3 to Q6. In this embodiment, since the first switching frequency and the second switching frequency are the same, the capacitance of the capacitor C2 is set, for example, so that the first resonant frequency is lower than the first switching frequency. In this embodiment, the capacitance of the capacitor C2 is set so that the first resonant frequency is smaller than 1 / 10 of the first switching frequency, for example.

[0048] The capacitance of capacitor C2 is set to a value that does not remove ripples due to frequency components of the input voltage Vin from the AC power supply 90. For example, when the frequency of the AC power supply 90 is 50 Hz, the capacitance of capacitor C2 is set to a value that does not remove ripples due to frequency components of 100 Hz. When the frequency of the AC power supply 90 is 60 Hz, the capacitance of capacitor C2 is set to a value that does not remove ripples due to frequency components of 120 Hz. Note that, even when the frequency of the AC power supply 90 is 50 Hz, the capacitance of capacitor C2 may be set to a value that does not remove ripples due to frequency components of 120 Hz. In other words, the capacitance of capacitor C2 only needs to be set to a value that does not remove ripples due to frequency components of 120 Hz or less.

[0049] The capacitance of the capacitor C3 is set, for example, so that the resonant frequency (second resonant frequency) between the capacitor C3 and the inductor Ld is lower than the first switching frequency. The capacitance of the capacitor C3 is set, for example, so that the second resonant frequency is lower than the second switching frequency. That is, the capacitance of the capacitor C3 is set so that the second resonant frequency is lower than both the first switching frequency and the second switching frequency. In this embodiment, the capacitance of the capacitor C3 is set, for example, so that the second resonant frequency is lower than the first switching frequency. In this embodiment, the capacitance of the capacitor C3 is set, for example, so that the second resonant frequency is lower than the first switching frequency.

[0050] The capacitance of capacitor C3 is set to a value that does not remove ripples due to frequency components of the input voltage Vin from the AC power supply 90. For example, when the frequency of the AC power supply 90 is 50 Hz, the capacitance of capacitor C3 is set to a value that does not remove ripples due to frequency components of 100 Hz. When the frequency of the AC power supply 90 is 60 Hz, the capacitance of capacitor C3 is set to a value that does not remove ripples due to frequency components of 120 Hz. Note that, even when the frequency of the AC power supply 90 is 50 Hz, the capacitance of capacitor C3 may be set to a value that does not remove ripples due to frequency components of 120 Hz. In other words, the capacitance of capacitor C3 only needs to be set to a value that does not remove ripples due to frequency components of 120 Hz or less.

[0051] (3) Details of Operation of the Control Circuit The control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 in the second inverter 40 change based on the voltage value of the input voltage Vin from the AC power supply 90. In this embodiment, the control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 in the second inverter 40 change based on the voltage value of the output voltage Va of the rectifier 20. As shown in FIG. 4 , the output voltage Va of the rectifier 20 corresponds to the input voltage Vin from the AC power supply 90 and is a voltage obtained by full-wave rectifying the input voltage Vin. In other words, the voltage value of the output voltage Va of the rectifier 20 corresponds to the absolute value of the input voltage Vin from the AC power supply 90.

[0052] Specifically, as shown in FIG. 4 , the control circuit 50 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 to the second inverter 40 is minimized when the voltage value of the output voltage Va of the rectifier 20 is minimum (zero in the example of FIG. 4 ). In other words, the control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 are minimized (e.g., 0%) when the voltage value of the output voltage Va of the rectifier 20 is minimum. Furthermore, the control circuit 50 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 to the second inverter 40 is maximized when the voltage value of the output voltage Va of the rectifier 20 is maximum (Vap in the example of FIG. 4 ). In other words, the control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 are maximized (e.g., 32%) when the voltage value of the output voltage Va of the rectifier 20 is maximum. That is, when the voltage value of the output voltage Va of the rectifier 20 changes from a minimum value to a maximum value, the control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 change from a minimum value to a maximum value. In other words, when the voltage value of the output voltage Va of the rectifier 20 changes from a minimum value to a maximum value, the control circuit 50 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 of the second inverter 40 changes from a minimum value to a maximum value. Furthermore, when the voltage value of the output voltage Va of the rectifier 20 changes from a maximum value to a minimum value, the control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 change from a maximum value to a minimum value. In other words, when the voltage value of the output voltage Va of the rectifier 20 changes from a maximum value to a minimum value, the control circuit 50 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 of the second inverter 40 changes from a maximum value to a minimum value. Note that the output waveform of the input voltage V2 of the second inverter 40 in FIG. 4 is shown schematically to explain that the pulse width P2 changes, and is not necessarily the same as the actual output waveform.

[0053] More specifically, the control circuit 50 controls the second inverter 40 to satisfy the condition of the following equation (1), where D2 is the pulse width P2 of the input voltage V2 of the second inverter 40, Vin is the voltage value of the input voltage Vin from the AC power supply 90, and Vinp is the maximum voltage value of the input voltage Vin. Note that π in equation (1) represents a phase difference of 180°, which corresponds to a half cycle of the sine wave of the input voltage Vin from the AC power supply 90 (see FIG. 4 ). The variable m1 in equation (1) is expressed by the following equation (2), where N is the turns ratio of the transformer Tr1 (number of turns of the primary winding N1 / number of turns of the secondary winding N2), Vo is the output voltage (voltage across both ends) of the output filter C4, and δ1 is the phase difference δ1 of the control signal S1 relative to the control signal S3.

[0054]

[0055]

[0056] Here, as shown in Figure 5, the current value (effective current value) of the current I1 flowing through the inductor Ld can be made smaller as the value of the variable m1 increases. Therefore, the converter device A1 can reduce the reactive current by setting the value of the variable m1 so that the current value of the current I1 flowing through the inductor Ld is reduced. Therefore, the converter device A1 can reduce the current value (effective current value) of the current flowing through the primary winding N1 of the transformer Tr1, thereby achieving high efficiency.

[0057] As shown in FIG. 6, the voltage value of the input voltage V2 of the second inverter 40 includes a first voltage value (in the example of FIG. 6, the voltage value is −NVo), a second voltage value (in the example of FIG. 6, the voltage value is zero), and a third voltage value (in the example of FIG. 6, the voltage value is NVo). The second voltage value is greater than the first voltage value. The third voltage value is greater than the second voltage value. Note that the input voltage V2 of the second inverter 40 is the same as the voltage across the secondary winding N2 of the transformer Tr1, as shown in FIG. 1.

[0058] 6 , when the voltage value of the output voltage V1 of the first inverter 30 is zero and the voltage value of the input voltage V2 of the second inverter 40 changes from the third voltage value to the second voltage value (time t1 in FIG. 6 ), the control circuit 50 controls the second inverter 40 so that the current I1 flowing through the inductor Ld is equal to or less than zero. The output voltage V1 of the first inverter 30 is the voltage between a connection point 5a between the switching elements Q1 and Q2 and a connection point 5b between the capacitors C2 and C3. In other words, the output voltage V1 of the first inverter 30 is the voltage between a first end of the primary winding N1 of the transformer Tr1 and the other end (second end) of the inductor Ld. That is, the control circuit 50 controls the second inverter 40 so that the current value of the current flowing through the primary winding N1 of the transformer Tr1 is equal to or less than zero when the voltage value between the first end of the primary winding N1 of the transformer Tr1 and the other end of the inductor Ld is zero and the voltage value across the secondary winding N2 of the transformer Tr1 changes from the third voltage value to the second voltage value.

[0059] (4) Operation of Converter Device The converter device A1 converts the AC voltage of the AC power supply 90 (input voltage Vin from the AC power supply 90) into a DC voltage (output voltage Vo of the output filter C4) by the control circuit 50 controlling the first inverter 30 and the second inverter 40. In short, the converter device A1 converts AC power from the AC power supply 90 into DC power.

[0060] (5) Effects The converter device A1 includes a rectifier 20, a first inverter 30, a transformer Tr1, an inductor Ld, a second inverter 40, and a control circuit 50. The capacitance of the capacitor C2 is set so that the resonant frequency between the capacitor C2 and the inductor Ld is lower than both the switching frequencies of the switching elements Q1 and Q2 and the switching frequencies of the four switching elements Q3 to Q6 of the second inverter 40. The capacitance of the capacitor C3 is set so that the resonant frequency between the capacitor C3 and the inductor Ld is lower than both of the switching frequencies. Therefore, the converter device A1 can control the output voltage Vo of the output filter C4 while performing power factor correction (PFC) control on the input current Ia (see FIG. 1) of the first inverter 30. Therefore, the converter device A1 can achieve high efficiency.

[0061] The control circuit 50 controls the first inverter 30 so that the duties of the two switching elements Q1, Q2 of the first inverter 30 are the same. The control circuit 50 also controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 of the second inverter 40 change based on the voltage value of the input voltage Vin (AC voltage) from the AC power supply 90. Therefore, in the converter device A1, the output voltage Vo of the output filter C4 can be controlled while PFC-controlling the input current Ia of the first inverter 30, thereby making it possible to improve the power factor, thereby achieving a high power factor and high efficiency.

[0062] The control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 change from a minimum value to a maximum value when the absolute value of the voltage value of the input voltage Vin from the AC power supply 90 changes from a minimum value to a maximum value. Furthermore, the control circuit 50 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 change from a maximum value to a minimum value when the absolute value of the voltage value of the input voltage Vin from the AC power supply 90 changes from a maximum value to a minimum value. Thus, in the converter device A1, the output voltage Vo of the output filter C4 can be controlled while PFC-controlling the input current Ia of the first inverter 30, thereby enabling power factor improvement, and thus enabling a high power factor and high efficiency.

[0063] The control circuit 50 outputs first control signals (control signals S1 and S2) to the two switching elements Q1 and Q2 in the first inverter 30. The control circuit 50 also outputs second control signals (control signals S3 to S6) to the four switching elements Q3 to Q6 in the second inverter. The control circuit 50 also outputs the first control signal and the second control signal such that the first control signal has a phase difference δ1 with respect to the second control signal. Therefore, the converter device A1 can further control the output voltage Vo of the output filter C4, thereby further improving the power factor, thereby enabling a higher power factor and higher efficiency.

[0064] The control circuit 50 controls the second inverter 40 so that the voltage value of the current flowing through the primary winding N1 of the transformer Tr1 is equal to or less than zero when the output voltage V1 of the first inverter 30 is zero and the input voltage V2 of the second inverter 40 changes from the third voltage value to the second voltage value (time t1 in FIG. 6 ). This reduces the reactive current in the converter device A1, thereby reducing the current value (effective current value) of the current flowing through the primary winding N1 of the transformer Tr1 and achieving higher efficiency. Therefore, the converter device A1 can achieve even higher power factor and higher efficiency. The output voltage V1 of the first inverter 30 is equal to the voltage between the first end of the primary winding N1 of the transformer Tr1 and the other end of the inductor Ld. The input voltage V2 of the second inverter 40 is equal to the voltage across the secondary winding N2 of the transformer Tr1. The current flowing through the primary winding N1 of the transformer Tr1 is the same as the current I1 flowing through the inductor Ld.

[0065] The control circuit 50 determines the phase difference δ1 based on the output voltage Vo of the output filter C4. Therefore, the converter device A1 can accurately control the output voltage Vo of the output filter C4, thereby further improving the power factor. Therefore, the converter device A1 can achieve even higher power factor and efficiency.

[0066] (6) Modifications The input filter 10 is not limited to an EMI (Electromagnetic Interference) filter, but may be, for example, an EMC filter. The input filter 10 includes the T filter 11, but may instead include a π filter or the like. The input filter 10 includes the T filter 11, but does not necessarily include the T filter 11. Furthermore, the input filter 10 includes the common mode filter Lc, but does not necessarily include the common mode filter Lc.

[0067] The rectifier 20 includes four diodes D1 to D4, but may include, for example, four switching elements (e.g., MOSFETs) instead of the four diodes D1 to D4. In other words, the rectifier 20 may be configured to perform synchronous rectification using four switching elements.

[0068] The inductor Ld is provided in the electrical path between the second end of the primary winding N1 of the transformer Tr1 and the connection point 5a between the switching elements Q1 and Q2 of the first inverter 30, but is not limited to this electrical path. The inductor Ld may also be provided in the electrical path between the first end of the primary winding N1 of the transformer Tr1 and the connection point 5b between the capacitors C2 and C3 of the first inverter 30. In this case, one end (first end) of the inductor Ld is electrically connected to the first end of the primary winding N1 of the transformer Tr1. The other end (second end) of the inductor Ld is electrically connected to the connection point 5b between the capacitors C2 and C3. Furthermore, the inductor Ld may be, for example, a leakage inductance of the transformer Tr1.

[0069] The second inverter 40 is a full-bridge inverter including four switching elements Q3 to Q6, but may also be a half-bridge inverter. For example, the second inverter 40 includes two switching elements Q4 and Q6 and two diodes (a first diode and a second diode). In other words, the second inverter 40 uses a first diode instead of the switching element Q3 and a second diode instead of the switching element Q5. In this case, the anode of the first diode is electrically connected to a first end of the secondary winding N2 of the transformer Tr1. The anode of the first diode is electrically connected to the drain terminal of the switching element Q4, and the cathode of the first diode is electrically connected to the cathode of the second diode. The anode of the second diode is electrically connected to a second end of the secondary winding N2 of the transformer Tr1. The anode of the second diode is electrically connected to the drain terminal of the switching element Q6. The second inverter 40 may also be a half-bridge inverter including, for example, two switching elements Q3 and Q5 and two diodes (a third diode and a fourth diode). In other words, the second inverter 40 may use a third diode instead of the switching element Q4 and a fourth diode instead of the switching element Q6. In this case, the cathode of the third diode is electrically connected to the second end of the secondary winding of the transformer Tr1. The cathode of the third diode is electrically connected to the source terminal of the switching element Q3. The anode of the third diode is electrically connected to the anode of the fourth diode. The cathode of the fourth diode is electrically connected to the first end of the secondary winding of the transformer Tr1. The cathode of the fourth diode is electrically connected to the source terminal of the switching element Q5.

[0070] The pair of output terminals 2a, 2b are electrically connected to the load 100, but may also be electrically connected to the load 100, for example, via a DC-DC converter that converts the output voltage (DC voltage) of the converter device A1 into a predetermined DC voltage.

[0071] Output voltage command value Vo ＊may be, for example, a command (external command) from a second control circuit separate from the control circuit (first control circuit) 50 to the first control circuit 50 without being stored in a memory. ＊ The deviation between the voltage value of the output voltage Vo and the output voltage command value Vo ＊ Alternatively, the difference (difference value) may be calculated.

[0072] The converter device A1 has a pair of input terminals 1a and 1b, but does not necessarily have to have the pair of input terminals 1a and 1b. The converter device A1 has an input filter 10, but does not necessarily have to have the input filter 10. The converter device A1 has an output filter C4, but does not necessarily have to have the output filter C4. The converter device A1 has a pair of output terminals 2a and 2b, but does not necessarily have to have the pair of output terminals 2a and 2b.

[0073] When the control circuit 50 controls the second inverter 40 so as to satisfy the condition of equation (1), the control circuit 50 uses the input voltage Vin from the AC power supply 90 in equation (1), but may also use, for example, the output voltage Va of the rectifier 20.

[0074] The first embodiment and the modifications described above are merely a part of the various embodiments and modifications of the present disclosure.

[0075] (Embodiment 2) As shown in Fig. 7, the converter device A1 according to embodiment 2 differs from the converter device A1 according to embodiment 1 in that the configuration of the control circuit 50 is different. Note that, in the converter device A1 according to embodiment 2, the same components as those in the converter device A1 according to embodiment 1 (see Figs. 1 to 6) are denoted by the same reference numerals and descriptions thereof will be omitted.

[0076] (1) Control Circuit As shown in Fig. 7, the control circuit 50 detects the output current Io (see Fig. 1) of the output filter C4. The control unit 52 generates a current deviation value from the deviation value (voltage deviation value) calculated by the first processing unit 51, and outputs the current deviation value to the nonlinear compensation unit 62. The control unit 52 is electrically connected to the nonlinear compensation unit 62.

[0077] The control circuit 50 also includes a nonlinear compensation unit 62. The nonlinear compensation unit 62 is configured to linearly adjust the relationship between the output voltage Vo of the output filter C4 and the phase difference δ1. More specifically, the nonlinear compensation unit 62 is configured to linearly adjust the relationship between the output voltage Vo of the output filter C4 and the adjustment amount (phase adjustment amount) of the phase difference δ1. For example, the nonlinear compensation unit 62 is configured to maintain a constant ratio between the output voltage Vo of the output filter C4 and the phase adjustment amount of the phase difference δ1.

[0078] As shown in FIG. 7, the nonlinear compensation unit 62 includes a second processing unit 63 , a first nonlinear compensation unit 64 , a second nonlinear compensation unit 65 , and a determination switch 66 .

[0079] The second processing unit 63 calculates, for example, the deviation (deviation value) between the current deviation value from the control unit 52 and the current value of the output current Io of the output filter C4, and calculates the output current command value Io ＊ to the first nonlinear compensation unit 64 and the second nonlinear compensation unit 65. The second processing unit 63 is electrically connected to the first nonlinear compensation unit 64 and the second nonlinear compensation unit 65.

[0080] The first nonlinear compensation unit 64 calculates the output current command value Io ＊ and outputs the phase difference δ1 to the first generating unit 53. More specifically, the first nonlinear compensating unit 64 generates the phase difference δ1 using the following equation (3), and outputs the phase difference δ1 to the first generating unit 53. Note that Ld in equation (3) is the inductance of the inductor Ld. Also, Id in equation (3) is the inductance of the inductor Ld. Furthermore ... ＊ The values ​​of m1 and Vinp in the formula (3) are the same as those in the formula (1).

[0081]

[0082] The second nonlinear compensation unit 65 calculates the output current command value Io ＊and outputs the phase difference δ1 to the first generating unit 53. More specifically, the second nonlinear compensating unit 65 generates the phase difference δ1 using the following equation (4), and outputs the phase difference δ1 to the first generating unit 53. Note that Tsw in equation (4) is the reciprocal of the switching frequency of each of the switching elements Q1 to Q6, and is the switching period. Furthermore, the variable A in equation (4) is expressed by the following equation (5). m1 and Vinp in equation (5) are the same as in equation (1). Ld and Id in equation (5) are the same as in equation (3).

[0083]

[0084] The determination switch 66 determines, for example, whether the phase difference δ1 of the control signal S1 relative to the control signal S3 is equal to or less than (0.5-m1). The determination switch 66 has a switching function. When the phase difference δ1 is equal to or less than (0.5-m1), the determination switch 66 connects the first nonlinear compensator 64 to the first generator 53. On the other hand, when the phase difference δ1 is not equal to or less than (0.5-m1), the determination switch 66 connects the second nonlinear compensator 65 to the first generator 53. That is, when the phase difference δ1 is equal to or less than (0.5-m1), the nonlinear compensator 62 generates the phase difference δ1 using the first nonlinear compensator 64 and outputs it to the first generator 53. When the phase difference δ1 is not equal to or less than (0.5-m1), the nonlinear compensator 62 generates the phase difference δ1 using the second nonlinear compensator 65 and outputs it to the first generator 53. Therefore, for example, when the relationship between the output voltage Vo of the output filter C4 and the phase difference δ1 is nonlinear, the control circuit 50 can make the relationship between the output voltage Vo of the output filter C4 and the phase difference δ1 linear. As a result, the converter device A1 of the second embodiment can more easily control the output voltage Vo of the output filter C4 than the converter device A1 of the first embodiment.

[0085] The converter device A1 of embodiment 2 includes the nonlinear compensation unit 62, and therefore, when there is a fluctuation (load fluctuation) in the load 100, the fluctuation in the output voltage Vo of the output filter C4 can be suppressed more effectively than the converter device A1 of embodiment 1 (see FIG. 8). Note that Vx in FIG. 8 represents the output voltage of the output filter C4 in the converter device A1 of embodiment 1. Vy in FIG. 8 represents the output voltage of the output filter C4 in the converter device A1 of embodiment 2. Time t2 in FIG. 8 represents the time when a fluctuation in the load 100 occurs. Time period T1 in FIG. 8 represents the time required for the fluctuation in the output voltage Vo to stabilize.

[0086] (2) Effects The converter device A1 of embodiment 2 has the nonlinear compensation unit 62, and therefore the relationship between the output voltage Vo of the output filter C4 and the phase difference δ1 can be made linear, making it easier to control the output voltage Vo of the output filter C4 than the converter device A1 of embodiment 1. Therefore, in the converter device A1 of embodiment 2, for example, when there is a load fluctuation, the fluctuation of the output voltage Vo of the output filter C4 can be suppressed, and therefore the responsiveness (response speed) to fluctuations in the load 100 can be improved compared to the converter device A1 of embodiment 1.

[0087] (3) Modifications As a modification of the second embodiment, modifications similar to those of the converter device A1 according to the modification of the first embodiment are possible. Therefore, the converter device A1 according to the modification of the second embodiment also achieves the same effects as the converter device A1 according to the second embodiment.

[0088] The second embodiment and the modified examples described above are merely a part of the various embodiments and modified examples of the present disclosure.

[0089] (Embodiment 3) As shown in Fig. 9, a converter device A2 according to embodiment 3 differs from the converter device A1 according to embodiment 1 in that the configuration of the first inverter 80 is different, etc. Note that, with respect to the converter device A2 according to embodiment 3, the same components as those of the converter device A1 according to embodiment 1 (see Figs. 1 to 6) are denoted by the same reference numerals and description thereof will be omitted.

[0090] (1) First Inverter The first inverter 80 is, for example, a full-bridge inverter. The first inverter 80 includes a capacitor C5, two switching elements Q1 and Q2, and two switching elements Q7 and Q8. The capacitor C5 is electrically connected between a pair of output terminals 4a and 4b of the rectifier 20. That is, the capacitor C5 is connected in parallel to the rectifier 20. The first inverter 80 includes a series circuit 31 in which the switching elements Q1 and Q2 are connected in series, and a series circuit 33 in which the switching elements Q7 and Q8 are connected in series, all of which are connected in parallel to the capacitor C5. More specifically, the series circuit 31 in which the switching elements Q1 and Q2 are connected in series is connected in parallel to the capacitor C5. The series circuit 33 in which the switching elements Q7 and Q8 are connected in series is connected in parallel to the series circuit 31 in which the switching elements Q1 and Q2 are connected in series. That is, the series circuit 33 in which the switching element Q7 and the switching element Q8 are connected in series is also connected in parallel to the capacitor C5. Each of the switching elements Q7 and Q8 is, for example, a GaN-based GIT (Gate Injection Transistor). Each of the switching elements Q7 and Q8 has a first main terminal, a second main terminal, and a control terminal. In the following, to facilitate understanding of the embodiment, the first main terminal will be referred to as a drain terminal, the second main terminal will be referred to as a source terminal, and the control terminal will be referred to as a gate terminal.

[0091] The drain terminal of the switching element Q7 is electrically connected to the drain terminal of the switching element Q1. The gate terminal of the switching element Q7 is electrically connected to the control circuit 70. The source terminal of the switching element Q7 is electrically connected to a first end of the primary winding N1 of the transformer Tr1. That is, the first end of the primary winding N1 of the transformer Tr1 is electrically connected to the connection point 5c between the switching elements Q7 and Q8. The source terminal of the switching element Q7 is electrically connected to the drain terminal of the switching element Q8. The gate terminal of the switching element Q8 is electrically connected to the control circuit 70. The source terminal of the switching element Q8 is electrically connected to the source terminal of the switching element Q2. The gate terminals of the switching elements Q1 to Q6 are electrically connected to the control circuit 70.

[0092] (2) Control Circuit The control circuit 70 controls the two switching elements Q1 and Q2 in the first inverter 80, similar to the control circuit 50 in the converter device A1 of the first embodiment. The control circuit 70 also controls the two switching elements Q7 and Q8 in the first inverter 80. That is, the control circuit 70 controls four switching elements Q1, Q2, Q7, and Q8. Similarly to the control circuit 50, the control circuit 70 outputs control signals S1 to S6 to the switching elements Q1 to Q6. The control signal S7 also outputs a control signal S7 to the switching element Q7. The control signal S7 is a signal for controlling the switching element Q7 of the first inverter 80. More specifically, the control signal S7 is a signal for switching the switching element Q7 between an ON state and an OFF state. As shown in FIG. 10 , the control signal S7 is, for example, a pulse-shaped signal (e.g., a PWM signal). The duty cycle of the control signal S7 is, for example, 50%. The control circuit 70 also outputs a control signal S8 to the switching element Q8. The control signal S8 is a signal for controlling the switching element Q8 of the first inverter 80. More specifically, the control signal S8 is a signal for switching the switching element Q8 between an ON state and an OFF state. As shown in FIG. 10 , the control signal S8 is, for example, a pulse-shaped signal (e.g., a PWM signal). The duty of the control signal S8 is, for example, 50%. That is, the control circuit 70 controls the first inverter 80 so that the duties of the four switching elements Q1, Q2, Q7, and Q8 in the first inverter 80 are the same.

[0093] The control circuit 70 synchronizes the control signals S1, S2, S7, and S8, and outputs the control signals S1, S2, S7, and S8 to the first inverter 80. Similarly to the control circuit 50, the control circuit 70 outputs the control signals S1 and S2 to the first inverter 80 so that the control signals S1 and S2 have a trade-off relationship. The control circuit 70 also outputs the control signals S7 and S8 to the first inverter 80 so that the control signals S7 and S8 have a trade-off relationship. In other words, the configuration in which the control circuit 70 outputs the control signals S7 and S8 to the first inverter 80 is the same as the configuration in which the control circuit 70 outputs the control signals S1 and S2 to the first inverter 80. Therefore, the control circuit 70 has circuit blocks of the first processing unit 51 (see FIG. 2), the control unit 52, the first generating unit 53, and the first NOT circuit 67 for the control signals S1 and S2, and further has the above-mentioned circuit block for the control signals S7 and S8. In other words, the control circuit 70 has two of the above-mentioned circuit blocks: a circuit block for the control signals S1 and S2, and a circuit block for the control signals S7 and S8.

[0094] The control circuit 70 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 in the second inverter 40 change based on the voltage value of the input voltage Vin from the AC power supply 90. In the present embodiment, the control circuit 70 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 in the second inverter 40 change based on the voltage value of the output voltage Va of the rectifier 20.

[0095] Specifically, as shown in Fig. 11 , the control circuit 70 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 to the second inverter 40 is minimized when the voltage value of the output voltage Va of the rectifier 20 is minimum (zero in the example of Fig. 11 ). In other words, the control circuit 70 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 are minimized (e.g., 0%) when the voltage value of the output voltage Va of the rectifier 20 is minimum. Furthermore, the control circuit 70 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 to the second inverter 40 is maximized when the voltage value of the output voltage Va of the rectifier 20 is maximum (Vap in the example of Fig. 11 ). In other words, the control circuit 70 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 become maximum (e.g., 32% when the variable m1 is 0.32) when the voltage value of the output voltage Va of the rectifier 20 is maximum. That is, the control circuit 70 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 change from minimum to maximum when the voltage value of the output voltage Va of the rectifier 20 changes from minimum to maximum. In other words, the control circuit 70 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 of the second inverter 40 changes from minimum to maximum when the voltage value of the output voltage Va of the rectifier 20 changes from minimum to maximum. Furthermore, the control circuit 70 controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 change from maximum to minimum when the voltage value of the output voltage Va of the rectifier 20 changes from maximum to minimum. In other words, when the voltage value of the output voltage Va of the rectifier 20 changes from a maximum value to a minimum value, the control circuit 70 controls the second inverter 40 so that the pulse width P2 of the input voltage V2 of the second inverter 40 changes from a maximum value to a minimum value. More specifically, like the control circuit 50 of the first embodiment, the control circuit 70 controls the second inverter 40 so as to satisfy the condition of equation (1). Note that the output waveform of the input voltage V2 of the second inverter 40 in FIG. 11 is illustrated schematically to explain the change in the pulse width P2, and may not be the same as the actual output waveform.

[0096] (3) Effects The converter device A2 according to the third embodiment includes the rectifier 20, the capacitor C5, the first inverter 80, the transformer Tr1, the inductor Ld, the second inverter 40, and the control circuit 70. Therefore, the converter device A2 can control the output voltage Vo of the output filter C4 while performing PFC control on the input current Ia (see FIG. 9 ) of the first inverter 80. Therefore, the converter device A2 can also achieve high efficiency.

[0097] The control circuit 70 controls the first inverter 80 so that the duties of the four switching elements Q1, Q2, Q7, and Q8 of the first inverter 80 are the same. The control circuit 70 also controls the second inverter 40 so that the duties of the four switching elements Q3 to Q6 of the second inverter 40 change based on the voltage value of the input voltage Vin (AC voltage) from the AC power supply 90. Therefore, the converter device A2 can also control the output voltage Vo of the output filter C4 while performing PFC control on the input current Ia of the first inverter 80, thereby making it possible to improve the power factor, thereby achieving a high power factor and high efficiency.

[0098] (4) Modifications As a modification of the third embodiment, modifications similar to those of the converter device A1 according to the modification of the first embodiment are possible. Therefore, the converter device A2 according to the modification of the third embodiment also achieves the same effects as the converter device A2 according to the third embodiment.

[0099] The control circuit 70 may have the same function as the control circuit 50 in the converter device A1 of embodiment 1. For example, the control circuit 70 may output four control signals S1, S2, S7, and S8 (first control signals) such that the first control signals have a phase difference δ1 with respect to two control signals S3 and S4 (second control signals).

[0100] Furthermore, the control circuit 70 may include the nonlinear compensation unit 62 of the control circuit 50 of embodiment 2. As a result, in the converter device A2 according to the modified example, for example, when there is a fluctuation in the load 100 (load fluctuation), it is possible to suppress fluctuations in the output voltage Vo of the output filter C4, and it is possible to improve the responsiveness (response speed) to fluctuations in the load 100.

[0101] The third embodiment and the modifications described above are merely a part of the various embodiments and modifications of the present disclosure.

[0102] The present disclosure is not limited to the above-described embodiments, and at least some of the configurations of the embodiments and modified examples can be combined as appropriate and applied.

[0103] (Aspects) The present specification discloses the following aspects.

[0104] A converter device (A1) according to a first aspect includes a rectifier (20), a first inverter (30), a transformer (Tr1), an inductor (Ld), a second inverter (40), and a control circuit (50). The rectifier (20) rectifies an AC voltage. The first inverter (30) includes a first series circuit (31) in which a first switching element (Q1) and a second switching element (Q2) are connected in series, and a second series circuit (32) in which a first capacitor (C2) and a second capacitor (C3) are connected in series, and the first series circuit (31) and the second series circuit (32) are connected in parallel to the rectifier (20). The transformer (Tr1) has a primary winding (N1) and a secondary winding (N2), and a first end of the primary winding (N1) is electrically connected to a connection point (5b) between the first capacitor (C2) and the second capacitor (C3) of the first inverter (30). The inductor (Ld) has one end electrically connected to a second end of the primary winding (N1) of the transformer (Tr1) and the other end electrically connected to a connection point (5a) between the first switching element (Q1) and the second switching element (Q2) of the first inverter (30). The second inverter (40) includes a pair of input terminals (6a, 6b), a pair of output terminals (7a, 7b), and at least two switching elements (Q4, Q6), and the secondary winding (N2) of the transformer (Tr1) is electrically connected between the pair of input terminals (6a, 6b). The control circuit (50) controls the first inverter (30) and the second inverter (40). The capacitance of the first capacitor (C2) is set so that the resonant frequency between the first capacitor (C2) and the inductor (Ld) is lower than both the switching frequencies of the first switching element (Q1) and the second switching element (Q2) and the switching frequency of at least two switching elements (Q4, Q6) of the second inverter (40). The capacitance of the second capacitor (C3) is set so that the resonant frequency between the second capacitor (C3) and the inductor (Ld) is lower than both of the switching frequencies.

[0105] According to this aspect, it is possible to control the output voltage (Vo) of the output filter (C4) while performing PFC control on the input current (Ia) of the first inverter (30), thereby achieving high efficiency.

[0106] A converter device (A2) according to a second aspect includes a rectifier (20), a first inverter (80), a transformer (Tr1), an inductor (Ld), a second inverter (40), and a control circuit (70). The rectifier (20) rectifies an AC voltage. The first inverter (80) includes a capacitor (C5) connected in parallel to the rectifier (20), a first series circuit (31) in which a first switching element (Q1) and a second switching element (Q2) are connected in series, and a second series circuit (33) in which a third switching element (Q7) and a fourth switching element (Q8) are connected in series, all of which are connected in parallel to the rectifier (20). The transformer (Tr1) has a primary winding (N1) and a secondary winding (N2), and a first end of the primary winding (N1) is electrically connected to a connection point (5c) between the third switching element (Q7) and the fourth switching element (Q8) of the first inverter (80). The inductor (Ld) has one end electrically connected to a second end of the primary winding (N1) of the transformer (Tr1) and the other end electrically connected to a connection point (5a) between the first switching element (Q1) and the second switching element (Q2) of the first inverter (80). The second inverter (40) includes a pair of input terminals (6a, 6b), a pair of output terminals (7a, 7b), and at least two switching elements (Q4, Q6), and the secondary winding (N2) of the transformer (Tr1) is electrically connected between the pair of input terminals (6a, 6b). The control circuit (70) controls the first inverter (80) and the second inverter (40).

[0107] According to this aspect, it is possible to control the output voltage (Vo) of the output filter (C4) while performing PFC control on the input current (Ia) of the first inverter (80), thereby achieving high efficiency.

[0108] A converter device (A1; A2) according to a third aspect is the converter device of the first or second aspect, wherein a control circuit (50; 70) controls the first inverter (30; 80) so that the duties of a plurality of switching elements including at least a first switching element (Q1) and a second switching element (Q2) in the first inverter (30; 80) are the same. The control circuit (50; 70) also controls the second inverter (40) so that the duties of at least two switching elements (Q4, Q6) of the second inverter (40) change based on the voltage value of the AC voltage.

[0109] According to this aspect, the output voltage (Vo) of the output filter (C4) can be controlled while PFC-controlling the input current (Ia) of the first inverter (30), thereby making it possible to improve the power factor, thereby achieving a high power factor and high efficiency.

[0110] In a converter device (A1; A2) according to a fourth aspect, in the third aspect, the control circuit (50:70) controls the second inverter (40) so that the duties of at least two switching elements (Q4, Q6) change from a minimum value to a maximum value when the absolute value of the voltage value of the AC voltage changes from a minimum value to a maximum value. Also, the control circuit (50:70) controls the second inverter (40) so that the duties of at least two switching elements (Q4, Q6) change from a maximum value to a minimum value when the absolute value of the voltage value of the AC voltage changes from a maximum value to a minimum value.

[0111] According to this aspect, the output voltage (Vo) of the output filter (C4) can be controlled while PFC-controlling the input current (Ia) of the first inverter (30), thereby making it possible to improve the power factor, thereby achieving a high power factor and high efficiency.

[0112] A converter device (A1; A2) according to a fifth aspect is the converter device of the third or fourth aspect, wherein a control circuit (50; 70) outputs first control signals (respective control signals S1, S2, S7, S8) for controlling the plurality of switching elements in the first inverter (30; 80) to the plurality of switching elements, and outputs second control signals (respective control signals S4, S6) for controlling at least two switching elements (Q4, Q6) of the second inverter (40) to at least two switching elements (Q4, Q6). The control circuit (50; 70) outputs the first control signal and the second control signal such that the first control signal has a phase difference (δ1) with respect to the second control signal.

[0113] According to this aspect, the output voltage (Vo) of the output filter (C4) can be further controlled, so that the power factor can be further improved, and it is possible to further achieve a high power factor and high efficiency.

[0114] A converter device (A1; A2) according to a sixth aspect is the converter device (A1; A2) of any one of the third to fifth aspects, wherein the voltage values ​​of the voltage (V2) across the secondary winding (N2) of the transformer (Tr1) include a first voltage value, a second voltage value, and a third voltage value. The second voltage value is greater than the first voltage value. The third voltage value is greater than the second voltage value. The control circuit (50; 70) controls the second inverter (40) so that the current value of the current (I1) flowing through the primary winding (N1) of the transformer (Tr1) is equal to or less than zero when the voltage value of the voltage (V1) between a first end of the primary winding (N1) of the transformer (Tr1) and the other end of the inductor (Ld) is zero and when the voltage value of the voltage (V2) across the secondary winding (N2) changes from the third voltage value to the second voltage value.

[0115] According to this aspect, the current value (effective current value) of the current flowing through the primary winding (N1) of the transformer (Tr1) can be reduced, thereby achieving higher efficiency, and therefore, according to this aspect, it is possible to further achieve a higher power factor and higher efficiency.

[0116] The converter device (A1; A2) according to a seventh aspect is the converter device (A1; A2) of the fifth aspect, further comprising an output filter (C4). The output filter (C4) is electrically connected between a pair of output terminals (7a, 7b) of the second inverter (40). The control circuit (50; 70) determines a phase difference (δ1) based on an output voltage (Vo) of the output filter (C4).

[0117] According to this aspect, the output voltage (Vo) of the output filter (C4) can be controlled with high precision, which makes it possible to further improve the power factor, thereby achieving even higher power factor and efficiency.

[0118] The converter device (A1; A2) according to the eighth aspect is the seventh aspect, wherein the control circuit (50; 70) has a nonlinear compensation section (62) that linearizes the relationship between the output voltage (Vo) and the phase difference (δ1).

[0119] According to this aspect, the relationship between the output voltage (Vo) of the output filter (C4) and the phase difference (δ1) can be made linear, making it easier to control the output voltage (Vo) of the output filter (C4). Therefore, according to this aspect, for example, when there is a load fluctuation, the fluctuation of the output voltage (Vo) of the output filter (C4) can be suppressed, thereby improving the responsiveness (response speed) to fluctuations in the load (100).

[0120] 5a Connection point 5b Connection point 5c Connection point 6a Input terminal 6b Input terminal 7a Output terminal 7b Output terminal 20 Rectifier 30 First inverter 31 Series circuit (first series circuit) 32 Series circuit (second series circuit) 33 Series circuit (second series circuit) 40 Second inverter 50 Control circuit 70 Control circuit 80 First inverter A1 Converter device A2 Converter device C2 Capacitor (first capacitor) C3 Capacitor (second capacitor) C4 Capacitor (output filter) I1 Current Ld Inductor N1 Primary winding N2 Secondary winding Q1 Switching element (first switching element) Q2 Switching element (second switching element) Q7 Switching element (third switching element) Q8 Switching element (fourth switching element) Q4 Switching element Q6 Switching element S1 Control signal (first control signal) S2 Control signal (first control signal) S4 Control signal (second control signal) S6 Control signal (second control signal) S7 Control signal (first control signal) S8 Control signal (first control signal) Tr1 Transformer V1 Output voltage (voltage between the first end of the transformer primary winding and the other end of the inductor) V2 Input voltage (voltage between both ends) Vo Output voltage δ1 Phase difference

Claims

1. A power supply comprising: a rectifier for rectifying AC voltage; a first inverter in which a first series circuit in which a first switching element and a second switching element are connected in series and a second series circuit in which a first capacitor and a second capacitor are connected in series are connected in parallel, the first series circuit and the second series circuit being connected in parallel to the rectifier; a transformer having a primary winding and a secondary winding, the first end of the primary winding being electrically connected to a connection point of the first capacitor and the second capacitor of the first inverter; an inductor having one end electrically connected to a second end of the primary winding of the transformer and the other end electrically connected to a connection point of the first switching element and the second switching element of the first inverter; a second inverter including a pair of input ends, a pair of output ends, and at least two switching elements, the secondary winding of the transformer being electrically connected between the pair of input ends; and a control circuit for controlling the first inverter and the second inverter, A converter device, wherein the capacitance of the first capacitor is set so that a resonant frequency between the first capacitor and the inductor is lower than both a switching frequency of the first switching element and the second switching element and a switching frequency of the at least two switching elements of the second inverter, and the capacitance of the second capacitor is set so that a resonant frequency between the second capacitor and the inductor is lower than both of the switching frequencies.

2. A converter device comprising: a rectifier that rectifies AC voltage; a capacitor connected in parallel to the rectifier; a first inverter in which a first series circuit in which a first switching element and a second switching element are connected in series and a second series circuit in which a third switching element and a fourth switching element are connected in series are connected in parallel; a transformer having a primary winding and a secondary winding, wherein a first end of the primary winding is electrically connected to a connection point of the third switching element and the fourth switching element of the first inverter; an inductor having one end electrically connected to a second end of the primary winding of the transformer and the other end electrically connected to a connection point of the first switching element and the second switching element of the first inverter; a second inverter including a pair of input ends, a pair of output ends, and at least two switching elements, wherein the secondary winding of the transformer is electrically connected between the pair of input ends; and a control circuit that controls the first inverter and the second inverter.

3. The converter device according to claim 1 or 2, wherein the control circuit controls the first inverter so that the duties of a plurality of switching elements including at least the first switching element and the second switching element in the first inverter are the same, and controls the second inverter so that the duties of the at least two switching elements of the second inverter change based on the voltage value of the AC voltage.

4. The converter device according to claim 3, wherein the control circuit controls the second inverter so that the duties of the at least two switching elements change from a minimum value to a maximum value when the absolute value of the voltage value of the AC voltage changes from a minimum value to a maximum value, and controls the second inverter so that the duties of the at least two switching elements change from the maximum value to the minimum value when the absolute value of the voltage value of the AC voltage changes from the maximum value to the minimum value.

5. The converter device according to claim 3 or 4, wherein the control circuit outputs a first control signal to the plurality of switching elements in the first inverter for controlling the plurality of switching elements, and outputs a second control signal to the at least two switching elements in the second inverter for controlling the at least two switching elements, and outputs the first control signal and the second control signal so that the first control signal has a phase difference with respect to the second control signal.

6. A converter device according to any one of claims 3 to 5, wherein the voltage values ​​of the voltage across the secondary winding of the transformer include a first voltage value, a second voltage value greater than the first voltage value, and a third voltage value greater than the second voltage value, and the control circuit controls the second inverter so that the current value of the current flowing through the primary winding of the transformer is equal to or less than zero when the voltage value of the voltage between the first end of the primary winding of the transformer and the other end of the inductor is zero and when the voltage value of the voltage across the secondary winding changes from the third voltage value to the second voltage value.

7. The converter device according to claim 5, further comprising an output filter electrically connected between the pair of output terminals of the second inverter, wherein the control circuit determines the phase difference based on an output voltage of the output filter.

8. The converter device according to claim 7, wherein the control circuit has a nonlinear compensation section that makes the relationship between the output voltage and the phase difference linear.

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