Amplifier, signal processing circuit and communication system

Abstract

The present application is applied in the technical field of chips. Provided are an amplifier, a signal processing circuit and a communication system, so as to solve the problems of the area of a chip being large and the noise and linearity performances of a link deteriorating easily that are caused when temperature compensation is performed on an amplifier. The amplifier comprises an amplification circuit and a transistor, wherein a first electrode of the transistor may be connected to an input end of the amplification circuit, and a second electrode of the transistor is grounded; alternatively, the first electrode of the transistor is connected to an output end of the amplification circuit, and the second electrode of the transistor is grounded; alternatively, the first electrode of the transistor is used for inputting a signal, and the second electrode of the transistor is connected to the input end of the amplification circuit; or alternatively, the first electrode of the transistor is connected to the output end of the amplification circuit, and the second electrode of the transistor is used for outputting a signal; and a control electrode of the transistor is used for inputting a control signal, and the control signal changes as the temperature of the amplifier changes. On this basis, when temperature compensation is performed on an amplifier, gain adjustment can be implemented by means of a transistor.

Description

Amplifier, signal processing circuit and communication system

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on March 7, 2024, with application number 202410266225.5 and application name “An amplifier, signal processing circuit and communication system”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of chip technology, and in particular to an amplifier, a signal processing circuit, and a communication system. Background Art

[0003] Many existing communication devices are equipped with signal processing circuits (such as transmitting circuits and receiving circuits). Among them, in order to improve signal strength and signal quality, various types of amplifiers are usually set in the signal processing circuit, such as low noise amplifiers (LNA), power amplifiers (PA), etc. However, the gain performance of the amplifier is easily affected by temperature, resulting in gain temperature drift problems. Therefore, it is necessary to improve the gain temperature drift of the signal processing circuit by setting a temperature compensation circuit. At present, many solutions are to improve the gain temperature drift problem of the amplifier by adjusting the resistance value of the feedback circuit or setting a voltage-controlled variable attenuation circuit. However, the above solution must set a feedback circuit or add an additional attenuation circuit, which not only increases the chip area, but also easily deteriorates the noise and linearity performance of the link. Therefore, it is urgent to provide a solution to solve the above problems. Summary of the Invention

[0004] The present application provides an amplifier, a signal processing circuit, and a communication system to solve the problems of large chip area and easy deterioration of link noise and linearity performance caused by temperature compensation of the amplifier.

[0005] In order to solve the above problems, the technical solutions provided in the embodiments of the present application are as follows.

[0006] In a first aspect, an amplifier is provided, comprising an amplifier circuit and a transistor. The first electrode of the transistor is used to input a signal, and the second electrode of the transistor is connected to the input terminal of the amplifier circuit. Alternatively, the first electrode of the transistor is connected to the output terminal of the amplifier circuit, and the second electrode of the transistor is used to output a signal. The control electrode of the transistor is used to input a control signal, and the control signal varies with the temperature of the amplifier. When the transistor is in the on state, its resistance is related to the input voltage of the control electrode. When the voltage of the control electrode increases, the resistance of the transistor decreases. Conversely, when the voltage of the control electrode decreases, the resistance of the transistor increases. Based on this, the transistor can be used as a variable resistor, and the resistance of the transistor can be adjusted by adjusting the voltage applied to the control electrode of the transistor to change the impedance of the amplifier. When temperature compensation of the amplifier is required, the control circuit can output a corresponding control signal to the control electrode of the transistor based on acquired temperature data to adjust the resistance of the transistor. When the resistance of the transistor changes, the strength of the input signal or output signal of the amplifier circuit also changes. Therefore, the resistance of the transistor can be adjusted according to actual needs, thereby adjusting the gain of the amplifier circuit to improve the gain temperature drift. In addition, the above method only requires setting transistors inside the amplifier, and there is no need to add a feedback circuit or a voltage-controlled variable attenuation circuit outside the amplifier. While reducing the wiring area, it avoids the problem of deteriorating the noise and linear performance of the link caused by adding a feedback circuit or a voltage-controlled variable attenuation circuit.

[0007] In one possible implementation, the amplifier further includes a first resistor. The first resistor is connected in series with the first or second terminal of the transistor. Alternatively, the first resistor is connected in parallel between the first and second terminals of the transistor. In this manner, the first resistor can be used to adjust the impedance of the amplifier circuit in scenarios where a high or low impedance requirement is desired, thereby better meeting the requirements of actual use scenarios.

[0008] In one possible implementation, the amplifier further includes a second resistor connected in series with a control electrode of the transistor. The second resistor can provide current limiting protection for the control electrode of the transistor to avoid damage to the transistor.

[0009] In one possible implementation, the amplifier further includes an input impedance matching circuit. The input end of the input impedance matching circuit is used to receive an input signal, and the first terminal of the transistor is connected to the output end of the input impedance matching circuit. Alternatively, the input end of the input impedance matching circuit is connected to the second terminal of the transistor. The output end of the input impedance matching circuit is connected to the input end of the amplifier circuit. Based on the connection between the input end of the amplifier circuit and the transistor, the input impedance matching circuit can be used to suppress harmonics of the signal input to the amplifier circuit in scenarios where harmonic suppression is required, thereby improving the quality of the signal input to the amplifier circuit.

[0010] In one possible implementation, the amplifier further includes an output impedance matching circuit. The input of the output impedance matching circuit is connected to the output of the amplifier circuit, and the output of the output impedance matching circuit is used to output a signal. The output impedance matching circuit can be used to suppress harmonics in the signal output by the amplifier circuit in scenarios where harmonic suppression is required, thereby improving the quality of the signal output by the amplifier.

[0011] In one possible implementation, the amplifier further includes an output impedance matching circuit. The output of the output impedance matching circuit is configured to output a signal, and the second terminal of the transistor is connected to the input of the output impedance matching circuit. Alternatively, the input of the output impedance matching circuit is connected to the output of the amplifier circuit, and the output of the output impedance matching circuit is connected to the first terminal of the transistor. In addition to the connection between the input of the amplifier circuit and the transistor, the output impedance matching circuit can be used to suppress harmonics in the signal output by the amplifier circuit in scenarios where harmonic suppression is required, thereby improving the quality of the signal output by the amplifier.

[0012] In one possible implementation, the amplifier further includes an input impedance matching circuit. The output of the input impedance matching circuit is connected to the input of the amplifier circuit, and the input of the output impedance matching circuit is used to receive an input signal. The input impedance matching circuit can be used to suppress harmonics of the signal input to the amplifier circuit in scenarios where harmonic suppression is required, thereby improving the quality of the signal input to the amplifier circuit.

[0013] In a second aspect, an amplifier is provided, comprising an amplifier circuit and a transistor. A first electrode of the transistor is connected to an input terminal of the amplifier circuit, and a second electrode of the transistor is grounded; alternatively, the first electrode of the transistor is connected to an output terminal of the amplifier circuit, and a second electrode of the transistor is grounded. A control electrode of the transistor is used to input a control signal, and the control signal varies with the temperature of the amplifier.

[0014] In one possible implementation, the amplifier further includes a first resistor connected in series with the first electrode or the second electrode of the transistor, or connected in parallel between the first electrode and the second electrode of the transistor.

[0015] In a possible implementation, the amplifier further includes a second resistor, wherein the second resistor is connected in series with the control electrode of the transistor.

[0016] In one possible implementation, the amplifier further includes an input impedance matching circuit. The input terminal of the input impedance matching circuit is used to input a signal, and the first terminal of the transistor is connected to the input terminal of the input impedance matching circuit; the output terminal of the input impedance matching circuit is connected to the input terminal of the amplifier circuit. Alternatively, the input terminal of the input impedance matching circuit is used to input a signal, and the output terminal of the input impedance matching circuit is connected to the first terminal of the transistor and the input terminal of the amplifier circuit, respectively.

[0017] In a possible implementation, the amplifier further includes an output impedance matching circuit, wherein an input end of the output impedance matching circuit is connected to an output end of the amplifier circuit, and an output end of the output impedance matching circuit is used to output a signal.

[0018] In one possible implementation, the amplifier further includes an output impedance matching circuit. The output end of the output impedance matching circuit is configured to output a signal, and the first terminal of the transistor is connected to the output end of the output impedance matching circuit. The input end of the output impedance matching circuit is connected to the output end of the amplifier circuit. Alternatively, the output end of the output impedance matching circuit is configured to output a signal, and the input end of the output impedance matching circuit is connected to the first terminal of the transistor and the input end of the amplifier circuit, respectively.

[0019] In a possible implementation, the amplifier further includes an input impedance matching circuit, wherein the input end of the output impedance matching circuit is used to input a signal, and the output end of the output impedance matching circuit is connected to the input end of the amplifier circuit.

[0020] In a third aspect, a signal processing circuit is provided, including a transmitting circuit and / or a receiving circuit. The transmitting circuit and / or the receiving circuit include at least one amplifier according to any possible implementation of the first aspect.

[0021] In a fourth aspect, a communication system is provided, which includes a temperature detection circuit, a control circuit coupled to the temperature detection circuit, and the signal processing circuit of the third aspect coupled to the control circuit.

[0022] The technical effects brought about by the above-mentioned second to fourth aspects and possible implementation methods can be found in the description of the technical effects brought about by the above-mentioned first aspect and possible implementation methods, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG1 is a schematic structural diagram of a communication system;

[0024] FIG2 is a schematic diagram of the structure of a single signal processing circuit;

[0025] FIG3 is a schematic diagram of the structure of a phased array system;

[0026] FIG4 is a structural diagram 1 of an amplifier provided in an embodiment of the present application;

[0027] FIG5 is a second structural diagram of an amplifier provided in an embodiment of the present application;

[0028] FIG6 is a third structural diagram of an amplifier provided in an embodiment of the present application;

[0029] FIG7 is a fourth structural diagram of an amplifier provided in an embodiment of the present application;

[0030] FIG8 is a fifth structural diagram of an amplifier provided in an embodiment of the present application;

[0031] FIG9 is a sixth structural diagram of an amplifier provided in an embodiment of the present application;

[0032] FIG10 is a seventh structural diagram of an amplifier provided in an embodiment of the present application;

[0033] FIG11 is a structural schematic diagram 8 of an amplifier provided in an embodiment of the present application;

[0034] FIG12 is a ninth structural diagram of an amplifier provided in an embodiment of the present application;

[0035] FIG13 is a structural diagram 10 of an amplifier provided in an embodiment of the present application;

[0036] FIG14 is a structural diagram 11 of an amplifier provided in an embodiment of the present application;

[0037] FIG15 is a structural diagram 12 of an amplifier provided in an embodiment of the present application;

[0038] FIG16 is a structural diagram 13 of an amplifier provided in an embodiment of the present application;

[0039] FIG17 is a structural schematic diagram 14 of an amplifier provided in an embodiment of the present application;

[0040] FIG18 is a structural schematic diagram 15 of an amplifier provided in an embodiment of the present application;

[0041] FIG19 is a structural schematic diagram 16 of an amplifier provided in an embodiment of the present application;

[0042] FIG20 is a structural schematic diagram of an amplifier provided in an embodiment of the present application;

[0043] FIG21 is a structural schematic diagram 18 of an amplifier provided in an embodiment of the present application;

[0044] FIG22 is a schematic structural diagram of a signal processing circuit provided in an embodiment of the present application;

[0045] FIG23 is a schematic structural diagram of a phased array system provided in an embodiment of the present application;

[0046] FIG24 is a schematic flow chart of an operating method of a phased array system provided in an embodiment of the present application;

[0047] Figure 25 is a structural diagram of a communication system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0049] In the present application, "at least one" refers to one or more, and "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can represent: a, b, c, a and b, a and c, b and c or a, b and c, where a, b and c can be single or multiple. In addition, in the embodiments of the present application, words such as "first" and "second" do not limit the quantity and order.

[0050] It should be noted that, in this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0051] The present application is described in detail below with reference to the accompanying drawings and embodiments:

[0052] With the continuous development of communication technology, as shown in Figure 1, many communication systems 100 are equipped with a signal processing circuit 110 coupled between a baseband processor 120 and an antenna 130. The signal processing circuit 110 generally includes multiple devices connected in series, each of which amplifies or attenuates the signal passing through the signal processing circuit 110. The gain of the devices in the signal processing circuit 110 for the signal generally decreases with increasing temperature. The ambient temperature and operating power consumption of the signal processing circuit 110 inevitably vary during operation, resulting in a large temperature fluctuation range for the signal processing circuit 110 during operation. This causes the gain of the signal processing circuit 110 to fluctuate significantly under low and high temperature conditions, thereby affecting the stability of the signal processing of the signal processing circuit 110. In particular, when the signal processing circuit 110 processes microwave signals, the impact of temperature changes on the gain of the signal processing circuit 110 is even more significant. In this application, the signal processing circuit 110 may include a receiving circuit and / or a transmitting circuit. Those skilled in the art should know that a receiving circuit generally includes components such as a low-noise amplifier (LNA), a variable gain amplifier (VGA), and other types of amplifiers (AMP) connected in series, which are used to amplify the signal received by the antenna and then provide it to the modem for processing. A transmitting circuit generally includes components such as a power amplifier (PA), a variable gain amplifier VGA, and other types of amplifiers AMP connected in series, which are used to amplify the signal to be transmitted and then transmit it through the antenna. Among them, the various components in the signal processing circuit 110 can be set on the same semiconductor device (for example, the same semiconductor chip), or on different semiconductor devices (for example, different semiconductor chips), and the embodiments of the present application do not impose specific limitations on this.

[0053] To reduce the impact of temperature changes on the gain of a signal processing circuit, the signal processing circuit needs to be temperature compensated. To achieve temperature compensation for a signal processing circuit, various temperature compensation schemes can be used. For example, as shown in FIG2 , taking a single signal processing circuit 200 as an example, a feedback resistor circuit 220 with an adjustable resistance value can be provided for the amplifier 210 in the signal processing circuit 200 to perform temperature compensation for the amplifier 210, thereby improving the gain temperature drift of the amplifier 210 and achieving temperature compensation for the entire signal processing circuit 200. In this scheme, a bias circuit 230, a control circuit 240, and a feedback resistor circuit 220 are generally provided for the amplifier 210 in the signal processing circuit 200. The bias circuit 230, control circuit 240, and feedback resistor circuit 220 can be provided on the same semiconductor device as the amplifier 210 or on different semiconductor devices. The bias circuit 230 is coupled to the input terminal RFin of the amplifier 210 to provide a bias voltage to maintain a suitable operating point for the amplifier 210 during operation. Feedback resistor circuit 220 is coupled to input terminal RFin and output terminal RFout of amplifier 210, respectively, and is used to transmit a feedback signal to input terminal RFin of amplifier 210 based on the signal output from the output terminal of amplifier 210. The feedback resistor of feedback resistor circuit 220 is typically a metal-oxide-semiconductor field-effect transistor (MOSFET), also known as a MOS transistor. Control circuit 240 can adjust the gate voltage of the MOS transistor based on acquired temperature data to change the resistance of feedback resistor circuit 220, thereby varying the strength of the feedback signal and achieving gain compensation for amplifier 210. However, this solution requires the provision of feedback resistor circuit 220. Changes in the feedback depth of feedback resistor circuit 220 can affect the characteristics of the amplifier itself, causing significant variations in the matching characteristics of the input impedance matching circuit and output impedance matching circuit within amplifier 210 at different temperatures. This variation may affect the matching and even linearity performance of the circuit. Furthermore, the above solution increases wiring area and cost.

[0054] For example, as shown in FIG3 , taking a phased array system 300 as an example, the phased array system 300 generally includes a phased array channel 310, a signal distribution channel 320 coupled to the phased array channel 310, and a combining channel 330 coupled to the signal distribution channel 320. The phased array channel 310 includes multiple transceiver circuits 311, each of which is coupled to an antenna 340 at one end and to one end of the combining channel 330 at the other end. Each transceiver circuit 311 corresponds to a transceiver channel of the phased array system 300 (e.g., channel 0 to channel N in FIG3 ). The signal distribution channel 320 is generally composed of multiple cascaded power dividers, which are used to exchange signals between the phased array channel 310 and the combining channel 330. During signal transmission, the signal distribution channel 320 can distribute the signal output by the combining channel 330 to each of the transceiver circuits 311, and each transceiver circuit 311 amplifies the signal. During signal reception, the signal distribution path 320 combines signals received by the various transceiver circuits 311, both within and across frequency bands, and transmits them to the combining path 330 for subsequent processing. Each transceiver circuit 311 is connected to an antenna 340 and can transmit or receive signals. When the transceiver circuit 311 functions as a receiving channel, the receiving channel typically includes a low-noise amplifier (LNA), a variable-gain amplifier (VGA), other types of amplifiers (AMP), and a phase shifter. Each transceiver circuit 311 amplifies and phase-adjusts the signal received by its connected antenna 340 and transmits the adjusted signal to the signal distribution path 320. The signal distribution path 320 combines the received signals and inputs them into the combining path 330. When the transceiver circuit 311 functions as a transmitting channel, the transmitting channel typically includes a power amplifier (PA), a variable-gain amplifier (VGA), other types of amplifiers (AMP), and a phase shifter. The signal distribution path 320 splits the signals in the combining path 330 and outputs each split signal to a different transceiver circuit 311. Each transceiver circuit 311 performs phase adjustment and amplification on the received signal and then transmits it through the antenna 340 connected to it. Considering that the transceiver circuit 311 generally includes a receiving path as a receiving channel and a transmitting path as a transmitting channel, in order to perform temperature compensation on the signal processing circuit, a single or multiple-stage voltage-controlled variable attenuation circuit can be inserted between two elements in the receiving path and / or the transmitting path. Alternatively, a voltage-controlled variable attenuation circuit can be inserted into the combining path 330. This voltage-controlled variable attenuation circuit can control the attenuation value of the currently transmitted signal through a voltage signal output by the control circuit 350 based on the acquired temperature data, thereby improving the signal's gain temperature drift.

[0055] It can be understood that FIG3 takes the transceiver circuit including LNA / PA, VGA and phase shifter as an example. In actual applications, the transceiver circuit may also include other components, which will not be described in detail in the embodiment of the present application.

[0056] While this approach can improve signal gain temperature drift, it requires adding a voltage-controlled variable attenuator circuit to the transceiver circuit or to the combiner path, increasing the circuit area. Furthermore, for higher frequencies, the parasitic capacitance of the attenuator itself cannot be ignored, requiring the use of a large-area inductor.

[0057] To better address the above-mentioned issues, as shown in FIG4 , an embodiment of the present application provides an amplifier 400 comprising an amplifier circuit 410 and a transistor 420. The first electrode of transistor 420 is used to input a signal. The second electrode of transistor 420 is connected to the input terminal of amplifier circuit 410. Alternatively, the first electrode of transistor 420 is connected to the output terminal of amplifier circuit 410, and the second electrode of transistor 420 is used to output a signal. The control electrode of transistor 420 is used to input a control signal, and this control signal varies with the temperature of amplifier 400. In this manner, transistor 420 can be connected in series to either the input terminal or the output terminal of amplifier circuit 410. The number of input terminals of amplifier circuit 410 is the same as the number of signal input terminals of amplifier 400. When transistors 420 are connected to the input terminals of amplifier circuit 410, the number of transistors 420 can be adjusted based on the number of input terminals of amplifier circuit 410. For example, when amplifier 400 has only one signal input terminal (such as IN1 in FIG4 ), amplifier 400 has only one input terminal. In this case, the amplifier has only one transistor 420 (such as the first transistor in FIG4 ). When amplifier 400 has two signal input terminals (such as IN1 and IN2 in FIG. 4 ), amplifier 400 also has two input terminals. In this case, there are two transistors 420 (such as the first and second transistors in FIG. 4 ). Each input terminal of amplifier circuit 410 corresponds to a transistor 420. The first and second transistors can be controlled by a first control signal CK1. Furthermore, when the aforementioned transistors are connected to the output terminals of amplifier circuit 410, the number of output terminals of amplifier circuit 410 is the same as the number of signal output terminals of amplifier 400, and the number of transistors 420 can be adjusted based on the number of output terminals of amplifier circuit 410. For example, when amplifier 400 has only one signal output terminal (i.e., OUT1 in FIG. 4 ), amplifier circuit 410 has one output terminal, and only one transistor 420 is connected to the output terminal of amplifier circuit 410 (i.e., the third transistor in FIG. 4 ). When amplifier 400 has two signal output terminals (i.e., OUT1 and OUT2 in FIG. 4 ), amplifier circuit 410 has two output terminals (i.e., the third and fourth transistors in FIG. 4 ). In this case, each output terminal of amplifier circuit 410 corresponds to a transistor 420. The third transistor and the fourth transistor can be controlled by the second control signal CK2. The amplifier 400 can be any one of an LNA, a VGA, a PA, and an AMP, and the present embodiment does not impose any specific restrictions thereon. When temperature compensation is required for the amplifier 400, a corresponding control signal can be output to the control electrode of the transistor 420 according to the acquired temperature data through the control circuit to adjust the resistance value of the transistor 420. When the resistance value of the transistor 420 changes, the strength of the input signal or output signal of the amplifier circuit 410 will also change.Therefore, the resistance value of transistor 420 can be adjusted according to actual needs, thereby adjusting the gain of amplifier circuit 410 and improving the gain temperature drift of amplifier 400. In this way, it is only necessary to install transistor 420 at the input or output of amplifier circuit 410 within amplifier 400, without the need for a feedback circuit or a voltage-controlled variable attenuation circuit cascaded between amplifier 400 and other devices. This improves the gain temperature drift of amplifier circuit 410 while reducing the total area of ​​the transceiver circuit and reducing costs.

[0058] In the above implementation process, transistor 420 can be a triode or a MOS transistor. When transistor 420 is a triode, the first electrode of transistor 420 is the collector, the second electrode of transistor 420 is the emitter, and the control electrode of transistor 420 is the base. When transistor 420 is a MOS transistor, the first electrode of transistor 420 is the drain, the second electrode of transistor 420 is the source, and the control electrode of transistor 420 is the gate.

[0059] In one embodiment, as shown in FIG5 , the amplifier 400 can be a single-input amplifier. In this case, the amplifier circuit 410 within the amplifier 400 has a single input terminal, and the amplifier can include a transistor M1. The first electrode of the transistor M1 is coupled to the signal input terminal IN1 for inputting a signal. The control electrode of the transistor M1 is used to input a first control signal CK1. The second electrode of the transistor M1 is coupled to the corresponding input terminal of the amplifier circuit 410, and the output terminal of the amplifier circuit 410 is used to output a signal. In the above implementation, the transistor M1 is connected in series between the signal input terminal IN1 and the input terminal of the amplifier circuit 410. The control circuit can control the voltage of the first control signal CK1 applied to the control electrode of the transistor M1 to adjust the resistance value of the transistor M1. When the resistance value of the transistor M1 changes, the input impedance of the amplifier circuit 410 also changes, thereby adjusting the strength of the input signal to the amplifier circuit 410, thereby adjusting the gain of the amplifier 400 and achieving temperature compensation for the amplifier 400. The transistor M1 can be a triode or a MOS transistor, which is not specifically limited in this embodiment of the present application. For example, taking transistor M1 as a triode, when the triode is in the on state, if the voltage of the control signal applied to the base (i.e., the control electrode) of the triode changes, its resistance value will also change. Therefore, the relationship between the resistance value of the triode and the voltage of the control signal applied to the base can be determined through testing. At the same time, the relationship between the resistance value of the triode and the gain of the amplifier 400 when the temperature changes is determined. Then, when amplifier 400 is put into use, a control signal that varies with temperature is applied to the base of the triode through the control circuit to perform gain compensation for amplifier 400 (i.e., temperature compensation for amplifier 400). Similarly, when the triode is in the on state, if the voltage of the control signal applied to the gate (i.e., the control electrode) of a MOS transistor changes, the resistance value of the MOS transistor will also change. Therefore, when transistor M1 is a MOS transistor, a control signal that varies with temperature can also be applied to the gate of the MOS transistor through the control circuit when amplifier 400 is put into use to perform temperature compensation for amplifier 400. Of course, the amplifier 400 may also be a single-input dual-output amplifier, which is not described in detail in the present embodiment. In addition, in the above implementation process, the control circuit may be a logic control circuit composed of multiple logic devices or a processor, which is not specifically limited in the present embodiment.

[0060] In one embodiment, as also shown in FIG5 , the amplifier 400 further includes a first resistor R1. The first resistor R1 is connected in series with the first electrode or the second electrode of the transistor M1. Furthermore, the amplifier 400 may further include a second resistor Ra. The second resistor Ra is connected in series with the gate of the transistor M1. The second resistor Ra can limit the current of the control signal input to the gate of the transistor M1 to prevent damage to the transistor M1.

[0061] In one embodiment, as shown in FIG6 , a first resistor R1 can be connected in parallel between the first and second electrodes of transistor M1. The first resistor R1 can be composed of one or more resistors, or can be various components capable of functioning as resistors. In this manner, the input impedance of amplifier circuit 410 can be adjusted in scenarios where impedance requirements are high or low, to better meet the requirements of actual use scenarios.

[0062] In the above implementation, transistor M1 and first resistor R1 are merely examples provided in the embodiments of the present application. As shown in FIG7 , amplifier 400 may also include multiple transistors connected in series, and each transistor may be selectively connected in parallel and / or in series with one or more resistors. For example, transistor M1, transistor M2, and transistor M3 in FIG7 are connected in series in sequence. Resistor R1a is connected in parallel with transistor M1, and the control signal input to the control electrode of transistor M1 is CK11. Resistor R2a is connected in series with transistor M2, and the control signal input to the control electrode of transistor M2 is CK12. Resistors R3a and R4a are connected in series and then in parallel between the first and second electrodes of transistor M3, and the control signal input to the control electrode of transistor M3 is CK13. As shown in FIG8 , amplifier 400 may also include multiple transistors connected in parallel, and each transistor may be selectively connected in series with one or more resistors, or not connected in series. For example, transistor M4 in FIG8 is connected in series with resistor R4 and then in parallel with transistor M5. The control signal input to the control electrode of transistor M4 is CK14, and the control signal input to the control electrode of transistor M5 is CK15. Of course, Figures 7 and 8 are merely examples of the embodiments of the present application. In specific implementations, the transistors and resistors in amplifier 400 may be combined in any manner according to actual needs, and the embodiments of the present application do not impose any specific restrictions thereon. Furthermore, in the above implementation, the first resistor R1 may be replaced by a capacitor. The above-mentioned transistors may also be combined with capacitors and resistors in any manner, and the embodiments of the present application do not impose any specific restrictions thereon.

[0063] It is understandable that when the amplifier 400 is a dual-input amplifier, each input end of the amplifier circuit 410 in the amplifier 400 can be provided with a transistor 420 in the manner of FIG. 5 to FIG. 8 , which is not described in detail in the embodiment of the present application.

[0064] In one embodiment, as shown in FIG9 , an embodiment of the present application further provides an amplifier 400. Amplifier 400 may include an amplifier circuit 410 and a transistor 420. The first electrode of transistor 420 is used to input a signal. The second electrode of transistor 420 is connected to the input terminal of amplifier circuit 410. Alternatively, the first electrode of transistor 420 is connected to the output terminal of amplifier circuit 410, and the second electrode of transistor 420 is used to output a signal. The control electrode of transistor 420 is used to input a control signal, and this control signal varies with the temperature of amplifier 400. In this manner, transistor 420 can be connected to the input or output terminal of amplifier circuit 410 by grounding. The number of input terminals of amplifier circuit 410 is the same as the number of signal input terminals of amplifier 400. When transistors 420 are connected to the input terminals of amplifier circuit 410, the number of transistors 420 can be adjusted based on the number of input terminals of amplifier circuit 410. For example, when amplifier 400 has only one signal input terminal (such as IN1 in FIG9 ), amplifier 400 has only one input terminal. In this case, the amplifier has only one transistor 420 (such as the first transistor in FIG9 ). When amplifier 400 has two signal input terminals (such as IN1 and IN2 in FIG. 9 ), amplifier 400 also has two input terminals. In this case, there are two transistors 420 (such as the first and second transistors in FIG. 9 ). Each input terminal of amplifier circuit 410 corresponds to a transistor 420. The first and second transistors can be controlled by a first control signal CK1. Furthermore, when the aforementioned transistors are connected to the output terminals of amplifier circuit 410, the number of output terminals of amplifier circuit 410 is the same as the number of signal output terminals of amplifier 400, and the number of transistors 420 can be adjusted based on the number of output terminals of amplifier circuit 410. For example, when amplifier 400 has only one signal output terminal (i.e., OUT1 in FIG. 9 ), amplifier circuit 410 has one output terminal, and in this case, there is only one transistor 420 connected to the output terminal of amplifier circuit 410 (i.e., the third transistor in FIG. 9 ). When amplifier 400 has two signal output terminals (i.e., OUT1 and OUT2 in FIG. 9 ), amplifier circuit 410 has two output terminals (i.e., the third and fourth transistors in FIG. 9 ). In this case, each output terminal of amplifier circuit 410 corresponds to a transistor 420. The third transistor and the fourth transistor can be controlled by the second control signal CK2. The amplifier 400 can be any one of an LNA, a VGA, a PA, and an AMP, and is not specifically limited in this embodiment of the present application. The first control signal CK1 and the second control signal CK2 can be the same signal or different signals.In the above manner, when the amplifier 400 needs to be temperature compensated, the control circuit can output a corresponding control signal to the control electrode of the transistor 420 according to the acquired temperature data to adjust the resistance value of the transistor 420. When the resistance value of the transistor 420 changes, the strength of the input signal or output signal of the amplifier circuit 410 will also change. Therefore, the resistance value of the transistor 420 can be adjusted according to actual needs, thereby adjusting the gain of the amplifier circuit 410 to improve the gain temperature drift of the amplifier 400. In the above manner, it is only necessary to set the transistor 420 at the input or output end of the amplifier circuit 410 in the amplifier 400, without setting a feedback circuit or a voltage-controlled variable attenuation circuit cascaded between the amplifier 400 and other devices. While improving the gain temperature drift of the amplifier circuit 410, the total area of ​​the transceiver circuit is also reduced, thereby reducing costs.

[0065] In one embodiment, as shown in FIG10 , when the amplifier 400 is a single-input amplifier, the amplifier 400 includes a transistor M1. The first terminal of the transistor M1 can be coupled to the input of the amplifier circuit 410. The control terminal of the transistor M1 is used to input the first control signal CK1. The second terminal of the transistor M1 is grounded. Through this implementation, the resistance of the transistor M1 can be adjusted by the first control signal CK1, thereby adjusting the input impedance of the amplifier circuit 410, thereby adjusting the strength of the input signal to the amplifier circuit 410 and, in turn, adjusting the gain of the amplifier 400, thereby achieving temperature compensation for the amplifier 400. In one embodiment, also as shown in FIG10 , the amplifier 400 can further include a first resistor R1. The first resistor R1 is connected in series with the first or second terminal of the transistor M1. Alternatively, as shown in FIG11 , the first resistor R1 can be connected in parallel between the first and second terminals of the transistor M1. This approach allows the input impedance of the amplifier circuit 410 to be adjusted in scenarios where a higher or lower impedance requirement is required, to better meet the needs of actual use cases.

[0066] In the above implementation process, the transistor M1 and the first resistor R1 are only an example given in the embodiment of the present application. The above-mentioned amplifier 400 may also include a plurality of transistors connected in series, and each transistor may be selectively connected in parallel and / or in series with one or more resistors. Alternatively, the amplifier 400 may also include a plurality of transistors connected in parallel, and each transistor may be selectively connected in series with one or more resistors. Among them, when the amplifier 400 includes a plurality of transistors connected in series, it can be expanded in the manner of reference 7, and the embodiment of the present application will not be described in detail here. When the amplifier 400 includes a plurality of transistors connected in parallel, it can be expanded in the manner of reference 8, and the embodiment of the present application will not be described in detail here.

[0067] In one embodiment, the input and output of amplifier 400 may each be connected to a transistor. For example, as shown in FIG12 , assuming amplifier 400 is a single-input, single-output amplifier, amplifier 400 may include transistors M1 and M2. A first electrode of transistor M1 is connected to signal input terminal IN1 for inputting a signal. A second electrode of transistor M1 is connected to the input of amplifier circuit 410. A control electrode of transistor M1 is used to input a first control signal CK1. A first electrode of transistor M2 is connected to the output of amplifier circuit 410. A control electrode of transistor M2 is used to input a second control signal CK2. A second electrode of transistor M2 is connected to signal output terminal OUT1 for outputting a signal.

[0068] In the above implementation process, transistor M1 is connected in series between the signal input terminal IN1 and the input terminal of the amplifier circuit 410, and the control voltage applied to the control electrode of transistor M1 can be controlled by the control circuit to adjust the resistance value of transistor M1. When the resistance value of transistor M1 changes, the input impedance of the amplifier circuit 410 will also change, so that the intensity of the input signal of the amplifier circuit 410 can be adjusted to adjust the gain of the amplifier 400. Transistor M2 is connected in series between the signal output terminal OUT1 and the output terminal of the amplifier circuit 410, and the control voltage applied to the control electrode of transistor M2 can be controlled by the control circuit to adjust the resistance value of transistor M2. When the resistance value of transistor M2 changes, the output impedance of the amplifier circuit 410 will also change, so that the intensity of the output signal of the amplifier circuit 410 can be adjusted to adjust the gain of the amplifier 400. Among them, transistor M1 and transistor M2 can be triodes or MOS tubes, which will not be described in detail in the embodiment of the present application.

[0069] In one embodiment, as still shown in Figure 12, the above-mentioned amplifier 400 also includes a resistor R1 and a resistor R2. The resistor R1 is connected in series with the transistor M1, and the resistor R2 is connected in series with the transistor M2. Alternatively, as shown in Figure 13, the resistor R1 is connected in series with the transistor M1, and the resistor R2 can be connected in parallel between the first and second poles of the transistor M2. Among them, the resistor R2 and the resistor R1 can also be composed of one or more resistors, or the resistor R2 and the resistor R1 are various components that can be used as resistors. In this way, the input impedance of the amplifier circuit 410 can be adjusted in scenarios where the impedance requirement is large or the impedance requirement is small to better meet the needs of actual use scenarios.

[0070] In one embodiment, as shown in FIG14 , the first electrode of the transistor M2 can also be coupled to the output terminal of the amplifier circuit 410. The control electrode of the transistor M2 is used to input the second control signal CK2. The second electrode of the transistor M2 is grounded. In this manner, the transistor M2 can be coupled to the output terminal of the amplifier circuit 410 within the amplifier 400 in a grounded manner.

[0071] Furthermore, the structure of the amplifier 400 in FIG14 may also be expanded in a corresponding manner with reference to FIG7 or FIG8 , which will not be described in detail in the embodiment of the present application.

[0072] In one embodiment, when the amplifier 400 is a dual-input, dual-output amplifier, the amplifier circuit 410 has two input terminals and two output terminals. In this case, each input terminal of the amplifier circuit 410 can be coupled to a transistor, and each output terminal of the amplifier circuit 410 can also be selectively coupled to a transistor. For ease of distinction, the transistor coupled to the first input terminal of the amplifier circuit 410 can be denoted as transistor M1, and the transistor coupled to the second input terminal can be denoted as transistor M2. The transistor coupled to the first output terminal of the amplifier circuit 410 can be denoted as transistor M3, and the transistor coupled to the second output terminal can be denoted as transistor M4. To ensure that the input impedance of the two input terminals of the amplifier circuit 410 remains the same and can be adjusted synchronously, transistors M1 and M2 are the same transistors. Similarly, to ensure that the input impedance of the two output terminals of the amplifier circuit 410 remains the same and can be adjusted synchronously, transistors M3 and M4 can also be the same transistors.

[0073] In some examples, as shown in FIG15 , referring to the approach of FIG5 , the first electrode of transistor M1 can be coupled to signal input terminal IN1, and the second electrode of transistor M1 can be coupled to the first input terminal of amplifier circuit 410. The first electrode of transistor M2 can be coupled to signal input terminal IN2, and the second electrode of transistor M2 can be coupled to the second input terminal of amplifier circuit 410. The second electrode of transistor M3 can be coupled to signal output terminal OUT1, and the first electrode of transistor M3 can be coupled to the first output terminal of amplifier circuit 410. The first electrode of transistor M4 can be coupled to signal output terminal OUT2, and the second electrode of transistor M4 can be coupled to the second output terminal of amplifier circuit 410. To prevent damage to the transistors, a resistor can be connected in series with the control electrodes of transistors M1, M2, M3, and M4. The resistor connected in series with the control electrode of transistor M1 is Ra, the resistor connected in series with the control electrode of transistor M2 is Rb, the resistor connected in series with the control electrode of transistor M3 is Rc, and the resistor connected in series with the control electrode of transistor M4 is Rd. The transistor M1 , the transistor M2 , the transistor M3 and the transistor M4 in the amplifier 400 may be connected to other resistors or transistors in the manners shown in FIG. 5 to FIG. 14 , which will not be described in detail in the embodiment of the present application.

[0074] In another example, as shown in FIG16 , referring to the method of FIG10 , a first electrode of transistor M1 is coupled to a first input terminal of amplifier circuit 410, and a second electrode of transistor M1 is grounded via resistor R1. A first electrode of transistor M2 is coupled to a second input terminal of amplifier circuit 410, and a second electrode of transistor M2 is grounded via resistor R2. Simultaneously, a first electrode of transistor M3 is coupled to a first output terminal of amplifier circuit 410, and a second electrode of transistor M3 is grounded via resistor R3. A first electrode of transistor M4 is coupled to a second output terminal of amplifier circuit 410, and a second electrode of transistor M4 is grounded via resistor R4.

[0075] In one embodiment, as shown in FIG17 , a first electrode of transistor M1 is coupled to the first input terminal of amplifier circuit 410, and a second electrode of transistor M1 is coupled to the second input terminal of amplifier circuit 410. A first electrode of transistor M2 is coupled to the second input terminal of amplifier circuit 410, and a second electrode of transistor M2 is coupled to the first input terminal of amplifier circuit 410. Simultaneously, a first electrode of transistor M3 is coupled to the first output terminal of amplifier circuit 410, and a second electrode of transistor M3 is coupled to the second output terminal of amplifier circuit 410. A first electrode of transistor M4 is coupled to the second output terminal of amplifier circuit 410, and a second electrode of transistor M4 is coupled to the first output terminal of amplifier circuit 410. Transistors M1 and M2 are identical transistors, and transistors M3 and M4 are identical transistors. Furthermore, transistor M1 can be connected in series with electron R1. Transistor M2 can be connected in series with electron R2. Transistor M3 can be connected in series with electron R3. Transistor M4 can be connected in series with electron R4.

[0076] In the above implementation process, the transistors M1 to M4 may also be connected to resistors or other transistors in the manner described in reference to FIG. 5 to FIG. 14 , which will not be described in detail in the embodiment of the present application.

[0077] In one embodiment, the amplifier 400 may further include an input impedance matching circuit 430 and / or an output impedance matching circuit 440. The number of inputs and outputs of the input impedance matching circuit 430 is the same as the number of inputs of the amplifier circuit 410, and the outputs of the input impedance matching circuit 430 are coupled one-to-one with the inputs of the amplifier circuit 410. The number of inputs and outputs of the output impedance matching circuit 440 is the same as the number of outputs of the amplifier circuit 410, and the inputs of the output impedance matching circuit 440 are coupled one-to-one with the outputs of the amplifier circuit 410. The types of the input impedance matching circuit 430 and the output impedance matching circuit 440 can be adjusted based on the number of inputs and outputs of the amplifier 400. For example, as shown in FIG18 , if the amplifier 400 is a single-input, single-output amplifier, then, based on FIG12 , both the input impedance matching circuit 430 and the output impedance matching circuit 440 have only one input and one output. The input terminal of the input impedance matching circuit 430 is connected to the signal input terminal IN1 for inputting a signal, and the first electrode of the transistor M1 is connected to the output terminal of the input impedance matching circuit 430. The second electrode of the transistor M1 is connected to the input terminal of the amplifier circuit 410 via a resistor R1. The output terminal of the output impedance matching circuit 440 is connected to the signal output terminal OUT1 for outputting a signal, and the second electrode of the transistor M2 is connected to the input terminal of the output impedance matching circuit 440 via a resistor R2. The first electrode of the transistor M2 is connected to the output terminal of the amplifier circuit 410. Alternatively, as shown in FIG19 , the input terminal of the input impedance matching circuit 430 is connected to the second electrode of the transistor M1 via a resistor R1, and the output terminal of the input impedance matching circuit 430 is connected to the input terminal of the amplifier circuit 410. The first electrode of the transistor M1 is connected to the signal input terminal IN1 for inputting a signal. The input terminal of the output impedance matching circuit 440 is connected to the output terminal of the amplifier circuit 410, and the output terminal of the output impedance matching circuit 440 is connected to the first electrode of the transistor M2. The second electrode of transistor M2 is connected to the signal output terminal OUT1 via resistor R2 for outputting a signal. Resistors R1 and R2 can be configured selectively, and this embodiment of the present application does not impose any specific limitations thereto. Transistors M1 and M2 can also be combined with other components in any manner, and this embodiment of the present application does not impose any specific limitations thereto.

[0078] In the above implementation process, when the input end of the amplifier circuit 410 is connected to a transistor according to any of the above solutions, the output end of the amplifier circuit 410 may also be directly connected to the signal output end through the output impedance matching circuit 440. Alternatively, when the output end of the amplifier circuit 410 is connected to a transistor according to any of the above solutions, the input end of the amplifier circuit 410 may also be directly connected to the signal input end through the input impedance matching circuit 430, and this embodiment of the present application does not impose any specific restrictions on this.

[0079] Furthermore, if amplifier 400 is a dual-input, dual-output amplifier, both input impedance matching circuit 440 and output impedance matching circuit 450 have two inputs and two outputs. In this case, each of the two inputs of amplifier circuit 410 can be coupled to a transistor, and each of the two outputs of amplifier circuit 410 can also be selectively coupled to a transistor. In one example, as still shown in FIG20 , the first input of input impedance matching circuit 430 is connected to signal input terminal IN1. The first electrode of transistor M1 is connected to the first output of input impedance matching circuit 430. The second electrode of transistor M1 is connected to the first input of amplifier circuit 410 via resistor R1. The second input of input impedance matching circuit 430 is connected to signal input terminal IN2. The first electrode of transistor M2 is connected to the second output of input impedance matching circuit 430. The second electrode of transistor M2 is connected to the second input of amplifier circuit 410 via resistor R2. The first output of output impedance matching circuit 440 is connected to signal output terminal OUT1. The second electrode of transistor M3 is connected to the first input of output impedance matching circuit 440. A first electrode of transistor M3 is connected to a first output terminal of amplifier circuit 410 via resistor R3. A second output terminal of output impedance matching circuit 440 is connected to signal output terminal OUT2. A second electrode of transistor M4 is connected to a second input terminal of output impedance matching circuit 440. A first electrode of transistor M4 is connected to a second input terminal of amplifier circuit 410 via resistor R4.

[0080] In another example, as shown in FIG21 , the first electrode of transistor M1 can be connected to signal input terminal IN1. The second electrode of transistor M1 can be connected to the first input terminal of input impedance matching circuit 430 via resistor R1. The first output terminal of input impedance matching circuit 430 is connected to the first input terminal of amplifier circuit 410. The first electrode of transistor M2 can be connected to signal input terminal IN2. The second electrode of transistor M2 can be connected to the second input terminal of input impedance matching circuit 430 via resistor R2. The second output terminal of input impedance matching circuit 430 is connected to the second input terminal of amplifier circuit 410. The second electrode of transistor M3 can be connected to signal output terminal OUT1. The first electrode of transistor M3 can be connected to the first output terminal of output impedance matching circuit 440 via resistor R3. The first input terminal of output impedance matching circuit 440 is connected to the first output terminal of the amplifier circuit. The second electrode of transistor M4 can be connected to signal output terminal OUT2. The first electrode of transistor M4 can be connected to the second output terminal of output impedance matching circuit 440 via resistor R4. The second input terminal of output impedance matching circuit 440 is connected to the second output terminal of the amplifier circuit.

[0081] In the above implementation process, the above-mentioned resistors R1 to R4 can be selectively set, and the embodiments of the present application do not impose specific restrictions on this. In addition, transistors M1 to M4 can also be connected to resistors or other transistors as shown in Figures 5 to 14, and the embodiments of the present application do not impose specific restrictions on this. When the amplifier is a single-input dual-output amplifier or a dual-input single-output amplifier, the configuration of the input impedance matching circuit and the output impedance matching circuit can also be selected with reference to Figures 18 to 21, and the embodiments of the present application will not be repeated here.

[0082] In one embodiment, as shown in FIG22 , the present application also provides a signal processing circuit 2200, which includes a transmitting circuit 2210 and / or a receiving circuit 2220. The transmitting circuit 2210 and / or the receiving circuit 2220 include at least one of the aforementioned amplifiers 400. The receiving circuit 2220 includes, among others, an LNA, a VGA, an AMP, and a phase shifter, while the transmitting circuit 2210 includes, among others, a PA, a VGA, an AMP, and a phase shifter. Any of the LNA / PA, VGA, and AMP may be the aforementioned amplifier 400, and this embodiment of the present application does not impose any specific limitations on this. In the above implementation, the signal processing circuit may be an integrated chip comprised of one or more chips made of semiconductor materials, or a circuit comprised of multiple discrete components disposed on different circuit boards.

[0083] In one embodiment, as shown in FIG23 , the present application also provides a phased array system 2300. Phased array system 2300 includes a phased array channel 2310, a signal distribution channel 2320 coupled to phased array channel 2310, and a combiner channel 2330 coupled to signal distribution channel 2320. Phased array channel 2310 includes multiple transceiver circuits 2311. Each transceiver circuit 2311 is coupled to an antenna 2340 at one end and to one end of signal distribution channel 2320 at the other end. The receiving circuitry of transceiver circuit 2311 includes an LNA, a VGA, an AMP, and a phase shifter, while the transmitting circuitry includes a PA, a VGA, an AMP, and a phase shifter. At least one of the LNA / PA, VGA, and AMP is the aforementioned amplifier 400. The LNA / PA, VGA, and AMP can be uniformly controlled by a control circuit.

[0084] The phased array system 2300 can be used to perform temperature compensation on each transceiver circuit in the phased array path 2310. Furthermore, since the RF channels corresponding to the transceiver circuits in the phased array path 2310 are affected by mismatch, their gains may vary.

[0085] In one embodiment, as shown in FIG24 , the present application also provides an operating method for a phased array system 2300 . The operating method can be executed by a control circuit. The specific execution process is as follows.

[0086] S2401. Obtain gains of multiple transceiver circuits.

[0087] In the process of transmitting signals, the gains of the various transceiver circuits in the phased array path 2310 may be measured by the control circuit to obtain the gains of the multiple transceiver circuits.

[0088] S2402. Control the corresponding amplifiers in the multiple transceiver circuits according to the gains of the multiple transceiver circuits, so that the gains of the multiple transceiver circuits remain consistent.

[0089] In one example, assume that phased array path 2310 includes N transceiver circuits 2311. Because each transceiver circuit includes a receiving circuit, phased array path 2310 has N receiving channels. Each receiving channel can input a fixed-power signal, which is amplified by the receiving circuit and then enters the combining path 2330 through the signal distribution path 2320. During signal reception, the gains of the N receiving channels can be measured. After measuring the gains of the N receiving channels, the receiving channel with the lowest gain can be found. If an amplifier in the receiving circuit is configured with transistors as shown in Figures 5 to 21, N control signals can be configured based on the gain difference between the gains of other receiving channels and the receiving channel with the lowest gain. Each control signal is used to control the amplifier corresponding to a transistor, thereby maintaining consistent gain across the N receiving channels. In specific implementations, the control signals in each receiving circuit can be calculated by a computer program executed by a processor based on the gain difference between the gains of other receiving channels and the receiving channel with the lowest gain. This embodiment of the present application is not described in detail here. In another example, the operator can also set a gain reference value and then configure the control signals of the amplifiers in other receiving channels based on the gain difference between the gains of other receiving channels and the gain reference value. Furthermore, the operator can configure the control signal of the amplifier in the receiving channel with the lowest gain based on the gain difference between the gain of the receiving channel with the lowest gain and the gain reference value. In specific implementations, the above two methods can be selected based on actual needs and are not specifically limited in this embodiment of the present application.

[0090] In one embodiment, as shown in Figure 25, the embodiment of the present application also provides a communication system 2500, which includes a temperature detection circuit 2510, a control circuit 2520 coupled to the temperature detection circuit 2510, and a signal processing circuit 2200 coupled to the control circuit 2520. Among them, the signal processing circuit 2200 can be coupled to the processor 2540 and the antenna 2530 respectively. The above-mentioned communication system 2500 can be a communication system composed of multiple devices in a mobile phone, a computer, a wearable device (such as a smart bracelet, a smart watch, etc.), a base station or other electronic device capable of receiving signals / transmitting signals. The above-mentioned control circuit 2520 can be a central processing unit (CPU), a general processor, a network processor (NP), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a system on chip (SoC), or any combination thereof. The embodiment of the present application does not specifically limit this. The control circuit 2520 can read computer program instructions from the memory to perform temperature compensation on the amplifier 400 in the semiconductor device according to the temperature data detected by the temperature detection circuit. Alternatively, the control circuit 2520 can be a logic control circuit composed of multiple logic circuits, which is not specifically limited in this embodiment of the present application.

[0091] In one embodiment, the present application also provides a computer-readable storage medium storing computer program instructions. When executed by a processor, the computer program instructions can implement the operating method of the phased array system 2300. The computer-readable storage medium can be a magnetic medium (e.g., a floppy disk, a hard disk, or a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)).

[0092] It should be understood that in various embodiments of the present application, the size of the sequence number of each process does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. The memory involved in the embodiment of the present application may be a volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM) or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0093] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0094] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices and modules can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0095] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, etc. can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0096] Modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physical modules, that is, they may be located on a single device or distributed across multiple devices. Some or all of these modules may be selected to achieve the objectives of this embodiment based on actual needs.

[0097] In addition, the functional modules in the various embodiments of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0098] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware, or any combination thereof. When implemented using a software program, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more media integrated therein.

[0099] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. An amplifier, characterized in that: It includes an amplifier circuit and a transistor; the first electrode of the transistor is used to input a signal; the second electrode of the transistor is connected to the input end of the amplifier circuit; or, the first electrode of the transistor is connected to the output end of the amplifier circuit; the second electrode of the transistor is used to output a signal; the control electrode of the transistor is used to input a control signal, and the control signal changes with the temperature of the amplifier.

2. The amplifier according to claim 1, wherein Also includes: a first resistor; the first resistor is connected in series with the first electrode or the second electrode of the transistor; or the first resistor is connected in parallel between the first electrode and the second electrode of the transistor.

3. The amplifier according to claim 1 or 2, characterized in that Also includes: A second resistor; the second resistor is connected in series with the control electrode of the transistor.

4. The amplifier according to any one of claims 1 to 3, characterized in that: Also included: an input impedance matching circuit; The input end of the input impedance matching circuit is used to input a signal, and the first electrode of the transistor is connected to the output end of the input impedance matching circuit; or, The input end of the input impedance matching circuit is connected to the second electrode of the transistor, and the output end of the input impedance matching circuit is connected to the input end of the amplifier circuit.

5. The amplifier according to claim 4, characterized in that Also includes: Output impedance matching circuit, The input end of the output impedance matching circuit is connected to the output end of the amplifying circuit, and the output end of the output impedance matching circuit is used to output a signal.

6. The amplifier according to any one of claims 1 to 3, characterized in that: Also includes: Output impedance matching circuit; The output end of the output impedance matching circuit is used to output a signal, and the second electrode of the transistor is connected to the input end of the output impedance matching circuit; or, The input end of the output impedance matching circuit is connected to the output end of the amplifier circuit, and the output end of the output impedance matching circuit is connected to the first electrode of the transistor.

7. The amplifier according to claim 6, characterized in that Also included: an input impedance matching circuit; The output end of the input impedance matching circuit is connected to the input end of the amplifying circuit, and the input end of the output impedance matching circuit is used for inputting a signal.

8. An amplifier, characterized in that: The invention comprises an amplifier circuit and a transistor; the first electrode of the transistor is connected to the input end of the amplifier circuit; the second electrode of the transistor is grounded; or the first electrode of the transistor is connected to the output end of the amplifier circuit, and the second electrode of the transistor is grounded; the control electrode of the transistor is used to input a control signal, and the control signal changes with the temperature of the amplifier.

9. The amplifier according to claim 8, characterized in that Also includes: a first resistor; the first resistor is connected in series with the first electrode or the second electrode of the transistor; or the first resistor is connected in parallel between the first electrode and the second electrode of the transistor.

10. The amplifier according to claim 8 or 9, characterized in that Also includes: A second resistor; the second resistor is connected in series with the control electrode of the transistor.

11. The amplifier according to any one of claims 8 to 10, characterized in that: Also included: an input impedance matching circuit; The input end of the input impedance matching circuit is used to input a signal, and the first electrode of the transistor is connected to the input end of the input impedance matching circuit; the output end of the input impedance matching circuit is connected to the input end of the amplifier circuit; or, The input end of the input impedance matching circuit is used to input a signal, and the output end of the input impedance matching circuit is connected to the first electrode of the transistor and the input end of the amplifier circuit respectively.

12. The amplifier according to claim 11, wherein Also includes: Output impedance matching circuit, The input end of the output impedance matching circuit is connected to the output end of the amplifying circuit, and the output end of the output impedance matching circuit is used to output a signal.

13. The amplifier according to any one of claims 8 to 10, characterized in that: Also includes: Output impedance matching circuit; The output end of the output impedance matching circuit is used to output a signal, and the first electrode of the transistor is connected to the output end of the output impedance matching circuit; the input end of the output impedance matching circuit is connected to the output end of the amplifier circuit; or, The output end of the output impedance matching circuit is used to output a signal, and the input end of the output impedance matching circuit is connected to the first electrode of the transistor and the input end of the amplifier circuit respectively.

14. The amplifier according to claim 13, characterized in that Also included: an input impedance matching circuit; The input end of the output impedance matching circuit is used for inputting a signal, and the output end of the output impedance matching circuit is connected to the input end of the amplifying circuit.

15. A signal processing circuit, characterized in that: The device comprises a transmitting circuit and / or a receiving circuit; the transmitting circuit and / or the receiving circuit comprises at least one amplifier according to any one of claims 1 to 14.

16. A communication system, characterized in that: include: A temperature detection circuit, a control circuit coupled to the temperature detection circuit, and the signal processing circuit according to claim 15 coupled to the control circuit.

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