Power conversion device and control method

Abstract

A power conversion device (1) comprises: a main inductor (L1); a switch group (10); and a control circuit (20). The switch group (10) has: a main switch unit (11) that is a half-bridge circuit including two main switches (Q1, Q2) connected in series; and an auxiliary circuit (12) having an auxiliary inductor (L2) and an auxiliary switch unit (13) including two auxiliary switches (Q3, Q4) connected in series. The control circuit (20) calculates a correction value for correcting a converter voltage error on the basis of the current flowing through the main inductor (L1) and adds the correction value to a voltage command value. When turning off the first main switch (Q1), the control circuit (20) turns on the first auxiliary switch (Q4), turns off the first main switch (Q1) after an overlap time has elapsed, turns on the second main switch (Q2) after a dead time has elapsed, and then turns off the first auxiliary switch (Q4).

Description

Power conversion device and control method

[0001] The present disclosure relates to a power conversion device and a control method thereof.

[0002] Reducing switching losses through soft switching is an effective way of improving converter efficiency. For example, Patent Document 1 discloses a DC-DC converter that uses an auxiliary circuit to achieve zero-volt switching (ZVS) when the main converter is turned on. Specifically, while the main switch, which has a forward current flowing in the on state, is turned off, the current flowing through the main inductor is drawn into an auxiliary inductor to complete the discharge of the charge accumulated in the capacitance of the main switch, and then the main switch is turned on, thereby achieving ZVS.

[0003] Patent No. 7180511

[0004] However, in the DC-DC converter disclosed in Patent Document 1, current continues to flow through the anti-parallel diode of the main switch during the dead time after the main switch is turned off, which causes an error in the voltage derived from the potential at one end of the main inductor (hereinafter referred to as the converter voltage). The converter voltage error may cause an overcurrent or current distortion. Therefore, correcting the voltage command value for the converter voltage is effective in reducing the converter voltage error. However, because the converter voltage error changes depending on the circuit state, correcting the voltage command value with a correction value that does not match the current circuit state may further exacerbate the error.

[0005] Therefore, the present disclosure provides a power conversion device and the like that can reduce errors in converter voltage even when the circuit state changes.

[0006] a control circuit for controlling the group of switches; a main switch unit and an auxiliary circuit; the main switch unit being a half-bridge circuit including two main switches connected in series; the auxiliary circuit having an auxiliary switch unit including two auxiliary switches connected in series; and an auxiliary inductor; a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit being connected to each other and to one terminal of the second input / output terminal pair; a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit being connected to each other and to the other terminal of the second input / output terminal pair; One of the first intermediate node and the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control circuit calculates a correction value for correcting an error in the converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor based on the current flowing in the main inductor, adds the correction value to a voltage command value for the converter voltage, turns on a first auxiliary switch of the two auxiliary switches, which is on and through which a forward current flows, before turning off a first main switch of the two main switches, which is on and through which a reverse current flows, or at the same time as turning off the first main switch, turns off the first main switch after an overlap time, which is a time during which the first main switch and the first auxiliary switch are both on, has elapsed, and turns on a second main switch of the two main switches, which is on and through which a forward current flows, after a dead time, which is a time during which the two main switches are both off, has elapsed, and then turns off the first auxiliary switch.

[0007] a control circuit for controlling the group of switches, the group of switches having a main switch unit and an auxiliary circuit, the main switch unit being a half-bridge circuit including two main switches connected in series, the auxiliary circuit having an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit being connected to each other and to one terminal of the second input / output terminal pair, a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit being connected to each other and to the other terminal of the second input / output terminal pair, the auxiliary inductor being connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, One of the second intermediate nodes is connected to one terminal of the first input / output terminal pair, and the control circuit adjusts an overlap time, which is a time during which a first main switch of the two main switches, through which a reverse current flows in an on state, and a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, are both on, based on the current flowing in the main inductor, the voltage across the second input / output terminal pair, and the inductance value of the auxiliary inductor, so as to reduce an error in the converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor; the control circuit turns on the first auxiliary switch before turning off the first main switch or at the same time as turning off the first main switch, turns off the first main switch after the overlap time has elapsed, and after a dead time, which is a time during which the two main switches are both off, turns on the second main switch of the two main switches, through which a forward current flows in an on state, and then turns off the first auxiliary switch.

[0008] a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit are connected to each other and to one terminal of the second input / output terminal pair; a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit are connected to each other and to the other terminal of the second input / output terminal pair; and the auxiliary inductor is connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches. One of the first intermediate node and the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control method includes calculating a correction value for correcting an error in a converter voltage derived from the potential of an intermediate node between the main inductor and the auxiliary inductor based on a current flowing in the main inductor, adding the correction value to a voltage command value for the converter voltage, turning on a first auxiliary switch of the two auxiliary switches, which is on and through which a forward current flows, before turning off a first main switch of the two main switches, which is on and through which a reverse current flows, or at the same time as turning off the first main switch, turning off the first main switch after an overlap time, during which the first main switch and the first auxiliary switch are both on, has elapsed, and turning on a second main switch of the two main switches, which is on and through which a forward current flows, after a dead time, during which the two main switches are both off, has elapsed, and then turning off the first auxiliary switch.

[0009] a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit are connected to each other and to one terminal of the second input / output terminal pair; a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit are connected to each other and to the other terminal of the second input / output terminal pair; and the auxiliary inductor is connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches. and one of the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control method adjusts an overlap time, which is a time during which a first main switch of the two main switches, through which a reverse current flows in an on state, and a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, are both on, based on the current flowing in the main inductor, the voltage across the second input / output terminal pair, and the inductance value of the auxiliary inductor, so as to reduce an error in the converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor; the control method turns on the first auxiliary switch before turning off the first main switch or at the same time as turning off the first main switch, turns off the first main switch after the overlap time has elapsed, and after a dead time, which is a time during which the two main switches are both off, turns on the second main switch of the two main switches, through which a forward current flows in an on state, and then turns off the first auxiliary switch.

[0010] These comprehensive or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, or may be realized as any combination of a system, a method, an integrated circuit, a computer program, and a recording medium.

[0011] According to a power conversion device according to an aspect of the present disclosure, errors in converter voltage can be reduced even when the circuit state changes.

[0012] 1 is a circuit configuration diagram showing an example of a power conversion device according to a first embodiment. FIG. 2 is a block diagram showing an example of a control circuit according to the first embodiment. FIG. 3 is a diagram showing an example of an error in a converter voltage. FIG. 4 is a diagram for explaining a first example of operation of the power conversion device according to the first embodiment. FIG. 5 is a diagram for explaining a second example of operation of the power conversion device according to the first embodiment. FIG. 6 is a diagram for explaining a third example of operation of the power conversion device according to the first embodiment. FIG. 7 is a diagram for explaining a fourth example of operation of the power conversion device according to the first embodiment. FIG. 8 is a circuit configuration diagram showing an example of a power conversion device according to a second embodiment. FIG. 9 is a diagram for explaining a first example of operation of the power conversion device according to the second embodiment. FIG. 10 is a diagram for explaining a second example of operation of the power conversion device according to the second embodiment. FIG. 11 is a diagram for explaining a third example of operation of the power conversion device according to the second embodiment. FIG. 12 is a block diagram showing an example of a control circuit according to a third embodiment. FIG. 13 is a diagram showing an application example of the power conversion device according to the first, second or third embodiment. Fig. 1 is a diagram showing an application example of a power conversion device according to embodiment 1, 2 or 3. Fig. 2 is a diagram showing an application example of a power conversion device according to embodiment 1, 2 or 3. Fig. 3 is a diagram showing an application example of a power conversion device according to embodiment 1, 2 or 3. Fig. 4 is a flowchart showing an example of a control method according to another embodiment. Fig. 5 is a flowchart showing an example of a control method according to another embodiment.

[0013] Hereinafter, the embodiments will be specifically described with reference to the drawings.

[0014] The embodiments described below are all comprehensive or specific examples, and the numerical values, shapes, materials, components, arrangement and connection of the components, steps, and order of steps shown in the following embodiments are merely examples and are not intended to limit the present disclosure.

[0015] (First embodiment) Hereinafter, a power conversion device according to a first embodiment will be described.

[0016] Fig. 1 is a circuit configuration diagram showing an example of a power conversion device 1 according to embodiment 1. In addition to the power conversion device 1, Fig. 1 also shows a voltage source 100, diodes D1 and D2, and capacitor C1. Note that the voltage source 100, diodes D1 and D2, or capacitor C1 may be provided in the power conversion device 1.

[0017] The power conversion device 1 is a power conversion device that converts an input voltage and outputs a desired voltage. The circuit configuration of the power conversion device 1 is not limited as long as the main switch unit 11, which will be described later, includes a half-bridge circuit. For example, the power conversion device 1 may be a grid-connected PFC (Power Factor Correction) circuit (totem-pole PFC) that converts AC to DC, as shown in FIG. 1 . Other application examples of the power conversion device 1 will be described later.

[0018] The voltage source 100 is, for example, an AC voltage source. For example, the voltage source 100 has a frequency f ａｃ AC voltage V ａｃ Note that the voltage source 100 may be an AC voltage source or a DC voltage source depending on the application of the power conversion device 1.

[0019] The diodes D1 and D2 are a rectifier circuit for rectifying the voltage output from the switch group 10, which will be described later. The DC voltage rectified by the diodes D1 and D2 and output is applied to the capacitor C1. This allows the capacitor C1 to operate as a DC voltage source. The voltage output from the capacitor C1 is converted to a voltage vｃ Let's say.

[0020] The power conversion device 1 includes terminals t1, t2, t3, and t4. The terminals t1 and t2 are an example of a first input / output terminal pair. The terminals t3 and t4 are an example of a second input / output terminal pair. The voltage between the second input / output terminal pair is a voltage output from the capacitor C1, and is a voltage v ｃ is.

[0021] The power conversion device 1 includes an inductor L1, a group of switches 10, and a control circuit 20.

[0022] The inductor L1 is an example of a main inductor connected in series between the first input / output terminal pair. For example, the inductor L1 is connected in series between the terminal t1 and the terminal t2 via the voltage source 100. The current flowing through the inductor L1 is referred to as a current i Ｌ Let us assume that Ｌ If .gtoreq.0, the current flows from the left to the right of the inductor L1 in FIG. 1, and i Ｌ <0, it is assumed that a current flows from the right side to the left side of the inductor L1 in FIG.

[0023] The switch group 10 converts the input voltage to obtain a desired output voltage by controlling each switch included in the switch group 10 with the control circuit 20. The switch group 10 is connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair. In the power conversion device 1 shown in Fig. 1 , the switch group 10 is connected to terminal t1 of the first input / output terminal pair and to both terminals t3 and t4 of the second input / output terminal pair.

[0024] The switch group 10 includes a main switch unit 11 and an auxiliary circuit 12 .

[0025] The main switch unit 11 is a half-bridge circuit including switches Q1 and Q2, which are an example of two main switches connected in series.

[0026] The switch Q1 is, for example, an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The drain of the switch Q1 is connected to the terminal t3, and the source of the switch Q1 is connected to the terminal t1 and the drain of the switch Q2. The switch Q2 is, for example, an N-channel MOSFET. The drain of the switch Q2 is connected to the terminal t1 and the source of the switch Q1, and the source of the switch Q2 is connected to the terminal t4.

[0027] The auxiliary circuit 12 has an auxiliary switch unit 13 and an inductor L2. The auxiliary switch unit 13 includes switches Q3 and Q4. The switches Q3 and Q4 are an example of two auxiliary switches connected in series. The inductor L2 is an example of an auxiliary inductor. The auxiliary circuit 12 is, for example, a half-bridge circuit as shown in FIG. 1. The auxiliary circuit 12 may be a circuit configured with a multi-level converter (flying capacitor) as described in Patent Document 1.

[0028] The switch Q3 is, for example, an N-channel MOSFET. The drain of the switch Q3 is connected to the terminal t3, and the source of the switch Q3 is connected to the drain of the switch Q4. The switch Q4 is, for example, an N-channel MOSFET. The drain of the switch Q4 is connected to the source of the switch Q3, and the source of the switch Q4 is connected to the terminal t4.

[0029] When the switch Q3 or Q4 is turned on, a current flows through the switch Q3 or Q4 that is turned on via the inductor L2, and the inductor L2 is excited.

[0030] 1 shows an anti-parallel diode connected to each switch, and each anti-parallel diode is connected in parallel with the corresponding switch. Specifically, the anode of each anti-parallel diode is connected to the source of the corresponding switch, and the cathode is connected to the drain of the corresponding switch. For example, each anti-parallel diode may be the body diode of the corresponding switch. Furthermore, each switch has a parasitic capacitance.

[0031] The inductor L2 is connected between a node N1 between the switches Q1 and Q2 and a node N2 between the switches Q3 and Q4. The node N1 is an example of a first intermediate node, and the node N2 is an example of a second intermediate node. The inductance value of the inductor L2 is set to an inductance value L ｓｕｂ The current flowing through the inductor L2 is defined as current i Ｌｓｕｂ Let us assume that Ｌｓｕｂ If .gtoreq.0, the current flows from the left to the right of the inductor L2 in FIG. 1, and i Ｌｓｕｂ <0, it is assumed that a current flows from the right side to the left side of the inductor L2 in FIG.

[0032] One of the nodes N1 and N2 is connected to one terminal of the first input / output terminal pair. In the power conversion device 1 shown in Fig. 1, the node N1, which is one of the nodes N1 and N2, is connected to the terminal t1, which is one terminal of the first input / output terminal pair.

[0033] The high-voltage side terminal of the main switch unit 11 (e.g., the terminal connected to the drain of switch Q1) and the high-voltage side terminal of the auxiliary switch unit 13 (e.g., the terminal connected to the drain of switch Q3) are connected to each other and to one terminal t3 of the second input / output terminal pair. The low-voltage side terminal of the main switch unit 11 (e.g., the terminal connected to the source of switch Q2) and the low-voltage side terminal of the auxiliary switch unit 13 (e.g., the terminal connected to the source of switch Q4) are connected to each other and to the other terminal t4 of the second input / output terminal pair.

[0034] The control circuit 20 controls the switch group 10. Specifically, the control circuit 20 controls the switching of the switches Q1, Q2, Q3, and Q4. The switching frequency of the switches Q1 and Q2 is set to a switching frequency f ｓｗ For example, the control circuit 20 controls the switching of the switches Q1, Q2, Q3, and Q4 by controlling a gate drive circuit (not shown) connected to the gates of the switches Q1, Q2, Q3, and Q4.

[0035] Based on the current flowing through inductor L1, control circuit 20 calculates a correction value for correcting an error in the converter voltage derived from the potential of the intermediate node between inductor L1 and inductor L2, and adds the correction value to a voltage command value for the converter voltage. In the first embodiment, the intermediate node between inductor L1 and inductor L2 is node N1, and the converter voltage is the voltage at node N1 between inductor L1 and inductor L2 with respect to the intermediate node between diode D1 and diode D2. Furthermore, control circuit 20 turns on one of switches Q3 and Q4, which is on and allows a forward current to flow, before or simultaneously with turning off the first main switch, which is on and allows a reverse current to flow, of switches Q1 and Q2. Then, control circuit 20 turns off the first main switch after an overlap time has elapsed, during which the first main switch and the first auxiliary switch are both on. Then, after the dead time during which the switches Q1 and Q2 are both in the OFF state has elapsed, the control circuit 20 turns on the second main switch, which is one of the switches Q1 and Q2 and through which a forward current flows in the ON state, and then turns off the first auxiliary switch. ｏｖｅｒｒａｐ and the dead time is T ｄ and the converter voltage is voltage v ｉｎｖ The operation of the control circuit 20 will be described in detail later.

[0036] The first main switch through which a reverse current flows in the on state is a switch through which a current flows from the source to the drain in the on state. Ｌ If i is greater than 0, the first main switch that is turned on and through which a reverse current flows is switch Q1, and i Ｌ <0, the first main switch that is on and through which a reverse current flows is switch Q2.

[0037] The first auxiliary switch through which a forward current flows in the on state is a switch through which a current flows from the drain to the source in the on state. Ｌ If i is greater than 0, the first auxiliary switch through which a forward current flows in the on state is the switch Q4, and i Ｌ<0, the first auxiliary switch through which a forward current flows in the on state is switch Q3.

[0038] The second main switch through which a forward current flows in the on state is a switch through which a current flows from the drain to the source in the on state. Ｌ If i is greater than 0, the second main switch that is on and through which a forward current flows is switch Q2, and i Ｌ <0, the second main switch that is on and through which a forward current flows is switch Q1.

[0039] Next, the configuration of the control circuit 20 will be described in detail with reference to FIG.

[0040] FIG. 2 is a block diagram showing an example of the control circuit 20 according to the first embodiment.

[0041] The control circuit 20 includes a voltage command value generation unit 21, a PWM control unit 22, a determination unit 23, a correction value calculation unit 24, and an adder 25. The control circuit 20 is realized by, for example, a computer including a processor (microprocessor) and a memory. The memory is, for example, a read-only memory (ROM) or a random access memory (RAM), and can store programs executed by the processor. The voltage command value generation unit 21, the PWM control unit 22, the determination unit 23, the correction value calculation unit 24, and the adder 25 are realized by, for example, a processor that executes programs stored in the memory.

[0042] The voltage command value generator 21 generates a voltage command value for making the voltage of the capacitor C1 (the voltage between the terminals t3 and t4) a target voltage. The voltage command value is a command value for the converter voltage. For example, the voltage command value generator 21 generates a voltage command value for making the AC voltage v ａｃ , the current i flowing through the inductor L1 Ｌ and the voltage v of the capacitor C1 ｃ The voltage command value generating unit 21 outputs the generated voltage command value to the adding unit 25. The voltage command value is calculated based on the command value v ｉｎｖ *Let's say.

[0043] The correction value calculation unit 24 calculates a correction value for correcting an error in the voltage command value generated by the voltage command value generation unit 21. ... Ｌ For example, the correction value calculation unit 24 calculates the correction value based on the current i flowing through the inductor L1. Ｌ , the voltage v between the second input / output terminal pair ｃ , the switching frequency f of switches Q1 and Q2 ｓｗ , and the inductance value L of the inductor L2 ｓｕｂ As shown in FIG. 2, the correction value calculation unit 24 further calculates the correction value based on the time T ｏｖｅｒｒａｐ The correction value calculation unit 24 outputs the calculated correction value to the addition unit 25. The error in the voltage command value is expressed as an error Δv ｉｎｖ The correction value is v ｉｎｖ＿ｃｏｍ The method for calculating the correction value will be described in detail later.

[0044] For example, the power conversion device 1 may be provided with an ammeter and a voltmeter, and the voltage command value generating unit 21 and the correction value calculating unit 24 may calculate the current i measured by the ammeter. Ｌ and the voltage measured by the voltmeter, v ｃ Alternatively, the voltage command value generating unit 21 and the correction value calculating unit 24 may obtain the current i Ｌ The command value and voltage v ｃ By obtaining the command value for outputting the current i Ｌ and voltage v ｃ For example, the inductance value L ｓｕｂ may be corrected based on the DC superposition characteristics.

[0045] The adder 25 adds the correction value to the voltage command value, and outputs the voltage command value to the PWM control unit 22 as a corrected voltage command value.

[0046] The PWM control unit 22 generates a PWM signal for controlling the switching of the switches Q1 and Q2 and the switches Q3 and Q4 based on the correction voltage command value output from the adder 25.

[0047] The determination unit 23 determines the overlap time and the dead time. The overlap time and the dead time may each be set in advance, and the determination unit 23 may set the overlap time and the dead time to the respective preset values.

[0048] The determination unit 23 reflects the determined overlap time and dead time in the PWM signal generated by the PWM control unit 22. Then, the determination unit 23 outputs the PWM signal for the switches Q1 and Q2, in which the overlap time and dead time are reflected, to the gates of the switches Q1 and Q2 as a main switch gate signal, and outputs the PWM signal for the switches Q3 and Q4, in which the overlap time and dead time are reflected, to the gates of the switches Q3 and Q4 as an auxiliary switch gate signal.

[0049] Here, the error in the converter voltage will be explained with reference to FIG.

[0050] FIG. 3 is a diagram showing an example of an error in the converter voltage. ａｃ , current i Ｌ , the error Δv when the auxiliary switches Q3 and Q4 are disabled (for example, when the auxiliary circuit 12 is faulty). ｉｎｖ , and the error Δv when the auxiliary switches Q3 and Q4 are enabled. ｉｎｖ A graph showing the change over time is shown.

[0051] During the dead time after the switch Q1 or Q2 is turned off, current continues to flow through the anti-parallel diode of the switch Q1 or Q2, preventing the converter voltage from inverting, resulting in an error in the converter voltage. The converter voltage error may cause an overcurrent to flow or current distortion. For this reason, the voltage command value for the converter voltage is corrected to reduce the converter voltage error. However, the converter voltage error changes depending on the circuit state. Specifically, the converter voltage error is calculated by the current i Ｌ More specifically, when the switches Q3 and Q4 are disabled, the error Δv ｉｎｖ is the voltage v ｃ , time tｄ , switching frequency f ｓｗ and current i Ｌ This is because the dead time error occurs due to the conduction of the anti-parallel diode of switch Q1 or Q2 during the dead time period. When switches Q3 and Q4 are enabled, the error Δv ｉｎｖ is the current i Ｌ , inductance value L ｓｕｂ , switching frequency f ｓｗ , time T ｏｖｅｒｒａｐ , voltage v ｃ and current i Ｌ Note that when switches Q3 and Q4 are enabled, T ｏｖｅｒｒａｐ If = 0, the error Δv ｉｎｖ can be expressed as the following equation 3. In FIG. ｏｖｅｒｒａｐ Error Δv when ｉｎｖ This is because a voltage error occurs due to the conduction of the anti-parallel diode of the switch Q1 or Q2 during the period from the start of the dead time period until the completion of excitation of the inductor L2. ｏｖｅｒｒａｐ By providing this, the excitation of the inductor L2 starts before the start of the dead time, thereby reducing the conduction time of the anti-parallel diode.

[0052]

[0053]

[0054]

[0055] Therefore, in order to reduce the error in the converter voltage, the control circuit 20 calculates a correction value for correcting the error in the converter voltage and adds the correction value to a voltage command value for the converter voltage. Note that there may be a case where the auxiliary circuit 12 fails and the switches Q3 and Q4 are disabled. Because the manner in which the error in the converter voltage occurs differs depending on whether the switches Q3 and Q4 are enabled or disabled, as shown in FIG. 3 , the control circuit 20 may have a function of switching the correction value to be added to the voltage command value depending on whether the switches Q3 and Q4 are switching. Specifically, when the switches Q3 and Q4 are switching, i.e., when the switches Q3 and Q4 are enabled, the correction value for reducing the error in the converter voltage that occurs when the switches Q3 and Q4 are enabled is added to the voltage command value. Furthermore, when the switches Q3 and Q4 are not switching, i.e., when the switches Q3 and Q4 are disabled, the correction value for reducing the error in the converter voltage that occurs when the switches Q3 and Q4 are disabled is added to the voltage command value.

[0056] Next, first to fourth examples of the operation of the power conversion device 1 (control circuit 20) according to the first embodiment will be described. First, a first example of the operation of the power conversion device 1 according to the first embodiment will be described with reference to FIG. 4A .

[0057] 4A is a diagram for explaining a first example of the operation of the power conversion device 1 according to the first embodiment. Ｌ and current i Ｌｓｕｂ , the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q4 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current i Ｌ and current i Ｌｓｕｂ is shown by a solid line, and the current i Ｌ and current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｄ is indicated by a solid arrow, and the time T ｄ is indicated by a dashed arrow. In FIG. Ｌ >0, time T ｄ is variable, Tｏｖｅｒｒａｐ = 0. Also, i Ｌ If >0, switch Q3 is in the off state.

[0058] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N1 becomes a voltage corresponding to the voltage command value, and as shown in FIG. 4A , switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q2 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q2, switching loss increases. Therefore, it is necessary to turn on switch Q2 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0059] Therefore, when the switch Q4 is turned on, a current is drawn from the node N1 to the inductor L2. In other words, the inductor L2 is excited. Ｌ >0, time T ｄ is variable, T ｏｖｅｒｒａｐ If .times. ... Ｌｓｕｂ Increasingly, i Ｌｓｕｂ = i Ｌ After this state is reached, the charge accumulated in the parasitic capacitance of the switch Q2 is extracted. Note that no current flows through the switch Q4 until it is turned on, and the current through the switch Q4 increases via the inductor L2 after it is turned on, achieving ZCS (zero current switching) of the switch Q4.

[0060] Next, a second example of the operation of the power conversion device 1 according to the first embodiment will be described with reference to FIG. 4B.

[0061] 4B is a diagram for explaining a second example of the operation of the power conversion device 1 according to the first embodiment. Ｌ and current i Ｌｓｕｂ, the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q3 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current i Ｌ and current i Ｌｓｕｂ is shown by a solid line, and the current i Ｌ and current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｄ is indicated by a solid arrow, and the time T ｄ is indicated by a dashed arrow. In FIG. Ｌ <0, time T ｄ is variable, T ｏｖｅｒｒａｐ = 0. Also, i Ｌ If <0, switch Q4 is in the OFF state.

[0062] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N1 becomes a voltage corresponding to the voltage command value, and as shown in FIG. 4B , switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q1 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q1, switching loss increases. Therefore, it is necessary to turn on switch Q1 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0063] Therefore, when the switch Q3 is turned on, a current is drawn from the node N1 to the inductor L2. In other words, the inductor L2 is excited. Ｌ <0, time T ｄ is variable, T ｏｖｅｒｒａｐ If .times. ... Ｌｓｕｂ decreases (current i Ｌｓｕｂ The absolute value of increases, i Ｌｓｕｂ = i ＬAfter this state is reached, the charge accumulated in the parasitic capacitance of the switch Q1 is extracted. Note that no current flows through the switch Q3 until the switch Q3 is turned on, and the current through the switch Q3 gradually increases via the inductor L2 after the switch Q3 is turned on, thereby achieving ZCS of the switch Q3.

[0064] Next, a third example of the operation of the power conversion device 1 according to the first embodiment will be described with reference to FIG. 5A.

[0065] 5A is a diagram for explaining a third example of the operation of the power conversion device 1 according to the first embodiment. Ｌ and current i Ｌｓｕｂ , the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q4 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current i Ｌ and current i Ｌｓｕｂ is shown by a solid line, and the current i Ｌ and current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｏｖｅｒｒａｐ and the sum of the overlap time and the dead time T ｄ +T ｏｖｅｒｒａｐ is indicated by a solid arrow, and the time T ｏｖｅｒｒａｐ and the total value T ｄ +T ｏｖｅｒｒａｐ is indicated by a dashed arrow. Whether the load is heavy or light, the time T ｄ is indicated by a solid arrow. In FIG. Ｌ >0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ is variable. Ｌ If >0, switch Q3 is in the off state.

[0066] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N1 becomes a voltage corresponding to the voltage command value, and as shown in FIG. 5A , switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q2 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q2, switching loss increases. Therefore, it is necessary to turn on switch Q2 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0067] Therefore, when the switch Q4 is turned on, a current is drawn from the node N1 to the inductor L2. In other words, the inductor L2 is excited. Ｌ >0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ When the current i is variable, the control circuit 20 turns on the switch Q4 before turning off the switch Q1. As a result, as shown in FIG. 5A, the current i Ｌｓｕｂ Increasingly, i Ｌｓｕｂ = i Ｌ After this state is reached, the charge accumulated in the parasitic capacitance of the switch Q2 is extracted. Note that no current flows through the switch Q4 until the switch Q4 is turned on, and the current through the switch Q4 gradually increases via the inductor L2 after the switch Q4 is turned on, thereby achieving ZCS of the switch Q4.

[0068] Next, a fourth example of the operation of the power conversion device 1 according to the first embodiment will be described with reference to FIG. 5B.

[0069] 5B is a diagram for explaining a fourth example of the operation of the power conversion device 1 according to the first embodiment. Ｌ and current i Ｌｓｕｂ , the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q3 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current i Ｌ and current i Ｌｓｕｂ is shown by a solid line, and the current iＬ and current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｏｖｅｒｒａｐ and the sum of the overlap time and the dead time T ｄ +T ｏｖｅｒｒａｐ is indicated by a solid arrow, and the time T ｏｖｅｒｒａｐ and the total value T ｄ +T ｏｖｅｒｒａｐ is indicated by a dashed arrow. Whether the load is heavy or light, the time T ｄ is indicated by a solid arrow. In FIG. 5B, i Ｌ <0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ is variable. Ｌ If <0, switch Q4 is in the OFF state.

[0070] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N1 becomes a voltage corresponding to the voltage command value, and as shown in FIG. 5B , switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q1 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q1, switching loss increases. Therefore, it is necessary to turn on switch Q1 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0071] Therefore, when the switch Q3 is turned on, a current is drawn from the node N1 to the inductor L2. In other words, the inductor L2 is excited. Ｌ <0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ When the current i is variable, the control circuit 20 turns on the switch Q3 before turning off the switch Q2. As a result, as shown in FIG. 5B, the current i Ｌｓｕｂ Increasingly, i Ｌｓｕｂ = i ＬAfter this state is reached, the charge accumulated in the parasitic capacitance of the switch Q1 is extracted. Note that no current flows through the switch Q3 until the switch Q3 is turned on, and the current through the switch Q3 gradually increases via the inductor L2 after the switch Q3 is turned on, thereby achieving ZCS of the switch Q3.

[0072] In this way, ZVS can be achieved by adjusting the dead time or by adjusting both the dead time and the overlap time, although as mentioned above, providing the dead time causes an error in the converter voltage.

[0073] Since the error in the converter voltage changes in accordance with changes in the current flowing through inductor L1 as a result of changes in the circuit state, control circuit 20 calculates a correction value for correcting the error in the converter voltage based on the current flowing through inductor L1 and adds the correction value to the voltage command value.

[0074] Furthermore, the converter voltage error changes in accordance with changes in the current flowing through inductor L1 as a change in the circuit state, as well as changes in the voltage across the second input / output terminal pair and changes in the switching frequency, and also changes in accordance with the inductance value of inductor L2. Therefore, the control circuit 20 calculates a correction value based on the current flowing through inductor L1, the voltage across the second input / output terminal pair, the switching frequency, and the inductance value of inductor L2, and adds the calculated correction value to the voltage command value, thereby enabling the converter voltage error to be reduced with high precision.

[0075] Furthermore, when the switches Q3 and Q4 are switched, the converter voltage error increases as the absolute value of the current flowing through inductor L1, the switching frequency, and the inductance value of inductor L2 increase, as shown in the above equations 2 and 3, and the polarity of the error depends on the polarity of the current flowing through inductor L1. Therefore, when the switches Q3 and Q4 are switched, the control circuit 20 increases the absolute value of the correction value as the absolute value of the current flowing through inductor L1, the switching frequency, or the inductance value of inductor L2 increases, and determines the polarity of the correction value when adding the correction value to the voltage command value depending on the polarity of the current flowing through inductor L1, thereby enabling the converter voltage error to be reduced with high accuracy.

[0076] Furthermore, when the switches Q3 and Q4 are switched, the error in the converter voltage is in a linear function relationship with the absolute value of the current flowing through the inductor L1, the switching frequency, and the inductance value of the inductor L2, as shown in the above equations 2 and 3. Therefore, when the switches Q3 and Q4 are switched, the control circuit 20 calculates the correction value so that the correction value is in a linear function relationship with the current flowing through the inductor L1, the switching frequency, or the inductance value of the inductor L2, thereby enabling the error in the converter voltage to be reduced with high accuracy.

[0077] Furthermore, when switches Q3 and Q4 are switched, the error in the converter voltage changes according to the change in the overlap time, as shown in the above equation 2. Furthermore, as shown in the above equation 2, the error in the converter voltage decreases as the overlap time increases, and increases as the voltage between the second input / output terminal pair and the switching frequency increase. Therefore, when switching switches Q3 and Q4, control circuit 20 calculates a correction value based on the overlap time, and decreases the absolute value of the correction value as the overlap time increases, or increases the absolute value of the correction value as the voltage between the second input / output terminal pair or the switching frequency increases, thereby enabling the error in the converter voltage to be reduced with high accuracy.

[0078] Furthermore, when the switches Q3 and Q4 are switched, the error in the converter voltage has a linear function relationship with respect to the overlap time, the switching frequency, and the inductance value of inductor L2, as shown in the above equation 2. Therefore, when the switches Q3 and Q4 are switched, the control circuit 20 calculates a correction value such that the correction value has a linear function relationship with respect to the overlap time, the switching frequency, or the inductance value of inductor L2, thereby enabling the error in the converter voltage to be reduced with high accuracy.

[0079] Furthermore, when the switching of switches Q3 and Q4 is stopped, the error in the converter voltage increases as the voltage across the second input / output terminal pair or the switching frequency increases, as shown in the above equation 1, and the polarity of the error depends on the polarity of the current flowing through the main inductor. Therefore, when the switching of switches Q3 and Q4 is stopped, control circuit 20 increases the absolute value of the correction value as the voltage across the second input / output terminal pair or the switching frequency increases, and determines the polarity of the correction value when adding the correction value to the voltage command value depending on the polarity of the current flowing through inductor L1, thereby enabling the error in the converter voltage to be reduced with high accuracy.

[0080] As shown in the above equations 1, 2 and 3, the error in the converter voltage differs when the auxiliary circuit 12 is not operating and when it is operating, and the correction value also differs in each case. Therefore, by switching the correction value depending on whether the switches Q3 and Q4 of the auxiliary circuit 12 are switching or not, the error in the converter voltage can be accurately reduced even if the state of the auxiliary circuit 12 changes.

[0081] For example, the correction value v when the switching of the switches Q3 and Q4 is stopped is ｉｎｖ＿ｃｏｍ * can be expressed as the following equation 4, and the correction value v when the switches Q3 and Q4 are switched is ｉｎｖ＿ｃｏｍ * can be expressed as the following equation 5. Furthermore, the switches Q3 and Q4 are switched, and T ｏｖｅｒｒａｐ Correction value v when ｉｎｖ＿ｃｏｍ * can be expressed as in the following Equation 6.

[0082]

[0083]

[0084]

[0085] As described above, the error in the converter voltage derived from the potential of the intermediate node between inductor L1 and inductor L2 changes in response to changes in the current flowing through inductor L1 as a result of changes in the circuit state. Therefore, the converter voltage error can be reduced by adding a correction value for correcting the converter voltage error, calculated based on the current flowing through inductor L1, to the voltage command value for the converter voltage. Therefore, the converter voltage error can be reduced even when the circuit state changes.

[0086] Fig. 6A is a diagram for explaining that the error in the converter voltage can be reduced when the auxiliary circuit 12 is operating. Fig. 6B is a diagram for explaining that the error in the converter voltage can be reduced when the auxiliary circuit 12 is not operating. Fig. 6A and Fig. 6B show, from top to bottom, the current flowing through inductor L1, the correction value, the error in the converter voltage, and the voltage of capacitor C1.

[0087] 6A and 6B, it can be seen that the converter voltage error varies depending on the current flowing through inductor L1 whether the auxiliary circuit 12 is operating or not. It can also be seen that the error is reduced whether the auxiliary circuit 12 is operating or not by adding a correction value for correcting the converter voltage error, which is calculated based on the current flowing through inductor L1, to the voltage command value.

[0088] Second Embodiment Next, a power conversion device according to a second embodiment will be described.

[0089] FIG. 7 is a circuit configuration diagram showing an example of a power conversion device 2 according to the second embodiment.

[0090] In the power conversion device 2, the arrangement of the components of the switch group 10 differs from that of the switch group 10 included in the power conversion device 1 according to the first embodiment. Specifically, in the power conversion device 2 shown in FIG. 7 , node N2, which is one of nodes N1 and N2, is connected to terminal t1, which is one terminal of the first input / output terminal pair. As a result, in the second embodiment, when switch Q3 or Q4 is turned on, the current flowing through inductor L2 flows to switch Q3 or Q4, which is in the on state, and inductor L2 is demagnetized. Also, in the second embodiment, the intermediate node between inductor L1 and inductor L2 is node N2, and the converter voltage is the voltage at node N2 between inductor L1 and inductor L2 with respect to the intermediate node between diode D1 and diode D2.

[0091] The error of the voltage converter in the second embodiment is basically the same as that in the first embodiment, but when the switches Q3 and Q4 are enabled, the error Δv ｉｎｖ The derivation formula of is partially different from the above formula 2. In the second embodiment, the error Δv ｉｎｖ can be expressed as the following equation 7. Note that the inductance value of the inductor L1 is the inductance value L ｍａｉｎ Let's say.

[0092]

[0093] Other points are the same as those in the first embodiment, and therefore description thereof will be omitted.

[0094] First to fourth examples of the operation of the power conversion device 2 (control circuit 20) according to the second embodiment will be described below. First, a first example of the operation of the power conversion device 2 according to the second embodiment will be described with reference to FIG. 8A .

[0095] 8A is a diagram for explaining a first example of the operation of the power conversion device 2 according to the second embodiment. Ｌ and current i Ｌｓｕｂ , the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q4 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current iＬ and current i Ｌｓｕｂ is shown by a solid line, and the current i Ｌ and current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｄ is indicated by a solid arrow, and the time T ｄ is indicated by a dashed arrow. In FIG. Ｌ >0, time T ｄ is variable, T ｏｖｅｒｒａｐ = 0. Also, i Ｌ If >0, switch Q3 is in the off state.

[0096] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N2 becomes a voltage corresponding to the voltage command value. As shown in FIG. 8A, switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q2 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q2, switching loss increases. Therefore, it is necessary to turn on switch Q2 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0097] Therefore, when the switch Q4 is turned on, the current flowing through the inductor L2 is drawn to the switch Q4. In other words, the inductor L2 is demagnetized. Ｌ >0, time T ｄ is variable, T ｏｖｅｒｒａｐ If .times. ... Ｌｓｕｂ decreases, and i Ｌｓｕｂ = 0, the charge accumulated in the parasitic capacitance of the switch Q2 is extracted. Note that no current flows through the switch Q4 until the switch Q4 is turned on, and the current through the switch Q4 gradually increases via the inductor L2 after the switch Q4 is turned on, thereby achieving ZCS of the switch Q4.

[0098] Next, a second example of the operation of the power conversion device 2 according to the second embodiment will be described with reference to FIG. 8B.

[0099] 8B is a diagram for explaining a second example of the operation of the power conversion device 2 according to the second embodiment. Ｌ and current i Ｌｓｕｂ , the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q3 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current i Ｌ and current i Ｌｓｕｂ is shown by a solid line, and the current i Ｌ and current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｄ is indicated by a solid arrow, and the time T ｄ is indicated by a dashed arrow. In FIG. Ｌ <0, time T ｄ is variable, T ｏｖｅｒｒａｐ = 0. Also, i Ｌ If <0, switch Q4 is in the OFF state.

[0100] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N2 becomes a voltage corresponding to the voltage command value, and as shown in FIG. 8B , switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q1 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q1, switching loss increases. Therefore, it is necessary to turn on switch Q1 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0101] Therefore, when the switch Q3 is turned on, the current flowing through the inductor L2 is drawn to the switch Q3. In other words, the inductor L2 is demagnetized. Ｌ <0, time T ｄ is variable, T ｏｖｅｒｒａｐIf .times. ... Ｌｓｕｂ increases (current i Ｌｓｕｂ The absolute value of decreases), i Ｌｓｕｂ = 0, the charge accumulated in the parasitic capacitance of the switch Q1 is extracted. Note that no current flows through the switch Q3 until the switch Q3 is turned on, and the current through the switch Q3 gradually increases via the inductor L2 after the switch Q3 is turned on, thereby achieving ZCS of the switch Q3.

[0102] Next, a third example of the operation of the power conversion device 2 according to the second embodiment will be described with reference to FIG. 9A.

[0103] 9A is a diagram for explaining a third example of the operation of the power conversion device 2 according to the second embodiment. Ｌ and current i Ｌｓｕｂ , the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q4 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current i Ｌ and current i Ｌｓｕｂ is shown by a solid line, and the current i Ｌ and current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｏｖｅｒｒａｐ and the sum of the overlap time and the dead time T ｄ +T ｏｖｅｒｒａｐ is indicated by a solid arrow, and the time T ｏｖｅｒｒａｐ and the total value T ｄ +T ｏｖｅｒｒａｐ is indicated by a dashed arrow. Whether the load is heavy or light, the time T ｄ is indicated by a solid arrow. In FIG. Ｌ >0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ is variable. Ｌ If >0, switch Q3 is in the off state.

[0104] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N2 becomes a voltage corresponding to the voltage command value, and as shown in Fig. 9A, switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q2 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q2, switching loss increases. Therefore, it is necessary to turn on switch Q2 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0105] Therefore, when the switch Q4 is turned on, the current flowing through the inductor L2 is drawn to the switch Q4. In other words, the inductor L2 is demagnetized. Ｌ >0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ When the current i is variable, the control circuit 20 turns on the switch Q4 before turning off the switch Q1. As a result, as shown in FIG. 9A, the current i Ｌｓｕｂ decreases, and i Ｌｓｕｂ = 0, the charge accumulated in the parasitic capacitance of the switch Q2 is extracted. Note that no current flows through the switch Q4 until the switch Q4 is turned on, and the current through the switch Q4 gradually increases via the inductor L2 after the switch Q4 is turned on, thereby achieving ZCS of the switch Q4.

[0106] Next, a fourth example of the operation of the power conversion device 2 according to the second embodiment will be described with reference to FIG. 9B.

[0107] 9B is a diagram for explaining a fourth example of the operation of the power conversion device 2 according to the second embodiment. Ｌ and current i Ｌｓｕｂ , the gate signals of the switches Q1 and Q2, and the gate signal of the switch Q3 are shown. In addition, when the load connected to the capacitor C1 is a heavy load, the current i Ｌ and current i Ｌｓｕｂ is shown by a solid line, and the current i Ｌand current i Ｌｓｕｂ is shown by a dashed line. In addition, when the load connected to the capacitor C1 is a heavy load, the time T ｏｖｅｒｒａｐ and the sum of the overlap time and the dead time T ｄ +T ｏｖｅｒｒａｐ is indicated by a solid arrow, and the time T ｏｖｅｒｒａｐ and the total value T ｄ +T ｏｖｅｒｒａｐ is indicated by a dashed arrow. Whether the load is heavy or light, the time T ｄ is indicated by a solid arrow. In FIG. 9B, i Ｌ <0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ is variable. Ｌ If <0, switch Q4 is in the OFF state.

[0108] The duty ratios of switches Q1 and Q2 are adjusted by PWM control unit 22 so that the converter voltage at node N2 becomes a voltage corresponding to the voltage command value, and as shown in FIG. 9B , switches Q1 and Q2 are alternately turned on at the adjusted duty ratios, thereby converting the input voltage into a predetermined voltage. However, a dead time is determined by determination unit 23 so that switches Q1 and Q2 are not turned on simultaneously. Furthermore, if switch Q1 is turned on after the dead time has elapsed while charge is accumulated in the parasitic capacitance of switch Q1, switching loss increases. Therefore, it is necessary to turn on switch Q1 with as little charge accumulated as possible, i.e., to achieve ZVS.

[0109] Therefore, when the switch Q3 is turned on, the current flowing through the inductor L2 is drawn to the switch Q3. In other words, the inductor L2 is demagnetized. Ｌ <0, time T ｄ is fixed, time T ｏｖｅｒｒａｐ When the current i is variable, the control circuit 20 turns on the switch Q3 before turning off the switch Q2. As a result, as shown in FIG. Ｌｓｕｂ increases (current i Ｌｓｕｂ The absolute value of decreases), i Ｌｓｕｂ= 0, the charge accumulated in the parasitic capacitance of the switch Q1 is extracted. Note that no current flows through the switch Q3 until the switch Q3 is turned on, and the current through the switch Q3 gradually increases via the inductor L2 after the switch Q3 is turned on, thereby achieving ZCS of the switch Q3.

[0110] In this way, ZVS is achieved by adjusting the dead time or by adjusting both the dead time and the overlap time. However, as described above, an error occurs in the converter voltage when the anti-parallel diode of switch Q1 or Q2 conducts during the dead time. Since the converter voltage error in the second embodiment is the same as that in the first embodiment, the converter voltage error can be reduced by calculating a correction value in the same way as in the first embodiment and adding the calculated correction value to the voltage command value.

[0111] Third Embodiment Next, a power conversion device according to a third embodiment will be described.

[0112] The power conversion device according to the third embodiment differs from the power conversion device according to the first or second embodiment in that it includes a control circuit 20a instead of the control circuit 20. Since the other points are the same as those in the first or second embodiment, the description thereof will be omitted. The control circuit 20a may be applied to the circuit configuration of the first embodiment or the circuit configuration of the second embodiment.

[0113] FIG. 10 is a block diagram showing an example of a control circuit 20a according to the third embodiment.

[0114] The control circuit 20a controls the switch group 10. Specifically, the control circuit 20a controls the switching of the switches Q1, Q2, Q3, and Q4. For example, the control circuit 20a controls a gate drive circuit (not shown) connected to the gates of the switches Q1, Q2, Q3, and Q4, thereby controlling the switching of the switches Q1, Q2, Q3, and Q4.

[0115] The control circuit 20a adjusts the overlap time based on the current flowing through the inductor L1, the voltage across the second input / output terminal pair, and the inductance value of the inductor L2 to reduce an error in the converter voltage derived from the potential of the intermediate node between the inductors L1 and L2. In the circuit configuration of the first embodiment, the intermediate node between the inductors L1 and L2 is the node N1, and the converter voltage is the voltage at the node N1 between the inductors L1 and L2 with respect to the intermediate node between the diodes D1 and D2. In the circuit configuration of the second embodiment, the intermediate node between the inductors L1 and L2 is the node N2, and the converter voltage is the voltage at the node N2 between the inductors L1 and L2 with respect to the intermediate node between the diodes D1 and D2.

[0116] In addition, the control circuit 20a turns on the first auxiliary switch before turning off the first main switch or simultaneously with turning off the first main switch. Then, the control circuit 20a turns off the first main switch after the overlap time has elapsed. Then, the control circuit 20a turns on the second main switch after the dead time has elapsed, and then turns off the first auxiliary switch. The definitions of the first main switch, first auxiliary switch, second main switch, overlap period, and dead time are the same as those in the first or second embodiment.

[0117] 10 , the control circuit 20a includes a voltage command value generating unit 21a, a PWM control unit 22a, and a determining unit 23a. The control circuit 20a is realized by a computer including, for example, a processor (microprocessor) and a memory. The memory may be a ROM or RAM, and can store a program executed by the processor. The voltage command value generating unit 21a, the PWM control unit 22a, and the determining unit 23a are realized by, for example, the processor that executes a program stored in the memory.

[0118] The voltage command value generator 21a generates a voltage command value for making the voltage of the capacitor C1 (the voltage between the terminals t3 and t4) a target voltage. The voltage command value is a command value for the converter voltage. For example, the voltage command value generator 21a generates a voltage command value for making the AC voltage v of the voltage source 100 ａｃ , the current i flowing through the inductor L1 Ｌ and the voltage v of the capacitor C1 ｃ The voltage command value generating unit 21a generates a voltage command value based on the above formula (1), and outputs the generated voltage command value to the PWM control unit 22a.

[0119] The PWM control unit 22a generates PWM signals for controlling the switching of the switches Q1 and Q2 and the switches Q3 and Q4 based on the voltage command value output from the voltage command value generation unit 21a.

[0120] The determining unit 23a determines the overlap time and the dead time. The dead time may be set in advance, and the determining unit 23a may determine the dead time to be a value set in advance. The determining unit 23a also determines the current i flowing through the inductor L1. Ｌ , the voltage v between the second input / output terminal pair ｃ and the inductance value L of the inductor L2 ｓｕｂ The overlap time is determined by adjusting the overlap time based on the

[0121] For example, the power conversion device may be provided with an ammeter and a voltmeter, and the voltage command value generating unit 21 a and the determining unit 23 a may calculate the current i measured by the ammeter. Ｌ and the voltage measured by the voltmeter, v ｃ Alternatively, the voltage command value generating unit 21a and the determining unit 23a may obtain the current i Ｌ The command value and voltage v ｃ By obtaining the command value for outputting the current i Ｌ and voltage v ｃ For example, the inductance value L ｓｕｂ may be corrected based on the DC superposition characteristics.

[0122] The determination unit 23a reflects the determined overlap time and dead time in the PWM signal generated by the PWM control unit 22a, and outputs the PWM signal for the switches Q1 and Q2, on which the overlap time and dead time are reflected, as a main switch gate signal to the gates of the switches Q1 and Q2, and outputs the PWM signal for the switches Q3 and Q4, on which the overlap time and dead time are reflected, as an auxiliary switch gate signal to the gates of the switches Q3 and Q4.

[0123] As shown in the above equation 2 or equation 7, the converter voltage error includes a first term including the current flowing through inductor L1, the voltage between the second input / output terminal pair, and the inductance value of inductor L2, and a second term including the overlap time.

[0124] The first term included in the converter voltage error increases as the absolute value of the current flowing through inductor L1 and the inductance value of inductor L2 increase, and decreases as the voltage across the second input / output terminal pair increases. Therefore, the control circuit 20a increases the overlap time included in the second term as the absolute value of the current flowing through inductor L1 increases, or decreases it as the voltage across the second input / output terminal pair increases, or increases it as the inductance value of inductor L2 increases, thereby reducing the sum of the first term and the second term and enabling accurate reduction of the converter voltage error.

[0125] The above formula 2 or formula 7 can be rearranged as the following formula 8.

[0126]

[0127] Therefore, for example, the control circuit 20a may adjust the overlap time to a value within the value expressed by the following equation 9. Alternatively, the control circuit 20a may adjust the overlap time to a value expressed by the following equation 9.

[0128]

[0129] This makes it possible to make the sum of the first term and the second term approximately zero, and to make the error in the converter voltage approximately zero.

[0130] As described above, the converter voltage error derived from the potential of the intermediate node between inductor L1 and inductor L2 includes a first term including the current flowing through inductor L1, the voltage across the second input / output terminal pair, and the inductance value of inductor L2, and a second term including the overlap time. The converter voltage error changes in response to changes in the current flowing through inductor L1 as a result of changes in the circuit state. However, by adjusting the overlap time based on the current flowing through inductor L1, the voltage across the second input / output terminal pair, and the inductance value of inductor L2, the sum of the first and second terms (i.e., the converter voltage error) can be reduced even when the circuit state, such as the current flowing through inductor L1, the voltage across the second input / output terminal pair, or the inductance value of inductor L2, changes. Therefore, the converter voltage error can be reduced even when the circuit state changes.

[0131] (Application Examples) Next, application examples of the power conversion device according to the first, second or third embodiment will be described with reference to Figs. 11 to 15 .

[0132] 11 to 15 are diagrams illustrating application examples of the power conversion device according to the first, second, or third embodiment.

[0133] For example, the power conversion device according to the first or second embodiment may be a bidirectional chopper that exchanges power between batteries, as shown in FIG. 11 . In the power conversion device shown in FIG. 11 , the switch group 10 is connected to both of the first input / output terminal pair. Specifically, the source of the switch A1 and the drain of the switch A2 in the switch group 10 are connected to one terminal of the first input / output terminal pair (the terminal connected to one end of the inductor L1), and the source of the switch A2 and the source of the switch A4 in the switch group 10 are connected to the other terminal of the first input / output terminal pair (the terminal connected to the other end of the inductor L1). When the power conversion device 1 according to the first embodiment is applied to the circuit shown in FIG. 11 , the switches A1 and A2 become switches Q1 and Q2, and the switches A3 and A4 become switches Q3 and Q4. When the power conversion device 2 according to the second embodiment is applied to the circuit shown in FIG. 11 , the switches A1 and A2 become switches Q3 and Q4, and the switches A3 and A4 become switches Q1 and Q2. The same applies to FIGS. 12 to 15.

[0134] As shown in FIGS. 12 to 15 , the power conversion device may include a plurality of switch groups 10 .

[0135] For example, the power conversion apparatus according to the first, second, or third embodiment may be a grid-connected power conditioning system (PCS) (single-phase full bridge) that converts AC to DC as shown in FIG. 12 . For example, the power conversion apparatus according to the first, second, or third embodiment may be a single-phase full bridge (inductive load) as shown in FIG. 13 . For example, the power conversion apparatus according to the first, second, or third embodiment may be a bidirectional multifunction chopper that exchanges power between batteries as shown in FIG. 14 . For example, the power conversion apparatus according to the first, second, or third embodiment may be a grid-connected three-phase PCS (three-phase full bridge) that converts AC to DC as shown in FIG. 15 .

[0136] (Other Embodiments) As described above, the embodiments have been described as examples of the technology according to the present disclosure. However, the technology according to the present disclosure is not limited to these, and can be applied to embodiments in which modifications, substitutions, additions, omissions, etc. are made as appropriate. For example, the following modifications are also included in one embodiment of the present disclosure.

[0137] For example, the present disclosure can be realized not only as a power conversion device, but also as a control method including steps (processing) performed by components (for example, control circuits 20, 20a) that make up the power conversion device.

[0138] 16 and 17 are flowcharts showing examples of control methods according to other embodiments.

[0139] The control method is a control method for a power conversion apparatus, the power conversion apparatus including: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; and a switch group connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair, the switch group having a main switch unit and an auxiliary circuit, the main switch unit being a half-bridge circuit including two main switches connected in series, the auxiliary circuit having an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit being connected to each other and to one terminal of the second input / output terminal pair, a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit being connected to each other and to the other terminal of the second input / output terminal pair, the auxiliary inductor being connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, and one of the first intermediate node and the second intermediate node being connected to a first input / output terminal The control method, as shown in FIG. 16 , calculates a correction value for correcting an error in the converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor based on the current flowing in the main inductor (step S11), adds the correction value to a voltage command value for the converter voltage (step S12), turns on the first auxiliary switch of the two auxiliary switches, which is on and through which a forward current flows, before turning off the first main switch of the two main switches, which is on and through which a reverse current flows, or at the same time as turning off the first main switch (step S13), turns off the first main switch after an overlap time during which both the first main switch and the first auxiliary switch are on (step S14), turns on the second main switch of the two main switches, which is on and through which a forward current flows, after a dead time during which both main switches are off (step S15), and then turns off the first auxiliary switch (step S16).

[0140] a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit are connected to each other and to one terminal of the second input / output terminal pair; a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit are connected to each other and to the other terminal of the second input / output terminal pair; the auxiliary inductor is connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches; and one of the first intermediate node and the second intermediate node is connected to the first input / output terminal pair. The control method, as shown in FIG. 17 , adjusts an overlap time, which is the time during which both the first main switch, through which a reverse current flows in the on state, and the first auxiliary switch, through which a forward current flows in the on state, of the two auxiliary switches, are on, based on the current flowing in the main inductor, the voltage across the second input / output terminal pair, and the inductance value of the auxiliary inductor, so as to reduce an error in the converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor (step S21). The first auxiliary switch is turned on before or simultaneously with the turning off of the first main switch (step S22). After the overlap time has elapsed, the first main switch is turned off (step S23). After a dead time, which is the time during which both main switches are off, the second main switch, through which a forward current flows in the on state, is turned on (step S24), and then the first auxiliary switch is turned off (step S25).

[0141] For example, the present disclosure can be realized as a program for causing a computer (processor) to execute steps included in the control method. Furthermore, the present disclosure can be realized as a non-transitory computer-readable recording medium, such as a CD-ROM, on which the program is recorded.

[0142] For example, when the present disclosure is realized as a program (software), each step is performed by running the program using hardware resources such as a computer's CPU, memory, input / output circuits, etc. In other words, each step is performed by the CPU acquiring data from memory or input / output circuits, etc., performing calculations, and outputting the calculation results to memory or input / output circuits, etc.

[0143] In the above-described embodiments, each component included in the power conversion device may be configured with dedicated hardware, or may be realized by executing a software program suitable for each component. Each component may be realized by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0144] Some or all of the functions of the power conversion device according to the above-described embodiments are typically realized as an LSI, which is an integrated circuit. These may be individually integrated into a single chip, or some or all of them may be integrated into a single chip. Furthermore, the integrated circuit is not limited to an LSI, and may be realized using a dedicated circuit or a general-purpose processor. An FPGA (Field Programmable Gate Array) that can be programmed after LSI manufacturing, or a reconfigurable processor that can reconfigure the connections and settings of circuit cells within the LSI, may also be used.

[0145] Furthermore, if an integrated circuit technology that can replace LSI emerges due to advances in semiconductor technology or other derivative technologies, that technology may naturally be used to integrate the components included in the power conversion device.

[0146] In addition, this disclosure also includes forms obtained by making various modifications to the embodiments that a person skilled in the art would think of, and forms realized by arbitrarily combining the components and functions in each embodiment within the scope of the present disclosure.

[0147] (Additional Notes) The above description of the embodiments discloses the following techniques.

[0148] (Technology 1) A power supply comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair; and a control circuit controlling the group of switches, wherein the group of switches has a main switch unit and an auxiliary circuit, the main switch unit is a half-bridge circuit including two main switches connected in series, the auxiliary circuit has an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit are connected to each other and to one terminal of the second input / output terminal pair, a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit are connected to each other and to the other terminal of the second input / output terminal pair, the auxiliary inductor is connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, and and one of the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control circuit calculates a correction value for correcting an error in a converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor, based on the current flowing in the main inductor, and adds the correction value to a voltage command value for the converter voltage. Before turning off a first main switch of the two main switches, through which a reverse current flows in an on state, or at the same time as turning off the first main switch, the control circuit turns on a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, and turns off the first main switch after an overlap time, during which the first main switch and the first auxiliary switch are both in an on state, has elapsed, and after a dead time, during which the two main switches are both in an off state, has elapsed, the control circuit turns on a second main switch of the two main switches, through which a forward current flows in an on state, and then turns off the first auxiliary switch.

[0149] The converter voltage error changes in response to changes in the current flowing through the main inductor as a result of changes in the circuit state. Therefore, the converter voltage error can be reduced by adding a correction value for correcting the converter voltage error, calculated based on the current flowing through the main inductor, to the voltage command value for the converter voltage. Therefore, the converter voltage error can be reduced even when the circuit state changes.

[0150] (Technology 2) The power conversion device according to Technology 1, wherein the control circuit calculates the correction value based on the current flowing through the main inductor, the voltage between the second input / output terminal pair, the switching frequencies of the two main switches, and the inductance value of the auxiliary inductor.

[0151] The converter voltage error changes in response to changes in the current flowing through the main inductor as a change in the circuit state, as well as changes in the voltage across the second input / output terminal pair and changes in the switching frequency, and also changes in response to the inductance value of the auxiliary inductor that constitutes the circuit. Therefore, by adding a correction value calculated based on the current flowing through the main inductor, the voltage across the second input / output terminal pair, the switching frequency, and the inductance value of the auxiliary inductor to the voltage command value, the converter voltage error can be reduced with high precision.

[0152] (Technology 3) In the power conversion device according to Technology 1 or 2, when switching the two auxiliary switches, the control circuit increases the absolute value of the correction value in accordance with an increase in the absolute value of the current flowing through the main inductor, the switching frequency of the two main switches, or the inductance value of the auxiliary inductor, and determines the polarity of the correction value when adding the correction value to the voltage command value in accordance with the polarity of the current flowing through the main inductor.

[0153] When two auxiliary switches are switched, the converter voltage error increases as the absolute value of the current flowing through the main inductor, the switching frequency, and the inductance value of the auxiliary inductor increase, and the polarity of the error depends on the polarity of the current flowing through the main inductor. Therefore, by increasing the absolute value of the correction value as the absolute value of the current flowing through the main inductor, the switching frequency, or the inductance value of the auxiliary inductor increases, and determining the polarity of the correction value depending on the polarity of the current flowing through the main inductor, the converter voltage error can be reduced with high precision.

[0154] (Technology 4) In the power conversion device according to Technology 3, when the control circuit switches the two auxiliary switches, the control circuit calculates the correction value so that the correction value has a linear function relationship with the current flowing through the main inductor, the switching frequency of the two main switches, or the inductance value of the auxiliary inductor.

[0155] When two auxiliary switches are switched, the converter voltage error is in a linear function relationship with the absolute value of the current flowing through the main inductor, the switching frequency, and the inductance value of the auxiliary inductor. Therefore, by calculating the correction value so that it is in a linear function relationship with the current flowing through the main inductor, the switching frequency, or the inductance value of the auxiliary inductor, the converter voltage error can be reduced with high accuracy.

[0156] (Technology 5) A power conversion device according to any one of Techniques 1 to 4, wherein, when switching the two auxiliary switches, the control circuit further calculates the correction value based on the overlap time, and decreases the absolute value of the correction value as the overlap time increases, or increases the absolute value of the correction value as the voltage between the second input / output terminal pair or the switching frequency of the two main switches increases.

[0157] When two auxiliary switches are switched, the converter voltage error also changes according to the change in the overlap time. The converter voltage error decreases as the overlap time increases, and increases as the voltage between the second pair of input / output terminals and the switching frequency increase. Therefore, the converter voltage error can be accurately reduced by decreasing the absolute value of the correction value as the overlap time increases, or by increasing the absolute value of the correction value as the voltage between the second pair of input / output terminals or the switching frequency increases.

[0158] (Technology 6) The power conversion device according to Technology 5, wherein when switching the two auxiliary switches, the control circuit calculates the correction value so that the correction value has a linear function relationship with the overlap time, the switching frequencies of the two main switches, or the inductance value of the auxiliary inductor.

[0159] When two auxiliary switches are switched, the converter voltage error is in a linear function relationship with the overlap time, the switching frequency, and the inductance value of the auxiliary inductor. Therefore, by calculating the correction value so that the correction value is in a linear function relationship with the overlap time, the switching frequency, or the inductance value of the auxiliary inductor, the converter voltage error can be reduced with high accuracy.

[0160] (Technology 7) A power conversion device according to any one of Techniques 1 to 6, wherein, when the switching of the two auxiliary switches is stopped, the control circuit increases the absolute value of the correction value as the voltage between the second input / output terminal pair or the switching frequency of the two main switches increases, and determines the polarity of the correction value when adding the correction value to the voltage command value according to the polarity of the current flowing through the main inductor.

[0161] When the switching of the two auxiliary switches is stopped, the error in the converter voltage increases as the voltage across the second input / output terminal pair or the switching frequency increases, and the polarity of the error depends on the polarity of the current flowing through the main inductor. Therefore, by increasing the absolute value of the correction value as the voltage across the second input / output terminal pair or the switching frequency increases and determining the polarity of the correction value depending on the polarity of the current flowing through the main inductor, the error in the converter voltage can be reduced with high precision.

[0162] (Technology 8) The control circuit switches the correction value to be added to the voltage command value depending on whether the two auxiliary switches are switching. A power conversion device according to any one of techniques 1 to 7.

[0163] The converter voltage error differs depending on whether the auxiliary circuit is operating or not, and the correction value also differs in each case. Therefore, by switching the correction value depending on whether the two auxiliary switches of the auxiliary circuit are switching, the converter voltage error can be accurately reduced even if the state of the auxiliary circuit changes.

[0164] (Technology 9) A power supply comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair; and a control circuit controlling the group of switches, wherein the group of switches has a main switch unit and an auxiliary circuit, the main switch unit is a half-bridge circuit including two main switches connected in series, the auxiliary circuit has an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit are connected to each other and to one terminal of the second input / output terminal pair, a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit are connected to each other and to the other terminal of the second input / output terminal pair, the auxiliary inductor is connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, and one of the nodes is connected to one terminal of the first input / output terminal pair, and the control circuit adjusts an overlap time, which is a time during which a first main switch of the two main switches, through which a reverse current flows in an on state, and a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, are both on, based on the current flowing in the main inductor, the voltage across the second input / output terminal pair, and the inductance value of the auxiliary inductor, so as to reduce an error in a converter voltage derived from the potential of an intermediate node between the main inductor and the auxiliary inductor; the control circuit turns on the first auxiliary switch before turning off the first main switch or at the same time as turning off the first main switch, turns off the first main switch after the overlap time has elapsed, and turns on the second main switch of the two main switches, through which a forward current flows in an on state, after a dead time, which is a time during which the two main switches are both off, has elapsed, and then turns off the first auxiliary switch.

[0165] The converter voltage error includes a first term including the current flowing through the main inductor, the voltage across the second input / output terminal pair, and the inductance value of the auxiliary inductor, and a second term including the overlap time. The converter voltage error changes in response to changes in the current flowing through the main inductor as the circuit state changes. However, by adjusting the overlap time based on the current flowing through the main inductor, the voltage across the second input / output terminal pair, and the inductance value of the auxiliary inductor, the sum of the first and second terms (i.e., the converter voltage error) can be reduced even when the circuit state, such as the current flowing through the main inductor, the voltage across the second input / output terminal pair, or the inductance value of the auxiliary inductor, changes. Therefore, the converter voltage error can be reduced even when the circuit state changes.

[0166] (Technology 10) A power conversion device according to Technology 9, wherein the control circuit increases the overlap time in accordance with an increase in the absolute value of the current flowing through the main inductor, or decreases the overlap time in accordance with an increase in the voltage between the second input / output terminal pair, or increases the overlap time in accordance with an increase in the inductance value of the auxiliary inductor.

[0167] The first term included in the converter voltage error increases as the absolute value of the current flowing through the main inductor and the inductance value of the auxiliary inductor increase, and decreases as the voltage across the second input / output terminal pair increases. Therefore, by increasing the overlap time included in the second term as the absolute value of the current flowing through the main inductor increases, or by decreasing it as the voltage across the second input / output terminal pair increases, or by increasing it as the inductance value of the auxiliary inductor increases, the sum of the first term and the second term can be reduced, and the converter voltage error can be accurately reduced.

[0168] (Technology 11) The current flowing through the main inductor is i Ｌ , the voltage between the second input / output terminal pair is V ｃ , the inductance value L of the auxiliary inductor ｓｕｂ 11. The power conversion device according to claim 9, wherein the control circuit adjusts the overlap time to a value within a value expressed by the above formula 8.

[0169] In this way, by adjusting the overlap time to a value within the value expressed by the above formula 8, the error in the converter voltage can be reduced with high precision.

[0170] (Technology 12) The power conversion device according to Technology 11, wherein the control circuit adjusts the overlap time to a value expressed by Equation 8 above.

[0171] In this way, by adjusting the overlap time to the value expressed by the above formula 8, the error in the converter voltage can be reduced with high precision.

[0172] (Technology 13) The power conversion device according to any one of techniques 1 to 12, wherein the power conversion device includes a plurality of the switch groups.

[0173] Even in a power conversion device having a plurality of switch groups, errors in converter voltage can be reduced even when the circuit state changes.

[0174] (Technology 14) A control method for a power conversion device, the power conversion device comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; and a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair, the group of switches having a main switch unit and an auxiliary circuit, the main switch unit being a half-bridge circuit including two main switches connected in series, the auxiliary circuit having an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit being connected to each other and to one terminal of the second input / output terminal pair, a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit being connected to each other and to the other terminal of the second input / output terminal pair, the auxiliary inductor being connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, one of the first node and the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control method includes calculating, based on a current flowing in the main inductor, a correction value for correcting an error in a converter voltage derived from a potential of an intermediate node between the main inductor and the auxiliary inductor, adding the correction value to a voltage command value for the converter voltage, turning on a first auxiliary switch of the two auxiliary switches, which is on and through which a forward current flows, before turning off a first main switch of the two main switches, which is on and through which a reverse current flows, or at the same time as turning off the first main switch, turning off the first main switch after an overlap time during which the first main switch and the first auxiliary switch are both on, has elapsed, and turning on a second main switch of the two main switches, which is on and through which a forward current flows, after a dead time during which the two main switches are both off, has elapsed, and then turning off the first auxiliary switch.

[0175] This provides a control method that can reduce errors in the converter voltage even when the circuit state changes.

[0176] (Technology 15) A control method for a power conversion device, the power conversion device comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; and a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair, the group of switches having a main switch unit and an auxiliary circuit, the main switch unit being a half-bridge circuit including two main switches connected in series, the auxiliary circuit having an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit being connected to each other and to one terminal of the second input / output terminal pair, a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit being connected to each other and to the other terminal of the second input / output terminal pair, the auxiliary inductor being connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, one of the intermediate nodes is connected to one terminal of the first input / output terminal pair, and the control method comprises adjusting an overlap time, which is a time during which a first main switch of the two main switches, through which a reverse current flows in an on state, and a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, are both on, based on a current flowing in the main inductor, a voltage across the second input / output terminal pair, and an inductance value of the auxiliary inductor, so as to reduce an error in a converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor; turning on the first auxiliary switch before turning off the first main switch or simultaneously with turning off the first main switch, turning off the first main switch after the overlap time has elapsed; turning on a second main switch of the two main switches, through which a forward current flows in an on state, after a dead time, which is a time during which the two main switches are both off, has elapsed, and then turning off the first auxiliary switch.

[0177] This provides a control method that can reduce errors in the converter voltage even when the circuit state changes.

[0178] The present disclosure can be applied to a power conversion device that steps up or steps down an input voltage to a predetermined voltage and outputs the resulting voltage.

[0179] REFERENCE SIGNS LIST 1, 2 Power conversion device 10 Switch group 11 Main switch section 12 Auxiliary circuit 13 Auxiliary switch section 20, 20a Control circuit 21, 21a Voltage command value generation section 22, 22a PWM control section 23, 23a Determination section 24 Correction value calculation section 25 Addition section 100 Voltage source A1, A2, A3, A4, Q1, Q2, Q3, Q4 Switch C1 Capacitor D1, D2 Diode L1, L2 Inductor N1, N2 Node t1, t2, t3, t4 Terminal

Claims

1. A power supply comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair; and a control circuit for controlling the group of switches, wherein the group of switches has a main switch unit and an auxiliary circuit, wherein the main switch unit is a half-bridge circuit including two main switches connected in series, and the auxiliary circuit has an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, wherein a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit are connected to each other and to one terminal of the second input / output terminal pair, and a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit are connected to each other and to the other terminal of the second input / output terminal pair, and the auxiliary inductor is connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, one of the first intermediate node and the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control circuit calculates a correction value for correcting an error in a converter voltage derived from the potential of an intermediate node between the main inductor and the auxiliary inductor based on the current flowing in the main inductor, and adds the correction value to a voltage command value for the converter voltage; before turning off a first main switch of the two main switches, through which a reverse current flows in an on state, or at the same time as turning off the first main switch, turning on a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, and turning off the first main switch after an overlap time during which the first main switch and the first auxiliary switch are both in an on state has elapsed; and after a dead time during which the two main switches are both in an off state has elapsed, turning on a second main switch of the two main switches, through which a forward current flows in an on state, and then turning off the first auxiliary switch.

2. The power conversion device according to claim 1, wherein the control circuit calculates the correction value based on the current flowing through the main inductor, the voltage across the second input / output terminal pair, the switching frequencies of the two main switches, and the inductance value of the auxiliary inductor.

3. The power conversion device according to claim 1, wherein, when switching the two auxiliary switches, the control circuit increases the absolute value of the correction value in accordance with an increase in the absolute value of the current flowing through the main inductor, the switching frequency of the two main switches, or the inductance value of the auxiliary inductor, and determines the polarity of the correction value when adding the correction value to the voltage command value in accordance with the polarity of the current flowing through the main inductor.

4. The power conversion device according to claim 3, wherein when switching the two auxiliary switches, the control circuit calculates the correction value so that the correction value has a linear function relationship with the current flowing through the main inductor, the switching frequency of the two main switches, or the inductance value of the auxiliary inductor.

5. The power conversion device according to claim 1, wherein, when switching the two auxiliary switches, the control circuit further calculates the correction value based on the overlap time, and decreases the absolute value of the correction value as the overlap time increases, or increases the absolute value of the correction value as the voltage across the second input / output terminal pair or the switching frequencies of the two main switches increases.

6. The power conversion device according to claim 5, wherein, when switching the two auxiliary switches, the control circuit calculates the correction value so that the correction value has a linear function relationship with the overlap time, the switching frequencies of the two main switches, or the inductance value of the auxiliary inductor.

7. The power conversion device according to claim 1, wherein, when stopping switching of the two auxiliary switches, the control circuit increases the absolute value of the correction value as the voltage between the second input / output terminal pair or the switching frequency of the two main switches increases, and determines the polarity of the correction value when adding the correction value to the voltage command value according to the polarity of the current flowing through the main inductor.

8. The power conversion device according to claim 1, wherein the control circuit switches the correction value to be added to the voltage command value depending on whether the two auxiliary switches are performing switching.

9. A power supply comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair; and a control circuit for controlling the group of switches, wherein the group of switches has a main switch unit and an auxiliary circuit, the main switch unit is a half-bridge circuit including two main switches connected in series, the auxiliary circuit has an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, a high-voltage side terminal of the main switch unit and a high-voltage side terminal of the auxiliary switch unit are connected to each other and to one terminal of the second input / output terminal pair, a low-voltage side terminal of the main switch unit and a low-voltage side terminal of the auxiliary switch unit are connected to each other and to the other terminal of the second input / output terminal pair, and the auxiliary inductor is connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, one of the first intermediate node and the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control circuit adjusts an overlap time, which is a time during which a first main switch of the two main switches, through which a reverse current flows in an on state, and a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, are both on, based on the current flowing in the main inductor, the voltage across the second input / output terminal pair, and the inductance value of the auxiliary inductor, so as to reduce an error in a converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor; and turns on the first auxiliary switch before turning off the first main switch or at the same time as turning off the first main switch, turns off the first main switch after the overlap time has elapsed, and turns on the second main switch of the two main switches, through which a forward current flows in an on state, after a dead time, which is a time during which the two main switches are both off, has elapsed, and then turns off the first auxiliary switch.

10. The power conversion device according to claim 9, wherein the control circuit increases the overlap time in accordance with an increase in the absolute value of the current flowing through the main inductor, decreases the overlap time in accordance with an increase in the voltage across the second input / output terminal pair, or increases the overlap time in accordance with an increase in the inductance value of the auxiliary inductor.

11. Let the current flowing through the main inductor be i Ｌ , the voltage between the second input / output terminal pair is V ｃ , the inductance value L of the auxiliary inductor ｓｕｂ When the overlap time is The power conversion device according to claim 9 , wherein the power conversion device adjusts the power conversion rate to a value within .

12. The control circuit adjusts the overlap time The power conversion device according to claim 11 , wherein the power conversion device adjusts the output voltage to a value equal to or greater than the reference voltage.

13. The power conversion device according to any one of claims 1 to 12, wherein the power conversion device includes a plurality of groups of switches.

14. A control method for a power conversion device, comprising: the power conversion device comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; and a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair, the group of switches having a main switch unit and an auxiliary circuit, the main switch unit being a half-bridge circuit including two main switches connected in series, the auxiliary circuit having an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, the high-voltage side terminal of the main switch unit and the high-voltage side terminal of the auxiliary switch unit being connected to each other and to one terminal of the second input / output terminal pair, the low-voltage side terminal of the main switch unit and the low-voltage side terminal of the auxiliary switch unit being connected to each other and to the other terminal of the second input / output terminal pair, and the auxiliary inductor being connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, one of the first intermediate node and the second intermediate node is connected to one terminal of the first input / output terminal pair, and the control method comprises: calculating a correction value for correcting an error in a converter voltage derived from the potential of an intermediate node between the main inductor and the auxiliary inductor based on a current flowing in the main inductor; and adding the correction value to a voltage command value for the converter voltage; turning on a first auxiliary switch of the two auxiliary switches, which is on and through which a forward current flows, before turning off a first main switch of the two main switches, which is on and through which a reverse current flows, or at the same time as turning off the first main switch, turning off the first main switch after an overlap time during which the first main switch and the first auxiliary switch are both on; turning on a second main switch of the two main switches, which is on and through which a forward current flows, after a dead time during which the two main switches are both off, 15. A control method for a power conversion device, comprising: the power conversion device comprising: a first input / output terminal pair; a second input / output terminal pair; a main inductor connected in series between the first input / output terminal pair; and a group of switches connected to at least one terminal of the first input / output terminal pair and both terminals of the second input / output terminal pair, the group of switches having a main switch unit and an auxiliary circuit, the main switch unit being a half-bridge circuit including two main switches connected in series, the auxiliary circuit having an auxiliary switch unit including two auxiliary switches connected in series, and an auxiliary inductor, the high-voltage side terminal of the main switch unit and the high-voltage side terminal of the auxiliary switch unit being connected to each other and to one terminal of the second input / output terminal pair, the low-voltage side terminal of the main switch unit and the low-voltage side terminal of the auxiliary switch unit being connected to each other and to the other terminal of the second input / output terminal pair, and the auxiliary inductor being connected between a first intermediate node between the two main switches and a second intermediate node between the two auxiliary switches, one of the first intermediate node and the second intermediate node is connected to one terminal of the first input / output terminal pair; and the control method comprises adjusting an overlap time, which is a time during which a first main switch of the two main switches, through which a reverse current flows in an on state, and a first auxiliary switch of the two auxiliary switches, through which a forward current flows in an on state, are both on, based on a current flowing in the main inductor, a voltage across the second input / output terminal pair, and an inductance value of the auxiliary inductor, so as to reduce an error in a converter voltage derived from the potential of the intermediate node between the main inductor and the auxiliary inductor; turning on the first auxiliary switch before turning off the first main switch or at the same time as turning off the first main switch, and turning off the first main switch after the overlap time has elapsed; and turning on a second main switch of the two main switches, through which a forward current flows in an on state, after a dead time, which is a time during which the two main switches are both off, has elapsed, and then turning off the first auxiliary switch.

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