Power conversion device

Abstract

A control unit (50) controls a primary-side full-bridge circuit (30) and a secondary-side full-bridge circuit (40) such that one of the primary-side full-bridge circuit (30) and the secondary-side full-bridge circuit (40) applies a two-level voltage to a transformer unit (TS) and the other applies a three-level voltage to the transformer unit (TS). The control unit (50) controls the primary-side full-bridge circuit (30) and the secondary-side full-bridge circuit (40) such that a first phase difference, a second phase difference, the frequency of the two-level voltage, and the frequency of the three-level voltage are a combination that can output a required power and that satisfies condition 1 and condition 2.

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device.

[0002] The power conversion device disclosed in Patent Document 1 includes a transformer, a primary-side full bridge circuit, a secondary-side full bridge circuit, and a control unit. The transformer includes a primary winding and a secondary winding. The primary-side full bridge circuit includes a plurality of primary-side switching elements. The secondary-side full bridge circuit includes a plurality of secondary-side switching elements. The control unit controls the primary-side full bridge circuit so that three levels of primary-side voltages are applied to the primary winding. The control unit controls the secondary-side full bridge circuit so that three levels of secondary-side voltages are applied to the secondary winding. The control unit realizes soft switching of the primary-side switching elements and the secondary-side switching elements by controlling the phase difference between the primary-side voltage and the secondary-side voltage.

[0003] International Publication No. 2020 / 003717

[0004] A power conversion device is required to output a required power and to perform soft switching at the same time.

[0005] A power conversion device according to one aspect of the present disclosure includes: a transformer unit having a primary winding, a secondary winding, and a reactor connected to at least one of the primary winding or the secondary winding; a primary full-bridge circuit connected to the primary winding and having a plurality of primary switching elements; a secondary full-bridge circuit connected to the secondary winding and having a plurality of secondary switching elements; and a control unit configured to control the plurality of primary switching elements and the plurality of secondary switching elements. Condition 1 is a condition for performing soft switching of the plurality of primary switching elements. Condition 2 is a condition for performing soft switching of the plurality of secondary switching elements. The condition 1 is that when at least one of the plurality of primary side switching elements switches between ON and OFF, a primary side condition current value, which is the value of a current flowing through the primary side winding in the forward direction of a diode connected in parallel to the primary side switching element that switches from OFF to ON among the plurality of primary side switching elements, is equal to or greater than the absolute value of a primary side winding current threshold.The condition 2 is that when at least one of the plurality of secondary side switching elements switches between ON and OFF, a secondary side condition current value, which is the value of a current flowing through the secondary side winding in the forward direction of a diode connected in parallel to the secondary side switching element that switches from OFF to ON among the plurality of secondary side switching elements, is equal to or greater than the absolute value of a secondary side winding current threshold. The control unit is configured to control the primary-side full bridge circuit and the secondary-side full bridge circuit so that one of the primary-side full bridge circuit and the secondary-side full bridge circuit applies a two-level voltage to the transformer unit, and the other applies a three-level voltage to the transformer unit. The two-level voltage and the three-level voltage have waveforms of the same frequency that are inverted in phase every 180 degrees. A difference between a first time when the three-level voltage rises from a low level to a middle level and a second time when the two-level voltage rises from a low level to a high level is a first phase difference. A difference between the first time and a third time when the three-level voltage rises from a middle level to a high level is a second phase difference.The control unit is configured to control the primary-side full bridge circuit and the secondary-side full bridge circuit so as to realize a combination of the first phase difference, the second phase difference, the frequency of the two-level voltage, and the frequency of the three-level voltage that can output required power and that satisfies condition 1 and condition 2.

[0006] FIG. 1 is a circuit diagram of a power conversion device according to a first embodiment. FIG. 2 is a diagram showing the relationship between an equivalent voltage ratio and a load mode. FIG. 3 is a diagram showing the relationship between a primary-side voltage, a secondary-side voltage, and a primary-side current, a secondary-side current, in a first step-down delay-phase mode, which is one of the load modes shown in FIG. 2. FIG. 4 is a diagram showing the relationship between a primary-side voltage, a secondary-side voltage, a primary-side current, and a secondary-side current, in a first step-down in-phase mode, which is one of the load modes shown in FIG. 2. FIG. 5 is a diagram showing the relationship between a primary-side voltage, a secondary-side voltage, a primary-side current, and a secondary-side current, in a first step-down lead-phase mode, which is one of the load modes shown in FIG. 2. FIG. 6 is a flowchart showing output control executed by the control unit shown in FIG. 1. FIG. 7 is a diagram showing the relationship between required power, frequency, and each phase difference. FIG. 8 is a diagram showing the primary-side voltage, a secondary-side voltage, in a second step-down delay-phase mode, which is one of the load modes shown in FIG. 2. FIG. 9 is a diagram showing the primary-side voltage, a secondary-side voltage, in a second step-down in-phase mode, which is one of the load modes shown in FIG. 2. FIG. 10 is a diagram showing the primary side voltage and the secondary side voltage in the second step-down leading phase mode, which is one of the load modes in FIG.

[0007] [First Embodiment] A first embodiment of a power conversion device will be described. As shown in Fig. 1, a power supply system 100 includes a DC power supply 110, a load 120, and a power conversion device 10. The DC power supply 110 inputs DC power to the power conversion device 10. The DC power supply 110 is, for example, a battery or a power supply circuit. The power supply circuit is, for example, an AC / DC converter that converts AC power into DC power and outputs it. The load 120 is, for example, a secondary battery that can charge and discharge DC power. The secondary battery is, for example, a lithium-ion battery or a lead-acid battery.

[0008] <Power Conversion Device> The power conversion device 10 is a dual active bridge DC / DC converter. The power conversion device 10 is provided between a DC power supply 110 and a load 120. The power conversion device 10 is capable of converting DC power input from the DC power supply 110 and outputting the converted power to the load 120. The power conversion device 10 is capable of converting DC power input from the load 120 and outputting the converted power to the DC power supply 110. In the following description, the primary side is treated as the input and the secondary side is treated as the output. That is, the power conversion device 10 converts a DC voltage input from the DC power supply 110 and outputs the converted power to the load 120.

[0009] The power conversion device 10 includes two primary terminals 11 and 12 and two secondary terminals 13 and 14. A DC power supply 110 is electrically connected to the primary terminals 11 and 12. A load 120 is electrically connected to the secondary terminals 13 and 14.

[0010] The power conversion device 10 includes a transformer unit TS. The transformer unit TS includes a transformer 20 and two reactors L1 and L2. The transformer 20 is an insulated type. The transformer 20 includes a magnetic core 21, a primary winding 22, and a secondary winding 23. The primary winding 22 and the secondary winding 23 are wound around the core 21. The transformer 20 is connected to reactors L1 and L2. The reactors L1 and L2 may be elements such as choke coils or may be leakage inductances of the primary winding 22 and the secondary winding 23. The reactor L1 is connected to the primary winding 22. The reactor L2 is connected to the secondary winding 23. The reactor L1 and the primary winding 22 form a series connection 24. The reactor L2 and the secondary winding 23 form a series connection 25. Where appropriate, the reactor L1 may be referred to as a first reactor L1, and the reactor L2 may be referred to as a second reactor L2.

[0011] The power conversion device 10 includes a primary-side full-bridge circuit 30. The primary-side full-bridge circuit 30 includes a first leg 31 and a second leg 32. The first leg 31 and the second leg 32 are connected to primary-side terminals 11 and 12 so as to be connected in parallel with each other. As a result, the primary-side full-bridge circuit 30 is electrically connected to a DC power supply 110 via the primary-side terminals 11 and 12. The first leg 31 includes a first switching element Q1, a second switching element Q2, diodes D1 and D2, and capacitors C1 and C2. The first switching element Q1 and the second switching element Q2 are connected in series with each other. The second leg 32 includes a third switching element Q3, a fourth switching element Q4, diodes D3 and D4, and capacitors C3 and C4. The third switching element Q3 and the fourth switching element Q4 are connected in series with each other. The first switching element Q1 and the third switching element Q3 form an upper arm, and the second switching element Q2 and the fourth switching element Q4 form a lower arm.

[0012] The first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 constitute a plurality of primary-side switching elements Q1 to Q4. The primary-side switching elements Q1 to Q4 are, for example, n-type metal oxide semiconductor field effect transistors (MOSFETs). The primary-side switching elements Q1 to Q4 may also be p-type MOSFETs, IGBTs (insulated gate bipolar transistors), or GaN-HEMTs.

[0013] The diodes D1 to D4 and the capacitors C1 to C4 are connected in parallel to the primary-side switching elements Q1 to Q4, respectively. The diodes D1 to D4 may be parasitic diodes or elements. The capacitors C1 to C4 may be parasitic capacitances, elements, or a combination of parasitic capacitances and elements.

[0014] The connection point between the first switching element Q1 and the second switching element Q2 is connected to one end of the primary winding 22 via the first reactor L1, and the connection point between the third switching element Q3 and the fourth switching element Q4 is directly connected to the other end of the primary winding 22. In other words, the primary full-bridge circuit 30 is connected to the transformer section TS.

[0015] The power conversion device 10 includes a primary-side capacitor 15. The primary-side capacitor 15 is provided between primary-side terminals 11, 12 and a primary-side full-bridge circuit 30. The power conversion device 10 includes a primary-side voltage sensor 37. The primary-side voltage sensor 37 detects an input voltage Vin input from a DC power supply 110 to the primary-side full-bridge circuit 30.

[0016] The power conversion device 10 includes a secondary-side full-bridge circuit 40. The secondary-side full-bridge circuit 40 includes a third leg 41 and a fourth leg 42. The third leg 41 and the fourth leg 42 are connected to secondary-side terminals 13, 14 so as to be connected in parallel with each other. This electrically connects the secondary-side full-bridge circuit 40 to a load 120. The third leg 41 includes a fifth switching element Q5, a sixth switching element Q6, diodes D5 and D6, and capacitors C5 and C6. The fifth switching element Q5 and the sixth switching element Q6 are connected in series with each other. The fourth leg 42 includes a seventh switching element Q7, an eighth switching element Q8, diodes D7 and D8, and capacitors C7 and C8. The seventh switching element Q7 and the eighth switching element Q8 are connected in series with each other. The fifth switching element Q5 and the seventh switching element Q7 form an upper arm. The sixth switching element Q6 and the eighth switching element Q8 form a lower arm.

[0017] The fifth switching element Q5, the sixth switching element Q6, the seventh switching element Q7, and the eighth switching element Q8 constitute a plurality of secondary-side switching elements Q5 to Q8. The secondary-side switching elements Q5 to Q8 are, for example, n-type MOSFETs. The secondary-side switching elements Q5 to Q8 may also be p-type MOSFETs, IGBTs, or GaN-HEMTs.

[0018] Diodes D5 to D8 and capacitors C5 to C8 are connected in parallel to secondary-side switching elements Q5 to Q8, respectively. Diodes D5 to D8 may be parasitic diodes or elements. Capacitors C5 to C8 may be parasitic capacitances, elements, or a combination of parasitic capacitances and elements.

[0019] The connection point between the fifth switching element Q5 and the sixth switching element Q6 is connected to one end of the secondary winding 23 via the second reactor L2, and the connection point between the seventh switching element Q7 and the eighth switching element Q8 is directly connected to the other end of the secondary winding 23. In other words, the secondary full-bridge circuit 40 is connected to the transformer unit TS.

[0020] The power conversion device 10 includes a secondary-side capacitor 16. The secondary-side capacitor 16 is provided between the secondary-side terminals 13, 14 and the secondary-side full-bridge circuit 40. The output power of the secondary-side full-bridge circuit 40 is supplied to a load 120.

[0021] The power conversion apparatus 10 includes a secondary-side voltage sensor 47. The secondary-side voltage sensor 47 detects the output voltage Vout of the power conversion apparatus 10. The power conversion apparatus 10 includes a control unit 50. The control unit 50 includes a processor and a storage unit. The processor may be, for example, a central processing unit (CPU), a graphics processing unit (GPU), or a digital signal processor (DSP). The storage unit includes a random access memory (RAM) and a read-only memory (ROM). The storage unit stores program code or instructions configured to cause the processor to execute processing. The storage unit, i.e., a computer-readable medium, includes any available medium accessible by a general-purpose or special-purpose computer. The control unit 50 may be configured with a hardware circuit such as an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). The control unit 50, which is a processing circuit, may include one or more processors operating according to a computer program, one or more hardware circuits such as an ASIC or an FPGA, or a combination thereof.

[0022] The control unit 50 converts the input voltage Vin into the output voltage Vout by controlling the plurality of primary side switching elements Q1 to Q4 and the plurality of secondary side switching elements Q5 to Q8.

[0023] In this embodiment, the control unit 50 executes three-level control on one of the primary-side full bridge circuit 30 and the secondary-side full bridge circuit 40, and executes two-level control on the other. As a result, one of the primary-side full bridge circuit 30 and the secondary-side full bridge circuit 40 applies a two-level voltage to the transformer unit TS, and the other applies a three-level voltage to the transformer unit TS. In this embodiment, the control unit 50 executes three-level control on the primary-side full bridge circuit 30, and executes two-level control on the secondary-side full bridge circuit 40.

[0024] Three-level control is control in which the voltage applied to the transformer unit TS, i.e., the series connection 24 of the primary winding 22 and the first reactor L1, is switched between three levels: positive, negative, and zero. Two-level control is control in which the voltage applied to the transformer unit TS, i.e., the series connection 25 of the secondary winding 23 and the second reactor L2, is switched between two levels: positive and negative. In three-level control, a positive voltage applied to the series connection 24 is referred to as a high level, a zero voltage applied to the series connection 24 is referred to as a middle level, and a negative voltage applied to the series connection 24 is referred to as a low level. In two-level control, a positive voltage applied to the series connection 25 is referred to as a high level, and a negative voltage applied to the series connection 25 is referred to as a low level. The voltage applied to the series connection 24 is referred to as a primary voltage V1, and the voltage applied to the series connection 25 is referred to as a secondary voltage V2. The primary-side voltage V1 is the potential difference between the connection point between the first switching element Q1 and the second switching element Q2 and the connection point between the third switching element Q3 and the fourth switching element Q4. The secondary-side voltage V2 is the potential difference between the connection point between the fifth switching element Q5 and the sixth switching element Q6 and the connection point between the seventh switching element Q7 and the eighth switching element Q8. In this embodiment, the primary-side voltage V1 is a three-level voltage. The secondary-side voltage V2 is a two-level voltage. The arrows in FIG. 1 indicate the positive directions of the primary-side voltage V1 and the secondary-side voltage V2. During normal operation when the output is not changed, the primary-side voltage V1 and the secondary-side voltage V2 have waveforms of the same frequency that are inverted in phase every 180 degrees.

[0025] When performing three-level control of the primary-side full-bridge circuit 30, the control unit 50 independently controls the first leg 31 and the second leg 32. The switching patterns of the primary-side full-bridge circuit 30 include first to fourth patterns.

[0026] The first pattern is a switching pattern in which the first switching element Q1 is turned on, the second switching element Q2 is turned off, the third switching element Q3 is turned off, and the fourth switching element Q4 is turned on.

[0027] The second pattern is a switching pattern in which the first switching element Q1 is turned on, the second switching element Q2 is turned off, the third switching element Q3 is turned on, and the fourth switching element Q4 is turned off.

[0028] The third pattern is a switching pattern in which the first switching element Q1 is turned off, the second switching element Q2 is turned on, the third switching element Q3 is turned on, and the fourth switching element Q4 is turned off.

[0029] The fourth pattern is a switching pattern in which the first switching element Q1 is turned off, the second switching element Q2 is turned on, the third switching element Q3 is turned off, and the fourth switching element Q4 is turned on.

[0030] When performing two-level control of the secondary-side full-bridge circuit 40, the control unit 50 controls the third leg 41 and the fourth leg 42 in conjunction with each other. The control unit 50 simultaneously turns on the fifth switching element Q5 and the eighth switching element Q8. The control unit 50 simultaneously turns on the sixth switching element Q6 and the seventh switching element Q7. The switching patterns of the secondary-side full-bridge circuit 40 include a fifth pattern and a sixth pattern.

[0031] The fifth pattern is a switching pattern in which the fifth switching element Q5 is turned on, the sixth switching element Q6 is turned off, the seventh switching element Q7 is turned off, and the eighth switching element Q8 is turned on.

[0032] The sixth pattern is a switching pattern in which the fifth switching element Q5 is turned off, the sixth switching element Q6 is turned on, the seventh switching element Q7 is turned on, and the eighth switching element Q8 is turned off.

[0033] The control unit 50 outputs an output voltage Vout from the secondary full bridge circuit 40 by combining any one of the first to fourth patterns of the primary full bridge circuit 30 with any one of the fifth and sixth patterns of the secondary full bridge circuit 40.

[0034] Here, the number of turns of the primary winding 22 of the transformer 20 is N1, and the number of turns of the secondary winding 23 is N2. The ratio of the input voltage Vin input to the primary full bridge circuit 30 to the output voltage Vout output from the secondary full bridge circuit 40 is the voltage ratio. The equivalent voltage ratio, which is the equivalent voltage ratio when the turns ratio of the transformer 20 is converted to 1:1, is (Vout × N1) / (Vin × N2). The control unit 50 has a first step-down mode and a first step-up mode as load modes. The first step-down mode is a load mode in which the equivalent voltage ratio is less than 1. The first step-up mode is a load mode in which the equivalent voltage ratio is greater than 1.

[0035] For example, if the turns ratio of the transformer 20 is 1:2, the input voltage Vin=200V, and the output voltage Vout=400V, converting the turns ratio to 1:1 gives an equivalent voltage ratio = (Vout x 1) / (Vin x 2)=1. Therefore, if the turns ratio of the transformer 20 is 1:2 and the input voltage Vin=200V, the first step-down mode is selected when the output voltage Vout is less than 400V, and the first step-up mode is selected when the output voltage Vout is greater than 400V. Note that the following description will be given assuming a turns ratio of 1:1 unless otherwise specified.

[0036] <First Step-Down Mode> As shown in FIG. 2, the first step-down mode includes a first step-down delay phase mode, a first step-down in-phase mode, and a first step-down lead phase mode.

[0037] 3, the first step-down delay phase mode is a first step-down mode in which the primary-side voltage V1 is raised from a low level to an intermediate level, the secondary-side voltage V2 is raised from a low level to a high level, and then the primary-side voltage V1 is raised from the intermediate level to a high level. The first step-down delay phase mode is a first step-down mode in which a small amount of power is output in response to the power required by the load 120.

[0038] In the load mode of this embodiment, the difference between the first time T1 when the primary voltage V1 rises from a low level to a middle level and the second time T2 when the secondary voltage V2 rises from a low level to a high level is the first phase difference θ1. The difference between the first time T1 and the third time T3 when the primary voltage V1 rises from a middle level to a high level is the second phase difference θ2.

[0039] As described above, during normal operation with no change in output, the primary-side voltage V1 and the secondary-side voltage V2 have waveforms of the same frequency that are inverted in phase every 180 degrees. Therefore, the time when the primary-side voltage V1 falls from high to middle level is also the first time T1, the time when the secondary-side voltage V2 falls from high to low level is also the second time T2, and the time when the primary-side voltage V1 falls from middle to low level is also the third time T3.

[0040] As shown in FIG. 4 , the first in-phase step-down mode is a first step-down mode in which the primary voltage V1 is raised from a low level to a middle level, and then the primary voltage V1 is raised from a middle level to a high level and the secondary voltage V2 is raised from a low level to a high level simultaneously. In the first in-phase step-down mode, the second time T2 and the third time T3 are the same time. Therefore, the first phase difference θ1 and the second phase difference θ2 have the same value. That is, the difference between the first phase difference θ1 and the second phase difference θ2 is zero. The first in-phase step-down mode is a first step-down mode in which medium power is output in response to the power requested by the load 120. Medium power is an output power with a maximum value greater than that of low power.

[0041] 5, the first step-down lead phase mode is a first step-down mode in which the primary side voltage V1 is raised from a low level to a middle level, then the primary side voltage V1 is raised from the middle level to a high level, and then the secondary side voltage V2 is raised from a low level to a high level. The first step-down lead phase mode is a first step-down mode in which high power is output in response to the power required by the load 120. The high power is output power with a maximum value greater than that of the middle power.

[0042] The first buck delay phase mode is an example of a light load mode. The first buck advance phase mode is an example of a heavy load mode. The first buck same phase mode is a load mode used when switching between the light load mode and the heavy load mode and is an example of a medium load mode. In the first buck mode, switching occurs between the first buck delay phase mode and the first buck advance phase mode when the difference between the first phase difference θ1 and the second phase difference θ2 is zero.

[0043] <First Boost Mode> As shown in Fig. 2, the first boost mode includes a first boost delay phase mode, a first boost in-phase mode, and a first boost lead phase mode. The first boost mode is similar to the first buck mode except for the magnitude relationship between the secondary-side voltage V2 and the primary-side voltage V1, and is therefore not shown in the figure. More specifically, the first boost mode differs from the first buck mode in that the high level of the secondary-side voltage V2 is higher than the high level of the primary-side voltage V1. The first boost mode also differs from the first buck mode in that the low level of the secondary-side voltage V2 is lower than the low level of the primary-side voltage V1.

[0044] The first boost delay phase mode is a first boost mode in which the primary side voltage V1 is raised from a low level to an intermediate level, the secondary side voltage V2 is raised from a low level to a high level, and then the primary side voltage V1 is raised from the intermediate level to a high level. The first boost delay phase mode is a first boost mode in which a small amount of power is output in response to the power required by the load 120.

[0045] The first in-phase boost mode is a first boost mode in which, after the primary voltage V1 is raised from a low level to a middle level, the primary voltage V1 is raised from the middle level to a high level and the secondary voltage V2 is raised from a low level to a high level simultaneously. The first in-phase boost mode is a first boost mode in which middle power is output in response to the power required by the load 120.

[0046] The first boost mode is a first boost mode in which the primary voltage V1 is raised from a low level to a middle level, then the primary voltage V1 is raised from the middle level to a high level, and then the secondary voltage V2 is raised from a low level to a high level. The first boost mode is a first boost mode in which a large amount of power is output in response to the power required by the load 120.

[0047] The first boost delay phase mode is an example of a light load mode. The first boost advance phase mode is an example of a heavy load mode. The first boost same phase mode is a load mode used when switching between the light load mode and the heavy load mode, and is an example of a medium load mode. In the first boost mode, switching occurs between the first boost delay phase mode and the first boost advance phase mode when the difference between the first phase difference θ1 and the second phase difference θ2 is 0.

[0048] <Output Control> The control unit 50 performs output control. Output control is performed in all of the light load mode, medium load mode, and heavy load mode. The output control is a control for outputting requested power by controlling the first phase difference θ1, the second phase difference θ2, the frequency of the primary voltage V1, and the frequency of the secondary voltage V2. The frequency of the primary voltage V1 and the frequency of the secondary voltage V2 are the same value. In the following description, the frequency of the primary voltage V1 and the frequency of the secondary voltage V2 may be referred to as frequency.

[0049] As shown in FIG. 6 , in step S1, the control unit 50 derives soft switching regions. The soft switching regions are set for the primary current I1 and the secondary current I2. The primary current I1 is the current flowing through the primary winding 22. The secondary current I2 is the current flowing through the secondary winding 23. In FIG. 1 , the arrows indicate the positive directions of the primary current I1 and the secondary current I2. The positive direction of the primary current I1 is the direction in which the primary current I1 flows from the connection point between the first switching element Q1 and the second switching element Q2 to the connection point between the third switching element Q3 and the fourth switching element Q4. The positive direction of the secondary current I2 is the direction in which the secondary current I2 flows from the connection point between the seventh switching element Q7 and the eighth switching element Q8 to the connection point between the fifth switching element Q5 and the sixth switching element Q6.

[0050] The condition for soft switching of the primary-side switching elements Q1 to Q4 is that, when the primary-side switching elements Q1 to Q4 switch between ON and OFF, the primary-side condition current value, which is the value of the primary-side current I1 flowing in the forward direction of a diode connected in parallel to one of the primary-side switching elements Q1 to Q4 that changes from OFF to ON, is equal to or greater than the absolute value of the primary-side winding current threshold value TI1. Hereinafter, this condition will be referred to as condition 1. The region that satisfies this condition is the soft-switching region of the primary-side current I1. When the primary-side switching elements Q1 to Q4 switch between ON and OFF, this is the time when at least one of the primary-side switching elements Q1 to Q4 changes from ON to OFF or from OFF to ON. This is the same as the first time T1 or the third time T3. The first time T1 is the time when the primary voltage V1 rises from a low level to a middle level or falls from a high level to a middle level. The third time T3 is the time when the primary voltage V1 rises from a middle level to a high level or falls from a middle level to a low level.

[0051] The condition for soft switching of the multiple secondary-side switching elements Q5 to Q8 is that when the secondary-side switching elements Q5 to Q8 switch between ON and OFF, the secondary-side conditional current value, which is the value of the secondary-side current I2 flowing in the forward direction of a diode connected in parallel to one of the secondary-side switching elements Q5 to Q8 that switches from OFF to ON, is equal to or greater than the absolute value of the secondary-side winding current threshold value TI2. Hereinafter, this condition will be referred to as condition 2. The region that satisfies this condition is the soft-switching region of the secondary-side current I2. When the secondary-side switching elements Q5 to Q8 switch between ON and OFF, this is the time when at least one of the secondary-side switching elements Q5 to Q8 switches from ON to OFF or from OFF to ON. This is the same as second time T2, which is the time when the secondary-side voltage V2 rises from low to high or falls from high to low.

[0052] As described above, the primary voltage V1 and the secondary voltage V2 have waveforms of the same frequency that are inverted every 180 degrees in phase, so only the positive and negative signs are inverted during the rising and falling periods, and it is therefore sufficient to consider only one of them. The following explanation will focus on the rising period only.

[0053] The first step-down delay phase mode will be described as an example. As shown in FIG. 3 , at a first time T1, the switching pattern of the primary-side full-bridge circuit 30 is switched from the third pattern to the second pattern. At a third time T3, the switching pattern of the primary-side full-bridge circuit 30 is switched from the second pattern to the first pattern. If condition 1 is satisfied at the first time T1 and the third time T3, soft switching of the primary-side switching elements Q1 to Q4 is achieved. At a second time T2, the switching pattern of the secondary-side full-bridge circuit 40 is switched from the sixth pattern to the fifth pattern. At this time, if condition 2 is satisfied, soft switching of the secondary-side switching elements Q5 to Q8 is achieved.

[0054] The primary winding current threshold TI1 is defined by the following equation (1).

[0055] TI1: primary winding current threshold, k1: coefficient, V1: primary voltage, L: inductance of the first reactor L1, and C01: capacitance corresponding to one switching element relative to the combined capacitance of all capacitors C1 to C4 arranged in parallel with the switching elements Q1 to Q4 of the primary full-bridge circuit 30. If the capacitance of capacitor C1 is C11, the capacitance of capacitor C2 is C12, the capacitance of capacitor C3 is C13, and the capacitance of capacitor C4 is C14, then C01 = (C11 + C12 + C13 + C14) / 4 may be used. If Cx is the largest capacitance among C11 to C14, then C01 = Cx may be used. The secondary winding current threshold TI2 is similarly defined by replacing each value with a secondary value. In this way, the soft switching region is derived.

[0056] Next, in step S2, the control unit 50 calculates a target current. The target current is a current value that can output the power required by the load 120 and that satisfies conditions 1 and 2. Of the primary-side switching elements Q1 to Q4, the fourth switching element Q4 is the primary-side switching element that changes from OFF to ON at the third time T3. The fourth switching element Q4 is the primary-side switching element that changes from OFF to ON when the switching pattern changes from the second pattern to the first pattern.

[0057] To satisfy Condition 1, the primary current I1 at the first time T1 and the third time T3 is considered. However, it is sufficient to consider the primary current I1 at the third time T3, which is the time when the absolute value of the current is smaller between the first time T1 and the third time T3 in this load mode. Therefore, to satisfy Condition 1, the value of the primary current I1 flowing in the forward direction through the diode D4 connected in parallel to the fourth switching element Q4, which switches from OFF to ON at the third time T3, must be equal to or greater than the absolute value "|TI1|" of the primary winding current threshold TI1. This value of the primary current I1 is the value "-I1" in FIG. 1. As can be seen from FIG. 3, the primary current I1 is negative at the third time T3, so "-I1" becomes a positive value. Furthermore, which of the first time T1 and the third time T3 has the smaller absolute value varies depending on the load mode.

[0058] In this load mode, to satisfy Condition 2, the value of the secondary-side current I2 flowing in the forward direction through the diodes D5 and D8 connected in parallel to the fifth switching element Q5 and the eighth switching element Q8, which change from OFF to ON at the second time T2, needs to be equal to or greater than the absolute value "|TI2|" of the secondary winding current threshold value TI2. This value of the secondary-side current I2 is the value of "I2" in FIG. 1. The fifth switching element Q5 and the eighth switching element Q8 are secondary-side switching elements that change from OFF to ON when the switching pattern changes from the sixth pattern to the fifth pattern. As can be seen from FIG. 3, the secondary-side current I2 is a positive value at the second time T2, so "I2" also becomes a positive value.

[0059] In practice, for example, condition 1 may be satisfied by comparing TI1', which is the primary winding current threshold TI1 converted to the secondary winding, with the secondary current I2 at the first time T1, or vice versa. In this case, it is sufficient to consider either the primary current I1 or the secondary current I2. Furthermore, the inductance L of the first reactor L1 may be set in advance so that if one of condition 1 or condition 2 is satisfied, the other will also be satisfied.

[0060] In this way, it is possible to calculate a combination of target currents that can output the requested power from the load 120 and that satisfies conditions 1 and 2. If there is no combination of target currents that can output the requested power and that satisfies conditions 1 and 2, this means that soft switching is not possible for that requested power and load mode.

[0061] Next, in step S3, the control unit 50 derives a combination of the first phase difference θ1, the second phase difference θ2, and the frequency from the calculated target current. Here, the combination of the first phase difference θ1, the second phase difference θ2, and the frequency is derived so as to follow the calculated target current at the first time T1 and the calculated target current at the second time T2. If the first phase difference θ1 and the second phase difference θ2 are constant, the lower the frequency, the greater the output power. Since the higher the frequency, the shorter the period T, the greater the required power. Therefore, the period T of the primary voltage V1 and the period T of the secondary voltage V2 are lengthened as the period T increases. As the period T increases, the primary current I1 and the secondary current I2 increase. The control unit 50 derives a combination of the first phase difference θ1, the second phase difference θ2, and the frequency from these correlations so as to satisfy Condition 1 and Condition 2. That is, the combination of the first phase difference θ1, the second phase difference θ2, and the frequency is a combination that can output the power required by the load 120 and also satisfies the conditions 1 and 2.

[0062] The control unit 50 derives, from among the combinations of the first phase difference θ1, the second phase difference θ2, and the frequency, the combination that results in the smallest difference between the primary current I1 and the primary winding current threshold TI1, and the smallest difference between the secondary current I2 and the secondary winding current threshold TI2.

[0063] The control unit 50 also derives a combination of the first phase difference θ1, the second phase difference θ2, and the frequency so as to minimize the current used in soft switching. As an example, the switching of the fifth switching element Q5 and the eighth switching element Q8 at the second time T2 will be described. At the second time T2, the secondary-side voltage V2 is negative and the secondary-side current I2 is positive. To perform soft switching, the charge stored in the capacitors C5 and C8 must be discharged. When the secondary-side current I2 equal to or greater than |TI2| flows in the forward direction of the diodes D5 and D8, as in Condition 2 above, the charge stored in the capacitors C5 and C8 is discharged, turning on the diodes D5 and D8. In other words, the voltages across the fifth switching element Q5 and the eighth switching element Q8 become zero. When the switching pattern is switched at this point, the fifth switching element Q5 and the eighth switching element Q8 change from OFF to ON. This achieves soft switching. On the other hand, the secondary current I2 used in soft switching flows in the opposite direction to when power is supplied to the load 120, which leads to an increase in loss. For this reason, the control unit 50 derives a combination of the first phase difference θ1, the second phase difference θ2, and the frequency so that the current used in soft switching is as small as possible.

[0064] In step S4, the control unit 50 controls the primary side full bridge circuit 30 and the secondary side full bridge circuit 40 so as to achieve the first phase difference θ1, the second phase difference θ2, and the frequency derived in step S3.

[0065] The required power, the first phase difference θ1, the second phase difference θ2, and the frequency may be calculated each time, or may be calculated in advance and stored in a map, etc. [Operation of First Embodiment] The control unit 50 continuously changes the first phase difference θ1, the second phase difference θ2, and the frequency in all modes, including the light load mode, the medium load mode, and the heavy load mode, according to the required power.

[0066] As shown in FIG. 7 , in the light load mode, the frequency decreases as the required power increases. This allows for increased output power. Furthermore, in the light load mode, the difference between the first phase difference θ1 and the second phase difference θ2 decreases as the required power increases. When the difference between the first phase difference θ1 and the second phase difference θ2 becomes zero and the load mode transitions to the heavy load mode, the frequency decreases as the required power increases. Furthermore, in the heavy load mode, the difference between the first phase difference θ1 and the second phase difference θ2 increases as the required power increases. In the example shown in FIG. 7 , the frequency changes in an arc shape in the light load mode and linearly in the heavy load mode, but this may vary depending on the circuit configuration of the power conversion device 10, etc.

[0067] [Effects of the First Embodiment] (1-1) The control unit 50 controls the primary-side full-bridge circuit 30 and the secondary-side full-bridge circuit 40 so that the combination of the first phase difference θ1, the second phase difference θ2, and the frequency satisfies Conditions 1 and 2. By satisfying Conditions 1 and 2, soft switching of the primary-side switching elements Q1 to Q4 and the secondary-side switching elements Q5 to Q8 can be performed. Furthermore, there is a correlation between frequency and output power, and the lower the frequency, the greater the output power can be. Therefore, by controlling the first phase difference θ1, the second phase difference θ2, and the frequency, it is possible to achieve both the required power output and soft switching.

[0068] (1-2) The control unit 50 changes the frequency according to the required power. The period T is determined by the frequency, and the longer the period T, the longer the time that voltage is applied to the transformer unit TS. Because the primary current I1 and the secondary current I2 flow through the transformer unit TS while voltage is applied to the transformer unit TS, if the frequency is fixed, the peaks of the primary current I1 and the secondary current I2 may become large. In contrast, by making the frequency variable, the time that voltage is applied to the transformer unit TS can be adjusted, thereby reducing the peaks of the primary current I1 and the secondary current I2.

[0069] Furthermore, the lower the frequency, the greater the power output from the power conversion device 10. Therefore, the maximum output power can be improved compared to when the frequency is fixed.

[0070] (1-3) Changing the frequency changes the excitation current flowing through the transformer unit TS. This makes it easier to perform soft switching by adjusting the excitation current, and reducing the excitation current reduces resistance loss.

[0071] (1-4) The control unit 50 performs control so that the combination of the first phase difference θ1, the second phase difference θ2, and the frequency is such that the required power can be output in all of the light load mode, the medium load mode, and the heavy load mode, and that the combination of the first phase difference θ1, the second phase difference θ2, and the frequency satisfies conditions 1 and 2. This allows soft switching to be performed while outputting the required power in any of the light load mode, the medium load mode, and the heavy load mode.

[0072] Second Embodiment A second embodiment of the power conversion device will be described. The hardware configuration of the power conversion device of the second embodiment is the same as that of the first embodiment.

[0073] The control unit 50 performs two-level control on the primary-side full bridge circuit 30 and three-level control on the secondary-side full bridge circuit 40. In this case, the three-level control is a control in which the voltage applied to the series connection 25 is switched between three levels: positive, negative, or zero. The two-level control is a control in which the voltage applied to the series connection 24 is switched between two levels: positive and negative. In the three-level control, a positive voltage applied to the series connection 25 is referred to as a high level, a zero voltage applied to the series connection 25 is referred to as a middle level, and a negative voltage applied to the series connection 25 is referred to as a low level. In the two-level control, a positive voltage applied to the series connection 24 is referred to as a high level, and a negative voltage applied to the series connection 24 is referred to as a low level. The primary-side voltage V1 is a two-level voltage. The secondary-side voltage V2 is a three-level voltage.

[0074] When performing two-level control of the primary-side full-bridge circuit 30, the control unit 50 controls the first leg 31 and the second leg 32 in conjunction with each other. The control unit 50 simultaneously turns on the first switching element Q1 and the fourth switching element Q4. The control unit 50 simultaneously turns on the second switching element Q2 and the third switching element Q3. The switching patterns of the primary-side full-bridge circuit 30 include a seventh pattern and an eighth pattern.

[0075] The seventh pattern is a switching pattern in which the first switching element Q1 is turned on, the second switching element Q2 is turned off, the third switching element Q3 is turned off, and the fourth switching element Q4 is turned on.

[0076] The eighth pattern is a switching pattern in which the first switching element Q1 is turned off, the second switching element Q2 is turned on, the third switching element Q3 is turned on, and the fourth switching element Q4 is turned off.

[0077] When performing three-level control of the secondary-side full-bridge circuit 40, the control unit 50 independently controls the third leg 41 and the fourth leg 42. The switching patterns of the secondary-side full-bridge circuit 40 include ninth to twelfth patterns.

[0078] The ninth pattern is a switching pattern in which the fifth switching element Q5 is turned on, the sixth switching element Q6 is turned off, the seventh switching element Q7 is turned off, and the eighth switching element Q8 is turned on.

[0079] The tenth pattern is a switching pattern in which the fifth switching element Q5 is turned on, the sixth switching element Q6 is turned off, the seventh switching element Q7 is turned on, and the eighth switching element Q8 is turned off.

[0080] The eleventh pattern is a switching pattern in which the fifth switching element Q5 is turned off, the sixth switching element Q6 is turned on, the seventh switching element Q7 is turned on, and the eighth switching element Q8 is turned off.

[0081] The twelfth pattern is a switching pattern in which the fifth switching element Q5 is turned off, the sixth switching element Q6 is turned on, the seventh switching element Q7 is turned off, and the eighth switching element Q8 is turned on.

[0082] The control unit 50 outputs an output voltage Vout from the secondary full bridge circuit 40 by combining either the seventh or eighth pattern of the primary full bridge circuit 30 with either the ninth to twelfth patterns of the secondary full bridge circuit 40.

[0083] The control unit 50 has a second step-down mode and a second step-up mode as load modes. The second step-down mode is a load mode in which the equivalent voltage ratio is smaller than 1. The second step-up mode is a load mode in which the equivalent voltage ratio is larger than 1.

[0084] <Second Step-Down Mode> The second step-down mode includes a second step-down delay phase mode, a second step-down in-phase mode, and a second step-down lead phase mode.

[0085] 8, the second step-down delay phase mode is a second step-down mode in which the secondary-side voltage V2 is raised from a low level to an intermediate level, the primary-side voltage V1 is raised from a low level to a high level, and then the secondary-side voltage V2 is raised from the intermediate level to a high level. The second step-down delay phase mode is a second step-down mode in which a small amount of power is output in response to the power required by the load 120.

[0086] In the load mode of the second embodiment, the difference between the first time T11 when the secondary voltage V2 rises from a low level to a middle level and the second time T12 when the primary voltage V1 rises from a low level to a high level is the first phase difference θ11. The difference between the first time T11 and the third time T13 when the secondary voltage V2 rises from a middle level to a high level is the second phase difference θ12.

[0087] During normal operation with no change in output, the primary voltage V1 and the secondary voltage V2 have waveforms of the same frequency that are inverted in phase every 180 degrees. Therefore, the time when the secondary voltage V2 falls from high level to middle level is also the first time T11, the time when the primary voltage V1 falls from high level to low level is also the second time T12, and the time when the secondary voltage V2 falls from middle level to low level is also the third time T13.

[0088] 9 , the second in-phase step-down mode is a second step-down mode in which the secondary-side voltage V2 is raised from a low level to a middle level and the primary-side voltage V1 is raised from a low level to a high level simultaneously, and then the secondary-side voltage V2 is raised from a middle level to a high level. In the second in-phase step-down mode, the first time T11 and the second time T12 are the same time. Therefore, the first phase difference θ11 is 0. The second in-phase step-down mode is a second step-down mode in which medium power is output in response to the power requested by the load 120.

[0089] 10 , the second step-down lead phase mode is a second step-down mode in which the primary-side voltage V1 is raised from a low level to a high level, the secondary-side voltage V2 is raised from a low level to an intermediate level, and then the secondary-side voltage V2 is raised from the intermediate level to a high level. The second step-down lead phase mode is a second step-down mode in which a large amount of power is output in response to the power required by the load 120.

[0090] The second buck delay phase mode is an example of a light load mode. The second buck advance phase mode is an example of a heavy load mode. The second buck same phase mode is a load mode used when switching between the light load mode and the heavy load mode and is an example of a medium load mode. In the second buck mode, switching occurs between the second buck delay phase mode and the second buck advance phase mode when the first phase difference θ11 is 0.

[0091] <Second Boost Mode> The second boost mode includes a second boost delay phase mode, a second boost in-phase mode, and a second boost lead phase mode. The second boost mode is similar to the second buck mode except for the difference in magnitude relationship between the secondary-side voltage V2 and the primary-side voltage V1 from the second buck mode, and is therefore not shown in the figures. More specifically, the second boost mode differs from the second buck mode in that the high level of the secondary-side voltage V2 is higher than the high level of the primary-side voltage V1. The second boost mode also differs from the second buck mode in that the low level of the secondary-side voltage V2 is lower than the low level of the primary-side voltage V1.

[0092] The second boost delay phase mode is a second boost mode in which the secondary-side voltage V2 is raised from a low level to an intermediate level, the primary-side voltage V1 is raised from a low level to a high level, and then the secondary-side voltage V2 is raised from the intermediate level to a high level. The second boost delay phase mode is a second boost mode in which a small amount of power is output in response to the power required by the load 120.

[0093] The second in-phase boost mode is a second boost mode in which the secondary-side voltage V2 is raised from a low level to a middle level and the primary-side voltage V1 is raised from a low level to a high level simultaneously, and then the secondary-side voltage V2 is raised from a middle level to a high level. The second in-phase boost mode is a second boost mode in which medium power is output in response to the power requested by the load 120.

[0094] The second boost mode is a second boost mode in which the primary voltage V1 is raised from a low level to a high level, the secondary voltage V2 is raised from a low level to a middle level, and then the secondary voltage V2 is raised from the middle level to a high level. The second boost mode is a second boost mode in which a large amount of power is output in response to the power required by the load 120.

[0095] The second boost delay phase mode is an example of a light load mode. The second boost advance phase mode is an example of a heavy load mode. The second boost same phase mode is a load mode used when switching between the light load mode and the heavy load mode, and is an example of a medium load mode. In the second boost mode, switching occurs between the second boost delay phase mode and the second boost advance phase mode when the first phase difference θ11 is 0.

[0096] The output control performed by the control unit 50 in the second embodiment is the same as in the first embodiment. As a result, the second embodiment can achieve the same effects as in the first embodiment. [Modifications] The embodiment can be modified as follows. The embodiment and the following modifications can be combined and implemented within a range that does not cause technical contradictions.

[0097] In each embodiment, the output power is increased as the frequency is lowered, but the frequency may be increased instead. This widens the range of the first phase difference and the second phase difference that satisfy Conditions 1 and 2, and therefore the output power may be increased by adjusting the first phase difference and the second phase difference.

[0098] In each embodiment, as shown in FIG. 7 , an upper and lower limit may be set for the frequency. The region where the frequency exceeds the upper limit is a low load region. The region where the frequency falls below the lower limit is a heavy load region. In the embodiments, the frequency is increased even in the low load region where the frequency exceeds the upper limit, and decreased even in the heavy load region where the frequency falls below the lower limit. In contrast, for example, the control unit 50 may fix the frequency to the upper limit in the low load region where the frequency exceeds the upper limit. The control unit 50 may fix the frequency to the lower limit in the heavy load region where the frequency exceeds the lower limit. The control unit 50 varies the frequency between the upper and lower limits. Specifically, when deriving the combination of the first phase difference θ1, the second phase difference θ2, and the frequency in step S3, the control unit 50 derives a frequency between the upper and lower limits. The upper limit is set based on the loss and AC resistance when the switching elements Q1 to Q8 are turned off. For example, the upper limit is set so that increasing the frequency does not increase loss. The lower limit is set so that magnetic saturation of the transformer 20 does not occur.

[0099] By setting an upper limit and a lower limit for the frequency, it is possible to prevent an increase in loss due to an increase in frequency and magnetic saturation of the transformer 20 due to a decrease in frequency.

[0100] In each embodiment, the control unit 50 may change which of the primary side full bridge circuit 30 and the secondary side full bridge circuit 40 is to be subjected to the three-level control between the light load mode and the heavy load mode. For example, the control unit 50 may perform three-level control on the primary side full bridge circuit 30 in the light load mode, and perform three-level control on the secondary side full bridge circuit 40 in the heavy load mode. In this case, two-level control is performed on the primary side full bridge circuit 30 or the secondary side full bridge circuit 40 that is not to be subjected to the three-level control.

[0101] In each embodiment, the transformer unit TS may include either a first reactor L1 connected to the primary winding 22 or a second reactor L2 connected to the secondary winding 23. When the transformer unit TS includes only the first reactor L1, the secondary voltage V2 is the voltage applied to the secondary winding 23. When the transformer unit TS includes only the second reactor L2, the primary voltage V1 is the voltage applied to the primary winding 22.

[0102] In each embodiment, the control unit 50 may perform the output control of the embodiment in at least one of a light load mode, a medium load mode, and a heavy load mode. That is, it is sufficient for the control unit 50 to achieve both the output of the required power and soft switching in at least one of the light load mode, the medium load mode, and the heavy load mode.

Claims

1. A power supply comprising: a transformer unit having a primary winding, a secondary winding, and a reactor connected to at least one of the primary winding or the secondary winding; a primary full-bridge circuit connected to the primary winding and having a plurality of primary switching elements; a secondary full-bridge circuit connected to the secondary winding and having a plurality of secondary switching elements; and a control unit configured to control the plurality of primary switching elements and the plurality of secondary switching elements, wherein a condition for performing soft switching of the plurality of primary switching elements is condition 1 and a condition for performing soft switching of the plurality of secondary switching elements is condition 2, and condition 1 is that when at least one of the plurality of primary switching elements switches between ON and OFF, a primary condition current value, which is the value of a current flowing through the primary winding in the forward direction of a diode connected in parallel to the primary switching element that switches from OFF to ON among the plurality of primary switching elements, is equal to or greater than the absolute value of a primary winding current threshold, Condition 2 is that when at least one of the plurality of secondary side switching elements switches between ON and OFF, a secondary side conditional current value, which is the value of a current flowing through the secondary side winding in the forward direction of a diode connected in parallel to the secondary side switching element that switches from OFF to ON among the plurality of secondary side switching elements, is equal to or greater than the absolute value of a secondary side winding current threshold value; the control unit is configured to control the primary side full bridge circuit and the secondary side full bridge circuit so that one of the primary side full bridge circuit and the secondary side full bridge circuit applies a two-level voltage to the transformer unit and the other applies a three-level voltage to the transformer unit; the two-level voltage and the three-level voltage have waveforms of the same frequency that are inverted in phase every 180 degrees; a difference between a first time when the three-level voltage rises from a low level to a middle level and a second time when the two-level voltage rises from a low level to a high level is a first phase difference, and a difference between the first time and a third time when the three-level voltage rises from a middle level to a high level is a second phase difference;the control unit controls the primary-side full bridge circuit and the secondary-side full bridge circuit so as to realize a combination of the first phase difference, the second phase difference, the frequency of the two-level voltage, and the frequency of the three-level voltage that can output required power and that satisfies condition 1 and condition 2.

2. The power conversion device according to claim 1, wherein the control unit is configured to have a light load mode, a medium load mode in which the maximum value of output power is greater than that in the light load mode, and a heavy load mode in which the maximum value of output power is greater than that in the medium load mode, and to control the primary side full bridge circuit and the secondary side full bridge circuit so as to realize a combination of the first phase difference, the second phase difference, the frequency of the two-level voltage, and the frequency of the three-level voltage that can output the required power in all of the light load mode, the medium load mode, and the heavy load mode, and that satisfies condition 1 and condition 2.

3. The power conversion device according to claim 1 or claim 2, wherein upper and lower limits are set for the frequencies of the two-level voltage and the three-level voltage, and the control unit is configured to vary the frequencies of the two-level voltage and the three-level voltage between the upper and lower limits.

4. The power conversion device according to claim 1 or 2, wherein the control unit is configured to lower the frequency of the two-level voltage and the frequency of the three-level voltage as the required power increases.

Images