Plasma processing device, bias electric power supply system, and plasma processing method

Abstract

The disclosed plasma processing device comprises a substrate support in a chamber and a bias electric power supply system. The substrate support includes a first electrode disposed below a substrate support surface and a second electrode disposed below a ring support surface. The bias electric power supply system is electrically coupled to the first and second electrodes. The bias electric power supply system includes at least one DC electric power supply, first and second switching circuits, and a single signal generator. The single signal generator is configured to generate a pulse control signal for controlling the first switching circuit to connect the first electrode to the at least one DC electric power supply and the ground in alternating fashion, and controlling the second switching circuit to connect the second electrode to the at least one DC electric power supply and the ground in alternating fashion.

Description

Plasma processing apparatus, bias power supply system, and plasma processing method

[0001] SUMMARY Exemplary embodiments of the present disclosure relate to a plasma processing apparatus, a bias power supply system, and a plasma processing method.

[0002] A plasma processing apparatus is used for plasma processing of a substrate. The plasma processing apparatus described in Patent Document 1 below has a first electrode and a second electrode in a substrate support portion within a chamber of the plasma processing apparatus. The first electrode is provided below a substrate support surface on which a substrate is placed, and the second electrode is provided below a ring support surface on which an edge ring is placed. A first bias power supply is connected to the first electrode, and a second bias power supply is connected to the second electrode.

[0003] Japanese Patent Application Laid-Open No. 2021-158134

[0004] The present disclosure provides techniques for improving the radial uniformity of plasma processing on a substrate.

[0005] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support, a plasma generation unit, and a bias power system. The substrate support is disposed within the chamber. The substrate support includes a substrate support surface, an edge ring support surface, a first electrode, and a second electrode. The edge ring support surface surrounds the substrate support surface. The first electrode is disposed below the substrate support surface. The second electrode is disposed below the edge ring support surface. The plasma generation unit is configured to generate a plasma from a gas within the chamber. The bias power system is electrically coupled to the first electrode and the second electrode. The bias power system includes at least one DC power supply, a first switching circuit, a second switching circuit, and a single signal generator. The first switching circuit is electrically connected between each of the at least one DC power supply and a ground and the first electrode. The second switching circuit is electrically connected between each of the at least one DC power supply and a ground and the second electrode. The single signal generator is configured to generate a pulse control signal for controlling a first switching circuit to alternately connect the first electrode to at least one DC power source and ground, and for controlling a second switching circuit to alternately connect the second electrode to at least one DC power source and ground.

[0006] According to one exemplary embodiment, a technique is provided for improving radial uniformity of plasma processing on a substrate.

[0007] FIG. 1 is a diagram for explaining an example configuration of a plasma processing system; FIG. 2 is a diagram for explaining an example configuration of a capacitively coupled plasma processing apparatus; FIG. 3 is a diagram showing a substrate support and a power supply in a plasma processing apparatus according to an exemplary embodiment; FIG. 4 is a diagram showing a bias power supply system according to an exemplary embodiment; FIG. 5 is a timing chart related to a bias power supply system according to an exemplary embodiment; FIG. 6 is a flow chart showing a plasma processing method according to an exemplary embodiment; FIG. 7 is a diagram showing connections of multiple switching elements that can be employed in a bias power supply system according to an exemplary embodiment; FIG. 8 is a diagram showing a substrate support and a power supply in a plasma processing apparatus according to another exemplary embodiment; FIG. 9 is a diagram showing a substrate support and a power supply in a plasma processing apparatus according to yet another exemplary embodiment; and FIG. 10 is a block diagram of a processing circuit for performing the operations described herein on a computer.

[0008] Various exemplary embodiments will be described in detail below with reference to the drawings, in which the same or equivalent parts are designated by the same reference numerals.

[0009] FIG. 1 is a diagram illustrating an exemplary configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 (described later), and the gas exhaust port is connected to an exhaust system 40 (described later). The substrate support 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.

[0010] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), or surface wave plasma (SWP). Various types of plasma generators may be used, including alternating current (AC) plasma generators and direct current (DC) plasma generators. In one embodiment, the AC signal (AC power) used in the AC plasma generator has a frequency in the range of 100 kHz to 10 GHz. Thus, AC signals include radio frequency (RF) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0011] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 may be implemented by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and execute the read program to perform various control operations. This program may be stored in the storage unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a random access memory (RAM), a read-only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).

[0012] The following describes a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1. Fig. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0013] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0014] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

[0015] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that the annular region 111b may also be provided by another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Furthermore, at least one RF / DC electrode coupled to an RF power supply 31 and / or a DC power supply 32, which will be described later, may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or a DC signal, which will be described later, is supplied to the at least one RF / DC electrode, the RF / DC electrode is also called a bias electrode. Note that the conductive member of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Furthermore, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.

[0016] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0017] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0018] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0019] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

[0020] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, thereby attracting ion components in the formed plasma to the substrate W.

[0021] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0022] The second RF generator 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0023] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to the at least one lower electrode and configured to generate a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to the at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0024] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generator for generating the sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have either positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generating units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b.

[0025] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0026]

[0033] Hereinafter, reference will be made to Fig. 3. Fig. 3 is a diagram showing a substrate support and a power supply in a plasma processing apparatus according to one exemplary embodiment. The substrate support 11, the power supply, and the configuration related to the power supply shown in Fig. 3 can be employed in the plasma processing apparatus 1.

[0027] As described above, the substrate support 11 includes the base 1110 and the electrostatic chuck 1111. The first RF generator 31a may be electrically connected to the base 1110 via a matching unit 31am.

[0028] The substrate support 11 includes a first region R1 and a second region R2. In FIG. 3 , the boundary between the first region R1 and the second region R2 is indicated by a dashed line. The first region R1 is a region that intersects with the axis AX and has a generally disk shape. The axis AX is the central axis of the substrate support 11 and may coincide with the central axis of the chamber 10. The first region R1 includes the above-mentioned substrate support surface 111a as its upper surface. The second region R2 extends to surround the first region R1. The substrate W is placed on the substrate support surface 111a and is supported on the first region R1. The second region R2 is an annular region around the axis AX. The second region R2 includes the above-mentioned ring support surface 111b as its upper surface. The edge ring ER included in the ring assembly 112 is placed on the ring support surface 111b and supported on the second region R2. The substrate W is placed within the region surrounded by the edge ring ER.

[0029] The substrate support 11 includes a first electrode BE1 and a second electrode BE2. The first electrode BE1 extends below the substrate support surface 111a and is disposed within the first region R1. The first electrode BE1 may be a film formed from a conductive material. The first electrode BE1 may have a substantially circular planar shape. The first electrode BE1 may be disposed such that its center is located on the axis AX.

[0030] The second electrode BE2 extends at least below the ring support surface 111b and at least within the second region R2. The second electrode BE2 may be a film formed of a conductive material. The second electrode BE2 may have a substantially annular planar shape. The second electrode BE2 may be disposed so that its center is located on the axis AX. In one embodiment, the inner edge region of the second electrode BE2 may extend below the edge region of the first electrode BE1 and within the first region R1. That is, the inner edge region of the second electrode BE2 may extend within the first region R1 so as to overlap with the first electrode BE1 in the longitudinal or vertical direction (the direction along the axis AX).

[0031] 3, the electrostatic chuck 1111 may include a dielectric portion 1111d. The dielectric portion 1111d may be the ceramic member 1111a described above. A central portion of the dielectric portion 1111d may form a first region R1 and may have the substrate support surface 111a as its upper surface. A peripheral portion of the dielectric portion 1111d may form a second region R2 and may have the ring support surface 111b as its upper surface.

[0032] The electrostatic chuck 1111 may include a chuck electrode CE1 as part of the electrostatic electrode 1111b. The chuck electrode CE1 is disposed within the dielectric portion 1111d and within the first region R1. The chuck electrode CE1 may be a film formed of a conductive material. The chuck electrode CE1 may have a substantially circular planar shape. The chuck electrode CE1 may be disposed such that its center is located on the axis AX. The chuck electrode CE1 may extend between the substrate support surface 111a and the first electrode BE1.

[0033] The electrostatic chuck 1111 may also include chuck electrodes CE2 and CE3 as separate parts of the electrostatic electrode 1111b. Each of the chuck electrodes CE2 and CE3 is disposed within the dielectric portion 1111d and the second region R2. Each of the chuck electrodes CE2 and CE3 may be a film formed of a conductive material. Each of the chuck electrodes CE2 and CE3 may extend circumferentially around the axis AX or have a substantially annular planar shape. The chuck electrode CE2 is disposed inward relative to the chuck electrode CE3. That is, the radial distance between the chuck electrode CE2 and the axis AX is smaller than the radial distance between the chuck electrode CE3 and the axis AX. Each of the chuck electrodes CE2 and CE3 may also extend between the ring support surface 111b and the second electrode BE2.

[0034] The plasma processing apparatus 1 may further include a DC power supply 41p. The DC power supply 41p is electrically connected to the chuck electrode CE1 via a switch 41s. A filter 41f may further be connected between the DC power supply 41p and the chuck electrode CE1. The filter 41f is a low-pass filter configured to block or attenuate RF signals such as source RF signals. When a voltage from the DC power supply 41p is applied to the chuck electrode CE1, an electrostatic attraction force is generated between the electrostatic chuck 1111 and the substrate W. The generated electrostatic attraction force attracts the substrate W to the first region R1 and holds the substrate W in the first region R1.

[0035] The plasma processing apparatus 1 may further include DC power supplies 42p and 43p. The DC power supply 42p is electrically connected to the chuck electrode CE2 via a switch 42s. A filter 42f may be further connected between the DC power supply 42p and the chuck electrode CE2. The filter 42f is a low-pass filter configured to block or attenuate RF signals such as source RF signals. The DC power supply 43p is electrically connected to the chuck electrode CE3 via a switch 43s. A filter 43f may be further connected between the DC power supply 43p and the chuck electrode CE3. The filter 43f is a low-pass filter configured to block or attenuate RF signals such as source RF signals. When voltages from the DC power supplies 42p and 43p are applied to the chuck electrodes CE2 and CE3, electrostatic attraction is generated between the electrostatic chuck 1111 and the edge ring ER. The edge ring ER is attracted to the second region R2 by the generated electrostatic force and held by the second region R2. Note that a voltage may be applied to the chuck electrodes CE2 and CE3 so as to generate a potential difference therebetween. That is, the second region R2 may constitute a bipolar electrostatic chuck.

[0036] The plasma processing apparatus 1 further includes a bias power supply system 50 as the first DC generating unit 32a. The bias power supply system 50 is electrically coupled to the first electrode BE1 and the second electrode BE2. The bias power supply system 50 includes at least one DC power supply, a first switching circuit 61, a second switching circuit 62, and a single signal generator 70.

[0037] The first switching circuit 61 is electrically connected between the first electrode BE1 and each of the at least one DC power supply and ground. The second switching circuit 62 is electrically connected between the second electrode BE2 and each of the at least one DC power supply and ground. In the example shown in FIG. 3 , the bias power supply system 50 includes a DC power supply 51 and a DC power supply 52 as at least one DC power supply. The DC power supply 51 is electrically connected to the first electrode BE1 via the first switching circuit 61. The DC power supply 52 is electrically connected to the second electrode BE2 via the second switching circuit 62. Each of the DC power supply 51 and the DC power supply 52 may be a variable DC power supply. Note that the bias power supply system 50 may also include a single DC power supply as at least one DC power supply.

[0038] The signal generator 70 is configured to generate a pulse control signal to control the first switching circuit 61 and the second switching circuit 62. The signal generator 70 may include a single clock generator including an oscillator such as a crystal oscillator, and may generate a pulse control signal synchronized with the clock generator. The signal generator 70 may be configured like the processing circuit 130 described below, or may be configured as a dedicated circuit.

[0039] The pulse control signals generated by the signal generator 70 alternately connect the first electrode BE1 to at least one DC power supply and ground, and alternately connect the second electrode BE2 to at least one DC power supply and ground, so that the bias power supply system 50 supplies a sequence of voltage pulses as an electrical bias to each of the first electrode BE1 and the second electrode BE2. The sequence of voltage pulses is supplied to the first electrode BE1 and the second electrode BE2 to attract ions from the plasma in the chamber 10 to the substrate W and the edge ring ER.

[0040] In the bias power supply system 50, the first switching circuit 61 and the second switching circuit 62 are controlled by a pulse control signal from a single signal generator 70 to generate a sequence of voltage pulses to be supplied to the first electrode BE1 and the second electrode BE2. Therefore, the phase difference between the voltage waveform of the substrate W corresponding to the sequence of voltage pulses and the voltage waveform of the edge ring ER corresponding to the sequence of voltage pulses is reduced. Therefore, the plasma processing apparatus 1 improves the radial uniformity of plasma processing on the substrate W.

[0041] Reference will now be made to FIG. 4 , which is a diagram illustrating a bias power supply system according to an exemplary embodiment. In one embodiment, the bias power supply system 50 may have the configuration shown in FIG. 4 . That is, the first switching circuit 61 may include at least one first switching element 611 and at least one second switching element 612. As shown in FIG. 4 , the first switching circuit 61 may include one first switching element 611 and one second switching element 612.

[0042] 4, the second switching circuit 62 may include at least one third switching element 623 and at least one fourth switching element 624. Each of the at least one first switching element 611, the at least one second switching element 612, the at least one third switching element 623, and the at least one fourth switching element 624 may be composed of a transistor such as an FET.

[0043] The first switching element 611 includes a control terminal 611c. The first switching element 611 further includes a first terminal and a second terminal. The control terminal 611c is connected to the signal generator 70. In one embodiment, the control terminal 611c is connected to the output 70a of the signal generator 70 for the pulse control signal described above. The first switching element 611 is configured to switch between open and closed states in response to a pulse control signal provided to the control terminal 611c. That is, the first switching element 611 is configured to switch between conduction and disconnection between its first and second terminals in response to the pulse control signal provided to the control terminal 611c.

[0044] The first switching element 611 is connected between the negative electrode of the DC power supply 51 and a node 61na. A first terminal of the first switching element 611 is connected to the negative electrode of the DC power supply 51, and a second terminal of the first switching element 611 is connected to the node 61na. The node 61na is connected to a node 61nb.

[0045] The second switching element 612 includes a control terminal 612c. The second switching element 612 further includes a first terminal and a second terminal. The control terminal 612c is connected to the signal generator 70. In one embodiment, the control terminal 612c is connected to an output 70b of the signal generator 70 for an inverted signal of the above-mentioned pulse control signal. The second switching element 612 is configured to switch between open and closed states in response to the inverted signal provided to the control terminal 612c. That is, the second switching element 612 is configured to switch between conductive and disconnected states between its first and second terminals in response to the inverted signal provided to the control terminal 612c.

[0046] The second switching element 612 is connected between the node 61na and each of the positive electrode and ground of the DC power supply 51. A first terminal of the second switching element 612 is connected to the node 61na, and a second terminal of the second switching element 612 is connected to the positive electrode of the DC power supply 51 and ground.

[0047] The first switching circuit 61 may further include a diode 61da and a diode 61db. The anode of the diode 61da is connected to the negative electrode of the DC power supply 51 and the first terminal of the first switching element 611. The cathode of the diode 61da is connected to a node 61nb. The anode of the diode 61db is connected to a node 61nb. The cathode of the diode 61db is connected to the positive electrode of the DC power supply 51, ground, and the second terminal of the second switching element 612. The first switching circuit 61 may further include an inductor 61i, which may be connected between the node 61na and the node 61nb. The node 61nb is electrically connected to the first electrode BE1. The first electrode BE1 may be electrically connected to the first electrode BE1 via a resistor 61r. In addition, a low-pass filter that blocks or attenuates RF signals such as source RF signals may be connected between the first electrode BE1 and the output of the first switching circuit 61 (node ​​61nb or the end of the resistor 61r on the first electrode BE1 side).

[0048] The third switching element 623 includes a control terminal 623c. The third switching element 623 further includes a first terminal and a second terminal. The control terminal 623c is connected to the signal generator 70. In one embodiment, the control terminal 623c is connected to the output 70a of the signal generator 70 for the pulse control signal described above. The third switching element 623 is configured to switch between open and closed states in response to a pulse control signal provided to the control terminal 623c. That is, the third switching element 623 is configured to switch between conduction and disconnection between its first and second terminals in response to the pulse control signal provided to the control terminal 623c.

[0049] The third switching element 623 is connected between the negative electrode of the DC power supply 52 and a node 62na. A first terminal of the third switching element 623 is connected to the negative electrode of the DC power supply 52, and a second terminal of the third switching element 623 is connected to the node 62na. The node 62na is connected to a node 62nb.

[0050] The fourth switching element 624 includes a control terminal 624c. The fourth switching element 624 further includes a first terminal and a second terminal. The control terminal 624c is connected to the signal generator 70. In one embodiment, the control terminal 624c is connected to an output 70b of the signal generator 70 for an inverted signal of the above-mentioned pulse control signal. The fourth switching element 624 is configured to switch between open and closed states in response to the inverted signal provided to the control terminal 624c. That is, the fourth switching element 624 is configured to switch between conduction and disconnection between its first and second terminals in response to the inverted signal provided to the control terminal 624c.

[0051] The fourth switching element 624 is connected between the node 62na and each of the positive electrode of the DC power supply 52 and the ground. A first terminal of the fourth switching element 624 is connected to the node 62na, and a second terminal of the fourth switching element 624 is connected to the positive electrode of the DC power supply 52 and the ground.

[0052] The second switching circuit 62 may further include a diode 62da and a diode 62db. The anode of the diode 62da is connected to the negative electrode of the DC power supply 52 and the first terminal of the third switching element 623. The cathode of the diode 62da is connected to a node 62nb. The anode of the diode 62db is connected to a node 62nb. The cathode of the diode 62db is connected to the positive electrode of the DC power supply 52, ground, and the second terminal of the fourth switching element 624. The second switching circuit 62 may further include an inductor 62i, and the inductor 62i may be connected between the node 62na and the node 62nb. The node 62nb is electrically connected to the second electrode BE2. The second electrode BE2 may be electrically connected to the second electrode BE2 via a resistor 62r. A low-pass filter that blocks or attenuates RF signals such as the source RF signal may be connected between the second electrode BE2 and the output of the second switching circuit 62 (node ​​62nb or the end of resistor 62r on the second electrode BE2 side).

[0053] 4 , the output of the first switching circuit 61 (node ​​61nb or the end of the resistor 61r on the first electrode BE1 side) may be connected to the cathode of the diode 62db. In this case, the positive electrode of the DC power supply 52 does not need to be connected to ground. In this case, the voltage pulse output from the second switching circuit 62 has an output voltage value that is the sum of the negative output voltage values ​​of the DC power supplies 51 and 52. Note that the output of the first switching circuit 61 (node ​​61nb or the end of the resistor 61r on the first electrode BE1 side) does not need to be connected to the cathode of the diode 62db.

[0054] Reference is now made to Figure 5, which is a timing diagram associated with a bias power supply system according to one exemplary embodiment, showing the level of the pulse control signal, the level of the inverted signal, the states of the first and third switching elements, the states of the second and fourth switching elements, the output voltage of the first switching circuit 61, and the output voltage of the second switching circuit 62.

[0055] 5, the signal generator 70 may generate the pulse control signal and the inverted signal such that each of the pulse control signal and the inverted signal alternates between a first level and a second level. Note that the first levels of the pulse control signal and the inverted signal may be different from each other. Also, the second levels of the pulse control signal and the inverted signal may be different from each other.

[0056] The first switching element 611 and the third switching element 623 are closed (conducting) when the pulse control signal has a first level L1, and are open (disconnected) when the pulse control signal has a second level L2. The second switching element 612 and the fourth switching element 624 are closed when the inverted signal has the first level L1, and are open when the inverted signal has the second level L2. As a result, as shown in FIG. 5 , the voltage pulse applied from the first switching circuit 61 to the first electrode BE1 and the voltage pulse applied from the second switching circuit 62 to the second electrode BE2 are synchronized with each other, and the phase difference therebetween is eliminated.

[0057] In one embodiment, the lengths of the first electrical path and the second electrical path may be approximately the same. The first electrical path is an electrical path that electrically connects at least one DC power supply (e.g., the negative pole of the DC power supply 51) of the bias power supply system 50 to the first electrode BE1. The second electrical path is an electrical path that electrically connects the at least one DC power supply (e.g., the negative pole of the DC power supply 52) to the second electrode BE2. In this case, the phase difference between the voltage pulse applied from the first switching circuit 61 to the first electrode BE1 and the voltage pulse applied from the second switching circuit 62 to the second electrode BE2 is further reduced.

[0058] In one embodiment, the vertical distance between the first electrode BE1 and the substrate support surface 111 a and the vertical distance between the second electrode BE2 and the ring support surface 111 b may be substantially the same, which further reduces the phase difference between the voltage pulse applied from the first switching circuit 61 to the first electrode BE1 and the voltage pulse applied from the second switching circuit 62 to the second electrode BE2.

[0059] In one embodiment, as described above, the edge region of the first electrode BE1 and the inner edge region of the second electrode BE2 may be arranged to overlap each other in the vertical direction. In this case, a portion of the voltage pulse output from the first switching circuit 61 is coupled to the edge ring ER, and a portion of the voltage pulse output from the second switching circuit 62 is coupled to the substrate W. This further improves the radial uniformity of the plasma processing on the substrate W.

[0060] In one embodiment, the first switching circuit 61 and the second switching circuit 62 may be formed in a single member 65. The member 65 may be a single housing or a single circuit board. That is, the first switching circuit 61 and the second switching circuit 62 may be disposed in a single housing. Alternatively or additionally, the first switching circuit 61 and the second switching circuit 62 may be formed on a single circuit board.

[0061] A plasma processing method according to one exemplary embodiment will be described below with reference to Fig. 6. The plasma processing method shown in Fig. 6 (hereinafter referred to as "method MT") can be applied to a plasma processing apparatus 1. In method MT, each component of the plasma processing apparatus 1 can be controlled by a controller 2. Note that method MT can also be applied to plasma processing apparatuses other than the plasma processing apparatus 1, for example, plasma processing apparatuses according to various other embodiments described below.

[0062] The method MT starts with step STa. In step STa, a substrate W is placed on the substrate support surface 111a. The substrate W is disposed on the electrostatic chuck 1111 within a region surrounded by the edge ring ER. The substrate W is held by the electrostatic chuck 1111.

[0063] In process STb, plasma is generated in the chamber 10. In process STb, gas is supplied from the gas supply unit 20 into the chamber 10. In process STb, the pressure in the chamber 10 is reduced to a specified pressure by the exhaust system 40. In process STb, plasma is generated from the gas in the chamber 10 by the plasma generating unit 12. In one embodiment, a source RF signal is supplied from the first RF generating unit 31 a to generate plasma from the gas in the chamber 10.

[0064] In process STc, a sequence of voltage pulses is supplied from the bias power supply system 50 to the first electrode BE1 and the second electrode BE2 to attract ions from the plasma in the chamber 10 to the substrate W and the edge ring ER. In process STc, a pulse control signal is provided from the single signal generator 70 to the first switching circuit 61 and the second switching circuit 62 to generate the sequence of voltage pulses in the bias power supply system 50.

[0065] Reference will now be made to FIG. 7 . FIG. 7 is a diagram illustrating the connection of multiple switching elements that can be employed in a bias power supply system according to an exemplary embodiment. The multiple switching elements SW illustrated in FIG. 7 are connected in series and / or in parallel. A switching element group including the multiple switching elements SW can be used as one or more of at least one first switching element 611, at least one second switching element 612, at least one third switching element 623, and at least one fourth switching element 624. When the multiple switching elements SW are connected in series, the withstand voltage of the switching element group increases. Furthermore, when the multiple switching elements SW are connected in parallel, the allowable current of the switching element group increases.

[0066] Specifically, the bias power supply system 50 may include a plurality of first switching elements 611 as the at least one first switching element 611. The plurality of first switching elements 611 may be connected in series and / or in parallel between the first electrode BE1 and at least one DC power supply (e.g., the negative electrode of the DC power supply 51) like a plurality of switching elements SW.

[0067] Furthermore, the bias power supply system 50 may include a plurality of third switching elements 623 as the at least one third switching element 623. The plurality of third switching elements 623 may be connected in series and / or in parallel between the second electrode BE2 and at least one DC power supply (e.g., the negative electrode of the DC power supply 52) like the plurality of switching elements SW.

[0068] Moreover, the bias power supply system 50 may include a plurality of second switching elements 612 as the at least one second switching element 612. The plurality of second switching elements 612 may be connected in series and / or in parallel between the first electrode BE1 and the ground like the plurality of switching elements SW.

[0069] Moreover, the bias power supply system 50 may include a plurality of fourth switching elements 624 as the at least one fourth switching element 624. The plurality of fourth switching elements 624 may be connected in series and / or in parallel between the second electrode BE2 and the ground like the plurality of switching elements SW.

[0070] Reference will now be made to FIG. 8, which is a diagram showing a substrate support and power supplies in a plasma processing apparatus according to another exemplary embodiment. The plasma processing apparatus 1A shown in FIG. 8 will be described below in terms of differences from the plasma processing apparatus 1. Note that DC power supplies 41p, 42p, and 43p, switches 41s, 42s, and 43s, and filters 41f, 42f, and 43f are omitted from FIG.

[0071] In the plasma processing apparatus 1A, the substrate support 11 further includes a third electrode BE3. The third electrode BE3 extends below the substrate support surface 111a and within the first region R1 so as to surround the first electrode BE1. The third electrode BE3 is spaced apart from the first electrode BE1. The third electrode BE3 may be a film formed of a conductive material. The third electrode BE3 may have a substantially annular planar shape. The third electrode BE3 may be disposed so that its center is located on the axis AX. In the plasma processing apparatus 1A, instead of the first electrode BE1, the edge region of the third electrode BE3 and the inner edge region of the second electrode BE2 may be disposed so as to overlap each other in the vertical direction.

[0072] The plasma processing apparatus 1A includes a bias power supply system 50A instead of the bias power supply system 50. The bias power supply system 50A further includes a third switching circuit 63. The circuit configuration of the third switching circuit 63 is similar to the circuit configurations of the first switching circuit 61 and the second switching circuit 62. The third switching circuit 63 is electrically connected between the third electrode BE3 and at least one DC power supply (e.g., the negative electrode of the DC power supply 53) and ground. A single signal generator 70 generates the above-mentioned pulse control signal to control the third switching circuit 63 to alternately connect the third electrode BE3 to at least one DC power supply (e.g., the negative electrode of the DC power supply 53) and ground. The single signal generator 70 may also provide the above-mentioned inverted signal to the third switching circuit 63 for control of the third switching circuit 63, similar to the first switching circuit 61 and the second switching circuit 62.

[0073] The vertical distance between the third electrode BE3 and the substrate support surface 111a may be the same as the vertical distance between the first electrode BE1 and the substrate support surface 111a. The length of the third electrical path connecting at least one DC power supply (e.g., the negative pole of the DC power supply 53) and the third electrode BE3 may be approximately the same as the lengths of the first and second electrical paths. The third switching circuit 63 may be disposed within the member 65 together with the first and second switching circuits 61 and 62.

[0074] Reference will now be made to FIG. 9 , which is a diagram illustrating a substrate support and a power supply in a plasma processing apparatus according to yet another exemplary embodiment. As shown in FIG. 9 , in the plasma processing apparatus 1, the second electrode BE2 may extend only within the second region R2. That is, the second electrode BE2 may not overlap the first electrode BE1 in the vertical direction within the first region R1. Also, in the plasma processing apparatus 1A, the second electrode BE2 may extend only within the second region R2. That is, the second electrode BE2 may not overlap the third electrode BE3 in the vertical direction within the first region R1.

[0075] The following describes examples of processing circuits that can be used as one or more processing circuits in the plasma processing apparatus 1, such as the controller 2 and / or the signal generator 70. FIG. 10 is a block diagram of a processing circuit for implementing the operations described herein on a computer. FIG. 10 illustrates a processing circuit 130 that can be used to control a control process on any computer. The descriptions or blocks in the flowcharts represent modules, segments, or portions of code that include one or more executable instructions for implementing specific logical functions or steps of the process. As will be understood by those skilled in the art, other examples having functions that can be performed in a different order than that shown or described, such as substantially concurrently or in reverse order, depending on the functionality involved, are within the scope of the exemplary embodiments of the present disclosure. The various elements, features, and processes described herein may be used independently of each other or combined in various ways. All conceivable combinations and subcombinations are within the scope of the present disclosure.

[0076] In Figure 10, processing circuitry 130 includes a CPU 1200 that performs one or more of the control processes described above and / or below. Process data and instructions may be stored in memory 1202. These process data and instructions may be stored on a storage medium disk 1204, such as a hard disk drive (HDD) or a portable storage medium, or may be stored remotely. Furthermore, the claimed disclosure is not limited by the form of computer-readable medium on which instructions for processes according to the present invention are stored. For example, these instructions may be stored on a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or any other information processing device, such as a server and / or computer, with which processing circuitry 130 communicates.

[0077] Furthermore, the claimed disclosure may be provided as a utility application, a background daemon, a component of an operating system, or a combination thereof, and may execute in conjunction with CPU 1200 and an operating system known to those skilled in the art, such as Microsoft Windows®, UNIX®, Solaris®, LINUX®, Apple MAC-OS, etc.

[0078] The hardware elements making up the processing circuit 130 can be realized by various circuit elements. Furthermore, each function of the above-described embodiments can be implemented by a circuit including one or more processing circuits. As shown in FIG. 10, the processing circuit includes a specifically programmed processing unit, such as a processing unit (CPU) 1200. The processing circuit also includes devices such as application specific integrated circuits (ASICs) or conventional circuit components configured to perform the described functions.

[0079] 10, processing circuitry 130 includes a CPU 1200 that performs the above-described processing. Processing circuitry 130 may be a general-purpose computer or a specialized machine. In one embodiment, processing circuitry 130 functions as a specialized machine when processing device 1200 is programmed to control plasma generation unit 12 and gas supply unit 20 and / or to control bias power supply system 50.

[0080] Alternatively or additionally, CPU 1200 may be implemented on an FPGA, ASIC, PLD, or using discrete logic circuitry, as will be appreciated by those skilled in the art. Furthermore, CPU 1200 may be implemented as multiple processing units cooperating to perform in parallel the instructions of the processes of the present invention described above.

[0081] The processing circuitry 130 of Figure 10 also includes a network controller 1206, such as an Intel Ethernet PRO network interface card from Intel Corporation of America, for interfacing with a network 1228. As can be appreciated, the network 1228 may be a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof, and may also include sub-networks such as PSTN or ISDN. The network 1228 may also be wired, such as an Ethernet network, or wireless, such as a cellular network including EDGE, 3G, and 4G wireless cellular systems. The wireless network may also be Wi-Fi, Bluetooth, or any other known form of wireless communication.

[0082] The processing circuitry 130 further includes a display device controller 1208, such as a graphics card or graphics adapter, for interfacing with a display device 1210, such as a monitor. A general-purpose I / O interface 1212 interfaces with a keyboard and / or mouse 1214 and a touch panel 1216, which may be integral with or separate from the display device 1210. The general-purpose I / O interface also connects to various peripheral devices 1218, such as printers and scanners.

[0083] The storage controller 1224 is connected to the storage media disk 1204 via a communication bus 1226, such as ISA, EISA, VESA, PCI, etc., and all components of the processing circuit 130 are connected to each other. The display device 1210, keyboard and / or mouse 1214, and the general features and functions of the display device controller 1208, storage controller 1224, network controller 1206, audio controller 1220, and general purpose I / O interface 1212 are not described herein for the sake of brevity, as they are well known.

[0084] The exemplary circuit elements described in this disclosure may be substituted with other elements and may have different structures than the examples described herein. Furthermore, circuits configured to implement the features described herein may be implemented in multiple circuit units (e.g., chips), or these features may be combined into the circuitry of a single chipset.

[0085] The functions and features described herein may also be performed by various distributed components on a system. For example, one or more processing devices may perform the functions of these systems, where the processing devices are distributed across multiple components communicating within a network. Distributed components may include various human interface and communication devices (e.g., display monitors, smartphones, tablets, personal digital assistants (PDAs)), as well as one or more client and server machines that can share processing. The network may be a private network, such as a LAN or WAN, or a public network, such as the Internet. Input to the system may be received directly by a user or remotely in real time or as a batch process. Furthermore, portions of the embodiments may be implemented on modules or hardware other than those described above. Accordingly, other embodiments are within the scope of the claims.

[0086] Although various exemplary embodiments have been described above, the present invention is not limited to the above-described exemplary embodiments, and various additions, omissions, substitutions, and modifications may be made. Furthermore, elements in different embodiments may be combined to form other embodiments.

[0087] For example, the chuck electrode CE1 may also serve as the first electrode BE1. Alternatively or in addition, one or both of the chuck electrodes CE2 and CE3 may also serve as the second electrode BE2.

[0088] First and second experimental examples conducted to evaluate the plasma processing apparatus 1 are described below. In the first experimental example, plasma etching was performed on a film on a sample substrate using the plasma processing apparatus 1 shown in FIG. 9 . That is, in the first experimental example, a sequence of voltage pulses generated by controlling the first and second switching circuits with a pulse control signal from a single signal generator 70 was supplied to the first electrode BE1 and the second electrode BE2. In the second experimental example, plasma etching was performed on a film on a sample substrate having the same configuration as the first experimental example using a plasma processing apparatus similar to the plasma processing apparatus 1. However, the plasma processing apparatus used in the second experimental example differed from the plasma processing apparatus 1 in that the first switching circuit 61 and the second switching circuit 62 were each controlled by two pulse control signals from two independent signal generators. That is, in the second experimental example, a sequence of voltage pulses generated by controlling the first switching circuit 61 with a pulse control signal from one of the two signal generators was supplied to the first electrode BE1 during plasma etching. In addition, in the second experimental example, during plasma etching, a sequence of voltage pulses generated by controlling the second switching circuit 62 with another pulse control signal from the other of the two signal generators was supplied to the second electrode BE2.

[0089] In each of the first and second experimental examples, the depths of the holes formed in the central and edge regions of the sample substrate were determined. The ratio of the etching rate of the edge region to the etching rate of the central region was calculated from the depths of the holes formed in the central and edge regions of the sample substrate. The circularity of the upper openings of the holes formed in the central and edge regions of the sample substrate was also calculated. The circularity is the ratio of the width of the hole in the radial direction of the substrate to the width of the hole in the direction perpendicular to the radial direction.

[0090] In the first experimental example, the etching rate ratio was 0.97 and the circularity was 0.949. On the other hand, in the second experimental example, the etching rate ratio was 0.76 and the circularity was 0.492. From these first and second experimental examples, it was confirmed that the plasma processing apparatus 1 can improve the uniformity of plasma processing on a substrate in the radial direction.

[0091] Various exemplary embodiments included in the present disclosure are now described in [E1] to [E19] below.

[0092] a first switching circuit electrically connected between the first electrode and each of the at least one DC power supply and ground; a second switching circuit electrically connected between the second electrode and each of the at least one DC power supply and ground; and a single signal generator configured to generate a pulse control signal for controlling the first switching circuit to alternately connect the first electrode to the at least one DC power supply and ground, and for controlling the second switching circuit to alternately connect the second electrode to the at least one DC power supply and ground.

[0093] [E2] The plasma processing apparatus according to E1, wherein the first switching circuit includes: at least one first switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the at least one DC power supply; and at least one second switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the ground; and the second switching circuit includes: at least one third switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the at least one DC power supply; and at least one fourth switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the ground.

[0094] [E3] The plasma processing apparatus according to E2, wherein the bias power supply system includes, as the at least one first switching element, a plurality of first switching elements connected in series and / or parallel between the first electrode and the at least one DC power supply, and, as the at least one third switching element, a plurality of third switching elements connected in series and / or parallel between the second electrode and the at least one DC power supply.

[0095] [E4] The plasma processing apparatus described in E2 or E3, wherein the control terminal of the at least one first switching element and the control terminal of the at least one third switching element are connected to an output of the signal generator for the pulse control signal, and the control terminal of the at least one second switching element and the control terminal of the at least one fourth switching element are connected to an output of the signal generator for an inverted signal of the pulse control signal.

[0096] [E5] The plasma processing apparatus described in E4, wherein the signal generator is configured to generate the pulse control signal and the inversion signal such that each of the pulse control signal and the inversion signal alternately transitions between a first level and a second level, the at least one first switching element and the at least one third switching element are configured to be in a closed state when the pulse control signal has the first level and in an open state when the pulse control signal has the second level, and the at least one second switching element and the at least one fourth switching element are configured to be in a closed state when the inversion signal has the first level and in an open state when the inversion signal has the second level.

[0097] [E6] The plasma processing apparatus according to any one of E1 to E5, wherein the length of an electrical path electrically connecting the at least one DC power supply and the first electrode and the length of an electrical path electrically connecting the at least one DC power supply and the second electrode are approximately the same.

[0098] [E7] The plasma processing apparatus according to any one of E1 to E6, wherein the first switching circuit and the second switching circuit are provided in a single housing or on a single substrate.

[0099] [E8] The plasma processing apparatus according to any one of E1 to E6, wherein the substrate support portion includes a dielectric portion having the substrate support surface and the ring support surface, and the vertical distance between the first electrode and the substrate support surface and the vertical distance between the second electrode and the ring support surface are approximately the same.

[0100] [E9] The plasma processing apparatus according to any one of E1 to E8, wherein the edge region of the first electrode and the inner edge region of the second electrode are arranged to overlap each other in the vertical direction.

[0101] [E10] The plasma processing apparatus described in any one of E1 to E8, wherein the substrate support includes a third electrode arranged below the substrate support surface so as to surround the first electrode, the bias power supply system further includes a third switching circuit electrically connected between each of the at least one DC power supply and ground and the third electrode, and the single signal generator is configured to generate the pulse control signal to control the third switching circuit to alternately connect the third electrode to the at least one DC power supply and ground.

[0102] [E11] The plasma processing apparatus according to any one of E1 to E10, wherein the first switching circuit is electrically connected between a negative electrode of the at least one DC power supply and the first electrode, and the second switching circuit is electrically connected between the negative electrode of the at least one DC power supply and the second electrode.

[0103] [E12] The plasma processing apparatus according to any one of E1 to E12, wherein the bias power supply system includes a first DC power supply and a second DC power supply as the at least one DC power supply, the first switching circuit is electrically connected between the first DC power supply and the first electrode, and the second switching circuit is electrically connected between the second DC power supply and the second electrode.

[0104] [E13] A bias power supply system comprising: at least one DC power supply; a first switching circuit electrically connected between each of the at least one DC power supply and ground and a first electrode of a substrate support portion disposed below a substrate support surface of the substrate support portion in a chamber of a plasma processing apparatus; a second switching circuit electrically connected between each of the at least one DC power supply and ground and a second electrode disposed below a ring support surface of the substrate support portion surrounding the substrate support surface; and a single signal generator configured to generate pulse control signals for controlling the first switching circuit to alternately connect the first electrode to the at least one DC power supply and ground, and for controlling the second switching circuit to alternately connect the second electrode to the at least one DC power supply and ground.

[0105] [E14] The bias power supply system according to E13, wherein the first switching circuit includes: at least one first switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the at least one DC power source; and at least one second switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the ground; and the second switching circuit includes: at least one third switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the at least one DC power source; and at least one fourth switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the ground.

[0106] [E15] The bias power supply system according to E14, wherein the at least one first switching element includes a plurality of first switching elements connected in series and / or parallel between the first electrode and the at least one DC power source, and the at least one third switching element includes a plurality of third switching elements connected in series and / or parallel between the second electrode and the at least one DC power source.

[0107] [E16] The bias power supply system according to E14 or E15, wherein the control terminal of the at least one first switching element and the control terminal of the at least one third switching element are connected to an output of the signal generator for the pulse control signal, and the control terminal of the at least one second switching element and the control terminal of the at least one fourth switching element are connected to an output of the signal generator for an inverted signal of the pulse control signal.

[0108] [E17] The bias power supply system described in E16, wherein the signal generator is configured to generate the pulse control signal and the inverted signal such that each of the pulse control signal and the inverted signal alternately transitions between a first level and a second level, the at least one first switching element and the at least one third switching element are configured to be in a closed state when the pulse control signal has the first level and in an open state when the pulse control signal has the second level, and the at least one second switching element and the at least one fourth switching element are configured to be in a closed state when the inverted signal has the first level and in an open state when the inverted signal has the second level.

[0109] [E18] The bias power supply system according to any one of E13 to E17, wherein the first switching circuit and the second switching circuit are provided in a single housing or on a single board.

[0110] [E19] A method for manufacturing a plasma processing apparatus, comprising: (a) placing a substrate on a substrate support surface of a substrate support unit in a chamber of the plasma processing apparatus, the substrate support unit including the substrate support surface, a ring support surface surrounding the substrate support unit, a first electrode disposed below the substrate support surface, and a second electrode disposed below the ring support surface; (b) generating a plasma in the chamber; and (c) supplying a sequence of voltage pulses from a bias power supply system to the first electrode and the second electrode to attract ions from the plasma to the substrate on the substrate support surface and to an edge ring on the ring support surface, the bias power supply system comprising: at least one DC power supply; a first switching circuit electrically connected between each of the at least one DC power supply and ground and the first electrode; and a second switching circuit electrically connected between each of the at least one DC power supply and ground and the second electrode. a single signal generator configured to generate pulse control signals for controlling the first switching circuit to alternately connect the first electrode to the at least one DC power supply and ground, and for controlling the second switching circuit to alternately connect the second electrode to the at least one DC power supply and ground, wherein (c) includes providing the pulse control signals from the single signal generator to the first switching circuit and the second switching circuit to generate the sequence of voltage pulses in the bias power supply system.

[0111] From the foregoing, it will be understood that various embodiments of the present disclosure have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the appended claims.

[0112] 1...plasma processing apparatus, 10...chamber, 11...substrate support portion, 111a...substrate support surface, 111b...ring support surface, BE1...first electrode, BE2...second electrode, 12...plasma generation portion, 50...bias power supply system, 51, 52...DC power supply, 61...first switching circuit, 62...second switching circuit, 70...signal generator.

Claims

a first switching circuit electrically connected between the first electrode and each of the at least one DC power supply and ground; a second switching circuit electrically connected between the second electrode and each of the at least one DC power supply and ground; and a single signal generator configured to generate pulse control signals for controlling the first switching circuit to alternately connect the first electrode to the at least one DC power supply and ground, and for controlling the second switching circuit to alternately connect the second electrode to the at least one DC power supply and ground.

2. The plasma processing apparatus of claim 1, wherein the first switching circuit includes: at least one first switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the at least one DC power supply; and at least one second switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the ground; and the second switching circuit includes: at least one third switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the at least one DC power supply; and at least one fourth switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the ground.

3. The plasma processing apparatus according to claim 2, wherein the bias power supply system includes, as the at least one first switching element, a plurality of first switching elements connected in series and / or parallel between the first electrode and the at least one DC power supply, and, as the at least one third switching element, a plurality of third switching elements connected in series and / or parallel between the second electrode and the at least one DC power supply.

4. The plasma processing apparatus according to claim 2, wherein the control terminal of the at least one first switching element and the control terminal of the at least one third switching element are connected to an output of the signal generator for the pulse control signal, and the control terminal of the at least one second switching element and the control terminal of the at least one fourth switching element are connected to an output of the signal generator for an inverted signal of the pulse control signal.

5. The plasma processing apparatus of claim 4, wherein the signal generator is configured to generate the pulse control signal and the inversion signal such that each of the pulse control signal and the inversion signal alternately transitions between a first level and a second level; the at least one first switching element and the at least one third switching element are configured to be in a closed state when the pulse control signal has the first level and in an open state when the pulse control signal has the second level; and the at least one second switching element and the at least one fourth switching element are configured to be in a closed state when the inversion signal has the first level and in an open state when the inversion signal has the second level.

6. A plasma processing apparatus according to any one of claims 1 to 5, wherein the length of an electrical path electrically connecting the at least one DC power supply and the first electrode is approximately the same as the length of an electrical path electrically connecting the at least one DC power supply and the second electrode.

7. The plasma processing apparatus according to any one of claims 1 to 5, wherein the first switching circuit and the second switching circuit are provided in a single housing or on a single substrate.

8. The plasma processing apparatus according to any one of claims 1 to 5, wherein the substrate support section includes a dielectric section having the substrate support surface and the ring support surface, and the vertical distance between the first electrode and the substrate support surface and the vertical distance between the second electrode and the ring support surface are approximately the same.

9. The plasma processing apparatus according to any one of claims 1 to 5, wherein the edge region of the first electrode and the inner edge region of the second electrode are arranged to overlap each other in the vertical direction.

10. The plasma processing apparatus of any one of claims 1 to 5, wherein the substrate support includes a third electrode disposed below the substrate support surface so as to surround the first electrode, the bias power supply system further includes a third switching circuit electrically connected between each of the at least one DC power supply and ground and the third electrode, and the single signal generator is configured to generate the pulse control signal to control the third switching circuit to alternately connect the third electrode to the at least one DC power supply and ground.

11. A plasma processing apparatus according to any one of claims 1 to 5, wherein the first switching circuit is electrically connected between the negative electrode of the at least one DC power supply and the first electrode, and the second switching circuit is electrically connected between the negative electrode of the at least one DC power supply and the second electrode.

12. The plasma processing apparatus according to any one of claims 1 to 5, wherein the bias power supply system includes a first DC power supply and a second DC power supply as the at least one DC power supply, the first switching circuit is electrically connected between the first DC power supply and the first electrode, and the second switching circuit is electrically connected between the second DC power supply and the second electrode.

13. A bias power supply system comprising: at least one DC power supply; a first switching circuit electrically connected between each of the at least one DC power supply and ground and a first electrode of a substrate support disposed below a substrate support surface of the substrate support in a chamber of a plasma processing apparatus; a second switching circuit electrically connected between each of the at least one DC power supply and ground and a second electrode disposed below a ring support surface of the substrate support surrounding the substrate support surface; and a single signal generator configured to generate pulse control signals for controlling the first switching circuit to alternately connect the first electrode to the at least one DC power supply and ground, and for controlling the second switching circuit to alternately connect the second electrode to the at least one DC power supply and ground.

14. The bias power supply system of claim 13, wherein the first switching circuit includes: at least one first switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the at least one DC power supply; and at least one second switching element having a control terminal connected to the signal generator and electrically connected between the first electrode and the ground; and the second switching circuit includes: at least one third switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the at least one DC power supply; and at least one fourth switching element having a control terminal connected to the signal generator and electrically connected between the second electrode and the ground.

15. The bias power supply system according to claim 14, wherein the at least one first switching element comprises a plurality of first switching elements connected in series and / or parallel between the first electrode and the at least one DC power supply, and the at least one third switching element comprises a plurality of third switching elements connected in series and / or parallel between the second electrode and the at least one DC power supply.

16. The bias power supply system of claim 14, wherein the control terminal of the at least one first switching element and the control terminal of the at least one third switching element are connected to an output of the signal generator for the pulse control signal, and the control terminal of the at least one second switching element and the control terminal of the at least one fourth switching element are connected to an output of the signal generator for an inverted signal of the pulse control signal.

17. The bias power supply system of claim 16, wherein the signal generator is configured to generate the pulse control signal and the inverted signal such that each of the pulse control signal and the inverted signal alternates between a first level and a second level; the at least one first switching element and the at least one third switching element are configured to be in a closed state when the pulse control signal has the first level and in an open state when the pulse control signal has the second level; and the at least one second switching element and the at least one fourth switching element are configured to be in a closed state when the inverted signal has the first level and in an open state when the inverted signal has the second level.

18. A bias power supply system according to any one of claims 13 to 17, wherein the first switching circuit and the second switching circuit are provided in a single housing or on a single substrate.

19. A method for manufacturing a plasma processing system, comprising: (a) placing a substrate on a substrate support surface of a substrate support within a chamber of a plasma processing apparatus, the substrate support including the substrate support surface, a ring support surface surrounding the substrate support, a first electrode disposed below the substrate support surface, and a second electrode disposed below the ring support surface; (b) generating a plasma within the chamber; and (c) supplying a sequence of voltage pulses from a bias power supply system to the first electrode and the second electrode to attract ions from the plasma to the substrate on the substrate support surface and to an edge ring on the ring support surface, the bias power supply system comprising: at least one DC power supply; a first switching circuit electrically connected between each of the at least one DC power supply and ground and the first electrode; and a second switching circuit electrically connected between each of the at least one DC power supply and ground and the second electrode. a single signal generator configured to generate pulse control signals for controlling the first switching circuit to alternately connect the first electrode to the at least one DC power supply and ground, and for controlling the second switching circuit to alternately connect the second electrode to the at least one DC power supply and ground, wherein (c) includes providing the pulse control signals from the single signal generator to the first switching circuit and the second switching circuit to generate the sequence of voltage pulses in the bias power supply system.

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