Electronic device and control method thereof

Abstract

An electronic device according to the present invention includes: at least one processor configured to accelerate at least one operation of a neural network model; and a memory configured to store data and instructions related to the neural network model. The instructions, when executed by the at least one processor, cause the electronic device to: identify a range of input values corresponding to each of a plurality of layers related to a non-linear activation function of the neural network model; for each of the plurality of layers, divide the range of input values into a plurality of a preset first number of sections on the basis of the range of input values; for each of the plurality of layers, obtain a first look up table (LUT) including a plurality of integer input values corresponding to the plurality of sections and a plurality of integer output values corresponding to the plurality of integer input values by quantizing input data corresponding to the neural network model on the basis of the plurality of sections; and process an operation according to the non-linear activation function as an integer operation on the basis of the first LUT.

Description

Electronic device and method of controlling the same

[0001] The present disclosure relates to an electronic device and a method for controlling the electronic device, and more particularly, to an electronic device capable of accelerating the operation of a neural network model and a method for controlling the same.

[0002] Recently, research on neural network accelerators for efficiently processing neural network model operations has been attracting attention.

[0003] Operations performed across the layers of a neural network model can utilize linear and nonlinear activation functions. Therefore, a neural network accelerator may include a matrix operation accelerator (called a MAC Array, Multiply-Accumulate Array) to accelerate operations based on linear activation functions, and an activation unit to accelerate operations based on nonlinear activation functions.

[0004] Here, the operation according to the nonlinear activation function can be more complex than that according to the linear activation function, and therefore, the efficiency of the neural network accelerator can be significantly improved by processing the nonlinear activation function as an integer operation.

[0005] One approach might involve performing a polynomial approximation to the nonlinear activation function. However, this approach suffers from a significant loss of accuracy. Furthermore, to address this loss of accuracy, fine-tuning the neural network model through retraining or training the model from scratch using an approximation function is necessary, potentially requiring multiple iterations.

[0006] Another approach might involve processing nonlinear activation functions using a lookup table (LUT). However, using a single LUT to process multiple nonlinear activation functions or using a single LUT to compute input values ​​across the entire interval can result in limited accuracy.

[0007] An electronic device capable of accurately and efficiently processing operations on a nonlinear activation function of a neural network model and a control method thereof are provided.

[0008] Additional aspects are described in part in the description that follows, and in part will be made clear through the description or may be understood by practicing the embodiments provided.

[0009] According to one aspect of the present disclosure, an electronic device includes at least one processor for accelerating at least one operation of a neural network model and a memory for storing data and instructions related to the neural network model, wherein the instructions, when executed by the at least one processor, cause the electronic device to identify a range of input values ​​corresponding to each of a plurality of layers related to a nonlinear activation function of the neural network model, divide the range of input values ​​into a first preset number of sections for each of the plurality of layers based on the range of input values, and quantize input data corresponding to the neural network model based on the plurality of sections, thereby obtaining, for each of the plurality of layers, a first look up table (LUT) including a plurality of integer input values ​​corresponding to the plurality of sections and a plurality of integer output values ​​corresponding to the plurality of integer input values, and process an operation according to the nonlinear activation function as an integer operation based on the first LUT.

[0010] The plurality of layers include a first layer corresponding to a first range and divided into a plurality of first sections and a second layer corresponding to a second range and divided into a plurality of second sections, and the instructions, when executed by the at least one processor, can cause the electronic device to determine a size of the plurality of first sections to be larger than a size of the plurality of second sections if the first range is wider than the second range.

[0011] The instructions, when executed by the at least one processor, may cause the electronic device to, when at least one section in which an error of an output value is greater than or equal to a threshold value is determined, divide the at least one section into a second predetermined number of sub-sections, obtain a second LUT including a plurality of sub-integer input values ​​and a plurality of sub-integer output values ​​corresponding to the plurality of sub-sections, and process the operation as the integer operation based on the first LUT and the second LUT.

[0012] The instructions, when executed by the at least one processor, may cause the electronic device to identify a section corresponding to the first integer output value among the plurality of sections as the at least one section if an average error between the first integer output value and real number output values ​​corresponding to the first integer output value is greater than or equal to the threshold value.

[0013] The second preset number of the plurality of detailed sections may be smaller than the first preset number of the plurality of sections.

[0014] The above input data is quantized into 16 bits, the plurality of integer input values ​​and the plurality of integer output values ​​included in the first LUT are quantized into 8 bits, and the plurality of detailed integer input values ​​and the plurality of detailed integer output values ​​included in the second LUT can be quantized into 4 bits.

[0015] The instructions, when executed by the at least one processor, may cause the electronic device to, when a first input value is received, identify a first interval corresponding to the first input value and a second interval that is a next interval of the first interval using the first LUT, obtain an integer output value corresponding to a real number input value by linearly interpolating a first integer output value corresponding to the first interval and a second integer output value corresponding to the second interval among the plurality of integer output values, and obtain a real number output value corresponding to the real number input value by converting the integer output value to a real number based on a parameter used for the quantization.

[0016] The plurality of integer input values ​​and the plurality of integer output values ​​included in the first LUT are quantized based on a value corresponding to an upper 8 bits of the 16 bits, and the instructions, when executed by the at least one processor, can cause the electronic device to linearly interpolate the first integer output value and the second integer output value by using a value corresponding to a lower 8 bits of the 16 bits as a weight.

[0017] The above instructions, when executed by the at least one processor, cause the electronic device to divide the nonlinear activation function into a plurality of operations, if the nonlinear activation function is an activation function in which each input value is affected by a different input value, obtain the first LUT for performing at least one nonlinear operation among the plurality of operations, and process the at least one nonlinear operation as an integer operation based on the first LUT.

[0018] According to one aspect of the present disclosure, a method for controlling an electronic device includes the steps of identifying a range of input values ​​corresponding to each of a plurality of layers related to a nonlinear activation function of a neural network model, dividing the range of input values ​​into a first predetermined number of sections for each of the plurality of layers based on the range of input values, obtaining a first look up table (LUT) for each of the plurality of layers, which includes a plurality of integer input values ​​corresponding to the plurality of sections and a plurality of integer output values ​​corresponding to the plurality of integer input values ​​by quantizing input data corresponding to the neural network model based on the plurality of sections, and processing an operation according to the nonlinear activation function as an integer operation based on the first LUT.

[0019] The above plurality of layers may further include a first layer corresponding to a first range and divided into a plurality of first sections, and a second layer corresponding to a second range and divided into a plurality of second sections, and if the first range is wider than the second range, a step of determining the size of the plurality of first sections to be larger than the size of the plurality of second sections may be further included.

[0020] If at least one section in which the error of the output value is greater than or equal to a threshold value is determined, the method may include a step of dividing the at least one section into a second preset number of sub-sections, a step of obtaining a second LUT including a plurality of sub-integer input values ​​and a plurality of sub-integer output values ​​corresponding to the plurality of sub-sections, and a step of processing the operation as the integer operation based on the first LUT and the second LUT.

[0021] The step of dividing the at least one section into the plurality of subsections may include a step of identifying a section corresponding to the first integer output value among the plurality of sections as the at least one section if the average error between the first integer output value and the real number output values ​​corresponding to the first integer output value is greater than or equal to the threshold value.

[0022] The second preset number of the plurality of detailed sections may be smaller than the first preset number of the plurality of sections.

[0023] The above input data is quantized into 16 bits, the plurality of integer input values ​​and the plurality of integer output values ​​included in the first LUT are quantized into 8 bits, and the plurality of detailed integer input values ​​and the plurality of detailed integer output values ​​included in the second LUT can be quantized into 4 bits.

[0024] The above and other aspects, features and advantages of specific embodiments of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0025] FIG. 1 is a block diagram briefly illustrating a configuration of an electronic device according to one or more embodiments of the present disclosure;

[0026] FIG. 2 is a flowchart illustrating an embodiment related to generating a second look-up table (LUT) for multiple detailed sections;

[0027] FIG. 3 is a graph illustrating an embodiment related to obtaining a second LUT for multiple detailed sections;

[0028] FIG. 4 is a diagram illustrating one or more embodiments related to dividing a nonlinear activation function into multiple operations;

[0029] FIG. 5 is a block diagram detailing the configuration of an electronic device according to one or more embodiments of the present disclosure, and

[0030] FIG. 6 is a flowchart illustrating a method for controlling an electronic device according to one or more embodiments of the present disclosure.

[0031] The present embodiments may be modified and have various embodiments. Specific embodiments are illustrated in the drawings and described in detail in the detailed description. However, this is not intended to limit the scope to specific embodiments, but should be understood to encompass various modifications, equivalents, and / or alternatives of the embodiments of the present disclosure. In connection with the description of the drawings, similar reference numerals may be used for similar components.

[0032] In describing the present disclosure, if it is determined that a specific description of a related known function or configuration may unnecessarily obscure the gist of the present disclosure, a detailed description thereof will be omitted.

[0033] Additionally, the following embodiments may be modified in various other forms, and the scope of the technical concepts of the present disclosure is not limited to the following embodiments. Rather, these embodiments are provided to further faithfully and completely convey the technical concepts of the present disclosure to those skilled in the art.

[0034] The terminology used in this disclosure is for the purpose of describing specific embodiments only and is not intended to limit the scope of the rights. Singular expressions include plural expressions unless the context clearly dictates otherwise.

[0035] In this disclosure, expressions such as “has,” “can have,” “includes,” or “may include” indicate the presence of a corresponding feature (e.g., a component such as a number, function, operation, or part), and do not exclude the presence of additional features.

[0036] In this disclosure, expressions such as “A or B,” “at least one of A and / or B,” or “one or more of A or / and B” can include all possible combinations of the listed items. For example, “A or B,” “at least one of A and B,” or “at least one of A or B” can all refer to (1) including at least one A, (2) including at least one B, or (3) including both at least one A and at least one B.

[0037] The expressions “first,” “second,” “first,” or “second,” etc., used in this disclosure can describe various components, regardless of order and / or importance, and are only used to distinguish one component from another, but do not limit the components.

[0038] When it is said that a component (e.g., a first component) is “(operatively or communicatively) coupled with / to” or “connected to” another component (e.g., a second component), it should be understood that said component may be directly coupled to said other component, or may be coupled via another component (e.g., a third component).

[0039] On the other hand, when it is said that a component (e.g., a first component) is "directly connected" or "directly connected" to another component (e.g., a second component), it can be understood that no other component (e.g., a third component) exists between said component and said other component.

[0040] The expression "configured to" as used in the present disclosure may be used interchangeably with, for example, "suitable for," "having the capacity to," "designed to," "adapted to," "made to," or "capable of." The term "configured to" may not necessarily mean only "specifically designed to" in terms of hardware.

[0041] Instead, in some contexts, the phrase "a device configured to" may mean that the device, in conjunction with other devices or components, is "capable of" performing A, B, and C. For example, the phrase "a processor configured (or set) to perform A, B, and C" may refer to a dedicated processor (e.g., an embedded processor) for performing those operations, or a general-purpose processor (e.g., a CPU or application processor) that can perform those operations by executing one or more software programs stored in a memory device.

[0042] In the embodiments, a 'module' or 'part' performs at least one function or operation, and may be implemented as hardware or software, or as a combination of hardware and software. Furthermore, a plurality of 'modules' or a plurality of 'parts' may be integrated into at least one module and implemented as at least one processor, except for a 'module' or 'part' that needs to be implemented as a specific hardware.

[0043] Meanwhile, the various elements and areas in the drawings are schematically drawn. Therefore, the technical concept of the present invention is not limited by the relative sizes or spacing depicted in the attached drawings.

[0044] Hereinafter, with reference to the attached drawings, embodiments according to the present disclosure will be described in detail so that a person having ordinary knowledge in the technical field to which the present disclosure pertains can easily carry out the present disclosure.

[0045] FIG. 1 is a block diagram briefly illustrating the configuration of an electronic device (100) according to one or more embodiments of the present disclosure.

[0046] As illustrated in FIG. 1, an electronic device (100) according to the present disclosure may include a memory (110) and a processor (120).

[0047] At least one instruction regarding the electronic device (100) may be stored in the memory (110). In addition, an O / S (Operating System) for driving the electronic device (100) may be stored in the memory (110). In addition, various software programs or applications for operating the electronic device (100) according to various embodiments of the present disclosure may be stored in the memory (110). In addition, the memory (110) may include at least one of a semiconductor memory such as a flash memory or a magnetic storage medium such as a hard disk.

[0048] For example, various software modules for operating the electronic device (100) according to various embodiments of the present disclosure may be stored in the memory (110), and the processor (120) may control the operation of the electronic device (100) by executing the various software modules stored in the memory (110). That is, the memory (110) is accessed by the processor (120), and data reading / recording / modifying / deleting / updating, etc. may be performed by the processor (120).

[0049] In the present disclosure, the term memory (110) may be used to indicate at least one of the aforementioned memory (110), ROM, RAM within the processor (120), or a memory card (e.g., micro SD card, memory stick) mounted on the electronic device (100).

[0050] In one or more embodiments, the memory (110) may store data for a neural network model. For example, the memory (110) may store data for various parameters, including layers, activation functions, and weights of the neural network model. In addition, the memory (110) may store various data for performing acceleration of the neural network model. For example, the memory (110) may store data for a look-up table (LUT) according to the present disclosure and data for a quantization process (or calibration process) of data for the neural network model.

[0051] In addition, various information may be stored in the memory (110) within the scope of achieving the purpose of the present disclosure, and the information stored in the memory (110) may be updated as received from an external device or input by a user.

[0052] The processor (120) controls the overall operation of the electronic device (100). For example, the processor (120) may be connected to a configuration of the electronic device (100) including a memory (110), and may control the overall operation of the electronic device (100) by executing at least one instruction stored in the memory (110) as described above.

[0053] The processor (120) may be implemented in various ways. For example, the processor (120) may be implemented by or include at least one of an Application Specific Integrated Circuit (ASIC), an embedded processor, a microprocessor, hardware control logic, a hardware finite state machine (FSM), and a digital signal processor (DSP). In the present disclosure, the term "processor (120)" may be used to indicate at least one of a Central Processing Unit (CPU), a Graphic Processing Unit (GPU), and a Micro Processor Unit (MPU).

[0054] In one or more embodiments, the processor (120) can perform integer operations corresponding to a nonlinear activation function of a neural network model. Various embodiments implemented using the processor (120) will be described below.

[0055] The processor (120) can accelerate the computation of a neural network model. The processor (120) can process at least some of the computations performed by the neural network model as integer computations, thereby improving the computation speed of the neural network model and reducing power consumption. In other words, the processor (120) may be or include hardware designed to efficiently perform computations of the neural network model, and may be referred to by terms such as a neural network accelerator, a neural processing unit (NPU), an AI accelerator, etc.

[0056] Below, various embodiments implemented by the processor (120) to accelerate the operation of the neural network model are described.

[0057] The processor (120) can identify the range of input values ​​of each of the plurality of layers related to the nonlinear activation function of the neural network model.

[0058] According to embodiments, operations performed by a neural network model can be divided into linear operations and nonlinear operations. For example, a neural network model may perform linear operations, such as transforming input values ​​using a weight matrix, or may perform nonlinear operations using various types of nonlinear activation functions, as illustrated in the examples below.

[0059] An 'activation function' can be a function that determines whether the output values ​​of previous layers are activated in a neural network model and generates output values. For example, in the feedforward process, which obtains output values ​​by passing input values ​​from the input layer to the output layer, the activation function can play a role in determining whether the input values ​​passed from previous layers will be passed on to the next layer, and if so, what output values ​​they will be transformed into.

[0060] A "nonlinear activation function" is a function that can perform nonlinear operations while passing input values ​​from previous layers to the next layer. Using a nonlinear activation function adds nonlinearity to a neural network model, allowing for a more in-depth implementation of the model.

[0061] Examples of nonlinear activation functions may include various functions such as the sigmoid function, the ReLU (Rectified Linear Unit) function, the ELU (Exponential Linear Unit) function, the GELU (Gaussian Error Linear Unit) function, and the Swish function, but the nonlinear activation function according to the present disclosure is not limited to a specific type of activation function.

[0062] The processor (120) can obtain information about the structure of multiple layers included in the neural network model, operations performed by each of the multiple layers, types of activation functions associated with each of the multiple layers, etc. based on data about the neural network model. In particular, the processor (120) can identify at least one nonlinear activation function among various activation functions included in the neural network model.

[0063] When at least one nonlinear activation function is identified, the processor (120) can identify the range of input values ​​of each of the plurality of layers related to the nonlinear activation function. For example, the processor (120) can identify the range of input values ​​of each of the plurality of layers by having the neural network model input at least some of the input values ​​included in the training data or verification data of the neural network model, or by having the neural network model input at least some of the input values ​​included in sample data having a distribution similar to the training data or verification data.

[0064] Here, the 'range of input values' may represent the difference between the maximum and minimum values ​​of the input values ​​input to each of the plurality of layers. The range of input values ​​may be different for each of the plurality of layers. For example, the range of input values ​​of the first layer included in the neural network model may be a range from 1 to 25600, and the range of input values ​​of the second layer included in the neural network model may be a range from 1 to 256. Since the input value for a specific layer may be an output value of a previous layer, the range of input values ​​of each of the plurality of layers may include at least a part of the range of output values ​​of each of the plurality of layers. Therefore, the term 'range of input values' may be referred to as the term 'range of input / output values'.

[0065] The processor (120) can divide the entire section included in the range of input values ​​into a preset (or predetermined) number of sections for each of the plurality of layers based on the range of input values ​​identified for each of the plurality of layers.

[0066] Here, the "pre-set number" may indicate the number of sections into which the entire section included in the range of input values ​​is divided. In an embodiment, the entire section may mean, for example, the entire range of input values. The preset number may be determined based on the number of bits (e.g., 8 bits, 16 bits, etc.) set in the quantization process described below, and may be changed by the developer or user's settings.

[0067] Although the input values ​​identified for each of the multiple layers may have different ranges, the preset number of ranges for dividing the entire range of input values ​​may be the same. Accordingly, the entire range of input values ​​for each of the two different layers may be divided into multiple ranges having different sizes. For example, the processor (120) may identify (or determine) multiple ranges having different sizes for each of the multiple layers based on the ranges of the input values ​​identified for each of the multiple layers.

[0068] For example, if the range of input values ​​corresponding to a first layer among multiple layers is wider than the range of input values ​​of a second layer among multiple layers, the processor (120) may determine the size of the multiple sections corresponding to the first layer to be larger than the size of the multiple sections corresponding to the second layer.

[0069] For example, if the preset number for dividing the entire section is 256, and the range of the input values ​​of the first layer is a range of values ​​1 to 25600 and the range of the input values ​​of the second layer is a range of values ​​1 to 256, the processor (120) can divide the entire section included in the range of the input values ​​of the first layer into a plurality of 256 sections each having a size of 1, and divide the entire section included in the range of the input values ​​of the second layer into a plurality of 256 sections each having a size of 100.

[0070] The processor (120) quantizes input data of a neural network model based on a plurality of sections divided by a plurality of layers, thereby obtaining a first LUT including a plurality of integer input values ​​corresponding to each of the plurality of sections and a plurality of integer output values ​​corresponding to each of the plurality of integer input values, for each of the plurality of layers.

[0071] 'Quantization' may refer to a process of converting data expressed in units of relatively high precision into data of relatively low precision. For example, quantization according to the present disclosure may refer to a process of converting data expressed as a real number of a first bit range into data expressed as an integer of a second bit range smaller than the first bit range. For example, when quantization is performed on data, real number weighted data expressed in a 32-bit floating point (FP32) format may be converted into integer weighted data expressed in 8 bits.

[0072] In the present disclosure, the input value before quantization and the output value before quantization may be referred to as a 'real input value' and a 'real output value', respectively. In addition, the input value after quantization and the output value after quantization may be referred to as an 'integer input value' and an 'integer output value', respectively.

[0073] For example, the processor (120) can identify (or determine) 'scale' and 'zero point', which are parameters used for quantization, and perform quantization on an input value using the identified scale and the identified zero point.

[0074] A "scale" can represent a parameter that represents the conversion ratio between an actual floating-point value (e.g., a real number) and an integer value. For example, the scale can be calculated by dividing the difference between the maximum and minimum values ​​within the input value range by a predetermined number. For example, the scale can represent the size of each of the multiple intervals identified as described above.

[0075] The 'zero point' can represent a parameter to indicate an integer value when the input value is 0, when the range of input values ​​includes negative numbers. The zero point can be calculated by multiplying the minimum value included in the range of input values ​​by -1 (minus 1), dividing the result by the scale, and rounding the result.

[0076] Once the scale and zero point are calculated, the integer input value according to the quantization result can be calculated by dividing the real input value by the scale, rounding the result, and adding the zero point to the rounded value.

[0077] For example, when performing 8-bit quantization, if the range of the input value is -3.5 to 3.2, the difference can be divided by 255, which is 0.0263, and the scale can be calculated. Then, the zero point can be calculated as 133, which is the result of multiplying the minimum value of the input value by -1 (minus 1) and dividing the result by the scale and rounding the result. Then, if the real input value is 1.5, the result of dividing the real input value by the scale and rounding it, and adding the zero point to the rounded value, which is 190, can be calculated as the integer input value corresponding to the real input value of 1.5.

[0078] As described above, when a plurality of integer input values ​​corresponding to each of a plurality of sections are obtained, the processor (120) can obtain a plurality of output values ​​corresponding to each of the plurality of integer input values ​​by rounding the result of inputting the plurality of integer input values ​​to the nonlinear activation function.

[0079] In addition, the processor (120) may perform the quantization process described above for each of the plurality of layers and obtain an LUT based on the quantization result. For example, the processor (120) may obtain a first LUT including a plurality of integer input values ​​and a plurality of integer output values ​​corresponding to each of the plurality of integer input values ​​for each of the plurality of layers, and store the first LUT in the memory (110).

[0080] Here, 'LUT' may refer to a table that stores pre-calculated values ​​so that pre-calculated result values ​​can be quickly referenced for specific input values. In particular, the LUT according to the present disclosure may refer to a table that stores a plurality of integer input values ​​and a plurality of corresponding integer output values ​​by corresponding to each other. Any data set that includes a plurality of integer input values, a plurality of integer output values, and information on the correspondence between the plurality of integer input values ​​and the plurality of integer output values ​​may correspond to the LUT according to the present disclosure regardless of the term referring to the data set. For example, the term LUT may be replaced with terms such as dictionary or data set.

[0081] The term 'first LUT' may refer to an LUT that includes a plurality of integer input values ​​included in the entire range included in the input value range and a plurality of integer output values ​​corresponding to each of the plurality of integer input values. The term first LUT is used to distinguish it from a second LUT that includes information about only some sections (e.g., subsections) among the entire section included in the input value range. The meaning of the second LUT and an example of the acquisition process are described in detail with reference to FIGS. 2 and 3.

[0082] The processor (120) can process operations according to at least one nonlinear activation function as integer operations based on the first LUT. For example, when a plurality of first LUTs corresponding to each of a plurality of layers related to the nonlinear activation function are obtained, the processor (120) can store the plurality of first LUTs in the memory (110). Then, when an input value for the neural network model is input, the processor (120) can process at least some of the operations performed by the neural network model as integer operations using the plurality of first LUTs stored in the memory (110).

[0083] For example, when a first input value is input, the processor (120) can identify (or select) a first interval corresponding to the first input value and a second interval that is a next interval of the first interval (e.g., an interval following the first interval) based on the first LUT. When the first interval and the second interval are identified (or selected), the processor (120) can obtain an integer output value corresponding to the real number input value by performing linear interpolation on the first integer output value corresponding to the first interval and the second integer output value corresponding to the second interval among a plurality of integer output values.

[0084] For example, if the input first input value is a real number input value of 0.1, the processor (120) can determine that the section corresponding to the first input value of 0.1 is a first section among the plurality of sections. Then, the processor (120) can determine a first integer output value of 2 corresponding to the first section among the plurality of sections and a second integer output value of 3 corresponding to the second section which is a section next to the first section. Then, the processor can obtain an integer output value corresponding to the first input value by linearly interpolating the value 2 (e.g., the first integer output value) and the value 3 (e.g., the second integer output value).

[0085] Here, information on the lower bits, not the upper bits, used in the first LUT may be used as weights for linear interpolation between the first integer output value and the second integer output value. For example, a plurality of integer input values ​​and a plurality of integer output values ​​included in the first LUT may be quantized based on values ​​corresponding to the upper 8 bits of 16 bits. In this case, the processor (120) may linearly interpolate the first integer output value and the second integer output value using values ​​corresponding to the lower 8 bits of the 16 bits as weights.

[0086] When an integer output value is obtained, the processor (120) can obtain a real output value corresponding to the real input value by converting the integer output value into a real number based on the parameters used for quantization. However, if the input of the next layer is an integer value, the processor (120) may input the integer output value of the layer to the next layer without converting it into a real number.

[0087] In the above, an example of identifying a first interval corresponding to a first input value and a second interval that is a subsequent interval of the first interval based on the first LUT has been described, but the processor (120) may also select a first interval corresponding to the first input value and a third interval that is a previous interval of the first interval, and linearly interpolate a first integer output value corresponding to the first interval and a third integer output value corresponding to the third interval among a plurality of integer output values, thereby obtaining an integer output value corresponding to a real number input value.

[0088] The above describes an example of obtaining integer output values ​​using linear interpolation, but in addition to linear interpolation, various interpolation methods such as polynomial interpolation can be used.

[0089] According to the examples described above, the electronic device (100) can obtain a LUT having different precisions according to the input value range of each of the plurality of layers, and based on the LUT, accurately and efficiently process integer operations corresponding to the nonlinear activation function of the neural network model.

[0090] For example, the electronic device (100) can generate a LUT for processing a nonlinear activation function as an integer operation using parameters obtained in a quantization process (or calibration process) of data for a neural network model without a separate relearning or iteration process.

[0091] In addition, the electronic device (100) can generate a LUT suitable for the range of input values ​​for each of multiple layers rather than processing multiple nonlinear activation functions using a single LUT, so that a high-precision integer operation accelerator can be implemented even under constraints due to the size and resources of limited hardware.

[0092] For example, even if one LUT can accurately process the operation of a first layer whose input value range is from 1 to 25600, a loss of accuracy may be unavoidable when using that LUT to process a second layer whose input value range is from 1 to 256. However, according to the present disclosure, it is possible to provide a different LUT for each layer based on the range of input values ​​identified for each of the multiple layers.

[0093] The effects described above can be further maximized, especially when performing operations on neural network models (e.g., Transformer) that include activation functions that include a range in which the output value fluctuates significantly according to changes in the input value, for example, activation functions with high nonlinearity (e.g., 1 / x, rsqrt(x)).

[0094] FIG. 2 is a flowchart illustrating an embodiment related to generating a second LUT for multiple sub-sections. FIG. 3 is a graph illustrating an embodiment related to obtaining a second LUT for multiple sub-sections.

[0095] Referring to FIG. 2, the processor (120) can obtain a first LUT for each of a plurality of layers (S210). As described above, the processor (120) can identify (or determine) a range of input values ​​of each of a plurality of layers related to a nonlinear activation function of a neural network model, and based on the range of input values ​​identified for each of the plurality of layers, can divide the entire section included in the range of input values ​​into a plurality of sections for each of the plurality of layers, and can obtain a first LUT for each of the plurality of layers, including a plurality of integer input values ​​corresponding to each of the plurality of sections and a plurality of integer output values ​​corresponding to each of the plurality of integer input values.

[0096] When the first LUT is obtained, the processor (120) can identify (or determine) whether there is at least one section among the plurality of sections in which the error of the output value is greater than or equal to a threshold value. For example, if the average error between a first integer output value among the plurality of integer output values ​​and real-valued output values ​​corresponding to the first integer output value is greater than or equal to the threshold value, the processor (120) can identify (or select) the section corresponding to the first integer output value among the plurality of sections as at least one section. Hereinafter, the section in which the error of the output value is greater than or equal to the threshold value among the plurality of sections may be referred to as 'at least one section'.

[0097] Here, the 'mean error' may be one of various mean errors, such as the Mean Absolute Error (MAE), which represents the average of the absolute differences between integer output values ​​and real output values, the Mean Squared Error (MSE), which represents the average of the squared differences between integer output values ​​and real output values, and the Root Mean Squared Error (RMSE), which represents the square root of the mean squared error, or may be determined using the same.

[0098] For example, Fig. 3 illustrates a graph of a y=1 / x function, which is an example of a nonlinear activation function, where x represents a real input value and y represents a real output value. Among the multiple sections, a section included in a region where the variability of the real output value is large according to a change in the real input value, such as the region (310) of Fig. 3, may express a wide range of output values ​​with a relatively narrow range of input values, and thus the average error may be greater than a critical value.

[0099] On the other hand, among the multiple sections, a section that is included in a region where the variability of the real output value is small according to the change in the real input value, such as the region (320) of FIG. 3, expresses a narrow range of output values ​​with a relatively wide range of input values, and thus the average error can be small, less than the critical value.

[0100] Accordingly, in the example of FIG. 3, the processor (120) may identify (or select) a section included in the area (310) of FIG. 3 as at least one section, and may not identify (or select) a section included in the area (320) of FIG. 3 as at least one section.

[0101] If at least one section among multiple sections in which the error of the output value is greater than or equal to the threshold value is not identified (S220-N), the processor (120) may process an operation according to at least one nonlinear activation function as an integer operation based on the first LUT (S230). For example, if the nonlinear activation function does not include a section with high nonlinearity, the processor (120) may process an operation according to at least one nonlinear activation function as an integer operation based on the first LUT as described with reference to FIGS. 1 and 2, without performing an additional processing step as described below.

[0102] When at least one section among a plurality of sections is determined in which the error of the output value is greater than or equal to a threshold value (e.g., when at least one section described above is identified or selected) (S220-Y), the processor (120) can divide the at least one section into a plurality of sub-sections of a preset number (S240). Then, the processor (120) can obtain a second LUT including a plurality of detailed integer input values ​​and a plurality of detailed integer output values ​​corresponding to each of the plurality of detailed sections (S250).

[0103] For example, the processor (120) may divide the entire section included in the range of input values ​​into multiple sections, and then divide at least one section (e.g., at least one section identified as having an error of an output value greater than or equal to a threshold value) among the multiple sections into multiple sub-sections. For example, the processor (120) may divide each of at least one section in which the average error is greater than or equal to a threshold value, such as the section included in the area (310) of FIG. 3, into multiple sub-sections.

[0104] When a plurality of detailed sections are distinguished, the processor (120) can obtain a plurality of detailed integer input values ​​and a plurality of detailed integer output values ​​corresponding to each of the plurality of detailed intervals, and can obtain a second LUT including a plurality of detailed integer input values ​​and a plurality of detailed integer output values ​​for each of the plurality of detailed sections.

[0105] In one or more embodiments, the processor (120) may be configured such that the number of the plurality of sub-intervals is less than the number of the plurality of intervals. For example, if the input data is quantized to 16 bits, and the plurality of integer input values ​​and the plurality of integer output values ​​included in the first LUT are quantized to 8 bits, the plurality of sub-integer input values ​​and the plurality of sub-integer output values ​​included in the second LUT may be quantized to 4 bits.

[0106] For example, when generating a LUT by subdividing a specific section, a smaller number of quantization bits may be sufficient compared to generating a LUT for the entire section, so the number of subsections may be smaller than the number of sections. However, embodiments are not limited thereto.

[0107] The processor (120) may process an operation according to at least one nonlinear activation function as an integer operation based on the first LUT and the second LUT (S260). For example, the processor (120) may identify (or determine) whether an input value corresponds to at least one section. Then, the processor (120) may process an operation according to at least one nonlinear activation function as an integer operation using the second LUT for an input value corresponding to at least one section. However, the processor (120) may process an operation according to at least one nonlinear activation function as an integer operation using the first LUT for an input value that does not correspond to at least one section.

[0108] In the above example, an embodiment was described in which an operation according to at least one nonlinear activation function is processed as an integer operation using the first LUT and the second LUT when at least one section in which the error of the output value is greater than or equal to a threshold value among the entire section of the input value is identified (or selected). However, it would also be possible to obtain one LUT by replacing at least one section in which the error of the output value is greater than or equal to a threshold value in the first LUT with the second LUT, and to process the integer operation for the entire section with the one LUT.

[0109] According to the embodiments described above with reference to FIGS. 3 and 4, the electronic device (100) can obtain a first LUT having different precisions according to the input value range of each of the plurality of layers, and when the nonlinear activation function includes a section in which the nonlinearity is greater than a critical level, the electronic device (100) can process higher-precision integer operations by using a second LUT that is more detailed than the first LUT for the section in which the nonlinearity is greater.

[0110] For example, in the case of a neural network model (e.g., Transformer) that includes an activation function (e.g., 1 / x, rsqrt(x)) that includes a section with high nonlinearity, a problem may arise that high-accuracy integer operations may be performed with only the first LUT in some sections (e.g., the section included in the area (320) of FIG. 3), but it may be difficult to perform high-accuracy integer operations with only the first LUT in sections where the variability of the output value according to the change in the input value is high (e.g., the section included in the area (310) of FIG. 3). According to the above-described embodiments, this problem can be solved by using a detailed second LUT together with the first LUT.

[0111] FIG. 4 is a diagram illustrating one or more embodiments related to dividing a nonlinear activation function into multiple operations.

[0112] According to one or more embodiments, the processor (120) may divide the nonlinear activation function into a plurality of operations and apply a LUT to the nonlinear operations.

[0113] The processor (120) can identify or determine whether the nonlinear activation function is an activation function in which each input value is affected by other input values. For example, the processor (120) can determine an activation function defined to produce an output value by using each input value together with other input values, such as a softmax function or a layer normalization function among nonlinear activation functions of a neural network model.

[0114] For example, the graph in Fig. 4 represents the softmax function, which is a type of activation function. The softmax function can apply an exponential function to each element (input values) of a given input vector and normalize the result to transform it into a probability distribution. For example, for a given input vector z = [z1, z2, ..., zn], the softmax function can be defined as in equation (a) in Fig. 4. Here, ezi represents the exponential function value, and the softmax function can return a normalized probability value by dividing each input value by the sum of all exponential function values.

[0115] If the nonlinear activation function is an activation function in which each input value is affected by other input values, the processor (120) can divide the nonlinear activation function into multiple operations. For example, the processor (120) can divide the nonlinear activation function into multiple operations using polynomial approximation. Here, dividing the nonlinear activation function into multiple operations may mean dividing the operations included in the nonlinear activation function into simpler operations using polynomial approximation.

[0116] For example, the softmax function of Fig. 4 can be divided into multiple polynomials using Taylor series expansion. If the exponential function ezi of the softmax function is expanded into a Taylor series, it can be expressed as in equation (b) of Fig. 4. In addition, if the exponential function for each input value (zi) is approximated by an nth-order Taylor polynomial and then normalized, it can be expressed as in equation (c) of Fig. 4.

[0117] The processor (120) can obtain a first LUT for performing at least one nonlinear operation among a plurality of operations. Then, the processor (120) can process at least one nonlinear operation as an integer operation based on the first LUT.

[0118] For example, if a nonlinear activation function is divided into multiple operations, at least some of the multiple operations may be linear operations, and others may be nonlinear operations. The processor (120) may obtain a first LUT for each of at least one function to process at least one function performing a nonlinear operation among the multiple functions as an integer operation, and may process at least one nonlinear operation as an integer operation using the obtained first LUT.

[0119] For example, the result of the polynomial approximation according to equation (c) of FIG. 4 can be divided into a nonlinear operation including zi2 and a linear operation performing a sum operation. The processor (120) can obtain a first LUT for performing the nonlinear operation including zi2.

[0120] After processing the nonlinear operation into an integer operation using the first LUT, the processor (120) can perform a linear operation to finally obtain the output value of the softmax function corresponding to the input value.

[0121] According to the example described above with reference to FIG. 4, the electronic device (100) can perform accurate and efficient integer operations even for a neural network model (e.g., Transformer) that includes a complex activation function (e.g., softmax function) that has both linearity and nonlinearity.

[0122] FIG. 5 is a block diagram detailing the configuration of an electronic device (100) according to one or more embodiments of the present disclosure.

[0123] As illustrated in FIG. 5, an electronic device (100) according to one or more embodiments of the present disclosure may further include a communication unit (130), an input unit (140), and an output unit (150), in addition to a memory (110) and a processor (120). However, the configurations illustrated in FIGS. 1 and 5 are merely exemplary, and it is to be understood that new configurations may be added or some configurations may be omitted in addition to the configurations illustrated in FIGS. 1 and 5 when implementing the present disclosure.

[0124] The communication unit (130) includes a circuit and can perform communication with an external device. For example, the processor (120) can receive various data or information from an external device connected via the communication unit (130) and can also transmit various data or information to the external device.

[0125] The communication unit (130) may include at least one of a WiFi module, a Bluetooth module, a wireless communication module, an NFC module, and an Ultra-Wide Band (UWB) module. For example, the WiFi module and the Bluetooth module may each perform communication in the WiFi or Bluetooth manner. When using a WiFi module or a Bluetooth module, various connection information, such as an SSID, may be first transmitted and received, and then communication may be established using this, after which various pieces of information may be transmitted and received.

[0126] In addition, the wireless communication module can perform communication according to various communication standards such as IEEE, Zigbee, 3G (3rd Generation), 3GPP (3rd Generation Partnership Project), LTE (Long Term Evolution), 5G (5th Generation), etc. And, the NFC module can perform communication in the NFC (Near Field Communication) method using the 13.56MHz band among various RF-ID frequency bands such as 135kHz, 13.56MHz, 433MHz, 860~960MHz, 2.45GHz, etc. In addition, the UWB module can accurately measure ToA (Time of Arrival), which may be the time it takes for a pulse to reach a target, and AoA (Ange of Arrival), which is the pulse arrival angle at the transmitting device, through communication between UWB antennas, and accordingly, precise distance and location recognition can be possible within an error range of several tens of centimeters indoors.

[0127] In one or more embodiments, the processor (120) may control the communication unit (130) to transmit data for various parameters including layers, activation functions, and weights of a neural network model from an external device through the communication unit (130), various data for performing acceleration of the neural network model, data for a look up table (LUT) according to the present disclosure, data for a quantization process (or calibration process) of data for a neural network model, and the like to the external device.

[0128] The input unit (140) may include a circuit, and the processor (120) may receive a user command to control the operation of the electronic device (100) through the input unit (140). For example, the input unit (140) may be configured with components such as a microphone, a camera, and a remote control signal receiving unit. In addition, the input unit (140) may be implemented in a form included in a display as a touch screen. In particular, the microphone may receive a voice signal and convert the received voice signal into an electrical signal.

[0129] In one or more embodiments, the processor (120) may receive, through the input unit (140), a user input for obtaining a LUT, a user input for setting the number of sections, and a user input for providing information about the obtained LUT (e.g., providing information about the LUT through a display, providing information about the LUT to a user terminal of the user).

[0130] The output unit (150) includes a circuit, and the processor (120) can output various functions that the electronic device (100) can perform through the output unit (150). In addition, the output unit (150) can include at least one of a display, a speaker, and an indicator.

[0131] The display can output image data under the control of the processor (120). For example, the display can output an image previously stored in the memory (110) under the control of the processor (120). In particular, the display according to one or more embodiments of the present disclosure can also display a user interface stored in the memory (110). The display can be implemented as an LCD (Liquid Crystal Display Panel), an OLED (Organic Light Emitting Diodes), etc., and in some cases, the display can also be implemented as a flexible display, a transparent display, etc. However, the display according to the present disclosure is not limited to a specific type.

[0132] The speaker can output audio data under the control of the processor (120). The indicator can be turned on under the control of the processor (120). For example, the indicator can be turned on in various colors under the control of the processor (120). For example, the indicator can be implemented as a light emitting diode (LED), a liquid crystal display panel (LCD), a vacuum fluorescent display (VFD), etc., but is not limited thereto.

[0133] In one or more embodiments, the processor (120) may control a display to display information about the acquired LUT.

[0134] FIG. 6 is a flowchart illustrating a method for controlling an electronic device (100) according to one or more embodiments of the present disclosure.

[0135] Referring to FIG. 6, the electronic device (100) can identify (or determine) the range of input values ​​of each of a plurality of layers related to a nonlinear activation function of a neural network model (S610). Based on data about the neural network model, the electronic device (100) can identify at least one nonlinear activation function among various activation functions included in the neural network model. When at least one nonlinear activation function is identified (or determined), the electronic device (100) can identify the range of input values ​​of each of the plurality of layers related to the nonlinear activation function.

[0136] The electronic device (100) can identify (or determine) the range of input values ​​of each of a plurality of layers by having the neural network model input at least some of the input values ​​included in the learning data or verification data of the neural network model, or by having the neural network model input at least some of the input values ​​included in sample data having a distribution similar to the learning data or verification data.

[0137] Based on the range of input values, the entire range of input values ​​can be divided into a preset number of multiple ranges for each of the multiple layers (S620). The ranges of the input values ​​identified for each of the multiple layers may differ, but the preset number for dividing the entire range of input values ​​can be the same. Accordingly, the entire range of input values ​​for each of the two different layers can be divided into a plurality of ranges having different sizes.

[0138] The electronic device (100) can obtain a first look-up table (LUT) including a plurality of integer input values ​​corresponding to each of the plurality of intervals and a plurality of integer output values ​​corresponding to each of the plurality of integer input values, for each of the plurality of layers, by quantizing the input data of the neural network model based on a plurality of sections (S630). For example, the electronic device (100) can obtain a first LUT including a plurality of integer input values ​​and a plurality of integer output values ​​corresponding to each of the plurality of integer input values, for each of the plurality of layers, and store the first LUT in the memory (110).

[0139] The electronic device (100) can process operations according to at least one nonlinear activation function as integer operations based on the first LUT (S640). For example, when a plurality of first LUTs corresponding to each of a plurality of layers related to the nonlinear activation function are obtained, the electronic device (100) can store the plurality of first LUTs in the electronic device (100). Thereafter, when an input value for the neural network model is input, the electronic device (100) can process at least some of the operations performed by the neural network model as integer operations using the plurality of first LUTs stored in the electronic device (100).

[0140] The method for controlling an electronic device (100) according to the above-described embodiment may be implemented as a program and provided to the electronic device (100). In particular, the program including the method for controlling an electronic device (100) may be stored and provided in a non-transitory computer readable medium.

[0141] For example, in a non-transitory computer-readable recording medium including a program for executing a method for controlling an electronic device (100), the method for controlling an electronic device (100) may include a step of identifying (or determining) a range of input values ​​of each of a plurality of layers related to a nonlinear activation function of a neural network model, a step of dividing the entire range included in the range of input values ​​for each of the plurality of layers into a preset number of sections, a step of quantizing input data of the neural network model based on the plurality of sections, thereby obtaining a first LUT (look up table) for each of the plurality of layers, the first LUT including a plurality of integer input values ​​corresponding to each of the plurality of sections and a plurality of integer output values ​​corresponding to each of the plurality of integer input values, and a step of processing an operation according to at least one nonlinear activation function as an integer operation based on the first LUT.

[0142] In the above, examples of a control method for an electronic device (100) and a computer-readable recording medium including a program for executing the control method for an electronic device (100) have been briefly described, but this is only to omit redundant descriptions, and it goes without saying that various embodiments of the electronic device (100) can also be applied to a control method for an electronic device (100) and a computer-readable recording medium including a program for executing the control method for an electronic device (100).

[0143] The function related to artificial intelligence according to the present disclosure can be operated (or performed) through the processor (120) and memory (110) of the electronic device (100).

[0144] The processor (120) may be composed of one or more processors (120). At this time, the one or more processors (120) may include at least one of a CPU (Central Processing Unit), a GPU (Graphic Processing Unit), and an NPU (Neural Processing Unit), but is not limited to the examples of the processors (120) described above.

[0145] The CPU is a general-purpose processor (120) capable of performing not only general calculations but also artificial intelligence calculations. Its multi-layer cache structure allows for the efficient execution of complex programs. The CPU is advantageous in a serial processing method, enabling organic linking of previous and subsequent calculation results through sequential calculations. The general-purpose processor (120) is not limited to the examples described above, except in cases where it is specifically referred to as a CPU.

[0146] A GPU is a processor (120) for large-scale operations such as floating point operations used in graphic processing, and can perform large-scale operations in parallel by integrating a large number of cores. In particular, a GPU may be advantageous compared to a CPU in parallel processing methods such as convolution operations. In addition, a GPU may be used as a co-processor (120) to supplement the functions of a CPU. The processor (120) for large-scale operations is not limited to the examples described above, except in cases where it is specified as a GPU as described above.

[0147] An NPU is a processor (120) specialized in artificial intelligence operations using an artificial neural network, and each layer constituting the artificial neural network can be implemented with hardware (e.g., silicon). At this time, since the NPU is designed specifically according to the required specifications of the company, it has a lower degree of freedom compared to a CPU or GPU, but it can efficiently process the artificial intelligence operations requested by the company. Meanwhile, as a processor (120) specialized in artificial intelligence operations, the NPU can be implemented in various forms such as a Tensor Processing Unit (TPU), an Intelligence Processing Unit (IPU), a Vision Processing Unit (VPU), etc. The artificial intelligence processor (120) is not limited to the above-described examples, except in cases where it is specified as the above-described NPU.

[0148] Additionally, one or more processors (120) may be implemented as a SoC (System on Chip). In this case, the SoC may further include, in addition to one or more processors (120), a memory (110), and a network interface such as a bus for data communication between the processor (120) and the memory (110).

[0149] When a plurality of processors (120) are included in a SoC (System on Chip) included in an electronic device (100), the electronic device (100) may perform operations related to artificial intelligence (e.g., operations related to learning or inference of an artificial intelligence model) by using some of the processors (120) among the plurality of processors (120). For example, the electronic device (100) may perform operations related to artificial intelligence by using at least one of a GPU, an NPU, a VPU, a TPU, and a hardware accelerator specialized in artificial intelligence operations such as convolution operations and matrix multiplication operations among the plurality of processors (120). However, this is merely an example, and it is of course possible to process operations related to artificial intelligence by using a CPU or a general-purpose processor (120).

[0150] In addition, the electronic device (100) can perform operations related to functions related to artificial intelligence by utilizing multiple cores (e.g., dual cores, quad cores, etc.) included in one processor (120). In particular, the electronic device (100) can perform artificial intelligence operations such as convolution operations, matrix multiplication operations, etc. in parallel by utilizing multiple cores included in the processor (120).

[0151] One or more processors (120) are controlled to process input data according to predefined operation rules or artificial intelligence models stored in the memory (110). The predefined operation rules or artificial intelligence models are characterized by being created through learning.

[0152] Here, "created through learning" means that a predefined set of behavioral rules or an AI model with desired characteristics is created by applying a learning algorithm to a large number of learning data. This learning may be performed on the device itself, where the AI ​​according to the present disclosure is implemented, or through a separate server / system.

[0153] An artificial intelligence model may be composed of multiple neural network layers. At least one layer has at least one weight value and performs its operation through the operation result of the previous layer and at least one defined operation. Examples of neural networks include a convolutional neural network (CNN), a deep neural network (DNN), a recurrent neural network (RNN), a restricted boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), deep Q-networks, and a transformer. The neural networks in the present disclosure are not limited to the above-described examples unless otherwise specified.

[0154] A learning algorithm is a method for training a target device (e.g., a robot) using a large amount of learning data, enabling the target device to make decisions or predictions on its own. Examples of learning algorithms include supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning. Unless otherwise specified, the learning algorithms in this disclosure are not limited to the aforementioned examples.

[0155] A device-readable storage medium may be provided in the form of a non-transitory storage medium. Here, the term "non-transitory storage medium" simply means a tangible device that does not contain signals (e.g., electromagnetic waves). This term does not distinguish between cases where data is permanently stored in the storage medium and cases where data is temporarily stored. For example, a "non-transitory storage medium" may include a buffer in which data is temporarily stored.

[0156] According to one or more embodiments, the methods according to the various embodiments disclosed in the present document may be provided as included in a computer program product. The computer program product may be traded as a commodity between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product (e.g., a downloadable app) may be temporarily stored or temporarily generated in a machine-readable storage medium, such as a memory (110) of a manufacturer's server, an application store's server, or a relay server.

[0157] Each of the components (e.g., modules or programs) according to the various embodiments of the present disclosure as described above may be composed of a single or multiple entities, and some of the sub-components described above may be omitted, or other sub-components may be further included in the various embodiments. Alternatively or additionally, some components (e.g., modules or programs) may be integrated into a single entity, which may perform the same or similar functions as those performed by each of the respective components prior to integration.

[0158] According to various embodiments, operations performed by a module, program or other component may be executed sequentially, in parallel, iteratively or heuristically, or at least some operations may be executed in a different order, omitted, or other operations may be added.

[0159] Meanwhile, the terms "part" or "module" used in the present disclosure include units composed of hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A "part" or "module" may be an integrally composed component, a minimum unit performing one or more functions, or a portion thereof. For example, a module may be composed of an application-specific integrated circuit (ASIC).

[0160] Various embodiments of the present disclosure may be implemented as software including instructions stored in a machine-readable storage medium that can be read by a machine (e.g., a computer). The device may include an electronic device (e.g., an electronic device (100)) according to the disclosed embodiments, which is a device capable of calling instructions stored in the storage medium and operating according to the called instructions.

[0161] When the above instruction is executed by the processor, the processor may perform the function corresponding to the instruction directly or by using other components under the control of the processor. The instruction may include code generated or executed by a compiler or interpreter.

[0162] Although the preferred embodiments of the present disclosure have been illustrated and described above, the present disclosure is not limited to the specific embodiments described above, and various modifications may be made by a person having ordinary skill in the art to which the present disclosure pertains without departing from the gist of the present disclosure as claimed in the claims, and such modifications should not be understood individually from the technical idea or prospect of the present disclosure.

Claims

1. In electronic devices, At least one processor accelerating at least one operation of a neural network model; and A memory for storing data and instructions related to the neural network model; The above instructions, when executed by the at least one processor, cause the electronic device to: Identify the range of input values ​​corresponding to each of the multiple layers related to the nonlinear activation function of the above neural network model, Based on the range of the input values, the range of the input values ​​is divided into a first number of preset sections for each of the plurality of layers, By quantizing input data corresponding to the neural network model based on the plurality of sections, a first LUT (look up table) including a plurality of integer input values ​​corresponding to the plurality of sections and a plurality of integer output values ​​corresponding to the plurality of integer input values ​​is obtained for each of the plurality of layers. An electronic device that processes an operation according to the nonlinear activation function as an integer operation based on the first LUT.

2. In paragraph 1, The above plurality of layers includes a first layer corresponding to a first range and divided into a plurality of first sections, and a second layer corresponding to a second range and divided into a plurality of second sections, An electronic device wherein the instructions, when executed by the at least one processor, cause the electronic device to determine the size of the plurality of first intervals to be larger than the size of the plurality of second intervals if the first range is wider than the second range.

3. In paragraph 1, The above instructions, when executed by the at least one processor, cause the electronic device to, when at least one section in which an error of an output value is greater than or equal to a threshold value is determined, divide the at least one section into a plurality of sub-sections of a second preset number, Obtain a second LUT including a plurality of detailed integer input values ​​and a plurality of detailed integer output values ​​corresponding to the plurality of detailed sections, An electronic device that processes the operation as an integer operation based on the first LUT and the second LUT.

4. In paragraph 3, An electronic device wherein the instructions, when executed by the at least one processor, cause the electronic device to identify a section corresponding to the first integer output value among the plurality of sections as the at least one section if an average error between the first integer output value and real number output values ​​corresponding to the first integer output value is greater than or equal to the threshold value.

5. In paragraph 3, An electronic device wherein the second preset number of the plurality of detailed sections is smaller than the first preset number of the plurality of sections.

6. In paragraph 5, The above input data is quantized to 16 bits, The plurality of integer input values ​​and the plurality of integer output values ​​included in the first LUT are quantized into 8 bits, An electronic device in which the plurality of detailed integer input values ​​and the plurality of detailed integer output values ​​included in the second LUT are quantized into 4 bits.

7. In paragraph 6, The instructions, when executed by the at least one processor, cause the electronic device to, when a first input value is received, identify a first interval corresponding to the first input value and a second interval that is a next interval of the first interval using the first LUT, By linearly interpolating a first integer output value corresponding to the first section and a second integer output value corresponding to the second section among the plurality of integer output values, an integer output value corresponding to a real number input value is obtained, An electronic device that obtains a real output value corresponding to the real input value by converting the integer output value to a real number based on the parameter used for the quantization.

8. In paragraph 7, The plurality of integer input values ​​and the plurality of integer output values ​​included in the first LUT are quantized based on a value corresponding to the upper 8 bits of the 16 bits, An electronic device in which the instructions, when executed by the at least one processor, cause the electronic device to linearly interpolate the first integer output value and the second integer output value using a value corresponding to the lower 8 bits of the 16 bits as a weight.

9. In paragraph 1, The above instructions, when executed by the at least one processor, cause the electronic device to divide the nonlinear activation function into a plurality of operations, if the nonlinear activation function is an activation function in which each input value is affected by another input value, Obtaining the first LUT for performing at least one nonlinear operation among the above multiple operations, An electronic device that processes at least one nonlinear operation as an integer operation based on the first LUT.

10. In a method for controlling an electronic device, A step of identifying a range of input values ​​corresponding to each of a plurality of layers related to a nonlinear activation function of a neural network model; A step of dividing the range of the input values ​​into a first number of preset sections for each of the plurality of layers based on the range of the input values; A step of obtaining a first LUT (look up table) for each of the plurality of layers, which includes a plurality of integer input values ​​corresponding to the plurality of intervals and a plurality of integer output values ​​corresponding to the plurality of integer input values, by quantizing input data corresponding to the neural network model based on the plurality of intervals; and A method comprising: a step of processing an operation according to the nonlinear activation function as an integer operation based on the first LUT; 11. In paragraph 10, The above plurality of layers includes a first layer corresponding to a first range and divided into a plurality of first sections, and a second layer corresponding to a second range and divided into a plurality of second sections, A method further comprising: if the first range is wider than the second range, determining the size of the plurality of first sections to be larger than the size of the plurality of second sections; 12. In paragraph 10, A step of dividing the at least one section into a second preset number of sub-sections when at least one section in which the error of the output value is greater than or equal to a threshold value is determined; A step of obtaining a second LUT including a plurality of detailed integer input values ​​and a plurality of detailed integer output values ​​corresponding to the plurality of detailed sections; and A method comprising: a step of processing the operation as an integer operation based on the first LUT and the second LUT; 13. In paragraph 12, The step of dividing the at least one section into the plurality of sub-sections is: A method comprising: a step of identifying a section corresponding to the first integer output value among the plurality of sections as at least one section, if the average error between the first integer output value and the real number output values ​​corresponding to the first integer output value is greater than or equal to the threshold value; 14. In paragraph 12, A method wherein the second preset number of the plurality of detailed sections is smaller than the first preset number of the plurality of sections.

15. In paragraph 14, The above input data is quantized to 16 bits, The plurality of integer input values ​​and the plurality of integer output values ​​included in the first LUT are quantized into 8 bits, A method in which the plurality of detailed integer input values ​​and the plurality of detailed integer output values ​​included in the second LUT are quantized into 4 bits.

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