Defect classification device and defect classification method

Abstract

The present invention makes it possible to realize appropriate defect classification. To this end, a defect classification device (100) comprises: a defect region image creation unit (120) that generates a defect region image on the basis of the difference between a first reference image and a training image including one or a plurality of circuit pattern regions and a defect region; a defect type determination unit (130) that determines the positional relationship between the circuit pattern region(s) and the defect region; and an image synthesis unit (143) that generates a synthesized image by synthesizing the defect region image and a second reference image on the basis of said positional relationship.

Description

Defect classification device and defect classification method

[0001] The present invention relates to a defect classification device and a defect classification method.

[0002] As background art in this technical field, the abstract of Patent Document 1 below states that "the judgment system (100) includes a judgment device (1) that judges whether an object is good or bad using a judgment model (15), a data collection device (3) that acquires images when the judgment device (1) erroneously judges the object to be good, an image generation device (4) that generates multiple learning images based on defective parts shown in the images, and a learning device (5) that re-learns the judgment model (15) using the multiple learning images as training data."

[0003] Furthermore, the abstract of Patent Document 2 below states, "There is provided a training data generation device capable of generating training data suitable for training a discrimination model. The training data generation device has a function of extracting a part of first image data as second image data, a function of generating a two-dimensional figure representing a pseudo defect corresponding to the area of ​​the second image data, a function of synthesizing the second image data and the two-dimensional figure to generate third image data, and a function of assigning a label corresponding to the two-dimensional figure to the third image data. By using the third image data for training a discrimination model, it is possible to generate a highly accurate discrimination model."

[0004] JP 2022-142555 A International Publication No. 2021 / 152416

[0005] However, there is a demand for more appropriate defect classification in the above-mentioned technology. The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a defect classification device and a defect classification method that can achieve appropriate defect classification.

[0006] In order to solve the above problem, the defect classification device of the present invention includes: a defect area image creation unit that generates a defect area image including a defect area within a defect area image that corresponds to the defect area based on a difference between a learning image obtained by photographing an inspection area that includes one or more circuit pattern areas and a defect area, and a first reference image that includes a circuit pattern area within the first reference image; a defect type determination unit that determines a positional relationship between the circuit pattern area and the defect area based on the defect area image and a circuit pattern recognition image that includes a circuit pattern area within a circuit pattern recognition image that corresponds to the circuit pattern area within the first reference image; and an image synthesis unit that generates a synthesized image by synthesizing the defect area image with a second reference image based on the positional relationship, wherein the first reference image is an image obtained by photographing a first semiconductor wafer, and the second reference image is an image obtained by photographing a second semiconductor wafer different from the first semiconductor wafer.

[0007] According to the present invention, appropriate defect classification can be achieved.

[0008] 1 is a diagram showing specific examples of various images applied to each embodiment; FIG. 2 is a diagram showing an example of the configuration of an image management table; FIG. 3 is an explanatory diagram of the positional relationship between a circuit pattern area and a defect area, etc.; FIG. 4 is an explanatory diagram of defect type positional relationship definition information; FIG. 5 is a diagram showing an example of the configuration of a defect type positional relationship determination result table; FIG. 6 is a diagram showing an example of the configuration of image synthesis setting information; FIG. 7 is a diagram showing an example of a learning image selection screen; FIG. 8 is a diagram showing an example of a defect type positional relationship confirmation screen; FIG. 9 is a diagram showing an example of a synthesized image confirmation screen; FIG. 10 is a block diagram showing an example of the configuration of a defect classification device according to the first embodiment; FIG. 11 is a block diagram showing an example of the hardware configuration of a defect classification server;

[0009] [Overview of the Embodiments] Ensuring a high product yield is important in the manufacturing process of semiconductor products. Therefore, there is a demand for early detection of product yield declines in the manufacturing process and yield management using yield fluctuation analysis technology. Yield management allows for early detection of various defects on semiconductor wafers that occur during the manufacturing process and for countermeasures to be taken. This typically involves three steps: (1) inspecting semiconductor wafers using a wafer inspection device or the like to detect the locations of defects and foreign particles that have occurred; (2) taking images of defects at the detected locations and classifying the defect types based on the appearance of the defects; and (3) taking countermeasures based on the defect classification results.

[0010] In the above-mentioned (2), a scanning electron microscope (SEM) or the like is used to photograph defects at high magnification. However, when the number of defects contained in the inspection object is very large, photographing images of the defects and classifying them by type in (2) requires a lot of effort, so an automatic defect review (ADR) function that automatically photographs and collects images of defective locations and an automatic defect classification (ADC) function that automatically classifies defects shown in the collected images may be used.

[0011] With the recent development of machine learning technologies such as deep learning, the application of machine learning technologies to ADR and ADC has been progressing. Regarding ADC, which is the subject of the embodiments described below, machine learning is used to automatically classify the types of defects appearing in collected images.

[0012] To automatically classify the types of defects seen in images using machine learning, a machine learning program and a trained model are required. Machine learning programs and trained models are generally developed by data scientists (operators). The developed machine learning program and trained model are implemented as software, and when a user uses the equipment, the machine learning program is executed, and the trained model is used to automatically classify the types of defects.

[0013] A machine learning program that automatically classifies defect types reads an input image, processes the image using a machine learning algorithm, and outputs the defect type (hereafter, this series of processes will be referred to as the classification process). When processing using a machine learning algorithm, a trained model is used. Machine learning algorithms are broadly divided into supervised and unsupervised, but when using a supervised algorithm, a trained model must be prepared in advance before the classification process can begin.

[0014] Examples of methods for preparing a trained model include reusing an existing trained model that was developed separately, retraining an existing trained model, and developing a new trained model. When retraining an existing trained model or developing a new trained model, training images and training data for those training images are required. To develop a trained model for automatically classifying defect types, training images containing defects and the types of those defects must be provided as training data. Training data is generally prepared by data scientists visually checking the types of defects shown in images and creating training data for each image (hereinafter, the set of training images and training data will be referred to as the training dataset).

[0015] When the accuracy of automatic defect type classification deteriorates, it is preferable to retrain the model using a training dataset. Although collecting a training dataset is a labor-intensive task, once a training dataset is prepared, the accuracy of the classification process can be improved. To improve accuracy, it is possible to apply handcrafted technologies such as conventional image processing algorithms. In this case, it is necessary to analyze the cause of the deterioration in accuracy and then redesign the algorithm. On the other hand, with machine learning, accuracy can be improved if a training dataset is prepared, so this is considered to have an advantage in terms of immediate response to problems when accuracy deteriorates.

[0016] However, in actual semiconductor product manufacturing processes, it may be difficult to prepare a sufficient training dataset required for model training. For example, in a high-mix, low-volume production line, it is not possible to capture many images required for machine learning. For this reason, a method is required for model training that does not rely solely on captured images. One possible approach is to process already captured images to increase the number of images and use the increased number as training images. Therefore, this embodiment aims to increase the number of images that can be used as training images from among the images collected in the semiconductor product manufacturing process.

[0017] By applying the technology of Patent Document 1, it is believed possible to acquire an image of a product that has been erroneously determined to be a good product, and generate a defective product partial image from the defective parts shown in that image. It is also believed possible to generate a mask image in addition to generating the defective product partial image, and then generate a synthesis image by performing a transformation process on the defective product partial image and the mask image. The generated synthesis image is then combined with a good product image to obtain a learning image. Various transformation processes, such as rotation transformation, shape transformation, and color transformation, are believed to be applicable.

[0018] However, images collected during the manufacturing process of semiconductor products are images that capture various defects on semiconductor wafers that occur during the manufacturing process. When an image of a semiconductor wafer is captured, the image captures the appearance of various defects and the circuit pattern drawn on the semiconductor wafer. Defects that occur during the manufacturing process of semiconductor products include defects that occur on circuit patterns and defects that occur between circuit patterns. From the perspective of product yield management in the manufacturing process, in addition to classifying defects by the type of defect appearance, it is also preferable to consider where the defect occurs on the circuit pattern. In other words, even if the type of defect appearance is the same, it is preferable to distinguish and classify defects based on their location on the circuit pattern.

[0019] When using machine learning, the above points are taken into consideration when classifying defects, so learning images are prepared for each type of defect appearance and the relative position of the defect on the circuit pattern. For example, when considering a "foreign particle" as a type of defect, it is preferable for the machine learning process to classify the defect by distinguishing whether the foreign particle occurs on the circuit pattern or between circuit patterns.

[0020] Therefore, it is preferable to prepare the learning images required for learning by taking into consideration where in the circuit pattern the defect occurs. In the technology to which Patent Document 1 is applied, a learning image is obtained by combining an image of a defective part with an image of a good part, but because this technology is not intended for images that show circuit patterns, it is not possible to generate learning images that take into consideration the relationship between the circuit pattern and the position at which the defect occurs.

[0021] Furthermore, by applying the technology of Patent Document 2, it is possible to generate a two-dimensional figure representing a pseudo-failure from an image showing a circuit pattern and paste it onto an image that does not show any defective areas. In other words, it is possible to generate a two-dimensional figure by specifying the shape and color, and to synthesize the two-dimensional figure onto an image that shows only normal areas.

[0022] This makes it possible to generate multiple training images that depict two-dimensional figures representing pseudo-failures and circuit patterns. However, even with the technology applying Patent Document 2, the positional relationship between the circuit pattern and the occurrence of defects is not taken into consideration, and therefore it is not possible to generate training images for each type of defect appearance and each positional relationship between the defects on the circuit pattern. If training images could be generated for each type of defect appearance and each positional relationship between the defects on the circuit pattern, it would be possible to efficiently generate training images necessary for retraining the model when the accuracy of automatic defect classification deteriorates, leading to faster and more immediate response to defects when classification accuracy deteriorates.

[0023] Therefore, in the embodiment described below, when the accuracy of automatic classification of defect types deteriorates, training images are automatically generated for each type of defect appearance and the positional relationship of the defect on the circuit pattern from images collected during the semiconductor product manufacturing process, thereby supporting the work of data scientists who create training datasets necessary for model training. According to the embodiment described below, data scientists can reduce the workload of creating training datasets and shorten the response time when accuracy deteriorates, enabling rapid response to deterioration in machine learning accuracy even in situations where it is not possible to capture many images required for machine learning, such as on a high-mix, low-volume production line.

[0024] A defect classification device according to an embodiment described below, for example, supports the automatic generation of a training data set. An example of automatically generating training images from images collected during the manufacturing process of semiconductor products will now be described in detail. Images collected during the manufacturing process of semiconductor products include, for example, images showing various defects on semiconductor wafers that occur during the manufacturing process. When the surface of a semiconductor wafer is photographed, the appearance of the various defects and the circuit pattern drawn on the semiconductor wafer are captured in the image.

[0025] When using machine learning to automatically classify the types of defects seen in such images, the image and a trained model are input into a machine learning program, the type of defect seen in the image is classified using the machine learning algorithm and the trained model, and the classification results are output as text, etc. Specifically, if a foreign object is seen in an image, and the text "foreign object" is output as the output of the result of inputting the image, this means that the machine learning algorithm and trained model have made the correct classification.

[0026] The accuracy of machine learning models can deteriorate depending on the image, and in such cases, the model must be retrained. When retraining, new images are collected, etc., to create training images and training data. However, in actual semiconductor product manufacturing processes, it may be difficult to prepare a sufficient training data set required for model training. Therefore, in the embodiment described below, the training images required for model retraining are automatically generated by performing the processing described below on already captured images to increase the number of images.

[0027] In the following description, an image containing a defect, which is an image of a die on a semiconductor wafer that has a defect, is referred to as a learning image. Also, an image of a defect-free die (reference die) that is an image of a die that does not contain a defect, is referred to as a "first reference image." Also, an image showing a circuit pattern area, which is an image of a circuit pattern area extracted from a reference image using a general image area segmentation method or the like, or an image of design information of a circuit pattern created in the design process of a semiconductor product, is referred to as a "circuit pattern recognition image." Also, a predetermined type to be classified as a defect is referred to as a "defect type."

[0028] [Specific Examples of Images] FIG. 1 shows specific examples of various images that are applicable to each embodiment described below. Generally, a semiconductor wafer (not shown) is formed in a disk shape, and a plurality of rectangular dies are arranged on the surface of the semiconductor wafer along the X direction (horizontal direction) and the Y direction (vertical direction). The dies formed on a single semiconductor wafer generally have the same circuit configuration. Training image 20-A in FIG. 1 is an example of an image captured by SEM of a partial section of a semiconductor wafer that is the inspection target area of ​​one die. Training image 20-A includes circuit pattern areas 22-A1 and 22-A2 corresponding to a pair of elongated circuit patterns, and a defect area 26-A corresponding to a defect occurring between the two.

[0029] Note that a "circuit pattern" refers to an area that includes a semiconductor. In the following description, multiple components, information, etc. that have the same or similar functions or meanings may be expressed by adding a "-" and an alphanumeric character to the same reference symbol, such as "circuit pattern areas 22-A1, 22-A2." However, when it is not necessary to distinguish between these multiple components, etc., the "-" and the alphanumeric character may be omitted, such as "circuit pattern area 22."

[0030] The training images 20, such as training image 20-A, are images collected during the manufacturing process of semiconductor products. They hold pixel values ​​in a two-dimensional array format, with vertical and horizontal directions, and may hold multiple channels. The data type of each pixel value is, for example, an unsigned integer. The file format of the training images 20 may be PNG. As illustrated in training image 20-A, the training images 20 include the appearance of the defect area 26 and the appearance of the circuit pattern area 22. Furthermore, the training images 20 may include the appearances of other elements. To uniquely identify each training image 20, a training image ID is assigned to each training image 20.

[0031] Furthermore, reference image 30-A (first reference image) is an example of an image captured by SEM of a section corresponding to learning image 20-A in another die located near the die corresponding to learning image 20-A. Reference image 30-A includes a pair of circuit pattern areas 32-A1 and 32-A2 similar to circuit pattern areas 22-A1 and 22-A2 in learning image 20-A. However, reference image 30-A does not include a defect area such as defect area 26-A.

[0032] Thus, reference images 30 such as reference image 30-A are images collected during the manufacturing process of a semiconductor product, and may hold pixel values ​​in a two-dimensional array format with vertical and horizontal directions, and may hold multiple channels. The data type of each pixel value may be, for example, Unsigned Integer. The file format of reference image 30 may be PNG format. To uniquely identify each reference image 30, a reference image ID is assigned to each reference image 30. Note that reference image 30 is not necessarily limited to being a photograph of an actual die. For example, reference image 30 may be an image of the circuit pattern design information corresponding to the training image 20, which is generated from the circuit pattern design information created during the design process of a semiconductor product.

[0033] The circuit pattern recognition image 40-A is an image that represents the result of recognizing the circuit pattern areas 32-A1 and 32-A2 (circuit pattern areas in the first reference image) in the reference image 30-A. In the illustrated example, the circuit pattern recognition image 40-A has circuit pattern areas 42-A1 and 42-A2 (circuit pattern areas in the circuit pattern recognition image) that correspond to the circuit pattern areas 32-A1 and 32-A2, respectively.

[0034] In this way, the circuit pattern recognition images 40, such as the circuit pattern recognition image 40-A, are images showing a circuit pattern region, and may be images of circuit pattern regions 42 extracted from the reference image 30 using a general image region segmentation technique or the like. The circuit pattern recognition image 40 may also hold pixel values ​​in the form of a two-dimensional array of vertical and horizontal directions and may hold multiple channels. The data type of each pixel value may be, for example, an unsigned integer type. Furthermore, the circuit pattern recognition image 40 is not necessarily limited to an image extracted from the reference image 30. For example, the circuit pattern recognition image 40 may be an image of the circuit pattern design information corresponding to the training image 20, which is generated from the circuit pattern design information created in the design process of a semiconductor product.

[0035] The file format of the circuit pattern recognition image 40 is, for example, PNG format. In the circuit pattern recognition image 40, the pixel value of the circuit pattern region 42 may be, for example, "255," and the pixel value of the portion other than the circuit pattern region 42 may be, for example, "0." This makes it possible to identify the circuit pattern region 42 from the circuit pattern recognition image 40 based on the pixel values. In order to uniquely identify the circuit pattern recognition image 40, a circuit pattern recognition image ID is assigned to each circuit pattern recognition image 40.

[0036] The defect area image 50-A is an image that represents the result of recognizing the defect area 26-A in the learning image 20-A. In the illustrated example, the defect area image 50-A has a defect area 56-A (a defect area within the defect area image) and a background area 58-A. The pixel value of the background area 58-A is "0," and the pixel value of the defect area 56-A is "1" or greater. The shape of the defect area 56-A corresponds to the shape of the defect area 26-A in the learning image 20-A.

[0037] In this way, the defect area image 50, such as the defect area image 50-A, is an image showing a defect area and is generated by performing image subtraction between the learning image 20 and the reference image 30. The defect area image 50 holds pixel values ​​in the form of a two-dimensional array in the vertical and horizontal directions, and may hold multiple channels. The data type of each pixel value is, for example, Unsigned Integer. The file format of the defect area image 50 may be PNG.

[0038] Reference image 30-B (second reference image) is an example of an image captured by SEM of a die section on a semiconductor wafer different from those in learning image 20-A and reference image 30-A. However, reference image 30-B also does not include a defect area such as defect area 26. In the illustrated example, reference image 30-B includes a pair of circuit pattern areas 32-B1 and 32-B2 (circuit pattern areas in the second reference image). Furthermore, these circuit pattern areas 32-B1 and 32-B2 have different shapes from circuit pattern areas 32-A1 and 32-A2 in reference image 30-A.

[0039] The circuit pattern recognition image 40-B is an image that represents the results of recognizing the circuit pattern areas 32-B1 and 32-B2 in the reference image 30-B. In the illustrated example, the circuit pattern recognition image 40-B has circuit pattern areas 42-B1 and 42-B2 that correspond to the circuit pattern areas 32-B1 and 32-B2, respectively.

[0040] The composite image 70-B is an image resulting from combining the reference image 30-B and the defect area image 50-A. In the illustrated example, the composite image 70-B includes a pair of circuit pattern areas 72-B1 and 72-B2 (circuit pattern areas within the composite image) and a defect area 76-B (defect area within the composite image). The circuit pattern areas 72-B1 and 72-B2 have the same shape as the circuit pattern areas 32-B1 and 32-B2, respectively, and the defect area 76-B has the same shape as the defect area 56-A. The same data format as the training image 20 can be used for composite images 70 such as the composite image 70-B.

[0041] [Data Structure] Next, an example of a data structure used in each embodiment described below will be described. In the following description of the data structure, data is represented in a table format or an image. In the table format, each column of the table is called a field, and each row is called a record.

[0042] FIG. 2 is a diagram showing an example of the configuration of the image management table 111. In FIG. 2, each row is called a record, and each column is called a field. The image management table 111 has fields 111a to 111e. Field 111a stores the device ID used in the manufacturing process of semiconductor products. However, field 111a may also include not only the device ID but also the name of the device. The data type of field 111a is, for example, a character string type.

[0043] Field 111b stores a training image ID, which is identification information assigned to a training image 20 (e.g., training image 20-A shown in FIG. 1) collected during the manufacturing process of a semiconductor product. However, field 111b may include not only the training image ID but also the file name of the training image 20. The data type of field 111b is, for example, a character string type.

[0044] Field 111c stores a reference image ID, which is identification information assigned to a reference image 30 (e.g., reference image 30-A shown in FIG. 1) collected during the manufacturing process of a semiconductor product. However, field 111c may contain not only the reference image ID but also the file name of the reference image 30. The data type of field 111c is, for example, a character string type.

[0045] The field 111d stores the defect type for the defect area 26 in the learning image 20. The defect type may be, for example, a "foreign substance" or a "scratch." The defect type may be selected from a plurality of predetermined candidates, or a data scientist may be allowed to input an arbitrary defect type. The data type of the field 111d is, for example, a character string type.

[0046] Field 111e stores a circuit pattern recognition image ID, which is identification information assigned to the circuit pattern recognition image 40 (for example, circuit pattern recognition image 40-A shown in FIG. 1). However, field 111e may contain not only the circuit pattern recognition image ID but also the file name of the circuit pattern recognition image 40. The data type of field 111c is, for example, a character string type. However, the above-described fields are merely examples, and the present invention is not limited to these examples. Any information can be stored in any field that may arise for image management.

[0047] In each record (row) in the image management table 111, the training image 20 specified in the training image ID field 111b and the reference image 30 specified in the reference image ID field 111c are images acquired from the same relative positional relationship within each die on the same semiconductor wafer. For example, in the record in Figure 2 where the device ID in field 111a is "AAA," the training image 20 "defect_img_1" is specified in the training image ID field 111b.

[0048] Assume that this training image 20 was acquired from the coordinates (X, Y) of a certain die DA (not shown). Here, "coordinates (X, Y)" represent coordinates within the die. Meanwhile, the reference image ID field 111c specifies the reference image 30 of "ref_img_1." This reference image 30 was acquired, for example, from the same coordinates (X, Y) in another die DB (not shown). Here, if the same circuit pattern is drawn on each die in the semiconductor wafer, the circuit pattern of the training image 20 and the circuit pattern of the reference image 30 will be the same.

[0049] In this way, the training image 20 and the reference image 30 are acquired so that the circuit patterns in these images are identical. The above-mentioned coordinates (X, Y) may be coordinates detected by the defect classification system 1 (see FIG. 10 ) or the like. That is, the training image 20 and the reference image 30 may be extracted from an image having a relatively large area using a general image area segmentation method or the like. As a result, as shown in FIG. 1 , circuit pattern areas 22, 32, and 42 of the same shape are depicted in the training image 20, the reference image 30, and the circuit pattern recognition image 40.

[0050] 3 is an explanatory diagram of the positional relationship between the circuit pattern area 22 and the defective area 26. The positional relationship between the circuit pattern area 22 and the defective area 26 is first broadly classified into "contact" and "non-contact." "Contact" refers to the defective area 26 being in contact with the circuit pattern area 22, and "non-contact" refers to the defective area 26 not being in contact with the circuit pattern area 22. In the example of FIG. 3, the training image 20-A is classified as "non-contact," and the other training images 20-C, 20-D, 20-E, and 20-F are classified as "contact."

[0051] Furthermore, "contact" is classified into "contact / inclusion" and "contact / non-inclusion." "Inclusion" refers to the defect area 26 being contained within the circuit pattern area 22. On the other hand, "contact / non-inclusion" refers to the defect area 26 being partially located outside the circuit pattern area 22. In the example of FIG. 3, the training image 20-F is classified as "contact / inclusion," and the training images 20-C, 20-D, and 20-E are classified as "contact / non-inclusion."

[0052] In the case of "contact / non-inclusion," the "circuit direction" and "number of lines" are also referenced. The "circuit direction" refers to the direction of the long side of the circuit pattern area 22. In the example of FIG. 3, the "circuit direction" of the training images 20-C and 20-D is the "vertical direction," and the "circuit direction" of the training image 20-E is the "horizontal direction." The "number of lines" refers to the number of circuit pattern areas 22 with which the defective area 26 intersects. In the example of FIG. 3, the "number of lines" of the training images 20-C and 20-E is "1," and the "number of lines" of the training image 20-D is "2."

[0053] FIG. 4 is an explanatory diagram of the defect type positional relationship definition information 131. The defect type positional relationship definition information 131 defines the positional relationship between the circuit pattern area 22 and the defect area 26 of the learning image 20, and includes fields 131a, 131b, and 131c. Field 131a represents the positional relationship between the circuit pattern area 22 and the defect area 26. In the three records of the defect type positional relationship definition information 131, field 131a represents "contact / inclusion," "contact / non-inclusion," and "non-contact," respectively, as described in FIG. 3. Field 131b represents information indicating whether or not the circuit pattern area 22 contains the defect area 26 in each positional relationship. The data type of field 131b is, for example, Boolean. As shown in FIG. 4, this information is "True" when the positional relationship is "contact / inclusion," and "False" otherwise.

[0054] The field 131c is information representing the number of contact circuits, i.e., the range of the number of circuit pattern areas 22 that contact the defective area 26, for each positional relationship. This information is "1" when the positional relationship is "contact and inclusion," "0" when the positional relationship is "non-contact," and "1 or more" when the positional relationship is "contact and non-inclusion." The data type of the field 131c is, for example, an integer type or a character string type. Note that the defect type positional relationship definition information 131 is not limited to the example shown in FIG. 4, and any information that may occur in the relationship between the circuit pattern area 22 and the defective area 26 may be stored in any field.

[0055] 5 is a diagram showing an example of the configuration of the defect type positional relationship determination result table 136. The defect type positional relationship determination result table 136 is a table that describes the relationship between the defect area 26 and the circuit pattern area 22, and has fields 136a to 136i. Field 136a stores a table ID, which is the ID of each record in the defect type positional relationship determination result table 136. The data type of field 136a is, for example, Integer type.

[0056] Field 136b stores a training image ID for identifying the training image 20 related to the record. This training image ID corresponds to the contents of field 111b in the image management table 111 (see FIG. 2). The data type of field 136b is, for example, a character string. Field 136c stores a circuit pattern recognition image ID for identifying the circuit pattern recognition image 40. This circuit pattern recognition image ID corresponds to the contents of field 111e in the image management table 111 (see FIG. 2). The data type of field 136c is, for example, a character string.

[0057] 1, one circuit pattern recognition image 40 includes one or more circuit pattern regions 42. Field 136d stores label IDs assigned to each of these circuit pattern regions 42. In other words, multiple label IDs can be stored for one circuit pattern recognition image 40. The data type of field 136d is, for example, Integer type.

[0058] Field 136e stores the aspect ratio of the shape of the circuit pattern corresponding to each label ID. An aspect ratio value of "1" indicates a square circuit pattern, an aspect ratio value greater than "1" indicates a horizontally elongated circuit pattern, and an aspect ratio value less than "1" indicates a vertically elongated circuit pattern. The data type of field 136e is, for example, Float type.

[0059] Field 136f stores the circularity of the shape of the circuit pattern corresponding to each label ID. A circularity value of "1" indicates a circular circuit pattern, and as the circularity value becomes smaller than "1," the shape of the circuit pattern becomes less circular. The data type of field 136f is, for example, Float type.

[0060] Field 136g stores the positional relationship determination result for the learning image 20 corresponding to the learning image ID field 136b. The positional relationship determination result is one of the positional relationship fields 131a in the defect type positional relationship definition information 131 (see FIG. 4), specifically "contact / inclusion," "contact / non-inclusion," or "non-contact." These positional relationships can be determined using the positional relationship between the defect area 56 in the defect area image 50 and the circuit pattern area 42 in the circuit pattern recognition image 40. The data type of field 136g is, for example, a character string type.

[0061] If the positional relationship determination result is "non-contact," the field 136h stores the distance "distance from the circuit center of gravity." The "distance from the circuit center of gravity" is the distance in the X and Y directions between the center of gravity of the defective area 26 (see FIG. 1) and the center of gravity of the nearest circuit pattern area 22. The data type of the field 136h is, for example, an array type or a list type.

[0062] Furthermore, if the positional relationship determination result is "contact / encompassing," field 136i stores "distance to outside of circuit pattern." The "distance to outside of circuit pattern" is the distance in the X and Y directions between the closest points on the outer edge of defect area 26 and the closest points on the outer edge of circuit pattern area 22. The data type of field 136i is, for example, an array type or a list type.

[0063] 6 is a diagram showing an example of the configuration of the image synthesis setting information 141. The image synthesis setting information 141 includes reference image search conditions 141a and synthesis position conditions 141b. The reference image search conditions 141a are setting items that define conditions for searching for the reference image 30-B (see FIG. 1). The synthesis position conditions 141b are setting items that define conditions for the positional relationship between the reference image 30-B and the defect area image 50 when they are synthesized.

[0064] The reference image search condition 141a includes "circuit num: threshold," "aspect ratio: threshold," and "circularity: threshold." In the example of FIG. 1, the number of circuit pattern areas 32 in the reference image 30-B and the number of circuit pattern areas 42 in the circuit pattern recognition image 40 are both "2," which is the same. However, there may be cases where the two numbers differ. "Circuit num: threshold" is a threshold that determines the maximum value of the difference (absolute value) between the number of circuit pattern areas 32 and the number of circuit pattern areas 42.

[0065] Furthermore, "aspect ratio: threshold" is a threshold that determines the maximum difference (absolute value) between the aspect ratio of the circuit pattern recognition image 40 and the aspect ratio of the reference image 30-B to be searched. Furthermore, "circularity: threshold" is a threshold that determines the maximum difference (absolute value) between the circularity of the circuit pattern in the circuit pattern recognition image 40 and the circularity of the circuit pattern in the reference image 30-B to be searched. The data type of "circuit num: threshold" is, for example, Integer. The data types of "aspect ratio: threshold" and "circularity: threshold" are, for example, Float.

[0066] Furthermore, the composition position condition 141b includes "distance pixel: threshold," "overlay curcuit: same flag," and "overlay curcuit: threshold." As described above, the defect type positional relationship determination result table 136 (see FIG. 5) includes a "distance from the circuit centroid" field 136h and a "distance to the outside of the circuit pattern" field 136i. "distance pixel: threshold" is a threshold that determines an allowable difference (absolute value) for the composition position at which the defect area image 50-A is composed within the image range of the reference image 30-B, relative to the "distance from the circuit centroid" or the "distance to the outside of the circuit pattern" in the learning image 20-A. In the illustrated example, "distance pixel: threshold" is expressed by the number of pixels, and its data type is, for example, Integer.

[0067] As described above, the defect type positional relationship determination result table 136 (see FIG. 5) includes a positional relationship determination result field 136g. When the positional relationship is "contact / non-inclusion," the number of circuit pattern areas 22 that contact the defect area 26 is calculated. The "overlay curcuit: same flag" is a flag that is "True" if the composite image 70-B should be generated so that the "number of circuit pattern areas that contact the defect area" is the same as that of the training image 20-A when the positional relationship determination result for the training image 20-A is "contact / non-inclusion," and is "False" if the "number of circuit pattern areas that contact the defect area" is not limited. The data type of the "overlay curcuit: same flag" is, for example, Boolean.

[0068] Here, a specific example when the "overlay current: same flag" is "True" will be described. In the defect type positional relationship determination result table 136 (see FIG. 5), when records in which the table ID field 136a is "5" to "7" are referenced, the circuit pattern recognition image ID field 136c is "design_img_3" in all of them. In addition, in a record in which the field 136a is "6," the label ID field 136d is "2," and the positional relationship determination result field 136g is "contact / non-inclusion."

[0069] This means that, of the multiple circuit patterns included in the circuit pattern recognition image 40 related to "design_img_3," only the circuit pattern with the label ID "2" is "touching / non-inclusive." Also, assume that the number of contacting circuits, i.e., the number of circuit pattern areas 22 that contact the defective area 26 in the circuit pattern, is "1." Since "overlay circuit: same flag" is "True," this means that image composition is performed between the reference image 30-B and the defective area image 50-A (see FIG. 1) so that the "number of circuit pattern areas contacting the defective area" becomes "1."

[0070] "Overlay curcuit: threshold" stores the upper limit number of circuit patterns that contact the defect area when the field 136g, which is the positional relationship determination result of the defect type positional relationship determination result table 136, determines that the result is "contact / inclusion." When compositing the defect area image 50 with the reference image 30-B, the value of "overlay curcuit: threshold" is referenced, and the referenced value is used as the upper limit of the number of circuit patterns that contact each other to search for image area candidates for image compositing. The data type of "overlay curcuit: threshold" is, for example, Integer. Note that the text format shown in FIG. 6 is an example of setting information, and is not limited to this example. Any information can be stored in any text format that can be generated as setting information.

[0071] [Screen Display Examples] Next, various display screens displayed in each embodiment will be described. Fig. 7 is a diagram showing an example of a learning image selection screen 201. The learning image selection screen 201 includes a learning image selection section 201a and a positional relationship determination execution button 201c. The learning image selection section 201a includes a plurality of check boxes 201b corresponding to learning image IDs.

[0072] The learning image IDs corresponding to these check boxes 201b are obtained from field 111b of the image management table 111 (see FIG. 2). When the user checks any of the check boxes 201b and presses the positional relationship determination execution button 201c, the corresponding learning image 20 is selected as the learning image 20 to be processed.

[0073] 8 is a diagram showing an example of the defect type positional relationship confirmation screen 202. The defect type positional relationship confirmation screen 202 includes a learning image display field 202a, a reference image display field 202b, a determination result display field 202c, and an image synthesis execution button 202d. The learning image display field 202a and the reference image display field 202b respectively display the learning image 20 and the reference image 30 for which the positional relationships of defect types have been determined by the defect type determination unit 130 (details of which will be described later).

[0074] The judgment result display field 202c displays the contents of the label ID field 136d, the aspect ratio field 136e, the circularity field 136f, the positional relationship judgment result field 136g, the “distance from the circuit center of gravity” field 136h, and the “distance to the outside of the circuit pattern” field 136i in the defect type positional relationship judgment result table 136 (see FIG. 5).

[0075] To display the reference image 30, the image management table 111 (see FIG. 2) is referenced, and the reference image 30 of the reference image ID 111c corresponding to the row of the learning image ID 111b is acquired and displayed. By using the defect type positional relationship confirmation screen 202, the user can check on the screen the defect type positional relationship determination result table 136 corresponding to the learning image 20 that the user himself / herself specified on the learning image selection screen 201 (see FIG. 7). This allows the user to determine whether or not to execute the process of generating the composite image 70.

[0076] Including the defect type positional relationship confirmation screen 202 in the interaction with the user can prevent the generation of a composite image 70 that differs from the user's intention. That is, after the user checks the defect type positional relationship confirmation screen 202, the execution of the generation process of the composite image 70 may be canceled.

[0077] 9 is a diagram showing an example of the composite image confirmation screen 203. The composite image confirmation screen 203 includes a composite image display field 203a, in which the above-described composite image 70 is displayed. This allows the user to check the appearance of the composite image 70.

[0078] [First Embodiment] <Configuration of First Embodiment> Fig. 10 is a block diagram showing an example configuration of a defect classification system 1 according to the first embodiment. In Fig. 10, the defect classification system 1 includes a defect classification server 100 (defect classification device, computer) and a display unit 200. The display unit 200 outputs various information by communicating with the defect classification server 100. The defect classification server 100 includes a data management unit 110, a defect area image creation unit 120 (defect area image creation process), a defect type determination unit 130 (defect type determination process), an image acquisition / synthesis unit 140, a data acquisition unit 150, a positional relationship acquisition unit 160 (positional relationship acquisition process), and a composite image acquisition unit 170. The data management unit 110 stores an image management table 111, a learning image 20, a reference image 30, and a circuit pattern recognition image 40.

[0079] The data acquisition unit 150 includes a data input unit 151, through which various data are input. The various data stored in the data management unit 110 described above is data collected in the semiconductor product manufacturing process or input by a data scientist, and is input from the data input unit 151.

[0080] More specifically, the training images 20, the reference images 30, and the circuit pattern recognition images 40 are data collected during the manufacturing process of semiconductor products, and the image management table 111 is data input by a data scientist. The training images 20, the reference images 30, and the circuit pattern recognition images 40 may be a collection of images generated during the manufacturing processes of a variety of semiconductor products. As a result, the IDs of the newly collected training images 20, the reference images 30, and the circuit pattern recognition images 40 are stored in fields 111b, 111c, and 111e of the image management table 111 (see FIG. 2). These IDs may be stored by a data scientist.

[0081] The defect area image creation unit 120 includes an image acquisition unit 121 and a defect area extraction unit 122. The image acquisition unit 121 acquires the learning image 20 defined in the image management table 111 and the corresponding reference image 30 from the data management unit 110. The defect area extraction unit 122 calculates the image difference between the learning image 20 and the reference image 30, and generates a defect area image 50 representing a defect area 56 (see FIG. 1 ). In other words, the defect area image 50 is an image in which a background area 58 other than the defect area 56 is masked. The calculation in the defect area extraction unit 122 may utilize a difference process of pixel values ​​between the learning image 20 and the reference image 30.

[0082] The defect type determination unit 130 determines the positional relationship (see FIG. 3 ) between the defect area 56 (see FIG. 4 ) of the defect area image 50 and the circuit pattern area 42 of the circuit pattern recognition image 40 based on the circuit pattern recognition image 40 and the defect type positional relationship definition information 131.

[0083] The circuit pattern recognition image acquisition unit 132 acquires the circuit pattern recognition image 40 and the defect type positional relationship definition information 131. When acquiring the circuit pattern recognition image 40, the image management table 111 (see FIG. 2) is referenced, and the circuit pattern recognition image 40 (see FIG. 1) corresponding to the learning image ID field 111b and the circuit pattern recognition image ID field 111e is acquired.

[0084] The label generation unit 133 performs labeling processing on the circuit pattern regions 42 (see FIG. 1) of the circuit pattern recognition image 40. For example, when labeling processing is performed on the circuit pattern recognition image 40-A shown in FIG. 1, a label ID of "1" is assigned to the circuit pattern region 42-A1, and a label ID of "2" is assigned to the circuit pattern region 42-A2.

[0085] The circuit pattern recognition image 40 may include three or more circuit pattern areas, but by performing the labeling process in this manner by the label generation unit 133, a different label ID is assigned to each circuit pattern area 42. The label attribute information calculation unit 134 calculates the aspect ratio and circularity of each circuit pattern area 42 corresponding to the circuit pattern area 42 to which a label ID has been assigned.

[0086] The defect type positional relationship determination unit 135 determines the positional relationship between the defect area 26 and the circuit pattern area 22 in the learning image 20 based on the positional relationship between the defect area 56 and each circuit pattern area 42. That is, first, the defect type positional relationship determination unit 135 obtains a first determination result as to whether or not the circuit pattern area 22 contacts the defect area 26. Then, if the first determination result is positive, the defect type positional relationship determination unit 135 obtains a second determination result as to whether or not the defect area 26 is contained in the circuit pattern area 22.

[0087] If the positional relationship between the two is "contact / encompassing," the defect type positional relationship determination unit 135 calculates the distance (distance in the X and Y directions) from the defect area 56 to the outside of the circuit pattern. This calculation result corresponds to the contents of field 136i of the defect type positional relationship determination result table 136 (see FIG. 5). If the positional relationship between the two is "non-contacting," the defect type positional relationship determination unit 135 calculates the distance (distance in the X and Y directions) from the center of gravity of the defect area 56 to the center of gravity of each circuit pattern area 42. This calculation result corresponds to the contents of field 136h of the defect type positional relationship determination result table 136 (see FIG. 5). The defect type positional relationship determination unit 135 outputs the calculated positional relationship and distance as the defect type positional relationship determination result table 136.

[0088] The image acquisition / synthesis unit 140 includes an image-to-be-synthesized acquisition unit 142 and an image synthesis unit 143 (image synthesis process). The image-to-be-synthesized acquisition unit 142 acquires the reference image 30-B (see FIG. 1) based on the defect type positional relationship determination result table 136 (see FIG. 5) and the image synthesis setting information 141 (see FIG. 6). The image synthesis unit 143 synthesizes the defect area 56 of the defect area image 50 with the reference image 30-B to generate a synthesized image 70.

[0089] The reference image 30-B acquired by the image-to-be-combined acquisition unit 142 may have a different number of circuit patterns, an aspect ratio, or a circularity from the circuit pattern region 32 of the reference image 30. When the image-to-be-combined acquisition unit 142 searches for the reference image 30-B, it refers to the label ID field 136d, the aspect ratio field 136e, and the circularity field 136f in the defect type positional relationship determination result table 136 (see FIG. 5).

[0090] After the synthesis image acquisition unit 142 searches for and acquires the reference image 30-B, it acquires the reference image 30-B (reference image ID field 111c) and the circuit pattern recognition image 40 (circuit pattern recognition image ID field 111e) that corresponds to the row of the reference image 30-B found in the image management table 111 (see FIG. 2). The image synthesis unit 143 synthesizes the reference image 30-B and the defect area image 50 while prioritizing the defect area image 50 (placing the defect area image 50 on top). When synthesizing the images, it searches the circuit pattern recognition image 40 for pixels based on the positional relationship determination result field 136g of the defect type positional relationship determination result table 136 (see FIG. 5) to search for pixel coordinates that meet the determination conditions.

[0091] The judgment conditions may include a field 136g that is the positional relationship judgment result of the defect type positional relationship judgment result table 136, a field 136h that is the centroid distance from the circuit centroid, and a field 136i that is the distance to the outside of the circuit. When pixel coordinates that meet the judgment conditions are found, the image synthesis unit 143 projects the pixel coordinates onto the reference image 30-B and synthesizes the defect area 56 onto the reference image 30-B.

[0092] The positional relationship acquisition unit 160 causes the display unit 200 to display a defect type positional relationship confirmation screen 202 (see Figure 8) on the display unit 200, which shows the defect type positional relationship determination result table 136 determined by the defect type determination unit 130.

[0093] The composite image acquisition unit 170 acquires the composite image 70 generated from the learning image 20 specified on the learning image selection screen 201 (see FIG. 7 ) to display the composite image 70 generated by the image acquisition and synthesis unit 140 on a composite image confirmation screen 203 (see FIG. 9 ) via the display unit 200. By using the composite image confirmation screen 203, the user can check the appearance of the composite image 70, which is the output result of the image acquisition and synthesis unit 140.

[0094] As described above, the display unit 200 displays the learning image selection screen 201 (see FIG. 7 ), the defect type positional relationship confirmation screen 202 (see FIG. 8 ), and the composite image confirmation screen 203 (see FIG. 9 ). On the learning image selection screen 201, the user selects the learning image 20 that he or she wants to composite from among the learning images 20 that have already been taken. On the defect type positional relationship confirmation screen 202, the user can confirm on the screen the defect type positional relationship determination result table 136 for the learning image 20 that the user himself or herself specified on the learning image selection screen 201. On the composite image confirmation screen 203, the user can confirm the appearance of the composite image 70 that is the output result of the image acquisition and composition unit 140.

[0095] By configuring the defect classification system 1 as described above, data scientists can automatically generate training datasets for each type of defect appearance and the positional relationship of the defects on the circuit pattern, using various circuit patterns previously collected in the manufacturing process of semiconductor products. This reduces the workload of creating training datasets required for retraining machine learning models and shortens the time required to deal with degradation of accuracy.

[0096] Next, we will explain an example of the hardware configuration of the defect classification server 100. Fig. 11 is a block diagram showing an example of the hardware configuration of the defect classification server 100. As shown in Fig. 11, the defect classification server 100 includes a storage device 301, an arithmetic device 303, a memory 304, and a communication device 305, and these elements are connected to each other via a bus 308.

[0097] The storage device 301 is preferably configured with a nonvolatile storage element such as an SSD (Solid State Drive) or a hard disk drive. The storage device 301 stores a program 302 that defines the operation of the arithmetic device 303 and various information used or generated by the arithmetic device 303. The information stored in the storage device 301 includes the above-mentioned image management table 111, learning images 20, reference images 30, circuit pattern recognition images 40, defect area images 50, defect type positional relationship definition information 131, defect type positional relationship determination result table 136, image synthesis setting information 141, and synthesized image 70. The memory 304 is preferably configured with a volatile storage element such as a RAM (Random Access Memory).

[0098] The arithmetic unit 303 is preferably configured with a processor such as a CPU (Central Processing Unit). The arithmetic unit 303 reads a program 302 stored in the storage device 301 into a memory 304 and executes the program. This enables the functions of the data management unit 110, the defect area image creation unit 120, the defect type determination unit 130, the image acquisition / combination unit 140, the data acquisition unit 150, the positional relationship acquisition unit 160, and the composite image acquisition unit 170 shown in FIG. 10 to be realized. The communication unit 305 can communicate with an external device such as the display unit 200 shown in FIG. 10 via a network 310.

[0099] <Operation of First Embodiment> Next, the operation of the first embodiment will be described. Fig. 12 is a flowchart showing an example of a processing routine executed by the defect classification server 100. In Fig. 12, when the processing proceeds to step S12, an image acquisition process is executed. That is, the image acquisition unit 121 refers to the image management table 111 and acquires the learning image 20 corresponding to the learning image ID specified on the learning image selection screen 201 (see Fig. 7) and the reference image 30 corresponding thereto.

[0100] For example, as shown in the learning image selection screen 201 of Fig. 7, assume that the learning image ID "defect_img_1" is checked in the checkbox 201b of the learning image selection section 201a. In this case, the image acquisition unit 121 extracts a record of the image management table 111 (see Fig. 2) that corresponds to "defect_img_1" from the learning image ID field 111b of the image management table 111. According to Fig. 2, "defect_img_1" is associated with "ref_img_1" as the reference image ID, "foreign matter" as the defect type, and "design_img_1" as the circuit pattern recognition image ID.

[0101] Record extraction methods include searching for complete string matches of the training image ID, searching for partial matches, and any other search method may be used. In the following description, the training image 20 and reference image 30 acquired in step S12 will be referred to as training image 20-A and reference image 30-A. These images may be considered to be, for example, those shown in FIG. 1.

[0102] Next, when the process proceeds to step S14, the defect area extraction unit 122 calculates the difference between the learning image 20-A and the reference image 30-A, and generates a defect area image 50. Calculating the difference means, for example, calculating the difference in pixel values ​​between the learning image 20-A and the reference image 30-A. In the following explanation, the defect area image 50 generated by calculation will be referred to as defect area image 50-A. This defect area image 50-A may also be considered to be, for example, the one shown in FIG. 1.

[0103] Next, when the process proceeds to step S16, the circuit pattern recognition image acquisition unit 132 acquires a circuit pattern recognition image 40 and defect type positional relationship definition information 131 (see FIG. 4). The circuit pattern recognition image 40 is an image corresponding to the learning image 20-A and the reference image 30-A, and will be referred to as a circuit pattern recognition image 40-A in the following description. This circuit pattern recognition image 40-A may also be considered to be, for example, the one shown in FIG. 1.

[0104] Next, when the process proceeds to step S18, the label generation unit 133 executes a label number generation process. That is, the pixel values ​​of the circuit pattern recognition image 40-A are searched for, and label numbers are assigned to the pixels that represent the circuit pattern region 42. The process of assigning label numbers to pixels may use, for example, an image processing algorithm that performs pixel neighborhood processing starting from a certain pixel to group pixels having the same pixel value. In the example of the circuit pattern recognition image 40-A shown in FIG. 1, for example, a label number of "1" can be assigned to the circuit pattern region 42-A1, and a label number of "2" can be assigned to the circuit pattern region 42-A2.

[0105] Next, when the process proceeds to step S20, the label attribute information calculation unit 134 executes a calculation process for attribute information, etc. That is, the label attribute information calculation unit 134 calculates, for the label numbers previously assigned in step S18, the number of circuit pattern areas 42 (number of assigned labels), attribute information of pixel sets assigned the same label number, etc. In the example shown in FIG. 1, label numbers "1" and "2" are assigned, so the number of circuit pattern areas 42 is "2."

[0106] Furthermore, the label attribute information calculation unit 134 calculates the aspect ratio and circularity as attribute information of a set of pixels assigned the same label number. The aspect ratio is calculated by calculating the minimum and maximum values ​​of the X and Y coordinates of the region of pixels assigned the same label number for one label number, and can be calculated using the following formula (1) where the minimum X coordinate is Xmin, the maximum X coordinate is Xmax, the minimum Y coordinate is Ymin, and the maximum Y coordinate is Ymax.

[0107]

[0108] The label attribute information calculation unit 134 stores the calculation result of the aspect ratio in field 136e of the defect type positional relationship determination result table 136 (see FIG. 5). In addition, the circularity can be calculated by calculating the perimeter and area of ​​a region of pixels assigned with one label number as the target, and then using the following formula (2):

[0109]

[0110] The label attribute information calculation unit 134 stores the calculation result of the circularity in a field 136f of the defect type positional relationship determination result table 136. Furthermore, in step S20, the label attribute information calculation unit 134 may calculate any attribute information other than the aspect ratio and the circularity.

[0111] Next, when the process proceeds to step S22, the defect type positional relationship determination unit 135 performs a process of determining the positional relationship of the defect areas. That is, the defect type positional relationship determination unit 135 determines the positional relationship between the circuit pattern area 42 and the defect area 56 based on the defect area image 50-A and the circuit pattern recognition image 40-A to which label numbers have been assigned.

[0112] The result of the positional relationship determination is either "contact and inclusion," "contact and non-inclusion," or "non-contact," as shown in Fig. 4. If the result is "contact and non-inclusion," the defect type positional relationship determination unit 135 also calculates the number of contacting circuits (the number of circuit pattern areas 42 that the defective area 56 contacts).

[0113] To determine the positional relationship, the defect type positional relationship determination unit 135 compares each pixel of the defect area 56-A in the defect area image 50-A with each pixel at the same position in the circuit pattern recognition image 40-A to which a label number has been assigned. If all pixels of the defect area 56-A are not included in the circuit pattern area 42 to which a label number has been assigned, the result of the determination of the positional relationship by the defect type positional relationship determination unit 135 is "non-contact."

[0114] Furthermore, if all pixels of the defect area 56-A are included in the circuit pattern area 42 to which a label number has been assigned, the result of the positional relationship determination by the defect type positional relationship determination unit 135 is "contact / inclusion."

[0115] Furthermore, if some pixels of the defect area 56-A are included in the circuit pattern area 42 to which label numbers have already been assigned, the result of the positional relationship determination by the defect type positional relationship determination unit 135 will be "contact / non-inclusion." In this case, the defect type positional relationship determination unit 135 extracts label numbers corresponding to pixels of the circuit pattern area 42 that overlap with pixels of the defect area 56-A. The number of extracted label numbers becomes the number of contacting circuits. The defect type positional relationship determination unit 135 stores these positional relationship determination results in field 136g of the defect type positional relationship determination result table 136 (see FIG. 5).

[0116] Furthermore, if the positional relationship determination result is "non-contact," the defect type positional relationship determination unit 135 calculates the pixel centroid coordinates of the defect area 56-A in the defect area image 50-A. Furthermore, the defect type positional relationship determination unit 135 calculates the pixel centroid coordinates of each circuit pattern area 42 in the circuit pattern recognition image 40-A to which label numbers have been assigned. Then, the defect type positional relationship determination unit 135 calculates the pixel distances (distances in the X and Y directions) between the pixel centroid coordinates of the defect area 56-A and the pixel centroid coordinates of each circuit pattern area 42.

[0117] The pixel centroid coordinates of the defect area 56-A in the defect area image 50-A and the pixel centroid coordinates of each circuit pattern area 42 in the circuit pattern recognition image 40-A to which a label number has been assigned can be calculated using the following equations (3) and (4).

[0118]

[0119]

[0120] In equation (3), x represents the X coordinate value and y represents the Y coordinate value. Furthermore, f(x, y) is a pixel value, which is the pixel value of the pixel of the defect area 56-A in the defect area image 50-A, or the pixel value of each circuit pattern area 42 in the circuit pattern recognition image 40-A to which a label number has been assigned. The pixel value f(x, y) is "0" in the background and "1" in the target. The variables i and j are values ​​that are either "1" or "0."

[0121] However, any calculation method other than equations (3) and (4) may be used to calculate the pixel centroid coordinates. The pixel distance between the pixel centroid coordinates of each circuit pattern area 42 and the pixel centroid coordinates of the defective area 56-A can be found by calculating the difference between the X and Y coordinate values ​​shown in equation (4). The pixel distance between the pixel centroid coordinates of each circuit pattern area 42 and the pixel centroid coordinates of the defective area 56-A is stored in the "distance from circuit centroid" field 136h in the defect type positional relationship determination result table 136 (see FIG. 5).

[0122] On the other hand, if the positional relationship determination result is determined to be "contact / encompassing," the defect type positional relationship determination unit 135 checks pixel values ​​f(x, y) in the up, down, left, and right directions of the defect area image 50 from the pixel centroid coordinates of the defect area 56-A in the defect area image 50-A, and calculates the distance to the pixel coordinates outside the circuit pattern. The pixel values ​​f(x, y) are confirmed by comparing the image with the circuit pattern recognition image 40-A to which a label number has been assigned. The defect type positional relationship determination unit 135 calculates the distance to the pixel coordinates outside the circuit pattern for each of the X and Y coordinates. Then, the defect type positional relationship determination unit 135 stores this calculation result in the "distance to outside the circuit pattern" field 136i in the defect type positional relationship determination result table 136.

[0123] 12, when the process proceeds to step S24, the positional relationship acquisition unit 160 performs a judgment result display process. That is, the positional relationship acquisition unit 160 acquires the defect type positional relationship judgment result table 136 and displays the contents of the table 136 on the display unit 200 as a defect type positional relationship confirmation screen 202 (see FIG. 8).

[0124] 8, the defect type positional relationship confirmation screen 202 displays the learning image 20 and the reference image 30. In the example described above, the learning image 20-A is displayed as the learning image 20, and the reference image 30-A is displayed as the reference image 30. The determination result display field 202c displays the contents of the defect type positional relationship determination result table 136 determined based on the defect area image 50-A and the circuit pattern recognition image 40-A to which a label number has been assigned. The defect type positional relationship determination result table 136 displays the label ID, aspect ratio, circularity, positional relationship determination result, distance from the circuit center of gravity, and distance to outside the circuit.

[0125] In the example shown in Figure 8, the defect area 26 (see Figure 1) included in the learning image 20 is not included in the circuit pattern area 22. Therefore, although the "distance from the circuit center of gravity" is calculated, the "distance to the outside of the circuit" is not calculated, and therefore a hyphen is displayed. By checking such defect type positional relationship determination results, the user can understand the relationship between the defect area 26 shown in the learning image 20 and the circuit pattern area 22.

[0126] The above description of steps S12 to S24 was directed to one learning image 20-A, its corresponding reference image 30-A, and circuit pattern recognition image 40-A. However, in the processing of steps S12 to S24, the defect classification server 100 also performs the same processing on all learning images 20, reference images 30, and circuit pattern recognition images 40 stored in the data management unit 110. As a result, the defect classification server 100 creates a defect type positional relationship determination result table 136 as shown in FIG. 5.

[0127] 12, when the process proceeds to step S26, the image-to-be-combined acquisition unit 142 acquires a reference image 30-B to be combined based on the defect area image 50-A, the image combination setting information 141, and the defect type positional relationship determination result table 136. The reference image 30-B is an image having a circuit pattern area 32 different from that of the reference image 30-A, and is an image captured from a semiconductor wafer different from that of the reference image 30-A. The reference image 30-B may also be considered to be, for example, the one shown in FIG. 1.

[0128] As described above, the image synthesis setting information 141 (see FIG. 6) includes reference image search conditions 141a for searching for the reference image 30-B. As a result, the synthesis image acquisition unit 142 compares the number, aspect ratio, and circularity of the circuit pattern regions 42 calculated from the circuit pattern recognition image 40-A with the number, aspect ratio, and circularity of the circuit pattern regions 32 in each reference image 30, and searches for the reference image 30-B that satisfies the reference image search conditions 141a.

[0129] Taking the reference image search condition 141a shown in FIG. 6 as an example, since the "circuit num: threshold" is set to "1," the reference image 30-B must include circuit pattern regions 32 with "±1" circuit patterns relative to the number of circuit patterns calculated from the circuit pattern recognition image 40-A. Furthermore, since the "aspect ratio: threshold" is set to "0.1," the reference image 30-B must include circuit pattern regions 32 with an aspect ratio in the range of "±0.1" relative to the aspect ratio calculated from the circuit pattern recognition image 40-A. Furthermore, since the "circularity: threshold" is set to "0.1," the reference image 30-B must include circuit pattern regions 32 with a circularity in the range of "±0.1" relative to the circularity calculated from the circuit pattern recognition image 40-A.

[0130] Next, when the process proceeds to step S28, the image synthesis unit 143 superimposes the defect area image 50-A on the reference image 30-B based on the defect type positional relationship determination result table 136 to generate a synthesized image 70. The generated synthesized image 70 is, for example, the synthesized image 70-B shown in FIG. 1 . More specifically, the image synthesis unit 143 first acquires the circuit pattern recognition image 40-B corresponding to the reference image 30-B. Next, to perform an image comparison between the defect area image 50-A and the circuit pattern recognition image 40-B, the image synthesis unit 143 calculates the pixel centroid coordinates of the defect area 56 in the defect area image 50-A and the pixel centroid coordinates of each circuit pattern in the circuit pattern recognition image 40-B.

[0131] Next, the image synthesis unit 143 obtains the positional relationship determination result determined for the defect area image 50-A, the distance from the circuit center of gravity, and the distance to the outside of the circuit from the defect type positional relationship determination result table 136. Then, using the threshold information set in the synthesis position condition 141b of the image synthesis setting information 141 and the defect area image 50-A, it searches the circuit pattern recognition image 40-B for an image area that meets the threshold condition. When an image area that meets the condition is found, it superimposes the defect area image 50-A on the reference image 30-B to generate a synthesized image 70.

[0132] Next, when the process proceeds to step S30, the composite image acquisition unit 170 acquires the composite image 70 generated in step S28 and displays the composite image 70 on the composite image confirmation screen 203 (see FIG. 9 ) of the display unit 200. A user (e.g., a data scientist) can check the generated composite image 70 on the screen. This allows the defect classification server 100 to automatically generate a large number of learning data sets according to the type of appearance of the defect area 26 and the positional relationship between the circuit pattern areas 22. This can reduce the user's workload and shorten the processing time when the accuracy of the machine learning model deteriorates.

[0133] Second Embodiment Next, a defect classification device according to a second embodiment will be described. The configuration of the defect classification device according to the second embodiment is the same as that of the defect classification system 1 according to the first embodiment (see FIG. 10 ), except for the following points. In the description of this embodiment, parts corresponding to those in the other embodiments described above will be assigned the same reference numerals, and their description may be omitted.

[0134] FIG. 13 is a diagram showing specific examples of various images applied to the second embodiment. The learning image 20-A in FIG. 13 includes circuit pattern areas 22-A1 and 22-A2, similar to the image shown in FIG. 1. However, in FIG. 13, a portion of the circuit pattern area 22-A1 is missing, and the missing area becomes a defective area 26-A. A state in which a portion of a circuit pattern area is missing in this manner is called a "disconnection." In other words, the term "disconnection" in this specification is not limited to a circuit pattern area 22 that is completely disconnected, but also includes a circuit pattern area that is partially missing, as shown in FIG. 13.

[0135] The reference images 30-A and 30-B and the circuit pattern recognition images 40-A and 40-B in the second embodiment are the same as those shown in FIG. 1. The result of recognizing the defect area 26-A in FIG. 13 is shown as defect area image 50-A in FIG. 13. Like the image shown in FIG. 1, defect area image 50-A has a defect area 56-A and a background area 58-A. Here, the area of ​​a predetermined width surrounding defect area 56-A is called buffer area 57-A.

[0136] In the second embodiment, an area corresponding to the buffer area 57-A is cut out from the defective area 26-A to generate a cut-out image 60-A shown in Fig. 13. The cut-out image 60-A has a buffer area 66-A, which is the result of cutting out the defective area 26-A, and a surrounding background area 68-A.

[0137] In this embodiment, the composite image 70-B is obtained by superimposing the extracted image 60-A on the reference image 30-B (see FIG. 1). In the illustrated example, the composite image 70-B includes a pair of circuit pattern regions 72-B1 and 72-B2. Region 77-B corresponds to the buffer region 66-A of the extracted image 60-A. This results in the composite image 70-B in which a portion of the circuit pattern region 72-B1 is missing.

[0138] 14 is a flowchart showing an example of a processing routine executed by the defect classification server 100 in the second embodiment. In FIG. 14, steps S42 to S50 are the same as steps S12 to S20 in the processing of the first embodiment (see FIG. 12). That is, in step S42, the image acquisition unit 121 acquires a learning image 20-A and a corresponding reference image 30-A. Then, in step S44, the defect area extraction unit 122 generates a defect area image 50-A based on these acquired images.

[0139] Next, in step S46, the circuit pattern recognition image acquisition unit 132 acquires the circuit pattern recognition image 40-A and the defect type positional relationship definition information 131 (see FIG. 4). Next, in step S48, the label generation unit 133 executes label number generation processing. Next, in step S50, the label attribute information calculation unit 134 executes calculation processing of attribute information, etc.

[0140] Next, when the process proceeds to step S52, the defect type positional relationship determination unit 135 acquires the value of the defect type field 111d of the image management table 111 (see FIG. 2) for the learning image 20-A. Next, when the process proceeds to step S54, the defect type positional relationship determination unit 135 determines whether the defect type of the defective area 26 in the learning image 20-A is "disconnection." If the determination here is "No," the process of this routine ends. On the other hand, if the determination is "Yes," the process proceeds to step S56.

[0141] In step S56, the defect type positional relationship determination unit 135 acquires the position of a defect area 56-A, which is the position of a break in the circuit pattern area 42, based on the defect area image 50-A and the circuit pattern recognition image 40-A to which a label number has been assigned. The defect area 56-A can be acquired by a method similar to that used in step S22 of the first embodiment.

[0142] Next, when the process proceeds to step S58, the positional relationship acquisition unit 160 displays the determination result of the defect type positional relationship determination unit 135, i.e., the position of the defect area 56-A which is the disconnection position. That is, the positional relationship acquisition unit 160 acquires the defect type positional relationship determination result table 136 and displays its contents on the display unit 200 as a defect type positional relationship confirmation screen 202 (see FIG. 8 ).

[0143] Next, when the process proceeds to step S60, the image-to-be-combined acquisition unit 142 acquires a reference image 30-B for composition using the same method as in step S26 in the first embodiment. Next, when the process proceeds to step S62, the image-to-be-combined acquisition unit 142 generates a cropped image 60-A (see FIG. 13).

[0144] Next, when the process proceeds to step S64, the image composition unit 143 extracts candidate positions in the reference image 30-B where the extracted image 60-A should be composed, based on the defect type positional relationship determination result table 136. This extraction process may be performed by applying a method of comparing the defect area image 50-A with the circuit pattern recognition image 40-B, as in step S28 of the first embodiment. The image comparison conditions may be those set in the composition position conditions 141b of the image composition setting information 141.

[0145] Next, when the process proceeds to step S66, the image synthesis unit 143 superimposes the extracted image 60-A on the reference image 30-B to generate a synthesized image 70 (for example, a synthesized image 70-B). That is, the image synthesis unit 143 performs image correlation pattern matching on the extracted image 60-A and the reference image 30-B, targeting the position candidates extracted in step S64. Then, the extracted image 60-A is superimposed on the reference image 30-B with which there is a certain level of image correlation, to generate a synthesized image 70-B.

[0146] In the image correlation pattern matching described above, a pattern matching process is performed between the shape of the circuit pattern region 62 in the extracted image 60-A and the shape of the circuit pattern region 32 in the reference image 30-B. This makes it possible to synthesize images at the position of the circuit pattern region 32 whose shape is similar to that of the original training image 20-A. A specific method of image correlation pattern matching can be, for example, to set the image template size and image search area in advance and extract pixels with the highest image correlation. Furthermore, any algorithm may be used as long as it is a process for extracting pixel regions with similar shapes in two images.

[0147] Next, when the process proceeds to step S68, the composite image acquisition unit 170 acquires the composite image 70 generated in step S66 and displays the composite image 70 on the composite image confirmation screen 203 (see FIG. 9 ) of the display unit 200. This allows the defect classification server 100 to automatically generate a large number of learning data sets even when the defect type of the defect area 26 is "disconnection."

[0148] Third Embodiment Next, a defect classification device according to a third embodiment will be described. The configuration of the defect classification device according to the third embodiment is the same as that of the defect classification system 1 according to the first embodiment (see FIG. 10 ), except for the following points. In the description of this embodiment, parts corresponding to those of the other embodiments described above are given the same reference numerals, and their description may be omitted. Each image in this embodiment is the same as that in the first embodiment (see FIG. 1 ). However, in this embodiment, the circuit pattern region 22 in the training image 20 has a blurred periphery. As a result, the circuit pattern region 42 in the corresponding circuit pattern recognition image 40 also has a blurred periphery.

[0149] 15 is a flowchart showing an example of a processing routine executed by the defect classification server 100 in the third embodiment. In FIG. 15, steps S82 to S90 are the same as steps S12 to S20 in the processing of the first embodiment (see FIG. 12). That is, in step S82, the image acquisition unit 121 acquires a learning image 20-A and a corresponding reference image 30-A. Then, in step S84, the defect area extraction unit 122 generates a defect area image 50-A based on these acquired images.

[0150] Next, in step S86, the circuit pattern recognition image acquisition unit 132 acquires the circuit pattern recognition image 40-A and the defect type positional relationship definition information 131 (see FIG. 4). Next, in step S88, the label generation unit 133 executes label number generation processing. Next, in step S90, the label attribute information calculation unit 134 executes calculation processing of attribute information, etc.

[0151] Next, when the process proceeds to step S92, the image synthesis unit 143 applies an edge extraction filter to the circuit pattern recognition image 40-A to generate an edge image of the circuit pattern appearing in the circuit pattern recognition image 40-A. An algorithm used in general image processing may be applied to the edge extraction filter. The edge image extracted from the circuit pattern recognition image 40-A is called an "edge image 80-A (not shown)." The edge image 80-A includes an edge region 82-A (not shown) that indicates the shape of the circuit pattern region 42. The edge region 82-A is a narrow region that follows the outer edges of the circuit pattern regions 42-A1 and 42-A2 in FIG. 1.

[0152] Next, when the process proceeds to step S94, the image synthesis unit 143 performs image correlation pattern matching between the edge region 82-A of the edge image 80-A and the defect region image 50-A, and calculates an image correlation value in the edge region 82-A. A specific method of image correlation pattern matching can be, for example, to set the image template size and image search area in advance and extract pixels with the highest image correlation. Furthermore, any algorithm may be used as long as it is capable of extracting pixel regions with similar shapes in two images.

[0153] As described above, the defect area image 50-A is generated by the image difference between the learning image 20-A and the reference image 30-A. At this time, if the circuit pattern of the learning image 20-A appears blurred in the image, when the image difference with the reference image 30-A is calculated, the pixel values ​​of the circuit pattern are not canceled, and it is assumed that pixel information of the circuit pattern area 22 remains in the defect area image 50-A. Therefore, in step S94, to determine whether pixel information of the circuit pattern area 22 remains in the defect area image 50-A, image correlation pattern matching is performed between the edge area 82-A and the defect area image 50-A, and an image correlation value is calculated.

[0154] Next, when the process proceeds to step S96, the image synthesis unit 143 determines whether the calculated image correlation value is equal to or greater than a predetermined threshold value. If the determination is "Yes," the process proceeds to step S98, where the image synthesis unit 143 executes morphology processing. That is, if the image correlation value is equal to or greater than the threshold value, it is assumed that information about pixels of the circuit pattern region 22 remains in the defect region image 50-A, and therefore processing is performed to cancel the information about these pixels.

[0155] That is, the image synthesis unit 143 removes pixel information corresponding to a circuit pattern with blurred edges contained in the defect area image 50-A. As the morphology processing, it is preferable to apply a process of repeating contraction and expansion, as used in general image processing algorithms.

[0156] Next, when the process proceeds to step S100, the image synthesis unit 143 determines the image obtained by removing the pixel information of the circuit pattern from the original defect area image 50-A as a new defect area image 50-A. When the process of step S100 ends or the determination in step S96 is "No," the processes of steps S102 to S110 are executed. The processes of steps S102 to S110 are the same as the processes of steps S22 to S30 in the first embodiment.

[0157] That is, in step S102, the defect type positional relationship determination unit 135 performs processing to determine the positional relationship of the defect areas, and in step S104, the positional relationship acquisition unit 160 performs processing to display the determination result. Next, in step S106, the synthesis image acquisition unit 142 acquires the synthesis reference image 30-B, and in step S108, the image synthesis unit 143 generates the synthesis image 70. Then, in step S110, the synthesis image acquisition unit 170 displays the synthesis image 70 on the synthesis image confirmation screen 203 (see FIG. 9 ) of the display unit 200.

[0158] [Fourth Embodiment] Next, a defect classification device according to a fourth embodiment will be described. The configuration of the defect classification device according to the fourth embodiment is the same as that of the defect classification system 1 according to the first embodiment (see FIG. 10 ), except for the points described below. In the description of this embodiment, parts corresponding to those of the other embodiments described above are given the same reference numerals, and their description may be omitted. The fourth embodiment is intended to present the number of images for which data expansion is to be performed in accordance with the occurrence pattern of defect types that will occur in the future, by utilizing defect type occurrence frequencies collected in past semiconductor inspection lines.

[0159] FIG. 16 is a flowchart showing an example of a processing routine executed by the defect classification server 100 in the fourth embodiment. In FIG. 16, steps S122 to S134 are the same as steps S12 to S24 in the processing of the first embodiment (see FIG. 12). That is, in step S122, the image acquisition unit 121 acquires a learning image 20-A and a corresponding reference image 30-A. Then, in step S124, the defect area extraction unit 122 generates a defect area image 50-A based on these acquired images. Next, in step S126, the circuit pattern recognition image acquisition unit 132 acquires a circuit pattern recognition image 40-A and defect type positional relationship definition information 131 (see FIG. 4).

[0160] Next, in step S128, the label generation unit 133 executes label number generation processing. Next, in step S130, the label attribute information calculation unit 134 executes calculation processing of attribute information, etc. Next, when the processing proceeds to step S132, the defect type positional relationship determination unit 135 executes processing to determine the positional relationship of the defect areas. Next, when the processing proceeds to step S134, the positional relationship acquisition unit 160 executes processing to display the determination result. Next, when the processing proceeds to step S136, the defect type positional relationship determination unit 135 acquires the value of the defect type field 111d of the image management table 111 (see FIG. 2) for the learning image 20-A.

[0161] Next, when the process proceeds to step S138, the defect type positional relationship determination unit 135 refers to the defect type occurrence frequency information and acquires the occurrence frequency of the defect type in the learning image 20-A. Here, the defect type occurrence frequency information is assumed to be information obtained by aggregating defect type occurrence frequencies collected in past semiconductor inspection lines, and if this information is available, the occurrence frequency of defect types that occurred in the past for each defect type may be acquired from this information.

[0162] Next, when the process proceeds to step S140, the image-to-be-combined acquisition unit 142 acquires image composition setting information 141. Then, the image-to-be-combined acquisition unit 142 changes the threshold value stored in the reference image search condition 141a of the image composition setting information 141 in accordance with the occurrence frequency of the defect type acquired in step S138. Here, the explanation will be given using, as an example, "circuit num: threshold" indicating the threshold value for the number of circuit patterns in the reference image 30-B.

[0163] In the example shown in FIG. 6 , "circuit num: threshold" is set to "1." However, if the occurrence frequency of defect types in the learning image 20-A is high, it is preferable to enrich the learning data set by using as many reference images 30 as possible that capture various types of circuit pattern regions 32. Therefore, for example, it is possible to change "circuit num: threshold" to "2." By changing "circuit num: threshold" to "2," it is possible to search for reference images 30 in which the number of circuit pattern regions 32 is within a range of "±2" with respect to the number of circuit pattern regions 22 in the learning image 20-A. This makes it possible to broaden the candidates for the reference image 30-B to be searched.

[0164] When training a machine learning model, it is assumed that images required for training are prepared taking into consideration the distribution of defect type occurrence, such as by increasing the number of images that capture defect types with high occurrence frequencies. Therefore, by broadening the search candidates for the reference image 30, it becomes possible to generate many composite images 70. In addition to the above-mentioned "circuit num: threshold," i.e., the threshold value for the number of circuit pattern regions 32, similar change processing may also be performed on "aspect ratio: threshold," which indicates the threshold value for the aspect ratio of the circuit pattern, and "circularity: threshold," which indicates the threshold value for the circularity of the circuit pattern.

[0165] Next, when the process proceeds to step S142, the image-to-be-combined acquisition unit 142 acquires a reference image 30-B to be used for composition based on the changed threshold value in the same manner as in step S26 in the first embodiment. Next, in steps S144 and S146, the same processes as in steps S28 and S30 in the first embodiment (see FIG. 12) are executed. That is, in step S144, the image composition unit 143 generates a composite image 70. Then, in step S146, the composite image acquisition unit 170 displays the composite image 70 on the composite image confirmation screen 203 (see FIG. 9) of the display unit 200.

[0166] [Effects of the Embodiments] According to the above-described respective embodiments, the defect classification device (100) includes a defect type determination unit 130 that determines the positional relationship between the circuit pattern area 22 and the defect area 26, and an image synthesis unit 143 that generates a synthetic image 70 by synthesizing the defect area image 50 and the second reference image (30-B) based on the positional relationship, wherein the first reference image (30-A) is an image obtained by imaging a first semiconductor wafer, and the second reference image (30-B) is an image obtained by imaging a second semiconductor wafer different from the first semiconductor wafer.

[0167] This allows for appropriate defect classification. Specifically, the synthetic image 70 can be automatically generated based on the type of appearance of the defect area 26 in the training image 20 and its positional relationship with the circuit pattern area 22, thereby automatically generating an appropriate training dataset. This automatically generated training dataset allows for appropriate defect classification. Furthermore, this reduces the workload and shortens the processing time required when the accuracy of the training dataset deteriorates. In other words, the embodiments allow for rapid processing to address deterioration in machine learning accuracy even in situations where it is not possible to capture many images required for machine learning, such as on a high-mix, low-volume production line.

[0168] Furthermore, it is more preferable that the defect-type determination unit 130 obtains a first determination result as to whether or not the circuit pattern area 22 contacts the defect area 26 based on the circuit pattern recognition image 40 and the defect area image 50, and, if the first determination result is positive, obtains a second determination result as to whether or not the defect area 26 is contained in the circuit pattern area 22. This allows the positional relationship between the circuit pattern area 22 and the defect area 26 to be classified more appropriately.

[0169] Furthermore, it is more preferable that the defect-type determination unit 130 acquires the orientation of the circuit pattern area 22 and the number of circuit pattern areas 22 that contact the defect area 26. This allows the positional relationship between the circuit pattern area 22 and the defect area 26 to be more appropriately classified based on the orientation of the circuit pattern area 22 and the number of circuit pattern areas 22 that contact the defect area 26.

[0170] Furthermore, it is more preferable that the defect-type determination unit 130 acquires the distance between the center of gravity of each circuit pattern area 22 and the center of gravity of the defect area 26 based on the shape of each circuit pattern area 22. This makes it possible to more appropriately classify the positional relationship between the circuit pattern area 22 and the defect area 26 based on the distance between the center of gravity of the circuit pattern area 22 and the center of gravity of the defect area 26.

[0171] It is more preferable to further include a positional relationship acquisition unit 160 that displays a defect type positional relationship confirmation screen 202 indicating the positional relationship on the display unit 200. This allows the user to visually grasp the positional relationship between the circuit pattern area 22 and the defect area 26.

[0172] Furthermore, the second reference image (30-B) includes one or more circuit pattern areas (32-B1, 32-B2) in the second reference image, and the composite image 70 includes circuit pattern areas (72-B1, 72-B2) in the composite image corresponding to the circuit pattern areas (32-B1, 32-B2) in the second reference image, and a defect area (76-B) in the composite image corresponding to the defect area 26.It is more preferable that the image synthesis unit 143 determines the positional relationship between the circuit pattern areas (72-B1, 72-B2) in the composite image 70 and the defect area (76-B) in the composite image based on the positional relationship between the circuit pattern area 22 in the learning image 20 and the defect area 26.

[0173] This allows the positional relationship between the circuit pattern area (72-B1, 72-B2) in the composite image 70 and the defect area (76-B) in the composite image to be made similar to the positional relationship between the circuit pattern area 22 and the defect area 26 in the training image 20.

[0174] [Modifications] The present invention is not limited to the above-described embodiment, and various modifications are possible. The above-described embodiment is provided as an example to facilitate understanding of the present invention, and is not necessarily limited to an embodiment including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to delete part of the configuration of each embodiment, or to add or replace other configurations. Furthermore, the control lines and information lines shown in the figures are those considered necessary for explanation, and do not necessarily represent all control lines and information lines necessary for the product. In reality, it is possible to consider that almost all components are interconnected. Possible modifications of the above-described embodiment include, for example, the following.

[0175] (1) Since the hardware of the defect classification server 100 in the above embodiment can be realized by a general computer, the processes corresponding to the above-mentioned block diagrams and flowcharts, as well as programs that execute the various processes described above, may be stored on a storage medium (a computer-readable storage medium on which a program is recorded) or distributed via a transmission path.

[0176] (2) In the above embodiment, the processes corresponding to the block diagrams and flowcharts, as well as the various other processes described above, are described as software processes using a program. However, some or all of these processes may be replaced with hardware processes using an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array), etc.

[0177] (3) The various processes executed in the above embodiment may be executed by a server computer via a network (not shown), and the various data stored in the above embodiment may also be stored in the server computer.

[0178] 20 Learning image 22 Circuit pattern area 26 Defect area 30-A Reference image (first reference image) 30-B Reference image (second reference image) 32-A1, 32-A2 Circuit pattern area (circuit pattern area in first reference image) 32-B1, 32-B2 Circuit pattern area (circuit pattern area in second reference image) 40 Circuit pattern recognition image 42-A1, 42-A2 Circuit pattern area (circuit pattern area in circuit pattern recognition image) 50 Defect area image 56 Defect area (defect area in defect area image) 70 Composite image 72-B1, 72-B2 Circuit pattern area (circuit pattern area in composite image) 76-B Defect area (defect area in composite image) 100 Defect classification server (defect classification device, computer) 120 Defect area image creation unit (defect area image creation process) 130 Defect type determination unit (defect type determination process) 143 Image synthesis unit (image synthesis process) 160 Positional relationship acquisition unit (positional relationship acquisition process) 200 Display unit 202 Defect type positional relationship confirmation screen

Claims

1. A defect classification device comprising: a defect area image creation unit that generates a defect area image including a defect area within a defect area image corresponding to the defect area based on the difference between a learning image obtained by capturing an inspection area including one or more circuit pattern areas and a defect area, and a first reference image including a circuit pattern area within the first reference image; a defect type determination unit that determines the positional relationship between the circuit pattern area and the defect area based on the defect area image and a circuit pattern recognition image including a circuit pattern area within a circuit pattern recognition image corresponding to the circuit pattern area within the first reference image; and an image synthesis unit that generates a synthesized image by synthesizing the defect area image with a second reference image based on the positional relationship, wherein the first reference image is an image obtained by capturing an image of a first semiconductor wafer, and the second reference image is an image obtained by capturing an image of a second semiconductor wafer different from the first semiconductor wafer.

2. The defect classification device according to claim 1, characterized in that the defect type determination unit obtains a first determination result as to whether or not the circuit pattern area is in contact with the defect area based on the circuit pattern recognition image and the defect area image, and if the first determination result is positive, obtains a second determination result as to whether or not the defect area is contained in the circuit pattern area.

3. The defect classification device according to claim 1, characterized in that the defect type determination unit acquires the direction of the circuit pattern area and the number of circuit pattern areas that contact the defect area.

4. The defect classification device according to claim 1, characterized in that the defect type determination unit acquires the distance between the center of gravity of each of the circuit pattern areas and the center of gravity of the defect area based on the shape of each of the circuit pattern areas.

5. The defect classification device according to claim 1, further comprising a positional relationship acquisition unit that displays a defect type positional relationship confirmation screen showing the positional relationship on a display unit.

6. The defect classification device described in claim 2, characterized in that: the second reference image includes one or more circuit pattern areas in the second reference image; the composite image includes circuit pattern areas in the composite image corresponding to the circuit pattern areas in the second reference image and defect areas in the composite image corresponding to the defect areas; and the image synthesis unit determines the positional relationship between the circuit pattern areas in the composite image and the defect areas in the composite image based on the positional relationship between the circuit pattern areas in the learning image and the defect areas.

7. A defect classification method comprising causing a computer to execute the following steps: a defect area image creation step of generating a defect area image including a defect area within a defect area image corresponding to the defect area based on the difference between a learning image obtained by photographing an inspection area including one or more circuit pattern areas and a defect area, and a first reference image including a circuit pattern area within the first reference image; a defect type determination step of determining the positional relationship between the circuit pattern area and the defect area based on the defect area image and a circuit pattern recognition image including a circuit pattern area within a circuit pattern recognition image corresponding to the circuit pattern area within the first reference image; and an image synthesis step of generating a synthesized image by synthesizing the defect area image with a second reference image based on the positional relationship, wherein the first reference image is an image obtained by photographing a first semiconductor wafer, and the second reference image is an image obtained by photographing a second semiconductor wafer different from the first semiconductor wafer.

8. The defect classification method according to claim 7, characterized in that the defect type determination process is a process of obtaining a first determination result as to whether or not the circuit pattern area is in contact with the defect area based on the circuit pattern recognition image and the defect area image, and, if the first determination result is positive, obtaining a second determination result as to whether or not the defect area is contained in the circuit pattern area.

9. The defect classification method according to claim 7, wherein the defect type determination process further includes acquiring the orientation of the circuit pattern area and the number of circuit pattern areas that contact the defect area.

10. The defect classification method according to claim 7, characterized in that the defect type determination process further comprises a process of obtaining the distance between the center of gravity of each of the circuit pattern areas and the center of gravity of the defect area based on the shape of each of the circuit pattern areas.

11. The defect classification method according to claim 7, further comprising causing the computer to execute a positional relationship acquisition step of displaying a defect type positional relationship confirmation screen showing the positional relationship on a display unit.

12. The defect classification method described in claim 8, characterized in that: the second reference image includes one or more circuit pattern areas in the second reference image; the composite image includes circuit pattern areas in the composite image corresponding to the circuit pattern areas in the second reference image and defect areas in the composite image corresponding to the defect areas; and the image synthesis process is a process of determining the positional relationship between the circuit pattern areas in the composite image and the defect areas in the composite image based on the positional relationship between the circuit pattern areas in the learning image and the defect areas.

Images