Light detection device and electronic apparatus

Abstract

The present invention provides a light detection device capable of facilitating the formation of a contact electrode with respect to a charge storage region. Specifically, the light detection device is provided with: a semiconductor layer which is formed on the surface of a semiconductor substrate and has a first region, a second region, and a third region; a gate electrode which surrounds the periphery of the first region of the semiconductor layer with a gate insulating film being interposed therebetween; and a charge storage region which is formed in at least a part of the second region of the semiconductor layer and stores the charge transferred by a channel. The second region has a protruding portion that protrudes further outward than the outer peripheries of the first region and the third region. In addition, an insulation layer is disposed between the gate electrode and the protruding portion so as to surround the periphery of the third region of the semiconductor layer and so as to be in contact with the gate electrode and the protruding portion. The thickness of a portion of the insulating layer in the normal direction of the surface, the portion being located between the gate electrode and the protruding portion, is greater than the thickness of a portion of the gate insulating film in a direction parallel to the surface, the portion being located between the first region and the gate electrode.

Description

Photodetector and electronic equipment

[0001] The present technology (technology according to the present disclosure) relates to a light detection device and an electronic device.

[0002] Conventionally, for example, a photodetector has been proposed that includes a plurality of photoelectric conversion units formed on a semiconductor substrate, a pixel isolation structure surrounding each of the photoelectric conversion units, a charge accumulation region (floating diffusion) disposed in the region surrounded by the pixel isolation structure, an insulating material, and a gate electrode (see, for example, Patent Document 1). In the photodetector described in Patent Document 1, the insulating material surrounds the charge accumulation region on three sides, and the gate electrode is positioned between the insulating material and the photoelectric conversion units in the thickness direction of the semiconductor substrate. Then, for example, when a predetermined voltage is applied to the gate electrode, a channel is formed that linearly connects the photoelectric conversion units to the charge accumulation regions, making the charge transfer path linear and improving the charge transfer efficiency.

[0003] International Publication No. 2023 / 017650

[0004] However, in the photodetection device described in Patent Document 1, the charge storage region is formed within an area surrounded by a pixel isolation structure of a semiconductor substrate. Therefore, for example, as pixels become increasingly miniaturized, the charge storage region becomes smaller, which may make it difficult to form a contact electrode for the charge storage region.

[0005] An object of the present disclosure is to provide a photodetector and an electronic device that can facilitate the formation of a contact electrode for a charge accumulation region.

[0006] The photodetector according to the present disclosure includes: (a) a semiconductor substrate having a first surface that is a light-receiving surface and a second surface opposite to the first surface; (b) a plurality of photoelectric conversion units formed in a two-dimensional array on the semiconductor substrate; (c) a semiconductor layer formed on the second surface so as to overlap with each of the regions of the semiconductor substrate in which the photoelectric conversion units are formed when viewed from the normal direction of the second surface; and (d) a semiconductor layer having a first region that is a region on the semiconductor substrate side of the semiconductor layer, a second region that is a region opposite to the semiconductor substrate side, and a third region that is a region between the first and second regions, the semiconductor layer having a first region that is a region on the semiconductor substrate side, a second region that is a region on the opposite side to the semiconductor substrate side, and a third region that is a region between the first and second regions, the first region being surrounded by a gate insulating film and a channel that transfers charges generated in the photoelectric conversion units being formed in the first and second regions. (e) a gate electrode that can be formed in the third region; and (f) a charge storage region that is formed in at least a part of the second region and that stores charges transferred through the channel, (f) the second region has a protruding portion that protrudes outward beyond the outer periphery of the first region and the third region when viewed from the normal direction of the second surface of the semiconductor substrate, (g) further comprising an insulating layer stacked between the gate electrode and the protruding portion so as to surround the periphery of the third region, and (h) the thickness of the portion of the insulating layer between the gate electrode and the protruding portion in the direction normal to the second surface is greater than the thickness of the portion of the gate insulating film between the first region and the gate electrode in a direction parallel to the second surface.

[0007] The electronic device of the present disclosure includes: (a) a semiconductor substrate having a first surface that is a light-receiving surface and a second surface opposite to the first surface; (b) a plurality of photoelectric conversion units formed in a two-dimensional array on the semiconductor substrate; (c) a semiconductor layer formed on the second surface so as to overlap with each of the regions of the semiconductor substrate in which the photoelectric conversion units are formed when viewed from the normal direction of the second surface; (d) a first region that is a region on the semiconductor substrate side of the semiconductor layer; (e) a second region that is a region on the opposite side to the semiconductor substrate side; and (f) a channel that surrounds the periphery of the first region via a gate insulating film and transfers charges generated in the photoelectric conversion units to the first region and the third region. (f) a gate electrode capable of forming a channel; and (f) a charge accumulation region formed in at least a part of the second region and accumulating charges transferred through the channel, wherein the second region has a protruding portion that protrudes outward beyond the outer peripheries of the first region and the third region when viewed from the normal direction of the second surface of the semiconductor substrate, (g) further comprising an insulating layer stacked between the gate electrode and the protruding portion so as to surround the periphery of the third region, and (h) a photodetector in which the thickness of the portion of the insulating layer between the gate electrode and the protruding portion in the direction normal to the second surface is greater than the thickness of the portion of the gate insulating film between the first region and the gate electrode in a direction parallel to the second surface.

[0008] 1 is a diagram showing the overall configuration of a solid-state imaging device according to a first embodiment. FIG. 2 is a diagram showing the circuit configuration of a pixel. FIG. 3 is a diagram showing the cross-sectional configuration of the solid-state imaging device when cut along line A-A in FIG. 1. FIG. 4 is a diagram showing the cross-sectional configuration of the solid-state imaging device when cut along line B-B in FIG. 3. FIG. 5 is a diagram showing the cross-sectional configuration of the solid-state imaging device when cut along line CC in FIG. 3. FIG. 6 is a diagram showing the cross-sectional configuration of the solid-state imaging device when cut along line D-D in FIG. 3. FIG. 7 is a diagram showing the overall configuration of a solid-state imaging device according to a comparative example. FIG. 8 is a diagram showing a method for manufacturing a first substrate. FIG. 9 is a diagram showing a method for manufacturing a first substrate. FIG. 10 is a diagram showing a method for manufacturing a first substrate. FIG. 11 is a diagram showing a method for manufacturing a first substrate. FIG. 12 is a diagram showing a method for manufacturing a first substrate. FIG. 13 is a diagram showing a method for manufacturing a first substrate. FIG. 14 is a diagram showing a method for manufacturing a first substrate. FIG. 15 is a diagram showing a method for manufacturing a first substrate. FIG. 2 is a block diagram showing an example of the functional configuration of a camera head and a CCU.

[0009] Examples of a photodetector and an electronic device according to an embodiment of the present disclosure will be described below with reference to FIGS. 1 to 25. The embodiments of the present disclosure will be described in the following order. Note that the present disclosure is not limited to the following examples. Furthermore, the effects described in this specification are examples and are not limiting, and other effects may also be present.

[0010] 1. First embodiment: solid-state imaging device 1-1 Overall configuration of solid-state imaging device 1-2 Pixel circuit configuration 1-3 Configuration of main parts 1-4 Method for manufacturing first substrate 1-5 Modifications 2. Second embodiment: Application example to electronic device 3. Third embodiment: Application example to moving body 4. Fourth embodiment: Application example to endoscopic surgery system

[0011] 1. First Embodiment 1-1 Overall Configuration of Solid-State Imaging Device A solid-state imaging device 1 (or, more broadly, a "photodetector") according to a first embodiment of the present disclosure will be described. FIG. 1 is a diagram illustrating the overall configuration of the solid-state imaging device 1 according to the first embodiment. The solid-state imaging device 1 of FIG. 1 is a back-illuminated CMOS (Complementary Metal Oxide Semiconductor) image sensor. As shown in FIG. 25, the solid-state imaging device 1 (photodetector 103) captures image light (incident light) from a subject via an optical system 102, converts the amount of incident light focused on the imaging surface into an electrical signal on a pixel-by-pixel basis, and outputs the electrical signal as a pixel signal. As shown in FIG. 1, the solid-state imaging device 1 includes a pixel region 2, a vertical drive circuit 3, a column signal processing circuit 4, a horizontal drive circuit 5, an output circuit 6, and a control circuit 7.

[0012] The pixel region 2 has a plurality of pixels 8 arranged in a two-dimensional array. Each pixel 8 has a photoelectric conversion unit 12 shown in FIGS. 2 and 3 and a plurality of pixel transistors. The pixel transistors may include, for example, a transfer transistor 13, a reset transistor 14, an amplification transistor 15, and a selection transistor 16 (see FIG. 2). The vertical drive circuit 3 is configured, for example, by a shift register, and sequentially outputs a selection pulse φSEL (see FIG. 2) to pixel drive wiring 9 to sequentially select each pixel 8 in the pixel region 2 row by row, and outputs pixel signals of the selected pixels 8 to the column signal processing circuit 4 through vertical signal lines 10. The pixel signals are signals obtained from charges generated in the photoelectric conversion units 12.

[0013] The column signal processing circuit 4 is arranged, for example, for each column of pixels 8, and performs signal processing for each pixel column on pixel signals output from one row of pixels 8. For example, correlated double sampling (CDS) for removing fixed pattern noise specific to pixels and analog-to-digital (AD) conversion can be used as the signal processing. The horizontal drive circuit 5 is configured, for example, with a shift register, and sequentially outputs horizontal scanning pulses to the column signal processing circuits 4, selects each column signal processing circuit 4 in turn, and causes the selected column signal processing circuit 4 to output the processed pixel signal to the horizontal signal line 11.

[0014] The output circuit 6 performs signal processing on pixel signals sequentially output from each of the column signal processing circuits 4 via the horizontal signal line 11, and outputs the processed signals. Examples of signal processing that can be used include various types of digital signal processing, such as buffering, black level adjustment, and column variation correction. The control circuit 7 generates clock signals and control signals that serve as references for the operations of the vertical drive circuit 3, the column signal processing circuit 4, the horizontal drive circuit 5, etc., based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock signal (not shown). The control circuit 7 then outputs the generated clock signals and control signals to the vertical drive circuit 3, the column signal processing circuit 4, the horizontal drive circuit 5, etc.

[0015] [1-2 Pixel Circuit Configuration] Next, the circuit configuration of the pixel 8 will be described. FIG. 2 is a diagram showing the circuit configuration of the pixel 8. As shown in FIG. 2, the pixel 8 has a photoelectric conversion unit 12, four pixel transistors (a transfer transistor 13, a reset transistor 14, an amplification transistor 15, and a selection transistor 16), and a floating diffusion (hereinafter also referred to as "FD 17"; broadly speaking, a "charge accumulation region"). The transfer transistor 13, the reset transistor 14, the amplification transistor 15, and the selection transistor 16 may be, for example, n-channel MOS transistors. The FD 17 is a charge storage unit that stores charges (e.g., electrons) generated in the photoelectric conversion unit 12. For example, an n-type semiconductor region formed by ion-implantation of n-type impurities at a high concentration may be used. The pixel 8 also has pixel drive wiring 9, such as a transfer line 18, a reset line 19, and a selection line 20, which are shared by each pixel 8 in the same row. One end of each of the transfer line 18, reset line 19, and selection line 20 is connected to the vertical drive circuit 3. The photoelectric conversion unit 12 has an anode electrode electrically connected to a supply source of a predetermined potential (e.g., ground), and a cathode electrode connected to the gate electrode of the amplification transistor 15 via the transfer transistor 13. The photoelectric conversion unit 12 generates electric charges according to the amount of received light.

[0016] The transfer transistor 13 is connected between the cathode electrode of the photoelectric conversion unit 12 and the FD 17. A transfer pulse φTRF that is active at a high level (e.g., Vdd) (hereinafter also referred to as "high active") is applied to the gate electrode of the transfer transistor 13 via a transfer line 18. When the transfer pulse φTRF is applied to the gate electrode, the transfer transistor 13 is turned on and transfers the charge accumulated in the photoelectric conversion unit 12 to the FD 17. The drain electrode of the reset transistor 14 is connected to the pixel power supply Vdd, and the source electrode is connected to the FD 17. A high active reset pulse φRST is applied to the gate electrode of the reset transistor 14 via a reset line 19 before the transfer transistor 13 transfers the charge from the photoelectric conversion unit 12 to the FD 17. When the reset pulse φRST is applied to the gate electrode, the reset transistor 14 is turned on and discards the charge accumulated in the FD 17 to the pixel power supply Vdd, resetting the FD 17.

[0017] The amplifier transistor 15 has a gate electrode connected to the FD 17 and a drain electrode connected to a pixel power supply Vdd. After being reset, the amplifier transistor 15 outputs, as a pixel signal, a signal corresponding to the potential of the FD 17 after the transfer transistor 13 transfers the charge. The selection transistor 16 has a drain electrode connected to the source electrode of the amplifier transistor 15 and a source electrode connected to a vertical signal line 10. A high active selection pulse φSEL is applied to the gate electrode of the selection transistor 16 via a selection line 20. When the selection pulse φSEL is applied to the gate electrode, the selection transistor 16 is turned on and outputs the pixel signal output from the amplifier transistor 15 to the vertical signal line 10.

[0018] [1-3 Configuration of Main Components] Next, the detailed structure of the solid-state imaging device 1 will be described. FIG. 3 is a cross-sectional view of the solid-state imaging device 1 taken along line A-A in FIG. 1. As shown in FIG. 3, the solid-state imaging device 1 is configured by stacking a first substrate 100 and a second substrate 200 in this order from the light-receiving surface side (the bottom side in FIG. 3) of the solid-state imaging device 1. The first substrate 100 includes a photoelectric conversion unit 12, a transfer transistor 13, and an FD 17 that accumulates the charge transferred by the transfer transistor 13. The second substrate 200 includes pixel transistors that read out the charge held in the FD 17 and a logic circuit that processes pixel signals obtained from the read-out charge. Examples of the pixel transistors that read out the charge include a reset transistor 14, an amplification transistor 15, and a selection transistor 16 (see FIG. 2). Examples of the logic circuit include a vertical drive circuit 3, a column signal processing circuit 4, a horizontal drive circuit 5, an output circuit 6, and a control circuit 7 (see FIG. 1). Furthermore, a color filter 21 and a microlens 22 are laminated in this order on the light-receiving surface (hereinafter also referred to as the "rear surface S1") side of the first substrate 100. Fig. 3 illustrates an example in which a color filter 21 and a microlens 22 are arranged for each photoelectric conversion unit 12.

[0019] Next, the detailed structure of the first substrate 100 will be described. As shown in FIG. 3 , the first substrate 100 is configured by stacking a semiconductor substrate 23, an insulating film 24, and a planarization film 25 in this order from the second substrate 200 side. A wiring layer 26 is disposed on the surface of the semiconductor substrate 23 facing the second substrate 200 (hereinafter also referred to as "surface S2"). The semiconductor substrate 23 is configured, for example, of a silicon (Si) substrate. A photoelectric conversion unit 12 is formed in each pixel 8 region on the semiconductor substrate 23. That is, a plurality of photoelectric conversion units 12 are arranged in a two-dimensional array on the semiconductor substrate 23. The photoelectric conversion unit 12 includes a well region 12a of a first conductivity type (e.g., p-type) and a second conductivity type region 12b of a second conductivity type (opposite to the first conductivity type, e.g., n-type) that forms a pn junction with the well region 12a. The well region 12a is formed continuously over the entire sidewall surface S3 of the trench portion 27 (described below), the entire light-receiving surface of the element region 28 (described below), and the entire surface S2 of the element region 28. The second-conductivity-type region 12b is formed in a region toward the center of the element region 28 so as to contact the well region 12a. The photoelectric conversion unit 12 forms a photodiode PD by a pn junction between the well region 12a and the second-conductivity-type region 12b, and generates charges (e.g., electrons) according to the amount of light received. The photoelectric conversion unit 12 also accumulates the charges generated by photoelectric conversion.

[0020] Furthermore, trench portions 27 are formed in the semiconductor substrate 23 in all regions between adjacent photoelectric conversion portions 12. That is, the trench portions 27 are formed in a lattice pattern so as to surround each photoelectric conversion portion 12. The trench portions 27 penetrate from the light-receiving surface (hereinafter also referred to as the "back surface S4"; broadly, the "first surface") of the semiconductor substrate 23 to the surface opposite the back surface S4 (front surface S2; broadly, the "second surface"). As shown in FIGS. 3 and 4 , the trench portions 27 form a pixel isolation structure that divides the semiconductor substrate 23 into multiple regions (hereinafter also referred to as "device regions 28"). The photoelectric conversion portions 12 can be said to be formed within the device regions 28. FIG. 4 is a cross-sectional view of the solid-state imaging device 1 taken along line B-B in FIG. 3 . The device region 28 is cubic, with sidewall surfaces S3 on the trench portion 27 side on all four sides.

[0021] 3 , a semiconductor layer 29 is formed on the surface S2 of the element region 28 so as to protrude into the interlayer insulating film 46 of the wiring layer 26. When viewed from the normal direction (upward in FIG. 3 ) of the surface S2 of the semiconductor substrate 23, the semiconductor layer 29 is formed at a position overlapping the center of the element region 28 so as to overlap each region of the semiconductor substrate 23 in which the photoelectric conversion unit 12 is formed (element region 28). The semiconductor layer 29 is an epitaxial layer formed by epitaxially growing a semiconductor crystal. FIG. 3 illustrates a case in which the semiconductor layer 29 is formed in a cylindrical shape extending along the thickness direction of the wiring layer 26 (up-down direction in FIG. 3 ), and the portion (end) on the second substrate 200 side has a larger diameter than the portion on the semiconductor substrate 23 side. The semiconductor layer 29 includes a region on the semiconductor substrate 23 side (hereinafter also referred to as the "first region 30"), a region on the opposite side from the semiconductor substrate side (hereinafter also referred to as the "second region 31"), and a region between the first region 30 and the second region 31 (hereinafter also referred to as the "third region 32"). Here, the second region 31 corresponds to the expanded diameter portion of the semiconductor layer 29 (the portion on the second substrate 200 side), and the first region 30 and the third region 32 correspond to the non-expanded diameter portion. That is, when viewed from the normal direction of the surface S2 of the semiconductor substrate 23, the second region 31 has a protruding portion 33 that protrudes outward beyond the outer peripheries of the first region 30 and the third region 32.

[0022] The first region 30 and the third region 32 are doped with impurities of the first conductivity type (p-type), similar to the well region 12a. As shown in FIGS. 3 and 5, a gate electrode 35 is formed around the first region 30, surrounding the first region 30 with an insulating film 34 interposed therebetween. FIG. 5 is a cross-sectional view of the solid-state imaging device 1 taken along line CC in FIG. 3. The insulating film 34 is a thermal oxide film formed on a portion of the periphery of the first region 30 facing the gate electrode 35. The gate electrode 35 is stacked on the surface S2 of the semiconductor substrate 23 with insulating films 36 and 37 interposed therebetween. The insulating film 36 is a thermal oxide film formed on the surface S2 of the element region 28. Silicon nitride (SiN), for example, can be used as the material for the insulating film 37. The gate electrode 35 is a cylindrical electrode with flat end faces, with the first region 30 of the semiconductor layer 29 positioned in the hole. This results in a gate-all-around transfer transistor 13 having the first region 30 and the third region 32 as channel formation regions, the insulating film 34 as a gate insulating film, and a gate electrode 35 surrounding the entire periphery of the channel formation region via the gate insulating film. When a predetermined voltage is applied to the gate electrode 35, it forms a channel in the first region 30 and the third region 32 that transfers charges generated in the photoelectric conversion unit 12. The gate electrode 35 can be made of, for example, polysilicon (Poly-Si).

[0023] The gate electrode 35 is electrically connected to a wiring 39 of the wiring layer 26 via a contact electrode 38 extending along the thickness direction of the wiring layer 26, and is electrically connected to the transfer line 18 (see FIG. 2) via the wiring 39. The end of the contact electrode 38 on the gate electrode 35 side is electrically connected to the surface of the gate electrode 35 facing the second substrate 200 (i.e., the surface farther from the semiconductor substrate 23; hereinafter, also referred to as "surface S5"). The outer surface (side and top surfaces in FIG. 3) of the gate electrode 35 is covered with an insulating film 40. In addition to the outer surface of the gate electrode 35, the insulating film 40 also continuously covers the outer surface (side and top surfaces in FIG. 3) of the insulating layer 45 (described below), the outer surface (side and top surfaces in FIG. 3) of the FD 17, and the surface of the insulating film 37 facing the second substrate 200 (hereinafter, also referred to as "surface S6"). Silicon oxide (SiO2) can be used as a material for the insulating film 40, for example. An opening 41 exposing the surface S6 of the gate electrode 35 is formed in the insulating film 40 at a portion thereof that corresponds to the surface S6 of the gate electrode 35. The gate electrode 35 and the contact electrode 38 are electrically connected to each other through the opening 41.

[0024] With the above configuration, when charges are transferred from the photoelectric conversion unit 12 to the FD 17, the transfer line 18 applies a predetermined voltage (e.g., Vdd) to the gate electrode 35 via the contact electrode 38. When the predetermined voltage is applied to the gate electrode 35, the transfer transistor 13 forms a potential-modulated region (channel) between the photoelectric conversion unit 12 and the FD 17 (the first region 30 and the third region 32 of the semiconductor layer 29; a channel formation region). This allows a transfer path to be formed that vertically transfers charges (e.g., electrons) generated in the photoelectric conversion unit 12 from the photoelectric conversion unit 12 to the FD 17, linearizing the charge transfer path and improving charge transfer efficiency. Note that when the predetermined voltage is not applied to the gate electrode 35, the transfer transistor 13 does not form a potential-modulated region, and therefore no charge transfer path is formed.

[0025] Furthermore, the second region 31 of the semiconductor layer 29 is doped with impurities of the second conductivity type (n-type) to form the FD 17. The FD 17 is formed in at least a portion of the second region 31. FIG. 3 illustrates an example in which the FD 17 is formed throughout the entire second region 31. The FD 17 accumulates charges transferred from the photoelectric conversion unit 12 to the FD 17 (charges transferred through a channel formed by the gate electrode 35). The FD 17 is electrically connected to a wiring 43 of the wiring layer 26 via a contact electrode 42 extending along the thickness direction of the wiring layer 26 (i.e., the normal direction to the surface S2), and is electrically connected to a pixel transistor (e.g., the gate electrode of the amplification transistor 15 (see FIG. 2)) via the wiring 43. The end of the contact electrode 42 on the FD 17 side is electrically connected to the surface of the FD 17 facing the second substrate 200 (i.e., the surface farther from the semiconductor substrate 23; hereinafter, also referred to as "surface S7"). The outer surfaces of the FD 17 (side surfaces and top and bottom surfaces in FIG. 3 ) are covered with an insulating film 40. An opening 44 exposing the surface S7 of the FD 17 is formed in the insulating film 40 at a portion of the surface S7. The FD 17 and the contact electrode 42 are electrically connected through the opening 44.

[0026] 3 and 6, an insulating layer 45 is formed around the third region 32 so as to surround the periphery of the third region 32. FIG. 6 is a diagram showing the cross-sectional configuration of the solid-state imaging device 1 when cut along line D-D in FIG. 3. The insulating layer 45 is laminated between the gate electrode 35 and the protruding portion 33 of the second region 31 so as to contact the gate electrode 35 and the protruding portion 33. The insulating layer 45 is a cylindrical insulating layer with flat end faces, with the third region 32 of the semiconductor layer 29 located in the hole. As a result, the insulating layer 45 functions as a spacer for maintaining a certain distance between the gate electrode 35 and the FD 17. Furthermore, the thickness t1 (i.e., the spacer thickness t1) of the insulating layer 45 in the direction normal to the surface S2 (the vertical direction in FIG. 3 ) at the portion between the gate electrode 35 and the protruding portion 33 is greater than the thickness t2 of the insulating film 34 in the direction parallel to the surface S2 (the horizontal direction in FIG. 3 ) at the portion between the first region 30 and the gate electrode 35. This reduces the effect of the electric field of the gate electrode 35 on the FD 17, thereby preventing deterioration of dark current characteristics. The thickness t1 of the insulating layer 45 is set to a value large enough to prevent the electric field of the gate electrode 35 from affecting the FD 17. For example, the thickness t1 is set to 50 nm or more and 100 nm or less. The thickness t2 of the insulating film 34 in the direction parallel to the surface S2 is set to 2 nm or more and 10 nm or less. The insulating layer 45 may be made of, for example, silicon nitride (SiN).

[0027] The insulating film 24 is disposed on the rear surface S4 side of the semiconductor substrate 23 and continuously covers the entire rear surface S4 and the inside of the trench portion 27. The planarizing film 25 is disposed on the rear surface S1 side of the insulating film 24 and continuously covers the rear surface S1 so that the rear surface S1 of the first substrate 100 is flat. Examples of materials that can be used for the insulating film 24 and the planarizing film 25 include silicon oxide (SiO2) and silicon nitride (SiN). The wiring layer 26 includes an interlayer insulating film 46 and multiple stacked wirings 39 and 43 with the interlayer insulating film 46 interposed therebetween.

[0028] In the solid-state imaging device 1 having the above configuration, light is incident from the rear surface S4 of the semiconductor substrate 23, passes through the microlenses 22, and undergoes photoelectric conversion in the photoelectric conversion unit 12 to generate charges (e.g., electrons). The generated charges are then output as pixel signals from the vertical signal lines 10 (see FIGS. 1 and 2 ) formed by the wiring of the wiring layer 26. Consider, for example, a case in which the FD 17, gate electrode 35, and insulating layer 45 are arranged within the element region 28, as shown in FIG. 7 (hereinafter also referred to as a “comparative example”). In this comparative example, the insulating layer 45 further surrounds the FD 17 on three sides, and the gate electrode 35 is positioned between the insulating layer 45 and the photoelectric conversion unit 12 in the thickness direction of the semiconductor substrate 23 (the vertical direction in FIG. 7 ). In the configuration of this comparative example, because the FD 17 is formed within the element region 28, for example, as the pixel 8 becomes smaller, the element region 28 becomes smaller, and the FD 17 becomes smaller, which may make it difficult to form the contact electrode 42 for the FD 17. Furthermore, it may be difficult to form the transfer transistor 13 itself (the gate structure itself). Furthermore, in the semiconductor device according to the comparative example, the insulating layer 45 is formed by forming a groove by etch-back in the location where the insulating layer 45 is to be formed and filling the formed groove with an insulating material. Therefore, variations in the depth of the groove may occur, which may cause variations in the distance between the FD 17 and the gate electrode 35. Therefore, the FD white dots may vary within a wafer and between wafers.

[0029] In contrast, in the solid-state imaging device 1 according to this embodiment, the FD 17 is formed in a semiconductor layer 29 formed on the surface S2 of the semiconductor substrate 23. That is, because the FD 17 is formed outside the semiconductor substrate 23 (in the semiconductor layer 29), for example, when the pixel 8 is miniaturized and the region surrounded by the trench portion 27 (the element region 28) becomes smaller, the FD 17 does not need to be reduced in size. That is, the reduction in size of the FD 17 that accompanies miniaturization of the pixel 8 can be suppressed. This facilitates the formation of a contact electrode 42 for the FD 17 (charge accumulation region). Furthermore, in the solid-state imaging device 1 according to this embodiment, the transfer transistor 13 is a gate-all-around transfer transistor in which the gate electrode 35 surrounds the entire periphery of the first region 30 (the channel formation region), thereby improving the efficiency of charge transfer from the photoelectric conversion unit 12 to the FD 17. Furthermore, the solid-state imaging device 1 according to this embodiment is configured to include an insulating layer 45 laminated between the gate electrode 35 and the protruding portion 33 (FD17) so as to be in contact with the gate electrode 35 and the protruding portion 33 (FD17). Therefore, the variation in the distance between the gate electrode 35 and the FD17 can be suppressed to the same extent as the variation in the film formation of the insulating layer 45, and fluctuations in FD white spots can be suppressed.

[0030] [1-4 Manufacturing Method of First Substrate] Next, a method for manufacturing the first substrate 100 will be described. First, as shown in FIG. 8 , a semiconductor substrate 23 on which a photoelectric conversion section 12 and an insulating film 36 (thermal oxide film) are formed is prepared. A pixel isolation structure (including a trench section 27 and an insulating film 24) is formed in the semiconductor substrate 23. Next, as shown in FIG. 9 , an insulating film 37, a middle-layer insulating film 47, and an upper-layer insulating film 48 for forming the insulating layer 45 (see FIG. 3 ) are formed in this order on the surface S2 of the semiconductor substrate 23. Silicon nitride (SiN), for example, can be used as the material for the insulating film 37 and the upper-layer insulating film 48. Silicon oxide (SiO 2 ), for example, can be used as the material for the middle-layer insulating film 47. Next, as shown in FIG. 10 , through-holes 49 for forming the semiconductor layer 29 (see FIG. 3 ) are formed in the insulating films 36, 37, middle-layer insulating film 47, and upper-layer insulating film 48. This exposes the surface S2 of the semiconductor substrate 23 (element region 28) at the bottom of the through-hole 49. Subsequently, as shown in FIG. 11, a semiconductor layer 29 is formed by epitaxially growing a semiconductor crystal on the exposed surface S2 of the semiconductor substrate 23 (device region 28).

[0031] Next, etching or the like is performed to process a portion of the upper insulating film 48, as shown in FIG. 12, to form an insulating layer 45. Next, etching or the like is performed to completely remove the middle insulating film 47, as shown in FIG. 13. Next, as shown in FIG. 14, the peripheral surface (side surface in FIG. 14) of the first region 30 of the semiconductor layer 29 is thermally oxidized to form an insulating film 34 (thermal oxide film). At this time, the outer surface (side surface and top surface in FIG. 14) of the second region 31 is also thermally oxidized to form an insulating film 50 (thermal oxide film). Note that the insulating film 50 is not shown in FIG. 3. Next, a gate material 51 for forming the gate electrode 35 (see FIG. 3) is deposited over the entire surface S2 of the semiconductor substrate 23 (including the semiconductor layer 29, etc.). Polysilicon (Poly-Si), for example, can be used as the gate material 51. Next, as shown in FIG. 15, etch-back is performed to process the film made of the gate material 51, thereby forming the gate electrode 35. In this manner, the gate electrode 35 is formed by replacing the intermediate insulating film 47 with the gate material 51 .

[0032] Next, as shown in FIG. 16 , ions of n-type impurities are implanted, etc., to form the FD 17 in the second region 31 of the semiconductor layer 29. Next, an insulating film 40 is formed on the entire surface S2 side of the semiconductor substrate 23 (including the semiconductor layer 29, etc.). Silicon oxide (SiO2), for example, can be used as a material for the insulating film 40. Next, as shown in FIG. 17 , an interlayer insulating film 46 for the wiring layer 26 is formed on the entire surface S2 side of the semiconductor substrate 23 (including the semiconductor layer 29, etc.). Next, as shown in FIG. 18 , contact electrodes 38, 42 and wirings 39, 43 are formed. This forms the transfer transistor 13 shown in FIG. 3 , in which the gate electrode 35, insulating layer 45, and FD 17 are arranged in series in this order on the surface S2 of the semiconductor substrate 23.

[0033] [1-5 Modifications] (1) Although the present embodiment illustrates an example in which only the well region 12a is located in the portion of the device region 28 on the surface S2 side, other configurations may also be employed. For example, as shown in FIG. 19 , a device isolation region (STI) 52 for isolating pixel transistors and the like may be provided in the portion of the device region 28 on the surface S2 side. FIG. 19 illustrates an example in which the device isolation region 52 is formed around the interface between the first region 30 and the device region 28 and overlaps with the gate electrode 35 when viewed from the normal direction of the surface S2 of the semiconductor substrate 23. The device isolation region 52 may be made of, for example, a silicon oxide (SiO2) film.

[0034] (2) Although the present embodiment illustrates an example in which the planar shape of the gate electrode 35 is a hollow circle and the contact electrode 38 is electrically connected to the surface S5 (the hollow circle portion) of the gate electrode 35, other configurations may also be employed. For example, as shown in FIG. 20 , the planar shape of the gate electrode 35 may be a hollow circle portion 35a and a protrusion 35b protruding radially from the portion 35a, with the contact electrode 38 (see FIG. 3 ) electrically connected to the protrusion 35b. This allows for a larger distance between the contact electrode 38 (see FIG. 3 ) of the gate electrode 35 and the contact electrode 42 of the FD 17. FIG. 20 illustrates an example in which the protrusion 35b is rectangular when viewed from the normal direction of the surface S2. FIG. 20 is a diagram illustrating a cross-sectional configuration of the solid-state imaging device 1 according to Modification (2), taken along the line CC in FIG. 3 .

[0035] (3) Furthermore, the present technology can be applied to photodetection devices in general, including distance measurement sensors that measure distance, also known as time-of-flight (ToF) sensors, in addition to the solid-state imaging device 1 as the image sensor described above. A distance measurement sensor emits light toward an object, detects the light reflected from the surface of the object, and calculates the distance to the object based on the time of flight between when the light is emitted and when the reflected light is received. The light-receiving pixel structure of this distance measurement sensor can employ the structure of pixel 8 described above.

[0036] 2. Second Embodiment The above-described photodetector device (for example, the solid-state imaging device 1) can be applied to various electronic devices, such as imaging systems such as digital still cameras and digital video cameras, mobile phones with imaging functions, and other devices with imaging functions.

[0037] Fig. 21 is a block diagram showing an example of the configuration of an electronic device. As shown in Fig. 21, an electronic device 101 includes an optical system 102, a photodetector 103 (e.g., a solid-state image sensor 1), and a DSP (Digital Signal Processor) 104. The DSP 104, a display device 105, an operation system 106, a memory 108, a recording device 109, and a power supply system 110 are connected via a bus 107, and the electronic device 101 is capable of capturing still images and moving images.

[0038] The optical system 102 is configured with one or more lenses, and guides image light (incident light) from a subject to the photodetector 103, forming an image on the light-receiving surface (sensor portion) of the photodetector 103. As the photodetector 103, a photodetector having any of the configuration examples described above (for example, the solid-state imaging device 1) is applied. Electrons are accumulated in the photodetector 103 for a certain period of time in accordance with the image formed on the light-receiving surface via the optical system 102. A signal corresponding to the electrons accumulated in the photodetector 103 is then supplied to the DSP 104.

[0039] The DSP 104 performs various signal processing on the signal from the photodetector 103 to acquire an image, and temporarily stores the image data in the memory 108. The image data stored in the memory 108 is recorded in the recording device 109 or supplied to the display device 105 to display the image. In addition, the operation system 106 accepts various operations by the user and supplies operation signals to each block of the electronic device 101, and the power supply system 110 supplies the power necessary to drive each block of the electronic device 101.

[0040] 3. Third Embodiment The above-described photodetector device (for example, the solid-state imaging device 1) may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0041] FIG. 22 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0042] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 22, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0043] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0044] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0045] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0046] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0047] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0048] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0049] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0050] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0051] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 22, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0052] FIG. 23 is a diagram showing an example of the installation position of the imaging unit 12031.

[0053] In FIG. 23, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0054] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0055] 23 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0056] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0057] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0058] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0059] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0060] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 and the like among the configurations described above. Specifically, the solid-state imaging device 1 of FIG. 1 can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, pixels can be made finer and a captured image that is easier to see can be obtained, thereby reducing driver fatigue.

[0061] 4. Fourth Embodiment Furthermore, the above-described light detection device (for example, the solid-state imaging device 1), and the technology according to the present disclosure may be applied to an endoscopic surgery system, for example.

[0062] FIG. 24 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0063] 24 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0064] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0065] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0066] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0067] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0068] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0069] The light source device 11203 is composed of a light source such as an LED (light emitting diode), and supplies irradiation light to the endoscope 11100 when photographing the surgical site, etc.

[0070] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0071] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0072] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0073] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0074] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissue (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0075] FIG. 25 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0076] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0077] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0078] The imaging unit 11402 may include one imaging element (a so-called single-chip type) or multiple imaging elements (a so-called multi-chip type). When the imaging unit 11402 is configured as a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to a 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured as a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0079] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0080] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0081] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0082] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0083] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0084] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0085] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0086] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0087] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0088] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0089] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0090] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0091] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0092] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the endoscope 11100, the camera head 11102 (the imaging unit 11402), the CCU 11201 (the image processing unit 11412), and the like, among the above-described configurations. Specifically, the solid-state imaging device 1 in FIG. 1 can be applied to the imaging unit 10402. By applying the technology according to the present disclosure to the endoscope 11100 and the like, pixels can be made finer, enabling clearer images of the surgical site to be obtained, thereby enabling the surgeon to reliably confirm the surgical site.

[0093] Although an endoscopic surgery system has been described as an example here, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0094] The present technology can also be configured as follows: (1) A semiconductor substrate having a first surface that is a light-receiving surface and a second surface opposite to the first surface, a plurality of photoelectric conversion units formed in a two-dimensional array on the semiconductor substrate, a semiconductor layer formed on the second surface so as to overlap with regions of the semiconductor substrate in which the photoelectric conversion units are formed when viewed from a direction normal to the second surface, a gate electrode that surrounds the periphery of the first region, among a first region that is a region on the semiconductor substrate side of the semiconductor layer, a second region that is a region opposite to the semiconductor substrate side, and a third region that is a region between the first region and the second region, via a gate insulating film, and is capable of forming a channel in the first region and the third region for transferring charge generated in the photoelectric conversion units, and a charge accumulation region formed in at least a part of the second region and for accumulating charge transferred in the channel, wherein the second region has a protruding portion that protrudes outward beyond the outer peripheries of the first region and the third region when viewed from a direction normal to the second surface of the semiconductor substrate, The photodetector further includes an insulating layer laminated between the gate electrode and the protruding portion so as to surround the third region, wherein a thickness of a portion of the insulating layer between the gate electrode and the protruding portion in a direction normal to the second surface is greater than a thickness of a portion of the gate insulating film between the first region and the gate electrode in a direction parallel to the second surface. (2) The photodetector according to (1), wherein the insulating layer is a cylindrical insulating layer with flat end faces, and the third region of the semiconductor layer is located in a hole. (3) The photodetector according to (1) or (2), further includes a contact electrode electrically connected to a surface of the charge accumulation region farther from the semiconductor substrate and extending along a direction normal to the second surface of the semiconductor substrate. (4) The photodetector according to (1) or (2), wherein the gate electrode is a cylindrical electrode with flat end faces, and the first region of the semiconductor layer is located in a hole. (5) The photodetector according to (4), further comprising: a contact electrode electrically connected to a surface of the gate electrode farther from the semiconductor substrate and extending along a direction normal to the second surface of the semiconductor substrate. (6) The photodetector according to (1), further comprising: an epitaxial layer;(7) The photodetector according to (1), wherein the charge accumulation region is formed over the entire area of ​​the second region. (8) The photodetector according to (1), wherein the insulating layer is laminated between the gate electrode and the protruding portion so as to be in contact with the gate electrode and the protruding portion. (9) The photodetector according to (1), wherein the photodetector includes: a semiconductor substrate having a first surface that is a light-receiving surface and a second surface opposite to the first surface; a plurality of photoelectric conversion units formed in a two-dimensional array on the semiconductor substrate; a semiconductor layer formed on the second surface so as to overlap with each of the regions of the semiconductor substrate in which the photoelectric conversion units are formed when viewed from a normal direction of the second surface; a first region that is a region on the semiconductor substrate side of the semiconductor layer; a second region that is a region opposite to the semiconductor substrate side; and a third region that is a region between the first region and the second region, wherein the first region is surrounded by a gate insulating film, and channels for transferring charges generated in the photoelectric conversion units can be formed in the first region and the third region. and a charge accumulation region formed in at least a part of the second region and configured to accumulate charges transferred through the channel, wherein the second region has a protruding portion that protrudes outward beyond outer peripheries of the first region and the third region when viewed in a direction normal to the second surface of the semiconductor substrate, and further comprises an insulating layer stacked between the gate electrode and the protruding portion so as to surround the periphery of the third region, wherein a thickness of a portion of the insulating layer between the gate electrode and the protruding portion in a direction normal to the second surface is greater than a thickness of a portion of the gate insulating film between the first region and the gate electrode in a direction parallel to the second surface.

[0095] 1...solid-state imaging device, 2...pixel region, 3...vertical drive circuit, 4...column signal processing circuit, 5...horizontal drive circuit, 6...output circuit, 7...control circuit, 8...pixel, 9...pixel drive wiring, 10...vertical signal line, 11...horizontal signal line, 12...photoelectric conversion section, 12a...well region, 12b...second conductivity type region, 13...transfer transistor, 14...reset transistor, 15...amplifying transistor, 16...selection transistor, 17...FD, 18...transfer line, 19...reset line, 20...selection line, 21...color filter, 22...microlens, 23...semiconductor substrate, 24...insulating film, 25...planarization film , 26...wiring layer, 27...trench portion, 28...element region, 29...semiconductor layer, 30...first region, 31...second region, 32...third region, 33...extending portion, 34...insulating film, 35...gate electrode, 35a...hollow circular portion, 35b...protruding portion, 36, 37...insulating film, 38...contact electrode, 39...wiring, 40...insulating film, 41...opening, 42...contact electrode, 43...wiring, 44...opening, 45...insulating layer, 46...interlayer insulating film, 47...middle layer insulating film, 48...upper layer insulating film, 49...through hole, 50...insulating film, 51...gate material, 52...element isolation region, 100...first substrate, 200...second substrate

Claims

1. A semiconductor substrate having a first surface that is a light-receiving surface and a second surface opposite to the first surface; a plurality of photoelectric conversion units formed in a two-dimensional array on the semiconductor substrate; a semiconductor layer formed on the second surface so as to overlap with each of the regions of the semiconductor substrate in which the photoelectric conversion units are formed, when viewed from a direction normal to the second surface; a gate electrode surrounding the periphery of the first region, which is a region of the semiconductor layer on the semiconductor substrate side, a second region which is a region opposite to the semiconductor substrate side, and a third region which is a region between the first region and the second region, via a gate insulating film, and capable of forming a channel in the first region and the third region for transferring charge generated in the photoelectric conversion units; and a charge accumulation region formed in at least a part of the second region and for storing charge transferred in the channel; the second region has a protruding portion that protrudes outward beyond the peripheries of the first region and the third region when viewed from a direction normal to the second surface of the semiconductor substrate; and an insulating layer stacked between the gate electrode and the protruding portion so as to surround the periphery of the third region. a thickness of the insulating layer in a direction normal to the second surface at a portion between the gate electrode and the protruding portion is greater than a thickness of the gate insulating film in a direction parallel to the second surface at a portion between the first region and the gate electrode.

2. The photodetector according to claim 1, wherein the insulating layer is a cylindrical insulating layer with flat end faces, in which the third region of the semiconductor layer is located in a hole.

3. The photodetector according to claim 1, further comprising a contact electrode electrically connected to the surface of the charge accumulation region farther from the semiconductor substrate and extending along the normal direction of the second surface of the semiconductor substrate.

4. The photodetector according to claim 1, wherein the gate electrode is a cylindrical electrode with flat end faces, in which the first region of the semiconductor layer is located in a hole.

5. The photodetector according to claim 4, further comprising a contact electrode electrically connected to a surface of the gate electrode farther from the semiconductor substrate and extending along a normal direction of the second surface of the semiconductor substrate.

6. The photodetector device according to claim 1, wherein the semiconductor layer is an epitaxial layer.

7. The photodetector according to claim 1, wherein the charge accumulation region is formed over the entire second region.

8. The photodetector according to claim 1, wherein the insulating layer is laminated between the gate electrode and the protruding portion so as to be in contact with the gate electrode and the protruding portion.

9. A semiconductor substrate having a first surface that is a light receiving surface and a second surface opposite to the first surface; a plurality of photoelectric conversion units formed in a two-dimensional array on the semiconductor substrate; a semiconductor layer formed on the second surface so as to overlap with each of the regions of the semiconductor substrate in which the photoelectric conversion units are formed when viewed from a normal direction of the second surface; a first region that is a region of the semiconductor layer on the semiconductor substrate side; a second region that is a region opposite to the semiconductor substrate side; and a third region that is a region between the first region and the second region, the first region being surrounded via a gate insulating film, and channels for transferring charges generated in the photoelectric conversion units being able to be formed in the first region and the third region. and a charge accumulation region formed in at least a part of the second region and configured to accumulate charges transferred through the channel, wherein the second region has a protruding portion that protrudes outward beyond outer peripheries of the first region and the third region when viewed in a direction normal to the second surface of the semiconductor substrate, and further comprises an insulating layer stacked between the gate electrode and the protruding portion so as to surround the periphery of the third region, wherein a thickness of a portion of the insulating layer between the gate electrode and the protruding portion in a direction normal to the second surface is greater than a thickness of a portion of the gate insulating film between the first region and the gate electrode in a direction parallel to the second surface.

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