Electrically manipulated optical quantum systems
The integration of lattice defects in a semiconductor diode with a reverse-bias electric field addresses inefficiencies in quantum emitters by tuning photon emission and reducing noise, enabling efficient and stable quantum information transfer for scalable applications.
Patent Information
- Application Number
- PCT/US2024/053594
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-04-19
- Filing Date
- 2024-10-30
- Publication Date
- 2025-12-18
AI Technical Summary
Existing lattice defect quantum emitters in solids are limited by intrinsic solid-state qualities, environmental noise, and scalability issues, leading to inefficient photon emission and signal loss due to phonon interactions and charge noise, making large-scale integration challenging.
An optical quantum system is developed with lattice defects embedded between p-doped and n-doped regions of a semiconductor diode, utilizing a reverse-bias electric field to tune photon emission and reduce charge noise, enabling efficient and stable quantum information transfer.
The system achieves deterministic and manipulable emission of de-excitation photons, enhancing quantum information processing by narrowing linewidth, controlling frequency, and reducing environmental interference, facilitating scalable integration with other devices.
Smart Images

Figure US2024053594_18122025_PF_FP_ABST
Abstract
Description
ELECTRICALLY MANIPULATED OPTICAL QUANTUM SYSTEMSCROSS-REFERENCE TO RELATED APPLICATIONS
[0001] The present application claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 595,682, filed November 2, 2023, and U.S. Provisional Patent Application No. 63 / 636,525, filed April 19, 2024, the disclosures of which are incorporated herein in their entirety by reference thereto.STATEMENT OF GOVERNMENT INTEREST
[0002] This invention was made with government support under 2025158 awarded by National Science Foundation (NSF). The government has certain rights in this invention.TECHNICAL FIELD
[0003] This invention relates to quantum systems, and more particularly to transferring a quantum state through electrically manipulated optical devices.BACKGROUND
[0004] Quantum emitters can be used to transfer and store quantum information, for example, in quantum computing. Quantum emitters are quantum systems that emit photons in the process of transitioning between quantum states. These emitted photons can carry quantum information of the system. The relationship between the quantum emitter and the emitted photons allows for the processing and storage of the system’s quantum information.
[0005] Lattice defects in solids, such as substitutional carbon atoms bonded to an interstitial silicon atom (sometimes referred to as “G centers”) or similar defects also bonded with a hydrogen atom (sometimes referred to as “T centers”), can be used as quantum emitters for numerous applications, including quantum information processing and storage. These defects, sometimes referred to as “color centers,” act as quantum emitters, for example when excited by some external source. Upon exposure to excitation energy, such as a laser, the lattice defect is elevated to a higher energy state and releases de-excitation photons as it relaxes to a lowerenergy state. These photons can carry the quantum information of the lattice defect to other systems, such as a measurement device or another quantum device.SUMMARY
[0006] According to some embodiments, an apparatus, comprising: a substrate having an upper surface; a p-doped region of the substrate; an n-doped region of the substrate, wherein at least one plane parallel to the substrate upper surface overlaps both the n-doped region and the p-doped region; and at least one quantum emitter in the substrate located between the p-doped region and the n-doped region.
[0007] In some embodiments, the at least one plane parallel to the substrate upper surface bisects the p-doped region and the n-doped region.
[0008] In some embodiments, the substrate comprises silicon.
[0009] In some embodiments, the at least one quantum emitter comprises a G center.
[0010] In some embodiments, the at least one quantum emitter comprises a T center.
[0011] In some embodiments, the p-doped region comprises boron-doped silicon, and the n-doped region comprises phosphorus-doped silicon.
[0012] In some embodiments, a first electrical contact is coupled to the p-doped region, and a second electrical contact is coupled to the n-doped region.
[0013] In some embodiments, a voltage source is coupled to the first electrical contact and the second electrical contact.
[0014] In some embodiments, a positive terminal of the voltage source is coupled to the second electrical contact, and a negative terminal of the voltage source is coupled to the first electrical contact.
[0015] In some embodiments, a waveguide is located above the upper surface of the substrate.
[0016] In some embodiments, a source of excitation energy is configured to excite the at least one quantum emitter.
[0017] In some embodiments, the source of excitation energy is a laser.
[0018] In some embodiments, an optical readout system is configured to read the state of the at least one quantum emitter.
[0019] In some embodiments, the substrate further comprises a second p-doped region, a second n-doped region, and an at least one additional quantum emitter in the substrate located between the second p-doped region and the second n-doped region.
[0020] In some embodiments, at least one plane parallel to the substrate upper surface overlaps both the second p-doped region and the second n-doped region.
[0021] According to some embodiments, an apparatus, comprising: a substrate having an upper surface; a p-doped region of the substrate; an n-doped region of the substrate, wherein no line perpendicular to the substrate upper surface overlaps both the n-doped region and the p-doped region; and at least one quantum emitter located between the p-doped region and the n-doped region.
[0022] In some embodiments, at least one plane parallel to the substrate upper surface overlaps both the p-doped region and the n-doped region.
[0023] In some embodiments, the at least one plane parallel to the substrate upper surface bisects the p-doped region and the n-doped region.
[0024] In some embodiments, no plane parallel to the substrate upper surface intersects both the p-doped region and the n-doped region.
[0025] In some embodiments, the substrate comprises silicon.
[0026] In some embodiments, the at least one quantum emitter comprises a G center.
[0027] In some embodiments, the at least one quantum emitter comprises a T center.
[0028] In some embodiments, the p-doped region comprises boron-doped silicon, and the n-doped region comprises phosphorus-doped silicon.
[0029] In some embodiments, a first electrical contact is coupled to the p-doped region, and a second electrical contact is coupled to the n-doped region.
[0030] In some embodiments, a voltage source is coupled to the first electrical contact and the second electrical contact.
[0031] In some embodiments, a positive terminal of the voltage source is coupled to the second electrical contact, and a negative terminal of the voltage source is coupled to the first electrical contact.
[0032] In some embodiments, a waveguide is located above the substrate upper surface.
[0033] In some embodiments, a source of excitation energy is configured to excite the at least one quantum emitter.
[0034] In some embodiments, the source of excitation energy is a laser.
[0035] In some embodiments, an optical readout system is configured to read the state of the at least one quantum emitter.
[0036] In some embodiments, the substrate further comprises: a second p-doped region, a second n-doped region, and at least one additional quantum emitter in the substrate located between the second p-doped region and the second n-doped region.
[0037] In some embodiments, no line perpendicular to the substrate upper surface overlaps both the second p-doped region and the second n-doped region.
[0038] According to some embodiments, a method, comprising: applying a reverse-bias electric field to at least one quantum emitter in a substrate, the at least one quantum emitter located between a p-doped region of the substrate and an n-doped region of the substrate, wherein applying the reverse bias comprises: applying a positive voltage to the n-doped region; and applying a negative voltage to the p-doped region, wherein at least one plane parallel to an upper surface of the substrate overlaps with both the p-doped region and the n-doped region.
[0039] In some embodiments, the at least one plane parallel to the substrate upper surface bisects both the p-doped region and the n-doped region.
[0040] In some embodiments, the substrate comprises silicon.
[0041] In some embodiments, the at least one quantum emitter comprises a G center.
[0042] In some embodiments, the at least one quantum emitter comprises a T center.
[0043] In some embodiments, the p-doped region comprises boron-doped silicon, and the n-doped region comprises phosphorus-doped silicon.
[0044] In some embodiments, the applying the negative voltage to the p-doped region further comprises applying the negative voltage through a first electrical contact coupled to the p-doped region, and the applying the positive voltage to the n-doped region further comprises applying the positive voltage through a second electrical contact coupled to the n-doped region.
[0045] In some embodiments, the applying the negative voltage to the p-doped region further comprises coupling a negative terminal of a voltage source to the first electrical contact, and the applying the positive voltage to the n-doped region further comprises coupling a positive terminal of a voltage source to the second electrical contact.
[0046] In some embodiments, receiving the photons emitted by the at least one lattice defect with a waveguide.
[0047] In some embodiments, exciting the at least one quantum emitter with a source of excitation energy.
[0048] In some embodiments, the source of excitation energy is a laser.
[0049] In some embodiments, recording photon emission by the at least one quantum emitter with a readout system.
[0050] In some embodiments, the substrate further comprises: a second p-doped region of the substrate, a second n-doped region of the substrate, at least one additional quantum emitter located between the second p-doped region and the second n-doped region; and the method further comprises: applying a positive voltage to the second n-doped region and applying a negative voltage to the second p-doped region.
[0051] In some embodiments, at least one plane parallel to the upper surface of the substrate overlaps the second p-doped region and the second n-doped region.
[0052] According to some embodiments, a method comprising: applying a reverse-bias electric field to at least one quantum emitter in a substrate, the at least one quantum emitter located between a p-doped region of the substrate and an n-doped region of the substrate, wherein the applying the reverse-bias electric field comprises: applying a positive voltage to the n-doped region, and applying a negative voltage to the p-doped region, wherein no line perpendicular to an upper surface of the substrate intersects both the p-doped region and the n- doped region.
[0053] In some embodiments, at least one plane parallel to the substrate upper surface intersects the p-doped region and the n-doped region.
[0054] In some embodiments, the at least one plane parallel to the substrate upper surface bisects the p-doped region and the n-doped region.
[0055] In some embodiments, no plane parallel to the substrate upper surface intersects the p-doped region and the n-doped region.
[0056] In some embodiments, the substrate comprises silicon.
[0057] In some embodiments, the at least one quantum emitter comprises a G center.
[0058] In some embodiments, the at least one quantum emitter comprises a T center.
[0059] In some embodiments, the p-doped region comprises boron-doped silicon, and the n-doped region comprises phosphorus-doped silicon.
[0060] In some embodiments, the applying the negative voltage to the p-doped region further comprises applying the negative voltage through a first electrical contact coupled to the p-doped region, and the applying the positive voltage to the n-doped region further comprises applying the positive voltage through a second electrical contact coupled to the n-doped region.
[0061] In some embodiments, the applying the negative voltage to the p-doped region further comprises coupling a negative terminal of a voltage source to the first electrical contact,and the applying the positive voltage to the n-doped region further comprises coupling a positive terminal of a voltage source to the second electrical contact.
[0062] In some embodiments, receiving photons emitted by the at least one quantum emitter with a waveguide.
[0063] In some embodiments, exciting the at least one quantum emitter with a source of excitation energy.
[0064] In some embodiments, the source of excitation energy is a laser.
[0065] In some embodiments, recording photon emission by the at least one quantum emitter with a readout system.
[0066] In some embodiments, the substrate further comprises: a second p-doped region of the substrate, a second n-doped region of the substrate, and at least one additional quantum emitter is located between the second p-doped region and the second n-doped region; and the method further comprises: applying a positive voltage to the second n-doped region, and applying a negative voltage to the second p-doped region.
[0067] In some embodiments, no line perpendicular to the upper surface of the substrate intersects both the second p-doped region and the second n-doped region.
[0068] According to some embodiments, a method, comprising: forming a p-doped region in a first location within a substrate, the substrate comprising an upper surface; forming an n- doped region in a second location within the substrate, wherein at least one plane parallel to the substrate upper surface overlaps both the p-doped region and the n-doped region; and forming an at least one quantum emitter in a third location within the substrate, wherein the third location is between the first location and the second location.
[0069] In some embodiments, forming the at least one quantum emitter within the substrate before forming the p-doped region or n-doped region.
[0070] In some embodiments, forming the p-doped region and n-doped region before forming the at least one quantum emitter.
[0071] In some embodiments, forming the at least one quantum emitter comprises implanting carbon within the substrate to form a G center.
[0072] In some embodiments, implanting hydrogen within the substrate to form a T center.
[0073] In some embodiments, the substrate comprises silicon.
[0074] In some embodiments, the forming a p-doped region comprises implanting boron through an aperture of a lithographic mask.
[0075] In some embodiments, the forming an n-doped region comprises implanting phosphorus through an aperture of a lithographic mask.
[0076] In some embodiments, forming electrical contacts coupled to the p-doped region and the n-doped region using metal evaporation.
[0077] In some embodiments, wire bonding to the electrical contacts.
[0078] According to some embodiments, a method, comprising: forming a p-doped region in a first location within a substrate, the substrate comprising an upper surface; forming an n- doped region in a second location within the substrate, wherein no line perpendicular to the substrate upper surface intersects both the p-doped region and the n-doped region; forming an at least one quantum emitter in a third location within the substrate, wherein the third location is between the first location and the second location.
[0079] In some embodiments, forming the p-doped region and the n-doped region before forming the at least one quantum emitter.
[0080] In some embodiments, forming the at least one quantum emitter before forming the p-doped region or the n-doped region.
[0081] In some embodiments, forming the at least one quantum emitter comprises implanting carbon within the substrate to form a G center.
[0082] In some embodiments, implanting hydrogen within the substrate to form a T center.
[0083] In some embodiments, the substrate comprises silicon.
[0084] In some embodiments, forming a p-doped region comprises implanting boron through an aperture in a lithographic mask.
[0085] In some embodiments, forming an n-doped region comprises implanting phosphorous through an aperture in a lithographic mask.
[0086] In some embodiments, forming electrical contacts coupled to the p-doped region and the n-doped region using metal evaporation.
[0087] In some embodiments, wire bonding to the electrical contacts.
[0088] These and other capabilities of the disclosed subject matter will be more fully understood after a review of the following figures, detailed description, and claims. It is to be understood that the phraseology and terminology employed herein are for the purposes of descriptions and should not be regarded as limiting.BRIEF DESCRIPTION OF THE FIGURES
[0089] Various objectives, features, and advantages of the disclosed subject matter can be more fully appreciated with reference to the following detailed description of the disclosed subject matter when considered in connection with the following drawings, in which like reference numerals identify like elements:
[0090] FIGs. 1 A-1I are graphical and pictorial representations of example integrated lattice defect and semiconductor diode systems, according to some embodiments of the present disclosure.
[0091] FIG. 2A is a graphical representation of an optical excitation of an example implementation, according to some embodiments of the present disclosure.
[0092] FIG. 2B is a graph of a measured fluorescence curve, measured from an example implementation, according to some embodiments of the present disclosure.
[0093] FIGs. 3A-3B are graphical representations of the effect of a reverse bias on a semiconductor diode, according to some embodiments of the present disclosure.
[0094] FIG. 3C is a graph of measured current-voltage (IV) curves, measured from an example implementation of a semiconductor diode under reverse bias, according to some embodiments of the present disclosure.
[0095] FIG. 3D is a graph of measured leakage current, measured from an example implementation of a semiconductor diode under reverse bias, according to some embodiments of the present disclosure.
[0096] FIGs. 4A-4C are graphs showing example measured effects of a reverse bias on the emission of de-excitation photons and silicon-free excitons by an example implementation, according to some embodiments of the present disclosure.
[0097] FIGs. 5A-5C are pictorial representations of luminescence and photocurrent measured from an example implementation under reverse biases swept from 0 to -200 V, according to some embodiments of the present disclosure.
[0098] FIGs. 6A-6D are a pictorial representation of an example implementation, graphs showing measurements of photon intensity by photon wavelength at two regions of the example implementation under reverse biases, and a graph showing measurements of photon wavelength redshift at the depletion region of the example implementation under reverse biases, according to some embodiments of the present disclosure.
[0099] FIG. 7 is a graphical representation of the effect of a reverse bias field on an example system, according to some embodiments of the present disclosure.
[0100] FIGs. 8A-8B are flow charts showing methods of manufacturing an integrated lattice defect and semiconductor diode system, according to some embodiments of the present disclosure.
[0101] FIGs. 9A-9H are pictorial representations of steps in a process for manufacturing an example embodiment of an integrated lattice defect and semiconductor diode system, according to some embodiments of the present disclosure.DESCRIPTION
[0102] Lattice defects in solids have emerged as a useful quantum memory platform. G and T centers are lattice defects in commonly used silicon substrates that can be used as quantum emitters. Integration of silicon lattice defects with other optical, electrical, or quantum devices can leverage existing scalable device engineering and manufacturing techniques in silicon. Electronic control of quantum memories can yield benefits in the integration of those devices within a larger information system. In addition, electronic control allows fine-tuning of emitter characteristics, which is useful for quantum operations. These include control of the linewidth (such as linewidth-narrowing), control of the frequency (as in Stark tuning), control of the optical and associated spin state (or charge state) control, and readout. Embodiments of the present disclosure describe systems for tunable control of the optical response of a lattice defect, such as a defect in silicon, by integrating lattice defects with semiconductor diodes. According to some embodiments, such integrated lattice defects can be combined with techniques for scalability, stability, and optical access.
[0103] Lattice defects in solids are useful tools for quantum information processing. For example, a G center can emit photons in the telecommunication O-band (i.e., radiation with wavelengths between 1260-1360 nm), which can be used to communicate quantum information. In some embodiments, the exact frequency of emission, and its linewidth, is an important signature of the emitter; that signature is critical in matching, or entangling, different quantum emitters. By tuning the frequency of photon emission by one emitter to resonate with another, the two emitters can, for example, serve as quantum computing logic gates. Moreover, the use of diodes ensures minimal charge noise disrupts the signal (narrowing the linewidth).
[0104] Quantum processing based on the photon emission of lattice defects can employ optics to observe and record quantum states. Without being bound by theory, because lattice defects can emit de-excitation energy both as photons that can be observed with optics and as phonons (vibrations), which cannot, quantum information is communicated most efficiently at the defect’s zero-phonon line (ZPL) — where all de-excitation energy is emitted as photons and none is emitted as phonons. It is therefore desirable to tune the ZPL emission of a quantum information system.
[0105] While nanophotonic techniques can be used to observe photon behavior beyond the diffraction limit of ordinary optical devices, the quantum information related by those photons can be limited by the solid-state qualities of the lattice defects. For example, intrinsic qualities of the lattice defect can limit intense de-excitation photon emission to a narrow band of frequencies. In some examples, intrinsic properties of the solid-state system containing the lattice defect can cause some of the emitted photons (e.g., those at particular frequencies) to be emitted or converted to phonons.
[0106] If the de-excitation photon frequency diverges from the lattice defect’s ZPL, deexcitation energy can be lost to lattice vibrations (phonons), thereby limiting the intensity of the emitted photons. Such information loss can take two forms: to phonons (which are challenging to record) and to the relatively lower number of the emitted photons. The ZPL and other characteristics of the lattice defect and its surrounding environment can therefore limit the efficiency of photon emission, the frequencies which can optically excite the lattice defect, and the quantum information the lattice defect can communicate for processing. Therefore, the utility of lattice defect quantum emitters can be improved by techniques for manipulating the emitter for tuning or control of these properties.
[0107] Electrical manipulation of photon emitters can be used to tune photon emission beyond a lattice defect’s intrinsic solid-state qualities. However, as discussed above, the efficiency of collecting the quantum information carried by emitted photons is impacted by environmental noise and issues of scalability. Lattice defect quantum emitters can be highly sensitive to the surrounding environment. For example, conditions external to the system such as temperature and other sources of noise can compromise signal coherence time or the measurement of the signal itself. This can present difficulties in incorporating additional quantum, optical, or electrical devices alongside a lattice defect quantum emitter, all of which can contribute to noise. Moreover, many lattice defect technologies are hosted in materials that can be difficult to fabricate at scale, such as diamond or silicon carbide. While these materials may possess desirable solid-state qualities, this can limit large scale production of lattice defect quantum emitters. Therefore, integrated, scalable systems incorporating lattice defect quantum emitters can be difficult or costly to construct or implement.
[0108] Embodiments of the present disclosure relate to lattice defects in widely available semiconductor systems and manufacturing techniques. For example, some embodimentsdescribe optical quantum systems that include a spatially isolated lattice defect or spatially isolated ensemble of lattice defects located between the p-doped and n-doped regions of an embedded semiconductor diode. The present disclosure further describes methods of operating these systems through the imposition of a reverse bias across the semiconductor diode, as well as methods of manufacturing these systems.
[0109] In some embodiments, an optical quantum system includes a substrate containing a lattice defect (or an ensemble of lattice defects) located between the p-doped and n-doped regions of a semiconductor diode embedded within a substrate. Within the optical quantum system, the lattice defect can be configured for optical excitation, for example by exposing the defect to an external photon source. After optically exciting the lattice defect, de-excitation photons communicating quantum information are emitted. The embedded semiconductor diode can be used to exert a reverse-bias electrical field across the lattice defect by placing a positive terminal of a voltage source in electrical contact with the n-doped region and a negative terminal in electrical contact with the p-doped region. This reverse bias expands the depletion region of the semiconductor diode as dopant charge carriers, positive holes and negative free electrons, are swept towards their respective regions of the diode. This in turn creates a large potential difference within the diode, yielding a significant local electric field in the semiconductor junction. Because photon emission of the lattice defect can be coupled to and depend on the local electric field, the applied reverse-bias field can be used to tune the properties of the lattice defect. For example, this emitter-field coupling can be used to modulate (i.e., adjust or shift) the ZPL and broaden, narrow, and / or shift the de-excitation photon wavelength distribution. Moreover, where the depletion region of the semiconductor diode reaches the lattice defect, the lack of free electrons can reduce charge noise, which might otherwise interfere with measurements of emissions. Embodiments of the present disclosure therefore provide for deterministic, manipulable emission of de-excitation photons carrying quantum information.
[0110] According to some embodiments, embedded lattice defects within a diode junction can be manufactured using standard lithographic techniques. Manufacturing techniques can also be applied to isolate the lattice defect from environmental disruption.[OHl] In some embodiments, the p-doped and n-doped regions are positioned in the substrate such that they do not intersect with an optical path connecting the embedded latticedefect to a surface of the semiconductor substrate. For example, in some embodiments, the p- doped and n-doped regions of the semiconductor diode can be located in the same horizontal plane defined by the upper surface of the substrate. In some embodiments, the p-doped and n- doped regions can be located in different, non-overlapping horizontal planes but in locations where neither region intersects every line perpendicular to the substrate plane that also intersects one or more of the lattice defects. Such configurations permit easier optical access to the lattice defect for the incorporation of other optical, electrical, or quantum devices.
[0112] FIGs. lA and IB are graphical representations of an example implementation 100 for tuning the photon emission of a lattice defect 106, according to some embodiments. FIG. lAis a cross-sectional view of the implementation 100, and FIG. IB is a top-down view of the implementation 100. Representations of implementation 100 depict the p-doped and n-doped regions of the substrate as symmetrical.
[0113] According to some embodiments, where the upper surface of the substrate is not substantially planar, the upper surface of the substrate is a horizontal plane at the average height of the non-planar upper surface.
[0114] While representations of implementations, according to some embodiments, depict the p-doped region of the substrate and n-doped region of the substrate as substantially symmetrical, uniform regions, a person of ordinary skill in the art would understand that the geometry of the p-doped region and n-doped region can be varied without departing from the scope or spirit of this disclosure. In some embodiments, for example, where the p-doped region and n-doped region are formed via ion implantation, the distribution of dopant ion depths within the substrate forms a gaussian distribution in a direction perpendicular to the substrate upper surface. This gaussian distribution relates dopant density within the substrate as a function of implantation depth. Therefore, in some embodiments, the vertical boundaries of the p-doped region and n-doped region relative to the upper surface of the substrate can be described according to the full-width at half maximum of the gaussian. The vertical dimensions of the p-doped region and the n-doped region of the substrate therefore include all depths wherein dopant density is equal to at least half of the maximum dopant density.
[0115] In some embodiments where the p-doped and n-doped region are formed via ion implantation, the horizontal boundaries of the p-doped region and the n-doped region aredefined according to the area of ion implantation. Therefore, where, according to some embodiments, an apertured mask is applied to the substrate through which dopant ions are implanted, the area of the aperture defines the horizontal boundaries of the dopant regions.
[0116] In some embodiments, the p-doped region and n-doped region are therefore defined horizontally as regions of the substrate bounded by the length and width of the ion implantation region (i.e., the area of the aperture of the masks), and vertically by the full-width at half max region of the dopant density.
[0117] In example implementation 100, the lattice defect 106 located between p-doped region 102 and n-doped region 104 within a substrate 116 on insulator 118 structure. P-doped region 102 is placed in electrical contact with contact 108, which in turn is in electrical contact with lead 112 for supplying signals to the p-doped region 102. An n-doped region 104 is placed in electrical contact with contact 110, which in turn is in electrical contact with lead 114 for supplying signals to the n-doped region 104. As shown in FIG. 1A, the p-doped region 102 and n-doped region 104 can extend on either side of and substantially surround contact 108 and contact 110, respectively. The p-doped region 102 and n-doped region 104 in the substrate 116 on insulator 118 structure form a semiconductor diode. By applying a voltage with a voltage source to p-doped region 102 and n-doped region 104 using contacts 108 and 110, a bias can be applied to the diode. If the diode is biased using a reverse bias, for example, by applying a positive voltage to n-doped region 104 and a negative voltage to p-doped region 102, an electric field will be applied between n-doped region 104 and p-doped region 102 across lattice defect 106.
[0118] In some embodiments, the system’s embedded design allows for the incorporation of additional optical, electrical, or quantum devices. As an example, FIG. 1A depicts a waveguide 122 above lattice defect 106. Placing lattice defect 106 between the semiconductor diode and embedded within the substrate can provide easier optical access to the system from the upper surface of the substrate. For example, as shown in the top-down view of system 100 in FIG. IB, placement of lattice defect 106 between p-doped region 102 and n-doped region 104 allow for emitter-field coupling without compromising optical access. The embedded design of the system allows for integration with other optical, electrical, or quantum devices and stabilizes the system from environmental noise.
[0119] In some embodiments, the lattice defect 106 can be isolated from the external environment by embedding the lattice defect 106 within the substrate 116, which can increase the stability of the system. Lattice defect 106 can be excited by an optical source, raising the energy level of the defect. Lattice defect 106 then emits photons as it relaxes to a lower energy state.
[0120] Substrate 116 can be any material amenable to doping that can also host a lattice defect 106. The p-doped region 102 can be formed by implantation of any p-type dopants within the substrate 116. Similarly, the n-doped region 104 can be formed by implantation of any n-type dopants within the substrate 116. Although FIGs. 1A and IB show contacts 108 and 110 passing through p-doped region 102 and n-doped region 104, respectively, alternative structures can be used to provide p-doped region 102 and n-doped region 104 with electrical signals from a voltage source to form a semiconductor diode.
[0121] FIG. 1C is a graphical and pictorial representation of an example lattice defect utilized in an example implementation, according to some embodiments. This lattice defect is a spatially isolated G-center ensemble, consisting of interstitial carbon atoms 134 in a lattice of silicon atoms 132. The lattice defect is embedded in substrate 116 and driven via electrical contacts 138 connected to the p-doped region and n-doped region (not shown).
[0122] FIG. ID is a top-down optical micrograph of an example implementation, including p-doped region 102, n-doped region 104, contact 108, contact 110, and substrate 116, according to some embodiments. The junction spacing 142 (d) between p-doped and n-doped regions 102, 104 can be varied across the substrate 116 to allow for a range of emitter-field coupling strengths. Within this particular implementation, an ensemble of carbon-related silicon lattice defects, G centers, are integrated into lateral semiconductor diodes fabricated in a silicon-on- insulator substrate. The example system is electrically driven through contacts 108 and 110, for example by a wire-bonded 16-pin helium cryostat connector (not shown). An industry standard 220 nm silicon-on-insulator wafer is utilized to host the example implementation, with a dopant-defined diode embedded at a depth of 110 nm. P-doping and n-doping is achieved via ion implantation. Hydrogen is locally incorporated to selectively form G centers at the junction center 140. An ensemble is thereby localized to the middle of the diode junction by implanting hydrogen ions with a lithography-defined mask in a wafer previously blanket- implanted with carbon. Ion implantation combined with successive aligned optical lithographywrites masked localized incorporation of the p-type and n-type dopants, and the G center lattice defect ensemble, at the desired depth within the example implementation. An etch-defined metallization strategy can be employed to ensure robust electrical contact and performance at the dopant plane, and the system can be packaged for cryogenic characterization. The system is compatible with integrated devices such as waveguides or readout devices.
[0123] Without being limited to example implementations, within this example, the lattice defect ensemble can be optically excited by a 532 nm laser and fluoresce at 1278 nm from above the substrate. The fluorescence of the G center ensemble is therefore in the telecommunication O-Band.
[0124] In some embodiments, the configurations shown in FIGs. 1A-1D provide for ease of optical access, variable junction width, and wafer scaling. Maximum junction width, for example, can refer to the width of the substrate minus the widths of the dopant regions. Minimum junction width, for example, can refer to the width of the smallest undoped region able to host at least one lattice defect. For example, hundreds of diodes each with an embedded lattice defect (or defect ensemble) can be fabricated on a single commercial wafer, for example using optical lithography, in an implementation that permits the reverse-bias field on each defect to be individually controlled. By placing the lattice defect or lattice defect ensemble between the p-doped and n-doped regions of the embedded semiconductor diode, the design co-locates the quantum emitter and dopant-defined junction in the same spatial plane, improving emitter-field interaction and ease of optical access.
[0125] While the embodiments of FIGs. 1A-1B and ID depict the p-doped region 102, n- doped region 104, and lattice defect 106 co-located in a parallel plane parallel to the surface of substrate 116, emitter-field coupling and optical access can be retained while varying the relative locations of these elements. For example, FIGs. 1E-1I are cross-sectional graphical representations of alternative orientations and placements of p-doped region 102, n-doped region 104, and lattice defect 106. FIGs. 1E-1I show a horizontal plane 180 that is parallel to the upper surface of substrate 116, according to some embodiments of the present disclosure. FIGs. 1E-1L show an optical path 170. FIGs. 1G and II show vertical line 190 perpendicular to the upper surface of substrate 116, according to some embodiments of the present disclosure. These example orientations and placements can be achieved through standard lithographictechniques and can be varied to achieve distinct emitter-field coupling strengths and / or to accommodate the integration of optical, electrical, or quantum devices.
[0126] FIG. IE is a graphical representation of an example implementation of a semiconductor diode, according to some embodiments. The semiconductor diode includes p- doped region 102 and n-doped region 104 in the same plane as lattice defect 106 along the horizontal plane 180 embedded in the substrate 116. Optical path 170 demonstrates the path through which photons can travel to the substrate surface and exit for observation. In this example implementation, the horizontal plane 180 bisects the p-doped region 102 and n-doped region 104, which produces an increased emitter-field interaction.
[0127] FIG. IF is a graphical representation of an example implementation of a semiconductor diode, according to some embodiments. The semiconductor diode includes p- doped region 102 and n-doped region 104 each intersecting at least one horizontal plane 180 embedded in the substrate 116. In this example implementation, at least one horizontal plane 180 intersects the p-doped region 102 and the n-doped region 104, but no horizontal plane bisects both the p-doped region 102 and n-doped region 104. Optical path 170 demonstrates the path through which photons can travel to the substrate surface and exit for observation.
[0128] FIG. 1G is a graphical representation of an example implementation of a semiconductor diode, according to some embodiments. The semiconductor diode includes p- doped region 102 and n-doped region 104 each intersecting at least one horizontal plane 180 embedded in the substrate 116, and each intersecting at least one vertical line 190 perpendicular to the horizontal plane 180. Optical path 170 demonstrates the path through which photons can travel to the substrate surface and exit for observation.
[0129] FIG. 1H is a graphical representation of an example implementation of a semiconductor diode, according to some embodiments. The semiconductor diode includes p- doped region 102 and n-doped region 104 which do not intersect any horizontal plane 180 embedded within the substrate 116 or any vertical line perpendicular to horizontal plane 180. Optical path 170 demonstrates the path through which photons can travel to the substrate surface and exit for observation.
[0130] FIG. II is a graphical representation of an example implementation of a semiconductor diode, according to some embodiments. The semiconductor diode includes p-doped region 102 and n-doped region 104 which do not intersect either a horizontal plane 180 embedded within the substrate 116 or any vertical line perpendicular to horizontal plane 180. A vertical line 192 does intersect both p-doped region 102 and lattice defect 106. Optical path 170 demonstrates the path through which photons can travel to the substrate surface and exit for observation.
[0131] A person of ordinary skill in the art would understand that the respective placement of p-doped region 102 and n-doped region 104 can be alternated in any of the orientations depicted in FIGs. 1E-1I without departing from the scope and spirit of this disclosure.
[0132] According to some embodiments, results are disclosed from example implementations of the disclosed system. The results presented herein are not intended to be limiting and serve merely as examples of device characteristics and emitter-field coupling techniques.
[0133] A custom-built confocal microscope using a Mitutoyo® 100 x 0.5 NA Near-IR objective to characterize example implementations of the present disclosure. G centers within example implementations were optically excited using an off-resonant 532 nm diode-pumped solid-state laser, and junctions were biased using a ±210 V Keithley® 2400 SourceMeter®. In some embodiments, excitation can also be achieved by forward biasing the integrated diode, exciting the lattice defect with electrical energy. Simultaneous optical and electrical measurements were performed in a Janis ST-500 continuous-flow Helium-cooled cryostat with a 16-pin mapped electrical feed-through wire-bonded to the diodes. Some example implementations achieved a base temperature of roughly 6 K. Photoluminescence of the diode- integrated lattice defects was measured on an Acton SpectraPro® 2750 spectrograph with a Princeton Instruments 0MA:V indium-gallium-arsenide nitrogen- cooled photodiode array detector. Raman spectroscopy was performed in a LabRAM® Evolution Horiba® multi-line room-temperature confocal Raman spectrometer using 532 nm laser excitation.
[0134] FIG. 2A is a graphical representation of the optical excitation of an example implementation of a lattice defect, according to some embodiments. The lattice defect is excited from ground state 216 to excitation state 218 by excitation energy 212, in this example a 532 nm laser. As the lattice defect relaxes from excitation state 218 to ground state 216, a de-excitation photon 214 is emitted with a wavelength of 1278 nm. FIG. 2B is a graph 220showing measurements of fluorescence emitted by an example implementation of an ensemble of lattice defects. FIG. 2B shows fluorescent intensity in normalized arbitrary units across wavelengths in the commonly used telecommunications O-band (1260-1360 nm). The sharp peak 224 at 1278 nm corresponds to the wavelength of de-excitation photon 214. As shown by FIG. 2B, the wavelength distribution of photons emitted by the lattice defect ensemble in the example implementation is dominated by emissions at a peak wavelength 224, which corresponds to the ZPL of the lattice defects employed in the example implementation. The example implementation above therefore serves as an effective quantum emitter of photons with wavelengths in conventional telecommunication bands. Furthermore, the embedded design of embodiments of the present disclosure allows for stabilization and optical access for measurements, as demonstrated by the fluorescence measured in graph 220 of FIG. 2.
[0135] Because the de-excitation photons emitted remain dominated by singular wavelengths, as illustrated by the sharp peak 224 at 1278 nm, it can be further desirable to manipulate these de-excitation photon emissions while retaining functionality, stability, and optical access. Such manipulation can include, for example, tuning the emission wavelength, broadening or narrowing the emission peak, decreasing or increasing the intensity of the peak photon emissions, and / or producing a shift (e.g., a redshift) in the peak photon emission through an electric field applied to the lattice defect. Such manipulations allow for quantum entanglement of emitters, charge noise reduction, and prevention of overlap with other emission signals. The present disclosure further relates methods of manipulating the deexcitation photon emission of the disclosed system through emitter-field coupling. The p- doped region 102 and n-doped region 104 in electrical contact with substrate 116 on insulator 118 structure form a semiconductor diode. Diodes can restrict the current of electricity to a single direction. For example, applying a voltage oriented along the opposite direction creates a reverse-bias, which can restrict the flow of current across the diode and increase the width of the depletion region as dopant electrons and holes are swept towards the n-doped and p-doped regions of the diode, respectively.
[0136] Example implementations of the lattice defect emitter, integrated with a semiconductor diode, allow for emitter-field coupling, which in turn allows for the manipulation of de-excitation photon emission. Without being bound by testing data, the optical response of example implementations, characterized under application of a reverse-biased DC electric field, demonstrates both 100% modulation of fluorescence signal, and wavelength redshift of approximately 1.24 ± 0.08 GHz / V above a threshold voltage.
[0137] This method can be used for control in quantum networking applications and serves as a tool for probing fundamental lattice defect behavior. Utilizing a lattice defect ensemble enables precise determination of the local electrical environment experienced by the emitters across the PN junction. This approach is readily extensible to probe and control other lattice defects in silicon, and lattice defects in a wide range of semiconductor platforms which are easily doped, such as silicon carbide.
[0138] FIGs. 3A-3B are graphical representations of a semiconductor diode including p- doped region 302, n-doped region 304, acceptor dopants 306, positive holes 308, donor dopants 310, negative free electrons 312, depletion region 314, local electric field 316, and voltage source 318, according to some embodiments. FIGs. 3A-3B demonstrate example effects of a reverse bias on an example semiconductor diode. FIG. 3 A is a graphical representation of a semiconductor diode under zero external bias. Diode regions are doped with charge carriers, either acceptor ions 306 possessing positive holes 308 or donor ions 310 possessing negative free electrons 312. In some embodiments, within p-doped region 302, the majority of charge carriers are positive holes 308. In some embodiments, within n-doped region 304, the majority of charge carriers are negative free electrons 312. Oppositely charged carriers attract, leading to diffusion of charge carriers across the junction between the p-doped region 302 and n-doped region 304. As diffusion of charge carriers occurs, the depletion region 314 located between the two regions is populated by ionized acceptor dopants 304 and ionized donor dopants 308, increasing the potential difference at the junction, reducing the rate of charge carrier diffusion, and inhibiting current to a single direction. The population of ions within the depletion region 314 generates a local electric field 316 proportional to the width of the depletion region 314.
[0139] FIG. 3B is a graphical representation of a semiconductor diode under reverse bias. A voltage source 318 is connected to the semiconductor. The positive lead of the voltage source 318 is connected to the N-doped region 304, and the negative lead of the voltage source 318 is connected to the P-doped region 302. The external voltage source 318 sweeps positive holes 308 and negative free electrons 312 towards the p-doped region 302 and n-doped region 304 respectively, leading to an increase in ionized acceptor dopants 306 and ionized donor dopants 310 widening the depletion region 314. As the width of the depletion region 314 increases, thelocal electric field 316 increases and current is substantially blocked in any direction. The local electric field 316 created by this reverse-bias offers various methods of manipulating or controlling lattice defect quantum emitters. By placing the lattice defect between the reverse- biased semiconductor diode, emitter-field coupling is accomplished, and the lattice defect emissions can be manipulated for tuning or control.Example Implementations
[0140] FIGs. 3C through 7 show results from example characterizations of various implementations of embodiments of the reverse-biased diode arrangement of the present disclosure. FIGs. 3C through 7 are merely examples, and are not to be considered limiting.
[0141] FIG. 3C shows a graphical representation of the current-voltage (IV) characteristics of packaged diodes with integrated G center ensembles according to some embodiments, using an example implementation measured as cryostat cooled to a base operating temperature of approximately 6 K. As shown in FIG. 3C, the current was measured as a function of applied voltage at four different temperatures, 6.4 K, 100 K, 200 K, and 300 K. Without being limited by example implementations, the current was substantially blocked for voltages below 0 V (i.e., a reverse bias), but was shown as increasing with voltage for voltages above 0 V for all temperatures. Accordingly, in some implementations the current-voltage characteristics under reverse bias do not degrade with temperature. In embodiments where masked hydrogen implantation is employed, the current-voltage characteristics also do not degrade. FIG. 3D is a graph showing the leakage current of an example implementation at 6.4 K as a function of reverse biases with a smaller current scale than FIG. 3C. The example implementation exhibits low leakage current under high reverse bias (i.e., low negative voltage), rising to only -0.5 pA of leakage current at -200 V, demonstrating diode efficiency and consequently insubstantial local heating effects. Thus, in some example implementations neither heat nor current significantly impact the emitter signal.
[0142] FIG. 4A is a graphical representation of the fluorescence as a function of deexcitation photon wavelength of an example implementation of a lattice defect ensemble, according to some embodiments. The fluorescence of FIG. 4A was measured with the ensemble under reverse biases by sweeping from 0 to -210 V. As with graph 220 of FIG. 2, the fluorescence at 0 V exhibits a sharp peak at 1278 nm. As the voltage decreases below 0 V (i.e.,as a reverse bias is exerted) and exceeds a spatially dependent threshold voltage, the fluorescence continually at the peak decreases (i.e., the peak widens), and the fluorescent wavelength shifts approximately 100 GHz to the red. At -210 V, the fluorescence of the example implementation is fully suppressed. Without being bound by testing data, a 100GHz redshift at a rate of approximately 1.24 ± 0.08 GHz / V is observed in the lattice defect ZPL above a spatially dependent threshold voltage. Additionally, without being bound by testing data, the ensemble linewidth broadens as the center wavelength redshifts, demonstrating that photons outside the ZPL are more efficiently emitted and less excitation energy is lost as phonons. Without being bound by theory, both the ensemble redshift and linewidth broadening rates exhibit discontinuities from an ideal linear trend when measured from example implementations, which can be explained by the distribution of Stark shifts for each emitter within the confocal spot due to the varied dipole alignments within the ensemble. In certain embodiments, techniques described in the present disclosure can be used to control and / or tune the emissions of a single lattice defect. In some embodiments, the observed linewidth broadening and shifting is impacted and / or dominated by local electric field interaction via band-bending.
[0143] FIG. 4B is a graphical representation of an example implementation’s lattice defect ZPL modulation ratio as a function of reverse bias, according to some embodiments. Without being bound by testing results, as the reverse bias exceeds a spatially dependent threshold voltage 412, the fluorescent intensity of the lattice defect reduces until the fluorescence drops below the noise floor of the measurement. A 100% modulation 414, normalized to ZPL intensity at 0 bias, is observed at -210 V.
[0144] Example implementations of the present disclosure demonstrate that de-excitation emission wavelength broadening, wavelength shifting, or ZPL modulation are not caused by heating. For example, although these effects are observed with higher reverse-bias voltage, which would also produce increased heating between the diode junction, there is no corresponding wavelength broadening or wavelength shifting for silicon-free exciton under reverse bias, which are known to be impacted by heating. For example, as shown in FIG. 3 inset 320, example implementations maintain low leakage current at high reverse bias (i.e., low negative voltage). In an example implementation, reverse biased current of 0.5 pA is passed at -200 V- corresponding to an applied power of 100 pW of power spread over a 103 pmjunction gap. As discussed herein, de-excitation emission wavelength broadening, wavelength shifting, and ZPL modulation can be observed at such power. FIG. 4C provides a graphical representation of a natural calibration of the tuning technique and its efficacy. The figure depicts the intensity of a non-color center emitter which is temperature-sensitive and will not display emission characteristics at elevated temperatures. This emitter is a silicon-free exciton. FIG. 4C shows the response of silicon-free excitons as a function of wavelength as the system is under reverse biases sweeping from 0 to -210 V, measured from an example implementation according to some embodiments. The silicon-free exciton is suppressed at elevated temperature and thus serves as a probe of local junction heating. Unlike de-excitation photon fluorescence, the excitation intensity, center wavelength, and linewidth of the calibration source do not demonstrate a correlation to increased reverse bias. Thus, the temperaturesensitive calibration indicates that thermal effects are not a significant source of the observed emitter behavior. In the example implementation of FIG. 4C, the excitation luminescence is not modified under reverse bias, consistent with the absence of significant heating. Nominal fluctuations are attributable to noise in the testing setting.
[0145] Where the lattice defect is comprised of an ensemble of defects across the semiconductor junction, the resulting fluorescence allows the direct imaging of the electric field distribution across the junction, which in turn show the spatial and voltage-dependent variation of the junction depletion region (and, by extension, the local electric field within the junction) and the associated effects of emitter-field coupling on the ensemble. Strong correlation between emitter-field coupling and generated photocurrent can also be observed in example implementations. Accordingly, embodiments of the present disclosure allow for electrical control of quantum emitters through emitter-field coupling, as well as direct visualization of electrical fields.
[0146] Capturing the distribution of the emitters’ optical response across the junction can aid in characterizing the nature of the emitter-field interaction, according to some implementations. For example, without being bound by theory, band-bending, which refers to the curvature of Fermi level energy bands, can modulate the optical activity of the emitter embedded within the diode as carriers diffuse and the allowed energy states of the lattice defect are subsequently modified. As another example, the Stark effect, which refers to the splitting of the energy spectrum of atoms due to the presence of an external electric field, can expandthe range of emissive wavelengths of emitted de-excitation photons based on the dipole moment of the lattice defect.
[0147] Without being bound by theory, under equilibrium conditions, the occupation of mid-gap defect states can be determined by the positions of the Fermi level relative to a defect charge transition levels. By tuning the Fermi-level, either passively by introducing extrinsic dopants, intrinsic defects, or via surface functionalization, or actively through band bending in electronic structures, a defect’s relative brightness can be modified by making a dark or bright charge state of the defect more statistically favored. Within the depletion region of a diode, charge population can be influenced by the locations of the quasi-Fermi levels, EP nand EP p. In addition, selective charge population of a defect can show greater stability, free from transitions from free electrons in the conduction band or free holes in the valence band. The internal electric field across the depletion region can also interact with the G centers to produce a Stark shift in the ZPL.
[0148] Band bending can be achieved by making the p-contact increasingly negative which produces effects across the junction to varying degrees. The Fermi level is an evident factor in a lattice defect’s optical activity, and thus the brightness gradient of an ensemble can be observed across the junction in proportion to the band bending achieved at a given voltage if the energy required for ionization of the defect states is commensurate with the supplied electric potential. Conversely, excess carriers in the junction prevent complete depletion below a critical threshold voltage. In an example implementation a lightly p-doped starting substrate exhibits a nonuniform depletion region, reaching the ensemble at a sufficiently large threshold voltage emerging first near the n-contact. The Stark effect can be mediated by a local electric field experienced by the ensemble, and thus, without being bound by testing data, can be observed only when the depletion region reaches the ensemble. Additionally, the depletion region of the junction can be monitored directly by measuring confocal photocurrent, and therefore the system can correlate the depletion region’s spatial occurrence confirmed via photocurrent with an optical response of the lattice defects.
[0149] Without being bound by theory, given the lateral geometry of example lattice-defect integrated diodes, a uniform increase in the depletion layer width is expected with increased reverse bias. However, the central hydrogen-implanted lattice defect ensemble region of example implementations can influence the Fermi energy in that region, as well as the linearityof the reverse bias field between the diodes. Photoexcitation of the reverse-biased junction will produce a photocurrent. This provides another method of mapping the depletion region, and therefore a method of cross-correlating the spatial information given by the photoluminescence response of the defect ensemble.
[0150] FIGs. 5A-5C are pictorial representations of the optical response of an ensemble of lattice defects in an example implementation and according to some embodiments. These representations are direct images of the spatial distribution of emitter-field coupling interactions through confocal maps of example implementations under reverse biases, depicting ensemble photoluminescence (top row in each Figure) and measured junction photocurrent (bottom row in each Figure) at 0 V in FIG. 5 A, -100 V in FIG. 5B, and -200 V in FIG. 5C. Photoluminescence was measured in arbitrary units across the across the 50x50 «m lattice defect ensemble region, 506. Photocurrent was measured across the 50x50 «m lattice defect ensemble region, 506. The semiconductor junction was between p-doped region 502 and n-doped region 504. The substrate of the example implementation was lightly p-doped. Therefore, as the reverse bias increases, the junction depletion region expands from the n-doped region 504. Within the junction depletion region, the example implementation demonstrated lower photo-responsivity and ZPL optical intensity modulation. Within the example implementation, the junction depletion region distribution was therefore illustrated by the ZPL optical intensity modulation spreading across the example implementation beginning from the n-doped region 504, with strong agreement found by correlating the optical response with injected photocurrent measured in the junction. In these particular testing settings, the photoluminescence color bar noise floor is set to 0.2 due to 1 s integration.
[0151] FIG. 5A is a pictorial representation of a confocal scan of an example implementation repeated across the junction at a reverse bias of 0 V. FIG. 5 A therefore shows the localization of the lattice defect ensemble in the example implementation. At 0 V bias, lattice defect photoluminescence is only observed in the 50x50 «m region, 506, at the center of the diode. Under 0 V bias, the bottom of FIG. 5A shows the measured photocurrent is negligible.
[0152] FIG. 5B is a pictorial representation of a confocal scan of an example implementation repeated across the junction at a reverse bias of -100 V. At -100 V, the optical intensity modulation ratio of the lattice defect is spatially dependent, with the emitters in theportion of the aperture 506 closest to the n-doped region 504 showing 40% greater suppression in response to the applied electric field than those nearest the p-doped region 502. When comparing the confocal photoluminescence (top of FIG. 5B) with the associated photocurrent measured in the device (bottom of FIG. 5B), the presence of the ensemble, and thus hydrogen, decreased the current passage across the junction, as the regions within the junction above and below the implant aperture demonstrated high photoresponsivity. Without being bound by testing results, this outcome can result from a different reverse-bias profile in those regions or the Hydrogen implantation providing trap states for the photo-generated electrons and holes, resulting in a stronger photo-current intensity outside the aperture.
[0153] FIG. 5C is a pictorial representation of a confocal scan of an example implementation repeated across the junction at a reverse bias of -200 V. At -200V, the region closer to the n-doped region 504, demonstrates 100% modulation of the lattice defect fluorescence (top of FIG. 5C). Conversely, closer to the p-doped region 502, lattice defect fluorescence is minimally suppressed. Furthermore, the associated confocal photocurrent (bottom of FIG. 5C) follows the same spatial pattern, demonstrating increased photocurrent in the portion of the lattice defect ensemble 506 closer to the n-doped region 504. Optically generated photocurrent measured in the lattice defect ensemble region 506 peaks in the region where emission is maximally modulated, indicating that the region of greatest depletion corresponds with strongest emitter-field interaction. As the strength of the reverse bias field across the example implementation increases, the spatial extent of the ensembles experiencing greatest optical modulation spreads from the region closet to the n-doped region 504 towards the p-doped region 502 as carriers are swept toward their respective dopant regions.
[0154] FIG. 6A is a pictorial representation of the variation in a lattice defect ensemble optical response, measured in normalized arbitrary units, across the junction of an example implementation and according to some embodiments, according to an example implementation of an embodiment. The ensemble response was observed across the confocal photoluminescence map of FIG. 5C as voltage across the semiconductor diode was swept from 0 to -200 V. At region 602, near the center of the junction, the ensemble experienced partial optical modulation but no wavelength tuning. At region 604, near the n-doped region 604, the ensemble experiences complete optical modulation and wavelength tuning.
[0155] FIG. 6B is a graphical representation of the optical response of the ensemble as a function of de-excitation photon wavelength under reverse biases swept from 0 to -200 V in the region 602, near the center of the junction, according to an example implementation of an embodiment. Partial optical modulation was observed in region 602, with modulation increasing as voltage decreased. Wavelength tuning was not observed in region 602. This measurement is consistent with theory, where at reverse bias voltages below a critical value, the size of the depletion region is less than the width of the junction. For example, without being bound by testing results, the threshold voltage to observe Stark effect of single divacancies in 4H-silicon carbide positioned at different spatial planes of a vertical diode can depend on the position of the emitter in the junction. Direct imaging the spatial dependence of the entire diode depletion region extends this observation.
[0156] FIG. 6C is a graphical representation of the optical response of the ensemble as a function of de-excitation photon wavelength under reverse biases swept from 0 to -200 V in region 604, near the n-doped region 504, according to an example implementation of an embodiment. Above a spatially-dependent threshold voltage where the junction depletion reaches the lattice defect ensemble, a continual redshift of approximately 1.24 ± 0.08 GHz / V was observed. However, tens of microns away, where the junction depletion region has not yet reached the lattice defect ensemble, no wavelength tuning was observed in the example implementation. Without being bound by testing results, wavelength-tuning was therefore only observed in regions that also exhibit strong photocurrent, indicating the presence of the junction depletion region and large local electric field. FIG. 6D is a graphical representation of the continual redshift observed as the junction depletion reaches the lattice defect ensemble, according to an example implementation of an embodiment. FIG. 6D shows redshift, measured in GHz, as a function of reverse bias voltage, measured in scalar volts. As the reverse bias exceeds a spatially dependent threshold value, line 606 shows the continual redshift of approximately 1.24 ± 0.08 GHz / V.
[0157] FIG. 7 is a graphical representation of the observations discussed with reference to FIGs. 6A-6C, according to an example implementation and some embodiments. FIG. 7 depicts an implementation of system 100, similar to the system of FIG. 1A, including a reverse-bias voltage 702, and resultant electric field lines 704. As the reverse bias voltage 702 increases below 0 (i.e., exerts a stronger negative voltage), the field lines 704 extend from the n-dopedregion 104 to reach the lattice defect 106, thereby placing the lattice defect 104 within the depletion region, and allowing emitter-field coupling for the manipulation of photon emission.
[0158] Without being bound by theory, these example results indicate that the Stark effect can be responsible for the observed emitter red-shift. The p-type carriers in areas within the junction are sufficiently ionized such that electric field can build up to yield Stark-shifted lattice defects. In some embodiments and without being bound by theory, a single emitter in an undoped I layer of a PIN diode can be used to estimate the differential polarizability of a G center. For example, the precise Stark shift rate can be captured by a single emitter and the lack of residual carriers can result in improved electric field uniformity.Lattice defect ensemble optical intensity can be modulated both within and outside of the depletion region under increasing reverse bias. Without being bound by theory, this observation can be explained by defect charge state modification via Fermi level engineering. The trend and spatial relation of predicted band bending and ensemble brightness is well correlated, indicating depletion of the optically active charge state at increasing reverse bias. The lattice defect ensemble employed in the example implementation, an ensemble of G centers, possesses a bi-stability in its atomic configuration between optically-active B configuration and a dark A configuration. Optical emission from G centers arises in the transition from the meta-stable A to the B form under photo-injection. G center ensemble brightness can therefore depend upon the concentration of B configuration emitters: for lightly p-doped silicon at 4 K, the concentration of A configuration emitters can dominate B configuration emitters. However, optical excitation allows the conversion of A configuration emitters to the metastable B configuration, where they can exhibit photoluminescence. Further, both A and B configuration emitters can be ionized to non-emissive charge states as the Fermi level is tuned under external bias. Observations of example implementations are consistent with this explanation: as the reverse bias across the junction is increased, emitters in the A configuration convert to the emissive B configuration but are probabilistically ionized to a dark state as a function of the resultant band bending. The center wavelength and nominal (zerobias) brightness of the example implementation ensemble returns upon termination of the diode bias, both forward bias and reverse bias. Thus, the charge state of the example implementation ensemble was not permanently altered by the measurements. Additionally, there is no observed time-delay in the restoration of the emitter optical properties.
[0159] As described above and related through the above observations of example implementations, emitter-field coupling through application of a reverse bias across a diode can facilitate the tuning and / or control of photon emission in the disclosed optical quantum system.Example Methods of Manufacturing
[0160] Embodiments of the present disclosure further relate to methods of manufacturing the diode systems for use with lattice defects, including those discussed above. In some embodiments, the diode system can be constructed by industry standard lithographic techniques. Manufacturing methods of the present disclosure are compatible with any materials capable of hosting a lattice defect and amenable to p-type and n-type doping. According to some embodiments, this flexibility allows for production at scale and exploitation of the advantageous qualities of various known materials and dopants. The embedded design of the system allows the integration of optical, electrical, or quantum devices without compromising the stability of the system.
[0161] FIGs. 8A-8B are flow charts representing methods of manufacturing integrated lattice defect and semiconductor diode systems, according to some embodiments of the present disclosure. The diode produced using the method of FIG. 8A includes p-doped and n-doped regions that overlap at least one horizontal plane parallel to the upper surface of the substrate. At step 811 , a first apertured mask is applied to a substrate containing at least one lattice defect. At step 812, p-dopants are implanted within the substrate through the aperture of the first mask to form a p-doped region within the substrate. At step 813, a second apertured mask is applied to the substrate with an aperture located in a region that does not completely overlap with the p-doped region. At step 814, n-dopants are implanted within the substrate through the aperture of the second mask to form an n-doped region within the substrate located such that the p- doped region and the n-doped region overlap at least one horizontal plane parallel to the upper surface of the substrate. The lattice defect(s) can be located in between the p-doped and n- doped regions. The lattice defect can be located in between the p-doped and n-doped regions. At step 815, the p-doped and n-doped regions are placed in electrical contact with leads to a voltage source, forming a semiconductor diode. In some embodiments, step 811 and step 812 can be performed after step 813 and step 814 (i.e., p-type dopants can be implanted after the implanting of n-typed dopants). In some embodiments, the masks and dopants described insteps 811-815 are applied to a substrate without a lattice defect, and the lattice defect(s) is created thereafter.
[0162] Turning to the method of FIG. 8B, the diode produced includes p-doped and n- doped regions that do not intersect with any vertical line perpendicular to the upper surface of the substrate. At step 821, a first apertured mask is applied to a substrate containing at least one lattice defect. At step 822, p-dopants are implanted within the substrate through the aperture of the first mask to form a p-doped region within the substrate. At step 823, a second apertured mask is applied to the substrate, such that the aperture of the second mask does not overlap the p-doped region. At step 824, n-dopants are implanted within the substrate through the aperture of the second mask to form an n-doped region within the substrate located such that the p-doped region and the n-doped region do not each intersect any vertical line perpendicular to the upper surface the substrate. The lattice defect(s) can be located in between the p-doped and n-doped regions. At step 825, the p-doped and n-doped regions are placed in electrical contact with leads to a voltage source, forming a semiconductor diode. In some embodiments, step 821 and step 822 can be performed after step 823 and step 824 (i.e., p-type dopants can be implanted after the implanting of n-typed dopants). In some embodiments, the masks and dopants described in steps 821-825 are applied to a substrate without a lattice defect, and the lattice defect(s) is created thereafter.
[0163] FIGs. 9A-9H are graphical representations of a method of manufacturing a diode, according to an implementation of some embodiments. This fabrication process can be used to manufacture diode-integrated G center lattice defects in a silicon-on-insulator substrate, a bulk silicon substrate, or other semiconductor substrate. According to some embodiments, the process begins with a lightly p-doped substrate. In some embodiments, electrical performance can be altered or improved through use of intrinsic semiconductor material.
[0164] FIG. 9A is a graphical representation depicting a step 910, according to some embodiments. In step 910, G centers are formed in the substrate. For example, an unmasked bulk silicon wafer 902 is implanted with carbon ions 912, for example by implanting silicon 902 with 7xl013 / cm2 12C ions 912 at an energy of 38 keV, thereby placing interstitial carbon atoms within the silicon crystal lattice. The wafer is rapid thermal annealed at 1000° C to heal lattice damage.
[0165] FIB. 9B is a graphical representation depicting a step 920, according to some embodiments. In step 920, the p-doped region is formed within the substrate. For example, photoresist mask 924 is written with 500 x 500 pm aperture(s) 926 through optical lithography, and lx 1014 / CM2 nB ions 922 are implanted at an energy of 29 keV through the apertures 926 to define localized p-doped islands. Ion implantation energies can be determined using Stopping Range of Ions in Matter (SRIM) calculations, targeting a depth of approximately 110 nm for each ion in some embodiments. Dopant densities can be selected to obtain an acceptor / donor concentration of approximately lxl019 / cm3at the implantation depth, which is a typical order magnitude for electrical devices in silicon. Overlapping the maximum dopant concentration depth with the etch-defined metallization can help facilitate between the transmissive metal-semiconductor interface. Implantation can be performed, for example, at a 7° tilt. Masked implantation of an example embodiment can utilize optical lithography in the positive photoresist mask S 1813 at a fluence of 250 mJ and wavelength of 375 nm using a Heidelburg Maskless Aligner 150. The resist can be pre-baked at 115°C for 3 minutes, and developed for 70 seconds in TMAH-based CD-26. The photoresist masks can be stripped with a 400 W O2 plasma.
[0166] FIG. 9C is a graphical representation depicting a step 930, according to some embodiments. In step 930, the n-doped region is formed within the substrate. For example, photoresist mask 934 is written with 500 x 500 pm aperture(s) 936 through optical lithography, and lx 1014 / cm2 31P ions 932 are implanted at an energy of 80 keV through the apertures 936 to define localized n-type islands. The spacing of the p-doped regions and n-doped regions can be swept across the wafer to vary the strength of the junction electric field for a given applied voltage.
[0167] FIG. 9D is a graphical representation depicting a step 940, according to some embodiments. In step 940, the p-doped region 942 and the n-doped region 944 are incorporated into the wafer 902. For example, in order to heal the crystal lattice and incorporate the dopants substitutionally in the substrate, a rapid thermal anneal is performed at 1000°C for 20 seconds in an argon environment.
[0168] FIG. 9E is a graphical representation depicting a step 950, according to some embodiments. In step 950, electrical contacts openings are formed at the p-doped region 942 and n-doped region 944. For example, electrical contacts openings are generated by firstwriting 250x250 urn apertures 956 in a resist mask 954 positioned such that each opening is aligned to the center of the implanted dopant islands, p-doped region 942 and n-doped region 944. Other placements creating an opening to p-doped region 942 and n-doped region 944 are contemplated.
[0169] FIG. 9F is a graphical representation depicting a step 960, according to some embodiments. In step 960, electrical contacts are completed. For example, resist mask 964 is written with 300x300 pm apertures 966, positioned such that each opening is aligned to the opening formed in step 950 to the implanted dopant islands, p-doped region 942 and n-doped region 944, and a thin film of 300 nm gold on a 30 nm titanium adhesion layer (Ti-Au) 962 is deposited via electron beam evaporation. The Ti-Au resist-on-liftoff mask can be stripped with a 12 hour soak in remover PG at 80°C.
[0170] FIG. 9G is a graphical representation depicting step a 970, according to some embodiments. In step 970, hydrogen is implanted to incorporate G centers into the system. For example, 7x 1013 / cm2H ions 972 are implanted at an energy of 9 keV through 50x50 urn apertures 976 in a resist mask 974. This forms an ensemble of diode integrated G centers. Proton irradiation or other hydrogenation techniques can be applied to complete the G center formation.
[0171] In some embodiments, masked ion implantation of hydrogen can be used to obtain a bright localized ensemble at the targeted depth where the electric field is strongest, with negligible degradation of electrical performance. Given hydrogen’s role in G center formation and stabilization, ensemble emission can be localized to only the implantation mask in the example implementation. Because G centers in some example implementations are unstable above 200°C, hydrogen incorporation can be implemented as the final fabrication step. Thus, to ensure the diode fabrication is compatible with G center production, steps for both fabrication processes are interspersed.
[0172] FIG. 9H is a graphical representation depicting a step 980, according to some embodiments. In step 980, the system is integrated for use in emitter-field coupling techniques. For example, the wafer 902 is diced into 6x6 mm samples to be integrated into a 16-pin electrically wired cryogenic cold-finger and wire-bonded through leads 982 for external driving.
[0173] A person of ordinary skill in the art would recognize that various steps of this process can be performed in a different order without departing from the scope and spirit of this disclosure. For example, step 920 (depicted in FIG. 9B) and step 930 (depicted in FIG. 9C), can be performed in alternate order (i.e., step 930 can be performed prior to step 920). Furthermore, a person of ordinary skill in the art would recognize from the present disclosure that details of this process could be adjusted without departing from the scope or spirit of the disclosure. For example, substrate dimensions, aperture size, dopant concentration, and lattice defect population can be adjusted, and are provided here as merely examples.
[0174] Embodiments of the present disclosure demonstrates the coupling of lattice defects and electric fields. This disclosure further demonstrates through example implementations, the coupling of a telecommunication-band silicon color centers to DC electric fields by integrating G centers into diodes while retaining optical access and stability. Embodiments of the present disclosure utilize electrical manipulation of ensemble lattice defects to image the electric-field distribution within a diode, capturing the spatial evolution of the junction depletion region across varied reverse-bias voltages. Within the junction depletion region of example implementations, the ZPL redshifts by approximately 100 GHz at a rate of 1.24 ± 0.08 GHz / V above a threshold voltage. Without being limited by testing data, modulation of the ZPL fluorescence intensity is observed outside of the depletion region. Without being bound by theory, these observations of example implementations suggest distinct emitter-field couplings are exhibited with a spatial dependence across the junction where defect charge state modulation via Fermi engineering and the Stark effect can explain the observed phenomena. Furthermore, example implementations demonstrate that hydrogen plays a critical role in the ability to observe G centers in devices.
[0175] Embodiments of the present disclosure provide systems and methods for electrically manipulating lattice defects with broad applicability to both silicon color centers, and lattice defects in other semiconductor platforms. Embodiments with an ensemble of color centers illustrate the spatial distribution of emitter-field coupling in the junction, which can be used to refine the design of electrical devices such as diodes to optimally couple such diodes for coupling to a single emitter. Embodiments of the present disclosure further contemplate the response of silicon T centers to electrical tuning via diode, as T centers possess a coherent spinphoton interface and can be manufactured using similar procedures to those disclosed herein.The direct visualization of electric field dynamics provided by example implementations, for example by optically mapping a DC electric field in-situ, can be used for quantum sensing of electric fields. Systems and methods described herein with laterally oriented diodes in a buried plane (for example, those shown in FIGs. 1E-1I) are compatible with photonic crystal cavity integration, to facilitate simultaneous electrical tuning, stabilization, and control of cavity- enhanced quantum emitters.
[0176] Although embodiments of the present disclosure describe the applicability of disclosed designs and electronically manipulable emitter-field coupling techniques to quantum processing and communication, a person of ordinary skill in the art would understand from the present disclosure that the disclosed system and techniques have broader applicability to other fields.
[0177] Although embodiments of the present disclosure describe applying a reverse bias across a semiconductor diode with integrated lattice defect, the invention also contemplates applying a forward bias across a semiconductor diode with integrated lattice defect to electrically excite the integrated lattice defect, causing, for example, de-excitation photon emission.
[0178] Although embodiments and example implementations of the present disclosure describe quantum emitters implemented as lattice defects such as G and T centers, the designs, manipulation techniques, and manufacturing techniques described above are applicable to other quantum emitters, including but not limited silicon vacancy centers in diamond, tin vacancy in diamond, silicon vacancy in silicon carbide, vanadium in silicon carbide, divacancy in silicon carbide, rare earth ions, quantum dots, and others.
[0179] Although embodiments and example implementations of the present disclosure describe hydrogenation as allowing the formation of emissive T centers, the designs and various electrical manipulation techniques described above are applicable to other lattice defects and quantum emitters generally. A person of ordinary skill in the art would understand that hydrogenation is therefore not a limitation on the designs and various techniques described above.
[0180] Although embodiments and example implementations of the present disclosure describe lattice defects and diodes located within a lightly p-doped silicon substrate, a personof ordinary skill in the art would understand from the present disclosure that the design and various electrical manipulation techniques described above are applicable to substrates that have not been lightly p-doped. A person of ordinary skill in the art would further understand from the present disclosure that other substrates, such as non-silicon-based substrates, can be used without departing from the scope and spirit of the present disclosure.
[0181] Although the electrical manipulation techniques described above include descriptions of testing results wherein a lattice defect was converted from an optically bright state to a dark state, a person of ordinary skill in the art would understand from the present disclosure that these techniques are similarly applicable to provide the opposite result. Fermi engineering through an applied reverse bias can favorably populate a bright state from a dark state. The equilibrium Fermi level of the substrate can dictate the charge population of the lattice defect, which is given by the background doping. Therefore, a person of ordinary skill in the art would understand from the present disclosure that the techniques described above can be practiced to convert a dark state to an optically bright state without departing from the scope or spirit of the present disclosure.
[0182] Although embodiments and example implementations of the present disclosure describe diodes formed from boron-doped and phosphorous-doped regions within a silicon substrate, a person of ordinary skill in the art would understand from the present disclosure that the design and various electrical manipulation techniques described above are applicable to other substrates or dopants.
[0183] While the invention has been particularly shown and described with reference to specific preferred embodiments, it should be understood by those skilled in the art that various changes in form and detail can be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Those skilled in the art would understand that particular measurements achieved during tests of the invention and numbers obtained during simulations of the invention do not limit the scope of the invention in any way, unless otherwise noted. Likewise, the theoretical explanations provided in the present disclosure to describe various aspects of the invention are merely examples and do not limit the scope of the invention, unless otherwise noted. A person of ordinary skill in the art would understand from the present disclosure that the disclosed embodiments can be selectively combined without departing from the scope of the disclosed invention.
Claims
CLAIMSWhat is claimed:
1. An apparatus, comprising: a substrate having an upper surface; a p-doped region of the substrate; an n-doped region of the substrate, wherein at least one plane parallel to the substrate upper surface overlaps both the n-doped region and the p-doped region; and at least one quantum emitter in the substrate located between the p-doped region and the n- doped region. The apparatus of Claim 1, wherein the at least one plane parallel to the substrate upper surface bisects the p-doped region and the n-doped region.3 The apparatus of Claim 1, wherein the substrate comprises silicon. The apparatus of Claim 3, wherein the at least one quantum emitter comprises a G center.5 The apparatus of Claim 3, wherein the at least one quantum emitter comprises a T center.6 The apparatus of Claim 3, wherein: the p-doped region comprises boron-doped silicon; and the n-doped region comprises phosphorus-doped silicon.7 The apparatus of Claim 1, further comprising: a first electrical contact coupled to the p-doped region; and a second electrical contact coupled to the n-doped region.8 The apparatus of Claim 7, further comprising a voltage source coupled to the first electrical contact and the second electrical contact.9 The apparatus of Claim 8, wherein: a positive terminal of the voltage source is coupled to the second electrical contact; and a negative terminal of the voltage source is coupled to the first electrical contact.10 The apparatus of Claim 1, further comprising a waveguide located above the upper surface of the substrate.11 The apparatus of Claim 1, further comprising a source of excitation energy configured to excite the at least one quantum emitter.12 The apparatus of claim 11, wherein the source of excitation energy is a laser.13 The apparatus of Claim 1, further comprising an optical readout system configured to read the state of the at least one quantum emitter.
14. The apparatus of Claim 1, further comprising: a second p-doped region of the substrate; a second n-doped region of the substrate; and at least one additional quantum emitter in the substrate located between the second p-doped region and the second n-doped region.
15. The apparatus of Claim 14, wherein at least one plane parallel to the substrate upper surface overlaps both the second p-doped region and the second n-doped region.
16. An apparatus, comprising: a substrate having an upper surface; a p-doped region of the substrate; an n-doped region of the substrate, wherein no line perpendicular to the substrate upper surface overlaps both the n-doped region and the p-doped region; and at least one quantum emitter in the substrate located between the p-doped region and the n- doped region.
17. The apparatus of Claim 16, wherein at least one plane parallel to the substrate upper surface overlaps both the p-doped region and the n-doped region.
18. The apparatus of Claim 17, wherein the at least one plane parallel to the substrate upper surface bisects the p-doped region and the n-doped region.
19. The apparatus of Claim 16, wherein no plane parallel to the substrate upper surface intersects both the p-doped region and the n-doped region.
20. The apparatus of Claim 16, wherein the substrate comprises silicon.
21. The apparatus of Claim 20, wherein the at least one quantum emitter comprises a G center.
22. The apparatus of Claim 20, wherein the at least one quantum emitter comprises a T center.
23. The apparatus of Claim 20, wherein: the p-doped region comprises boron-doped silicon; and the n-doped region comprises phosphorus-doped silicon.
24. The apparatus of Claim 16, further comprising: a first electrical contact coupled to the p-doped region; and a second electrical contact coupled to the n-doped region.
25. The apparatus of Claim 24, further comprising a voltage source coupled to the first electrical contact and the second electrical contact.
26. The apparatus of Claim 25, wherein a positive terminal of the voltage source is coupled to the second electrical contact and a negative terminal of the voltage source is coupled to the first electrical contact.
27. The apparatus of Claim 16, further comprising a waveguide located above the substrate upper surface.
28. The apparatus of Claim 16, further comprising a source of excitation energy configured to excite the at least one quantum emitter.
29. The apparatus of Claim 28, wherein the source of excitation energy is a laser.
30. The apparatus of Claim 16, further comprising an optical readout system configured to read the state of the at least one quantum emitter.
31. The apparatus of Claim 16, further comprising: a second p-doped region of the substrate; a second n-doped region of the substrate; and at least one additional quantum emitter in the substrate located between the second p-doped region and the second n-doped region.
32. The apparatus of Claim 31, wherein no line perpendicular to the substrate upper surface overlaps both the second p-doped region and the second n-doped region.
33. A method, comprising: applying a reverse-bias electric field to at least one quantum emitter in a substrate, the at least one quantum emitter located between a p-doped region of the substrate and an n-doped region of the substrate, wherein the applying the reverse-bias electric field comprises: applying a positive voltage to the n-doped region; and applying a negative voltage to the p-doped region, wherein at least one plane parallel to an upper surface of the substrate overlaps with both the p-doped region and the n-doped region.
34. The method of Claim 33, wherein the at least one plane parallel to the substrate upper surface bisects the p-doped region and the n-doped region.
35. The method of Claim 33, wherein the substrate comprises silicon.
36. The method of Claim 35, wherein the at least one quantum emitter comprises a G center.
37. The method of Claim 35, wherein the at least one quantum emitter comprises a T center.
38. The method of Claim 35, wherein: the p-doped region comprises boron-doped silicon; and the n-doped region comprises phosphorus-doped silicon.
39. The method of Claim 33, wherein:the applying the negative voltage to the p-doped region further comprises applying the negative voltage through a first electrical contact coupled to the p-doped region; and the applying the positive voltage to the n-doped region further comprises applying the positive voltage through a second electrical contact coupled to the n-doped region.
40. The method of Claim 39, wherein the applying the negative voltage to the p-doped region further comprises coupling a negative terminal of a voltage source to the first electrical contact; and the applying the positive voltage to the n-doped region further comprises coupling a positive terminal of a voltage source to the second electrical contact.
41. The method of Claim 33, further comprising receiving photons emitted by the at least one quantum emitter with a waveguide.
42. The method of Claim 33, further comprising exciting the at least one quantum emitter with a source of excitation energy.
43. The method of Claim 42, wherein the source of excitation energy is a laser.
44. The method of Claim 33, further comprising recording photon emission by the at least one quantum emitter with a readout system.
45. The method of Claim 33, wherein: the substrate further comprises a second p-doped region of the substrate; a second n-doped region of the substrate; and at least one additional quantum emitter located between the second p-doped region and the second n-doped region; and the method further comprises: applying a positive voltage to the second n-doped region; and applying a negative voltage to the second p-doped region.
46. The method of Claim 45, wherein at least one plane parallel to the upper surface of the substrate overlaps the second p-doped region and the second n-doped region.
47. A method, comprising: applying a reverse-bias electric field to at least one quantum emitter in a substrate, the at least one quantum emitter located between a p-doped region of the substrate and an n-doped region of the substrate, wherein the applying the reverse-bias electric field comprises: applying a positive voltage to the n-doped region; andapplying a negative voltage to the p-doped region, wherein no line perpendicular to an upper surface of the substrate intersects both the p-doped region and the n-doped region.
48. The method of Claim 47, wherein at least one plane parallel to the substrate upper surface intersects the p-doped region and the n-doped region.
49. The method of Claim 48, wherein the at least one plane parallel to the substrate upper surface bisects the p-doped region and the n-doped region.
50. The method of Claim 47, wherein no plane parallel to the substrate upper surface intersects the p-doped region and the n-doped region.
51. The method of Claim 47, wherein the substrate comprises silicon.
52. The method of Claim 51, wherein the at least one quantum emitter comprises a G center.
53. The method of Claim 51, wherein the at least one quantum emitter comprises a T center.
54. The method of Claim 51, wherein: the p-doped region comprises boron-doped silicon; and the n-doped region comprises phosphorus-doped silicon.
55. The method of Claim 47, wherein: the applying the negative voltage to the p-doped region further comprises applying the negative voltage through a first electrical contact coupled to the p-doped region; and the applying the positive voltage to the n-doped region further comprises applying the positive voltage through a second electrical contact coupled to the n-doped region.
56. The method of Claim 47, wherein: the applying the negative voltage to the p-doped region further comprises coupling a negative terminal of a voltage source to the first electrical contact; and the applying the positive voltage to the n-doped region further comprises coupling a positive terminal of a voltage source to the second electrical contact.
57. The method of Claim 47, further comprising receiving photons emitted by the at least one quantum emitter with a waveguide.
58. The method of Claim 47, further comprising exciting the at least one quantum emitter with a source of excitation energy.
59. The method of Claim 58, wherein the source of excitation energy is a laser.
60. The method of Claim 47, further comprising recording photon emission by the at least one quantum emitter with a readout system.
61. The method of Claim 47, further comprising: the substrate further comprisesa second p-doped region of the substrate; a second n-doped region of the substrate; and at least one additional quantum emitter located between the second p-doped region and the second n-doped region; and the method further comprises: applying a positive voltage to the second n-doped region; and applying a negative voltage to the second p-doped region.
62. The method of Claim 61, wherein no line perpendicular to the upper surface of the substrate intersects both the second p-doped region and the second n-doped region.
63. A method, comprising: forming a p-doped region in a first location within a substrate, the substrate comprising an upper surface; forming an n-doped region in a second location within the substrate, wherein at least one plane parallel to the substrate upper surface overlaps both the p-doped region and the n-doped region; and forming an at least one quantum emitter in a third location within the substrate, wherein the third location is between first location and the second location.
64. The method of Claim 63, further comprising forming the at least one quantum emitter within the substrate before forming the p-doped region or the n-doped region.
65. The method of Claim 63, further comprising forming the p-doped region and the n-doped region before forming the at least one quantum emitter.
66. The method of Claim 63, wherein the forming the at least one quantum emitter comprises implanting carbon within the substrate to form a G center.
67. The method of Claim 64, further comprising implanting hydrogen within the substrate to form a T center.
68. The method of Claim 63, wherein the substrate comprises silicon.
69. The method of Claim 68, wherein the forming a p-doped region comprises implanting boron through an aperture of a lithographic mask.
70. The method of Claim 68, wherein the forming an n-doped region comprises implanting phosphorous through an aperture of a lithographic mask.
71. The method of Claim 63, further comprising forming electrical contacts coupled to the p- doped region and the n-doped region using metal evaporation.
72. The method of Claim 71, further comprising wire bonding to the electrical contacts.
73. A method, comprising: forming a p-doped region in a first location within a substrate, the substrate comprising an upper surface; forming an n-doped region in a second location within the substrate, wherein no line perpendicular to the substrate upper surface intersects both the p-doped region and the n- doped region; forming an at least one quantum emitter in a third location within the substrate, wherein the third location is between the first location and the second location.
74. The method of Claim 73, further comprising forming the at least one quantum emitter within the substrate before forming the p-doped region or the n-doped region.
75. The method of Claim 73, further comprising forming the p-doped region and the n-doped region before forming the at least one quantum emitter.
76. The method of Claim 73, wherein the forming the at least one quantum emitter comprises implanting carbon within the substrate to form a G center.
77. The method of Claim 74, further comprising implanting hydrogen within the substrate to form a T center.
78. The method of Claim 73, wherein the substrate comprises silicon.
79. The method of Claim 78, wherein the forming a p-doped region comprises implanting boron through an aperture in a lithographic mask.
80. The method of Claim 78, wherein the forming an n-doped region comprises implanting phosphorous through an aperture in a lithographic mask.
81. The method of Claim 73, further comprising forming electrical contacts coupled to the p- doped region and the n-doped region using metal evaporation.
82. The method of Claim 81, further comprising wire bonding to the electrical contacts.