Optoelectronic component and method of producing an optoelectronic component

Abstract

An optoelectronic component (25) comprises a plurality of optoelectronic arrangements (1). Every optoelectronic arrangement comprises a substrate (2) with a top side (3), a bottom side (3) and side faces (19) an optoelectronic semiconductor chip arranged at the top side (3) and designed to emit electromagnetic radiation at an emission face (13) averted from the substrate (2). The optoelectronic arrangements (1) are arranged laterally next to each other such that the substrates (2) are in parallel with each other. The optoelectronic arrangements (1) are connected mechanically to each other by a frame (26) arranged between the side faces (19) of substrates (2) of neighbouring optoelectronic arrangements (1) and extending between the bottom sides (4) and the top sides (3) of the substrates (2).

Description

[0001] OPTOELECTRONIC COMPONENT AND METHOD OF PRODUCING AN

[0002] OPTOELECTRONIC COMPONENT

[0003] DESCRIPTION

[0004] The present invention refers to an optoelectronic component and a method of producing an optoelectronic component .

[0005] This patent application claims priority from German patent application DE 10 2024 108 960 . 1 , the disclosure of which is hereby incorporated by reference .

[0006] From the prior art automobiles comprising ADB-headl ights ( adaptive driving beam) are known, which are designed to ensure improved illumination of a route and at the same time to darken an area of oncoming traf fic .

[0007] Various approaches are currently known for implementing ADB modules . For example , ADB modules with discrete chip packages ( CSP) are known . In this case , the chip housings must be arranged very close to one another when producing an ADB headlight , since a CSP always comprises a distance between the luminous surfaces of individual pixels , which is usually larger than typical distances between surface mounted devices ( SMD) .

[0008] This criterion is contradicted by the fact that in the case of a CSP, the chip is embedded in a housing material using FAM ( film-assisted molding) , a variation of trans fer molding, which means that the housing walls have a signi ficant thickness parallel to the luminous area . Due to the lateral distances between the luminous surfaces of discrete chips , complex optics may be required to produce a coherent luminous image . Furthermore , arranging and soldering discrete chips at close spacings requires more complex and costly techniques which may not be available . Furthermore , ADB headlights with an integrated circuit ( IC ) and an LED chip ( light emitting diodes ) arranged on the integrated circuit are known . Smaller distances , a homogeneous illuminated area and a high resolution can be achieved . Such approaches also enable simpler optical systems , but they are rather expensive as a component , since a correspondingly large IC and LED chip must be provided for each luminous area size .

[0009] An obj ect of the present invention is to provide an improved optoelectronic component and to speci fy an improved method for producing an optoelectronic component . This obj ect is achieved by an optoelectronic component and a method for producing an optoelectronic component with the features of the respective independent claims . Advantageous further developments are speci fied in dependent claims .

[0010] An optoelectronic component comprises a plurality o f optoelectronic arrangements . Every optoelectronic arrangement comprises a substrate with a top side , a bottom side averted from the top side and side faces extending between the top side and the bottom side and an optoelectronic semiconductor chip arranged at the top side of the substrate and designed to emit electromagnetic radiation at an emission face averted from the top side of the substrate . The optoelectronic arrangements are arranged laterally next to each other such that the substrates of the optoelectronic arrangements are in parallel with each other . The optoelectronic arrangements are connected mechanically to each other by a frame arranged between the side faces of substrates of neighbouring optoelectronic arrangements and extending between the bottom sides and the top sides of the substrates .

[0011] In other words , the substrates of the individual optoelectronic arrangements are embedded into the frame such the frame is arranged in an area between the side faces of the substrates and the bottom sides and the top sides o f the substrates . The frame connects the substrates of neighbouring optoelectronic arrangements mechanically, e . g . by a cohesive connection to the side faces .

[0012] The optoelectronic component is based on the idea to provide a module comprising a plurality of optoelectronic arrangements which also can be called pixels , wherein the pixels are not implemented on a carrier simultaneously but rather are produced separately first and then arranged on a temporary carrier in order to connect them with the frame . The optoelectronic component comprising the connected optoelectronic arrangements can also be called a module comprising a plurality of pixels , e . g . an LED module .

[0013] Advantageously, a plurality of modules can be used to produce larger arrays . The optoelectronic component with several modules can be designed, for example , as an ADB headlight . In this case , the modules can also be referred to as ADB modules . Here , the problem of arranging the individual pixels with high precision is addressed by using prefabricated modules which already comprise small lateral distances between the emission faces of the optoelectronic semiconductor chips of neighbouring pixels . Thus , the module comprises a homogenous emission characteristic and a high contrast . As an arrangement and soldering of the individual pixels with precision can be omitted by using the modules , manufacturing costs can be reduced signi ficantly .

[0014] The individual optoelectronic arrangements / pixels can also be tested prior to connecting them with the frame . This advantageously allows signi ficant loss in terms of yield to be avoided as a yield loss of individual pixels within an array is increased in comparison to pixels that are manufactured simultaneously within a component .

[0015] In an embodiment a wavelength converting material i s arranged at the emission faces of the optoelectronic semiconductor chips . The wavelength-converting material is designed to absorb electromagnetic radiation of a first wavelength spectrum emitted by the optoelectronic semiconductor chips and to emit electromagnetic radiation of a second wavelength spectrum . Advantageously, in total electromagnetic radiation with a combined wavelength spectrum is emitted .

[0016] For example , the optoelectronic semiconductor chips can be designed to emit blue light , while the wavelength-converting material is designed to absorb the blue light and, after relaxation to lower energy levels , to emit yellow light . In total , white light is emitted, as advantageously is required for ADB headlights . The white conversion can be achieved by a thin layer of the wavelength-converting material and advantageously of fers a high contrast . This means that the requirements in the area of ADB headlights of automobiles can be met .

[0017] In an embodiment a stabili zing layer is arranged at the emission faces of the optoelectronic semiconductor chips or at surfaces of the wavelength converting material averted from the emission faces of the optoelectronic semiconductor chips . In other words , the stabili zing layer is arranged at the emission faces of all optoelectronic semiconductor chips of the optoelectronic arrangements or at the surfaces of each wavelength converting material arranged at the emis sion faces . Advantageously, the optoelectronic component is temporarily stabili zed mechanically in addition to the permanent stability provided by the frame . The stabili zing layer also protects the module against contaminations . Furthermore , the emission faces of the optoelectronic semiconductor chips and electrical contacts of the module can be protected by providing the stabili zing layer .

[0018] The stabili zing layer can be designed as a tape , for example . A tape may be preferred when the frame provides suf ficient mechanical stability . However, the frame can also be flexible . In this case , it is expedient that the stabili zing layer is designed as a hard casting providing signi ficant mechani- cal stability . The hard casting can comprise glass , a metal or silicon, for example .

[0019] In an embodiment the optoelectronic semiconductor chips comprise a mount face facing the top sides of the substrates and side facets extending between the mount faces and the emission faces . The optoelectronic semiconductor chips are arranged at the top sides of the substrates such that three side facets of each optoelectronic semiconductor chip are flush with three side faces of the substrates or such that the optoelectronic semiconductor chips protrude over three side faces of the substrates .

[0020] Alternatively, in an embodiment the optoelectronic semiconductor chips are arranged at the top sides of the substrates such that two side facets of each optoelectronic semiconductor chip are flush with two side faces of the substrates , respectively, or such that the optoelectronic semiconductor chips protrude over two side faces of the substrates , respectively . Generally, the optoelectronic semiconductor chips can be arranged at the top sides of the substrates such that at least one side facet of each optoelectronic semiconductor chip is flush with one side face of the respective substrate , or such that the optoelectronic semiconductor chips protrude over at least one side face of the substrates , respectively .

[0021] In an embodiment the substrates each comprise a side face averted from the optoelectronic semiconductor chips . A lateral distance between the emission faces of optoelectronic semiconductor chips of neighbouring optoelectronic semiconductor arrangements is smaller than a distance between the optoelectronic semiconductor chips and the side faces of the substrates averted from the optoelectronic semiconductor chips , particularly smaller than 10% of the distance between the optoelectronic semiconductor chips and the averted side faces . In other words , in a configuration where the optoelectronic semiconductor chips are arranged at the top sides o f the substrates such that at least one side facet of each optoelectronic semiconductor chip is flush with one side face of the respective substrate , or such that the optoelectronic semiconductor chips protrude over at least one side face of the substrates , respectively, the substrates always protrude under the optoelectronic semiconductor chips . Those s ide faces of the substrates which are neither flush with the optoelectronic semiconductor chips nor protruded by the optoelectronic semiconductor chips are the side faces of the substrates which are averted from the optoelectronic semiconductor chips .

[0022] Advantageously, the optoelectronic arrangements in this configuration only comprise a narrow non-luminous stripe which is formed between the optoelectronic semiconductor chips and the side faces averted from the optoelectronic semiconductor chips . The non-luminous stripes are formed by parts of the substrates , namely those parts which protrude under the optoelectronic semiconductor chips , respectively . The distance between the optoelectronic semiconductor chips and the side faces of the substrates averted from the optoelectronic semiconductor chips can also be called a width of the non- luminous stripes .

[0023] Since the lateral distance between the emission faces of optoelectronic semiconductor chips of neighbouring optoelectronic semiconductor arrangements is smaller than the width of the non-luminous stripes , the emission faces of neighbouring pixels in the module comprise a very small distance to each other .

[0024] In other words , the distance between the emission faces of the optoelectronic semiconductor chips of neighbouring optoelectronic arrangements can be smaller than 10% than a width of the non-luminous stripes of the optoelectronic arrangements measured from the optoelectronic semiconductor chips to the side faces of the substrates averted from the optoelectronic semiconductor chips . However, the distance between the emission faces of the optoelectronic semiconductor chips of neighbouring optoelectronic arrangements is not limited to a speci fic value , in general .

[0025] In an embodiment the optoelectronic semiconductor chips are pixelated each comprising a plurality of emission faces averted from the top sides of the substrates . Advantageously, the optoelectronic component comprises subpixels with a very small distance between each other .

[0026] In an embodiment , when the optoelectronic semiconductor chips are not pixelated, the optoelectronic arrangements comprise the following exemplary contact pads . A first upper and a second upper contact pad is arranged at each top side of the substrates , respectively . The optoelectronic semiconductor chips are arranged at the first upper contact pads and electrically connected to them, respectively . The second upper contact pads are arranged within the non-luminous stripe . Thus , the non-luminous stripe can be mainly limited to the area of the second contact pad and a part of the first upper contact pad .

[0027] In another embodiment , a first lower and a second lower contact pad is arranged at each bottom side of the substrates , respectively . The first upper contact pads are electrically connected to the first lower contact pads and the second upper contact pads are electrically connected to the second lower contact pads , respectively . Advantageously, the optoelectronic arrangement can be contacted at the bottom side of the substrate .

[0028] I f the optoelectronic semiconductor chips are pixelated, each optoelectronic arrangement can comprise more contact pads . For example , i f the optoelectronic semiconductor chips comprise two subpixels each optoelectronic arrangement can com- prise three upper contact pads and optionally three lower contact pads in total .

[0029] In an embodiment the optoelectronic semiconductor chips each comprise a top contact pad arranged at the emission face . The top contact pads are connected to the second upper contact pads by a bonding wire . In an embodiment the bonding wire is embedded into an encapsulation .

[0030] In an embodiment the optoelectronic component comprises a carrier and at least one module of mechanically connected optoelectronic arrangements according to one of the embodiments described . The module and at least one integrated circuit are arranged on the carrier and connected to each other electrically . E . g . , the first and third upper contact pads can be connected by bonding wires to further contacts pads of the integrated circuit ( IC ) . The IC can be designed as a driver IC . The IC can also comprise a bus connection .

[0031] A method of producing an optoelectronic component comprises the following method steps . A plurality of individual optoelectronic arrangements is provided . Providing the optoelectronic arrangements can comprise producing the individual optoelectronic arrangements . Every optoelectronic arrangement comprises a substrate with a top side , a bottom side averted from the top side and side faces extending between the top side and the bottom side and an optoelectronic semiconductor chip arranged at the top side of the substrate and designed to emit electromagnetic radiation at an emission face averted from the top side of the substrate . The optoelectronic arrangements are arranged laterally next to each other on a temporary carrier such that the substrates of the optoelectronic arrangements are in parallel with each other . The optoelectronic arrangements are connected mechanically with each other by arranging a frame material on the temporary carrier, between the side faces of substrates of neighbouring optoelectronic arrangements and between the bottom sides and the top sides of the substrates . The temporary carrier is removed afterwards .

[0032] The optoelectronic arrangements can be arranged laterally next to each other with high precision and close spacing . Interconnected optoelectronic arrangements form modules . After the temporary carrier has been removed, the modules can be used to create larger, two-dimensional arrays without the optoelectronic arrangements having to be arranged individually on a carrier .

[0033] In an embodiment the frame is arranged by dispensing between the substrates of the optoelectronic arrangements . Advantageously, the optoelectronic arrangements can be connected very easily by dispensing a material on a carrier and between the substrates . The frame can be designed as a hard casting and e . g . comprise one the following materials : silicone , titanium dioxide , silicon dioxide , aluminium oxide . I f the frame comprises a plastic, it can also comprise a f iller material , e . g . filler particles to provide sti f fness .

[0034] In an embodiment operation of individual optoelectronic arrangements is tested before arranging the optoelectronic arrangements at the temporary carrier . Advantageously, only properly operating optoelectronic arrangements can be used and connected by the frame after testing . Thus , a total yield of the optoelectronic component can be improved signi ficantly as it is possible to use only properly working optoelectronic arrangements for the optoelectronic component . A mal functioning optoelectronic arrangement would lead to an individual yield loss of a pixel which in an array of pixels accumulates to a signi ficantly larger total yield loss .

[0035] In an embodiment a stabili zing layer is arranged at the emission faces of the optoelectronic semiconductor chip after connecting the optoelectronic arrangements . Optionally the stabili zing layer can be arranged at the wavelength convert- ing material . Advantageously, the stabili zing layer provides additional mechanical stability and protection .

[0036] In an embodiment at least one module of connected optoelectronic arrangements is arranged on a carrier and connected to at least one integrated circuit electrically, e . g . to a driver IC . The optional stabili zing can be removed before or after arranging the module on the carrier and before connecting it to the IC .

[0037] The above-described properties , features and advantages of this invention and the way in which they are achieved will become clearer and more clearly understood in association with the following description of the exemplary embodiments which are explained in greater detail in association with the drawings . Here in schematic illustration in each case :

[0038] Fig . 1 : an optoelectronic arrangement according to a first embodiment in a top view and a sectional side view;

[0039] Fig . 2 : an optoelectronic arrangement according to a second embodiment in a top view and a sectional side view;

[0040] Fig . 3 : an optoelectronic arrangement according to a third embodiment in a top view and a sectional side view;

[0041] Fig . 4 : an optoelectronic arrangement according to a fourth embodiment in a top view;

[0042] Fig . 5 : an optoelectronic component in a top view and a side view;

[0043] Fig . 6 : a further optoelectronic component in a top view and a sectional side view;

[0044] Fig . 7 : method steps of producing the optoelectronic component . Fig. 1 schematically shows an optoelectronic arrangement 1 according to a first exemplary embodiment in a top view and a sectional side view along a plane indicated in the top view.

[0045] The optoelectronic arrangement 1 comprises a substrate 2. The substrate 2 comprises a top side 3, a bottom side 4 averted from the top side 3 and side faces 19 extending between the top side 3 and the bottom side 4. The substrate 2 exemplary is designed as a ceramic substrate and comprises aluminium nitride (AIN) . However, the substrate 2 can comprise other materials alternatively or in addition, e.g. silicon.

[0046] At the top side 3 of the substrate 2 a first upper contact pad 5 and a second upper contact pad 6 are arranged. At the bottom side 4 of the substrate 2 a first lower contact pad 8 and a second lower contact pad 9 are arranged. The first upper contact pad 5 is electrically connected to the first lower contact pad 8 and the second upper contact pad 6 to the second lower contact pad 9.

[0047] The upper contact pads 5, 6 are arranged laterally next to each other on the top side 3 of the substrate 2. The lower contact pads 8, 9 are arranged laterally next to each other on the bottom side 4 of the substrate 2. The upper contact pads 5, 6 and the lower contact pads 8, 9 are connected to each other by electrical vias 11. The vias 11 extend from the bottom side 4 to the top side 2 of the substrate 2. The contact pads 5, 6, 8, 9, and the vias 11 comprise a metallic material, e.g. copper. The contact pads 5, 6, 8, 9 can comprise a gold coating in addition. However, the contact pads 5, 6, 8, 9 and the vias 11 can also comprise other metallic or electrically conductive materials. Generally, the lower contact pads 8, 9 and the vias 11 can also be omitted.

[0048] In an alternative embodiment the substrate 2 is designed as a lead frame substrate comprising e.g. copper and a gold coating against oxidation. In this case, the upper and lower con- tact pads 5 , 6 , 8 , 9 which are connected electrical ly to each other are formed by sections of the lead frame substrate , respectively . For example , the first upper and the first lower contact pads 5 , 8 are formed by a section of the lead frame substrate extending from the bottom side 4 to the top side 3 . In this case , no vias 11 are necessary to contact upper and lower contact pads 5 , 6 , 8 , 9 with each other as the substrate 2 is conductive and the contact pads 5 , 6 , 8 , 9 are formed by surfaces of sections of the lead frame substrate .

[0049] An optoelectronic semiconductor chip 12 is arranged at the first upper contact pad 5 and electrically connected to it . The optoelectronic semiconductor chip 12 is designed to emit electromagnetic radiation at an emission face 13 averted from the top side 3 of the substrate 2 . The optoelectronic semiconductor chip 12 can be designed, for example , as a lightemitting diode ( LED) . Alternatively, the optoelectronic semiconductor chip 12 can be designed as a laser diode . A solder material 24 can be arranged between the first upper contact surface 5 and the optoelectronic semiconductor chip 12 , whereby the optoelectronic semiconductor chip 12 is cohesively connected to the first upper contact surface 5 , i . e . fixed and electrically connected to it .

[0050] In addition to the top view and the side sectional view, a transparent top view is shown in FIG . 1 , which illustrates the arrangement of the upper contact surfaces 5 , 6 on the top 3 of the substrates 2 . In the transparent top view, the section plane along which the side section view runs i s also shown .

[0051] The first upper contact pad 5 protrudes below the optoelectronic semiconductor chip 12 . In other words , the optoelectronic semiconductor chip 12 does not cover the entire first upper contact pad 5 . A section of the first upper contact pad 5 that is not covered by the optoelectronic semiconductor chip 12 is arranged laterally next to the second upper contact pad 6 . As a result , both the first upper and the second upper contact pad 5 , 6 are exposed and can be contacted electrically . The lower contact pads 8 , 9 and the vias 11 can also be omitted .

[0052] A wavelength-converting material 14 is arranged on the emission face 13 of the optoelectronic semiconductor chip 12 . The wavelength-converting material 14 comprises a phosphor, which is embedded, for example , in a plastic, such as a s ilicone . The phosphor is designed to absorb electromagnetic radiation that is emitted by the optoelectronic semiconductor chip 12 during operation and to emit electromagnetic radiation of a longer wavelength . Overall , electromagnetic radiation is emitted which corresponds to a superposition of the emission spectrum of the optoelectronic semiconductor chip 12 and the emission spectrum of the phosphor, whereby, for example , white light can be generated . The ef ficiency of the conversion depends on a concentration of the phosphor and a thickness of the wavelength-converting material 14 measured in relation to the emission face 13 of the optoelectronic semiconductor chip 12 . The wavelength-converting material 14 can, for example , comprise a thickness that is greater than a thickness of the optoelectronic semiconductor chip 12 . Di fferent thicknesses of the wavelength-converting material 14 are therefore possible . However, the wavelength-converting material 14 can also be omitted .

[0053] Furthermore , an electrical top contact pad 15 is arranged on the emission face 13 of the optoelectronic semiconductor chip 12 . The top contact pad 15 is connected to the second upper contact pad 6 by means of a bonding wire 16 . The bonding wire 16 comprises gold, for example . The bonding wire 16 is embedded in an encapsulation 17 . The encapsulation 17 comprises a dielectric material , for example a silicone , silicon dioxide , titanium dioxide or aluminium oxide . The encapsulation 17 can therefore be either soft or hard (hard casting) . In order to embed the bonding wire 16 , the encapsulation 17 is arranged partly on the top side 3 of the substrate 2 and partly on the emission face 13 of the optoelectronic semiconductor chip 12 . As a result , the optoelectronic semiconductor chip 12 is at least partially embedded in the encapsulation 17 . The wavelength-converting material 14 , however, is not embedded in the encapsulation 17 .

[0054] The encapsulation 17 is also arranged on the top side 3 of the substrate 2 in such a way that the first and second upper contact pads 6 , 7 are each partially embedded in the encapsulation 17 and are at least partially exposed . This enables electrical contacting of the optoelectronic arrangements 1 , e . g . with an IC . However, the top contact pad 15 , the bonding wire 16 and the encapsulation 17 can also be omitted .

[0055] The optoelectronic semiconductor chip 12 comprises a rectangular cross section parallel to the substrate 2 . The optoelectronic semiconductor chip 12 comprises side facets 18 which extend perpendicular to the emission surface 13 and perpendicular to the top side 3 of the substrate 2 . The optoelectronic semiconductor chip 12 is arranged at the top side 3 of the substrate 2 such that three side facets 18 are flush with three side faces 19 of the substrate 2 . In other words , a lateral distance between the optoelectronic semiconductor chip 12 and the side faces 19 in three directions parallel to the substrate 2 is zero when neglecting tolerances . In other embodiments , the three side surfaces 18 are not formed exactly flush with the substrate edge 19 . However, it is expedient for the distance to be chosen as small as possible in order to achieve a maximum luminous area in relation to a base area of the opto-electronic arrangement 1 . Alternatively, the optoelectronic semiconductor chip 12 is arranged such that it protrudes over the three side faces 19 of the substrate 2 . In other embodiments , the optoelectronic semiconductor chip 12 can be arranged such that at least two side facets 18 are flush with a side face 19 of the substrate 2 or protrude over it .

[0056] As the optoelectronic semiconductor chip 12 is arranged at the first upper contact pad 5 , the upper contact pads 5 , 6 are arranged laterally next to each other and three side facets 18 of the optoelectronic semiconductor chip 12 are flush with three side faces 19 of the substrate 2 , the optoelectronic arrangement 1 comprises a non-luminous stripe 20 . An area of the non- emitting stripe 20 is mainly given by a total area of the section of the first upper contact pad 5 being not covered by the optoelectronic semiconductor chip 12 , the second upper contact pad 6 and an area formed between the first and second upper contact pads 5 , 6 .

[0057] Fig . 2 schematically shows an optoelectronic arrangement 1 according to another embodiment in a top view and a sectional side view . The optoelectronic arrangement 1 of Fig . 2 comprises similarities to the optoelectronic arrangement 1 according to Fig . 1 . In the following only the di f ferences are described . The reference numerals are maintained for similar or identical elements .

[0058] As an example , the wavelength converting material o f the optoelectronic arrangement 1 of Fig . 2 is thicker than the wavelength converting material 14 of the optoelectronic arrangement 1 of Fig . 1 , particularly it is thicker than the optoelectronic semiconductor chip 12 . Thus , a conversion efficiency can be improved .

[0059] In addition, in contrast to the embodiment of Fig . 1 , the first and second upper contact pads 5 , 6 are completely embedded in the encapsulation 17 . The encapsulation 17 extends over the entire non-luminous edge 20 of the optoelectronic arrangement 1 . The wavelength-converting material 14 is flush with the encapsulation 17 on a side facing away from the top side 3 of the substrate 2 , which is not necessary, but has the advantage of a planar top side of the optoelectronic arrangement 1 , on which, for example , fewer dust particles can accumulate .

[0060] Fig . 3a schematically shows an optoelectronic arrangement 1 according to another embodiment in a top view and a sectional side view . The optoelectronic arrangement 1 of Fig . 3a comprises similarities to the optoelectronic arrangement 1 according to Fig . 2 . In the following only the di f ferences are described . The reference numerals are maintained for similar or identical elements .

[0061] In contrast to the embodiment of Fig . 2 , the optoelectronic arrangement 1 according to Fig . 3a comprises a temporary encapsulation 21 in addition to the permanent encapsulation 17 . The temporary encapsulation 21 comprises two separate sections which are arranged on the first contact pad 5 and on the second upper contact pad 6 , respectively, and extend from the first and second upper contact pads 5 , 6 perpendicularly to the top side 3 of the substrate 2 through the encapsulation 17 . The temporary encapsulation 21 is removable . For example , the temporary encapsulation 21 can be dissolved or etched, wherein the encapsulation 17 remains .

[0062] Fig . 3b schematically shows an optoelectronic arrangement 1 according to another embodiment in a top view and a sectional side view . The optoelectronic arrangement 1 of Fig . 3b comprises similarities to the optoelectronic arrangement 1 according to Fig . 3a . In the following only the di f ferences are described . The reference numerals are maintained for similar or identical elements .

[0063] Removing the temporary encapsulation 21 enables electrical contacting of first and second upper contact pads 5 , 6. The optoelectronic arrangement 1 of Fig . 3b therefore comprises additional contacts 22 arranged within cavities of the encapsulation 17 remaining after removing the temporary encapsulation 21 . The additional contacts 22 can comprise si licon, copper or aluminium, as an example . The additional contacts 22 are exposed at a surface of the encapsulation 17 facing away from the top side 3 of the substrate 2 to enable an electrical contactability . In this case , the first and second upper contact pads 5 , 6 are completely embedded in the encapsulation 17 because they don' t have to be contacted in the area of the top side 3 of the substrate 2 but rather at the exposed parts of the additional contacts 22 .

[0064] Fig . 3c schematically shows an optoelectronic arrangement 1 according to another embodiment in a top view and a sectional side view . The optoelectronic arrangement 1 of Fig . 3c comprises similarities to the optoelectronic arrangement 1 according to Fig . 3b . In the following only the di f ferences are described . The reference numerals are maintained for similar or identical elements .

[0065] The optoelectronic arrangement 1 of Fig . 3c has no lower contact pads 8 , 9 and no electrical vias 11 . Instead, a connecting layer 43 is arranged on the underside 4 , which can be electrically conductive or insulating . The connection layer 43 can comprise a metal , for example . The connecting layer 43 can also be designed as an adhesive . The optoelectronic arrangement 1 of Fig . 3c can be arranged on a carrier . The material of the connecting layer 43 can be selected depending on the method of connecting the optoelectronic arrangement 1 to a carrier . The connecting layer 43 can be designed as an interface adhesive , for example .

[0066] Fig . 4 schematically shows an optoelectronic arrangement 1 according to another embodiment in a top view . The optoelectronic arrangement 1 of Fig . 4 comprises similarities to the optoelectronic arrangement 1 according to Fig . 1 . In the following only the di f ferences are described . The reference numerals are maintained for similar or identical elements .

[0067] The optoelectronic semiconductor chip 12 of the optoelectronic arrangement of Fig . 4 is pixelated comprising a plurality of emission faces 13 averted from the top side 3 of the substrate 2 . Exemplarily, the optoelectronic semiconductor chip 12 comprises two subpixels 23 , i . e . the optoelectronic semiconductor chip 12 comprises two separate emission faces 13 formed laterally next to each other . The subpixels 23 are connected in series with each other, as an example . In this case , the optoelectronic arrangement comprises a third upper contact pad 7 arranged on the top side 3 of the substrate 2 . Also , a third lower contact pad can be arranged at the bottom side 4 of the substrate 2 which is electrically connected to the third upper contact pad 7 , i f lower contact pads 8 , 9 are provided .

[0068] Fig . 5 schematically shows an optoelectronic component 25 in a cross-sectional side view and a top view . The optoelectronic component 25 comprises a plurality of optoelectronic arrangements 1 according to Fig . 1 and additional elements . However, the optoelectronic component 25 can also comprise an optoelectronic arrangement 1 according to any other embodiment described in Fig . 2 to 4 . Previously used reference numerals are maintained in the following description .

[0069] The optoelectronic arrangements 1 are arranged laterally next to each other such that the substrates 2 are in parallel with each other . The optoelectronic arrangements 1 are connected mechanically to each other by a frame 26 arranged between the side faces 19 of substrates 2 of neighbouring optoelectronic arrangements 1 and extending between the bottom sides 4 and the top sides 3 of the substrates 2 . The frame 26 can also protrude over the bottom sides 4 and / or the top sides 3 of the substrates 2 . Fig . 5 exemplarily shows an embodiment where the frame 26 slightly protrudes over the bottom sides 4 of the substrates 2 . However, the frame 26 should not cover the first and second contact pads 5 , 6 and lower contact pads 8 , 9 i f lower contact pads 8 , 9 are provided .

[0070] The frame 26 can be designed as a hard casting which is however not necessary . The frame can comprise a silicone , silicon dioxide , titanium dioxide or aluminium oxide . The frame 26 can also comprise any other suitable material to provide a permanent connection between the side faces 19 of the substrates of neighbouring optoelectronic arrangements 1 cohesively . Thus , the optoelectronic component 25 is formed as a module comprising a plurality of pixels with optional subpixels per optoelectronic arrangement 1 arranged next to each other . Small lateral distances between neighbouring emission faces 13 can be achieved by arranging the optoelectronic arrangements 1 with high precision next to each other when producing the modules .

[0071] In addition, the optoelectronic arrangements 1 comprise the non-luminous stripe 20 . For this reason, the optoelectronic arrangements 1 / modules can be called frameless pixels . The modules can be used to produce even larger arrays on a carrier comprising small distances between pixels . Small distances between emission faces 13 can be achieved in two dimensions due to the frameless pixels . During the production of larger arrays using a plurality of permanently connected optoelectronic arrangements 1 no technical equipment is needed to arrange pixels with small distances to each other as these are already realised in the modules . Thereby, arrays with homogeneous emission characteristics and high contrast can be provides in a simple and cost-ef fective manner .

[0072] Furthermore , the optoelectronic component 25 compri ses a stabili zing layer 27 arranged at the emission faces 13 of the optoelectronic semiconductor chips 12 . In the embodiment with a wavelength converting material 14 arranged at the emission faces 13 of the optoelectronic semiconductor chips 12 the stabili zing layer 27 is arranged at surfaces of the wavelength converting material 14 averted from the emis sion faces 13 of the optoelectronic semiconductor chips 12 .

[0073] Exemplarily, the stabili zing layer 27 is designed as a tape 27 . The tape 27 comprises a plastic 28 and an adhes ive 29 , wherein the tape 27 is arranged such that the adhes ive 29 is facing the emission faces 13 and the plastic 28 is facing away from the emission faces 13 of the optoelectronic arrangements 1 . The tape 27 can comprise Kapton, but may comprise any other suitable material . Also , the stabil i zing lay- er 27 can be designed as a hard casting, comprising silicon dioxide , silicone , or aluminium dioxide and the adhesive 29 . The stabili zing layer 27 provides additional mechanical stability in addition to the frame 26 , especially when designed as a hard casting . However, the stabili zing layer 27 can also be omitted .

[0074] Fig . 6 schematically shows an optoelectronic component 25 according to another embodiment in a top view and a cross- sectional side view along a plane indicated in the top view . Again, as an example , the optoelectronic component 25 comprises a plurality of optoelectronic arrangements 1 according to Fig . 1 and additional elements .

[0075] The optoelectronic component 25 comprises a carrier 30 and at least one module of connected optoelectronic arrangements 1 . The module and at least one integrated circuit 31 ( IC ) are arranged on the carrier 30 and connected to each other electrically . The carrier 30 can be formed as a heat sink and comprise a metal , for example . The carrier 30 can also be designed as a printed circuit board ( PCB ) , alternatively . The module of the optoelectronic arrangements 1 connected mechanically by the frame 26 are fixated on the carrier 30 by an interface adhesive 32 , wherein the bottom sides 4 o f the substrates 2 of the optoelectronic arrangements 1 are facing the carrier 30 and the emission faces 13 are facing away from the carrier 30 . The interface adhesive 32 is arranged between the carrier 30 and the bottom sides 4 of the substrates 2 .

[0076] Exemplarily, two integrated circuits 31 are provided for each optoelectronic arrangement 1 . The integrated circuits 31 can be designed as drivers . Alternatively, or in addition the ICs comprise a bus system . The ICs 31 are arranged next to the module of optoelectronic arrangements 1 on the carrier 30 . As an example , the ICs 31 are arranged on a secondary electronics board 33 which is fixated by the interface adhesive 32 to the carrier 30 . The secondary electronics board 33 comprises further contact pads 34 for contacting the ICs 31 . Exemplar!- ly, for each IC 31 two further pads 34 are provided . A first upper contact pad 5 and a second upper contact pad 6 of an optoelectronic arrangement 1 is connected with a further contact pad 34 by a further bonding wire 35 , respectively . However, the secondary electronics board 33 can be omitted . In this case , the further contact pads 34 con be provided with the carrier 30 . Also , any number of ICs 32 can be provided for any number of optoelectronic arrangements 1 . The number of further contact pads 34 can be chosen according to the number of upper contact pads 5 , 6 .

[0077] Fig . 7 schematically shows method steps of a method of producing the optoelectronic component 25 according to Fig . 5 . Previously used reference numerals are maintained .

[0078] In a first method step, a plurality of individual optoelectronic arrangements 1 is provided . In a second method step, the optoelectronic arrangements 1 are arranged laterally next to each other on a temporary carrier 36 , e . g . a Kapton foil or another suitable temporary carrier 36 . The optoelectronic arrangements 1 are arranged such that the substrates 2 of the optoelectronic arrangements 1 are in parallel with each other .

[0079] In a third method step, the optoelectronic arrangements 1 are connected mechanically with each other by arranging a frame material 37 on the temporary carrier 36 , between the side faces 19 of substrates 2 of neighbouring optoelectronic arrangements 1 and between the bottom sides 4 and the top sides 3 of the substrates 2 . As depicted in Fig . 7 , the frame material 37 can be arranged by dispensing on the temporary carrier 36 . In a fourth method step, the temporary carrier 36 is removed .

[0080] Before arranging the optoelectronic arrangements 1 at the temporary carrier 36 , operation of the individual optoelectronic arrangement 1 can be tested to avoid yield losses . After connecting the optoelectronic arrangements 1 by arranging the frame material 37 the stabili zing layer 27 can be arranged at the emission faces 13 of the optoelectronic semiconductor chips 12 which is however not necessary . At least one module of connected optoelectronic arrangements 1 can be arranged on the carrier 30 and connected to at least one integrated circuit 31 . Before connecting the at least one module to at least one IC 31 , the stabili zing layer 27 can be removed . Thus , the stabili zing layer 27 provides additional mechanical stability until the optoelectronic arrangements 1 permanently connected by the frame 26 are arranged on the carrier 30 .

[0081] The invention has been illustrated and described in detail with the aid of the preferred exemplary embodiments . Nevertheless , the invention is not restricted to the examples disclosed . Rather, other variants may be derived there from by a person skilled in the art without departing from the protective scope of the invention .

[0082] REFERENCE SYMBOLS Optoelectronic arrangement Substrate Top side of the substrate Bottom side of the substrate First upper contact pad Second upper contact pad Third upper contact pad First lower contact pad Second lower contact pad Electrical via Optoelectronic semiconductor chip Emission face of an optoelectronic semiconductor chip Wavelength converting material Top contact pad Bonding wire encapsulation side facet of an optoelectronic semiconductor face side face of the substrate non-luminous stripe of an optoelectronic arrangement temporary encapsulation additional contact subpixel of an optoelectronic arrangement solder optoelectronic component frame stabili zing layer plastic adhesive carrier integrated circuit interface adhesive secondary electronics board further contact pad further bonding wire temporary carrier frame material

Claims

CLAIMS1. Optoelectronic component (25) comprising a plurality of optoelectronic arrangements (1) , wherein every optoelectronic arrangement (1) comprises a substrate (2) with a top side (3) , a bottom side (4) averted from the top side (3) and side faces (19) extending between the top side (3) and the bottom side (4) and an optoelectronic semiconductor chip (12) arranged at the top side (3) of the substrate (2) and designed to emit electromagnetic radiation at an emission face (12) averted from the top side of the substrate (2) , wherein the optoelectronic arrangements (1) are arranged laterally next to each other such that the substrates (2) of the optoelectronic arrangements (1) are in parallel with each other, wherein the optoelectronic arrangements (1) are connected mechanically to each other by a frame (26) arranged between the side faces (19) of substrates (2) of neighbouring optoelectronic arrangements (1) and extending between the bottom sides (4) and the top sides (3) of the substrates (2) .

2. Optoelectronic component (25) according to claim 1, wherein a wavelength converting material (14) is arranged at the emission faces (14) of the optoelectronic semiconductor chips ( 12 ) .

3. Optoelectronic component (25) according to claim 1 or 2, wherein a stabilizing layer (27) is arranged at the emission faces (13) of the optoelectronic semiconductor chips (12) or at surfaces of the wavelength converting material (14) averted from the emission faces (13) of the optoelectronic semiconductor chips (12) .

4. Optoelectronic component (25) according to one of the previous claims, wherein the optoelectronic semiconductor chips (12) comprise a mount face facing the top sides (3) of the substrates (2)and side facets (18) extending between the mount faces and the emission faces (13) , wherein the optoelectronic semiconductor chips (12) are arranged at the top sides (3) of the substrates (2) such that three side facets (18) of each optoelectronic semiconductor chip (12) are flush with three side faces (19) of the substrates (2) or such that the optoelectronic semiconductor chips (12) protrude over three side faces (19) of the substrates ( 2 ) .

5. Optoelectronic component (25) according to claim 4, wherein the substrates ( 2 ) each comprise a side face (19) averted from the optoelectronic semiconductor chips (12) , wherein a lateral distance between the emission faces (13) of optoelectronic semiconductor chips (12) of neighbouring optoelectronic semiconductor arrangements (1) is smaller than a distance between the optoelectronic semiconductor chips (12) and the side faces (19) of the substrates (2) averted from the optoelectronic semiconductor chips (12) , particularly smaller than 10% of the distance between the optoelectronic semiconductor chips (12) and the averted side faces (19) .

6. Optoelectronic component (25) according to one of the previous claims, wherein a first upper and a second upper contact pad (5, 6) is arranged at each top side (3) of the substrates (2) , respectively, wherein the optoelectronic semiconductor chips (12) are arranged at the first upper contact pads (5) and electrically connected to them, respectively.

7. Optoelectronic component (25) according to claim 6, wherein the optoelectronic semiconductor chips (12) each comprise a top contact pad (15) arranged at the emission face(13) , wherein the top contact pads (15) are connected to the second upper contact pads (6) by a bonding wire (16) .

8. Optoelectronic component (25) according to one of the previous claims, wherein the bonding wire (16) is embedded into an encapsulation ( 17 ) .

9. Optoelectronic component (25) according to one of the previous claims, wherein the optoelectronic semiconductor chips (12) are pixe- lated each comprising a plurality of emission faces (13) averted from the top sides (3) of the substrates (2) .

10. Optoelectronic component (25) according to one of the previous claims, comprising a carrier (30) and at least one module of mechanically connected optoelectronic arrangements (1) , wherein the module and at least one integrated circuit (31) are arranged on the carrier (30) and connected to each other electrically .

11. Method of producing an optoelectronic component (25) comprising the following method steps:- providing a plurality of individual optoelectronic arrangements ( 1 ) , wherein every optoelectronic arrangement (1) comprises a substrate (2) with a top side (3) , a bottom side (4) averted from the top side (3) and side faces (19) extending between the top side (3) and the bottom side (4) and an optoelectronic semiconductor chip (12) arranged at the top side (3) of the substrate (2) and designed to emit electromagnetic radiation at an emission face (13) averted from the top side (3) of the substrate (2) ,- arranging the optoelectronic arrangements (1) laterally next to each other on a temporary carrier (36) such that the substrates (2) of the optoelectronic arrangements (1) are in parallel with each other,- connecting the optoelectronic arrangements (1) mechanically with each other by arranging a frame material (37) on the temporary carrier (36) , between the side faces (19) of sub-strates (2) of neighbouring optoelectronic arrangements (1) and between the bottom sides (4) and the top sides (3) of the substrates ( 2 ) ,- removing the temporary carrier (36) .

12. The method according to claim 11 comprising the following additional method step before arranging the optoelectronic arrangements (12) at the temporary carrier (36) :- testing operation of individual optoelectronic arrangements (1) •13. The method according to claim 11 or 12 comprising the following additional method step after connecting the optoelectronic arrangements (1) :- arranging a stabilizing layer (27) at the emission faces (13) of the optoelectronic semiconductor chips (12) .

14. The method according to one of the claims 11 to 13 comprising the following additional method steps:- arranging at least one module of connected optoelectronic arrangements on a carrier (30) ,- connecting the module to at least one integrated circuit (31) electrically.

15. The method according to one of the claims 11 to 14, wherein the frame material (37) is arranged by dispensing between the substrates (2) of the optoelectronic arrangements (1) •

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