Semiconductor device

Abstract

The present invention provides a semiconductor device that makes it possible to reduce stress which occurs at the time of bonding and to suppress the occurrence of current resonance. Provided is a semiconductor device comprising a semiconductor element, wiring that is formed on a substrate, and a metal component that is ultrasonically bonded to the wiring, wherein: the semiconductor element is electrically connected to the wiring; the metal component has a main part and a first portion and second portion which each branch from the main part, and the tip end parts of each of which are ultrasonically bonded to the wiring; and the metal component has a slit that is formed in the vicinity of the location where the first portion and the second portion branch from the main part and that is along a direction substantially parallel to a direction from the first portion toward the second portion.

Description

Semiconductor Devices

[0001] The present invention relates to a semiconductor device.

[0002] A power conversion device has a function of converting DC power supplied from a DC power source into AC power for supply to an AC electrical load such as a rotating electric machine, or a function of converting AC power generated by a rotating electric machine into DC power for supply to a DC power source. To perform such a conversion function, the power conversion device has an inverter circuit with a power semiconductor module, and the power semiconductor module repeatedly conducts and cuts off the power, thereby converting DC power to AC power or AC power to DC power.

[0003] A power semiconductor module includes, for example, a semiconductor element and terminals such as an AC terminal, a positive terminal, and a negative terminal (see, for example, Patent Document 1 and Patent Document 2). Each terminal is joined to a wiring pattern on which the semiconductor element is mounted, and is electrically connected to the semiconductor element via the wiring pattern.

[0004] JP 2015-69982 A JP 2023-14524 A

[0005] The terminal has a plurality of legs branching from a flat portion, such as the lead 5 (5a, 5b, 5c) shown in FIG. 3 of Patent Document 1, and the tip of each leg is bonded to a wiring pattern. By having a plurality of legs, the current can be distributed among the legs, thereby increasing the current capacity. In the process of bonding the legs of this terminal, for example, methods such as solder bonding and ultrasonic bonding (metal bonding) are used.

[0006] In the lead 5 (5a, 5b, 5c) shown in Figure 3 of Patent Document 1, multiple legs of the lead are arranged in pairs close to each other. In the case of metal bonding, in the process of joining a terminal with such a configuration, one of the two adjacent legs is joined first, and then the other leg is joined.

[0007] In the process of joining the legs of a terminal, one of the two legs is first joined and fixed, and then the other leg is joined, which can cause large stresses in the terminal, resulting in poor joining or even breakage of the terminal.

[0008] Furthermore, when constructing a semiconductor device with a large current capacity, a configuration is adopted in which the two legs are connected to separate wirings, thereby dividing the current into two wirings. In this configuration, an imbalance in the current flowing through the two wirings can cause current resonance, which can result in noise generation or damage to the element.

[0009] In order to solve the above-mentioned problems, the present invention provides a semiconductor device that can reduce the stress generated during bonding and suppress the occurrence of current resonance.

[0010] The above and other objects of the present invention and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0011] The semiconductor device of the present invention includes a semiconductor element, wiring formed on a substrate, and a metal component ultrasonically bonded to the wiring, with the semiconductor element electrically connected to the wiring. In the semiconductor device of the present invention, the metal component has a main portion and a first portion and a second portion branching from the main portion, each of which has a tip ultrasonically bonded to the wiring. Furthermore, in the semiconductor device of the present invention, the metal component has a slit formed near the point where the first portion and the second portion branch from the main portion, in a direction substantially parallel to the direction from the first portion to the second portion.

[0012] According to the semiconductor device of the present invention, the metal component has a slit formed in a direction substantially parallel to the direction from the first portion to the second portion near a location where the first portion and the second portion branch off from the main portion. By having the slit formed in a direction substantially parallel to the direction from the first portion to the second portion, it is possible to reduce stress generated in the metal component when ultrasonically bonding the first portion and the second portion to the wiring.

[0013] Furthermore, according to the semiconductor device of the present invention, the slits are formed in a direction approximately parallel to the direction from the first portion to the second portion, so that the increase in inductance can be kept small and the occurrence of current resonance can be further suppressed.

[0014] Problems, configurations, and effects other than those described above will become clear from the following description of the embodiments.

[0015] FIG. 1 is a schematic configuration diagram (perspective view) of a terminal of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a schematic configuration diagram (perspective view) of the terminal of FIG. 1 viewed from another angle. FIG. 3 is a schematic configuration diagram (perspective view) showing the configuration of a conventional terminal. FIG. 4 is a schematic configuration diagram (perspective view) of one of two terminals of a semiconductor device according to a second embodiment of the present invention. FIG. 5 is a schematic configuration diagram (perspective view) of the other of two terminals of a semiconductor device according to a third embodiment of the present invention.

[0016] The following describes embodiments and examples of the present invention using text and drawings. However, the structures, materials, and other specific configurations shown in the present invention are not limited to the embodiments and examples described here, and can be appropriately combined or improved within the scope of the present invention. Furthermore, elements not directly related to the present invention are omitted from the illustrations.

[0017] The semiconductor device of the present invention includes a semiconductor element, wiring formed on a substrate, and a metal component ultrasonically bonded to the wiring, with the semiconductor element electrically connected to the wiring. In the semiconductor device of the present invention, the metal component has a main portion and a first portion and a second portion branching from the main portion, each of which has a tip ultrasonically bonded to the wiring. Furthermore, in the semiconductor device of the present invention, the metal component has a slit formed near the point where the first portion and the second portion branch from the main portion, in a direction substantially parallel to the direction from the first portion to the second portion.

[0018] According to the semiconductor device of the present invention, the metal component has a slit formed in the vicinity of where the first and second portions branch off from the main portion, the slit being oriented substantially parallel to the direction from the first portion to the second portion. By having the slit formed substantially parallel to the direction from the first portion to the second portion, it is possible to reduce stress generated in the metal component when ultrasonically bonding the first and second portions to wiring.

[0019] Furthermore, when a slit is formed in a metal part, the slit restricts the current path, increasing inductance. According to the semiconductor device of the present invention, the slit is formed in a direction substantially parallel to the direction from the first portion to the second portion, so that the increase in inductance can be suppressed to a small extent, and further, the occurrence of current resonance can be suppressed.

[0020] In the semiconductor device described above, the metal component may have a main portion formed horizontally and a first portion and a second portion formed as legs branching off from the main portion and extending downward. In this configuration, the main portion of the metal component may be disposed on the chip of the semiconductor element, and the legs may be bonded to wiring on which the chip is mounted.

[0021] In the semiconductor device described above, the metal component may be an AC terminal, or a positive or negative terminal. The AC terminal is a terminal to which AC is supplied, and the positive and negative terminals are terminals to which DC is supplied. In these configurations, an increase in inductance at each terminal can be kept small, thereby suppressing the occurrence of current resonance.

[0022] In the semiconductor device described above, the metal component may be formed by press working, which makes it possible to easily form a metal component having a main portion and a first portion and a second portion branching from the main portion.

[0023] The semiconductor device of the present invention can be applied to semiconductor devices such as power semiconductor modules.

[0024] In the above-described semiconductor device, the semiconductor element may be an element using various semiconductor materials such as silicon, SiC, GaN, etc. The semiconductor element may be a semiconductor chip including, for example, an IGBT (insulated gate bipolar transistor), a MOSFET (metal oxide semiconductor field effect transistor), a diode, etc.

[0025] In the above-described semiconductor device, the metal parts may be made of metals such as copper, aluminum, or alloys thereof.

[0026] In the semiconductor device described above, the metal component has a main portion and first and second portions each branching from the main portion and having a tip ultrasonically bonded to the wiring. In addition to these portions, the metal component may also have a third and fourth portion, or a fifth and sixth portion each branching from the main portion to form a pair.

[0027] The configuration in which the first and second portions are formed as legs allows the main portion to be placed on a semiconductor element chip and the legs to be joined to wiring on which the chip is mounted, and can therefore be applied, for example, to the leads of Patent Document 1 and the terminals of Patent Document 2. Furthermore, the configuration in which the first and second portions are formed as legs can be a configuration in which two or more legs are formed, such as a configuration in which two legs are provided, a configuration in which four legs are provided, a configuration in which six legs are provided, and the like.

[0028] In the semiconductor device described above, the slit is formed near the point where the first and second parts branch off from the main part. The same effect can be obtained whether the slit is formed at the point where the first and second parts branch off from the main part (the base of the branch) or at a point slightly away from the point where the first and second parts branch off from the main part.

[0029] In the semiconductor device described above, the slit is formed in a direction substantially parallel to the direction from the first portion to the second portion. Although the direction of the slit is preferably parallel to the direction from the first portion to the second portion, even if the direction of the slit is slightly offset from the direction from the first portion to the second portion, the same effect as when the slit is parallel can be obtained.

[0030] The configuration of the semiconductor device of the present invention, in which the first and second portions of the metal component branch off from the main portion, has slits near the locations where they branch off from the main portion, is not limited to the configuration in which the first and second portions are formed as legs, and other configurations are also possible. For example, if the height difference between the main portion of the metal component and the wiring is small, instead of legs, the first and second portions branching off from the main portion can be configured to extend horizontally and then extend downward, or to extend diagonally downward at an angle close to horizontal. Even in such a configuration, applying the slits of the present invention can reduce the stress generated during bonding and suppress the increase in current resonance.

[0031] Here, we designed a terminal with two legs, with three configurations: one without a slit, one with a vertical slit midway between the two legs, perpendicular to the direction from one leg to the other, and one with a horizontal slit parallel to the direction from one leg to the other. For each of these terminal configurations, we used computer simulations to investigate the stress generated in the terminal when joining one leg and then the other leg. We also calculated the inductance from the junction of one leg with the wiring to the junction of the other leg for each terminal configuration. The results showed that the configuration with a vertical slit reduced stress compared to the configuration without a slit, but the slit significantly increased inductance, significantly increasing the impact of current resonance. In contrast, the configuration with a horizontal slit (the present invention) reduced stress compared to the configuration without a slit, and suppressed current resonance due to the small increase in inductance caused by the slit.

[0032] Specific examples of the semiconductor device of the present invention will be described below with reference to the drawings. In each of the following examples, the semiconductor device of the present invention is configured as a power semiconductor module as disclosed in Patent Document 1 or Patent Document 2. In each example, the present invention is applied to a terminal used in a power semiconductor module.

[0033] (Example 1) A semiconductor device of Example 1 will be described with reference to Figures 1 to 3. Figure 1 is a schematic diagram (perspective view) of the configuration of a terminal of the semiconductor device of Example 1.

[0034] The terminal 1 shown in Fig. 1 has a flat upper portion 2 with a hole, a central portion (main portion) having a flat portion and vertical portions above and below the flat portion, and two leg portions 3 branching from the lower end of the central portion. This terminal 1 corresponds to the AC terminal 2 shown in Fig. 1 of Patent Document 2.

[0035] The terminal 1 is electrically connected to the semiconductor element via the wiring pattern by joining the two legs 3 to the wiring pattern on which the semiconductor element is mounted, thereby forming a semiconductor device such as the semiconductor power module shown in Patent Document 1 or Patent Document 2.

[0036] The hole in the upper part 2 of the terminal 1 can be used as a hole for inserting a screw to connect to an external terminal of the semiconductor power module and to fix the terminal 1 to the case of the semiconductor power module or the like.

[0037] Fig. 2 is a schematic diagram (perspective view) of the terminal 1 shown in Fig. 1, viewed from a different angle. As shown in Fig. 2, a long, thin slit 4 is provided at the base of each of the two legs 3, which branch off from the center. The slit 4 is formed at the base of each of the legs 3, i.e., at the point where the legs 3 branch off from the center, in a direction substantially parallel to the direction from one of the two legs 3 to the other.

[0038] Fig. 3 is a schematic diagram showing the configuration of a conventional terminal compared to the terminal 1 of the present embodiment shown in Fig. 1 and Fig. 2. In the conventional terminal 50 shown in Fig. 3, the legs 3 extend directly outward on both sides from the lower end of the central portion of the terminal 50. In such a configuration of the conventional terminal 50, when joining one leg 3 and then joining the other leg 3, a large stress is generated in the terminal 50, which may result in poor joining or breakage of the terminal 50.

[0039] 1 and 2, the terminal 1 of this embodiment has a slit 4 formed at the point where the two legs 3 branch off from the center, the slit 4 being substantially parallel to the direction from one leg 3 to the other leg 3. This reduces the stress that occurs when joining one leg 3 after joining the other leg 3. Furthermore, because the slit 4 is formed substantially parallel to the direction from one leg 3 to the other leg 3, it is possible to minimize an increase in inductance and further suppress the occurrence of current resonance.

[0040] (Example 2) A semiconductor device of Example 2 will be described with reference to Figures 4 and 5. Figure 4 is a schematic configuration diagram (perspective view) of one of two terminals of the semiconductor device of Example 2. Figure 5 is a schematic configuration diagram (perspective view) of the other of the two terminals of the semiconductor device of Example 2.

[0041] Terminal 10 shown in Fig. 4 and terminal 20 shown in Fig. 5 have a flat upper portion 2 with a hole, a central portion (main portion) having the flat portion and the portion above it, and two leg portions 3 branching from the left end of the central portion. These terminals 10 and 20 correspond to the positive electrode terminal 3 and negative electrode terminal 4 shown in Fig. 1 of Patent Document 2, respectively.

[0042] 1 and 2, these terminals 10, 20 are electrically connected to the semiconductor element via the wiring pattern by joining the two legs 3 to the wiring pattern on which the semiconductor element is mounted, thereby forming a semiconductor device such as the semiconductor power module shown in Patent Document 1 or Patent Document 2.

[0043] Furthermore, the holes in the upper part 2 of the terminals 10, 20 can be used as holes for inserting screws to connect to the external terminals of the semiconductor power module and to fix the terminals 10, 20 to the case of the semiconductor power module or the like.

[0044] The terminals 10 and 20 of this embodiment are provided with slits 4 formed near the two legs 3 in a direction substantially parallel to the direction from one leg 3 to the other leg 3. This makes it possible to reduce stress that occurs when joining one leg 3 and then joining the other leg 3, similar to the terminal 1 of Example 1 shown in Figures 1 and 2. Furthermore, because the slits 4 are formed in a direction substantially parallel to the direction from one leg 3 to the other leg 3, it is possible to minimize an increase in inductance and further suppress the occurrence of current resonance.

[0045] Third Embodiment A semiconductor device according to a third embodiment will be described with reference to Fig. 6. Fig. 6 is a schematic diagram (perspective view) of the configuration of a terminal of the semiconductor device according to the third embodiment.

[0046] The terminal 30 shown in Fig. 6 has a flat upper portion 2 with a hole, a central portion (main portion) having a flat portion and vertical portions above and below the flat portion, and leg portions 3 branching off from the lower end of the central portion. The terminal 30 shown in Fig. 6 has two pairs of legs 3, for a total of four legs 3. This terminal 30 corresponds to the AC terminal 2 shown in Fig. 1 of Patent Document 2.

[0047] The terminal 30 is electrically connected to the semiconductor element via the wiring pattern by joining the four legs 3 to the wiring pattern on which the semiconductor element is mounted, thereby forming a semiconductor device such as the semiconductor power module shown in Patent Document 1 or Patent Document 2.

[0048] The hole in the upper part 2 of the terminal 30 can be used as a hole for inserting a screw to connect to an external terminal of the semiconductor power module and to fix the terminal 30 to the case of the semiconductor power module or the like.

[0049] The terminal 30 of this embodiment has slits 4 formed near the two legs 3 of each pair, the slits 4 being substantially parallel to the direction from one leg 3 to the other leg 3. This reduces stress that occurs when joining one leg 3 and then joining the other leg 3, similar to the terminal 1 of the first embodiment shown in Figures 1 and 2 and the terminals 10 and 20 of the second embodiment shown in Figures 3 and 4. Furthermore, because the slits 4 are formed substantially parallel to the direction from one leg 3 to the other leg 3, an increase in inductance can be minimized, and further, current resonance can be suppressed.

[0050] The present invention is not limited to the configurations described in the above-mentioned embodiments and examples, and various modifications are possible within the scope of the technical concept of the present invention. In addition, some or all of the configurations described in each example may be combined and applied.

[0051] 1, 10, 20, 30, 50 terminal, 2 upper part, 3 leg part, 4 slit

Claims

1. A semiconductor device comprising: a semiconductor element; wiring formed on a substrate; and a metal component ultrasonically bonded to the wiring, wherein the semiconductor element is electrically connected to the wiring, the metal component having a main portion and a first portion and a second portion each branching off from the main portion and having a tip portion ultrasonically bonded to the wiring, and the metal component having a slit formed in a direction approximately parallel to the direction from the first portion to the second portion near the point where the first portion and the second portion branch off from the main portion.

2. The semiconductor device according to claim 1, wherein the metal part has the main portion formed horizontally, and the first portion and the second portion formed as legs branching off from the main portion and extending downward.

3. The semiconductor device according to claim 1, wherein the metal part is an AC terminal.

4. The semiconductor device according to claim 1, wherein the metal part is a positive terminal or a negative terminal.

5. The semiconductor device according to claim 1, wherein the metal parts are formed by press working.

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