Semiconductor device

Abstract

This semiconductor device is provided with: a base plate having a first main surface; a substrate disposed on the first main surface; a semiconductor element disposed on the substrate; and a resin frame body bonded to the first main surface and surrounding the space above the substrate. A metal plate that has a second surface facing the first main surface is fixed to the frame body. The first main surface and the second surface are joined.

Description

Semiconductor Devices

[0001] This disclosure relates to a semiconductor device. This application claims priority to Japanese Application No. 2024-48927, filed March 26, 2024, and incorporates by reference all of the contents of said Japanese application.

[0002] A technology relating to a power module having a semiconductor element has been disclosed (see, for example, Patent Document 1). The power module disclosed in Patent Document 1 includes an insulating substrate having a semiconductor element bonded to its surface, a base plate bonded to the back surface of the insulating substrate, a case member whose inner periphery of the bottom surface is in contact with the surface of the base plate and whose bottom surface is provided with an inclined surface that becomes more distant from the surface of the base plate as it approaches the outer periphery of the base plate, an adhesive material that fills the gap between the base plate and the inclined surface and bonds the base plate to the case member, and a filler material that fills the area surrounded by the base plate and the case member. The insulating substrate is surrounded by the base plate and the case member.

[0003] WO2019 / 049400

[0004] A semiconductor device according to the present disclosure includes a base plate having a first main surface, a substrate disposed on the first main surface, a semiconductor element disposed on the substrate, and a resin frame fixed to the first main surface and surrounding a space above the substrate. A metal plate having a second surface opposite the first main surface is fixed to the frame. The first main surface and the second surface are bonded together.

[0005] Fig. 1 is a schematic plan view of a semiconductor device in a first embodiment. Fig. 2 is a schematic cross-sectional view of the semiconductor device shown in Fig. 1. Fig. 3 is a schematic cross-sectional view of the semiconductor device shown in Fig. 1. Fig. 4 is a schematic plan view of a semiconductor device in a second embodiment. Fig. 5 is a schematic cross-sectional view of the semiconductor device shown in Fig. 4.

[0006] [Problem to be Solved by the Present Disclosure] According to Patent Document 1, an insulating substrate is bonded to a base plate. The case member and the base plate are bonded with an adhesive. If temperature changes occur during the assembly process, the difference in the linear expansion coefficients of the base plate and the insulating substrate causes the base plate bonded to the insulating substrate to warp, creating a gap between the case member and the base plate. This causes a filler member to enter the gap, resulting in contact between the adhesive and the filler member. Because the adhesive and the charging member are made of different materials, this contact point may become the starting point for delamination. This delamination ultimately leads to a decrease in insulation and damage to the semiconductor device, resulting in a loss of reliability.

[0007] Therefore, one object is to provide a semiconductor device that can improve reliability.

[0008] [Effects of the Present Disclosure] According to such a semiconductor device, it is possible to improve reliability.

[0009] [Description of Embodiments of the Present Disclosure] (1) A semiconductor device according to the present disclosure includes a base plate having a first main surface, a substrate disposed on the first main surface, a semiconductor element disposed on the substrate, and a resin frame fixed to the first main surface and surrounding a space above the substrate. A metal plate having a second surface opposing the first main surface is fixed to the frame. The first main surface and the second surface are bonded together.

[0010] In the semiconductor device described above, a metal plate is fixed to the frame body, and the frame body is fixed onto the first main surface of the base plate. The first main surface of the base plate and the second surface of the metal plate are bonded together. This suppresses warping of the base plate on which the substrate is placed during temperature changes, reducing the risk of gaps forming between the frame body and the base plate. This makes it less likely for separation to occur from gaps, reducing the risk of a decrease in insulation and damage to the semiconductor device. As a result, the semiconductor device described above can improve reliability.

[0011] (2) In the above (1), the semiconductor element and the metal plate may be electrically insulated from each other, thereby preventing current from flowing in or out of the semiconductor element from the metal plate and preventing malfunction of the semiconductor device.

[0012] (3) In the above (1) or (2), the semiconductor device may further include an adhesive that bonds the frame body and the base plate, and a sealant that seals the space surrounded by the frame body. In such a semiconductor device, the gap described above is unlikely to occur, so the frame body and the base plate can be reliably joined by the adhesive, and the sealant can ensure reliable insulation of the semiconductor element.

[0013] (4) In any of (1) to (3) above, the metal plate may have a first portion disposed between the frame body and the substrate when viewed in the thickness direction of the base plate. The first main surface and the second surface may be joined in the first portion. In this way, the metal plate and the frame body are joined at an outer portion of the substrate when viewed in the thickness direction of the base plate, so that warping of the base plate can be more efficiently suppressed and the risk of the above-mentioned gap occurring can be significantly reduced.

[0014] (5) In any of the above (1) to (4), a plurality of metal plates may be provided. In this way, the metal plates and the base plate are joined at a plurality of locations, which more reliably suppresses warping of the base plate and reliably reduces the risk of the above-mentioned gaps occurring.

[0015] (6) In any of the above (1) to (5), the frame may be rectangular when viewed in the thickness direction of the base plate. The metal plate may be provided in an area where the four corners of the frame are located. This allows the metal plate and the base plate to be joined in the area where the four corners of the frame are located, and even with a small number of joining points, warping of the base plate can be reliably suppressed. Therefore, the risk of the above-mentioned gaps occurring can be efficiently and significantly reduced.

[0016] (7) In any of the above (1) to (6), the metal plate may be joined to the base plate by ultrasonic bonding. This allows the metal plate to be reliably joined and fixed to the base plate without the need for a bonding material such as an adhesive. This can therefore improve productivity.

[0017] (8) In any of the above (1) to (6), the metal plate may be fixed to the frame by insert molding. In this way, the metal plate can be attached and fixed during molding of the frame, so that the metal plate can be reliably fixed to the frame. Therefore, the metal plate can be fixed to the frame more reliably and efficiently.

[0018] (9) In any of the above (1) to (8), the substrate may include a circuit board on which a semiconductor element is disposed. The semiconductor device may further include terminals joined to the circuit board. This allows the circuit board and the terminals to be used to easily and reliably control the operation of the semiconductor element. This ensures stable operation of the semiconductor device and further improves its reliability.

[0019] (10) In any of the above (1) to (9), the metal plate may have a second portion extending along the inner periphery of the frame. This allows the metal plate and the base plate to be joined over a wider area along the inner periphery of the frame, more reliably suppressing warping of the base plate. Therefore, the risk of the gap occurring can be reliably reduced.

[0020] [Details of the Embodiments of the Present Disclosure] Next, embodiments of the semiconductor device of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference characters, and description thereof will not be repeated.

[0021] (Embodiment 1) A semiconductor device according to embodiment 1 of the present disclosure will be described. FIG. 1 is a schematic plan view of the semiconductor device according to embodiment 1. FIGS. 2 and 3 are schematic cross-sectional views of the semiconductor device shown in FIG. 1. FIGS. 2 and 3 are cross-sectional views taken along the line II-II in FIG. 1, respectively. A sealing material, which will be described later, is not shown in FIGS. 1 and 2. In FIG. 1 and subsequent drawings, the direction indicated by arrow Z indicates the thickness direction of a base plate, which will be described later, the direction indicated by arrow X indicates the direction in which adjacent terminals, which will be described later, are lined up, and the direction indicated by arrow Y indicates the direction in which opposing terminals face each other. The directions indicated by arrow X, arrow Y, and arrow Z are all orthogonal to each other.

[0022] 1, 2 and 3, a semiconductor device 10a according to the first embodiment includes a base plate 11a, a substrate 12a, six semiconductor elements 13a (first semiconductor element), 13b (second semiconductor element), 13c (third semiconductor element), 13d (fourth semiconductor element), 13e (fifth semiconductor element), and 13f (sixth semiconductor element), a frame 14a, and six metal plates 15a (first metal plate), 15b (second metal plate), and a metal The circuit board 11 includes a plate 15c (third metal plate), a metal plate 15d (fourth metal plate), a metal plate 15e (fifth metal plate), a metal plate 15f (sixth metal plate), an adhesive 16a, a sealing material 17a, four main terminals 18a (first main terminal), 18b (second main terminal), 17c (third main terminal), and 18d (fourth main terminal), and four control terminals 19a (first control terminal), 19b (second control terminal), 19c (third control terminal), and 19d (fourth control terminal). That is, in this embodiment, a plurality of metal plates are provided. The number of metal plates may be changed as needed. A plurality of main terminals and a plurality of control terminals are provided. The number of main terminals and the number of control terminals may be changed as needed. The base plate 11a functions as a heat sink. The base plate 11a is rectangular when viewed in the thickness direction (Z direction). The base plate 11a has a first main surface 21a located on one side in the thickness direction and a second main surface 22a located on the other side in the thickness direction. The components constituting the semiconductor device 10a are arranged on the first main surface 21a. The base plate 11a has four circular holes penetrating through the thickness direction in regions near the four corners.

[0023] The substrate 12a includes an insulating layer 23a, a metal layer 24a, and seven circuit boards (a first circuit board 25a, a second circuit board 25b, a third circuit board 25c, a fourth circuit board 25d, a fifth circuit board 25e, a sixth circuit board 25f, and a seventh circuit board 25g). That is, in this embodiment, a plurality of circuit boards are provided. The number of circuit boards may be appropriately changed as needed. The insulating layer 23a and the metal layer 24a are each rectangular when viewed in the thickness direction (Z direction) of the substrate 12a. The substrate 12a has a laminated structure in which the insulating layer 23a is sandwiched between the first circuit board 25a, the second circuit board 25b, the third circuit board 25c, the fourth circuit board 25d, the fifth circuit board 25e, the sixth circuit board 25f, and the seventh circuit board 25g located on one side in the thickness direction and the metal layer 24a located on the other side. The first circuit board 25a, the second circuit board 25b, the third circuit board 25c, the fourth circuit board 25d, the fifth circuit board 25e, the sixth circuit board 25f, and the seventh circuit board 25g are formed by patterning a metal layer located on one side of the substrate 12a in advance and then etching it or the like.

[0024] The first circuit board 25a has a region extending in the Y direction and a region extending in the X direction. The first circuit board 25a is T-shaped when viewed in the Z direction. Semiconductor elements 13a, 13b, and 13c are arranged on the first circuit board 25a, specifically, on the region extending in the Y direction of the first circuit board 25a. The second circuit board 25b has two regions extending in the Y direction spaced apart in the X direction, and a region extending in the X direction. Semiconductor elements 13d, 13e, and 13f are arranged on the second circuit board 25b, specifically, on the region extending in the Y direction located on the fourth wall portion 27d side of the second circuit board 25b. The third circuit board 25c has a region extending in the Y direction and a region extending in the X direction. The third circuit board 25c has an upside-down L shape when viewed in the Z direction. The fourth circuit board 25d, the fifth circuit board 25e, the sixth circuit board 25f, and the seventh circuit board 25g each have a shape elongated in the Y direction when viewed in the Z direction. The fourth circuit board 25d and the fifth circuit board 25e are disposed adjacent to the first circuit board 25a with a gap therebetween in the X direction. The sixth circuit board 25f and the seventh circuit board 25g are disposed adjacent to the third circuit board 25c with a gap therebetween in the X direction.

[0025] The substrate 12a is disposed on the first main surface 21a of the base plate 11a. Specifically, the substrate 12a is disposed so that the metal layer 24a faces the first main surface 21a, and they are joined together with a joining material such as solder. At this time, the substrate 12a is disposed at the center of the first main surface when viewed in the thickness direction of the base plate 11a.

[0026] The frame body 14a is made of resin. The frame body 14a surrounds the space 26a above the substrate 12a. The outer shape of the frame body 14a is rectangular when viewed in the thickness direction of the base plate 11a. The frame body 14a includes a first wall portion 27a, a second wall portion 27b, a third wall portion 27c, and a fourth wall portion 27d. The first wall portion 27a and the second wall portion 27b are spaced apart in the Y direction. The first wall portion 27a and the second wall portion 27b have protruding regions that protrude radially outward at the center in the X direction. The third wall portion 27c and the fourth wall portion 27d are spaced apart in the X direction. The first wall portion 27a, the second wall portion 27b, the third wall portion 27c, and the fourth wall portion 27d are arranged in a circumferentially continuous manner. The frame body 14a is fixed onto the first main surface 21a of the base plate 11a. In this embodiment, the frame body 14a is fixed onto the first main surface 21a of the base plate 11a by an adhesive 16. The adhesive 16a included in the semiconductor device 10a is interposed between the frame body 14a and the first main surface 21a of the base plate 11a in the Z direction, and bonds the frame body 14a and the base plate 11a together. As the adhesive 16a, for example, a silicone-based adhesive made of silicone resin is used.

[0027] Here, six metal plates 15a, 15b, 15c, 15d, 15e, and 15f are fixed to the frame body 14a. In this embodiment, the metal plates 15a, 15b, 15c, 15d, 15e, and 15f are joined to the frame body 14a by insert molding. The metal plates 15a, 15b, 15c, 15d, 15e, and 15f are arranged to form first portions 28a that protrude inward from the inner wall surfaces of each wall portion constituting the frame body 14a. Specifically, each of the metal plates 15a, 15b, 15c, 15d, 15e, and 15f has a first portion 28a that is positioned between the frame body 14a and the substrate 12a when viewed in the thickness direction of the base plate 11a.

[0028] Four metal plates 15a, 15b, 15c, and 15d are provided in the areas where the four corners of frame 14a are located. Two metal plates 15e and 15f are provided to form protruding areas that protrude from third wall portion 27c and fourth wall portion 27d, respectively. Six metal plates 15a, 15b, 15c, 15d, 15e, and 15f are arranged with their thickness directions aligned with the thickness directions of base plate 11a and substrate 12a. Metal plates 15a, 15b, 15c, 15d, 15e, and 15f each have a first surface 31a located on one side in the thickness direction and a second surface 32a located on the other side in the thickness direction. The metal plates 15a, 15b, 15c, 15d, 15e, and 15f are each provided such that the second surface 32a faces the first main surface 21a.

[0029] The four main terminals 18a, 18b, 18c, and 18d each have a shape formed by bending a strip-shaped metal member. The main terminal 18a, which functions as a P terminal, and the main terminal 18b, which functions as an N terminal, are attached to the first wall portion 27a at intervals in the X direction. The two main terminals 18c and 18d, which function as O terminals, are attached to the second wall portion 27b at intervals in the X direction. The four main terminals 18a, 18b, 18c, and 18d are each attached and fixed to the frame body 14a by insert molding. The main terminal 18a is joined to the first circuit board 25a, thereby electrically connecting the main terminal 18a to the first circuit board 25a. The main terminals 18c and 18d are joined to the second circuit board 25b, thereby electrically connecting the main terminals 18c and 18d to the second circuit board 25b. The main terminal 18d is joined to the third circuit board 25c, thereby electrically connecting the main terminal 18d to the third circuit board 25c. The main terminals 18a, 18b, 18c, 18d are joined to the first circuit board 25a, the second circuit board 25b, and the third circuit board 25c by, for example, ultrasonic bonding.

[0030] The four control terminals 19a, 19b, 19c, and 19d each have a shape formed by bending a rod-shaped metal member. The control terminal 19a, which functions as a gate terminal, and the control terminal 19b, which functions as an auxiliary source terminal (Kelvin source terminal), are attached to the third wall portion 27c at intervals in the Y direction. The control terminal 19c, which functions as a gate terminal, and the control terminal 19d, which functions as an auxiliary source terminal (Kelvin source terminal), are attached to the fourth wall portion 27d at intervals in the Y direction. The four control terminals 19a, 19b, 19c, and 19d are each attached and fixed to the frame body 14a by insert molding.

[0031] The semiconductor element 13a may be, for example, a transistor, specifically a vertical transistor such as a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor). The semiconductor element 13a includes a source electrode, a drain electrode, and a gate electrode. The source electrode and the gate electrode are disposed on one side in the thickness direction of the base plate 11a, and the drain electrode is disposed on the other side in the thickness direction of the base plate 11a. The semiconductor element 13a is attached so that the drain electrode faces the first circuit board 25a. The semiconductor element 13a is attached to the first circuit board 25a by a conductive bonding material, such as solder (not shown). The other semiconductor elements 13b, 13c, 13d, 13e, and 13f have the same configuration as semiconductor element 13a, and therefore their description will be omitted. Semiconductor elements 13a, 13b, and 13c are arranged side by side at intervals in the Y direction on a region of first circuit board 25a extending in the Y direction. Semiconductor elements 13d, 13e, and 13f are arranged side by side at intervals in the Y direction on a region of second circuit board 25b extending in the Y direction on the side of fourth wall portion 27d.

[0032] The gate electrodes of semiconductor elements 13a, 13b, and 13c are electrically connected to fourth circuit board 25d by wires 41a. The fourth circuit board 25d is electrically connected to control terminal 19a by wires 42a. As a result, the gate electrodes of semiconductor elements 13a, 13b, and 13c are electrically connected to control terminal 19a via fourth circuit board 25d. The source electrodes of semiconductor elements 13a, 13b, and 13c are electrically connected to fifth circuit board 25e by wires 43a. The fifth circuit board 25e is electrically connected to control terminal 19b by wires 44a. As a result, the source electrodes of semiconductor elements 13a, 13b, and 13c are electrically connected to control terminal 19b via fifth circuit board 25e. Furthermore, the source electrodes of semiconductor elements 13a, 13b, and 13c are electrically connected to second circuit board 25b by wires 45a. A plurality of wires 45a are provided.

[0033] The gate electrodes of semiconductor elements 13d, 13e, and 13f are electrically connected to sixth circuit board 25f by wires 41b. The sixth circuit board 25f is electrically connected to control terminal 19c by wires 42b. As a result, the gate electrodes of semiconductor elements 13d, 13e, and 13f are electrically connected to control terminal 19c via sixth circuit board 25f. The source electrodes of semiconductor elements 13d, 13e, and 13f are electrically connected to seventh circuit board 25g by wires 43b. The seventh circuit board 25g is electrically connected to control terminal 19d by wires 44b. As a result, the source electrodes of semiconductor elements 13d, 13e, and 13f are electrically connected to control terminal 19d via seventh circuit board 25g. Furthermore, the source electrodes of semiconductor elements 13d, 13e, and 13f are electrically connected to third circuit board 25c by wires 45b. A plurality of wires 45b are provided.

[0034] When viewed in the thickness direction of the base plate 11a, the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f are arranged at a distance from the metal plates 15a, 15b, 15c, 15d, 15e, and 15f. The semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f are electrically insulated from the metal plates 15a, 15b, 15c, 15d, 15e, and 15f, respectively.

[0035] The sealing material 17a seals a portion of the substrate 12a, portions of the main terminals 18a, 18b, 18c, and 18d, portions of the control terminals 19a, 19b, 19c, and 19d, and the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f. The sealing material 17a is disposed on one surface of the substrate 12a in the thickness direction so as to seal the space 26a surrounded by the frame 14a. The sealing material 17a may be, for example, a thermosetting resin, specifically, an epoxy resin.

[0036] An example of a manufacturing method for the semiconductor device 10a having the above configuration is briefly described below. First, a frame 14a is prepared, to which six metal plates 15a, 15b, 15c, 15d, 15e, and 15f, four main terminals 18a, 18b, 18c, and 18d, and four control terminals 19a, 19b, 19c, and 19d are attached by insert molding. Then, solder (not shown) as a bonding material is placed on the first main surface 21a of the base plate 11a, and the substrate 12a is placed thereon. Furthermore, solder (not shown) as a bonding material is placed on predetermined positions of the first circuit board 25a and the second circuit board 25b, and the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f are placed thereon. Thereafter, the frame body 14a is placed on the first main surface 21a of the base plate 11a. Next, the metal plates 15a, 15b, 15c, 15d, 15e, and 15f are joined to the base plate 11a. In this case, the metal plates 15a, 15b, 15c, 15d, 15e, and 15f are joined to the base plate 11a by ultrasonic bonding while being pressed in the thickness direction. At this time, the main terminals 18a, 18b, 18c, and 18d are also joined to the first circuit board 25a, the second circuit board 25b, and the third circuit board 25c by ultrasonic bonding.

[0037] The solder is then melted by reflow and then hardened to bond the base plate 11a to the substrate 12a and the first circuit board 25a and the second circuit board 25b to the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f. Next, a silicone-based adhesive 16a is poured between the frame 14a and the first main surface 21a of the base plate 11a to bond the frame 14a to the base plate 11a. Thereafter, for example, by wire bonding, electrical connections are made between the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f and the second circuit board 25b, the third circuit board 25c, and the control terminals 19a, 19b, 19c, and 19d via wires 41a or the like. Finally, uncured sealing material 17a is injected into the space 26a above the substrate 12a surrounded by the frame 14a and cured by heating, thereby obtaining the semiconductor device 10a having the above configuration.

[0038] In this semiconductor device 10a, metal plates 15a, 15b, 15c, 15d, 15e, and 15f are fixed to the frame 14a, and the first main surface 21a of the base plate 11a is bonded to the second surfaces 32a of the metal plates 15a, 15b, 15c, 15d, 15e, and 15f. This suppresses warping of the base plate 11a on which the substrate 12a is mounted during temperature changes and reduces the risk of gaps forming between the frame 14a and the base plate 11a. This reduces the risk of delamination originating from gaps, reducing the risk of a decrease in insulation and damage to the semiconductor device 10a. As a result, the semiconductor device 10a can achieve improved reliability.

[0039] In this embodiment, the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f are electrically insulated from the metal plates 15a, 15b, 15c, 15d, 15e, and 15f, respectively, so that current is prevented from flowing in or out of the metal plates 15a, 15b, 15c, 15d, 15e, and 15f to the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f, thereby preventing malfunction of the semiconductor device 10a.

[0040] In this embodiment, the semiconductor device 10a includes an adhesive 16a that bonds the frame body 14a and the base plate 11a together, and a sealant 17a that seals the space 26a surrounded by the frame body 14a. Since the gap described above is unlikely to occur in this semiconductor device 10a, the frame body 14a and the base plate 11a can be reliably joined by the adhesive 16a, and the sealant 17a can reliably insulate the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f.

[0041] In this embodiment, when viewed in the thickness direction of the base plate 11a, the metal plates 15a, 15b, 15c, 15d, 15e, and 15f each have a first portion 28a that is disposed between the frame body 14a and the substrate 12a. The first main surface 21a and the second surface 32a are joined at the first portion 28a. Therefore, when viewed in the thickness direction of the base plate 11a, the metal plates 15a, 15b, 15c, 15d, 15e, and 15f are joined to the frame body 14a at the outer portions of the substrate 12a. This more efficiently suppresses warping of the base plate 11a and significantly reduces the risk of the above-mentioned gaps occurring.

[0042] In this embodiment, a plurality of metal plates 15a, 15b, 15c, 15d, 15e, and 15f are provided, and therefore, metal plates 15a, 15b, 15c, 15d, 15e, and 15f are joined to base plate 11a at a plurality of locations, which more reliably suppresses warping of base plate 11a and reliably reduces the risk of the above-mentioned gaps occurring.

[0043] In this embodiment, the frame 14a is rectangular when viewed in the thickness direction of the base plate 11a. The metal plates 15a, 15b, 15c, and 15d are provided in the areas where the four corners of the frame 14a are located. Therefore, the metal plates 15a, 15b, 15c, and 15d can be joined to the base plate 11a in the areas where the four corners of the frame 14a are located. This allows for a small number of joints, yet reliably suppresses warping of the base plate 11a. This effectively and significantly reduces the risk of the above-mentioned gaps occurring.

[0044] In this embodiment, metal plates 15a, 15b, 15c, 15d, 15e, and 15f are fixed to frame 14a by insert molding. Therefore, metal plates 15a, 15b, 15c, 15d, 15e, and 15f can be attached and fixed during molding of frame 14a, allowing metal plates 15a, 15b, 15c, 15d, 15e, and 15f to be reliably fixed to frame 14a. Therefore, metal plates 15a, 15b, 15c, 15d, 15e, and 15f can be more reliably and efficiently fixed to frame 14a.

[0045] In this embodiment, the substrate 12a includes a circuit board on which the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f are arranged. The semiconductor device 10a includes terminals that are joined to the circuit board. Therefore, the circuit board and the terminals can be used to easily and reliably control the operations of the semiconductor elements 13a, 13b, 13c, 13d, 13e, and 13f. This ensures stable operation of the semiconductor device 10a and further improves its reliability.

[0046] In this embodiment, metal plates 15a, 15b, 15c, 15d, 15e, and 15f are joined to base plate 11a by ultrasonic bonding. Therefore, metal plates 15a, 15b, 15c, 15d, 15e, and 15f can be reliably joined and fixed to base plate 11a without the need for a bonding material such as an adhesive. This improves productivity.

[0047] (Embodiment 2) Another embodiment, embodiment 2, will now be described. FIG. 4 is a schematic plan view of a semiconductor device in embodiment 2. FIG. 5 is a schematic cross-sectional view of the semiconductor device shown in FIG. 4. FIG. 5 is a cross-sectional view taken along the V-V cross section in FIG. 4. The sealing material is not shown in FIGS. 4 and 5. The semiconductor device in embodiment 2 basically has the same configuration as embodiment 1, and achieves the same effects. However, the semiconductor device in embodiment 2 differs from embodiment 1 in the configuration of the metal plate.

[0048] 4 and 5, the shape of metal plate 15g included in semiconductor device 10b according to the second embodiment is different from the shapes of metal plates 15a, 15b, 15c, 15d, 15e, and 15f included in semiconductor device 10a according to the first embodiment. Metal plate 15g included in semiconductor device 10b has second portion 28b that continues along the inner periphery of frame body 14a. That is, metal plate 15g is provided on the outer side of substrate 12a over the entire circumferential area.

[0049] This allows the metal plate 15g and the base plate 11a to be bonded over a wider area along the inner periphery of the frame body 14a, which more reliably prevents the base plate 11a from warping, thereby reliably reducing the risk of the gaps being generated.

[0050] (Other Embodiments) In the above embodiment, the metal plate is fixed to the frame body by insert molding, but this is not limiting, and the metal plate may be joined to the frame body with an adhesive, etc. In this way, the metal plate can be reliably joined and fixed to the frame body without requiring insert molding.

[0051] It should be understood that the embodiments disclosed herein are illustrative in all respects and are not limiting in any respect. The scope of the present invention is defined not by the above description but by the claims, and it is intended to include all modifications within the meaning and scope of the claims.

[0052] DESCRIPTION OF SYMBOLS 10a, 10b Semiconductor device, 11a Base plate, 12a Substrate, 13a, 13b, 13c, 13d, 13e, 13f Semiconductor element, 14a Frame, 15a, 15b, 15c, 15d, 15e, 15f, 15g Metal plate, 16a Adhesive, 17a Sealing material, 18a, 18b, 18c, 18d Main terminal (terminal), 19a, 19b, 19c, 19d Control terminal (terminal), 21a First main surface, 22a Second main surface, 23a Insulating layer, 24a Metal layer, 25a First circuit board (circuit board), 25b Second circuit board (circuit board), 25c Third circuit board (circuit board), 25d Fourth circuit board (circuit board), 25e Fifth circuit board (circuit board), 25f Sixth circuit board (circuit board), 25g Seventh circuit board (circuit board), 26a space, 27a first wall portion, 27b second wall portion, 27c third wall portion, 27d fourth wall portion, 28a first portion, 28b second portion, 31a first surface, 32a second surface, 41a, 41b, 42a, 42b, 43a, 43b, 44a, 44b, 45a, 45b wires.

Claims

1. A semiconductor device comprising: a base plate having a first main surface; a substrate disposed on said first main surface; a semiconductor element disposed on said substrate; and a resin frame fixed to said first main surface and surrounding a space above said substrate, wherein a metal plate having a second surface opposing said first main surface is fixed to said frame, and said first main surface and said second surface are bonded together.

2. The semiconductor device according to claim 1, wherein the semiconductor element and the metal plate are electrically insulated.

3. The semiconductor device according to claim 1 or 2, further comprising: an adhesive that bonds said frame body and said base plate; and a sealing material that seals a space surrounded by said frame body.

4. A semiconductor device according to any one of claims 1 to 3, wherein, when viewed in the thickness direction of the base plate, the metal plate has a first portion disposed between the frame body and the substrate, and the first main surface and the second surface are joined at the first portion.

5. The semiconductor device according to any one of claims 1 to 4, wherein a plurality of said metal plates are provided.

6. A semiconductor device according to any one of claims 1 to 5, wherein the frame body is rectangular when viewed in the thickness direction of the base plate, and the metal plate is provided in an area where the four corners of the frame body are located.

7. The semiconductor device according to any one of claims 1 to 6, wherein the metal plate is joined to the base plate by ultrasonic bonding.

8. The semiconductor device according to any one of claims 1 to 6, wherein the metal plate is fixed to the frame by insert molding.

9. The semiconductor device according to any one of claims 1 to 8, wherein the substrate includes a circuit board on which the semiconductor element is arranged, and the semiconductor device further includes terminals joined to the circuit board.

10. The semiconductor device according to any one of claims 1 to 9, wherein the metal plate has a second portion that extends along the inner periphery of the frame body.

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