Solar cell manufacturing method, and solar cell

Abstract

A solar cell manufacturing method, comprising: texturing a silicon substrate, wherein the silicon substrate comprises a first surface and a second surface; performing boron diffusion and high-temperature oxidation on the silicon substrate; removing boron diffused layers and BSG on the side and the second surface of the silicon substrate; depositing a tunnel oxide layer and a doped polysilicon layer on the second surface of the silicon substrate; removing PSG and the like on the first surface and the side surface of the silicon substrate; depositing a passivation layer on the silicon substrate; depositing an anti-reflection layer on the silicon substrate; forming metal gate lines on the first surface and the second surface of the silicon substrate; applying a voltage to a solar cell; and maintaining the voltage, and using laser to scan the metal gate line on the first surface, wherein the power density of the laser is 500-50,000 W / cm2. Also provided is the solar cell manufactured by the manufacturing method. By means of laser-assisted sintering and the setting of process parameters thereof, a P-type element doping concentration window of the first surface is improved, and the contact between the metal gate lines and the silicon substrate is not affected, thereby improving the cell conversion efficiency.

Description

Method for manufacturing solar cell and solar cell TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, and more particularly to a method for manufacturing a solar cell and a solar cell manufactured by the method. BACKGROUND

[0002] A TOPCon (Tunnel Oxide Passivating Contacts) cell is a kind of photovoltaic crystalline silicon cell. The TOPCon cell mainly uses an N-type silicon substrate as a carrier, prepares an extremely thin silicon oxide layer, i.e., a tunnel oxide layer, on the back surface of the silicon substrate, and then deposits a phosphorus-doped microcrystalline-amorphous mixed silicon thin film. The crystallinity of the mixed silicon thin film changes during the annealing process and is converted into polycrystalline. The silicon oxide layer and the phosphorus-doped polycrystalline silicon thin film together form a passivation contact structure on the back surface of the silicon substrate. The ultra-thin silicon oxide layer of the TOPCon cell utilizes quantum tunneling effect to allow the tunneling of many holes and block the transmission of few holes. A layer of metal is deposited on the phosphorus-doped polycrystalline silicon thin film as an electrode. The electrode can complete current transmission without the need to contact the silicon substrate through the conductive holes of the passivation contact structure, thereby reducing the efficiency loss caused by the recombination at the electrode of the cell. In addition, the phosphorus-doped polycrystalline silicon layer can further reduce the efficiency loss caused by surface recombination, thereby improving the efficiency of the cell. In recent years, the TOPCon cell has attracted widespread attention and research due to its obvious advantages such as high conversion efficiency, low attenuation performance, and high production cost performance. The theoretical limit conversion efficiency of the TOPCon cell is as high as 28.7%, which is the closest technology to the theoretical limit conversion efficiency (29.43%) of the crystalline silicon solar cell, and has great research and development potential. SUMMARY

[0003] In view of this, the present application provides a method for manufacturing a solar cell, comprising:

[0004] Step S1: providing a silicon substrate, the silicon substrate being an N-type silicon substrate, comprising a first surface, a second surface opposite to the first surface, and at least one side surface connecting the first surface and the second surface, and performing texturing treatment on the first surface of the silicon substrate;

[0005] Step S2: boron-doping the silicon substrate;

[0006] Step S3: removing the boron-doped diffusion layer and borosilicate glass of the second surface and the at least one side surface;

[0007] Step S4: forming a tunnel oxide layer and a doped polycrystalline silicon layer on the second surface;

[0008] Step S5: removing the phosphor-silicon glass and the polysilicon layer of the first surface and the at least one side surface, the phosphor-silicon glass of the second surface, and the boron-silicon glass of the first surface;

[0009] Step S6: depositing a passivation layer on the first surface or both the first surface and the second surface;

[0010] Step S7: depositing an anti-reflection layer on the first surface and the second surface;

[0011] Step S8: forming metal grid lines on the side where the first surface of the silicon substrate is located and the side where the second surface of the silicon substrate is located, respectively, to form a solar wafer;

[0012] Step S9: applying a voltage to the solar wafer, wherein the electric field direction of the voltage is a first direction, the first direction is a direction from the second surface to the first surface, and the voltage is 5-30V;

[0013] Step S10: maintaining the voltage and scanning the metal grid lines on the first surface with a laser, wherein the power density of the laser is 500-50000W / cm 2 .

[0014] The preparation method of the solar cell of the present application is suitable for the preparation of a TOPCon cell. By means of laser-assisted sintering technology and the setting of its process parameters, the p-type element doping concentration window of the first surface of the cell is further improved, and the contact between the metal grid lines and the silicon substrate is not affected, thereby improving the conversion efficiency of the cell.

[0015] Further, the step S2 further comprises controlling the boron doping such that the sheet resistance of the first surface of the silicon substrate is 200-800 ohm / sq.

[0016] The preparation method of the solar cell of the present application, the sheet resistance of the first surface of the silicon substrate can be relaxed to 200-800 ohm / sq, the recombination of the light absorption region of the first surface of the cell is further reduced, and the circuit voltage and conversion efficiency of the cell are improved.

[0017] Further, the boron doping of the silicon substrate comprises boron diffusion of the silicon substrate and high-temperature oxidation of the silicon substrate, the boron diffusion is performed in a first temperature range, and the high-temperature oxidation treatment is performed in a second temperature range, the minimum value of the second temperature range is greater than the maximum value of the first temperature range.

[0018] Further, the first temperature range is 700-900℃, and the second temperature range is 950-1050℃; or,

[0019] The first temperature range is 700-950°C, and the second temperature range is 950-1100°C.

[0020] Furthermore, the step S2 is performed in a boron diffusion machine with a high-temperature thermal field.

[0021] By introducing laser-assisted sintering technology, the laser preparation of the selective emission area process will no longer be necessary. At this time, boron diffusion and high-temperature oxidation can be combined into a high-temperature boron diffusion process, further shortening the process time.

[0022] Furthermore, boron doping the silicon substrate includes sequentially performing boron diffusion and laser doping on the silicon substrate, or,

[0023] Doping the silicon substrate with boron includes sequentially performing boron diffusion, laser doping, and high-temperature oxidation on the silicon substrate.

[0024] Furthermore, the step S9 includes:

[0025] Placing the solar cell on a conductive metal plate so that the side of the solar cell where the second surface is located is in contact with the conductive metal plate;

[0026] A conductive probe is placed on the solar cell so that the conductive probe is in direct contact with the metal grid line on the first surface, wherein the conductive metal plate is electrically connected to the positive pole of a voltage source, and the conductive probe is electrically connected to the negative pole of the voltage source.

[0027] Furthermore, in step S9 and step S10, the voltage range is 10-20V.

[0028] Furthermore, in step S10, the scanning speed of the laser is 20000-100000 mm / s, or;

[0029] In step S10, the scanning speed of the laser is 20000-60000 mm / s.

[0030] Furthermore, in step S10, the wavelength of the laser is 350-1500 nm, and the power is 10-100 W, or;

[0031] In step S10, the wavelength of the laser is 350-1500 nm, and the power is 10-500 W.

[0032] Furthermore, in step S10, the laser is a strip-shaped spot, the length of the strip-shaped spot is 0.5-5 mm, and the width of the strip-shaped spot is 80-1000 μm.

[0033] Further, in the step S10, the scanning speed of the laser is 20000-60000 mm / s, and the time for the laser to scan each position on the metal grid line is 10-40 μs.

[0034] Further, in the step S10, the wavelength of the laser is in the range of 900-1200 nm, and the laser is an infrared pulsed laser or an infrared continuous laser.

[0035] Further, the projection area of the metal grid line on the first surface on the silicon substrate is an improvement area, the contact resistance of the improvement area before the step S10 is a first resistance, and the contact resistance of the improvement area after the step S10 is a second resistance, the second resistance being less than the first resistance.

[0036] Further, the step S8 comprises printing conductive metal paste on the first surface and the second surface, and sintering to solidify the conductive metal paste to form the metal grid line.

[0037] Further, the step S3 comprises:

[0038] etching the silicon substrate by using a chain machine with a hydrofluoric acid solution so that the first surface faces upward to remove the borosilicate glass on the second surface and the at least one side surface; and

[0039] etching the silicon substrate by using a tank machine with an alkaline solution to remove the boron-doped diffusion layer on the second surface and the at least one side surface.

[0040] Further, the step S4 comprises:

[0041] forming a tunneling oxide layer and an intrinsic amorphous silicon layer on the second surface in sequence by using low-pressure chemical vapor deposition; and

[0042] performing phosphorus diffusion to convert the intrinsic amorphous silicon layer into a doped polysilicon layer; or

[0043] the step S4 comprises:

[0044] forming a tunneling oxide layer and a doped amorphous silicon layer on the second surface in sequence by using plasma-enhanced chemical vapor deposition;

[0045] performing annealing to convert the doped amorphous silicon layer into a doped polysilicon layer.

[0046] Further, the step S5 comprises:

[0047] etching the silicon substrate with a chain machine having a hydrofluoric acid solution to remove phosphosilicate glass of the first surface and the at least one side surface with the second surface facing up;

[0048] etching the silicon substrate with a tank machine having a basic solution to remove the polysilicon layer of the first surface and the at least one side surface, the polysilicon layer including a doped polysilicon layer;

[0049] etching the silicon substrate with a tank machine having a hydrofluoric acid solution to remove borosilicate glass of the first surface and phosphosilicate glass of the second surface.

[0050] Further, the step S4 further includes forming a tunneling oxide layer with a thickness of 1.5-2.5 nm and forming a doped polysilicon layer with a thickness of 60-200 nm.

[0051] Further, the step S6 further includes depositing an aluminum oxide layer with a thickness of 2-8 nm as the passivation layer.

[0052] Further, the step S7 further includes depositing the anti-reflective layer with a thickness of 70-90 nm, the material of the anti-reflective layer including at least one of SiyN x , SizN x O y , and SiO2.

[0053] Further, in the step S6, the passivation layer is also deposited on the at least one side surface;

[0054] In the step S7, the anti-reflective layer is also deposited on the at least one side surface.

[0055] The application also provides a method for preparing a solar cell, including:

[0056] Step S1: providing a silicon substrate, the silicon substrate being an N-type silicon substrate including a first surface, a second surface opposite to the first surface, and at least one side surface connecting the first surface and the second surface, and performing a texturing treatment on the first surface of the silicon substrate;

[0057] Step S2: performing boron doping on the silicon substrate;

[0058] Step S3: removing a boron-doped diffusion layer and borosilicate glass of the second surface and the at least one side surface;

[0059] Step S4: forming a tunneling oxide layer and a doped polysilicon layer on the second surface;

[0060] Step S5: removing the mask layer and the polysilicon layer of the first surface and the at least one side surface, the mask layer of the second surface, and the borosilicate glass of the first surface;

[0061] Step S6: depositing a passivation layer on the first surface or both the first surface and the second surface;

[0062] Step S7: depositing an anti-reflection layer on the first surface and the second surface;

[0063] Step S8: forming metal grid lines on the side where the first surface of the silicon substrate is located and the side where the second surface of the silicon substrate is located, respectively, to form a solar wafer;

[0064] Step S9: applying a voltage to the solar wafer, wherein the electric field direction of the voltage is a first direction, the first direction is a direction from the second surface to the first surface, and the voltage is 5-30V;

[0065] Step S10: maintaining the voltage and scanning the metal grid lines on the first surface with a laser, wherein the power density of the laser is 500-50000W / cm 2 .

[0066] Further, the mask layer comprises at least one of phosphosilicate glass, silicon oxide, silicon oxynitride, and silicon nitride.

[0067] The application also provides a solar cell prepared by the above preparation method, which comprises:

[0068] a silicon substrate comprising a first surface and a second surface opposite to the first surface;

[0069] a first passivation layer and a first anti-reflection layer on the first surface;

[0070] a metal grid line on the first anti-reflection layer; and

[0071] a tunnel oxide layer, a doped polysilicon layer, a second passivation layer, and a second anti-reflection layer on the second surface; and

[0072] a metal grid line on the second anti-reflection layer. BRIEF DESCRIPTION OF DRAWINGS

[0073] FIG. 1 is a flowchart of a preparation method of a TOPCon solar cell according to an embodiment of the application.

[0074] FIG. 2 is a schematic cross-sectional view of a TOPCon solar cell according to an embodiment of the application.

[0075] Main element symbol explanation: TOPCon solar cell 100, silicon substrate 11, first passivation layer 12, first anti-reflection layer 13, metal grid line 18, tunneling oxide layer 14, doped polysilicon layer 15, second passivation layer 16, second anti-reflection layer 17. DETAILED DESCRIPTION

[0076] The preparation process of the conventional TOPCon cell mainly includes the following steps: texturing, boron diffusion, laser preparation of selective emitter (SE), high-temperature oxidation, backside doped polysilicon, deposition of passivation layer, deposition of anti-reflection film, printing of metal grid line, and sintering.

[0077] The laser preparation of SE step is used to improve the conversion efficiency of the crystalline silicon cell. This process forms regions with different doping levels by laser local doping, thereby optimizing the charge carrier collection and current transport on the front side of the cell. The high-doped region has low contact resistance, and the low-doped region has lower carrier recombination rate. During laser doping, the target region is usually heavily doped by increasing the laser power, but the increase in laser power also increases the damage to the textured surface, thereby affecting the subsequent passivation effect, and thus limiting the ability of the laser doping technology to further reduce the contact resistance between the metal grid line and the silicon substrate.

[0078] The present application provides a preparation method of a TOPCon solar cell, which uses laser-enhanced contact optimization (LECO) technology to assist in sintering conductive metal paste to form a metal grid line. The LECO technology can directly form low-resistance ohmic contact between metal and silicon without damaging the passivation layer of the silicon substrate by laser-assisted sintering of conductive metal conductive paste, thereby reducing the contact resistance between the metal grid line and the silicon without the need for an additional doping step. Therefore, there is no need to set up a laser selective emitter, i.e., the laser preparation of SE step is deleted. The preparation method of the TOPCon solar cell of the present application can further release the doping concentration window of the light absorption region without affecting the contact between the metal grid line and the silicon substrate, thereby improving the conversion efficiency of the cell. In the case of applying voltage to the solar cell sheet, the embodiments of the present application use laser to scan the metal grid line on the front side, and the power density of the laser is 500-50000 W / cm 2 , and the scanning speed is 20000-60000 mm / s, which can ensure the process effect after laser scanning and avoid overburning. The boron diffusion and high-temperature oxidation processes in the embodiments of the present application are implemented in the same machine, which can effectively save process time.

[0079] Please refer to FIG. 1, which is a flow chart of a method for manufacturing a solar cell according to an embodiment of the present application. It should be noted that the method for manufacturing a solar cell according to the present application is not limited to the order of the following steps, and in other embodiments, the method for manufacturing a solar cell according to the present embodiment can only include a part of the following steps, or some of the steps can be deleted.

[0080] The method for manufacturing a solar cell according to an embodiment of the present application will be described in detail below in combination with the description of the steps of FIG. 1. The method for manufacturing a solar cell includes the following steps S1 to S10.

[0081] Step S1: providing a silicon substrate and performing a texturing process on the surface of the silicon substrate, the silicon substrate being an N-type silicon substrate, and the silicon substrate including a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface.

[0082] In the present embodiment, the first surface is the front surface of the silicon substrate, and the second surface is the back surface of the silicon substrate.

[0083] The N-type silicon substrate is doped with an N-type doping element, which can be at least one of a phosphorus (P) element, a bismuth (Bi) element, an antimony (Sb) element, and an arsenic (As) element.

[0084] The purpose of texturing the surface of the silicon substrate is to remove the mechanical damage layer on the surface of the silicon substrate, to remove surface oil stains, impurity particles, and metal impurities, to form a rough and uneven textured structure, to increase the surface area of the silicon substrate, and to form a light-trapping structure, which can increase the absorption of sunlight and reduce the reflection of sunlight.

[0085] In some embodiments, the reflectivity of the textured surface of the silicon substrate is less than 11%. The texturing process can be performed only on the first surface or on both the first surface and the second surface of the silicon substrate.

[0086] Step S2: performing boron doping on the silicon substrate.

[0087] The purpose of step S2 is to form a PN junction. Since the silicon substrate is an N-type silicon substrate, i.e., an N-type semiconductor has been formed in the silicon substrate in advance, the step S2 of boron diffusion is performed to form a P-type semiconductor in the silicon substrate, and the P-type semiconductor and the N-type semiconductor are formed in the silicon substrate to form a PN junction. The PN junction forms a space charge region and builds an internal potential field.

[0088] The boron doping includes boron diffusion on the silicon substrate and high-temperature oxidation treatment on the silicon substrate. In step S2, the impurity element boron is diffused on the side where the first surface of the silicon substrate is located by using a boron diffusion single machine or a combination of a boron diffusion and oxidation machine. The boron source can be selected from one or more of the precursors of BCl3, BBr3, B2H6, trimethylboron, etc. In step S2, by adjusting the process time, temperature and other parameters in the boron doping process, the sheet resistance of the first surface of the silicon substrate reaches 200-800 ohm / sq. During the boron diffusion, a boron-doped diffusion layer is formed in the silicon substrate to a certain depth from the surface (including the first surface, the second surface and the side surface), and a borosilicate glass (BSG) layer is formed on the outermost side of the silicon substrate due to the high concentration of boron, wherein the thickness of the BSG layer on the side where the first surface is located is controlled to be 70-110 nm. The surface concentration of boron is controlled to be 0-1 x 1019cm-2. In some embodiments, the surface concentration of boron is controlled to be 2 x 1019cm-2-6 x 1019cm-2. 20 -3 18 18 -3

[0089] The boron diffusion is controlled to be performed in a first temperature range, and the high-temperature oxidation treatment is controlled to be performed in a second temperature range, the minimum value of the second temperature range is greater than the maximum value of the first temperature range. Exemplarily, the first temperature range is 700-900°C, and the second temperature range is 950-1050°C. Alternatively, the first temperature range is 700-950°C, and the second temperature range is 950-1100°C.

[0090] In some embodiments, the boron diffusion and the high-temperature oxidation need to place the silicon substrate in the boron diffusion machine and the high-temperature oxidation machine in sequence, i.e., in two processes respectively. The high-temperature oxidation machine can also be an annealing furnace, a gettering furnace, etc. The temperature of the boron diffusion is controlled to be 700-900°C, and the process time is 80-100 min. The temperature of the high-temperature oxidation is 950-1050°C, which is higher than that of the boron diffusion, and the process time is 150-170 min.

[0091] In another embodiment, a single boron diffusion machine is used, which is equipped with a high-temperature thermal field, so that the boron diffusion machine has the functions of medium-temperature (700-900°C) source diffusion and high-temperature (950-1050°C) oxidation promotion, i.e., the boron diffusion and the high-temperature oxidation are completed in the single boron diffusion machine. The process time of this way is generally 180-210 min, which effectively saves the process time compared with the scheme of using two machines for boron diffusion and high-temperature oxidation separately.

[0092] ​​​​​In some embodiments, the boron doping also requires the use of a laser machine to perform laser doping, for example, using a laser SE process, so that the gate line area and the non-gate line area have a greater difference in doping concentration, so as to reduce the contact resistance between the metal gate line and the silicon substrate, reduce the recombination of the surface of the solar cell, and thus improve the photoelectric conversion efficiency of the cell.

[0093] In some embodiments, the boron doping of the silicon substrate includes boron diffusion and laser doping of the silicon substrate in sequence. In other embodiments, the boron doping of the silicon substrate includes boron diffusion, laser doping and high-temperature oxidation of the silicon substrate in sequence.

[0094] Step S3: removing the boron-doped diffusion layer and the boron-silicon glass (BSG) layer on the second surface and the side surface of the silicon substrate.

[0095] The boron diffusion process forms a boron-doped diffusion layer and a BSG layer on each surface of the silicon substrate. The boron-doped diffusion layer and the BSG layer formed on the side surface of the silicon substrate are likely to cause short circuit, and the boron-doped diffusion layer and the BSG layer formed on the second surface of the silicon substrate affect the subsequent passivation. Therefore, both of them need to be removed. The purpose of step S3 is to remove the byproduct boron-doped diffusion layer and the BSG layer formed on the second surface and the side surface of the silicon substrate in step S2.

[0096] In some embodiments, the silicon substrate is first etched by a chain BSG removal machine with a hydrofluoric acid solution to remove the BSG on the second surface and the side surface with the first surface facing up, and then the silicon substrate is etched by a tank machine with an alkaline solution to remove the boron-doped diffusion layer on the second surface and the side surface.

[0097] In some specific examples, the second surface of the silicon substrate is polished using a chain BSG removal machine and an alkaline etching machine to remove the boron-doped diffusion layer and the BSG layer on the second surface and the side surface of the silicon substrate, thereby preparing the second surface for doping with a polysilicon layer. The roller speed of the chain BSG removal machine is controlled at 3.2-4.6 m / min, and the single surface (second surface) of the silicon substrate is immersed in a hydrofluoric acid solution with a conductivity of 400-600 mS / cm, so that the second surface of the silicon substrate is soaked in the hydrofluoric acid solution for 1-2 min to remove the BSG layer formed by plating on the second surface and the side surface. Then, the silicon substrate is transferred to a tank alkaline etching machine, and the silicon substrate is placed in the alkaline etching solution of the tank alkaline etching machine to remove the boron-doped diffusion layer formed by plating on the second surface and the side surface. The alkaline etching solution contains KOH or NaOH or TMAH and corresponding additives, and the etching depth of the silicon substrate is controlled at 2-5 μm.

[0098] Step S4: forming a tunnel oxide layer and a doped polysilicon layer on the side of the second surface of the silicon substrate.

[0099] The step S4 comprises: performing low pressure chemical vapor deposition (LPCVD) on the side where the second surface is located to form a tunneling oxide layer and an intrinsic amorphous silicon layer in sequence from inside to outside on the second surface; and performing phosphorus diffusion on the side where the second surface is located to convert the intrinsic amorphous silicon layer into a doped polysilicon layer.

[0100] In some embodiments, the tunneling oxide layer is silicon oxide, and the thickness of the tunneling oxide layer is 1.5-2.5 nm.

[0101] Since the silicon substrate is an N-type silicon substrate, the doping element in the doped polysilicon layer can be an N-type doping element, for example, the doping element is phosphorus element. In some embodiments, the thickness of the doped polysilicon layer is 60-200 nm.

[0102] In some embodiments, after the doped polysilicon layer is formed, the phosphorus doping concentration of the second surface is controlled to be greater than 2×1019cm-3. 20 -3 The method for forming the doped polysilicon layer includes but is not limited to: preparing doped amorphous silicon by using LPCVD technology and then adding an annealing process; preparing intrinsic amorphous silicon by using LPCVD technology and then adding a phosphorus diffusion process; preparing doped amorphous silicon by using plasma enhanced chemical vapor deposition (PECVD) technology and then adding an annealing process to convert the doped amorphous silicon into a doped polysilicon; preparing doped amorphous silicon by using physical vapor deposition (PVD) technology and then adding an annealing process to convert the doped amorphous silicon into a doped polysilicon, etc.

[0103] In a specific example, first, LPCVD is performed on the side where the second surface is located to form a tunneling oxide layer and an intrinsic amorphous silicon layer in sequence from inside to outside on the second surface, and then phosphorus diffusion is performed on the side where the second surface is located to convert the intrinsic amorphous silicon layer into a doped polysilicon layer. Further, when the LPCVD is performed on the side where the second surface is located, the first surface and the side surface will both generate an intrinsic amorphous silicon layer, and when the phosphorus diffusion is performed on the side where the second surface is located, the first surface and the side surface will both convert at least part of the intrinsic amorphous silicon layer into a polysilicon layer doped with phosphorus, and the outermost side of the polysilicon layer of the first surface and the side surface and the doped polysilicon layer of the second surface will form a phosphosilicate glass (PSG) layer due to the high content of phosphorus.

[0104] ​Step S5: removing the PSG and polysilicon layer formed on the first surface and side surface in step S4, the PSG formed on the second surface and the BSG formed on the first surface in step S2.

[0105] The main purpose of step S5 is to remove the byproducts formed on the silicon substrate in step S4, including the PSG and polysilicon layer formed on the first surface and side surface, the PSG formed on the second surface and the BSG formed on the first surface in step S2.

[0106] In some embodiments, step S5 includes: etching the silicon substrate by a chain PSG removal machine with a hydrofluoric acid solution to remove the PSG on the first surface and side surface with the second surface facing up; etching the silicon substrate by a tank machine with an alkaline solution to remove the polysilicon layer formed on the first surface and side surface by wrap plating, the polysilicon layer at least including a doped polysilicon layer; etching the silicon substrate by a tank machine with a hydrofluoric acid solution to remove the BSG on the first surface and the PSG on the second surface.

[0107] In some specific examples, the roller speed of the chain PSG removal machine is controlled to be 3.2-4.6 m / min, the roller conveys the silicon substrate to immerse in a hydrofluoric acid solution with an electrical conductivity of 60-180 mS / cm, so that the first surface of the silicon substrate is immersed in the hydrofluoric acid solution for 1-2 min to remove the PSG formed on the first surface and side surface by wrap plating. Then, the silicon substrate is transferred to a tank polishing machine with an alkaline polishing solution, wherein the alkaline polishing solution is composed of KOH or NaOH or TMAH and corresponding additives, and the polysilicon layer or intrinsic amorphous silicon layer formed on the first surface and side surface by wrap plating is controlled to be completely removed. Finally, the silicon substrate is transferred to a tank polishing machine with a hydrofluoric acid solution to remove the BSG on the first surface and the PSG on the second surface.

[0108] It can be understood that, according to different methods of preparing the doped polysilicon in step S4, the by-products formed on the silicon substrate in step S4 will also be different. For example, when the method of preparing the doped polysilicon in step S4 is to prepare doped amorphous silicon by using the PECVD technology, and then to anneal the doped amorphous silicon to convert it into doped polysilicon, the PSG in the by-products formed on the silicon substrate in step S4 can also be other mask layer materials. The mask layer materials include at least one of phosphosilicate glass, silicon oxide, silicon oxynitride, and silicon nitride. The silicon oxide, silicon nitride, and silicon oxynitride can be formed by passing in a gas containing the corresponding elements during the process performed in step S4, such as one or more of O2, N2, NO, NH3, N2O, and SiH4. In this case, step S5 includes: removing the mask layer and the polysilicon layer formed on the first surface and the side surface in step S4, the mask layer formed on the second surface, and the BSG formed on the first surface in step S2.

[0109] Step S6: depositing a passivation layer on the first surface of the silicon substrate or on both the first surface and the second surface of the silicon substrate.

[0110] Step S6 can use the atomic layer deposition (ALD) technology or the plasma enhanced atomic layer deposition (PEALD) technology to deposit the passivation layer on the first surface of the silicon substrate or to deposit the passivation layer on both the first surface and the second surface of the silicon substrate.

[0111] In some embodiments, the thickness of the passivation layer is 2-8 nm, and the passivation layer can be aluminum oxide.

[0112] Step S7: depositing an anti-reflection layer on the first surface and the second surface of the silicon substrate.

[0113] In some embodiments, the material of the anti-reflection layer includes at least one of Si y N x , Si z N x O y , and SiO2, and the anti-reflection layer has the effect of reducing reflection and increasing transmission. The deposition thickness of the anti-reflection layer is controlled to be 70-90 nm.

[0114] The anti-reflection layer on the first surface is formed on the passivation layer, and if the second surface is deposited with the passivation layer, the anti-reflection layer on the second surface is formed on the passivation layer, and if the second surface is not deposited with the passivation layer, the anti-reflection layer on the second surface is formed on the doped polysilicon layer.

[0115] Step S8: forming metal gate lines on the first surface and the second surface of the silicon substrate to form a solar cell piece.

[0116] In some embodiments, step S8 comprises printing conductive metal paste on both the first surface and the second surface, curing the conductive metal paste by sintering to form the metal grid lines, and making the metal atoms in the conductive metal paste contact the silicon substrate.

[0117] It can be understood that the conductive metal paste can be cured by sintering to form the metal grid lines combined with the silicon substrate. The conductive metal paste is printed on the anti-reflective layer, and the metal atoms in the conductive metal paste contact the silicon substrate through the passivation layer and the anti-reflective layer during sintering.

[0118] The conductive metal paste can be silver paste, copper paste, etc., but is not limited thereto. In some embodiments, a plurality of conductive metals are mixed in the conductive metal paste.

[0119] The printing method of the conductive metal paste can be screen printing or laser pattern transfer, etc., but is not limited thereto.

[0120] Sintering can be performed in a sintering furnace. Generally, the sintering temperature required for the metal grid lines on the first surface is higher than the sintering temperature required for the metal grid lines on the second surface. In this step, the temperature of the sintering furnace is set to the sintering temperature required for the metal grid lines on the second surface, so that the metal grid lines on the second surface are sintered, and the metal grid lines on the first surface are not completely sintered. Therefore, the subsequent LECO technology needs to be used for auxiliary sintering. It can be understood that the sintering temperature here refers to the peak temperature in the sintering process. In some embodiments, the sintering temperature set in step S8 is 760-880℃, such as 760℃, 770℃, 780℃, 790℃, 800℃, 810℃, 820℃, 830℃, 840℃, 850℃, 860℃, 870℃, 880℃, etc. In some embodiments, the sintering temperature set in step S8 can also be 700-900℃.

[0121] Step S9: applying a voltage with a first direction to the solar cell. The first direction is a direction from the second surface to the first surface, and the voltage is 5-30V.

[0122] In the embodiments of the present application, the voltage is a reverse bias voltage. Step S9 comprises placing the solar cell on a conductive metal plate, so that the side where the second surface of the solar cell is located contacts the conductive metal plate; and pressing and contacting the metal grid lines on the first surface by a conductive probe; wherein the conductive metal plate and the conductive probe are respectively electrically connected to the positive and negative poles of a voltage source, so as to achieve the purpose of applying a voltage to the solar cell. The electric field direction of the voltage is opposite to the electric field direction of the built-in electric field formed by the PN junction of the solar cell.

[0123] If the voltage is too high, the reverse breakdown phenomenon may occur, and if the voltage is too low, the effect after laser scanning may not be obvious. In some embodiments, the voltage in step S9 is 10-20V. In some embodiments, the voltage in step S9 is 10-24V.

[0124] Step S10: maintaining the voltage and scanning the metal grid lines on the first surface of the silicon substrate by laser. The power density of the laser is 500-50000W / cm 2 .

[0125] Step S10 is to process the silicon substrate by LECO technology, that is, to scan the metal grid line area on the first surface of the silicon substrate by laser while maintaining the voltage applied on the solar cell.

[0126] If the power density of the laser is too high, the local temperature may be too high and overburning may occur, and if the power density is too low, the sintering degree is not enough, so that the process effect after laser scanning is not obvious. The laser power density is controlled to be 500-50000W / cm 2 , which can ensure the process effect after laser scanning and avoid overburning.

[0127] In some embodiments, the wavelength of the laser is 350-1500nm, and the power is 10-100W. In other embodiments, the power of the quartz large spot is 10-500W.

[0128] In some embodiments, the spot of the laser is a strip-shaped spot, the length of the strip-shaped spot is 0.5-5mm, and the width is 80-1000μm. In some embodiments, the length of the strip-shaped spot is 0.5-2mm.

[0129] If the wavelength of the laser is too low, the generated current may be too high and local overburning may occur; on the contrary, if the wavelength of the laser is too large, the absorption rate is not high, it is not easy to generate current, and the sintering effect is not good. In some embodiments, the wavelength of the laser is 900-1200nm, and the laser is infrared pulsed laser or infrared continuous laser.

[0130] Under the condition that the laser scanning range is certain, if the power of the laser is too high, the local temperature may be too high and overburning may occur, and if the power is too low, the sintering degree is not enough. In some embodiments, the laser power is set to be 40-50W.

[0131] In some embodiments, the scanning speed of the laser is 20000-100000mm / s.

[0132] In some embodiments, the scanning speed of the laser is 20000-60000 mm / s. In these embodiments, the time for each position on the metal grid line to be scanned by the laser is 10-40 μs. Since the monolithic silicon substrate has a certain area size, it takes a certain amount of time to complete the laser scanning of the monolithic silicon substrate. In some embodiments, the total duration of the laser scanning of the monolithic silicon substrate is 0.3-3 s.

[0133] The projection area of the metal grid line on the first surface side of the solar cell on the silicon substrate is an improvement area. The contact resistance of the improvement area before step S10 is a first resistance, and the contact resistance of the improvement area after step S10 is a second resistance, which is less than the first resistance.

[0134] The solar cell obtained in step S10 can also be tested and sorted, specifically including testing the solar cell wafer prepared in step S10, and grading the solar cell wafers with different conversion efficiencies.

[0135] The laser enhanced co-firing (LECO) technology irradiates the solar cell with high-intensity laser to excite charge carriers. At the same time, a voltage of 10 V or more is applied to the solar cell to generate a local current of several amperes, and then sintering occurs at the laser irradiation site of the solar cell to induce mutual diffusion of the metal conductive paste and silicon. In this way, the contact resistance between the metal grid line and the silicon substrate can be significantly reduced. The LECO technology allows a larger sintering temperature window, enables correct contact on the ultra-low doped emitter, and allows a higher open circuit voltage Voc. The first surface of the TOPCon cell is mainly conducted by holes. LECO excites a large number of free electrons when the reverse voltage is increased, and when it encounters a larger colloidal conductive metal, it will generate a transient high temperature, so that the conductive metal paste and silicon form a eutectic diffusion. When the diffusion contact forms a reduced resistance, the heat of the melting point disappears instantaneously, the temperature decreases, and the contact quality of the formed conductive metal paste-silicon alloy area is higher than that of the conductive metal crystal, thereby solving the first surface contact problem of the TOPCon cell.

[0136] The advantages of the LECO technology include improving the efficiency of the battery, being able to accurately control, reducing the loss of the battery piece, improving the production capacity and reliability and reducing the manufacturing cost. Specifically, (1) the LECO can improve the conversion efficiency of the solar cell by optimizing the metal contact and reducing the contact resistance, so as to obtain higher current under the same line width, or obtain thinner lines under the same current; (2) the laser process can very accurately control the heat affected zone, so that the passivation layer can be damaged and the metal contact can be formed without damaging the active area of the battery; (3) the traditional thermal sintering process can cause damage to the whole silicon substrate, and the LECO as a non-contact technology has lower risk and reduces the thermal stress and damage to the silicon substrate; (4) the LECO process has high automation degree and can be integrated into a high-speed production line, which helps to improve the consistency and reliability of the battery production; (5) since the laser treatment can be very accurate, the amount of metal used can be reduced, thereby reducing the manufacturing cost. In addition, the LECO is suitable for various integration levels and is widely applicable to various types of batteries.

[0137] Referring to FIG. 2, the application also provides a TOPCon solar cell 100 prepared by the above preparation method, which comprises a silicon substrate 11, a first passivation layer 12 and a first anti-reflection layer 13 sequentially located on a first surface of the silicon substrate 11, and a metal grid line 18 arranged on the side where the first surface of the silicon substrate 11 is located. The TOPCon solar cell 100 further comprises a tunneling oxide layer 14, a doped polysilicon layer 15, a second passivation layer 16 and a second anti-reflection layer 17 sequentially located on a second surface of the silicon substrate 11. The first surface and the second surface are oppositely arranged. It can be understood that the second surface passivation layer 16 can also be omitted.

[0138] The metal grid line 18 is located on the first anti-reflection layer 13, and the metal grid line 18 passes through the first passivation layer 12 and the first anti-reflection layer 13 and is connected with the boron-doped region of the silicon substrate 11. Although not shown in the figure, a metal grid line is also arranged on the side where the second surface of the silicon substrate 11 is located, and the metal grid line passes through the second passivation layer 16 and the second anti-reflection layer 17 and is connected with the doped polysilicon layer 15.

[0139] The material of the first passivation layer 12 and the second passivation layer 16 can be aluminum oxide, and the thickness is 2-8 nm. The material of the first anti-reflection layer 13 and the second anti-reflection layer 17 is at least one of Si y N x , Si z N x O y and SiO2, and the thickness is 70-90 nm. The thickness of the tunneling oxide layer 14 is 1.5-2.5 nm, and the thickness of the doped polysilicon layer 15 is 60-200 nm.

[0140] The technical solutions of the embodiments of the application will be further described below through specific embodiments.

[0141] Example 1

[0142] The solar cell of Example 1 was prepared according to the following steps.

[0143] Texturing: A high specific surface area texturing was prepared on the first surface of the N-type single crystal silicon substrate by using a wet bench.

[0144] Boron diffusion + high temperature oxidation: A boron diffusion machine equipped with a high temperature thermal field was used, and the boron source was BCl3. The sheet resistance of the first surface of the silicon substrate was controlled to be 250 ohm / sq; the thickness of the BSG was controlled to be 90 nm, and the surface concentration was controlled to be 4x1019cm-3. The temperature was controlled to be 800°C during the boron diffusion, and then increased to 1000°C for oxidation promotion. 18 cm -3

[0145] The second surface and the side surface of the silicon substrate were treated by using a chain type BSG removal machine and an alkali polishing machine. The roller speed of the chain type BSG removal machine was controlled to be 4 m / min, and the single surface (the second surface) of the silicon substrate was immersed in a hydrofluoric acid solution with a conductivity of 500 mS / cm, so that the second surface of the silicon substrate was immersed in the hydrofluoric acid solution for 1.5 min to remove the BSG layer generated by the plating on the second surface and the side surface. Then, the silicon substrate was transferred into a tank type polishing machine to remove the boron diffusion layer generated by the plating on the second surface and the side surface, wherein the alkali polishing solution was composed of KOH and corresponding additives, and the etching depth was controlled to be 3 μm.

[0146] A tunneling oxide layer with a thickness of 2 nm and a phosphorus-doped polysilicon layer with a thickness of 120 nm were formed on the second surface of the silicon substrate.

[0147] The first surface, the side surface and the second surface of the silicon substrate were treated by using a chain type PSG removal machine, an alkali polishing machine and an acid polishing machine. The roller speed of the chain type PSG removal machine was controlled to be 4 m / min, and the single surface (the first surface) of the silicon substrate was immersed in a hydrofluoric acid solution with a conductivity of 120 mS / cm, so that the first surface of the silicon substrate was immersed in the hydrofluoric acid solution for 1.5 min to remove the PSG generated by the plating on the first surface and the side surface. Then, the silicon substrate was transferred into a tank type alkali polishing machine to remove the polysilicon layer plated on the first surface and the side surface, wherein the alkali polishing solution was composed of KOH and corresponding additives. Finally, the silicon substrate was transferred into a tank type acid polishing machine with a hydrofluoric acid solution to remove the BSG on the first surface and the PSG on the second surface.

[0148] Deposition of passivation layer: An aluminum oxide passivation layer with a thickness of 5 nm was formed on the first surface and the second surface of the silicon substrate by using ALD technology.

[0149] ​Deposition of anti-reflective layer: depositing Si with a thickness of 80 nm on the first surface and the second surface of the silicon substrate y N x Anti-reflective layer.

[0150] Forming metal grid lines: printing conductive silver paste on the first surface and the second surface of the silicon substrate, and sintering and curing at 820℃ to form metal grid lines, to obtain a solar cell piece.

[0151] LECO: applying a voltage of 14V on the solar cell piece, and using a laser to scan the metal grid lines on the first surface. The laser is an infrared pulsed laser with a wavelength of 500nm, a laser power of 45W, a power density of 5000W / cm 2 , a scanning speed of the laser of 40000mm / s, and a spot of the laser in the form of a strip with a length of 1mm and a width of 100μm.

[0152] Examples 2 to 8

[0153] The process parameters of each step of Examples 2 to 8 are basically the same as those of each step of Example 1, and the specific differences are shown in Table 2.

[0154] Comparative Example 1

[0155] The solar cell of Comparative Example 1 is prepared according to the conventional TOPCon process, and the difference from Example 1 is that a laser SE step is added between the boron diffusion step and the high-temperature oxidation step, and the LECO step is reduced. It is prepared according to the following steps: texturing, boron diffusion, laser SE, high-temperature oxidation, removing BSG on the second surface and side surface + removing boron-doped diffusion layer by alkali etching, doping polysilicon on the second surface, removing PSG and polysilicon layer on the first surface and side surface + removing PSG on the second surface + removing BSG on the first surface, depositing passivation layer, depositing anti-reflective layer, printing metal grid + sintering. The process parameters of each step of Comparative Example 1 are basically the same as those of each step of Example 1.

[0156] Comparative Example 2

[0157] Comparative Example 2 is basically the same as Comparative Example 1, except that the sintering temperature in the step of sintering the metal grid is 840℃ for Comparative Example 2.

[0158] Table 1

[0159] Table 1 shows the parameter comparison of two cell pieces prepared by the conventional TOPCon process, wherein the process parameters of the two cell pieces are the same except for the first surface sheet resistance. Specifically, Table 1 shows the change values of the conversion efficiency (Eta), short-circuit current (Isc), open-circuit voltage (Voc), fill factor (FF) and parallel resistance (Rsh) of the cell piece of 350 ohm / sq relative to the cell piece of 250 ohm / sq, wherein "+" represents an increase and "-" represents a decrease. As can be seen from Table 1, for the conventional TOPCon process, if the first surface sheet resistance of the cell is increased from 250 ohm / sq to 350 ohm / sq, although the conversion efficiency of the cell will increase by 0.03%, the fill factor will decrease by 0.13%, indicating that increasing the first surface sheet resistance of the cell piece is not conducive to the improvement of the fill factor of the cell. It should be noted that the fill factor of the cell is an important parameter of the performance of the solar cell, and the larger the value is, the better the performance of the solar cell is.

[0160] The conversion efficiency (Eta), open-circuit voltage (Voc), short-circuit current (Isc) and fill factor (FF) of the cell pieces obtained in Examples 1 to 8 and Comparative Examples 1 to 2 are shown in Table 2.

[0161] Table 2

[0162] As can be seen from Table 2, compared with Comparative Examples 1 and 2, the conversion efficiency (Eta), open-circuit voltage (Voc), short-circuit current (Isc) and fill factor (FF) of the cell pieces of Examples 1 to 8 are all improved, indicating that the cell prepared by the preparation method of the present application has better performance.

[0163] In addition, compared with Comparative Examples 1 and 2, in the case of having the same first surface sheet resistance of 250 ohm / sq, the conversion efficiency (Eta), open-circuit voltage (Voc), short-circuit current (Isc) and fill factor (FF) of the cell pieces of Examples 1 to 3 are all significantly improved, indicating that the cell prepared by the preparation method of the present application has better performance.

[0164] In addition, compared with Comparative Examples 1 and 2, even if the first surface sheet resistance of the cell pieces of Examples 4 to 6 is increased to 350 ohm / sq, 450 ohm / sq and 550 ohm / sq respectively, the conversion efficiency (Eta), open-circuit voltage (Voc), short-circuit current (Isc) and fill factor (FF) are all significantly improved.

[0165] The preparation process of the TOPCon cell of the present application further improves the p-type element doping concentration window of the first surface of the cell through the LECO technology and the setting of its process parameters, and does not affect the contact between the metal grid line and the silicon substrate, thereby improving the conversion efficiency of the cell. Compared with the preparation process of the conventional TOPCon cell containing the laser SE technology, the first surface sheet resistance of the preparation process of the TOPCon cell of the present application can be relaxed to 200-800 ohm / sq, the recombination of the light absorption area of the first surface of the cell is further reduced, and the cell circuit voltage and conversion efficiency are improved. In addition, by introducing the LECO technology, the laser SE process is no longer needed, and further, the boron diffusion and high-temperature oxidation can be combined into a high-temperature boron diffusion and expansion process, further shortening the process time.

[0166] The above embodiments are only used to illustrate the technical solutions of the present application and not to limit it. Although the present application has been described in detail with reference to the above preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present application can be modified or replaced without departing from the spirit and scope of the present application.

Claims

1. A method for preparing a solar cell, characterized in that: include: Step S1: providing a silicon substrate, wherein the silicon substrate is an N-type silicon substrate, comprising a first surface, a second surface opposite to the first surface, and at least one side surface connecting the first surface and the second surface, and performing a texturing treatment on the first surface of the silicon substrate; Step S2: doping the silicon substrate with boron; Step S3: removing the boron-doped diffusion layer and the borosilicate glass on the second surface and the at least one side surface; Step S4: forming a tunneling oxide layer and a doped polysilicon layer on the second surface; Step S5: removing the phosphosilicate glass and the polysilicon layer on the first surface and the at least one side surface, the phosphosilicate glass on the second surface, and the borosilicate glass on the first surface; Step S6: depositing a passivation layer on the first surface or on both the first surface and the second surface; Step S7: depositing an anti-reflection layer on the first surface and the second surface; Step S8: forming metal grid lines on the side of the silicon substrate where the first surface is located and the side of the silicon substrate where the second surface is located, respectively, to form a solar cell; Step S9: applying a voltage to the solar panel, wherein the electric field direction of the voltage is a first direction, the first direction is a direction from the second surface to the first surface, and the voltage is 5-30V; Step S10: maintaining the voltage, scanning the metal grid lines on the first surface with a laser, wherein the power density of the laser is 500-50000 W / cm 2 .

2. The method for preparing a solar cell according to claim 1, wherein: The step S2 further includes controlling boron doping so that the sheet resistance of the first surface of the silicon substrate is 200-800 ohm / sq.

3. The method for preparing a solar cell according to claim 1, wherein: The boron doping of the silicon substrate includes boron diffusion of the silicon substrate and high-temperature oxidation of the silicon substrate, wherein the boron diffusion is performed within a first temperature range and the high-temperature oxidation treatment is performed within a second temperature range, wherein a minimum value of the second temperature range is greater than a maximum value of the first temperature range.

4. The method for preparing a solar cell according to claim 3, wherein: The first temperature range is 700-900° C., and the second temperature range is 950-1050° C.; or, The first temperature range is 700-950°C, and the second temperature range is 950-1100°C.

5. The method for preparing a solar cell according to claim 1, wherein: The step S2 is performed in a boron diffusion machine with a high-temperature thermal field.

6. The method for preparing a solar cell according to claim 1, wherein: Doping the silicon substrate with boron includes sequentially performing boron diffusion and laser doping on the silicon substrate, or, Doping the silicon substrate with boron includes sequentially performing boron diffusion, laser doping, and high-temperature oxidation on the silicon substrate.

7. The method for preparing a solar cell according to claim 1, wherein: The step S9 includes: Placing the solar cell on a conductive metal plate so that the side of the solar cell where the second surface is located is in contact with the conductive metal plate; A conductive probe is placed on the solar cell so that the conductive probe is in direct contact with the metal grid line on the first surface, wherein the conductive metal plate is electrically connected to the positive pole of a voltage source, and the conductive probe is electrically connected to the negative pole of the voltage source.

8. The method for preparing a solar cell according to claim 1, wherein: In the step S9 and the step S10, the voltage range is 10-20V.

9. The method for preparing a solar cell according to claim 1, wherein: In step S10, the scanning speed of the laser is 20000-100000 mm / s, or; In step S10, the scanning speed of the laser is 20000-60000 mm / s.

10. The method for preparing a solar cell according to claim 9, wherein: In step S10, the wavelength of the laser is 350-1500 nm, and the power is 10-100 W, or; In step S10, the wavelength of the laser is 350-1500 nm, and the power is 10-500 W.

11. The method for preparing a solar cell according to claim 10, wherein: In the step S10, the laser is a stripe-shaped spot, the length of the stripe-shaped spot is 0.5-5 mm, and the width of the stripe-shaped spot is 80-1000 μm.

12. The method for preparing a solar cell according to claim 11, wherein: In the step S10, the scanning speed of the laser is 20000-60000 mm / s, and the time for the laser to scan each position on the metal grid line is 10-40 μs.

13. The method for preparing a solar cell according to claim 10, wherein: In step S10, the wavelength range of the laser is 900-1200 nm, and the laser is an infrared pulse laser or an infrared continuous laser.

14. The method for preparing a solar cell according to claim 1, wherein: The projection area of ​​the metal gate line of the first surface on the silicon substrate is the improved area, the contact resistance of the improved area before step S10 is the first resistance, and the contact resistance of the improved area after step S10 is the second resistance, and the second resistance is smaller than the first resistance.

15. The method for preparing a solar cell according to claim 1, wherein: The step S8 includes printing a conductive metal paste on the first surface and the second surface, and sintering to solidify the conductive metal paste to form the metal gate lines.

16. The method for preparing a solar cell according to claim 1, wherein: The step S3 comprises: etching the silicon substrate with a chain machine having a hydrofluoric acid solution so that the first surface faces upward to remove the borosilicate glass from the second surface and the at least one side surface; and The silicon substrate is etched using a bath machine with an alkaline solution to remove the boron-doped diffusion layer on the second surface and the at least one side surface.

17. The method for preparing a solar cell according to claim 1, wherein: The step S4 comprises: forming a tunneling oxide layer and an intrinsic amorphous silicon layer in sequence on the second surface by low-pressure chemical vapor deposition; and performing phosphorus diffusion to convert the intrinsic amorphous silicon layer into a doped polysilicon layer; or The step S4 comprises: forming a tunneling oxide layer and a doped amorphous silicon layer in sequence on the second surface by plasma enhanced chemical vapor deposition; Annealing is performed to convert the doped amorphous silicon layer into a doped polysilicon layer.

18. The method for preparing a solar cell according to claim 1, wherein: The step S5 comprises: Etching the silicon substrate using a chain machine with a hydrofluoric acid solution so that the second surface of the silicon substrate faces upward to remove the phosphosilicate glass on the first surface and the at least one side surface; Etching the silicon substrate using a bath machine with an alkaline solution to remove the polysilicon layer on the first surface and the at least one side surface, wherein the polysilicon layer includes a doped polysilicon layer; The silicon substrate is etched using a bath machine with a hydrofluoric acid solution to remove the borosilicate glass on the first surface and the phosphosilicate glass on the second surface.

19. The method for preparing a solar cell according to claim 1, wherein: The step S4 further includes forming a tunneling oxide layer with a thickness of 1.5-2.5 nm and forming a doped polysilicon layer with a thickness of 60-200 nm.

20. The method for preparing a solar cell according to claim 1, wherein: The step S6 further includes depositing an aluminum oxide layer with a thickness of 2-8 nm as the passivation layer.

21. The method for preparing a solar cell according to claim 1, wherein: The step S7 further includes: depositing the anti-reflection layer with a thickness of 70-90 nm, wherein the material of the anti-reflection layer includes Si y N x 、Si z N x O y and at least one of SiO2.

22. The method for preparing a solar cell according to claim 1, wherein: In the step S6, the passivation layer is also deposited on at least one of the side surfaces; In step S7, the anti-reflection layer is also deposited on at least one of the side surfaces.

23. A method for preparing a solar cell, characterized in that: include: Step S1: providing a silicon substrate, wherein the silicon substrate is an N-type silicon substrate, comprising a first surface, a second surface opposite to the first surface, and at least one side surface connecting the first surface and the second surface, and performing a texturing treatment on the first surface of the silicon substrate; Step S2: doping the silicon substrate with boron; Step S3: removing the boron-doped diffusion layer and the borosilicate glass on the second surface and the at least one side surface; Step S4: forming a tunneling oxide layer and a doped polysilicon layer on the second surface; Step S5: removing the mask layer and the polysilicon layer on the first surface and the at least one side surface, the mask layer on the second surface, and the borosilicate glass on the first surface; Step S6: depositing a passivation layer on the first surface or on both the first surface and the second surface; Step S7: depositing an anti-reflection layer on the first surface and the second surface; Step S8: forming metal grid lines on the side of the silicon substrate where the first surface is located and the side of the silicon substrate where the second surface is located, respectively, to form a solar cell; Step S9: applying a voltage to the solar panel, wherein the electric field direction of the voltage is a first direction, the first direction is a direction from the second surface to the first surface, and the voltage is 5-30V; Step S10: maintaining the voltage, scanning the metal grid lines on the first surface with a laser, wherein the power density of the laser is 500-50000 W / cm 2 .

24. The method for preparing a solar cell according to claim 23, wherein: The mask layer includes at least one of phosphosilicate glass, silicon oxide, silicon oxynitride, and silicon nitride.

25. A solar cell, produced by the method according to claim 1 or 23, characterized in that: The solar cell comprises: a silicon substrate comprising a first surface and a second surface opposite to the first surface; a first passivation layer and a first anti-reflection layer located on the first surface; a metal grid line located on the first anti-reflection layer; a tunnel oxide layer, a doped polysilicon layer, a second passivation layer, and a second anti-reflection layer located on the second surface; and A metal grid line is located on the second anti-reflection layer.

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