EC chip, multi-chip packages, systems and electronic device

Abstract

Provided in the embodiments of the present application are an EC chip, multi-chip packages, systems and an electronic device. The EC chip in one embodiment comprises: a bus interface, which is used for receiving and sending a data packet; a processor, which is used for parsing the received data packet, and sending a replay protection command to a control module when the replay protection command is obtained after parsing; a signature module, which is used for generating signature information; and the control module, which is used for controlling the signature module to verify and execute the replay protection command.

Description

EC chip, package chip, system and electronic device

[0001] Cross-reference to Related Applications

[0002] This application claims priority to the Chinese Patent Application No. 202410454406.0, filed on April 16, 2024, and entitled “EC chip, package chip, system and electronic device”, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the technical field of replay protection, in particular to an embedded controller (EC) chip, a package chip, a system and an electronic device. BACKGROUND

[0004] Replay attacks refer to an attack mode in which an attacker records legitimate communication data packets and then sends the recorded communication data packets again to deceive the system, so that the system mistakenly believes that the data packets are legitimate, thereby achieving the attack purpose. Replay protection monotonic counter (RPMC) can be used to detect replay attacks. For example, communication parties with RPMC record the same count value by means of the monotonic counter. The data sender adds the recorded count value as a variable to the data packet, encrypts the data packet and transmits the data packet on the bus. The data receiver must know the same variable and include it in the data verification algorithm to pass the authentication, thereby preventing replay attacks.

[0005] RPMC is an important function for computing devices such as personal computers. In the related art, an external Flash integrates the RPMC scheme, which communicates with the platform controller hub (PCH) through the serial peripheral interface (SPI). However, the external Flash is not necessary for computing devices such as notebook computers, and some notebook computers do not have an external Flash to reduce costs, which results in that some notebook computers do not have the RPMC function. How to enhance the security of computing devices without increasing the cost of computing devices has not yet been effectively solved. SUMMARY

[0006] In view of the above problems, the embodiments of the present application provide an EC chip, a package chip, a system and an electronic device to solve the above technical problems.

[0007] In a first aspect, an embodiment of the present application provides an EC chip, comprising: a bus interface configured to receive and send data packets; a processor configured to parse the received data packets, and send a replay protection command to a control module when a replay protection command is parsed; a signature module configured to generate signature information; and the control module configured to control the signature module to verify and execute the replay protection command.

[0008] In a second aspect, an embodiment of the present application provides a system, comprising: one or more memory chips configured to store at least part of replay protection related data; an EC chip, comprising: a bus interface configured to receive and send data packets; a processor configured to parse the received data packets, and send a replay protection command to a control module when a replay protection command is parsed; one or more memory control modules configured to access the one or more memory chips; a signature module configured to generate signature information; and the control module configured to control the signature module and the one or more memory control modules to verify and execute the replay protection command.

[0009] In a third aspect, an embodiment of the present application provides a system, comprising: an EC chip and a replay protection chip; wherein the EC chip comprises: a bus interface configured to receive and send data packets; a processor configured to parse the received data packets, and send a replay protection command to the replay protection chip when a replay protection command is parsed; and wherein the replay protection chip comprises: a signature module configured to generate signature information; and a control module configured to control the signature module to verify and execute the replay protection command.

[0010] In a fourth aspect, an embodiment of the present application provides a system, comprising: one or more memory chips; an EC chip, comprising: a bus interface configured to receive and send data packets; a processor configured to parse the received data packets, and send a replay protection command to a control module when a replay protection command is parsed; a signature module configured to generate signature information; a memory control module configured to access the one or more memory chips; and the control module configured to control the signature module and the memory control module to verify and execute the replay protection command.

[0011] In a fifth aspect, an embodiment of the present application provides a system, comprising: one or more memory chips; an EC chip; and a replay protection chip; wherein the EC chip comprises: a bus interface configured to receive and send data packets; a processor configured to parse the received data packets, and send a replay protection command to the replay protection chip when a replay protection command is parsed; wherein the replay protection chip comprises: a signature module configured to generate signature information; and a control module configured to control the signature module to verify and execute the replay protection command; and wherein the EC chip and / or the replay protection chip further comprises: one or more memory control modules configured to access the one or more memory chips.

[0012] In a sixth aspect, an electronic device is provided, comprising a device main body and an EC chip, or a sealing chip, or a system arranged on the device main body.

[0013] These aspects or other aspects of the present application will be made clearer in the following description of embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0015] FIG. 1 shows a structural schematic diagram of an EC chip provided by an embodiment of the present application.

[0016] FIG. 2 shows a structural schematic diagram of another EC chip provided by an embodiment of the present application.

[0017] FIG. 3 shows a structural schematic diagram of another EC chip provided by an embodiment of the present application.

[0018] FIG. 4a shows a structural schematic diagram of another EC chip provided by an embodiment of the present application.

[0019] FIG. 4b shows a structural schematic diagram of another EC chip provided by an embodiment of the present application.

[0020] FIG. 4c shows a structural schematic diagram of another EC chip provided by an embodiment of the present application.

[0021] FIG. 4d shows a structural schematic diagram of another EC chip provided by an embodiment of the present application.

[0022] FIG. 5 shows a structural schematic diagram of another EC chip provided by an embodiment of the present application.

[0023] FIG. 6 shows a structural schematic diagram of a sealing chip provided by an embodiment of the present application.

[0024] FIG. 7 shows a structural schematic diagram of another sealing chip provided by an embodiment of the present application.

[0025] FIG. 8 shows a flowchart of an exemplary root key binding process provided by an embodiment of the present application.

[0026] FIG. 9 shows a flowchart of an exemplary signature key updating process provided by an embodiment of the present application.

[0027] FIG. 10 shows a flowchart of an exemplary read replay protection monotonic counter value process provided by an embodiment of the present application.

[0028] FIG. 11 shows a flowchart of an exemplary replay protection monotonic counter value increase 1 process according to an embodiment of the present application.

[0029] FIG. 12 shows a flowchart of an exemplary reading of a RPMC parameter process according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] Embodiments of the present application will be described in detail below with reference to the drawings, in which like reference numerals refer to like elements or elements having the same function throughout the whole drawing. The embodiments described below are exemplary only, and are used to explain the present application, and should not be understood as limiting the present application.

[0031] In order to make the technical personnel in the art better understand the scheme of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0032] In the embodiments of the present application, it should be noted that, in this document, relational terms such as first and second and the like are used solely to distinguish one entity or action from another entity or action, without necessarily requiring or implying any actual such relationship or order between or among the entities or actions.

[0033] Moreover, the terms "comprising", "comprises", "including", "includes" or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article or apparatus. Without further limitation, an element preceded by "comprises a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article or apparatus that includes the recited element.

[0034] In the description of the embodiments of the present application, the words "example" or "for example" or the like are used to represent examples, illustrations or descriptions. Any embodiment or design scheme described as "example" or "for example" in the embodiments of the present application is not interpreted as more preferred or having more advantages than another embodiment or design scheme. The words "example" or "for example" or the like are intended to present a relative concept in a clear manner.

[0035] In addition, "multiple" in the embodiments of the present application refers to two or more, and therefore "multiple" in the embodiments of the present application can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, including at least one means including one, two or more, and does not limit which ones are included, for example, including at least one of A, B and C, and the included can be A, B, C, A and B, A and C, B and C, or A and B and C.

[0036] It should be noted that in the embodiments of the present application, the association relationship of the associated objects described by "and / or" can represent three relationships, for example, A and / or B can represent three cases of A alone, A and B together, and B alone. In addition, the character " / ", unless otherwise specified, generally represents a "or" relationship between the associated objects before and after it.

[0037] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical elements can be direct or indirect connection between the two electrical elements. For example, A and B are connected, which can be direct connection between A and B, or indirect connection between A and B through one or more other electrical elements.

[0038] The EC chip can be in communication connection with a host processor, and the host processor can include a central processing unit (CPU). The communication interface between the EC chip and the host processor can include, but is not limited to, one or more of LPC (Low Pin Count), SPI (Serial Peripheral Interface), eSPI (Enhanced Serial Peripheral Interface), etc. The EC chip can help the host processor manage peripherals (also known as peripheral devices). For example, the peripherals can include, but are not limited to, one or more of a fan, a keyboard, a mouse, a video, an audio, a USB, a power supply, and others. The EC chip can include a processor, and as an example, the EC chip can adopt an MCU core.

[0039] As an example, the EC chip can be built-in with Flash storage, SRAM, instruction cache, support one or more interfaces such as eSPI, LPC, I2C Host, etc., can have one or more interfaces such as high-speed UART, high-speed SPI interface, multi-mode I2C, USB, PD / TYPE-C, keyboard, fan, breathing light, atmosphere light, etc., can be built-in with high-precision digital-to-analog conversion ADC / DAC, comparator, voltage monitoring, temperature monitoring, etc. Digital-analog interface.

[0040] It should be appreciated that the foregoing EC chip is merely an example and is not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0041] Embodiments of the present application relate to implementing replay protection using an EC chip. Replay protection can be implemented in electronic devices using an EC chip, such as a notebook computer. Replay protection can be implemented by hardware circuits, such as a control module and a signature module, which can quickly process replay protection commands.

[0042] Some embodiments of the present application provide an EC chip with a signature module and a control module, and implement replay protection using a processor and a bus interface of the EC chip and the signature module and the control module. Some embodiments of the present application provide an EC chip with a signature module and a control module outside the EC chip for implementing replay protection, and implement replay protection using a processor and a bus interface of the EC chip and the signature module and the control module outside the EC chip. In some embodiments, the signature module and the control module outside the EC chip can be integrated into a chip (referred to as a replay protection chip). The replay protection chip can be integrated with the EC chip into a memory chip.

[0043] FIG. 1 shows a structure diagram of an EC chip according to an embodiment of the present application. As shown in FIG. 1, the EC chip 100 can include a bus interface 101, a processor 102, a signature module 103, and a control module 104. The bus interface 101 is configured to receive and send data packets. The processor 102 is configured to parse the received data packets and send a replay protection command to the control module 104 when a replay protection command is parsed. The signature module 103 is configured to generate signature information. The control module 104 is configured to control the signature module 103 to verify and execute the replay protection command. According to the embodiments of the present application, the bus interface and the processor of the EC chip are used to receive and parse the replay protection command, and the signature module and the control module are used to verify and execute the replay protection command, so that replay protection is implemented in the EC chip. Replay protection can be implemented in electronic devices using an EC chip, such as a notebook computer.

[0044] In some embodiments, as shown in FIG. 1, the EC chip 100 can include a replay protection hardware 110, and the signature module 103 and the control module 104 are located in the replay protection hardware 110. In this embodiment, the bus interface 101 receives and sends data packets, the processor 102 parses the replay protection command from the data packets, and the replay protection hardware 110 processes the replay protection command, so that the replay protection command is processed in the replay protection hardware 110 without cross-module processing, which can speed up the processing. As an example, the replay protection hardware 110 can be an IP core (also referred to as a semiconductor IP core), which can improve chip design efficiency, shorten chip design cycle, and reduce development cost.

[0045] In some embodiments, as shown in FIG. 2, the EC chip 100 can further include one or more storage modules 105 for storing replay protection related data.

[0046] In some examples, as shown in FIG. 2, the one or more storage modules 105 can include a first storage module 105-1 for storing a root key.

[0047] In some examples, as shown in FIG. 2, the one or more storage modules 105 can include a second storage module 105-2 for storing a signature key generated based on the root key.

[0048] In some examples, as shown in FIG. 2, the one or more storage modules 105 can include a third storage module 105-3 for storing a replay protection monotonic counter value.

[0049] In some examples, as shown in FIG. 2, the one or more storage modules 105 can include the first storage module 105-1 and the second storage module 105-2.

[0050] In some examples, as shown in FIG. 2, the one or more storage modules 105 can include the first storage module 105-1 and the third storage module 105-3.

[0051] In some examples, as shown in FIG. 2, the one or more storage modules 105 can include the second storage module 105-2 and the third storage module 105-3.

[0052] In some examples, as shown in FIG. 2, the one or more storage modules 105 can include a first storage module 105-1 for storing a root key, a second storage module 105-2 for storing a signature key generated based on the root key, and a third storage module 105-3 for storing a replay protection monotonic counter value.

[0053] In some examples, the first storage module 105-1 can be a Non-Volatile Memory (NVM), which can be configured to be read and written only by the control module 104 to ensure the security of the root key. In some examples, the first storage module 105-1 can be a Non-Volatile One-Time Memory, which can be written only once.

[0054] In some examples, the second storage module 105-2 can be a normal storage area, which can be lost when power is off. In some examples, the second storage module 105-2 can be configured to allow only the control module 104 to read and write to ensure the security of the signature key.

[0055] In some examples, the third storage module 105-3 can be a non-volatile memory, and the third storage module 105-3 can be configured to be rewritable. In some examples, the third storage module 105-3 can be configured to allow only the control module 104 to read and write, to ensure the security of the replay protection monotonic counter value.

[0056] In some embodiments, as shown in FIG. 2, the signature module 103, the control module 104, and the one or more storage modules 105 can be located within the replay protection hardware 110. With this embodiment, the bus interface 101 receives and sends data packets, the processor 102 parses the replay protection command from the data packets, and the replay protection hardware 110 processes the replay protection command, such that the replay protection command is processed within the replay protection hardware 110, without the need to be processed across modules, which can speed up the processing.

[0057] In some embodiments, the one or more storage modules 105 can be external, i.e., some replay protection related data can be stored in one or more external storage modules outside the EC chip. In the embodiments of the present application, the "external storage module" refers to a storage module located outside the EC chip.

[0058] In some embodiments, as shown in FIG. 3, the EC chip 100 can further include one or more storage control modules 106 for accessing one or more external storage modules 201 for storing replay protection related data. By providing one or more storage control modules in the EC chip 300, the data in the one or more external storage modules 201 can be protected from being accessed by the outside world.

[0059] In some examples, one storage control module 106 is used to access multiple external storage modules 201. In other embodiments, at least one storage control module 106 corresponds to one external storage module 201, i.e., at least some external storage modules 201 are accessed by corresponding storage control modules 106.

[0060] In some examples, as shown in FIG. 3, the one or more storage control modules 106 can include a first storage control module 106-1 for accessing a first external storage module 201-1 for storing a root key.

[0061] In some examples, as shown in FIG. 3, the one or more storage control modules 106 can include a second storage control module 106-2 for accessing a second external storage module 201-2 for storing a signature key generated based on the root key.

[0062] In some examples, as shown in FIG. 3, the one or more storage control modules 106 can include a third storage control module 106-3 to access a third external storage module 201-3 to store a replay protection monotonic counter value.

[0063] In some examples, as shown in FIG. 3, the one or more storage control modules 106 can include a first storage control module 106-1 to access a first external storage module 201-1 to store a root key; and a second storage control module 106-2 to access a second external storage module 201-2 to store a signature key generated based on the root key.

[0064] In some examples, as shown in FIG. 3, the one or more storage control modules 106 can include a first storage control module 106-1 to access a first external storage module 201-1 to store a root key; and a third storage control module 106-3 to access a third external storage module 201-3 to store a replay protection monotonic counter value.

[0065] In some examples, as shown in FIG. 3, the one or more storage control modules 106 can include a second storage control module 106-2 to access a second external storage module 201-2 to store a signature key generated based on the root key; and a third storage control module 106-3 to access a third external storage module 201-3 to store a replay protection monotonic counter value.

[0066] In some examples, as shown in FIG. 3, the one or more storage control modules 106 can include a first storage control module 106-1 to access a first external storage module 201-1 to store a root key; a second storage control module 106-2 to access a second external storage module 201-2 to store a signature key generated based on the root key; and a third storage control module 106-3 to access a third external storage module 201-3 to store a replay protection monotonic counter value.

[0067] In some examples, the first external storage module 201-1 can be a non-volatile memory, which can be configured to be read and written only by the control module 104 through the storage control module 106 to ensure the security of the root key. In some examples, the first external storage module 201-1 can be a non-volatile one-time memory, which can be written only once.

[0068] In some examples, the second external storage module 201-2 can be a normal storage area, which can lose power. In some examples, the second external storage module 201-2 can be configured to allow only the control module 104 to read and write through the storage control module 106 to ensure the security of the signature key.

[0069] In some examples, the third storage control module 105-3 can be a non-volatile memory, and the third storage control module 106-3 can be configured to be rewritable. In some examples, the third storage control module 106-3 can be configured to only allow the control module 104 to read and write through the storage control module 106 to ensure the security of the replay protection monotonic counter value.

[0070] In some embodiments, as shown in FIG. 3, the signature module 103, the control module 104, and the one or more storage control modules 106 can be located within the replay protection hardware 110. With this embodiment, the bus interface 101 receives and sends data packets, the processor 102 parses the replay protection command from the data packets, and the replay protection hardware 110 processes the replay protection command such that the replay protection command is processed within the replay protection hardware 110 without the need to cross modules, which can speed up the processing.

[0071] In some embodiments, the EC chip can further include one or more storage modules for storing a first portion of replay protection related data, and one or more storage control modules for accessing one or more external storage modules for storing a second portion of the replay protection related data.

[0072] FIGS. 4a-4d respectively show a structure diagram of an EC chip according to an embodiment of the present disclosure. As shown in FIGS. 4a-4d, the EC chip 400 can include a bus interface 401, a processor 402, a signature module 403, a control module 404, one or more storage modules 405, and one or more storage control modules 406. The bus interface 401 is configured to receive and send data packets. The processor 402 is configured to parse the received data packets and send a replay protection command to the control module 404 when a replay protection command is parsed. The signature module 403 is configured to generate signature information. The one or more storage control modules 406 are configured to access one or more external storage modules 201. The control module 404 is configured to control the signature module 403, the one or more storage modules 405, and the one or more storage control modules 406 to verify and execute the replay protection command.

[0073] In some examples, the one or more storage modules 405 are configured to store a first portion of replay protection related data, and the one or more external storage modules 201 are configured to store a second portion of the replay protection related data. For example, the one or more storage modules 405 are configured to store one or any two of a root key, a signature key generated based on the root key, and a replay protection monotonic counter value, and the one or more external storage modules 201 are configured to store the remaining portion of the root key, the signature key generated based on the root key, and the replay protection monotonic counter value.

[0074] In some examples, as shown in FIG. 4a, the one or more storage modules 405 can include a second storage module 405-2 to store a signing key generated based on the root key, and a third storage module 405-3 to store a replay protection monotonic counter value. The one or more external storage modules 201 can include a first external storage module 201-1 to store the root key, and the storage control module 406 is configured to access the first external storage module 201-1. In this implementation, the EC chip stores the root key and the replay protection monotonic counter value in the external storage module, and the storage control module within the EC chip is configured to access the root key stored in the external storage module.

[0075] In some examples, as shown in FIG. 4b, the one or more storage modules 405 can include a first storage module 405-1 to store the root key, and a third storage module 405-3 to store a replay protection monotonic counter value. The one or more external storage modules 201 can include a second external storage module 201-2 to store a signing key generated based on the root key, and the storage control module 406 is configured to access the second external storage module 201-2. In this implementation, the EC chip stores the root key and the replay protection monotonic counter value, and the signing key generated based on the root key is stored in the external storage module, and the storage control module within the EC chip is configured to access the signing key stored in the external storage module.

[0076] In some examples, as shown in FIG. 4c, the one or more storage modules 405 can include a first storage module 405-1 to store the root key, and a second storage module 405-2 to store a signing key generated based on the root key. The one or more external storage modules 201 can include a third external storage module 201-3 to store a replay protection monotonic counter value, and the storage control module 406 is configured to access the third external storage module 201-3. In this implementation, the EC chip stores the root key and the signing key, and the replay protection monotonic counter value is stored in the external storage module, and the storage control module within the EC chip is configured to access the replay protection monotonic counter value stored in the external storage module.

[0077] In some examples, as shown in FIG. 4d, the one or more storage modules 405 can include a third storage module 405-3 to store a replay protection monotonic counter value. The one or more external storage modules 201 can include a first external storage module 201-1 to store the root key, and a second external storage module 201-2 to store a signing key, and the storage control module 406 is configured to access the first external storage module 201-1 and the second external storage module 201-2.

[0078] Although FIG. 4d shows the case that the first external storage module 201-1 and the second external storage module 201-2 are accessed by the storage control module 406, in the embodiments of the present application, the first external storage module 201-1 and the second external storage module 201-2 can be respectively provided with corresponding storage control modules, for example, the first storage control module and the second storage control module shown in FIG. 3, which will not be repeated here.

[0079] It should be understood that FIG. 4d is only illustrative, and in the embodiments of the present application, any two storage modules 402 can be externalized, and corresponding external storage modules 201 can be provided, which are not limited in the embodiments of the present application.

[0080] In the embodiments of the present application, the one or more external storage modules described above can include one or more storage chips.

[0081] In some embodiments, the EC chip generates a response corresponding to the replay protection command. The control module is further configured to generate a response corresponding to the replay protection command; and the processor is further configured to encapsulate the response and send the encapsulated data packet through the bus interface.

[0082] In order to improve the response speed, the EC chip can temporarily store the predetermined data corresponding to the replay protection command in generating the replay protection related data, and synchronize the temporarily stored predetermined data to the storage module or the external storage module corresponding thereto after generating the response corresponding to the replay protection command.

[0083] In some embodiments, as shown in FIGS. 4a to 4d, the EC chip 400 can include a replay protection hardware (not labeled in FIGS. 4a to 4d), and the signature module 403, the control module 404, the one or more storage modules 405 and the one or more storage control modules 406 can be located in the replay protection hardware. With this embodiment, the bus interface receives and sends data packets, the processor parses the replay protection command from the data packet, and the replay protection hardware processes the replay protection command, so that the replay protection command is processed in the replay protection hardware without cross-module processing, which can speed up the processing speed.

[0084] FIG. 5 shows a structural schematic diagram of an EC chip according to an embodiment of the present application. As shown in FIG. 5, the EC chip 500 can include a bus interface 501, a processor 502, a signature module 503, a control module 504 and a temporary storage module 507.

[0085] In some embodiments, as shown in FIG. 5, the EC chip 500 can further comprise one or more storage modules 505 for storing at least part of the replay protection related data. The bus interface 501 is configured to receive and send data packets. The signature module 503 is configured to generate signature information. The processor 502 is configured to parse the data packets, and in the case that a replay protection command is parsed, send the parsed replay protection command to the control module 504. The control module 504 is configured to control the signature module 503 and control the one or more storage modules 505 to verify and execute the replay protection command. Exemplary embodiments of the one or more storage modules 505 can be found in FIG. 2 and its description, which will not be repeated here.

[0086] In some examples, the control module 504 is further configured to, in the case that predetermined data corresponding to the replay protection command is generated in the replay protection related data, store the predetermined data to the temporary storage module 507, and after generating the response corresponding to the replay protection command, synchronize the predetermined data stored in the temporary storage module 507 to the storage module 505 corresponding thereto.

[0087] In some embodiments, as shown in FIG. 5, the EC chip 500 can further comprise one or more storage control modules 506 for storing at least part of the replay protection related data. The control module 504 is configured to control the signature module 503 and control the one or more storage control modules 506 to verify and execute the replay protection command. Exemplary embodiments of the one or more storage control modules 506 can be found in FIG. 3 and its description, which will not be repeated here.

[0088] In some examples, the control module 504 is further configured to, in the case that predetermined data corresponding to the replay protection command is generated in the replay protection related data, store the predetermined data to the temporary storage module 507, and after generating the response corresponding to the replay protection command, synchronize the predetermined data stored in the temporary storage module 507 to the external storage module corresponding thereto through the one or more storage control modules 506.

[0089] In some embodiments, as shown in FIG. 5, the EC chip 500 can further comprise one or more storage modules 505 and one or more storage control modules 506. Exemplary embodiments of the one or more storage modules 505 and the one or more storage control modules 506 can be found in FIGS. 4a-4d, which will not be repeated here.

[0090] In some examples, the control module 504 is further configured to, in a case where the predetermined data corresponding to the replay protection command is generated in the replay protection related data, store the predetermined data to the temporary storage module 507, and after the response corresponding to the replay protection command is generated, synchronize the predetermined data stored in the temporary storage module 507 to the external storage module corresponding thereto or the storage module 505 corresponding thereto by the one or more storage control modules 506.

[0091] In some embodiments, as shown in FIG. 5, the EC chip 500 can further comprise a synchronization module 508. The control module 504 is further configured to, in a case where the predetermined data corresponding to the replay protection command is generated in the replay protection related data, store the predetermined data to the temporary storage module 507, and generate the response corresponding to the replay protection command. The synchronization module 508 is configured to synchronize the predetermined data stored in the temporary storage module 507 to the storage module 505 corresponding thereto or the external storage module.

[0092] As an embodiment, the control module shown in FIGS. 1-5 of the foregoing description of the specification can comprise: a processing unit; a storage unit storing a program, wherein the program comprises instructions which, when executed by the processing unit, cause the processing unit to: control the signature module, access one or more storage modules and or one or more external storage modules to verify and execute the replay protection command.

[0093] As an embodiment, the control module shown in FIGS. 1-5 of the foregoing description of the specification can be configured to read a key for signing from at least one of the one or more storage modules, the one or more external storage modules, send the key and a predetermined part of the replay protection command to the signature module. The signature module can be configured to receive the key and the predetermined part of the replay protection command, and sign the predetermined part of the replay protection command based on the key to generate signature information, and return the generated signature information to the control module.

[0094] As an embodiment, the EC chip shown in FIGS. 1-5 of the foregoing description of the specification, the control module can be configured to: in a case where the binding root key command is received, control the signature module to sign a predetermined part of the binding root key command based on a root key carried by the binding root key command to generate signature information; verify the binding root key command based on the generated signature information and the signature information carried by the binding root key command; in a case where the binding root key command is verified, write the root key to the corresponding storage module.

[0095] As an implementation form, the EC chip shown in the foregoing figures 1 to 5 of the specification, the control module can be configured to: in a case where an update signature key command is received, control the signature module to sign a predetermined part of the update signature key command based on a storage root key to generate signature information; verify the update signature key command based on the generated signature information and signature information carried by the update signature key command; in a case where the update signature key command is verified, generate a signature key based on the root key and key data carried by the update signature key command, and write the signature key into a corresponding storage module.

[0096] As an implementation form, the EC chip shown in the foregoing figures 1 to 5 of the specification, the control module can be configured to: in a case where an update signature key command is received, control the signature module to sign a predetermined part of the update signature key command based on a storage root key to generate signature information; verify the update signature key command based on the generated signature information and signature information carried by the update signature key command; in a case where the update signature key command is verified, generate a signature key based on the root key and key data carried by the update signature key command, and write the signature key into a corresponding storage module.

[0097] As an implementation form, the EC chip shown in the foregoing figures 1 to 5 of the specification, the control module can be configured to: in a case where an update signature key command is received, control the signature module to sign a predetermined part of the update signature key command based on a storage root key to generate signature information; verify the update signature key command based on the generated signature information and signature information carried by the update signature key command; in a case where the update signature key command is verified, generate a signature key based on the root key and key data carried by the update signature key command, and write the signature key into a corresponding storage module.

[0098] As an implementation form, the EC chip shown in the foregoing figures 1 to 5 of the specification, the control module can be configured to: in a case where an update signature key command is received, control the signature module to sign a predetermined part of the update signature key command based on a storage root key to generate signature information; verify the update signature key command based on the generated signature information and signature information carried by the update signature key command; in a case where the update signature key command is verified, generate a signature key based on the root key and key data carried by the update signature key command, and write the signature key into a corresponding storage module.

[0099] As an implementation form, the EC chip shown in the foregoing figures 1 to 5 of the specification, the control module can be configured to: in a case where an update signature key command is received, control the signature module to sign a predetermined part of the update signature key command based on a storage root key to generate signature information; verify the update signature key command based on the generated signature information and signature information carried by the update signature key command; in a case where the update signature key command is verified, generate a signature key based on the root key and key data carried by the update signature key command, and write the signature key into a corresponding storage module.

[0100] As an implementation form, the signature module shown in FIGS. 1-5 of the foregoing description of the specification can include a hash message authentication code generation unit, and the signature information includes a hash message authentication code. The hash message authentication code is also referred to as hash-based message authentication code (HAMC). It should be understood that the embodiments of the present application do not limit the signature algorithm, and other algorithms capable of verifying the authenticity of data are also feasible, and the embodiments of the present application do not limit this.

[0101] As an implementation form, the bus interface shown in FIGS. 1-5 of the foregoing description of the specification can include an eSPI interface.

[0102] As an implementation form, the EC chip shown in FIGS. 1-5 of the foregoing description of the specification can include a bus interface including an eSPI interface, and the signature module can include an HMAC calculation module.

[0103] The embodiments of the present application also provide a sealing chip.

[0104] In some embodiments, the sealing chip seals the external storage chip and the EC chip, that is, integrates the EC chip and the external storage chip in one package, which can realize higher integration and smaller volume, reduce the power consumption of the electronic device, improve the performance and simplify the design.

[0105] FIG. 6 shows a structural schematic diagram of a sealing chip according to an embodiment of the present application. As shown in FIG. 6, the sealing chip 600 can include one or more storage chips 610 for storing at least part of the replay protection related data, and an EC chip 620 including a bus interface 621, a processor 622, a signature module 623, a control module 624, and one or more storage control modules 626. The bus interface 621 is configured to receive and send data packets. The processor 622 is configured to parse the received data packets, and when a replay protection command is parsed, sends the replay protection command to the control module 624. The one or more storage control modules 626 are configured to access the one or more storage chips. The signature module 623 is configured to generate signature information. The control module 624 controls the signature module and the one or more storage control modules 626 to verify and execute the replay protection command.

[0106] In some embodiments, the one or more storage chips 610 can include a first storage chip 610-1 for storing a root key.

[0107] In some embodiments, the one or more storage chips 610 can include a second storage chip 610-2 for storing a signature key generated based on the root key.

[0108] In some embodiments, the one or more storage chips 610 can include a third storage chip 610-3 for storing a replay protection monotonic counter value.

[0109] In some embodiments, the one or more storage chips 610 can include: a first storage chip 610-1 for storing a root key; a second storage chip 610-2 for storing a signature key generated based on the root key; and a third storage chip 610-3 for storing a replay protection monotonic counter value.

[0110] In some embodiments, the EC chip 620 can further include: one or more storage modules 625. The one or more storage modules 625 can be used to store a first part of replay protection related data, and the one or more storage chips 610 can be used to store a second part of the replay protection related data. The one or more storage modules 625 can include: a first storage module for storing a root key; a second storage module for storing a signature key generated based on the root key; and a third storage module for storing a replay protection monotonic counter value.

[0111] As an example, as shown in FIG. 6, the one or more storage modules 625 can include a third storage module 625-3 for storing a replay protection monotonic counter value. The one or more storage chips 610 include: a first storage chip 610-1 for storing a root key; and a second storage chip 610-2 for storing a signature key generated based on the root key. It should be understood that FIG. 6 is only an exemplary combination of storage modules and storage chips, and other combinations of storage modules and storage chips can be referred to FIGS. 4a-4d, and the embodiments of the present application do not repeat the description here.

[0112] The EC chip 620 can be referred to FIGS. 3-5 and the description thereof, and the embodiments of the present application do not repeat the description here.

[0113] In some embodiments, encapsulating the replay protection related modules into a replay protection chip, and encapsulating the replay protection information with the EC chip, i.e., integrating the EC chip and the replay protection chip in one package, can achieve higher integration and smaller size, reduce the power consumption of the electronic device, improve the performance and simplify the design. And it is convenient to design the replay protection chip independently.

[0114] FIG. 7 shows another encapsulated chip provided by the embodiments of the present application. As shown in FIG. 7, the encapsulated chip 700 can include: an EC chip 720 and a replay protection chip 730.

[0115] As shown in FIG. 7, the EC chip 720 can include: a bus interface 721 for receiving and sending data packets; and a processor 722 for parsing the received data packets, and sending a replay protection command to the replay protection chip 730 when the replay protection command is parsed.

[0116] As shown in FIG. 7, the replay protection chip 730 can include a signing module 731 for generating signature information, and a control module 732 for controlling the signing module 731 to verify and execute a replay protection command.

[0117] In some embodiments, the replay protection chip 730 and / or the EC chip 720 can further include one or more storage modules for storing at least part of the replay protection related data. The processor and / or the control module can be further configured to access the one or more storage modules.

[0118] In some embodiments, the replay protection chip 730 and / or the EC chip 720 can further include one or more storage control modules for accessing one or more external storage modules, the one or more external storage modules being configured to store at least part of the replay protection related data. The processor and / or the control module can be further configured to access the one or more external storage modules via the one or more storage control modules.

[0119] In some embodiments, the replay protection chip 730 and / or the EC chip 720 can further include one or more storage modules for storing a first part of the replay protection related data, and one or more storage control modules for accessing one or more external storage modules, the one or more external storage modules being configured to store a second part of the replay protection related data. The processor and / or the control module can be further configured to access the one or more storage modules and the one or more external storage modules via the one or more storage control modules.

[0120] In some embodiments, the hybrid chip 700 can further include one or more external storage modules, and the one or more external storage modules are the one or more storage chips.

[0121] As an embodiment, the control module 732 can be configured to read a key for signing from at least one of the one or more storage modules and the one or more external storage modules, and send the key and a predetermined part of the replay protection command to the signing module 731; and the signing module 731 can be configured to receive the key and the predetermined part of the replay protection command, sign the predetermined part of the replay protection command based on the key to generate the signature information, and return the generated signature information to the control module 732.

[0122] As an embodiment, the control module 732 can be further configured to generate a response corresponding to the replay protection command; and the processor 722 can be further configured to encapsulate the response and send the encapsulated data packet via the bus interface 721.

[0123] As an example, as shown in FIG. 7, the replay protection chip 730 can further include one or more storage modules 733 and one or more storage control modules 734. The one or more storage control modules 734 are configured to access the one or more storage chips 710. The one or more storage modules 733 can include a third storage module 733-3 configured to store a replay protection monotonic counter value. The one or more storage chips 710 include a first storage chip 710-1 configured to store a root key, and a second storage chip 710-2 configured to store a signature key generated based on the root key. It should be understood that FIG. 7 only illustrates an exemplary combination of storage modules and storage chips, and other combinations of storage modules and storage chips can be referred to FIGS. 4a-4d. The difference between FIGS. 4a-4d and FIG. 7 is that the storage control modules and the storage modules are located in the replay protection chip, and the present application does not repeat the description of FIGS. 4a-4d.

[0124] It should be understood that FIG. 7 only illustrates a case where the system 700 includes the storage chips 710, and the present application is not limited thereto. The storage modules, the storage chips (external storage modules), and the combination thereof can be referred to the aforementioned FIGS. 2-4d and the description thereof, and the present application does not repeat the description thereof.

[0125] In some embodiments, the replay protection chip 730 can further include a temporary storage module. The control module is further configured to, in a case where the predetermined data corresponding to the replay protection command in the replay protection related data is generated, store the predetermined data to the temporary storage module, and synchronize the predetermined data stored in the temporary storage module to the storage module or the external storage module corresponding thereto after the response corresponding to the replay protection command is generated. This can be referred to FIG. 5, and the present application does not repeat the description thereof.

[0126] In some embodiments, the replay protection chip 730 can further include a temporary storage module and a synchronization module. The control module is further configured to, in a case where the predetermined data corresponding to the replay protection command in the replay protection related data is generated, store the predetermined data to the temporary storage module, and generate the response corresponding to the replay protection command. The synchronization module is configured to synchronize the predetermined data stored in the temporary storage module to the storage module or the external storage module corresponding thereto. This can be referred to FIG. 5, and the present application does not repeat the description thereof.

[0127] The present application further provides a system.

[0128] In some embodiments, the system can include the EC chip and one or more memory modules of the embodiments of the present application. The structure and combination of the EC chip and the memory modules are described above and will not be repeated here. The system can achieve the replay protection through the bus interface, the processor, the signature module and the control module in the EC chip, and can achieve the replay protection in electronic devices such as notebook computers using the EC chip. The replay protection can be quickly processed through the hardware circuit such as the control module and the signature module. The possible implementation of the system can be found in the foregoing description and will not be repeated here.

[0129] In some embodiments, the system can include the EC chip and the replay protection chip of the embodiments of the present application. In further embodiments, the system can further include one or more memory chips. The possible implementation of the system can be found in the foregoing description and will not be repeated here.

[0130] The embodiments of the present application also provide an electronic device including a device body and a chip as described above arranged in the device body. The electronic device can be, but is not limited to, a body weight scale, a body fat scale, a nutrition scale, an infrared electronic thermometer, a pulse oximeter, a human body composition analyzer, a mobile power supply, a wireless charger, a fast charger, a vehicle charger, an adapter, a display, a USB (Universal Serial Bus) docking station, a touch pen, a truly wireless earphone, a car central control screen, a car, a smart wearable device, a mobile terminal, and a smart home device. The smart wearable device includes, but is not limited to, a smart watch, a smart bracelet, and a cervical vertebra massage instrument. The mobile terminal includes, but is not limited to, a smart phone, a notebook computer, a tablet computer, and a POS (point of sales terminal) machine. The smart home device includes, but is not limited to, a smart socket, a smart rice cooker, a smart sweeper, and a smart lamp. The electronic device can achieve the replay protection through the bus interface, the processor, the signature module and the control module in the EC chip, and can achieve the replay protection in electronic devices such as notebook computers using the EC chip. The replay protection can be quickly processed through the hardware circuit such as the control module and the signature module.

[0131] The following takes the implementation of eRPMC (RPMC over eSPI OOB) through the eSPI OOB channel as an example to describe the exemplary replay protection command verification and execution process implemented by the EC chip, the co-sealing chip, the system and the electronic device provided by the embodiments of the present application. In the EPRMC scheme, the bus interface of the embodiments of the present application is an eSPI interface, the signature module can be an HMAC calculation module for implementing the HAMC algorithm, the signature key generated according to the root key (Root key) can be an HMAC key (HMAC-key), and the control module is also referred to as an eRPMC control module.

[0132] The EC chip, the co-sealing chip and the system adopting the embodiments of the present application can include: the eSPI interface on the EC chip receives a data packet (eSPI OOB packet) including a replay protection command, the processor of the EC chip parses the received data packet to obtain the replay protection command, and writes the replay protection command into the control module in the eRPMC hardware. Then the control module in the eRPMC hardware processes according to the received replay protection command, such as calling the signature module to calculate, verify, generate HMAC-key value, write Root key, etc. After the processing is completed, the control module in the eRPMC hardware notifies the processor of the EC chip that the replay protection command has been processed. The processor of the EC chip reads the processing result, and uses the eSPI interface to reply the related information (i.e. the response corresponding to the replay protection command) according to the processing result.

[0133] An exemplary root key (Root key) binding process is shown in FIG. 8. The processor of the EC chip informs the eRPMC hardware that Root key binding and related information are required, and the control module of the eRPMC hardware calls the signature module (HMAC calculation module) of itself to perform command verification. If the verification result is passed, the control module writes the Root key into the corresponding storage module (NVM 1), and then notifies the processor of the EC chip that the command processing is completed. If the verification is not passed, the processor of the EC chip is directly notified that the processing is completed.

[0134] An exemplary update signature key (HMAC-key) process is shown in FIG. 9. Each time the PCH is powered on, an update signature key command (update HMAC-key command) is sent. The processor of the EC chip informs the eRPMC hardware of the update HMAC-key command and the command related information, and then the control module of the eRPMC hardware calls the signature module (HMAC calculation module) to perform command verification and generate HMAC-key. If the verification is passed, the HMAC-key value is written into the storage module (Momery 1), and then the processor of the EC chip is informed that the command processing is completed. If not, the processor of the EC chip is directly informed that the command processing is completed.

[0135] An exemplary read replay protection monotonic counter value process is shown in FIG. 10. The processor of the EC chip informs the eRPMC hardware of a read monotonic counter command and command related information. Then, the control module of the eRPMC hardware calls the signature module (HMAC calculation module) to verify the command. Regardless of whether the verification result is passed or not, the processor of the EC chip is informed that the command processing is complete.

[0136] An exemplary replay protection monotonic counter value increase by 1 process is shown in FIG. 11. The processor of the EC chip informs the eRPMC hardware of command information. Then, the control module of the eRPMC hardware calls the signature module (HMAC calculation module) to calculate and verify the calculation result. If the verification result is correct, the value of Counter+1 is written into the corresponding storage module (NVM 2), and the processor of the EC chip is informed that the instruction processing is complete. If the verification result is incorrect, the processor of the EC chip is directly informed that the instruction processing is complete.

[0137] An exemplary read RPMC parameter process is shown in FIG. 12. The read RPMC parameter command is a non-standard RPMC command and is dedicated to the eRPMC. After the processor of the EC chip informs the eRPMC hardware of a read PRMC instruction and information, the control module directly processes the instruction information, and informs the processor of the EC chip after the processing is complete.

[0138] This scheme realizes the eRPMC function by combining software and hardware. The hardware on the EC chip provides an eSPI interface and eRPMC hardware resources. The software is responsible for parsing the received instructions and returning information through the interface according to the processing result of the eRPMC hardware.

[0139] The above is only a preferred embodiment of the present application and does not limit the present application in any form. Although the preferred embodiment has been disclosed as above, it does not limit the present application. Any person skilled in the art can make slight changes or modifications to the above disclosed technical content to obtain equivalent embodiments with equivalent changes without departing from the technical solution of the present application. Any simple modification, equivalent change and modification of the above embodiment according to the technical essence of the present application are still within the scope of the technical solution of the present application.

Claims

1. An EC chip, comprising: a bus interface configured to receive and transmit data packets; a processor configured to parse the received data packets and transmit a replay protection command to a control module upon parsing the replay protection command; a signature module configured to generate signature information; the control module configured to control the signature module to verify and execute the replay protection command.

2. The EC chip of claim 1, wherein, The EC chip comprises a replay protection hardware, and the signature module and the control module are located in the replay protection hardware.

3. The EC chip of claim 1, wherein, Further comprising: one or more storage modules configured to store at least part of replay protection related data.

4. The EC chip of claim 1, wherein, Further comprising: one or more storage control modules configured to access one or more external storage modules configured to store at least part of replay protection related data.

5. The EC chip of claim 1, wherein, Further comprising: one or more storage modules configured to store a first part of replay protection related data; one or more storage control modules configured to access one or more external storage modules configured to store a second part of replay protection related data.

6. The EC chip according to claim 3 or 5, wherein The one or more storage modules comprise: a first storage module configured to store a root key.

7. The EC chip according to claim 3 or 5, wherein The one or more storage modules comprise: a second storage module configured to store a signature key generated based on the root key.

8. The EC chip of claim 3 or 5, wherein, The one or more storage modules comprise: a third storage module configured to store a replay protection monotonic counter value.

9. The EC chip of claim 1, wherein, The control module comprises: a processing unit; a storage unit configured to store a program, wherein the program comprises instructions that, when executed by the processing unit, cause the processing unit to control the signature module to verify and execute the replay protection command.

10. The EC chip of claim 1, wherein, Further comprising: a temporary storage module; wherein the control module is further configured to, in a case where predetermined data corresponding to the replay protection command in replay protection related data is generated, store the predetermined data to the temporary storage module, and synchronize the predetermined data stored in the temporary storage module to a storage module or an external storage module corresponding thereto after generating a response corresponding to the replay protection command.

11. The EC chip of claim 1, wherein, Further comprising: a temporary storage module and a synchronization module; wherein the control module is further configured to, in a case where predetermined data corresponding to the replay protection command in replay protection related data is generated, store the predetermined data to the temporary storage module, and generate a response corresponding to the replay protection command; the synchronization module is configured to synchronize the predetermined data stored in the temporary storage module to a storage module or an external storage module corresponding thereto.

12. The EC chip of claim 1, wherein, The signature module comprises: a hash message authentication code generation unit, and the signature information comprises a hash message authentication code.

13. The EC chip of claim 1, wherein, The bus interface comprises an eSPI interface. 14.A package chip, comprising: one or more storage chips configured to store at least part of replay protection related data; an EC chip, comprising: a bus interface configured to receive and transmit data packets; a processor configured to parse the received data packets and transmit a replay protection command to a control module upon parsing the replay protection command; one or more storage control modules configured to access the one or more storage chips; a signature module configured to generate signature information; the control module is configured to control the signature module and access the one or more storage control modules to verify and execute the replay protection command.

15. The hermetically sealed chip of claim 14, wherein, The EC chip includes replay protection hardware, and the one or more storage control modules, the signature module, and the control module are located in the replay protection hardware.

16. The hermetically sealed chip of claim 14, wherein, The one or more storage chips include: a first storage chip configured to store a root key.

17. The hermetically sealed chip of claim 14, wherein, The one or more storage chips include: a second storage chip configured to store a signature key generated based on the root key.

18. The hermetically sealed chip of claim 14, wherein, The one or more storage chips include: a third storage chip configured to store a replay protection monotonic counter value.

19. The hermetically sealed chip according to any one of claims 14 to 18, wherein The EC chip further includes: one or more storage modules; wherein the one or more storage modules are configured to store a first portion of the replay protection related data, and the one or more storage chips are configured to store a second portion of the replay protection related data.

20. A sealing chip, comprising: an EC chip and a replay protection chip; wherein the EC chip includes: a bus interface configured to receive and send data packets; a processor configured to parse the received data packets, and when a replay protection command is parsed, send the replay protection command to the replay protection chip; wherein the replay protection chip includes: a signature module configured to generate signature information; a control module configured to control the signature module to verify and execute the replay protection command.

21. The hermetically sealed chip of claim 20, wherein, The replay protection chip and / or the EC chip further include: one or more storage modules configured to store at least part of the replay protection related data; wherein the processor and / or the control module are further configured to access the one or more storage modules.

22. The hermetically sealed chip of claim 20, wherein, The replay protection chip and / or the EC chip further include: one or more storage control modules configured to access one or more external storage modules configured to store at least part of the replay protection related data; wherein the processor and / or the control module are further configured to access the one or more external storage modules through the one or more storage control modules.

23. The hermetically sealed chip of claim 20, wherein, The replay protection chip and / or the EC chip further include: one or more storage modules configured to store a first portion of the replay protection related data; one or more storage control modules configured to access one or more external storage modules configured to store a second portion of the replay protection related data; wherein the processor and / or the control module are further configured to access the one or more storage modules and access the one or more external storage modules through the one or more storage control modules.

24. The hermetically sealed chip of claim 22 or 23, wherein, Further comprising: the one or more external storage modules, and the one or more external storage modules are one or more storage chips.

25. The hermetically sealed chip of claim 20, wherein, The replay protection chip further includes: a temporary storage module; The control module is further configured to, in a case where predetermined data corresponding to the replay protection command is generated among replay protection related data, store the predetermined data to the temporary storage module, and synchronize the predetermined data stored in the temporary storage module to a storage module or an external storage module corresponding thereto after a response corresponding to the replay protection command is generated.

26. The hermetically sealed chip of claim 20, wherein, The replay protection chip further comprises a temporary storage module and a synchronization module. The control module is further configured to, in a case where predetermined data corresponding to the replay protection command is generated among replay protection related data, store the predetermined data to the temporary storage module, and generate a response corresponding to the replay protection command. The synchronization module is configured to synchronize the predetermined data stored in the temporary storage module to a storage module or an external storage module corresponding thereto.

27. A system comprising: one or more memory chips; an EC chip comprising: a bus interface configured to receive and transmit data packets; a processor configured to parse the received data packets and transmit a replay protection command to a control module upon parsing the replay protection command; a signature module configured to generate signature information; a storage control module configured to access the one or more memory chips; the control module configured to control the signature module and the storage control module to verify and execute the replay protection command.

28. The system of claim 27, wherein, the EC chip comprises replay protection hardware, and the one or more storage control modules, the signature module, and the control module are located within the replay protection hardware.

29. The system of claim 27, wherein, the EC chip further comprises one or more storage modules configured to store a first portion of replay protection related data; wherein the one or more external storage modules are configured to store a second portion of replay protection related data.

30. A system comprising: one or more memory chips; an EC chip; a replay protection chip; wherein the EC chip comprises: a bus interface configured to receive and transmit data packets; a processor configured to parse the received data packets and transmit a replay protection command to the replay protection chip upon parsing the replay protection command; wherein the replay protection chip comprises: a signature module configured to generate signature information; a control module configured to control the signature module to verify and execute the replay protection command; wherein the EC chip and / or the replay protection chip further comprises one or more storage control modules configured to access the one or more memory chips.

31. The system of claim 30, wherein, the EC chip and / or the replay protection chip further comprises one or more storage modules configured to store a first portion of replay protection related data; wherein the one or more memory chips are configured to store a second portion of replay protection related data.

32. An electronic device comprising a device body and an EC chip as claimed in any one of claims 1 to 13, or a hybrid chip as claimed in any one of claims 14 to 26, or a system as claimed in any one of claims 27 to 31, disposed on the device body.

Images