Display driving method, display apparatus, and device

Abstract

A display driving method, a display apparatus, and a device, relating to the technical field of electronics, and used for solving a display problem present in a partition boundary during partition refresh. In a display screen, a refresh cycle of a first display region is greater than that of a second display region; a first refresh cycle of the first display region comprises a holding frame; a second refresh cycle of the second display region comprises a first write frame; and the first write frame overlaps the holding frame in time sequence. The method comprises: a drive circuit outputs a data signal to a first display region and a second display region, wherein the data signal is used for providing a holding voltage and a data voltage, and the data signal changes to provide the data voltage at a first moment of a holding frame; and the drive circuit outputs a first selection signal to the second display region, wherein a transition of the first selection signal occurs at a second moment of a first write frame, the transition of the first selection signal is used for controlling the second display region to implement data write at the first write frame on the basis of the data voltage, and the first moment is earlier than the second moment.

Description

Display driving method, display device and equipment

[0001] The present application claims priority from the Chinese patent application No. 202410451820.6 filed on April 15, 2024, and entitled "A display driving method, display device and equipment", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the technical field of electronics, and in particular to a display driving method, display device and equipment. BACKGROUND

[0003] The traditional refresh mode of a display device is full-screen refresh, so when only part of the area of the display device needs to update the picture, the driving circuit still needs to perform full-screen picture refresh on the display device, thereby causing power waste. At present, with the continuous development and evolution of display technology, people are seeking high refresh frequency on one hand and trying to reduce the power consumption of the display device on the other hand. In order to meet both needs, the partition variable frequency technology is born. According to whether the picture of the display device needs to be updated, the partition variable frequency technology determines whether the driving circuit performs data writing on the display device. Specifically, when part of the area of the display device needs to update the picture, the driving circuit performs data writing on the part of the area, and for other areas that do not need picture update, the driving circuit does not perform data writing, thereby reducing the power consumption of the driving circuit.

[0004] However, in the process of refreshing the display device by using the partition variable frequency technology, two adjacent partitions corresponding to different refresh frequencies will have display problems at the partition boundary, such as bright line problems at the partition boundary, thereby affecting the display effect and reducing the user experience. SUMMARY

[0005] The present application provides a display driving method, display device and equipment, which are used to solve the display problems at the partition boundary of partitions with different refresh frequencies during partition refresh, and improve the display effect.

[0006] To achieve the above-mentioned purpose, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, a display driving method is provided, which is applied to a display device including a driving circuit and a display screen. The display screen includes a first display region and a second display region adjacent to each other. The first display region has a refresh period greater than that of the second display region, i.e., the first display region has a refresh frequency less than that of the second display region. The first refresh period of the first display region includes a holding frame, and the second refresh period of the second display region includes a first write frame. The first write frame overlaps the holding frame in time sequence. The method includes: outputting, by the driving circuit, a data signal to the first display region and the second display region. The data signal is used to provide a holding voltage and a data voltage. For example, the holding voltage is a low voltage, and the data voltage is a high voltage. The data voltage is used to provide data for the second display region, and the holding voltage is used for data holding of the first display region. The data signal is converted to the data voltage at a first time point in the holding frame. For example, the data signal is converted from the holding voltage to the data voltage at the first time point, or the data signal is gradually converted from the holding voltage to the data voltage and is converted to the data voltage at the first time point. The driving circuit outputs a first selection signal to the second display region. The first selection signal is converted at a second time point in the first write frame. The conversion of the first selection signal can mean that the first selection signal is converted from a high voltage to a low voltage. The conversion of the first selection signal is used to control the second display region to implement data writing in the first write frame according to the data voltage. The first time point is earlier than the second time point.

[0008] In the above technical solution, in the process of partition refresh of the first display region and the second display region, for the holding frame in the i-th refresh period of the first display region, the data signal output by the driving circuit provides a data voltage at a first time point in the holding frame. The data voltage is used to provide data for the second display region. The first selection signal output by the driving circuit is converted at a second time point in the first write frame. The conversion of the first selection signal is used to control the second display region to implement data writing in the first write frame according to the data voltage. The first time point is earlier than the second time point. That is, the driving circuit provides data for the second display region in advance in the holding frame, so that the disturbance of the power signal VDD occurs before data writing. Thus, the voltage of the power signal VDD can be restored to a normal voltage at the time of data writing, thereby solving the problem of bright lines at the partition boundary in the process of partition refresh of the first display region and the second display region, and further improving the display effect and user experience.

[0009] In any possible implementation manner of the first aspect, the first selection signal is a selection signal corresponding to a region in the second display region that is written first. For example, the first selection signal is a selection signal corresponding to a region in the second display region adjacent to the first display region and written first. The above possible implementation manner can solve the problem of bright lines in the region in the second display region adjacent to the first display region.

[0010] In any possible implementation form of the first aspect, the first display area comprises a plurality of first pixel rows, the second display area comprises a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows. Optionally, the first selection signal can be a selection signal corresponding to a pixel row of the plurality of pixel rows that is adjacent to the first display area and is written first, such as a selection signal of a first pixel row of the plurality of second pixel rows. The above possible implementation form can solve the problem of bright lines in one or more second pixel rows of the second display area that are adjacent to the first display area.

[0011] In any possible implementation form of the first aspect, a time difference between the first time and the second time is between 1 unit time and 100 unit times, the unit time being a scanning time length of a single pixel row. In the above possible implementation form, the disturbance of the power supply signal VDD occurs before data writing, and the voltage of the power supply signal VDD is restored to a normal voltage at the time of data writing, thereby solving the problem of bright lines at the partition boundary in the process of partition refresh of the first display area and the second display area.

[0012] In any possible implementation form of the first aspect, the first refresh period of the first display area comprises a second writing frame, the data voltage is further used to provide data for the first display area, and the data signal is further changed to provide the data voltage at a third time before the second writing frame; the method further comprises: the driving circuit outputs a second selection signal to the first display area, the second selection signal jumps at a fourth time of the second writing frame, the jump of the second selection signal is used to control the first display area to realize data writing in the second writing frame according to the data voltage, and the third time is earlier than the fourth time. Optionally, a time difference between the third time and the fourth time is between 1 unit time and 100 unit times. In the above possible implementation form, the driving circuit provides data for the first display area in advance before the second writing frame, so that the disturbance of the power supply signal VDD occurs before data writing, so that the voltage of the power supply signal VDD can be restored to a normal voltage at the time of data writing, thereby solving the problem of bright lines at the boundary of the first display area.

[0013] In any possible implementation form of the first aspect, the second selection signal is a selection signal corresponding to a region of the first display area that is written first. For example, the first display area comprises a plurality of first pixel rows, and the second selection signal is a selection signal corresponding to a first pixel row of the plurality of first pixel rows. The above possible implementation form can solve the problem of bright lines at the boundary of the first display area.

[0014] In any possible implementation form of the first aspect, the data signal transitioning to provide the data voltage comprises at least one of: the data signal jumping from providing the hold voltage to providing the data voltage, the data signal transitioning from providing the hold voltage to providing the data voltage in a step-wise increasing manner, the data signal transitioning from providing the hold voltage to providing the data voltage in a linearly increasing manner, or the data signal transitioning from providing the hold voltage to providing the data voltage in a curvilinearly increasing manner. With the above possible implementation forms, various possible transition manners of the data signal are provided, and the influence of the transition of the data signal on the power supply signal VDD can be reduced by the above transition manners.

[0015] In a second aspect, a display device is provided, comprising a driving circuit and a display screen, the display screen comprising a first display area and a second display area adjacent to each other, a refresh period of the first display area being greater than a refresh period of the second display area, a first refresh period of the first display area comprising a hold frame, a second refresh period of the second display area comprising a first write frame, the first write frame being time-overlapped with the hold frame. The driving circuit is configured to output a data signal to the first display area and the second display area, the data signal being configured to provide a hold voltage and a data voltage, the data voltage being configured to provide data for the second display area, the hold voltage being configured to hold data for the first display area, the data signal being configured to transition to provide the data voltage at a first time point of the hold frame; and the driving circuit is further configured to output a first selection signal to the second display area, the first selection signal being configured to jump at a second time point of the first write frame, the jump of the first selection signal being configured to control the second display area to implement data writing according to the data voltage at the first write frame, the first time point being earlier than the second time point.

[0016] In any possible implementation form of the second aspect, the first selection signal is a selection signal corresponding to a region of the second display area that is written first.

[0017] In any possible implementation form of the second aspect, the first display area comprises a plurality of first pixel rows, the second display area comprises a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

[0018] In any possible implementation form of the second aspect, a time difference between the first time point and the second time point is between 1 unit time and 100 unit times, the unit time being a scanning time length of a single pixel row.

[0019] In any possible implementation form of the second aspect, the first refresh period of the first display region comprises a second write frame, the data voltage is further configured to provide data for the first display region, and the data signal is further configured to transition to provide the data voltage at a third time point before the second write frame; and the driving circuit is further configured to output a second selection signal to the first display region, the second selection signal is configured to jump at a fourth time point of the second write frame, the jump of the second selection signal is configured to control the first display region to implement data writing according to the data voltage at the second write frame, and the third time point is earlier than the fourth time point. Optionally, the second selection signal is a selection signal corresponding to a region written first in the first display region.

[0020] In any possible implementation form of the second aspect, the transition of the data signal to provide the data voltage comprises at least one of: a jump of the data signal from providing the hold voltage to providing the data voltage, a transition of the data signal from providing the hold voltage to providing the data voltage in a stepwise increasing manner, a transition of the data signal from providing the hold voltage to providing the data voltage in a linearly increasing manner, or a transition of the data signal from providing the hold voltage to providing the data voltage in a curvedly increasing manner.

[0021] In a third aspect, a display driving apparatus is provided for driving a display screen, the display screen comprising a first display region and a second display region adjacent to each other, a refresh period of the first display region being greater than a refresh period of the second display region, a first refresh period of the first display region comprising a hold frame, a second refresh period of the second display region comprising a first write frame, and the first write frame being overlapped in timing with the hold frame; the display driving apparatus comprising: a first driving unit configured to output a data signal to the first display region and the second display region, the data signal being configured to provide a hold voltage and a data voltage, the data voltage being configured to provide data for the second display region, the hold voltage being configured for data holding of the first display region, and the data signal being configured to transition to provide the data voltage at a first time point of the hold frame; and a second driving unit configured to output a first selection signal to the second display region, the first selection signal being configured to jump at a second time point of the first write frame, and the jump of the first selection signal being configured to control the second display region to implement data writing according to the data voltage at the first write frame, and the first time point being earlier than the second time point.

[0022] In any possible implementation form of the third aspect, the first selection signal is a selection signal corresponding to a region written first in the second display region.

[0023] In any possible implementation form of the third aspect, the first display region comprises a plurality of first pixel rows, the second display region comprises a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

[0024] In any possible implementation manner of the third aspect, a time difference between the first time instant and the second time instant is between 1 unit time and 100 unit times, and the unit time is a scanning time length of a single pixel row.

[0025] In any possible implementation manner of the third aspect, the first refresh period of the first display region includes a second write frame, the data voltage is further used to provide data for the first display region, and the data signal is further changed to provide the data voltage at a third time instant before the second write frame; the second driving unit is further used to output a second selection signal to the first display region, the second selection signal jumps at a fourth time instant of the second write frame, the jump of the second selection signal is used to control the first display region to implement data writing in the second write frame according to the data voltage, and the third time instant is earlier than the fourth time instant. Optionally, the second selection signal is a selection signal corresponding to a region that is written first in the first display region.

[0026] In any possible implementation manner of the third aspect, the change of the data signal to provide the data voltage includes at least one of the following: the data signal jumps from providing the holding voltage to providing the data voltage, the data signal changes from providing the holding voltage to providing the data voltage in a stepwise increasing manner, the data signal changes from providing the holding voltage to providing the data voltage in a linearly increasing manner, or the data signal changes from providing the holding voltage to providing the data voltage in a curvedly increasing manner.

[0027] A fourth aspect provides an electronic device, including a processor and a display device coupled to the processor; wherein the display device is the display device provided in the second aspect or any possible implementation manner of the second aspect; or the display device includes a display screen and the display driving device provided in the third aspect or any possible implementation manner of the third aspect.

[0028] A fifth aspect provides a computer readable storage medium, which stores a computer program or instructions, when the computer program or instructions are executed, the method provided in the first aspect or any possible implementation manner of the first aspect is implemented.

[0029] A sixth aspect provides a computer program product, which includes a computer program, also referred to as code or instructions, when the computer program is executed, the computer program causes a computer to execute the method provided in the first aspect or any possible implementation manner of the first aspect.

[0030] It can be understood that the beneficial effects that can be achieved by the second aspect to the sixth aspect can correspond to the beneficial effects in the first aspect or any possible implementation manner of the first aspect, which will not be described herein again. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] FIG1 is a schematic diagram of partitions of a display screen provided in an embodiment of the present application;

[0032] FIG2 is a schematic diagram of a refresh cycle during a partition refresh provided by an embodiment of the present application;

[0033] FIG3 is a schematic diagram showing a bright line appearing at a partition boundary of a display screen provided by an embodiment of the present application;

[0034] FIG4 is a schematic structural diagram of a display device provided in an embodiment of the present application;

[0035] FIG5 is a waveform diagram of a signal output by a driving circuit provided in an embodiment of the present application;

[0036] FIG6 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

[0037] FIG7 is a schematic flow chart of a display driving method provided in an embodiment of the present application;

[0038] FIG8 is a schematic diagram of another partition of a display screen provided in an embodiment of the present application;

[0039] FIG9 is a waveform diagram of a signal output by another driving circuit provided in an embodiment of the present application;

[0040] FIG10 is a schematic flow chart of another display driving method provided in an embodiment of the present application;

[0041] FIG11 is a waveform diagram of a signal output by another driving circuit provided in an embodiment of the present application;

[0042] FIG12 is a waveform diagram of a signal output by another driving circuit provided in an embodiment of the present application;

[0043] FIG13 is a schematic diagram of a data signal transition provided by an embodiment of the present application;

[0044] FIG14 is a schematic structural diagram of another display device provided in an embodiment of the present application;

[0045] FIG15 is a schematic structural diagram of another display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0046] The following will discuss in detail the making and use of various embodiments. However, it should be understood that many applicable inventive concepts provided herein can be implemented in a variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to implement and use the present application and technology and do not limit the scope of this application.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0048] Circuits or other components can be described as or said to be "configured to" perform a task or tasks, in instances of this, "configured to" is used to mean that the circuit / component includes structure for performing the task or tasks during operation. In some instances, such a structure can be recited by stating that the circuit / component is configured to transmit, receive, or generate, for example. In some instances, the term "configured to" can be used to indicate that a circuit / component is designed to perform the task or tasks during operation. In some instances, such a structure can be recited by stating that the circuit / component includes a "means for" performing the task or tasks during operation. In some instances, "configured to" can be used to indicate that end execution of one or more tasks is performed during operation, for example, by the circuit / component.

[0049] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the present application, "at least one" means one or more, and "multiple" means two or more. The association relationship of the associated objects is described by "and / or", which means that there can be three kinds of relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it. "At least one of the following / one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b or c can represent a, b, c, a and b, a and c, b and c, a, b and c; where a, b and c can be single or multiple.

[0050] The embodiments of the present application use "first" and "second" and the like to distinguish objects with similar names or functions or roles. Those skilled in the art can understand that "first" and "second" and the like do not limit the number and execution order. The word "coupled" is used to represent electrical connection, including direct connection through wires or connection terminals or indirect connection through other devices. Therefore, "coupled" should be regarded as a broad sense of electronic communication connection.

[0051] In the present application, the words "exemplary" or "for example" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the exemplary or for example embodiments are presented so as to enable a clear and concise disclosure of the application.

[0052] Before introducing the embodiments of the present application, first, the application scenarios involved in the present application are introduced and explained.

[0053] The traditional refresh mode of the display device is full-screen refresh. When only part of the display area of the display device needs to be updated, the driving circuit still needs to perform full-screen refresh on the display device, thereby causing power waste. Currently, display technology is continuously developing and evolving. People are seeking high refresh frequency while trying to reduce the power consumption of the display device. In order to meet both requirements, the partition variable frequency technology is born. According to whether the picture of the display device needs to be updated, the driving circuit determines whether to perform data writing on the display device. Specifically, when part of the picture of the display device needs to be updated, the driving circuit performs data writing on the part of the display area. For other areas that do not need picture update, the driving circuit does not perform data writing, thereby reducing the power consumption of the driving circuit.

[0054] For example, as shown in FIG. 1, the display screen of the display device includes display area A, display area B and display area C in sequence. The three display areas can be used to display pictures or contents with different refresh frequencies. For example, display area A can be used to display a title bar, display area B can be used to display a display window for video playing, and display area C can be used to display a comment area. The refresh frame rate of display area A and display area C is 40 Hz, and the refresh frequency of display area B is 120 Hz. In FIG. 1, if the traditional refresh mode is used, the refresh mode of the display device is full-screen refresh at 120 Hz, that is, display area A, display area B and display area C all use 120 Hz to write data. If the partition refresh mode is used, display area B uses 120 Hz to write data, and display area A and display area C use 40 Hz to write data. Therefore, the partition variable frequency refresh can greatly reduce the invalid operation of the driving circuit and reduce the power consumption.

[0055] The display area corresponding to any of the above refresh frequencies can work in a plurality of refresh periods. Each refresh period in the plurality of refresh periods can be referred to as a frame time. Each refresh period can include a write frame, or each refresh period can include a write frame and one or more hold frames. The write frame is used to write data in the corresponding display area, and the hold frame is used to maintain the data display of the corresponding display area. Optionally, the refresh period includes a write frame; or the refresh period includes a write frame and a plurality of hold frames, which are located after the write frame.

[0056] For example, in the scenario of partition refresh, if the refresh period of the display area with low refresh frequency is 1 / 40, and the refresh period is equal to 3 times of the refresh period of the display area with 120 Hz refresh, as shown in FIG. 2, when the refresh period is divided into three time periods, each of which is 1 / 120, in the first 1 / 120 time period, the whole screen of the display is written with data, and the pixel circuit in the display is written and stored with correct data, which can be referred to as a write frame; in the second 1 / 120 and third 1 / 120 time periods, the display area A and the display area C are no longer written with data, and the display area B continues to be written and stored with data, each of the two time periods can be referred to as a hold frame. In FIG. 2, the data signal DA output by the driving circuit is high in the write frame, and is high when refreshing the display area B in the hold frame, and is low when not refreshing the display area B in the hold frame. In this way, the refresh period of the display area with 40 Hz refresh can be composed of one write frame and two hold frames, and the low level of the data signal DA output by the driving circuit in the two hold frames can be a High-z signal or a direct current (DC) signal, without alternating current (AC) change of the signal, thereby saving a part of power consumption. The High-z signal can also be referred to as a Hi-z signal, which means that the voltage is 0 or close to 0, such as a signal of 100 mV, at this time, the state of the display area can also be referred to as a floating state.

[0057] However, in the process of partition refresh of the display device by using the partition variable frequency technology, two partitions adjacent to each other and corresponding to different refresh frequencies will have display problems at the partition boundary, such as bright line problems at the partition boundary, thereby affecting the display effect and reducing the user experience. For example, in the partition refresh shown in FIGS. 1 and 2, as shown in FIG. 3, bright line problems will occur at the partition boundary between the display area A and the display area B in the process of partition refresh.

[0058] The reasons for the display problems at the partition boundary in the process of partition refresh are explained and described below by using the display device shown in FIG. 4 and the waveforms of the signals in the refresh period shown in FIG. 5.

[0059] FIG. 4 is a structural schematic diagram of a display device provided in an embodiment of the present application. The display device includes a driving circuit and a display screen, the display screen includes a pixel array, the pixel array includes a plurality of rows and columns of pixel units, the pixel units can be referred to as pixel circuits, and are simply referred to as pixels. The plurality of rows and columns of pixel units can also be referred to as a plurality of pixel rows and a plurality of pixel columns. The driving circuit is configured to provide a data signal for each of a plurality of pixel columns in the pixel array, and provide a selection signal for each of a plurality of pixel rows in the pixel array; and each of the plurality of pixel arrays is further configured to receive a power signal VDD, which can be used to power each pixel. Optionally, the plurality of pixel rows in the display screen can be divided into a plurality of display regions, each display region can include a plurality of adjacent pixel rows, and the plurality of display regions can have different refresh frequencies.

[0060] In FIG. 4, the data signals corresponding to the plurality of pixel columns are denoted as DA1 to DAm, and the selection signals corresponding to the plurality of pixel rows are denoted as S1 to Sn, m and n are integers greater than 1. Optionally, the driving circuit can include a display driver integrated circuit (DDIC) and a gate driver on array (GOA) circuit, the DDIC can be used to provide a plurality of data signals DA1 to DAm, and the GOA circuit can be used to provide a plurality of selection signals S1 to Sn.

[0061] Taking the partition refresh shown in FIGS. 1 and 2 as an example, under the structure of the display device shown in FIG. 4, the waveforms of the data signal DA, the power signal VDD and the selection signal S21 in the partition refresh process are shown in FIG. 5, and S21 represents the selection signal corresponding to the partition boundary between the display region A and the display region B. Specifically, in the first 1 / 120 time period of the refresh cycle corresponding to the refresh frequency of 40 Hz, that is, when entering the write frame, the full-screen refresh writes data, at this time, the data signal DA and the power signal VDD corresponding to the partition boundary between the display region A and the display region B are high, and the selection signal S21 jumps from high to low within the write frame to realize data writing; when entering the second 1 / 120 time period of the refresh cycle, the display region A and the display region C enter data retention, the corresponding data signal DA is low, and when data needs to be written in the display region B in this time period, the data signal DA jumps from low to high at this time, and the selection signal S21 also jumps from high to low in this time period to realize data writing in the display region B.

[0062] In the second 1 / 120 time period, the data signal DA jumps from low voltage to high voltage, which results in a large voltage difference. The capacitance of the pixel at the partition boundary and the pixel currently being written has a wiring overlap with the power signal VDD. The voltage difference pulls the voltage of the power signal VDD, which cannot recover to the correct voltage due to the load and power supply in the display screen. Therefore, the data thin film transistor (DTFT) in the pixel currently being written writes data when the voltage of the power signal VDD is abnormal. When the voltage of the power signal VDD recovers to the correct voltage after a period of time, the gate of the DTFT deviates from the data voltage, also known as the write voltage. As a result, the display is abnormal, and a bright line appears at the partition boundary.

[0063] Therefore, an embodiment of the present application provides a display driving method, which is used to solve the display problem of the partition boundary of different refresh frequencies during partition refresh, and specifically used to solve the problem of the bright line of the partition boundary of different refresh frequencies, thereby improving the display effect and user experience. The method can be applied to various electronic devices with a display device, and the display device can include a driving circuit and a display screen.

[0064] Optionally, the electronic device can include, but is not limited to, a mobile phone, a tablet computer, a notebook computer, a palm computer, a mobile internet device (MID), a camera, a wearable device, a sound equipment, an audio and video player, a set-top box, a game console, a printer, a mouse, a keyboard, a vehicle-mounted device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a smart home device, a smart robot, a plant equipment, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, or a wireless terminal in smart home, a flight device, etc. For example, the wearable device includes a smart watch, a smart bracelet, a pedometer, etc.; the vehicle-mounted device includes a device on a vehicle such as a car, an airplane, a ship, a train, and a high-speed rail; the smart home device includes a refrigerator, a television, an air conditioner, an electricity meter, etc.; the flight device includes a smart robot, a hot air balloon, a drone, an airplane, etc.

[0065] The structure of the electronic device is exemplarily described below by taking the electronic device as a mobile phone. As shown in FIG. 6, the electronic device can include a radio frequency (RF) circuit 110, a memory 120, an input unit 130, a display unit 140, a sensor 150, an audio circuit 160, a processor 170, and a power supply 180, etc. Optionally, the display unit 140 can be the display device in the above.

[0066] The RF circuit 110 can be used to transceive information, or receive or send a signal in a calling process. In particular, after receiving the downlink information of a base station, the processor 170 processes; in addition, the data of the uplink is sent to the base station. Generally, the RF circuit 110 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier (LNA), a duplexer, etc. In addition, the RF circuit 110 can also communicate with a network and other devices through a wireless communication mode.

[0067] The memory 120 can be used to store data, software programs, and modules, including a storage program area and a storage data area, wherein the storage program area can store an operating system and application programs required by at least one function, such as a sound playing function, an image playing function, etc.; the storage data area can store data created according to the use of the electronic device, such as audio data, image data, a phone book, etc. In addition, the electronic device can include a high-speed random access memory, and can also include a non-volatile memory, for example, at least one magnetic disk storage device, a flash memory device, or other volatile solid-state memory device. In the embodiments of the present application, the memory can include a plurality of memories, including a first memory and a second memory.

[0068] The input unit 130 can be used to receive inputted digital or character information, and to generate key signal inputs related to the user settings and function control of the electronic device. The input unit 130 can include a touch screen 131 and other input devices 132. The touch screen 131 can collect touch operations of a user thereon or therearound, and drive corresponding connection devices according to a pre-set program. For example, the touch operations can include operations of a user using a finger, a stylus, or any suitable object or accessory on or near the touch screen. Alternatively, the other input devices 132 can include one or more of, but are not limited to, a physical keyboard, function keys, a trackball, a mouse, a joystick, etc., such as the function keys including a volume control button, a power on / off button, etc.

[0069] The display unit 140 can be used to display information inputted by a user or provided to a user, and various menus of the electronic device, etc. In an example, the display unit 140 can include a display screen 141, which can be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), etc. Further, the touch screen 131 can cover the display screen 141, and when the touch screen 131 detects a touch operation thereon or therearound, transmits to the processor 170 to determine the type of the touch event, and then the processor 170 provides corresponding visual output on the display screen 141 according to the type of the touch event. Although in the figure, the touch screen 131 and the display screen 141 are implemented as two independent components to realize the input and output functions of the electronic device, in some embodiments, the touch screen 131 and the display screen 141 can be integrated to realize the input and output functions of the electronic device.

[0070] The sensor 150 can include one or more sensors for providing various aspects of state assessment for the electronic device. Among them, the sensor 150 can include a light sensor that can be used in imaging applications, i.e., as a component of a camera or a camera. In addition, the sensor 150 can also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor, through which the acceleration / deceleration of the electronic device, the orientation, the open / close state, the relative positioning of components, or the temperature change of the electronic device, etc. can be detected.

[0071] The audio circuit 160, the speaker, and the microphone can provide an audio interface between the user and the electronic device. The audio circuit 160 can convert the received audio data into an electrical signal and transmit it to the speaker, which converts it into a sound signal output. On the other hand, the microphone collects sound signals and converts them into electrical signals, which are received by the audio circuit 160 and converted into audio data, which is then output to the RF circuit 110 for transmission to, for example, another phone, or to the memory 120 for further processing.

[0072] The processor 170 is the control center of the electronic device, connects all parts of the electronic device through various interfaces and lines, performs various functions of the electronic device and processes data by running or executing software programs and / or modules stored in the memory 120 and calling data stored in the memory 120, thereby monitoring the entire electronic device. Optionally, the processor 170 can include one or more processing units, which can include but are not limited to: a central processing unit (CPU), a network processing unit (NPU), a graphic processing unit (GPU), an image signal processor (ISP), a tensor processing unit (TPU), a data processing unit (DPU), a digital signal processor (DSP), a microcontroller or a microprocessor, etc. Further, the processor 170 can also include other hardware circuits or accelerators, such as an application specific integrated circuit (ASIC), a complex programmable logic device (CPLD) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Optionally, the processor 170 can also be a combination of computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, etc.

[0073] The electronic device can also include a power supply 180 (such as a battery) to power various components. The power supply 180 can be logically connected to the processor 170 through a power management system, so that the power management system can realize functions such as management of charging, discharging, and power consumption management. Optionally, the power management system can support both fast charging technology and non-fast charging technology. In actual application, the power management system can charge the battery in the power supply 180 through fast charging technology, or charge the battery in the power supply 180 through non-fast charging technology.

[0074] The electronic device can also include a wireless fidelity (WiFi) module, a Bluetooth module, etc., which are not described in detail in this application. Those skilled in the art can understand that the structure of the electronic device shown in the figure does not constitute a limitation on the electronic device, and can include more or fewer components than shown, or combine certain components, or different component arrangements.

[0075] FIG. 7 is a flow diagram of a display driving method according to an embodiment of the present application. The method can be applied to a display device including a driving circuit and a display screen including adjacent first and second display regions. The method includes the following steps.

[0076] S201: The driving circuit outputs a data signal to the first and second display regions, the data signal being used to provide a hold voltage and a data voltage, the data voltage being used to provide data for the second display region and the hold voltage being used for data retention of the first display region, the data signal being switched to provide the data voltage at a first time point of a first hold frame.

[0077] The display screen can include a plurality of display regions having different refresh frequencies, and the plurality of display regions can include at least the first and second display regions. The refresh frequency of the first display region is less than the refresh frequency of the second display region, so that the refresh period of the first display region is greater than the refresh period of the second display region. For example, as shown in (a) of FIG. 8, the display can include two display regions, the refresh frequency of the first display region being 60 Hz and the refresh frequency of the second display region being 120 Hz. Alternatively, as shown in (b) of FIG. 8, the display can include three display regions, the refresh frequency of the first and third display regions being 60 Hz and the refresh frequency of the second display region being 120 Hz, the second display region being located between the first and third display regions.

[0078] In addition, the first and second display regions can operate in a plurality of refresh periods, and the refresh period of the first display region is different from the refresh period of the second display region. For ease of description, any refresh period of the first display region is referred to as the ith refresh period of the first display region, and part of the refresh periods of the second display region is referred to as the jth refresh period of the second display region, i and j being positive integers. The value of i can be continuous, for example, the value of i can be 1, 2, 3, 4, 5, etc. The value of j can be discontinuous, for example, the value of j can be 2, 3, 5, 6, etc. The ith refresh period of the first display region can include a write frame and at least one hold frame, and the jth refresh period of the second display region can include a write frame. Any hold frame of the ith refresh period of the first display region is referred to as a first hold frame, and the write frame of the jth refresh period of the second display region is referred to as a first write frame. The first write frame overlaps the first hold frame in time sequence, i.e., the time period corresponding to the first write frame overlaps the time period corresponding to the first hold frame. The jth refresh period of the second display region described above can be a refresh period in which the write frame of the second display region overlaps the hold frame of the first display region in time sequence.

[0079] Further, the data signal can provide the hold voltage as a low level and the data voltage as a high level. In an example, the data signal can transition from providing the hold voltage to providing the data voltage, at which time the data signal can transition from a low level to a high level; the data signal can also transition from providing the data voltage to providing the hold voltage, at which time the data signal can transition from a high level to a low level.

[0080] In a possible embodiment, the driving circuit outputs a plurality of data signals to the first display region and the second display region, such as the plurality of data signals can include a data signal corresponding to each of a plurality of pixel columns of the first display region and the second display region, each of the plurality of data signals can be used to transition from providing the hold voltage to providing the data voltage at the first hold frame, and the data signal can transition to provide the data voltage at a first time of the first hold frame. Wherein the data voltage provided by the data signal at the first hold frame is used to provide data for the second display region, and the hold voltage provided by the data signal at the first hold frame is used for data hold of the first display region.

[0081] Optionally, a plurality of pixel rows in the pixel array included in the display screen can be divided into different display regions by rows. For example, the first display region includes a plurality of first pixel rows, the second display region includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

[0082] S202: The driving circuit outputs a first selection signal to the second display region, the first selection signal jumps at a second time of the first write frame, the jump of the first selection signal is used to control the second display region to implement data writing at the first write frame according to the data voltage, and the first time is earlier than the second time.

[0083] Wherein, the driving circuit can output different selection signals to different display regions, or output different selection signals to different regions of the same display region. The first selection signal can be a selection signal output by the driving circuit to the second display region; optionally, the first selection signal can be a selection signal corresponding to a region of the second display region that is written first; or the first selection signal is a selection signal corresponding to a region of the second display region that is closer to the first display region. In an example, when the first display region includes a plurality of first pixel rows, the second display region includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows, the first selection signal can be a selection signal corresponding to one or more second pixel rows of the plurality of second pixel rows that are written first, or the first selection signal is a selection signal corresponding to one or more second pixel rows of the plurality of second pixel rows that are closer to the first display region.

[0084] In addition, the jump of the first selection signal can refer to that the first selection signal jumps from high level to low level, and the first selection signal will be restored to high level after a short time of persistence after the jump; or the jump of the first selection signal can refer to that the first selection signal jumps from low level to high level, and the first selection signal will be restored to low level after a short time of persistence after the jump. In the embodiments of the present application, the first selection signal jumps from high level to low level is taken as an example for description. When the second display area needs to write data, the first selection signal will jump, and at this time, the area in the second display area receiving the first selection signal will realize data writing.

[0085] Optionally, the time difference between the first time and the second time is between 1 unit time and 100 unit times, and the unit time is the scanning time length of a single pixel row. If the time difference is represented as △t and the unit time is represented as H, then △t>0 and is between 1H and 100H. In a possible example, the unit time H=1 second (s) / high refresh rate / number of rows of the display screen, and the high refresh rate can refer to the highest refresh rate corresponding to the display area of the display screen, for example, the high refresh rate can be 120Hz.

[0086] In a possible embodiment, the driving circuit outputs the first selection signal to the second display area, and the first selection signal can jump at the second time of the first write frame, and the jump of the first selection signal at the second time can be used to control the second display area to realize data writing according to the data voltage, that is, to realize data writing of the second display area in the first write frame. Wherein, the first time is earlier than the second time, that is, the first time when the driving circuit provides the data voltage is earlier than the second time when the first selection signal jumps.

[0087] Further, before entering the first holding frame, the data signal can also provide a data voltage in the write frame of the i-th refresh period of the first display area and in the write frame of the j-1-th refresh period of the second display area, respectively, and the data voltage can be used to provide data for the first display area and the second display area. In addition, the driving circuit can also output a selection signal to the first display area, and the selection signal can be used to control the first display area to realize data writing according to the data voltage in the write frame of the i-th refresh period; the driving circuit can also output a plurality of selection signals to the second display area, and the plurality of selection signals can be used to control the second display area to realize data writing according to the data voltage in the write frame of the j-1-th refresh period. Wherein, the write frame of the j-1-th refresh period is located in the write frame of the i-th refresh period.

[0088] In the embodiment of the present application, in the process of partition refreshing of the first display area and the second display area, for the holding frame in the i-th refresh period of the first display area, the driving circuit can provide the data voltage for the second display area in advance in the holding frame through the data signal, that is, the first time at which the data signal provides the data voltage in the holding frame is earlier than the second time at which the first selection signal jumps in the holding frame, so that the disturbance of the power supply signal VDD occurs before data writing, and thus the voltage of the power supply signal VDD can recover to the normal voltage at the time of data writing, thereby solving the problem of bright lines at the partition boundary of the first display area and the second display area in the process of partition refreshing. For example, (a) in FIG. 9 shows the waveform diagram of the data signal DA provided by the driving circuit for the first display area to the third display area of the display screen in the writing frame and the holding frame in the i-th refresh period of the first display area, the refresh frequencies of the first display area and the third display area are the same and are greater than the refresh frequency of the second display area; (b) in FIG. 9 shows the waveform diagram of the data signal DA, the power supply signal VDD, and the first selection signal S21 of the second display area.

[0089] Further, for the writing frame in any refresh period of the first display area, the data voltage is also used to provide data for the first display area, and the data signal is also converted to provide the data voltage before the writing frame in the refresh period of the first display area. For example, the refresh period of the first display area can be the i-th refresh period of the first display area, or the i+1-th refresh period of the first display area, and the i+1-th refresh period of the first display area is taken as an example for description. For example, the i+1-th refresh period of the first display area includes a second writing frame, and the second writing frame can be a writing frame after the first holding frame. The data voltage is also used to provide data for the first display area, and the data signal is also converted to provide the data voltage at a third time before the second writing frame. In combination with FIG. 7, as shown in FIG. 10, the method further includes S203.

[0090] S203: The driving circuit outputs a second selection signal to the first display area, and the second selection signal jumps at a fourth time in the second writing frame. The jump of the second selection signal is used to control the first display area to realize data writing in the second writing frame according to the data voltage, and the third time is earlier than the fourth time.

[0091] The second selection signal can be a selection signal output by the driving circuit to the first display area. Alternatively, the second selection signal can be a selection signal corresponding to a region of the first display area that is written first. In an example, when the first display area includes a plurality of first pixel rows and the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows, the second selection signal can be a selection signal corresponding to a topmost first pixel row of the plurality of first pixel rows.

[0092] In addition, the jump of the second selection signal can refer to a jump of the second selection signal from a high level to a low level, and a recovery of the second selection signal to the high level after a short period of time. In the embodiments of the present application, when the first display area needs to write data, the second selection signal will jump, and at this time, the region of the first display area receiving the second selection signal will realize data writing.

[0093] Alternatively, the time difference between the third time and the fourth time is between 1 unit time and 100 unit times, and the unit time is the scanning time of a single pixel row.

[0094] In a possible embodiment, the driving circuit outputs a data signal to the first display area and the second display area, and the data signal changes to provide a data voltage at a third time before a second write frame, the data voltage being used to provide data for the first display area. In addition, the driving circuit outputs a second selection signal to the second display area, and the second selection signal jumps at a fourth time of a fourth write frame. The jump of the second selection signal at the fourth time can be used to control the first display area to write data according to the data voltage, that is, to realize data writing of the first display area in the second write frame. The third time is earlier than the fourth time, that is, the third time at which the driving circuit provides the data voltage is earlier than the fourth time at which the second selection signal jumps.

[0095] Further, when entering a second holding frame of the second write frame, the driving circuit can provide data signals and corresponding selection signals for the first display area and the second display area in a similar manner to the first holding frame described above. For specific descriptions, please refer to the descriptions in S201-S202 described above. The embodiments of the present application will not be repeated here.

[0096] For the convenience of understanding, in the following, the waveforms of the plurality of signals in the scenario of the partition refresh shown in FIG. 8 are introduced and explained by means of FIG. 11 and FIG. 12. The plurality of signals can include a data signal DA, a power supply signal VDD, a selection signal S11 corresponding to the region of the first display region which is written first, and a selection signal S21 corresponding to the region of the second display region which is written first. For example, the region of the first display region which is written first is the first pixel row in the first display region, the region of the second display region which is written first is the first pixel row in the second display region, S11 can be referred to as the second selection signal, and S21 can be referred to as the first selection signal.

[0097] In the following FIG. 11 and FIG. 12, two refresh periods adjacent to the first display region are taken as an example for illustration, which are denoted as W1 and W2. The two refresh periods of the first display region can correspond to four refresh periods of the second display region. In the figures, the write frame and the hold frame in the refresh period of the first display region are shown, and the write frame in the refresh period of the second display region is shown. The write frame in some refresh periods of the second display region is denoted as a high-frequency write frame, which overlaps with the hold frame in the refresh period of the first display region. In the figures, the first display region is denoted as region 1, the second display region is denoted as region 2, and the third display region is denoted as region 3.

[0098] In an example, if the scheme provided in the present application is not adopted, in the scenario of the partition refresh shown in (a) and (b) of FIG. 8, the waveforms of the plurality of signals are as shown in (a) of FIG. 11 and (a) of FIG. 12. In which, the data signal DA is high in the write frame of the refresh period W1, is changed from low to high in the hold frame or the high-frequency write frame of the refresh period W1, is high in the write frame of the refresh period W2, and is changed from low to high in the hold frame or the high-frequency write frame of the refresh period W2. The changes of the data signal DA all occur when the data is written in the second display region. The power supply signal VDD is high in the refresh period W1 and the refresh period W2, and is mutated due to disturbance in the process of the data signal DA changing from low to high. The selection signal S11 jumps at the start of the write frame of the refresh period W1, and jumps at the start of the write frame of the refresh period W2. The selection signal S21 jumps in the write frame of the refresh period W1 and the refresh period W2. The jump occurs when the data is written in the second display region, and the jump in the hold frame of the refresh period W1 and the refresh period W2 is synchronous with the change of the data signal DA.

[0099] In another example, if the scheme provided in the present application is adopted, in the partition refresh scenario shown in (a) and (b) of FIG. 8, the waveforms of the above-mentioned signals are shown in (b) of FIG. 11 and (b) of FIG. 12. Among them, the data signal DA is high in the write frame of the refresh period W1, is changed from low to high at the first time in the holding frame or the high-frequency write frame within the refresh period W1, jumps to high at the third time before the write frame of the refresh period W2, and is changed from low to high at the fifth time in the holding frame or the high-frequency write frame within the refresh period W2; the power signal VDD is high in both the refresh period W1 and the refresh period W2, and a mutation occurs in the process of changing the data signal DA from low to high due to disturbance; the selection signal S11 jumps at the beginning of the write frame of the refresh period W1, and jumps at the fourth time before the write frame of the refresh period W2, and the third time is earlier than the fourth time; the selection signal S21 jumps in the write frame of the refresh period W1 and the refresh period W2, which occurs when data is written in the second display area, jumps at the second time in the holding frame of the refresh period W1, and jumps at the sixth time in the holding frame of the refresh period W2, and the first time is earlier than the second time, and the fifth time is earlier than the sixth time.

[0100] Optionally, as shown in (a) of FIG. 13, the transition of the data signal from providing the holding voltage to providing the data voltage includes at least one of the following: the data signal jumps from providing the holding voltage to providing the data voltage, the data signal transitions from providing the holding voltage to providing the data voltage in a stepwise increasing manner, the data signal transitions from providing the holding voltage to providing the data voltage in a linearly increasing manner, or the data signal transitions from providing the holding voltage to providing the data voltage in an arcuate increasing manner.

[0101] Similarly, as shown in (b) of FIG. 13, the transition of the data signal from providing the data voltage to providing the holding voltage includes at least one of the following: the data signal jumps from providing the data voltage to providing the holding voltage, the data signal transitions from providing the data voltage to providing the holding voltage in a stepwise increasing manner, the data signal transitions from providing the data voltage to providing the holding voltage in a linearly increasing manner, or the data signal transitions from providing the data voltage to providing the holding voltage in an arcuate increasing manner.

[0102] It can be understood that, in the embodiments of the present application, the different refresh frequencies including 60Hz and 120Hz are taken as examples, and in actual application, the different refresh frequencies can also be other values, and can also include three or more refresh frequencies, and the embodiments of the present application do not make specific limitation thereon. When the different refresh frequencies include three or more refresh frequencies, the first display area can be a display area with the smallest refresh frequency, and the second display area can be a display area with a larger refresh frequency. Optionally, each refresh period corresponding to a refresh frequency other than the largest refresh frequency in the different refresh frequencies can include a write frame and one or more hold frames.

[0103] In another possible embodiment of the present application, for a first refresh period of the first display area and a second refresh period of the second display area, the first refresh period of the first display area includes a hold frame, and the second refresh period of the second display area includes a first write frame, and the first write frame overlaps with the hold frame in time sequence. The method includes: a driving circuit outputs a data signal to the first display area and the second display area, the data signal being used to provide a hold voltage and a data voltage, the data voltage being used to provide data for the second display area, and the hold voltage being used for data holding of the first display area, and the data signal is changed to provide the data voltage at a first time of the hold frame; the driving circuit outputs a first selection signal to the second display area, the first selection signal jumps at a second time of the first write frame, the jump of the first selection signal being used to control the second display area to implement data writing in the first write frame according to the data voltage, and the first time is earlier than the second time. Optionally, the first selection signal is a selection signal corresponding to a region written first in the second display area.

[0104] Optionally, the first refresh period of the first display area includes a second write frame, the data voltage is also used to provide data for the first display area, and the data signal is also changed to provide the data voltage at a third time before the second write frame. The method further includes: the driving circuit outputs a second selection signal to the first display area, the second selection signal jumps at a fourth time of the second write frame, the jump of the second selection signal is used to control the first display area to implement data writing in the second write frame according to the data voltage, and the third time is earlier than the fourth time. Optionally, the second selection signal is a selection signal corresponding to a region written first in the first display area.

[0105] In the embodiment of the present application, in the process of partition refreshing of the first display area and the second display area, for the write frame in the refresh period of the first display area, the driving circuit can provide the data voltage for the first display area before the write frame in the refresh period through the data signal, that is, the time of providing the data voltage by the data signal is earlier than the time of the jump of the second selection signal in the write frame, so that the disturbance of the power signal VDD occurs before data writing, and thus the voltage of the power signal VDD can be restored to the normal voltage at the time of data writing, thereby solving the problem of bright lines at the boundary of the first display area in the process of partition refreshing of the first display area and the second display area.

[0106] The above embodiment introduces the scheme provided by the embodiment of the present application from the perspective of interaction between the driving circuit and the display screen in the display device. It can be understood that the display device includes the corresponding hardware structure and / or software module for executing each function in order to realize the above functions. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed in the present text, the present application can be realized in the form of hardware or the combination of hardware and computer software. Whether a certain function is executed in the form of hardware or computer software driven hardware depends on the specific application and design constraints of the technical scheme. The skilled person can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0107] The embodiment of the present application can divide the functional modules of the display device according to the above method examples, for example, each functional module can be divided according to each function, or two or more functions can be integrated in one module. The above integrated module can be realized in the form of hardware or in the form of software functional module. It should be noted that the division of the modules in the embodiment of the present application is illustrative, and is only a logical function division. In actual implementation, there can be another division method. The following will be described taking the division of each functional module according to each function as an example.

[0108] In the case of using integrated units, FIG. 14 shows a structural schematic diagram of a display device involved in the above embodiment. The display device can include a first driving unit 301 and a second driving unit 302 for driving the display screen. The first driving unit 301 can be used to support the device to perform S201 in the above method embodiment; the second driving unit 302 is used to support the device to perform S202 or S203 in the above method embodiment. All related contents of each step involved in the above method embodiment can be cited to the function description of the corresponding functional module, and the embodiment of the present application will not be described here.

[0109] On the basis of using hardware, the first driving unit 301 and the second driving unit 302 in the embodiment of the application can be a driving circuit, which can be used to drive a display screen. In the embodiment of the application, the driving circuit can be used to support the display device to perform one or more steps in S201-S203 in the method embodiment. Optionally, as shown in FIG. 15, the first driving unit 301 can be a DDIC, and the second driving unit 302 can be a GOA.

[0110] In another embodiment of the application, an electronic device is also provided, which includes a processor and a display device; wherein the display device can be any of the display devices provided above, and is used to perform the steps in the method embodiments provided above.

[0111] It can be understood that all related contents of the steps involved in the above method embodiments can be cited into the embodiment of the interface test starting device and the embodiment of the communication device, and the embodiment of the application will not be repeated here.

[0112] In several embodiments provided in the application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0113] The units described as separate components can or can not be physically separate, and the components displayed as units can be one physical unit or multiple physical units, that is, can be located in one place or can be distributed to multiple different places. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0114] The integrated unit, if implemented in the form of a software function unit and sold or used as an independent product, can be stored in a readable storage medium, which can include a U disk, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk, and various storage medium that can store program codes. Based on such understanding, the technical scheme of the embodiment of the application essentially or the part that contributes to the prior art or the whole or part of the technical scheme can be embodied in the form of a software product.

[0115] In another embodiment of the application, a readable storage medium is also provided, which stores computer execution instructions, when a device (which can be a single-chip microcomputer, a chip, etc.) or a processor executes the steps in the method embodiments.

[0116] In yet another embodiment of the present application, a computer program product is also provided, which comprises computer instructions stored in a readable storage medium; at least one processor of a device can read the computer instructions from the readable storage medium, and the at least one processor executes the computer instructions to make the device perform the steps in the above-mentioned method embodiments.

[0117] Finally, it should be noted that the above-mentioned is merely a specific implementation of the present application, but the protection scope of the present application is not limited thereto, and any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A display driving method, characterized by, The method is applied to a display device comprising a driving circuit and a display screen, the display screen comprising adjacent first and second display areas, a refresh period of the first display area being greater than a refresh period of the second display area, a first refresh period of the first display area comprising a holding frame, a second refresh period of the second display area comprising a first write frame, the first write frame being overlapped with the holding frame in time sequence, the method comprising: the driving circuit outputs a data signal to the first and second display areas, the data signal being used to provide a holding voltage and a data voltage, the data voltage being used to provide data for the second display area, the holding voltage being used for data holding of the first display area, the data signal being converted to provide the data voltage at a first time of the holding frame; the driving circuit outputs a first selection signal to the second display area, the first selection signal being jumped at a second time of the first write frame, the jump of the first selection signal being used to control the second display area to implement data writing according to the data voltage at the first write frame, the first time being earlier than the second time.

2. The method of claim 1, wherein, The first selection signal is a selection signal corresponding to a region written first in the second display area.

3. The method according to claim 1 or 2, characterized in that, The first display area comprises a plurality of first pixel rows, the second display area comprises a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

4. The method according to any one of claims 1 to 3, characterized in that, A time difference between the first time and the second time is between 1 unit time and 100 unit times, the unit time being a scanning time length of a single pixel row.

5. The method according to any one of claims 1 to 4, characterized in that, The first refresh period of the first display area further comprises a second write frame, the data voltage is further used to provide data for the first display area, and the data signal is further converted to provide the data voltage at a third time before the second write frame; the method further comprises: the driving circuit outputs a second selection signal to the first display area, the second selection signal being jumped at a fourth time of the second write frame, the jump of the second selection signal being used to control the first display area to implement data writing according to the data voltage at the second write frame, the third time being earlier than the fourth time.

6. The method of claim 5, wherein, The second selection signal is a selection signal corresponding to a region written first in the first display area.

7. A display device, characterized by comprising: The display device comprises a driving circuit and a display screen, the display screen comprising adjacent first and second display areas, a refresh period of the first display area being greater than a refresh period of the second display area, a first refresh period of the first display area comprising a holding frame, a second refresh period of the second display area comprising a first write frame, the first write frame being overlapped with the holding frame in time sequence; The driving circuit is configured to output a data signal to the first display area and the second display area, the data signal being configured to provide a holding voltage and a data voltage, the data voltage being configured to provide data for the second display area, and the holding voltage being configured to hold data for the first display area, the data signal being switched to provide the data voltage at a first time point of the holding frame. The driving circuit is further configured to output a first selection signal to the second display area, the first selection signal being switched at a second time point of the first writing frame, the switching of the first selection signal being configured to control the second display area to perform data writing according to the data voltage at the first writing frame, the first time point being earlier than the second time point.

8. The apparatus of claim 7, wherein, The first selection signal is a selection signal corresponding to a region of the second display area that is written first.

9. The apparatus of claim 7 or 8, wherein, The first display area includes a plurality of first pixel rows, the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

10. The device of any of claims 7-9, wherein, A time difference between the first time point and the second time point is between 1 unit time and 100 unit times, the unit time being a scanning time length of a single pixel row.

11. The device according to any of claims 7-10, characterized in that A first refresh period of the first display area includes a second writing frame, the data voltage is further configured to provide data for the first display area, and the data signal is further switched to provide the data voltage at a third time point before the second writing frame. The driving circuit is further configured to output a second selection signal to the first display area, the second selection signal being switched at a fourth time point of the second writing frame, the switching of the second selection signal being configured to control the first display area to perform data writing according to the data voltage at the second writing frame, the third time point being earlier than the fourth time point.

12. The apparatus of claim 11, wherein, The second selection signal is a selection signal corresponding to a region of the first display area that is written first.

13. An electronic device, comprising: The electronic device includes a processor and a display device coupled to the processor, the display device being as claimed in any one of claims 7-12.

14. A computer-readable storage medium, characterized in that, The computer readable storage medium stores instructions, when the instructions are run on a device, causing the device to perform the display driving method as claimed in any one of claims 1-6.

15. A computer program product, characterised in that, The computer program product includes a computer program, when the computer program is run on a device, causing the device to perform the display driving method as claimed in any one of claims 1-6.

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