Method for testing devices and inspection system

Abstract

In one embodiment, the method is for testing electronic assemblies (1) each having a plurality of electronic components (3) applied on a circuit board (2), the method comprising the following steps: A) feeding the electronic assemblies (1) in an inspection system (10) comprising a first imaging stage (41) and an evaluation unit (51), B) imaging, by the first imaging stage (41), the electronic assemblies (1) so that first component images (61) of the electronic assemblies (1) are taken, C) identifying, by the evaluation unit (51), at least some of the electronic components (3) of the respective electronic assembly (1) in the respective first component image (61), and E) evaluating, by the evaluation unit (51), a fastening of the identified electronic components (3) on the circuit board (2) of the respective electronic assembly (1).

Description

[0001] Description

[0002] METHOD FOR TESTING DEVICES AND INSPECTION SYSTEM

[0003] A method for testing electronic assemblies and an inspection system operated by such a method are provided . A corresponding computer program and computer-readable storage medium are also provided .

[0004] Document WO 97 / 33159 Al refers to a process for the radioscopic inspection of soldered points in electronic units using an X-ray source .

[0005] Document US 2023 / 0059410 Al relates to an inspection method for training a measurement machine to accurately measure side j oint lengths and detecting a defect among a plurality of solder j oints .

[0006] Document US 2021 / 0334587 Al discloses a method of training a convolutional neural network for defect inspection . The method includes collecting a training sample set including multiple solder j oint images . A respective one of the multiple solder j oint images includes at least one solder j oint having one of di f ferent types of solder j oint defects .

[0007] A problem to be solved is to provide a testing method and an inspection system providing more reliable failure detection .

[0008] This obj ect is achieved, inter alia, by a testing method and an inspection system as defined in the independent claims . Exemplary further developments constitute the subj ect-matter of the dependent claims . According to at least one embodiment, the method is for testing electronic assemblies. The electronic assemblies to be tested each comprise a carrier, like a circuit board, especially a printed circuit board. The circuit board may be based, for example, on a polymer, composite, metal, ceramic or glass substrate. On the carrier, one or a plurality of electronic components are applied. The electronic components may include, for example, integrated circuits, resistors, capacitors, inductances, switches, plugs, connectors, THT connections, via connections, light-emitting diodes and / or radiation detectors, diodes, transistors, oscillators like quartz oscillators, sensors, relays, potentiometers, and the like. Hence, the electronic components do not need to be active components but can also be passive components.

[0009] According to at least one embodiment, the method comprises the step of feeding the electronic assemblies in an inspection system. For example, the feeding may be done automatically from a depot or magazine. Different kinds of electronic assemblies may be fed into the inspection system, possibly in an intermixed manner so that the inspection system may handle the different kinds of electronic assemblies virtually simultaneously.

[0010] According to at least one embodiment, the inspection system comprises a first imaging stage. For example, the first imaging stage comprises a camera system.

[0011] According to at least one embodiment, the inspection system comprises an evaluation unit. The evaluation unit may be hardware and / or software. For example, the evaluation unit is a computer program stored in a memory of the inspection system and running on a processor of the inspection system. The memory and the processor may exclusively be used by the inspection system or they are shared resources used by equipment not belonging to the inspection system as well . That is , the memory and the processor may be located remotely from the other components of the inspection system .

[0012] According to at least one embodiment , the method comprises the step of imaging, by the first imaging stage , the electronic assemblies so that first component images of the electronic assemblies are taken . It is possible that there is one first component image per electronic assembly or that there is more than one first component image per electronic assembly . It may also be possible that on one first component image there is more than one electronic assembly, however, a one-to-one assignment between the first component images and the electronic assemblies may be most practical .

[0013] According to at least one embodiment , the method comprises the step of identi fying, by the evaluation unit , at least some of the electronic components of the respective electronic assembly in the respective first component image . Identi fying the electronic components may include , for example , at least one of obtaining the respective locations of the electronic components , determining locations of j oints , like solder j oints , of the respective electronic component , determining kinds of the electronic components , like being SMT components or BGA components , ascertaining types of the respective electronic components , like being an integrated circuit or a capacitor, or figuring out which model the respective electronic components are , like assigning a unique model number to the respective electronic component . The solder j oints may be , for example , Sn-based soft solder connections or sinter j oints based, for example , on Ag and / or Cu .

[0014] According to at least one embodiment , the method comprises the step of evaluating, by the evaluation unit , a fastening of the identi fied electronic components on the circuit board of the respective electronic assembly . For example , the evaluating includes checking i f the electronic components are correctly mounted on the respective circuit board . This may include checking at least one of the locations of the electronic components , the locations and quality of the j oints , the correctness and / or authenticity of the used kind, type and / or model of the electronic components .

[0015] In at least one embodiment , the method is for testing electronic assemblies each having a plurality of electronic components applied on a circuit board, the method comprising the following steps , for example , in the stated order :

[0016] A) feeding the electronic assemblies in an inspection system comprising a first imaging stage and an evaluation unit ,

[0017] B ) imaging, by the first imaging stage , the electronic assemblies so that first component images of the electronic assemblies are taken,

[0018] C ) identi fying, by the evaluation unit , at least some of the electronic components of the respective electronic assembly in the respective first component image , and

[0019] E ) evaluating, by the evaluation unit , a fastening of the identi fied electronic components on the circuit board of the respective electronic assembly .

[0020] Thus , for example , a method for automated void detection in X-ray images of electronic assemblies is provided Quality control is essential for ensuring the function and reliability of electronic assemblies and for setting production process parameters . This can be carried out on a random basis or as a 100% check . It includes testing, for example , for :

[0021] - Correct placement of components - Missing or incorrectly placed components lead to functional limitations , while twisted, misaligned or tilted components can lead to accelerated damage and thus premature failure .

[0022] - Defect- free solder contacts - Solder contacts are used for electrical and / or thermal contacting of the component and the assembly . Their reliability depends on correct geometric design during the soldering process and a low number of voids . Voids are caused by outgassing of the solder alloy, which is trapped in the j oint when the solder solidi fies . Voids can therefore not be completely avoided . The service li fe of the solder contact depends largely, for example , on the number, shape , position and si ze of the voids present , especially on the shape , si ze and / or position of the largest void .

[0023] - Delamination or defects in encapsulations - Encapsulations of individual components or the entire assembly serve to protect the electronics from external influences . This protective function is impaired by delamination or defects in the encapsulation material .

[0024] - Impurities - Impurities caused, for example , by improper production of the solder or mixing with pollution or contamination on the circuit board, may hamper thermal and / or mechanical properties and may lead to cracks and / or voids .

[0025] Testing on these aspects requires one or more non-destructive and, i f possible , non-contact test methods in order to carry out quality control ef ficiently . Alternative solutions for the respective test may be as follows :

[0026] - Optical inspection - This method may take place on a random basis and manually by employees or, in the case of large batch si zes , by so-called automatic optical inspection systems , AOI systems . The disadvantages are the employee ' s susceptibility to errors , high investment costs for an AOI system and the high cost of creating inspection routines . Of course , no concealed elements can be inspected .

[0027] - 2D / 3D X-ray inspection - This method is also carried out on a random basis and manually or, in the case of large batch si zes , by so-called automatic X-ray inspection systems , AXI systems . While this method can also detect concealed elements and defects in the material , the investment costs for X-ray systems are high and AXI also requires a lot of personnel to create the inspection program . The personnel costs for creating the inspection program may exceed the system investment within a few years .

[0028] - Ultrasound inspection - Ultrasonic testing also enables the inspection of concealed elements as well as testing for defects . However, the coupling of the waves requires contamination of the assembly, which is why this method can typically only be used on a random basis .

[0029] Furthermore , the evaluation of the recorded data represents a maj or challenge . One example of this is void detection in solder contacts . As a quality criterion, electronics manufacturers often set a void ratio , that is , an area ratio of voids to the total area of the solder contact , of less than 20% , for example . Alternatively or additionally to the area ratio , a number of the voids , locations of the voids , a pattern of the voids , a si ze of the largest void, a void- volume ratio, a percentage of solder coverage, a void content and / or a size distribution of the voids may be used to analyze the quality of the solder contact, also in the method described herein.

[0030] A possible method is 2D X-ray inspection, in which the solder contact is imaged. However, investigations have shown that this testing may not be reliably. For this purpose, a test batch of an electronic assembly was passed through the void inspection system of several electronics manufacturers; as a result, one and the same assembly was given a test rating in these tests ranging from high quality to reject.

[0031] The method described herein can address these issues.

[0032] For example, an autonomous inspection system can be provided. The inline use of automatic inspection systems based on, for example, AOI or AXI, is essentially prevented by the fact that the time and effort required to create inspection programs is high. Herein a method for automatic inspection program creation is provided. The method may include, for example, the following steps:

[0033] - Step 1 - The assembly to be tested is fed into the inspection system.

[0034] - Step 2 - An overview image is created using an optical imaging unit or X-ray imaging.

[0035] - Step 3 - An artificial intelligence-based, Al-based, evaluation, for example, classifies the components detected on the assembly in order to assign them to specific control algorithms. The element classes correspond, for example, to the kinds of electronic components which may be QFN, QFP, FBGA or the like.

[0036] Step 4a - Parts of the image with recognized components may be cut out of the overview image , or

[0037] - Step 4b - detailed images of the detected elements may be recorded; high-resolution X-ray images are time-consuming for inline processes and generate large amounts of data, which in turn slows down the evaluation . It is therefore advantageous to only record the relevant areas in high resolution .

[0038] - Step 5 - The images can undergo pre-processing .

[0039] - Step 6 - The partial images or detailed images are analyzed using algorithms that may be Al-based and may be speci fic to the kinds of electronic components . In particular, algorithms are used for surface mount devices , SMD, assemblies , for example , which take into account the strongly fluctuating thicknesses of the solder layer and thus the strongly fluctuating gray value / contrast in the image . The Al algorithm can consider the high dynamics and the possibly steep increases in the gray value distribution .

[0040] - Step 7 - An assembly quality / condition is evaluated on the basis of the individual results .

[0041] - Step 8 - The results are passed on to downstream processes , for example , a sorting unit , via an interface .

[0042] With this method, for example , void detection is enabled . Currently used algorithms are comparably unreliable . Using an Al-based algorithm, like a UNET architecture , can improve the pre-processing of Step 5 . The algorithm can be trained to binari ze gray value images in such a way that the voids that stand out from the immediate surroundings are displayed in contrast to the surroundings .

[0043] Further, crack detection is enabled . 3D X-ray images make it possible to find cracks in solder contacts . Another Al-based algorithm, like an adapted CNN, may be used for this purpose for example in Step 5 , which can be used to categori ze solder contacts into damage condition classes. The algorithm detects cracks within the X-ray image and evaluates the damage progress to date based on the propagation in the solder contact volume.

[0044] Moreover, counterfeit detection is possible. In Step 6, an anomaly detection algorithm or a pre-trained Al algorithm can be used to decide on the basis of a comparison image of known originals, so called Golden Device, whether the components present are an original, a forgery or a manipulation.

[0045] Rotation of component can also be determined, for example, square components can be placed rotated by 90°, 180° or 270° which can lead to malfunctions.

[0046] The method can also produce a fingerprint of the assemblies and components. That is, solder contacts have a unique fingerprint due to their defects, even more secure by using all defects in all solder contacts on an electronic assembly, for unique identification. For example, security can therefore be increased, and trustworthy electronics can be ensured. This enables for example, board traceability and component replacement can be detected so that, for example, a replacement with components with hidden functions can be recognized.

[0047] In addition, through-hole technology, THT, access is feasible. The quality of solder passing through a through- hole technology joint can be checked using oblique transmission. A THT joint detected in Step 2 triggers, for example, a detailed image in Step 4b of the same position at a defined angle in order to be able to carry out an evaluation . Other non-destroying techniques than 2D-AOI, 3D-AOI, 2D-AXI, 3D-AXI, or AOI or AXI with imaging using different angles of incidence, also referred to as 2.5D-AOI or 2.5D-AXI, are also usable, like imaging ultrasound, laser speckle photometry, eddy current, and the like.

[0048] With the method described herein, for example, a significant reduction in personnel costs is possible, as test program creation is no longer required. It is possible to use automatic inspection systems from batch size 1 and thus multiplying the market potential of AOI and AXI systems. Automatic inspection systems can be used outside of the production process, for example, for troubleshooting returns and in repair processes in terms of the circular economy. Enabling 100% control of assemblies in terms of trustworthy electronics for critical infrastructures is economically possible .

[0049] Especially concerning void detections, with the method described herein, binarization without applying a constant threshold value is possible that avoids the loss of fault information and leads to reliable and system-independent quality statements. Detection of defects even in areas of high gray value contrasts, for example, abrupt thickness fluctuations of the solder material, like a change from meniscus to standoff, or background structures, like conductor tracks, is possible. The enabled detection of noncircular structures leads to high detection accuracy. The method is applicable for defect detection in different elements, like solder contacts, capsule materials, coatings, and the like. Further, automation of an assessment that could previously only be carried out by trained personnel is enabled, which makes it possible to quanti fy damage that has already occurred during the manufacturing process or during the period of use .

[0050] Counterfeit detection is increasingly in demand due to the growing number of applications in security-relevant areas , like in automobiles or airplanes . X-ray is a safe but costintensive process , but as the system is already used for quality monitoring, using the inspection system for counterfeit detection is an additional benefit .

[0051] Inspection for component assembly, including connectors assembly, which has so far been carried out , for example , by AOI systems , can also be implemented in the method described herein without further costs .

[0052] Fingerprinting enables the clear identi fication of circuit boards as well as checking whether changes have been made to the board . Until now, it has only been possible to check for changes by means of extensive investigations . Unambiguous identi fication based on intrinsic and non- f alsi f iable features , such as using a pattern of voids in the solder j oints , allows additional security in a cost-ef ficient manner .

[0053] The method described herein can be used, for example , in the following technical fields :

[0054] - quality control in electronics production,

[0055] - condition assessment of used electronics ,

[0056] - fault- finding as the basis for repair processes , component screening before recycling, and / or

[0057] - proof of trustworthy electronics.

[0058] According to at least one embodiment, method step C) includes: Cl) selecting, by the evaluation unit, zones of interest in the first component images corresponding to particular areas of the respective electronic assembly. For example, the zones of interest correspond to the electronic components. Possibly, there is a one-to-one assignment between the electronic components and the zones of interest. Otherwise, more than one zone of interest can correspond to one electronic device, or vice versa. For example, the zones of interest may focus on connection areas between the respective electronic component and the carrier, like the circuit board. It is possible that sizes of the zones of interest are the same or approximately the same as footprints the respective electronic components in the first component images. 'Approximately' may mean that the zones of interest have a size of at most thrice or twice or 1.5-times or 1.2- times of the footprints the respective electronic components.

[0059] According to at least one embodiment, the method further comprises, for example, after step C) and prior to step E) : D) imaging, by a second imaging stage of the inspection system and / or by the first imaging stage, the zones of interest so that second component images of the zones of interest are taken. Thus, the first imaging stage may be used for taking both the first and second component images.

[0060] The second imaging stage, if present, may be a two- dimensional, 2D, or a three-dimensional, 3D, imaging stage so that 2D and / or 3D information may be obtained. 2D information can be surface information and 3D information can be height relief information or volume information, for example . I f the second imaging stage is present , it may be configured for di f ferent imaging than the first imaging stage . For example , the first and second imaging stages can di f fer in at least one of the used spectral range , like optical vs . X-ray, the dimensionality of the respective images , like 2D, 3D or 2 . 5D, or the angles of incidence used, like perpendicular or oblique relative to the circuit board . Thus , the first and second imaging stages can be of di f ferent types and may be configured to record complementary and / or supplementary information .

[0061] According to at least one embodiment , the first imaging stage is an optical photo stage or an X-ray stage . Correspondingly, the first component images can be 2D optical photos or 2D X- ray photos , for example . The term 'optical ' can refer to at least one of the near-ultraviolet spectral range , the visible spectral range , the near-infrared spectral range or the midinfrared spectral range . For example , near-ultraviolet refers to wavelengths of at least 200 nm and less than 420 nm, visible light refers to wavelengths of at least 420 nm and less than 760 nm, near-infrared refers to wavelengths of at least 760 nm and of at most 3 pm, and mid-infrared spectral range refers to wavelengths of more than 3 pm and at most 12 pm .

[0062] According to at least one embodiment , the second imaging stage is or includes an X-ray stage . The second imaging stage can be a 2D imaging stage or a 3D imaging stage .

[0063] For example , the first imaging stage is a 2D or 3D optical stage and the second imaging stage is a 2D or 3D X-ray stage . In case of a 3D optical stage , the first imaging stage or also the second imaging stage may be a stereoscopic stage using, for example, two or more than two cameras.

[0064] According to at least one embodiment, the electronic components are soldered onto the circuit boards so that, per electronic component, there is a plurality of solder joints, and the zones of interest include the solder joints. Especially, all the solder joints of the respective electronic component are included in one of the zones of interest .

[0065] According to at least one embodiment, method step E) includes: El) evaluating, by the evaluation unit, a quality of the solder joints based on the second component images. For example, voids are recognized. The detected voids may thus be considered in evaluating solder joints.

[0066] According to at least one embodiment, method step E) includes: E2) outputting, by the evaluation unit, data on evaluation results of the solder joints. Step E2) may be done after step El) . The outputting can be done wire-based ore wireless. The outputting may be done by issuing an output file. There may be one output file per electronic assembly, or results of a couple of the electric assemblies may all be packed into one output file. For reducing output data, it is possible that the outputting is limited to a flag indicating pass / fail .

[0067] According to at least one embodiment, the first and / or the second imaging stage includes at least one of an imaging ultrasound stage, a laser stage or an eddy current stage. These kinds of stages may be combined with an optical and / or X-ray stage. In case of an ultrasound stage, the electronic assemblies may be led through a bath of an ultrasound coupling medium, like an electrically insulating, volatile solvent, for example. In case of a laser stage, interferometric methods may be used, or thermal conductivity may be analyzed by heating the respective joint or component locally and by subsequently measuring a temperature distribution .

[0068] According to at least one embodiment, method step C) includes: C4) selecting, by the evaluation unit, zones of interest in the first component images corresponding to particular areas of the respective electronic assembly. For example, the particular areas correspond to the electronic components and the respective joints.

[0069] According to at least one embodiment, method step E) comprises: E10) analyzing, by the evaluation unit, the zones of interest only. Hence, all parts of the first component images not belonging to the zones of interest may be discarded in method step E) . The particular areas analyzed may either be parts of the respective first component image itself or may be corresponding second component images or corresponding parts of second component images.

[0070] According to at least one embodiment, in method step E) it is evaluated if a fastening of the identified electronic components on the circuit board of the respective electronic assembly is performed correctly. Thus, it can be evaluated if the fastening is done as intended, for example, with respect to orientation, component type / kind / model, joint quality, and so on . According to at least one embodiment, method step E) includes: E3) determining, by the evaluation unit, kinds of the electronic components on the circuit boards. For example, the electronic components of the respective electronic assembly are attached to the respective circuit board by means of at least two of the following kinds of connection: quad-flat no-leads, QFN, dual-flat no-leads, DEN, quad flat package, QFP, ball grid array, BGA, like fine ball grid array, FBGA, through-hole technology, THT, small outline transistor, SOT, surface mount technology, SMT . Depending on the kind of connection or solder joint it can be determined how the respective joint should look alike in the zones of interest in the first component images or in the second component images, if taken.

[0071] According to at least one embodiment, method step E) includes, for example, after step E3) : E4) comparing, by the evaluation unit, the determined types of the electronic components with a target state. For example, the respective solder joint may be an SMD solder joint and said solder joint can be compared with an archetypical solder joint in a data set of the evaluation unit stored, for example, in the memory or taken from a data bank accessible by the evaluation unit.

[0072] According to at least one embodiment, method step E) includes: E5) outputting, by the evaluation unit, a result of step E4) . The result may be a pass / fail flag or may be a detailed report, either concerning the individual joints, electric components or electronic assemblies.

[0073] According to at least one embodiment, method step E) includes: E6) determining, by the evaluation unit, a device pattern of defects in connections between the electric components and the respective circuit board. The device pattern may refer to the defects, like the voids and / or cracks, in the respective solder joint, in some or all of the solder joints of the respective electronic component, or at some or all of the electronic components in the electronic assembly .

[0074] According to at least one embodiment, method step E) includes: E7) outputting, by the evaluation unit, the determined pattern. Thus, a fingerprint including the device pattern can be sent to another equipment and / or can be stored in the evaluation unit. For example, a fingerprint file is created and stored and / or outputted.

[0075] According to at least one embodiment, the method further includes, after step E) : Fl) refeeding the respective electronic assembly in the inspection system. The refeeding can be done immediately after the previous step E) so that retesting is done temporarily close, or the refeeding can be done after some time, for example, after additional manufacturing steps and / or mounting of the electronic assembly in other equipment and / or after using the electronic assembly for some time and / or prior to a recycling process of the electronic assembly.

[0076] According to at least one embodiment, the method further includes, after step E) , especially after step Fl) : F2 ) reimaging, by the first imaging stage and / or the second imaging stage, the respective electronic assembly so that a new pattern of the voids is determined, and F3) comparing, by the evaluation unit, a previous device pattern, for example, of step E6) , with the new patter of the voids. Hence, the previous fingerprint of the electronic assembly can be compared with a current fingerprint and authenticity of the electronic assembly can be checked.

[0077] According to at least one embodiment, method step E) includes: E8) detecting, by the evaluation unit, cracks in connections between the electric components and the respective circuit board. In this case, preferably the second imaging stage is used which may be a 3D X-ray stage.

[0078] Step E8) , or an additional step performed analogously, may optionally include detecting, by the evaluation unit, cracks between metallization pads or / and circuit boards as well as metallization pad and component structure, and alternatively or additionally detecting, by the evaluation unit, cracks inside the circuit board. Thus, not only the solder connections may be checked but also if there are cracks between the metallization pads the solder connection is applied on and the associated component, and further the circuit board may be checked on internal damages as well.

[0079] According to at least one embodiment, one or some or all of the electronic components are connected with the respective circuit board by means of through-hole technology, THT . Hence, there may be metalized through holes partially or completely through the respective circuit board.

[0080] According to at least one embodiment, method step E) includes: E9) checking, by the evaluation unit, if the through holes are correctly metalized. In this case, preferably the second imaging stage is used which may be a 2D or also a 3D X-ray stage. According to at least one embodiment, method step C) includes: C2) identifying, by the evaluation unit, the through holes. Hence, the zones of interest may refer to the through holes and / or to the respective at least one electronic component.

[0081] According to at least one embodiment, method step C) includes, for example, after step C2) : C3) determining, by the evaluation unit, an imaging angle relative to the respective circuit board. Thus, in course of step C) a suitable imaging angle to investigate the respective through holes can be set.

[0082] According to at least one embodiment, method step D) includes for example, after step C3) : DI) imaging, by the second imaging stage, the through holes using the imaging angle. Thus, the joints at the respective at least one through hole can be checked efficiently in a targeted manner.

[0083] According to at least one embodiment, the method further includes, especially prior to step A) : AO) training a machine-learning model for carrying out at least part of method step C) and / or for carrying out at least part one method step E) . The training may be done, for example, by taking 2D or 3D X-ray data of joints, like solder joints, manually determining the state of the respective joints and adjusting the outcome of the machine-learning model to the manually determined states.

[0084] An inspection system is additionally provided. For example, by means of the method as indicated in connection with at least one of the above-stated embodiments, the inspection system is operated . Features of the inspection system are therefore also disclosed for the method and vice versa .

[0085] In at least one embodiment , the inspection system comprises :

[0086] - a transport unit configured to feed electronic assemblies having a plurality of electronic components applied on a circuit board in the inspection system,

[0087] - a first imaging stage configured to take first component images of the electronic assemblies ,

[0088] - an evaluation unit configured to identi fy at least some of the electronic components of the respective electronic assembly in the respective first component image , and to evaluate a fastening of the identi fied electronic components on the circuit board of the respective electronic assembly .

[0089] Moreover, a computer program and a computer-readable storage medium comprising instructions which, when executed by an inspection system, cause the inspection system to carry out the method as indicated in connection with at least one of the above-stated embodiments is provided .

[0090] An inspection system and a method described herein are explained in greater detail below by way of exemplary embodiments with reference to the drawings . Elements which are the same in the individual figures are indicated with the same reference numerals . The relationships between the elements are not shown to scale , however, but rather individual elements may be shown exaggeratedly large to assist in understanding .

[0091] In the figures : Figures 1 and 2 are schematic sectional views of exemplary embodiments of inspection systems described herein,

[0092] Figure 3 is a schematic block diagram of an exemplary embodiment of a method for operating inspection systems described herein,

[0093] Figure 4 is a schematic top view of an exemplary embodiment of an electronic assembly for operating methods and inspection systems described herein,

[0094] Figure 5 is a schematic sectional view of an exemplary embodiment of an electronic component on a circuit board for operating methods and inspection systems described herein,

[0095] Figure 6 is a schematic representation of method steps of an exemplary embodiment of a method for operating inspection systems described herein,

[0096] Figure 7 is a schematic top view of an exemplary embodiment of an electronic assembly for operating methods and inspection systems described herein,

[0097] Figures 8 to 13 are schematic top views and sectional views of electronic components on circuit boards for operating methods and inspection systems described herein,

[0098] Figure 14 is a schematic sectional view of an exemplary embodiment of an electronic component on a circuit board for operating methods and inspection systems described herein, and Figures 15 and 16 are schematic block diagrams of exemplary embodiments of methods for operating inspection systems described herein .

[0099] Figure 1 illustrate an exemplary embodiment of an inspection system 10 . The inspection system 10 comprises a first imaging stage 41 and an evaluation unit 51 . For example , the first imaging stage 41 is a 2D optical stage or a 2D X-ray stage . The evaluation unit 51 can be speci fically assigned to the inspection system 10 or can be shared with other equipment , not shown .

[0100] Optionally, the inspection system 10 further includes a second imaging stage 42 . For example , the second imaging stage 42 is a 2D X-ray stage or a 3D X-ray stage or a 2 . 5D X- ray stage . Both imaging stages 41 , 42 may be directly or indirectly connected with the evaluation unit 51 so that the imaging stages 41 , 42 may be controlled by the evaluation unit 51 and may send / receive date to / from the evaluation unit 51 . For example , a 2D optical stage as the first imaging stage 41 is combined with a 2 . 5D or 3D X-ray second imaging stage 42 .

[0101] As a further option, the inspection system 10 can include a transport unit 52 . By means of the transport unit 52 , di f ferent electronic assemblies 1 can automatically be fed into the inspection system 10 . Otherwise , the inspection system 10 may be loaded with the electronic assemblies 1 manually . For example , the transport unit 52 comprises a conveyor belt and / or a robot arm . Some or all of the electronic assemblies 1 may comprise a carrier, like a circuit board 2, on which a plurality of electronic components 3 are mounted, compare also Figure 4.

[0102] Along a transport direction of the transport unit 52, the second imaging stage 42 is located after the first imaging stage 41.

[0103] The inspection system 10 of Figure 2 moreover comprises a positioning unit 55. By means of the positioning unit 55, a position of the second imaging stage 42 can be set. Hence, 3D scanning or taking images with a specific, adjustable imaging angle Al is possible.

[0104] Moreover, the inspection system 10 can optionally include a feeder 54. For example, the feeder may be a depot or a magazine from which the electronic assemblies 1 are put onto the transport unit 52. After the second imaging stage 42, as an option the transport unit 52 may include a switching unit 53. By means of the switching unit 53, the electronic assemblies 1 can be transported into storage boxes 56A, 56B, depending, for example, of an evaluation result obtained by the evaluation unit 51.

[0105] The second imaging stage 42 can use a variety of different techniques. For example, the second imaging stage 42 includes at least one of an X-ray stage 43, an ultrasound stage 44, a laser stage 45 or an eddy current stage 46. Further, if thermal conductivity is measured, the second imaging stage 42 may include a temperature detecting stage 47, like an infrared camera. For example, the X-ray stage 43 is combined with the laser stage 45 and the temperature detecting stage 47. If the second imaging stage 42 includes more than one of the stages 43, 44, 45, 46, 47, these stages may be movable independent from one another or may be moved all together i f the positioning unit 55 is present .

[0106] Otherwise , the same as to Figure 1 may also apply to Figure 2 , and vice versa .

[0107] In Figure 3 , a method for operating the inspection system 10 is illustrated . For example , by means of the method the inspection system 10 of Figure 1 or of Figure 2 is operated .

[0108] In an optional method step M10 , the evaluation unit 51 is trained . For example , a machine-learning algorithm is used . The algorithm can be trained, for example , using training date which can include manually evaluated imaging data of electronic assemblies 1 . Other than shown, method stem M10 may not only be performed before all the other method steps , but step M10 may be implemented in an iterative manner .

[0109] In method step Mi l , the electronic assemblies 1 are fed in the inspection system 10 , either manually or automatically .

[0110] In subsequent method step M12 , by the first imaging stage 41 a first component image 61 of the electronic assembly 1 is taken . For example , per electronic assembly 1 exactly one first component image 61 is taken . For doing so , the inspection system 10 may include a sensor by means of which it is detected when the electronic assembly 1 is within a f ield-of-view of the first imaging stage 41 . By means of the transport unit 52 it may be assured that j ust one electronic assembly 1 is in the f ield-of-view .

[0111] Then, in methos step M13 , the evaluation unit 51 identi fies some or all of the electronic components 3 of the respective electronic assembly 1 in the respective first component image 61 . This can optionally include , for example , identi fying kinds of the electronic components 3 and selecting, by the evaluation unit 51 , zones of interest 71 in the first component images 61 corresponding to particular areas of the respective electronic assembly 1 , like areas comprising the electronic components 3 . Either the identi fying is carried out before the selecting, or vice versa .

[0112] In a first variant , method step M14 is carried out directly after method step M13 . Step M13 is or includes evaluating, by the evaluation unit 51 , a fastening of the identi fied electronic components 3 on the circuit board 2 of the respective electronic assembly 1 . Hence , by the evaluation unit 51 it may be determined i f the respective electronic components 3 are mounted correctly on the circuit board 3 . For doing so , the corresponding first component image 61 is analyzed, for example , using the machine-learning algorithm obtained from method step MI O .

[0113] In a second variant , between steps M13 and M14 the method step M21 is performed . In step M21 , the zones of interest 71 may be cut out of the overall first component image 61 so that subsequently only the zones of interest 71 need to be processed . This may include , for example , pre-processing the zones of interest 71 . Pre-processing may include at least one of applying appropriate grey scales on the first component images 61 , performing rendering or removing imaging artefacts .

[0114] Then, method step M14 is or includes analyzing, by the evaluation unit 51 , only the zones of interest 71 of the first component images 61 to evaluate the fastening of the identi fied electronic components 3 on the circuit board 2 of the respective electronic assembly 1 . That is , there is no further imaging but taking the first component images 61 , and based on the extracted zones of interest 71 the evaluation process is done . In this case , the first imaging stage 41 can be a 2D X-ray stage , or a combination of a 2D optical stage and a 2D X-ray stage .

[0115] In a third variant , between steps M13 and M14 the method step M22 is performed . Step M22 includes or is imaging, by a second imaging stage 42 , the zones of interest 71 so that second component images 62 of the zones of interest 71 are taken . The second component images 62 can be 2D images or 3D images , that is , can be a data set representing relief and / or volume information of the respective zone of interest 71 .

[0116] Alternatively, it is possible that in step M22 the second component images 62 are also taken by the first imaging stage 41 as well . Hence , the second imaging stage 42 may not be necessary . Taking the second component images 62 can optionally be done by the first imaging stage 41 , for example , with an increased spatial resolution and / or longer illumination time and / or in a di f ferent spectral range and / or with a di f ferent angle of incidence , i f required, compared with taking the first component images 61 . The same applies for all other embodiments .

[0117] Correspondingly, in this variant step M14 includes evaluating, by the evaluation unit 51 , a quality of the connection between the electric components 3 and the carrier 3 , for example , solder j oints 72 , based on the second component images 62 . For example , detected voids 73 in the connection are considered or are the deciding criterion or one of a couple of deciding criteria if the electric assembly 1 is of sufficient quality or not. Optionally, step M14 may in this case include outputting, by the evaluation unit 51, data on an evaluation result of the connection. For example, the evaluation result includes meta data of the voids 73, like a volume proportion or a number or a size distribution of the voids 73, or a map of the voids 73.

[0118] In method step M14, the connections between the electric components 3 and the carrier 2 can be evaluated based on the kind of connection, in particular based on the kind of solder joints. That is, the kinds of solder joints 72 may have distinct geometrical features.

[0119] This is schematically illustrated in connection with Figure 4. According to Figure 4, different kinds of the electric components 3A, 3B, 3C are placed onto the circuit board 2. For example, the electric components 3A are SMDs and the corresponding solder joints 72A have the specific features of SMD solder joints 72A. Analogously, the electric components 3B may have THT joints 72B having the specific features of THT solder joints 72B, and the electric components 3C may have QFN joints 72C having the specific features of QFN solder joints 72C, see also Figures 7 to 13 below.

[0120] As an example, method steps M22 and M14 are explained in more detail in connection with Figures 5 and 6. Figure 5 shows the overall cross-sectional view of the electronic device 3 including the solder joints 72D, 72E and 72F as well as part of the circuit board 2. For example, the solder joints 72D, 72F are for electrical contacting and have a rising portion remote from the electronic device 3 and a plane portion below the electronic device 3. The solder joint 72E may be a thermal contact without electric function and may be of overall flat design, for example. Thus, the solder joints 72D, 72F have a sharp edge at which the thickness of the solder joints 72D, 72F changes abruptly.

[0121] In the top part of Figure 6, the specific cross-sectional shape of an SMD solder joint 72 is shown which is imaged using X-rays X from a top side. In the bottom part of Figure 6 a corresponding X-ray to view of the SMD solder joint 72 is shown .

[0122] The zone of interest 71 corresponds, for example, to the solder joint 72D, see Figure 6, which is a grey-scale image obtained by an X-ray system. In a modification of the method described herein, said grey-scale image is binarized on the basis of a defined threshold value. This means that all grey values lower than the threshold value are set to black, while grey values higher than the threshold value are set to white. This threshold value can be set by an experienced operator or determined by the system itself. For images with strong fluctuations within the grey-scale values, as shown in Figure 6, bottom part, the voids 73 cannot be separated from the background using a single threshold value. These fluctuations occur, as in the example image, due to different path lengths of the X-rays through the solder joint 72D but also due to any background structures such as conductor tracks in other planes of the electric assembly 1.

[0123] As shown in Figure 6, bottom part, the algorithm searches for circular structures 73 within the binarized image. If there is enough thickness, the void takes a spherical shape, which is depicted as a circle in the 2D image. However, if the contact has only a small height, as in the right-hand part of the image, the voids 73 take irregular shapes. As a result, the respective void 73 is detected by the algorithm several times or not at all. For example, at 76A the defect is not detected because of low contrast difference, at 76B the defect is underestimated and at 76C there are multiple detections due to an unregular shape of the respective misinterpreted defect 76C. Correctly detected voids 73 are marked by a circle.

[0124] However, with the method described herein the solder joint 72D, for example, is classified automatically to be a lateral SMD solder joint having the characteristic meniscus shape followed by a steep reduction in thickness and by the flat portion. Hence, the algorithm analyzing the solder joint 72D can be based on this characteristic shape and can identify the defects 76A, 76B, 76C reliably.

[0125] Otherwise, the same as to Figures 1 and 2 may also apply to Figures 3 to 6, and vice versa.

[0126] Regarding Figure 7, a more detailed view of the electronic assembly 1 is shown. The representation of Figure 7 corresponds to the first component image 61 which is, for example, a 2D X-ray image. By the evaluation unit 51, several zones of interest 71 are exemplarily identified, highlighting different types and kinds of the electronic components 3. For example, the electronic component 3A is a QFN device, the electronic component 3B has a BGA, the electronic component 3C is a QFP device, the electronic component 3D is an SMD electrolyte capacitor, the electronic component 3E corresponds to connector pins in THT, the electronic component 3F is a 2-pole chip resistor and the electronic component 3G is a 2-pole chip capacitor. These different kinds of electronic components 3A..G have solder joints of different fashion.

[0127] This is also illustrated in some more detail in connection with Figures 8 to 13 which show the respective zones of interest as the second component images 62 focusing in each case on exactly one of the electronic components 3, for example. As can be seen in the top views of Figures 8 to 11 and 13 and in the sectional view of Figure 12, the different kinds of solder joints 72 have different characteristics linked with the kind of electronic component 3 which can be identified by taking the first component image 61. The respective electronic components 3 may then be imaged with the second imaging stage 42, for example.

[0128] Thus, in short, Figure 8 shows a QFN package having a plurality of the solder joints 72 arranged circumferentially. In Figure 9, a QFP package is shown having the circumferential solder joints 72 as well as pronounced conductor tracks to be discarded when evaluating the solder joints 72. According to Figure 10, the electronic component 3 is a BGA-device having solder balls as the solder joints 72 arranged matrix-like. In Figure 11, a chip capacitor is shown as an example of an SMD, like the device of Figure 5. In Figure 12, connector pins in THT are illustrated so that there are through holes 75 through the circuit board 2, and the solder joint 72 is on both sides of the circuit board 2; the image of Figure 12 is taken with a specific imaging angle, like 45°, relative to a main surface of the circuit board 2. Finally, in Figure 13 the electronic component 3 is a SOT device. Otherwise, the same as to Figures 1 to 6 may also apply to Figures 7 to 13, and vice versa.

[0129] In Figure 14 it is illustrated that the defects to be detected cannot only be voids 73 but can also be cracks 74 occurring, for example, between the electronic component 3 and the solder joint 72. Such cracks 74 can be identified, for example, using 3D X-ray in the second imaging stage 42.

[0130] The identified crack 74 can also be at a bottom side of the electronic component 3 facing the circuit board 2 or can be within the solder joint 72. Moreover,

[0131] Typically, the electronic components 3 as well as the circuit board 2 have metallizations, also referred to as solder pads, to be applied with the solder joints 72, not shown in Figure 14. By means of the method described herein, cracks between the solder pads and a base material of the respective electronic component 3 and the circuit board 2 can be detected, too, such cracks may arise from different coefficients of thermal expansion between the base material and the solder pads, for example. Further, cracks within the electronic components 3 and the circuit board 2 can be detected as well.

[0132] Otherwise, the same as to Figures 1 to 13 may also apply to Figure 14, and vice versa.

[0133] In Figure 15, an optional expansion of the method is shown. Thus, method step M14 may include at least one of the substeps M141, M142 or M142. In optional method step M141, model numbers of the electronic components 3 may be identified.

[0134] This may be done, for example, for determining that the electronic assembly 1 includes the desired electronic components 3 .

[0135] Method step M142 is or includes determining, by the evaluation unit 51 , a device pattern of the defects 73 , 74 in connections , for example , in the solder j oints 72 , between the electric components 3 and the respective circuit board 2 . Method step M143 is or includes outputting and / or storing, by the evaluation unit 51 , the determined pattern . Thus , a fingerprint of the electronic assembly 1 based on the defects 73 , 74 can be obtained .

[0136] Then, subsequentially, in method step M31 some time afterwards the respective electronic assembly is refed into the inspection system 10 . The inspection system 10 does not necessarily need to be the same as the inspection system 10 the previous method step M14 has been done with . For example , step M31 is done after the electronic assembly 1 has been delivered from a factory to a client , or has been used for some time and has become defective .

[0137] Then, step M32 includes or is reimaging, by the first imaging stage 41 and / or the second imaging stage 42 , the respective electronic assembly 1 so that a new pattern of the voids 73 is determined .

[0138] Afterwards , step M33 is or includes comparing, by the evaluation unit 51 , the device pattern of previous step M14 with the new patter of the voids as obtained in step M32 . Hence , it can be determined i f any changes or manipulations occurred on the electronic assembly in the meantime . I f step M14 and steps M31 , M32 , M33 are performed on di f ferent inspection systems 10 , data trans fer between the inspection systems 10 may be required, or method step M33 is done on further equipment, remote from the previously involved inspection systems 10.

[0139] Otherwise, the same as to Figures 1 to 14 may also apply to Figure 15, and vice versa.

[0140] In Figure 16 it is shown that method step M14 may include further sub-steps. For example, method step M144 comprises determining, by the evaluation unit 51, kinds of the electronic components 3 on the circuit boards 3. Thus, it may be determined, for example, based on the first component image 61, if the respective electronic component 3 is a QFN, DFN, QFP, BGA, THT or SMT device, or the like.

[0141] Method step M145 may then comprise comparing, by the evaluation unit 51, the determined kinds of the electronic components 3 with a target state. For example, the target state may be selected from a set of target states for the respective kind of electronic components 3. Using SMDs as an example, there may be at least one target state for the solder joints 72D, 72F at the edges of the device, see Figure 5, and also at least one target state for the solder joint 72E in the central portion. The target states may include, for example, a contour of the respective solder joint 72D, 72E, 72F, seen in cross-section, a footprint and the like.

[0142] Accordingly, in step M145 a parameter set as the target state can be selected which makes identifying defects in the respective solder joint easier and more efficient. Both the determining the kind of electronic component 3 and the comparing with the selected target state may done by a trained machine-learning algorithm. The comparing may be done either based on the first component image 61 or based on the second component image 62 .

[0143] Then, method step M146 is outputting and / or storing, by the evaluation unit 51 , a result of previous step M45 . Thus , based on the comparison, a pass / fail flag can be set , for example .

[0144] Otherwise , the same as to Figures 1 to 15 may also apply to Figure 16 , and vice versa .

[0145] The components shown in the figures follow, unless indicated otherwise , exemplarily in the speci fied sequence directly one on top of the other . Components which are not in contact in the figures are exemplarily spaced apart from one another . I f lines are drawn parallel to one another, the corresponding surfaces may be oriented in parallel with one another . Likewise , unless indicated otherwise , the positions of the drawn components relative to one another are correctly reproduced in the figures .

[0146] The invention described here is not restricted by the description on the basis of the exemplary embodiments . Rather, the invention encompasses any new feature and also any combination of features , which includes in particular any combination of features in the patent claims , even i f this feature or this combination itsel f is not explicitly speci fied in the patent claims or exemplary embodiments . List of Reference Signs

[0147] 1 electronic assembly

[0148] 2 circuit board

[0149] 3 electronic component

[0150] 41 first imaging stage

[0151] 42 second imaging stage

[0152] 43 X-ray stage

[0153] 44 ultrasound stage

[0154] 45 laser stage

[0155] 46 eddy current stage

[0156] 47 temperature detecting stage

[0157] 51 evaluation unit

[0158] 52 transport unit

[0159] 53 switching unit

[0160] 54 feeder

[0161] 55 positioning unit

[0162] 56 storage box

[0163] 61 first component image

[0164] 62 second component image

[0165] 71 zone of interest

[0166] 72 solder j oint

[0167] 73 void

[0168] 74 crack

[0169] 75 through hole

[0170] 76 misinterpreted defect

[0171] 10 inspection system

[0172] Al imaging angle

[0173] M method step

[0174] X X-rays

Claims

Patent Claims1. A method for testing electronic assemblies (1) each having a plurality of electronic components (3) applied on a circuit board (2) , the method comprising the following steps:A) feeding the electronic assemblies (1) in an inspection system (10) comprising a first imaging stage (41) and an evaluation unit (51) ,B) imaging, by the first imaging stage (41) , the electronic assemblies (1) so that first component images (61) of the electronic assemblies (1) are taken,C) identifying, by the evaluation unit (51) , at least some of the electronic components (3) of the respective electronic assembly (1) in the respective first component image (61) , andE) evaluating, by the evaluation unit (51) , a fastening of the identified electronic components (3) on the circuit board (2) of the respective electronic assembly (1) .

2. The method according to the preceding claim, wherein step C) includes:Cl) selecting, by the evaluation unit (51) , zones of interest (71) in the first component images (61) corresponding to particular areas of the respective electronic assembly (1) , wherein the method further comprises, after step C) and prior to step E) :D) imaging, by a second imaging stage (42) of the inspection system (10) , the zones of interest (71) so that second component images (62) of the zones of interest (71) are taken .

3. The method according to the preceding claim, wherein- the first imaging stage (41) is an optical photo stage or an X-ray stage and the first component images (61) are two- dimensional photos or three-dimensional photos,- the second imaging stage (41) includes an X-ray stage (43) and is of a different type than the first imaging stage (41) ,- the electronic components (3) are soldered onto the circuit boards (2) so that, per electronic component (3) , there is a plurality of solder joints (72) , and the zones of interest(71) include the solder joints (72) ,- step E) includes:El) evaluating, by the evaluation unit (51) , a quality of the solder joints (72) based on the second component images (62) considering detected voids (7) in the solder joints (72) , and E2) outputting, by the evaluation unit (51) , data on evaluation results off the solder joints (72) .

4. The method according to claim 2 or 3, wherein the second imaging stage (41) includes a two- dimensional, 2D, imaging stage.

5. The method according to any one of claims 2 to 4, wherein the second imaging stage (41) includes a three- dimensional, 3D, imaging stage, in particular a 3D X-ray stage .

6. The method according to any one of claims 2 to 5, wherein the second imaging stage (41) includes at least one of an imaging ultrasound stage (44) , a laser stage (45) or a eddy current stage (46) .

7. The method of claim 1, wherein step C) includes:C4) selecting, by the evaluation unit (51) , zones of interest(71) in the first component images (61) corresponding to particular areas of the respective electronic assembly (1) , wherein step E) comprises:E10) analyzing, by the evaluation unit (51) , the zones of interest (71) of the first component images (61) only to evaluate the fastening of the identified electronic components (3) on the circuit board (2) of the respective electronic assembly (1) .

8. The method according to any one of the preceding claims, wherein step E) includes:E3) determining, by the evaluation unit (51) , kinds of the electronic components (3) on the circuit boards (3) , E4) comparing, by the evaluation unit (51) , the determined kinds of the electronic components (3) with a target state, andE5) outputting, by the evaluation unit (51) , a result of step E4) .

9. The method according to any one of the preceding claims, wherein step E) includes:E6) determining, by the evaluation unit (51) , a device pattern of defects in connections between the electric components (3) and the respective circuit board (2) , and E7) outputting, by the evaluation unit (51) , the determined pattern .

10. The method according to claims 3 and the preceding claim, wherein the connections are the solder joints (72) and the device pattern includes a pattern of the voids (73) in the solder joints (72) , wherein the method further includes, after step E) :Fl) refeeding the respective electronic assembly (1) in theinspection system (10) ,F2 ) reimaging, by the first imaging stage (41) and / or the second imaging stage (42) , the respective electronic assembly (1) so that a new pattern of the voids (73) is determined, andF3) comparing, by the evaluation unit (51) , the device pattern of step E6) with the new patter of the voids (73) .

11. The method according to any one of the preceding claims, wherein step E) includes:E8) detecting, by the evaluation unit (51) , cracks (74) in connections between the electric components (3) and the respective circuit board (2) .

12. The method according to any one of the preceding claims, wherein at least some of the electronic components (3) are connected with the respective circuit board (2) by means of through-hole technology, THT, so that there are metalized through holes (75) through the respective circuit board (2) , wherein step E) includes:E9) checking, by the evaluation unit (51) , if the through holes (75) are correctly metalized.

13. The method according to claims 2 and the preceding claim, wherein step C) includes:C2) identifying, by the evaluation unit (51) , the through holes (75) ,C3) determining, by the evaluation unit (51) , an imaging angle (Al) relative to the respective circuit board (2) , and wherein step D) includes:DI) imaging, by the second imaging stage (42) , the through holes (75) using the imaging angle (Al) .

14. The method according to any one of the preceding claims, wherein the electronic components (3) of the respective electronic assembly (1) are attached to the respective circuit board (2) by means of at least two of the following kinds of connection: quad-flat no-leads, QFN, dual-flat noleads, DFN, quad flat package, QFP, ball grid array, BGA, through-hole technology, THT, small outline transistor, SOT, surface mount technology, SMT .

15. The method according to any one of the preceding claims, wherein the method further includes, prior to step A) :A0) training a machine-learning model for carrying out at least part of at least one of steps C) or E) .

16. An inspection system (10) comprising:- a transport unit (52) configured to feed electronic assemblies (1) having a plurality of electronic components (3) applied on a circuit board (2) in the inspection system (10) ,- a first imaging stage (41) configured to take first component images (61) of the electronic assemblies (1) ,- an evaluation unit (51) configured to identify at least some of the electronic components (3) of the respective electronic assembly (1) in the respective first component image (61) , and to evaluate a fastening of the identified electronic components (3) on the circuit board (2) of the respective electronic assembly (1) .

17. A computer program comprising instructions which, when the program is executed by an inspection system, cause the inspection system to carry out the method of any one of claims 1 to 15.18 . A computer-readable storage medium comprising instructions which, when executed by an inspection system, cause the inspection system to carry out the method of any one of claims 1 to 15 .

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