Digital input assembly

Abstract

The invention relates to a digital input assembly for an automation device, comprising: - an input terminal (E1, E2, E3) functioning as a digital input, - a ground connection (M), - a detection means (PE) having an input (1, 2, 3) for an input signal (I1, I2, I3) present at the input (1, 2, 3) and designed to detect a logic level of the signal present at the input (1, 2, 3) via the input terminal (E1, E2, E3), the detection means (PE) furthermore has a level output (P1, P2, P3) at which the detected logic level is output, wherein to avoid incorrectly detected logic levels between the input terminal (E1, E2, E3) and the ground connection (M) before the input (1, 2, 3) a first diode (D1, D2, D3) is connected in series with a first suppressor diode (D4) and also a first counter diode (D11, D22, D33) is connected in series with a second suppressor diode (D3), as a result of which a first protective path (S1) for a positive interference coupling-in and a second protective path (S2) for a negative interference coupling-in are realised, additionally a preresistor (R11, R12) for current limitation is arranged between the input terminal (E1, E2, E3) and the diodes.

Description

[0001] Description

[0002] Digital input module

[0003] The invention relates to a digital input module for an automation device comprising: an input terminal acting as a digital input, a ground connection, a detection means with an input for an input signal applied to the input, designed to detect a logic level of the signal applied to the input via the input terminal, furthermore the detection means has a level output at which the detected logic level is output.

[0004] Automation devices, in particular in an embodiment as modular automation devices, are generally known, e.g. in the form of the automation devices offered by the applicant under the trademark SIMATIC.

[0005] Digital input modules designed as individual modules are also known from these automation devices.

[0006] The invention relates specifically to a circuit arrangement with at least one input terminal acting as a digital input for a peripheral module.

[0007] Such a circuit arrangement or such a peripheral module is therefore a peripheral module with digital input functionality. Such modules are often designed with multiple digital inputs, e.g., 16 or 32, and are accordingly referred to as a digital input module. The digital input module is therefore a special type of peripheral module with exclusively digital input functionality.

[0008] EP 3 333 656 B1 describes such a digital input module. The disadvantage of the known digital input module is that it can no longer reliably detect a signal level, particularly in the case of burst interference.

[0009] DE 10 2010 030 656 A1 also discloses a digital input module for an automation device. This known module comprises a varistor, a suppressor diode, and an RC element for filtering to improve noise immunity. The object of the present invention is to provide a module that reliably detects logic levels even in the presence of external electrical interference.

[0010] The problem is solved by connecting a first diode in series with a first suppressor diode and a first counter diode in series with a second suppressor diode in order to avoid incorrectly detected logic levels between the input terminal and the ground connection in front of the input, whereby a first protection path for positive interference and a second protection path for negative interference is realized. In addition, a series resistor (R11.R12) for current limitation is arranged between the input terminal and the diodes.

[0011] For the purposes of the invention, interference coupling is understood to mean a "burst," for example. To test a certain level of immunity to interference, a burst test is carried out, for example. The test is carried out using recurring fast transients and pulse packets (bursts), which consist of a number of fast transient electrical disturbances that are coupled to the power supply, control and signal terminals, as well as the earthing or grounding terminals of electrical devices. Characteristic features of this test are the high amplitudes, short rise time, high repetition frequency, and low energy of the transients. The test is intended to demonstrate the immunity of electrical devices when they are exposed to certain types of transient disturbances, such as those resulting from brief switching operations, the interruption of inductive loads, or the bouncing of relay contacts.

[0012] The above-mentioned input circuit reduces the capacitance of a leakage path, which is usually located between the input terminal and the ground connection. Transient voltage protection elements, such as TVS diodes or suppressor diodes, often simulate parasitic capacitances due to their internal structure, and these can no longer be ignored, especially for very fast signals. Therefore, separate protection paths are provided for positive and negative interference.

[0013] In the sense of “fast digital inputs” it is desirable to keep the capacitance small, otherwise, in conjunction with a series resistor, the input signal will be delayed too much and then you will no longer have a fast input.

[0014] The diode and the additional counter diode connect a small capacitance in series with the large capacitance of the suppressor diode in each path. The resulting capacitance is thus smaller than the already small capacitance of the diode or counter diode. Even if this path is now duplicated, the resulting capacitance is still much smaller than if only a single, bidirectional suppressor diode were used. The protective effect is nevertheless maintained.

[0015] Additionally, a series resistor is installed to limit the current; this is necessary due to fire protection requirements. Suppose there is no series resistor and the suppressor diode is short-circuited. If a voltage of 24V is applied to the digital input, the current will flow through the diode to ground without current limiting. This implementation is not permitted due to fire protection requirements.

[0016] It is particularly advantageous if the series resistor is designed as a first resistor and a second resistor, each with 220 ohms.

[0017] According to the invention, the dimensioning of the resistance value of the first resistor and the second resistor is crucial. If the value is high (e.g., 1.5 kOhm), the logic level is faulty for approximately 6 ps when subjected to a burst. If the value is low (e.g., 440 ohms), the logic level is faulty for approximately 1 s when subjected to a burst. The interference voltage is loaded with a resistance of 440 ohms. This "low-resistance" load ensures that the interference energy is dissipated in a short time.

[0018] The logic level is thus only affected for a short time. Downstream digital filtering can then filter out the interference.

[0019] When splitting the resistors into two 220 ohm resistors, it is advantageous that the power of a 1 kV surge load is better distributed between the two resistors. In this case, it is advantageous to connect two 2010 resistors in series.

[0020] The digital input module is further improved if a filter is connected downstream of the detection means and the level output is connected to a filter input of the filter. The filter is designed to perform digital input filtering on the detected logic level using a delay element. A function for suppressing coupled interference is now available. An input delay can be set for a digital input. Interference pulses with a pulse time shorter than the set input delay (in ms or ps) are suppressed.

[0021] The filter means is advantageously designed so that it can be parameterized by an engineering system with regard to a delay time and thus the input delay can also be set remotely.

[0022] Advantageously, with a plurality of input terminals, each input terminal must have a diode and a counter diode, but a common first suppressor diode and a common second suppressor diode can be used for the series connection.

[0023] The drawing shows an embodiment of the invention.

[0024] The FIG shows a digital input module with a first input terminal E1, a second input terminal E2 and a third input terminal E3 and a ground connection M. The input terminals E1, E2, E3 are each followed by a first resistor R11, R21, R31 and a second resistor R12, R22, R32 as series resistors for current limiting.

[0025] A detection means PE with a first input 1, a second input 2 and a third first input 3 for applied input signals is designed to detect a logic level of the signal applied to the inputs 1, 2, 3 via the input terminals E1, E2, E3. Furthermore, the detection means PE each has a level output P1, P2, P3 at which the detected logic level is output.

[0026] Each input 1, 2, 3 is assigned a first diode D1, D2, D3 in series with a first suppressor diode D4, and a first counter diode D11, D22, D33 in series with a second suppressor diode D3. This creates a first protection path S1 for positive interference and a second protection path S2 for negative interference.

[0027] A filter means F is connected downstream of the detection means PE, and the level output P1, P2, P3 is accordingly connected to a filter input 11, 12, 13 of the filter means F. The filter means F is designed to perform digital input filtering on the detected logic level by means of a delay element V and to output the filtered signal as a filtered input signal G1, G2, G3.

[0028] The filter medium F can be parameterized by an engineering system with regard to a delay time Vz.

[0029] The delay element V works as follows: It has a counter. This counter ranges from 0 to 50. The counter is clocked at 10 ns. The input signal is thus filtered 50 * 10 ns = 500 ns.

[0030] If the logic level = 1, i.e. the level output P1, P2, P3 = 1, the counter is incremented by 1 every 10 ns until it reaches 50. If the counter = 50, it remains at 50. ...46...47...48...49...50...50...50...

[0031] If the logic level = 0:

[0032] Counter is decreased by 1 until it reaches 0.

[0033] If counter = 0, then it remains at 0.

[0034] ...4...3...2...1...0...0...0

[0035] Once the counter reaches 50, it sets the filtered input signal to 1 and remains at 50.

[0036] If a fault causes the logic level to erroneously go to 0, the counter starts counting down from 50.

[0037] E.g. up to 40. Once the disturbance of the logic level is over and it is back at 1, the counter counts up again from 40 to 50. During this disturbance for 10 cycles, the filtered input signal remains continuously at 1. The disturbance of the logic level is thus suppressed.

[0038] The filter time can be easily adjusted by setting the maximum value of the counter as desired.

[0039] For example, maximum value = 5000: Then 5000*10ns = 50us is the filter time. In summary, there are "slow" digital inputs with input delays of 50us to 20ms, which can be connected with unshielded cables. According to the invention, a "fast" digital input is also described, with an input delay of 1us to 20ms.

[0040] For input delays of 1us to 50us, the digital inputs must be connected with shielded cables. For input delays of >50us to 20ms, the digital inputs can be connected with unshielded cables. Wiring is more cost-effective and easier for the user if unshielded cables can be used.

[0041] According to the invention, the “fast” digital input can now also be used in the range below 50|JS without shielded wiring.

Claims

Patent claims:

1. Digital input module for an automation device comprising: - an input terminal acting as a digital input (E1, E2, E3), - a ground connection (M), - a detection means (PE) with an input (1, 2, 3) for an input signal (11, 12, 13) applied to the input (1, 2, 3), designed to detect a logic level of the signal applied to the input (1, 2, 3) via the input terminal (E1, E2, E3), furthermore the detection means (PE) has a level output (P1, P2, P3) at which the detected logic level is output, characterized in that in order to avoid incorrectly detected logic levels between the input terminal (E1, E2, E3) and the ground connection (M) in front of the input (1, 2, 3), on the one hand a first diode (D1, D2, D3) is connected in series with a first suppressor diode (D4) and on the other hand a first counter diode (D11, D22, D33) is connected in series with a second suppressor diode (D3), whereby a first protection path (S1) for positive interference and a second protection path (S2) for negative interference is implemented, in addition, between the input terminal (E1, E2,E3) and the diodes a series resistor (R11.R12) is arranged to limit the current.

2. Digital input module according to claim 1, wherein the series resistor is designed as a first resistor (R11) and a second resistor (R12), each having 220 ohms.

3. Digital input module according to claim 1, wherein a filter means (F) is connected downstream of the detection means (PE) and the level output (P1, P2, P3) is connected to a filter input (11, 12, 13) of the filter means (F), the filter means (F) is designed to carry out digital input filtering on the detected logic level by means of a delay element (V) and to provide the filtered signal as a filtered input signal (G1, G2, G3).

4. Digital input module according to claim 3, wherein the filter means (F) is designed such that it can be parameterized with respect to a delay time by an engineering system.

5. Digital input module according to one of claims 1 to 4, wherein in a plurality of input terminals (E1, E2, E3), Although each input terminal (E1,E2,E3) is assigned a diode (D1,D2,D3) and a counter diode (D11,D22,D33), only the first suppressor diode (D3) and second suppressor diode (D4) are present for the series connection.

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