Method for manufacturing semiconductor device

Abstract

The present disclosure relates to a method for manufacturing a semiconductor device comprising a workpiece, a lead provided on an upper surface of the workpiece, a support part including a first portion provided on the upper surface of the workpiece and a second portion extending upward from the first portion, and a semiconductor chip mounted on the first portion between the second portion and the lead. According to the method, one end of a wire is bonded to the semiconductor chip. After the bonding to the semiconductor chip, a reverse operation is performed in which the workpiece is inclined in a first direction so that the portion of the upper surface of the workpiece where the lead is provided is higher than the portion where the support portion is provided, and a bonding tool for supplying the wire is moved toward the second portion side relative to the semiconductor chip. After the reverse operation, the other end of the wire is bonded to the lead.

Description

Semiconductor device manufacturing method

[0001] The present disclosure relates to a method for manufacturing a semiconductor device.

[0002] Patent Document 1 discloses an optical module including a wire-bonded connection between a light-receiving element and leads on the main surface of a stem. This optical module includes a submount for mounting the light-receiving element at an angle relative to the main surface of the stem. The submount has a mounting surface that is angled with respect to the normal to the main surface of the stem and on which the light-receiving element is mounted, and a horizontal surface that is parallel to the main surface of the stem and connects to the mounting surface. A wiring pattern is formed from the mounting surface to the horizontal surface. The mounting surface portion of the wiring pattern is connected to the light-receiving element, and the horizontal surface portion of the wiring pattern is connected to the leads, respectively, by wire bonding.

[0003] Japanese Patent Application Laid-Open No. 2008-177258

[0004] For example, in an optical module such as that described in Patent Document 1, depending on the shape of the submount, there is a risk that the reverse allowance during wire bonding will be small. Also, if there is a large difference in height between a semiconductor chip such as a photodiode and the leads, there is a risk that the edge of the semiconductor chip and the wire will interfere with each other, which could result in contact or breakage of the wire.

[0005] An object of the present disclosure is to provide a method for manufacturing a semiconductor device that can improve the reliability of wire bonding.

[0006] A manufacturing method for a semiconductor device according to a first disclosure includes a semiconductor device including a workpiece, a lead provided on an upper surface of the workpiece, a support portion having a first portion provided on the upper surface of the workpiece and a second portion extending upward from the first portion, and a semiconductor chip mounted on the first portion between the second portion and the lead, wherein one end of a wire is bonded to the semiconductor chip, and after bonding to the semiconductor chip, the workpiece is tilted in a first direction so that the portion of the upper surface of the workpiece where the lead is provided is higher than the portion where the support portion is provided, and a reverse operation is performed in which a bonding tool that supplies the wire is moved toward the second portion relative to the semiconductor chip, and after the reverse operation, the other end of the wire is bonded to the lead.

[0007] The second disclosure relates to a method for manufacturing a semiconductor device comprising a semiconductor device including a workpiece, a lead provided on an upper surface of the workpiece, a support having a first portion provided on the upper surface of the workpiece and a second portion extending upward from the first portion, and a semiconductor chip mounted on the first portion between the second portion and the lead, wherein one end of a wire is bonded to the semiconductor chip, and after bonding to the semiconductor chip, the workpiece is tilted in a second direction so that the portion of the upper surface of the workpiece where the lead is provided is lower than the portion where the support portion is provided, and the other end of the wire is bonded to the lead.

[0008] In the semiconductor device manufacturing method according to the first disclosure, a workpiece is tilted in a first direction, and a reverse operation is performed in which a bonding tool that supplies a wire is moved toward a second portion of the semiconductor chip. This ensures a reversal margin. Therefore, the reliability of wire bonding can be improved. In the semiconductor device manufacturing method according to the second disclosure, the workpiece is tilted in a second direction, and the other end of the wire is bonded to the lead. This reduces interference between the edge of the semiconductor chip and the wire. Therefore, the reliability of wire bonding can be improved.

[0009] 1 is a side view of a semiconductor device and a bonding tool according to a first embodiment; FIG. 2 is a plan view of the semiconductor device according to the first embodiment; FIG. 3 is a side view of the semiconductor device according to the first embodiment; FIG. 4 is a side view of the semiconductor device according to the comparative example; FIG. 5 is a view explaining a method for manufacturing the semiconductor device according to the first embodiment; FIG. 6 is a view explaining a method for manufacturing the semiconductor device according to the first embodiment; FIG. 7 is a view explaining a method for manufacturing the semiconductor device according to the first embodiment; FIG. 8 is a flowchart showing a method for manufacturing the semiconductor device according to the first embodiment; FIG. 9 is a view showing a ball neck portion; FIG. 10 is a view showing a ball neck portion in which a crack has occurred; FIG. 11 is a view showing a ball neck portion in which a break has occurred; FIG. 12 is a view explaining a method for manufacturing the semiconductor device according to the comparative example; FIG. 13 is a view showing a state in which the wire has come out of the bonding tool; FIG. 14 is a view explaining a method for manufacturing the semiconductor device according to the first embodiment.

[0010] A method for manufacturing a semiconductor device according to the present embodiment will be described with reference to the drawings. The same or corresponding components are designated by the same reference numerals, and repeated description may be omitted.

[0011] First Embodiment. FIG. 1 is a side view of a semiconductor device 100 and a bonding tool 50 according to a first embodiment. FIG. 2 is a plan view of the semiconductor device 100 according to the first embodiment. FIG. 3 is a side view of the semiconductor device 100 according to the first embodiment. The semiconductor device 100 includes a workpiece 10, leads 12 provided on the upper surface of the workpiece 10, a temperature control module 14 provided on the upper surface of the workpiece 10, and a carrier 16 provided on the upper surface of the temperature control module 14. Hereinafter, the temperature control module 14 and the carrier 16 may be collectively referred to as a support portion 15. The workpiece 10 is also referred to as a stem. As shown in FIG. 3, a plurality of leads 12 penetrate the workpiece 10.

[0012] The carrier 16 has a base 17 provided on the upper surface of the temperature control module 14 and a wall 18 extending upward from the base 17. The temperature control module 14 and the base 17 correspond to a first portion provided on the upper surface of the workpiece 10. The wall 18 corresponds to a second portion extending upward from the first portion.

[0013] A semiconductor chip 20 is mounted on the pedestal 17. A bonding tool 50 connects the top surface of the semiconductor chip 20 to the leads 12 with wires 30. The semiconductor chip 20 is mounted on the pedestal 17 between the wall 18 and the leads 12 connected to the semiconductor chip 20 with wires 30, in a direction parallel to the top surface of the workpiece 10. The semiconductor chip 20 is, for example, a photodiode chip. As shown in FIG. 3 , a semiconductor laser 24 is mounted on the side surface of the wall 18 via a submount 22. The semiconductor chip 20 is configured to receive laser light emitted by the semiconductor laser 24. Note that the submount 22 and the semiconductor laser 24 are omitted from FIGS. 1 and 2 .

[0014] In FIG. 1 , A1 is the height difference between the top surface of the semiconductor chip 20 and the top surface of the lead 12. A2 is the loop height of the wire 30. A3 is the reversing margin during the reversing operation of the bonding tool 50. Here, the reversing operation is an operation in which the bonding tool 50 is moved in the direction opposite to the loop formation direction to temporarily swing the wire 30 in order to stabilize the loop shape of the wire 30. In other words, in the reversing operation, after bonding one end 31 of the wire 30 to the semiconductor chip 20, the bonding tool 50 supplying the wire 30 is moved toward the wall 18 relative to the semiconductor chip 20. After this reversing operation, the other end 32 of the wire 30 is bonded to the lead 12. The reversing margin A3 is the distance within which the reversing operation is possible. In other words, the reversing margin is the horizontal distance between the bonding tool 50 and the wall 18.

[0015] FIG. 4 is a side view of a semiconductor device 800 according to a comparative example. In the semiconductor device 800 according to the comparative example, the loop shape of the wire 830 differs from that of the present embodiment. Other structures are similar to those of the first embodiment. Conventionally, the loop height A2 of the wire is, for example, 0.13 mm or less. In this case, if the height difference A1 between the top surface of the semiconductor chip 20 and the top surface of the lead 12 is large, as shown in FIG. 4 , there is a risk of interference between the edge A4 of the semiconductor chip 20 and the wire 830. In particular, in the semiconductor device 800, the wall portion 18 limits the reverse margin A3 during looping. This may result in an unstable loop shape of the wire 830, making interference between the semiconductor chip 20 and the wire 830 more likely to occur. This may result in a deterioration in the characteristics of the semiconductor device 800.

[0016] Next, a method of wire bonding in the semiconductor device 100 of this embodiment will be described. Figures 5A to 5C are diagrams illustrating a method of manufacturing the semiconductor device 100 according to the first embodiment. Figure 6 is a flowchart showing the method of manufacturing the semiconductor device 100 according to the first embodiment. Here, it is assumed that the workpiece 10, leads 12, temperature control module 14, carrier 16, and semiconductor chip 20 are pre-assembled. First, as shown in Figure 5A, bumps 34 are formed on the leads 12 before bonding to the semiconductor chip 20 (step 1).

[0017] Next, the first bonding step is performed (step 2). In the first bonding step, one end 31 of the wire 30 is bonded to the semiconductor chip 20 by a bonding tool 50, as shown in FIG.

[0018] Next, as shown in FIG. 5B , the workpiece 10 is tilted in a first direction B1 (step 3). Specifically, after bonding to the semiconductor chip 20, the workpiece 10 is tilted in the first direction B1 so that the portion of the upper surface of the workpiece 10 on which the leads 12 are provided is higher than the portion on which the support portion 15 is provided. As shown in FIG. 3 , the semiconductor device 100 is mounted on a stage 52. The workpiece 10 can be tilted by tilting the stage 52. Next, with the workpiece 10 tilted in the first direction B1, a reverse operation is performed in which the bonding tool 50 that supplies the wire 30 is moved toward the wall portion 18 relative to the semiconductor chip 20, as shown in path C1 (step 4).

[0019] Next, as shown in FIG. 5C , the workpiece 10 is tilted in the second direction B2 (step 5). Specifically, after the reversing operation, the workpiece 10 is tilted in the second direction B2 so that the portion of the upper surface of the workpiece 10 on which the leads 12 are provided is lower than the portion on which the support portions 15 are provided. Next, a second bonding process is performed (step 6). In the second bonding, the other end 32 of the wire 30 is bonded to the lead 12 while the workpiece 10 is tilted in the second direction B2. At this time, the other end 32 of the wire 30 is bonded to the bump 34.

[0020] Next, the effects of this embodiment will be described. First, in this embodiment, the workpiece 10 is tilted in the first direction B1 and the reverse operation is performed. This ensures a reversal margin A3. In other words, a wide operating range of the bonding tool 50 can be ensured, enabling the bonding tool 50 to operate for good wire wiring. This stabilizes the loop shape of the wire 30 and improves the reliability of wire bonding.

[0021] 7A is a diagram showing a ball neck portion. FIG. 7B is a diagram showing a ball neck portion where a crack has occurred. FIG. 7C is a diagram showing a ball neck portion where a break has occurred. The ball neck portion is formed at one end 31 of the wire 30 on the semiconductor chip 20 side. If the reverse margin A3 is not sufficiently secured, there is a risk of a crack or break occurring in the ball neck portion, as shown in FIGS. 7B and 7C. In contrast, in this embodiment, the reverse margin A3 is secured, thereby reducing adverse effects on the ball neck portion. Therefore, the occurrence of wire breakage can be suppressed.

[0022] In this embodiment, the workpiece 10 is tilted in the second direction B2, and the other end 32 of the wire 30 is bonded to the lead 12. This makes it possible to suppress interference between the edge of the semiconductor chip 20 and the wire 30. This improves the reliability of wire bonding.

[0023] Furthermore, since the workpiece 10 is tilted in the second direction B2 and the other end 32 of the wire 30 is bonded to the lead 12, the second bonding position is deeper. This causes a force to act in the direction of lowering the loop top of the wire 30, achieving a low loop. Note that even if the loop height is reduced, as described above, in this embodiment, adverse effects on the ball neck portion can be suppressed, and quality can be maintained.

[0024] 8A is a diagram illustrating a semiconductor device manufacturing method according to a comparative example. For example, if the bonding tool 50 contacts the lead 12 at a sharp angle, as in region D1 in FIG. 8A, the wire 30 may break during bonding. In this case, the wire 30 may come off the bonding tool 50, making it impossible to perform the next wire bonding operation. FIG. 8B is a diagram illustrating the state in which the wire 30 has come off the bonding tool 50.

[0025] 9 is a diagram illustrating a manufacturing method of the semiconductor device 100 according to the first embodiment. In this embodiment, bumps 34 are formed on the leads 12 before bonding to the semiconductor chip 20. Then, in the second bonding, the other end 32 of the wire 30 is bonded to the bump 34. This allows the bump 34 to act as a cushion, thereby preventing wire breakage. Therefore, the second bonding can be performed with the workpiece 10 tilted.

[0026] Only one of step 3, tilting the workpiece 10 in the first direction, and step 5, tilting the workpiece in the second direction, may be employed. The reliability of wire bonding can be improved by only one of step 3 and step 5. Step 1 may also be omitted.

[0027] In step 4, the reverse operation may be performed with the workpiece 10 stopped and tilted in the first direction B1, or with the workpiece 10 moving so as to tilt in the first direction B1. Similarly, in step 6, the second bonding may be performed with the workpiece 10 stopped and tilted in the second direction B2, or with the workpiece 10 moving so as to tilt in the second direction B2.

[0028] In addition, in this embodiment, an example has been described in which the semiconductor device 100 is an optical semiconductor device equipped with the semiconductor laser 24. However, this embodiment is not limited to this and can be applied to any device in which the reverse margin is limited and there is a height difference A1 between the top surface of the semiconductor chip and the top surface of the lead.

[0029] The technical features described in each embodiment may be used in appropriate combination.

[0030] 10 Workpiece, 12 Lead, 14 Temperature control module, 15 Support, 16 Carrier, 17 Base, 18 Wall, 20 Semiconductor chip, 22 Submount, 24 Semiconductor laser, 30 Wire, 31 One end, 32 Other end, 34 Bump, 50 Bonding tool, 52 Stage, 100 Semiconductor device, 800 Semiconductor device, 830 Wire

Claims

1. A method for manufacturing a semiconductor device comprising: a workpiece; leads provided on an upper surface of the workpiece; a support having a first portion provided on the upper surface of the workpiece and a second portion extending upward from the first portion; and a semiconductor chip mounted on the first portion between the second portion and the leads, the method comprising: bonding one end of a wire to the semiconductor chip; after bonding to the semiconductor chip, tilting the workpiece in a first direction so that the portion of the upper surface of the workpiece where the leads are provided is higher than the portion of the support portion, and performing a reverse operation to move a bonding tool that supplies the wire toward the second portion relative to the semiconductor chip; and after the reverse operation, bonding the other end of the wire to the lead.

2. A method for manufacturing a semiconductor device as described in claim 1, characterized in that when bonding the other end of the wire to the lead, the work is tilted in a second direction so that the portion of the top surface of the work on which the lead is provided is lower than the portion on which the support portion is provided.

3. A method for manufacturing a semiconductor device according to claim 1 or 2, characterized in that a bump is formed on the lead before bonding to the semiconductor chip, and when bonding the other end of the wire to the lead, the other end of the wire is bonded to the bump.

4. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, characterized in that a semiconductor laser is mounted on the second portion, and the semiconductor chip is a photodiode chip.

5. A method for manufacturing a semiconductor device comprising: a workpiece; leads provided on an upper surface of the workpiece; a support having a first portion provided on the upper surface of the workpiece and a second portion extending upward from the first portion; and a semiconductor chip mounted on the first portion between the second portion and the leads, the method comprising: bonding one end of a wire to the semiconductor chip; and, after bonding to the semiconductor chip, tilting the workpiece in a second direction so that the portion of the upper surface of the workpiece where the leads are provided is lower than the portion where the support is provided, and bonding the other end of the wire to the leads.

6. A method for manufacturing a semiconductor device according to claim 5, characterized in that a bump is formed on the lead before bonding to the semiconductor chip, and when bonding the other end of the wire to the lead, the other end of the wire is bonded to the bump.

7. The method for manufacturing a semiconductor device according to claim 5 or 6, wherein a semiconductor laser is mounted on the second portion, and the semiconductor chip is a photodiode chip.

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