CPU scheduling method, device, chip, and storage medium

Abstract

Embodiments of the present application relate to the technical field of terminals, and provide a CPU scheduling method, a device, a chip, and a storage medium. In the solution of the present application, real power consumption values of frequency points obtained by means of actual measurement are configured in a device tree of an electronic device; when the electronic device enters an EAS energy-efficient CPU selection path, a power consumption value of an EM is corrected on the basis of the real power consumption values of the device tree; and then, on the basis of the corrected power consumption value, a most power-saving CPU is selected from among candidate CPUs into which a current task can be placed. Compared with power consumption values stored in an EM, the power consumption values stored in the device tree are more accurate, so that on the basis of the power consumption values stored in the device tree, scheduling a CPU having better performance and lower power consumption can be achieved by means of EAS energy-efficient CPU selection, thereby obtaining benefits in both performance and power consumption.

Description

CPU scheduling methods, devices, chips, and storage media Technical Field

[0001] This application relates to the field of terminal technology, and in particular to a CPU scheduling method, device, chip, and storage medium. Background Technology

[0002] With the rapid development of embedded technology, the number of processors integrated in system-on-chip (SOC) is increasing, and the frequency of processors is also getting higher, making the functions of SOC more and more powerful.

[0003] Currently, most mobile phone SoCs utilize multi-core processors. Taking the popular architecture of 1 large core + 3 medium cores + 4 small cores as an example, the large core supports a higher maximum computing power than the medium cores, and the medium cores support a higher maximum computing power than the small cores. In application scenarios such as video playback, shopping, navigation, music playback, e-book reading, and gaming, the tasks performed by the processor differ, resulting in varying computing power requirements and power consumption. Therefore, selecting the processor with the lowest power consumption while ensuring normal task execution is a crucial issue that needs to be addressed.

[0004] Summary of the Invention

[0005] This application provides a CPU scheduling method, device, chip, and storage medium to solve the technical problem of selecting the processor with the lowest power consumption from a multi-core processor.

[0006] To achieve the above objectives, this application adopts the following technical solution:

[0007] In a first aspect, embodiments of this application provide a CPU scheduling method. This method can be applied to an electronic device. The method may include: the electronic device creating a first task in response to a user's operation on a first application; if the first task conforms to a first preset scenario, the electronic device corrects a power consumption value stored in an energy model EM based on a power consumption value configured in a device tree; the electronic device selects a first CPU from multiple CPUs according to the corrected power consumption value; and the electronic device schedules the first CPU to execute the first task.

[0008] In the above scheme, the actual power consumption values ​​at each frequency point, obtained through actual measurement, are configured in the device tree of the electronic device. When the electronic device enters the EAS energy efficiency core selection path, the fixed power consumption value stored in EM can be corrected based on the actual power consumption value configured in the device tree. Compared with the uncorrected power consumption value in EM, the power consumption value stored in the device tree is more accurate. Therefore, correcting the power consumption value in EM based on the power consumption value stored in the device tree allows EAS energy efficiency core selection to schedule CPUs with better performance and lower power consumption, truly achieving a dual benefit of performance and power consumption.

[0009] In one possible implementation, the first application mentioned above is any application program of an electronic device. The user can touch the icon or interface of any of these applications to trigger the first application to execute a task corresponding to that application. In this application, a task is a logical concept, referring to an activity performed by software, or a series of operations to achieve a certain purpose. A task is a single execution of a program. A task can contain one or more subtasks that perform independent functions; these subtasks are processes or threads. The execution of a single task can activate multiple processes. A process can have multiple threads, each thread sharing the resources owned by a process. The first task mentioned above is a task corresponding to the first application created in response to the user's operation on the first application. When the user operates on different applications, tasks corresponding to each application will be created. It can be understood that when the processor executes different tasks, the computational power requirements of each task are different, resulting in different processor power consumption.

[0010] In one possible implementation, when an electronic device creates a first task in response to a user's operation on a first application, the device can perform scene recognition on the first task to determine which preset scene the task conforms to. If a task conforms to the first preset scene, then EAS energy efficiency core selection is enabled. The first preset scene is the scenario of launching an application of a first preset type. Applications of the first preset type can be shopping apps, short video apps, social apps, e-book apps, etc., which are frequently operated by the user within a preset time (e.g., the number of operations is greater than or equal to a preset number). Typically, the electronic device can pre-add an identifier to each application. If the identifier of an application conforms to the first preset type, the electronic device can determine that the first task conforms to the first preset scene and enable EAS energy efficiency core selection. If a task does not conform to the first preset scene, EAS energy efficiency core selection is not enabled, and other core selection strategies are enabled, such as fast path core selection, slow path core selection, boosts parameter path core selection, or previous path core selection.

[0011] In one possible implementation, the device tree and the EM are two functional modules in the kernel layer of the electronic device.

[0012] The EM stores the power consumption values ​​of multiple CPUs at multiple frequency points. The power consumption value of each CPU in the EM is calculated using the following formula: P = C * V 2 *f. Where C represents the capacitor of a CPU, V and f are the voltage and frequency of a CPU at a performance operating node, respectively, and P represents the power consumption of a CPU at a performance operating node.

[0013] The device tree pre-configures the actual power consumption values ​​of each CPU at multiple frequency points. Specifically, the power consumption values ​​configured in the device tree are the power consumption values ​​of multiple CPUs at multiple frequency points obtained through frequency locking tests using benchmark tools used by the electronic device under different application launch scenarios. The frequency point of each CPU in the device tree can be determined according to the performance operation node of each CPU, so that the frequency points configured in the device tree correspond one-to-one with the frequency points stored in the EM. For example, the benchmark tools can be Drystone, Benchmark, Coremark, etc.

[0014] It is understandable that in certain application scenarios, the fixed power consumption value at a certain operating frequency calculated using the above formula may not be equal to the actual power consumption value at that operating frequency. If the EM calculates the power consumption value according to the above formula to estimate the energy consumption caused by migrating threads to the CPU, it will lead to inaccurate core selection and frequency tuning by the EAS through the EM. However, since the power consumption values ​​configured in the device tree are obtained through frequency locking tests of electronic devices, these power consumption values ​​can be called actual power consumption values. Using actual power consumption values ​​to estimate the energy consumption caused by migrating threads to the CPU will yield more accurate results for EM core selection and frequency tuning.

[0015] In one possible implementation, the electronic device modifies the power consumption values ​​stored in the EM based on the power consumption values ​​configured in the device tree. This includes: the electronic device passing the power consumption values ​​corresponding to all frequencies in the device tree to the EM; for example, the electronic device can call the function em_create_perf_table_DT() to obtain the configuration table from the device tree, and then call the function em_compute_costs() to pass the power consumption values ​​of each power level read from the configuration table to the EM; the electronic device then iterates through the EM to modify the power consumption corresponding to each frequency. Here, there is a one-to-one correspondence between each frequency point configured in the device tree and each frequency point stored in the EM.

[0016] For example, for each frequency, the electronic device performs the following operations: comparing a first power consumption value and a second power consumption value, wherein the first power consumption value is the power consumption value corresponding to a frequency stored in the EM, and the second power consumption value is the power consumption value corresponding to a frequency obtained from the device tree; if the first power consumption value and the second power consumption value are not equal, then the second power consumption value is used as the corrected power consumption value corresponding to a frequency; if the first power consumption value and the second power consumption value are equal, then either the first power consumption value or the second power consumption value is used as the corrected power consumption value corresponding to a frequency.

[0017] It's understandable that, to correct the power consumption values ​​corresponding to the frequency levels of each performance domain in the EM, the frequency level settings for each performance domain in the device tree are consistent with those in the EM; that is, there's a one-to-one correspondence between the frequencies of each CPU in the device tree and those in the EM. The difference lies in the calculation method: in the EM, the power consumption values ​​corresponding to the frequency levels of each performance domain are calculated using the aforementioned formula, while in the device tree, they are obtained through frequency locking tests. Because the methods for obtaining power consumption values ​​differ between the EM and the device tree, the power consumption values ​​for the same CPU at the same frequency level may be equal or unequal. If they are unequal, power consumption correction is necessary.

[0018] In one possible implementation, multiple CPUs are divided into multiple performance domains according to their processing power, and the CPUs in each performance domain share a set of corrected power consumption values. The electronic device selects a first CPU from the multiple CPUs based on the corrected power consumption values, including:

[0019] For each performance domain, the electronic device performs the following operations: It estimates the computing power of the CPU when executing the first task, multiplies this computing power by a first coefficient to obtain the minimum computing power value for a CPU in that performance domain; it determines the minimum operating frequency that meets the minimum computing power value based on the corrected power consumption value; it determines the energy consumption of a performance domain based on the sum of the utilization rates of all CPUs in that performance domain, the computing power of candidate CPUs, and the energy efficiency coefficient of the minimum operating frequency; and based on the energy consumption of each performance domain, the electronic device determines the first CPU as the CPU to execute the first task. Specifically, the energy consumption of the performance domain where the first CPU executes the first task is less than the energy consumption of the performance domain where other CPUs execute the first task.

[0020] For example, determining the minimum operating frequency that satisfies the minimum computing power value based on the corrected power consumption value may include: determining M frequency points greater than or equal to the minimum operating frequency in a computing power information table of a performance domain; using a first frequency point as the minimum operating frequency that satisfies the minimum computing power value, wherein the energy efficiency coefficient of the first frequency point is less than the energy efficiency coefficients of the other frequency points among the M frequency points. Before using the first frequency point as the minimum operating frequency that satisfies the minimum computing power value, the method further includes: sequentially comparing the energy efficiency coefficients corresponding to two adjacent power consumption values ​​in descending order of the power consumption values ​​corresponding to the M frequency points; using frequency points whose energy efficiency coefficients do not decrease sequentially as inflection points and removing them from the M frequency points, wherein the first frequency point is the frequency point selected from the other frequency points after removing the inflection points from the M frequency points.

[0021] In the above scheme, the energy efficiency of the inflection point is relatively poor because the power consumption value of certain frequency points is corrected. By deleting the frequency points corresponding to the inflection points, the frequency points finally selected by the electronic device can be more accurate, thereby making the calculated energy consumption of the performance domain more accurate, and thus enabling EAS to schedule the CPU with better performance and lower power consumption.

[0022] In one possible implementation, the energy efficiency coefficient at a frequency point is calculated using the following formula:

[0023] Where max_freq represents the highest frequency point of a performance domain, freq(i) represents a frequency point of a performance domain, power(i) represents the corrected power consumption value corresponding to a frequency point, and cost represents the energy efficiency coefficient of a frequency point.

[0024] In one possible implementation, an energy curve is stored in the device tree. The energy curve represents a mapping relationship between a set of frequency points, power consumption values, and capability values. The energy curve is obtained by frequency locking testing of the electronic device at a first temperature. The electronic device corrects the power consumption values ​​stored in the EM based on the power consumption values ​​configured in the device tree, including: the electronic device determining the current ambient temperature as a second temperature; the electronic device obtaining a first offset from the device tree, the first offset being the offset of the energy curve when adjusting from the first temperature to the second temperature; the electronic device offsetting the energy curve obtained from the device tree based on the first offset; and the electronic device correcting each power consumption value stored in the EM based on the offset energy curve.

[0025] For example, N energy curves are stored in the device tree. These N energy curves are obtained through CPU frequency locking tests on N performance domains at a first temperature. At a second temperature, for each of the N performance domains, the following operations are performed: obtaining a first offset corresponding to a first performance domain from the device tree, where the first performance domain is any one of the N performance domains; offsetting the first energy curve corresponding to the first performance domain obtained from the device tree based on the first offset; and correcting the power consumption values ​​corresponding to the first performance domain stored in the EM based on the offset first energy curve.

[0026] Experimental data verifies that the CPU's energy efficiency curve shifts when the ambient temperature changes. For example, the energy efficiency curve of small cores shifts upwards with increasing temperature; the energy efficiency curves of medium and large cores have a high degree of overlap, with smaller shifts and largely consistent inflection points. Analysis of the test data shows that at different temperatures, the energy efficiency curves either drift upwards or remain essentially unchanged, while the trend (such as inflection points) remains constant, and the energy efficiency ratio at each frequency increases proportionally or remains essentially constant. In this scheme, the energy curve of each performance domain is shifted based on temperature, thus making the energy consumption values ​​of the performance domain calculated based on power consumption values ​​more accurate, which helps improve the accuracy of core selection results.

[0027] Secondly, this application provides an apparatus comprising units for performing the method described in the first aspect above. This apparatus can correspond to performing the CPU scheduling method described in the first aspect above. For a detailed description of the units within this apparatus, please refer to the description in the first aspect above; for brevity, it will not be repeated here.

[0028] Thirdly, this application provides an electronic device including a memory and one or more processors. The memory stores computer program code, which includes computer instructions. When the computer instructions are invoked by the processor, the electronic device executes the CPU scheduling method provided in any of the first aspects.

[0029] Fourthly, this application provides a computer-readable storage medium. The computer-readable storage medium includes computer instructions. When executed on an electronic device, the computer instructions cause the electronic device to perform a CPU scheduling method as provided in the first aspect and any possible implementation thereof.

[0030] Fifthly, this application provides a computer program product. When the computer program product is run on a computer, it causes the computer to execute the CPU scheduling method provided by the first aspect and any possible implementation thereof.

[0031] Sixthly, this application provides a chip. This chip is coupled to a memory and is used to read and execute a computer program stored in the memory to implement the CPU scheduling method provided in the first aspect and any possible implementation thereof.

[0032] It is understood that the beneficial effects achieved by the apparatus of the second aspect, the electronic device of the third aspect, the computer-readable storage medium of the fourth aspect, the computer program product of the fifth aspect, and the chip system of the sixth aspect provided above can be referred to as the beneficial effects of the first aspect and any possible implementation thereof, which will not be repeated here. Attached Figure Description

[0033] Figure 1 is a schematic diagram of the load distribution of small, medium, and large kernel clusters provided in the embodiments of this application;

[0034] Figure 2 is a schematic diagram of the computing power and frequency of small cores, medium cores and large cores provided in the embodiments of this application;

[0035] Figure 3 is a schematic diagram of the CPU and EM provided in an embodiment of this application;

[0036] Figure 4 is a schematic diagram of the energy efficiency curves of three cores in a certain SOC under ideal conditions, provided by an embodiment of this application.

[0037] Figure 5 is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of this application;

[0038] Figure 6 is a schematic diagram of the hardware structure of another electronic device provided in an embodiment of this application;

[0039] Figure 7 is a schematic diagram of the hardware structure of another electronic device provided in an embodiment of this application;

[0040] Figure 8 is a schematic diagram of the hardware structure of another electronic device provided in an embodiment of this application;

[0041] Figure 9 is a software architecture diagram of an electronic device provided in an embodiment of this application;

[0042] Figure 10 is a flowchart illustrating a CPU scheduling method provided in an embodiment of this application;

[0043] Figure 11 is a schematic diagram of the energy efficiency curves of three cores in a certain SOC under real conditions, provided by an embodiment of this application.

[0044] Figure 12 is a schematic diagram comparing the frequency and power consumption stored in the EM and device tree according to an embodiment of this application;

[0045] Figure 13 is a schematic diagram of CPU scheduling in an electronic device in a shopping scenario provided by an embodiment of this application;

[0046] Figure 14 is a schematic diagram of a specific process for EAS energy efficiency selection according to an embodiment of this application;

[0047] Figure 15 is a schematic diagram of finding the lowest performance state based on the energy efficiency curve of a certain performance domain, provided in an embodiment of this application.

[0048] Figure 16 shows the measured energy efficiency curves of CPU0 provided in the embodiment of this application at temperatures of 30°C and 50°C;

[0049] Figure 17 shows the measured energy efficiency curves of the CPU2 provided in the embodiment of this application at temperatures of 30°C and 50°C;

[0050] Figure 18 shows the measured energy efficiency curves of the CPU7 provided in the embodiment of this application at temperatures of 30°C and 50°C. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of this application, but not all embodiments.

[0052] In the description of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. In the description of this application, "and / or" is merely a way of describing the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone.

[0053] In the specification and claims of this application, the terms "first" and "second," etc., are used to distinguish different objects or to distinguish different treatments of the same object, rather than to describe a specific order of the objects. For example, "first operation" and "second operation," etc., are used to distinguish different operations, rather than to describe a specific order of operations. In the embodiments of this application, "multiple" refers to two or more.

[0054] References to "some embodiments" and the like in this specification mean that one or more embodiments of this application include the specific features, structures, or characteristics described in connection with that embodiment. Therefore, phrases such as "in some embodiments," "in other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiments, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0055] To facilitate understanding of the embodiments of this application, some terms used in the embodiments of this application will be explained below.

[0056] 1. Multi-core processor.

[0057] Multiple central processing units (CPUs) integrated on a single system-on-a-chip (SoC) can be called a multi-core processor. A multi-core processor is the computational and control center of an electronic device, primarily used for information processing and program execution.

[0058] In general, multi-core processors can include various types of cores, each with different processing capabilities. In this embodiment, cores are divided into multiple clusters based on their processing power, with each cluster comprising one or more CPUs of equal processing power. For example, a multi-core processor can be divided into super-large core clusters, large core clusters, medium core clusters, and small core clusters. CPUs in a super-large core cluster are also called super-large cores, and these have the strongest processing power; CPUs in a large core cluster are also called large cores, and their processing power is slightly less than that of super-large cores; CPUs in a small core cluster are also called small cores, and their processing power is the weakest; CPUs in a medium core cluster are also called medium cores, and their processing power falls between that of large and small cores.

[0059] Taking a System-on-a-Chip (SoC) comprising small, medium, and large core clusters as an example, Figure 1 illustrates the load distribution among these clusters. As shown in Figure 1, in the small core cluster, CPUs 0, 1, 2, and 3 have the same maximum computing power; in the medium core cluster, CPUs 4, 5, and 6 have the same maximum computing power, with the maximum computing power of the CPUs in the medium core cluster being higher than that of the CPUs in the small core cluster; the large core cluster has only one CPU, 7, whose maximum computing power is higher than that of the CPUs in the medium core cluster. Furthermore, the load on each CPU also varies.

[0060] 2. Computing capacity value.

[0061] Computing power is a fundamental concept in CPU scheduling, used to reflect the processing capabilities of a CPU. The computing power value is a standardized value. Electronic devices can obtain the maximum computing power of each CPU by reading the file node ` / sys / devices / system / cpu / cpu* / cpu_capacity`. `cpu_capacity`, as a quantification of computing power, represents the processor's performance. The higher the `cpu_capacity` value, the higher the processor's performance. Generally, the `cpu_capacity` of a super-large core is greater than that of a large core, the `cpu_capacity` of a large core is greater than that of a medium core, and the `cpu_capacity` of a medium core is greater than that of a small core.

[0062] As an example, the maximum computing power of a CPU is equal to: capacity_dmips_mhz * cpuinfo_max_freq / 1000. Here, capacity_dmips_mhz represents the number of dhrystone million instructions executed per second (DMIPS) that the CPU can execute at a frequency of 1 MHz. capacity_dmips_mhz can be obtained from the processor's device tree file. cpuinfo_max_freq represents the maximum frequency supported by the CPU, in kHz. Dividing the above formula by 1000 converts the calculation unit from kHz to MHz.

[0063] To facilitate comparison and calculation of computing power, the maximum computing power of the most powerful CPU in the processor is standardized to 1024. Taking the popular eight-core processor as an example, an eight-core processor can include one large core, three medium cores, and four small cores. The computing power of one large core is 1024, the computing power of each of the three medium cores is 332, and the computing power of each of the four small cores is 277.

[0064] For example, Figure 2 is a schematic diagram of the computing power and frequency of small cores, medium cores, and large cores provided in an embodiment of this application. As shown in Figure 2, the frequency and computing power of small cores, large cores, and super-large cores all exhibit a linear relationship. The small core can be CPU0, CPU1, CPU2, or CPU3 as shown in Figure 1; the medium core can be CPU4, CPU5, or CPU6 as shown in Figure 1; and the large core can be CPU7 as shown in Figure 1. As the CPU frequency increases, the CPU's computing power also increases. Furthermore, at the same frequency, the computing power of a super-large core is greater than that of a large core, and the computing power of a large core is greater than that of a small core. In processors where computing power and frequency exhibit a linear relationship, the CPU's computing power at a certain frequency point is equal to: the CPU's frequency at that frequency point divided by the CPU's maximum frequency, and then multiplied by the CPU's maximum computing power.

[0065] 3. Power consumption value.

[0066] The power value of a CPU at a specific frequency is also called its power consumption at that frequency. The power consumption value corresponding to each frequency can be read using the CPU's energy model (EM). For example, an electronic device can obtain the power consumption values ​​of various frequencies within a small core cluster by reading the file node / sys / kernel / debug / energy_model / pd0 / * / power, such as 47mW, 52mW, 59mW, 67mW, 79mW, 92mW, 105mW, 122mW, 139mW, 153mW, 10mW, 15mW, 19mW, 26mW, 31mW, and 39mW.

[0067] For example, the power consumption value read from the EM is calculated using the following relationship (1): P = C * V 2 *f (1).

[0068] Here, C represents the CPU's capacitor, which can be obtained from the CPU's device tree file under the "dynamic-power-coefficient" field. V and f represent the voltage and frequency of an operating performance point (OPP), respectively. An OPP represents a voltage / frequency tuple supported by the CPU. Each operating frequency of the CPU corresponds to a voltage. Frequency and voltage are positively correlated; the higher the frequency, the higher the voltage. The relationship between voltage and frequency is defined by the hardware manufacturer in the device tree at the factory.

[0069] Each cluster corresponds to a performance domain. CPUs with the same microarchitecture belong to the same performance domain. All CPUs within a performance domain are frequency-adjusted together to maintain the same frequency. The frequency used by the CPU is tiered, and each level of frequency has a one-to-one mapping relationship with computing power and power consumption values. For example, if the highest frequency of the CPU in a small core cluster is 1GHz, and the corresponding maximum computing power is 512, then the computing power corresponding to a frequency of 500MHz is 256.

[0070] For example, Figure 3 is a schematic diagram of the CPU and EM provided in an embodiment of this application. As shown in Figure 3, CPU0, CPU1, CPU2, and CPU3 belong to the small core cluster, CPU4, CPU5, and CPU6 belong to the medium core cluster, and CPU7 belongs to the large core cluster. Each CPU corresponds to a runqueue, which is used to manage the threads running on that CPU. CPUs in the same cluster have the same performance and share the same performance domain struct perf_domain. The member struct em_perf_domain*em_pd of struct perf_domain stores the power consumption corresponding to each frequency point. For example, in the small core cluster performance domain, frequency a1 corresponds to power consumption value A1, frequency a2 corresponds to power consumption value A2, frequency a3 corresponds to power consumption value A3, and so on; in the medium core cluster performance domain, frequency b1 corresponds to power consumption value B1, frequency b2 corresponds to power consumption value B2, frequency b3 corresponds to power consumption value B3, and so on; in the large core cluster performance domain, frequency c1 corresponds to power consumption value C1, frequency c2 corresponds to power consumption value C2, frequency c3 corresponds to power consumption value C3, and so on. It is understandable that CPUs in different performance domains have different performance, and therefore the storage frequency and power consumption in the corresponding performance domains will also be different.

[0071] 4. Energy efficiency ratio.

[0072] Energy efficiency ratio (EER) can be expressed as the ratio of a CPU's computing power to its power consumption at a given frequency. The higher the ratio, the better the CPU's energy efficiency at that frequency.

[0073] For example, taking a processor comprising small cores, large cores, and super-large cores as an example, Figure 4 is a schematic diagram of the energy efficiency curves (also called energy efficiency ratio curves) of the three types of cores in a certain SOC under ideal conditions, provided by an embodiment of this application. As shown in Figure 4, the energy efficiency curve of the small core is shown as curve 1, the energy efficiency curve of the large core is shown as curve 2, and the energy efficiency curve of the super-large core is shown as curve 3. The energy efficiency ratio of the small core is better than that of the large core, and the energy efficiency ratio of the large core is better than that of the super-large core; the energy efficiency ratio of the large core at low frequency is better than that of the small core at high frequency; and the energy efficiency ratio of the super-large core at low frequency is better than that of the large core at high frequency. For example, at a computing power of 5000 util, the small core consumes more power than the large core. Therefore, when the system load is not heavy, threads can be run at low frequency on the large core instead of at high frequency on the small core.

[0074] 5. Energy-aware scheduling (EAS).

[0075] EAS is a scheduling mechanism in Android's scheduler that allows the scheduler to predict and decide on the impact on CPU power consumption. EAS can select the most energy-efficient CPU for each thread and minimize the impact on system performance.

[0076] Under normal circumstances, EAS primarily selects CPUs based on EM. In this process, EM estimates the energy consumption caused by migrating a thread to a certain CPU based on pre-stored power consumption values. Referring to the description of the above embodiment, the power consumption value corresponding to an operating frequency point in EM is a fixed value calculated using the above relationship (1).

[0077] However, the tasks performed by the processor differ in application scenarios such as video, shopping, navigation, music, e-books, and games, resulting in varying computational power requirements and power consumption. In some application scenarios, the actual power consumption of the CPU at a certain operating frequency may not be equal to the power consumption calculated using the above formula (1). If the power consumption calculated using the above formula (1) is used to estimate the energy consumption caused by migrating threads to the CPU, it will lead to inaccurate core selection and frequency adjustment by EAS through EM, resulting in power consumption degradation.

[0078] In view of the above problems, this application provides a CPU scheduling method. The actual power consumption values ​​of each frequency point obtained through actual measurement are configured in the device tree of the electronic device. When the electronic device enters the EAS energy efficiency core selection path, the power consumption value of the EM is corrected based on the actual power consumption value of the device tree. Then, based on the corrected power consumption value, the most power-efficient CPU is selected from the candidate CPUs that can accommodate the current task. Compared with the power consumption value calculated by the above formula (1), the power consumption value stored in the device tree is more accurate. Therefore, based on the power consumption value stored in the device tree, the EAS energy efficiency core selection can schedule a CPU with better performance and lower power consumption, achieving a double benefit of performance and power consumption.

[0079] In some embodiments, the aforementioned electronic device is also referred to as a terminal or user equipment (UE). For example, the electronic device may be a personal computer (PC), mobile phone, smart screen, smart TV, tablet computer, wearable device, computer with wireless transceiver capability, virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, or wireless terminal in smart home, etc., or may be other devices or apparatuses.

[0080] The specific implementation of the CPU scheduling method provided in this application will be described in detail below with reference to Figures 5 to 18.

[0081] For example, Figures 5 to 8 show schematic diagrams of the hardware structures of the four electronic devices provided in this application.

[0082] As shown in Figures 5 to 8, an electronic device may include a System-on-a-Chip (SoC), a bus, a memory, a communication interface, a power module, and a display screen.

[0083] In a System-on-a-Chip (SoC), cores are divided into multiple clusters based on their processing power. Each cluster includes one or more CPUs with the same processing power. For example, as shown in Figure 5, an SoC is divided into small core clusters, medium core clusters, and large core clusters. Small core clusters include CPU0, CPU1, CPU2, and CPU3; medium core clusters include CPU4, CPU5, and CPU6; and large core clusters include CPU7. The maximum CPU frequency for small core clusters can be 1.8 GHz, for medium core clusters it can be 2.5 GHz, and for large core clusters it can be 3.0 GHz. As another example, as shown in Figure 6, an SoC is divided into small core clusters, medium core clusters, large core clusters, and super-large core clusters. Small core clusters include CPU0, CPU1, and CPU2; medium core clusters include CPU3 and CPU4; large core clusters include CPU5 and CPU6; and super-large core clusters include CPU7. The maximum CPU frequency for small core clusters can be 2.0 GHz, for medium and large core clusters it can be 2.5 GHz, and for super-large core clusters it can be 3.2 GHz. For example, as shown in Figure 7, a System-on-a-Chip (SoC) is divided into small core clusters, large core clusters, and super-large core clusters. Small core clusters include CPU0 and CPU1, large core clusters include CPU2, CPU3, CPU4, CPU5, and CPU6, and super-large core clusters include CPU7. The maximum CPU frequency for small core clusters can be 2.27 GHz, for large core clusters it can be 3.15 GHz, and for super-large core clusters it can be 3.3 GHz. As shown in Figure 8, a System-on-a-Chip (SoC) is also divided into small core clusters, medium core clusters, large core clusters, and super-large core clusters. Small core clusters include CPU0 and CPU1, medium core clusters include CPU2 and CPU3, large core clusters include CPU4, CPU5, and CPU6, and super-large core clusters include CPU7. The maximum CPU frequency for small core clusters is 2.27 GHz, for medium core clusters it is 2.96 GHz, for large core clusters it is 3.15 GHz, and for super-large core clusters it is 3.3 GHz. It should be noted that the cluster division method and the maximum CPU frequency in each cluster in Figures 5 to 8 are merely illustrative examples and do not constitute a limitation on this application.

[0084] In a System-on-a-Chip (SoC), each CPU has its own L1 cache (Level 1 cache), all CPUs in a cluster share an L2 cache (Level 2 cache), and all CPUs in a SoC share an L3 cache (Level 3 cache). As an example, the L1, L2, and L3 caches can be high-speed caches used to temporarily store data and / or instruction information.

[0085] In some embodiments, the SOC may also integrate a graphics processing unit (GPU), a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a programmable logic device (PLD), peripheral circuits, and / or interface control modules. This application does not impose specific limitations based on actual usage requirements.

[0086] A bus may include pathways for transmitting information between components included in an electronic device.

[0087] The memory may be read-only memory (ROM) or other types of static storage devices that can store static information and / or instructions; it may also be random access memory (RAM) or other types of dynamic storage devices that can store information and / or instructions; it may also be electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices; or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.

[0088] The memory can exist independently of the SOC, meaning it can be external to the SOC. In this case, the memory can be connected to the SOC via a bus and used to store instructions or program code. When the SOC calls and executes the instructions or program code stored in the memory, it can implement the CPU scheduling method provided in the following embodiments of this application.

[0089] Communication interfaces are used for electronic devices to communicate with other devices or communication networks (such as Ethernet, radio access networks (RAN), wireless local area networks (WLAN), etc.). A communication interface can be a module, circuit, transceiver, or any device capable of enabling communication. For example, a communication interface can be an external memory interface, a universal serial bus (USB) interface, etc.

[0090] The power module may include a charging management module, a power management module, and a battery. In some wired charging embodiments, the charging management module receives charging input from a wired charger via a USB interface. In some wireless charging embodiments, the charging management module receives wireless charging input via the wireless charging coil of the electronic device. While charging the battery, the charging management module can also supply power to the electronic device via the power management module. The power management module is used to connect the battery, the charging management module, and the SOC. The power management module receives input from the battery and / or the charging management module to supply power to the SOC, display screen, etc. The power management module can also be used to monitor parameters such as battery capacity, battery cycle count, and battery health status.

[0091] Display screens can be used to display wallpapers, icons, images, and videos. A display screen includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a MiniLED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc.

[0092] In some embodiments, the electronic device may also include other devices or modules, such as antennas, audio modules, speakers, receivers, microphones, headphone jacks, sensor modules, physical buttons, motors, indicators, cameras, and subscriber identification module (SIM) card interfaces.

[0093] The CPU scheduling method provided in the embodiments of this application will be described below with reference to the electronic devices shown in Figures 5 to 8. The devices mentioned in the following embodiments may have the components shown in Figures 5 to 8, or have a hardware structure similar to that shown in Figures 5 to 8.

[0094] In this embodiment, the software system of the electronic device can adopt a layered architecture, event-driven architecture, microkernel architecture, or microservice architecture. Taking the layered architecture Android system as an example, the software system architecture of the electronic device is illustrated.

[0095] For example, Figure 9 is a software architecture diagram of an electronic device provided in this application.

[0096] As shown in Figure 9, electronic devices can adopt a layered architecture, dividing the software into several layers, each with a clear role and division of labor. Layers communicate with each other through software interfaces. In some embodiments, the software layers of the software structure are divided from top to bottom as follows: application (APP) layer, application framework (FWK) layer, and kernel layer. This software architecture runs on top of the hardware layer, which may include multi-core processors, such as small cores, medium cores, large cores, and super-large cores.

[0097] The application layer can include a series of applications, such as video applications, navigation applications, shopping applications, news applications, music applications, and novel applications. When an electronic device runs different applications, the tasks / instructions executed differ, resulting in varying computational power requirements and power consumption for the processor. For example, applications with more user interaction, such as shopping applications, require higher computational power, leading to higher power consumption; while applications with less user interaction, such as video applications, require lower computational power, resulting in lower power consumption. When these applications are running, they can access the various service modules provided by the application framework layer through application programming interfaces (APIs) and execute corresponding intelligent business processes.

[0098] The application framework layer provides APIs and a programming framework for applications. It includes predefined functions. For example, the application framework layer may include a scene awareness module, a scene recognition module, a thread recognition module, and a policy control module. The scene awareness module is used to perceive the scene information of the current application. The scene recognition module is used to identify the specific usage scenario of the current application based on the perceived scene information, such as watching a video or browsing a shopping page via touch. Processor power consumption varies in different application scenarios. The thread recognition module is used to determine the scheduling class to which the current thread belongs. The policy control module is used to formulate the scheduling policy corresponding to the scheduling class of the current thread; different scheduling classes correspond to different scheduling policies.

[0099] The kernel layer is the layer between hardware and software, belonging to the lower layers of the Android system. The kernel layer can include system control (sysctl), the scheduler, and the device tree. The sysctl command is used to dynamically modify kernel runtime parameters; available kernel parameters are located in the ` / proc / sys` directory. The sysctl command includes advanced options for the TCP / IP stack and virtual memory system. The scheduler provides paths with various scheduling policies, such as EAS energy efficiency core selection, fast path core selection, slow path core selection, core selection based on boost parameters, and previous path core selection. The device tree is a data structure describing the hardware. The device tree can be passed to the kernel by the bootloader (uboot), from which the kernel obtains hardware information, such as the number and type of CPUs, memory base addresses and sizes, buses and bridges, peripheral connections, interrupt controllers and interrupt usage, general-purpose input / output (GPIO) controllers and their usage, clock controllers and their usage, etc. In this embodiment, the device tree can also be used to store the actual power consumption values ​​at various frequency points obtained through benchmark testing tools.

[0100] In addition, the kernel layer can also contain various driver interfaces, such as display drivers, touch drivers, and CPU frequency drivers. The CPU frequency driver can be used for frequency enabling, PR multiplication, etc. Electronic devices can connect to touchscreens, etc. When a user operates on the touchscreen, the touch driver reports the touch coordinates to the input system, which is responsible for encapsulating the touch coordinates into touch events.

[0101] It should be noted that although the embodiments of this application are illustrated using the Android system as an example, the basic principles are equally applicable to electronic devices based on operating systems such as iOS or Windows.

[0102] It is understood that, in order to implement the CPU scheduling method in the embodiments of this application, the electronic device includes hardware and / or software modules that perform various functions. Based on the algorithm steps of the examples described in the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in conjunction with the embodiments.

[0103] For example, Figure 10 provides a flowchart of a CPU scheduling method. As shown in Figure 10, the method may include the following steps S101 to S105. The execution entity of this method may be an electronic device or a functional module of an electronic device.

[0104] S101, The electronic device responds to the user's operation on the first application and creates the first task.

[0105] The aforementioned "first application" can be any application on the electronic device, such as a video application, navigation application, shopping application, news application, music application, or novel application. Users can touch the icon or interface of any of these applications to trigger the first application to perform its corresponding task. For example, a user can tap the icon of a video application to trigger the electronic device to run the video application. Similarly, while the electronic device is displaying a shopping interface, a user can swipe up or down on the shopping interface to trigger the electronic device to scroll through the shopping interface. And while the electronic device is playing music, a user can tap the pause button to trigger the electronic device to stop playing the music.

[0106] In this embodiment, a task is a logical concept, referring to an activity performed by software or a series of operations to achieve a certain purpose. A task is a single execution of a program. A task can contain one or more subtasks that perform independent functions; these subtasks are processes or threads. A process refers to a dynamic execution of a program with independent functions on a certain data set. The execution of a single task can activate multiple processes. A process can have multiple threads, and each thread shares the resources owned by a process. The aforementioned first task is a task corresponding to the first application created in response to a user's operation on the first application. When the user operates on different applications, tasks corresponding to each application will be created. It can be understood that when the processor executes different tasks, the computing power requirements of each task are different, resulting in different processor power consumption.

[0107] S102. When the first task meets the first preset scenario, the electronic device enables the EAS energy efficiency selection core.

[0108] Electronic devices are pre-configured with core selection strategies corresponding to various scenarios; these strategies are also called scheduling strategies. When an electronic device creates a first task in response to a user's operation on a first application, it can perform scenario recognition on the first task to determine which preset scenario the task fits into. If a task fits into a first preset scenario, then EAS energy efficiency core selection is enabled. The first preset scenario refers to the scenario of launching a first preset type of application. This first preset type of application can be shopping apps, short video apps, social apps, e-book apps, etc., which are frequently used by the user within a preset time (e.g., the number of operations is greater than or equal to a preset number). Typically, electronic devices can pre-add an identifier to each application. If the identifier of an application matches the first preset type, the electronic device can determine that the first task fits into the first preset scenario and enable EAS energy efficiency core selection.

[0109] If a task does not meet the first preset scenario, EAS energy efficiency core selection will not be enabled, but other core selection strategies will be enabled, such as fast path core selection, slow path core selection, boosts parameter path core selection, or previous path core selection. For example, if a task meets the second preset scenario, fast path core selection will be enabled; if a task meets the third preset scenario, slow path core selection will be enabled; if a task meets the fourth preset scenario, boosts parameter path core selection will be enabled; and if a task meets the fifth preset scenario, previous path core selection will be enabled. The settings for the second, third, fourth, and fifth preset scenarios can be configured according to usage requirements and will not be described in detail here.

[0110] S103. The electronic device corrects the power consumption value stored in the EM based on the power consumption value configured in the device tree.

[0111] Among them, the device tree and EM are two functional modules of the kernel layer. The device tree pre-configures the actual power consumption values ​​of each CPU at multiple frequency points, while the power consumption value in EM is a fixed power consumption value calculated by the above relationship (1).

[0112] Referring to the description of the above embodiments, the power consumption value in the EM is calculated using the above formula (1). Since the CPU's capacitance value is fixed, the power consumption value corresponding to each OPP is also fixed. However, in some application scenarios, the fixed power consumption value at a certain operating frequency calculated using the above formula (1) may not be equal to the actual power consumption value at that operating frequency. If the EM calculates the power consumption value according to the above formula (1) and estimates the energy consumption caused by migrating threads to the CPU, it will lead to inaccurate core selection and frequency adjustment by the EAS through the EM. In this regard, this application provides the following improvement: In the scenario of launching different applications, based on the benchmark testing tool used by the electronic device, the power consumption value of each CPU at multiple frequency points is obtained through frequency locking test, and these power consumption values ​​are configured in the device tree of the electronic device. Among them, the benchmark testing tool can be used to measure the processing power of the CPU. For example, the benchmark testing tool can be drystone, benchmark, coremark, etc. It is understood that the CPU and frequency point used when launching different applications may be different. In order to cover all CPUs and frequency points, it is necessary to test the power consumption value of each CPU at multiple frequency points in the scenario of launching multiple applications. In addition, since the power consumption values ​​configured in the device tree are obtained through frequency locking tests on electronic devices, these power consumption values ​​can be referred to as true power consumption values.

[0113] For example, referring to Figure 4, Figure 11 shows a schematic diagram of the energy efficiency curves of the three cores in the SOC under real-world conditions. In Figure 4, the energy efficiency curves of the small core, large core, and super-large core are three smooth curves. Referring to the description of the above embodiment, the larger the ratio of computing power to power consumption at a certain frequency, the better the energy efficiency ratio of the CPU at that frequency. If the computing power at a certain frequency remains unchanged, changing the power consumption at that frequency will change the energy efficiency ratio. If the power consumption value obtained through frequency locking test at a certain frequency is greater than the power consumption value stored in EM, the energy efficiency value calculated based on the power consumption value obtained through frequency locking test will be less than the energy efficiency value calculated based on the power consumption value stored in EM. This will result in an inflection point as shown in Figure 11, where the energy efficiency ratio at the inflection point is worse than that at the frequency adjacent to the inflection point.

[0114] In some embodiments, CPUs with the same microarchitecture belong to the same performance domain. All CPUs within a performance domain share a set of configuration parameters, which may include frequency grading and the mapping relationship between computing power and power consumption. One frequency grading corresponds to one frequency, and different frequency gradings correspond to different frequencies. In EM, the frequency grading of each performance domain can be set by native Android code. It should be understood that CPUs with different microarchitectures support different maximum frequencies, and correspondingly, the frequency grading methods for CPUs with different microarchitectures may differ.

[0115] To correct the power consumption values ​​corresponding to the frequency levels of each performance domain in the EM, the frequency level settings for each performance domain in the device tree are consistent with those in the EM. That is, there is a one-to-one correspondence between the frequency points of each CPU in the device tree and the frequency points of each CPU in the EM. The difference between the two is that the power consumption values ​​corresponding to the frequency levels of each performance domain in the EM are calculated using the above-mentioned formula (1), while the power consumption values ​​corresponding to the frequency levels of each performance domain in the device tree are obtained through frequency locking tests. Since the power consumption values ​​are obtained in different ways in the EM and the device tree, the power consumption values ​​of the same CPU at the same frequency level may be equal or unequal.

[0116] In some embodiments, the power consumption values ​​corresponding to the frequency point classifications of each performance domain in the device tree can exist in the form of a configuration table. That is, the power consumption values ​​corresponding to the frequency point classifications of each performance domain obtained through frequency locking testing are stored in the device tree in the form of a configuration table.

[0117] For example, Figure 12 shows a comparative schematic diagram of frequency and power consumption stored in the EM and device tree.

[0118] As shown in Figure 12, the performance domains of the EM and device tree are divided in the same way, and the frequency level settings for each performance domain are also consistent. For example, the frequency level of the small core cluster performance domain is frequency a1, frequency a2, ..., frequency ai; the frequency level of the medium core cluster performance domain is frequency b1, frequency b2, ..., frequency bi; and the frequency level of the large core cluster performance domain is frequency c1, frequency c2, ..., frequency ci. The frequency and power consumption of the EM and device tree are stored in em_cap_state and dts_cap_state, respectively.

[0119] For the small cluster performance domain, the difference between the two is as follows: In EM, the power consumption value corresponding to frequency a1 is A1, the power consumption value corresponding to frequency a2 is A2, ..., and the power consumption value corresponding to frequency ai is Ai; in the device tree, the power consumption value corresponding to frequency a1 is A1', the power consumption value corresponding to frequency a2 is A2', ..., and the power consumption value corresponding to frequency ai is Ai'.

[0120] For the core cluster performance domain, the difference between the two is as follows: In the EM, the power consumption value corresponding to frequency b1 is B1, the power consumption value corresponding to frequency b2 is B2, ..., and the power consumption value corresponding to frequency bi is Bi; in the device tree, the power consumption value corresponding to frequency b1 is B1', the power consumption value corresponding to frequency b2 is B2', ..., and the power consumption value corresponding to frequency bi is Bi'.

[0121] For the large cluster performance domain, the difference between the two is as follows: In the EM, the power consumption value corresponding to frequency c1 is C1, the power consumption value corresponding to frequency c2 is C2, ..., and the power consumption value corresponding to frequency ci is Ci; in the device tree, the power consumption value corresponding to frequency c1 is C1', the power consumption value corresponding to frequency c2 is C2', ..., and the power consumption value corresponding to frequency ci is Ci'.

[0122] The electronic device can pass the power consumption values ​​corresponding to all frequencies in the configuration table to the EM, and then correct the power consumption of each frequency in the EM by traversal. Taking frequency a1 as an example, the electronic device can correct the power consumption value A1 corresponding to frequency a1 in the EM according to the power consumption value A1' obtained from the device tree. Specifically, if the power consumption value A1 is equal to the power consumption value A1', that is, the power consumption value calculated by the above formula (1) is equal to the actual power consumption value, then the electronic device can keep the power consumption value A1 corresponding to frequency a1 in the EM unchanged, without needing to correct the power consumption value A1 corresponding to frequency a1 in the EM; if the power consumption value A1 is not equal to the power consumption value A1', that is, the power consumption value calculated by the above formula (1) is not equal to the actual power consumption value, then the electronic device can replace the power consumption value A1 with the power consumption value A1' and correct the power consumption value A1 corresponding to frequency a1 in the EM.

[0123] S104. The electronic device performs EAS energy efficiency selection based on the corrected power consumption value. The result of the EAS energy efficiency selection is the first CPU, which is one of the multiple CPUs set in the electronic device.

[0124] The electronic device can select CPUs capable of handling the first task from among multiple CPUs based on the maximum remaining computing power of each CPU. Then, based on the corrected power consumption value obtained in step S103, the most power-efficient CPU is selected from the candidate CPUs. Here, "CPU capable of handling the first task" means that if the thread of the first task is migrated to a certain CPU, the computing power required by that CPU to execute the first task does not exceed the CPU's remaining computing power, i.e., idle computing power. "Most power-efficient CPU" means that if the thread of the first task is migrated to a certain CPU, the energy consumption increase of that CPU is less than the power consumption increase of migrating the thread of the first task to another CPU.

[0125] For example, Table 1 shows the relevant parameters involved in EAS's energy efficiency core selection. EAS energy efficiency core selection may include the following steps: Calculating the base energy value of each performance domain without any tasks, which includes the maximum available computing power of each CPU. Traversing each performance domain, finding the CPU with the maximum available computing power in each performance domain as a candidate CPU; for example, CPU0 is a candidate CPU for the small cluster performance domain, CPU3 for the medium cluster performance domain, CPU6 for the large cluster performance domain, and CPU7 for the ultra-large cluster performance domain. Then, based on the corrected power consumption value, calculating the energy change value of the performance domain caused by placing a task on a candidate CPU. Afterwards, the candidate CPU in the performance domain with the smallest power consumption increment is selected as the first CPU. For example, the energy consumption increment for the small cluster performance domain is 1379, for the medium cluster performance domain it is 1364, for the large cluster performance domain it is 1485, and for the ultra-large cluster performance domain it is 1522. Since the medium cluster has the smallest energy consumption increment, CPU3 is selected as the final CPU.

[0126] Table 1

[0127] S105, The electronic device schedules the first CPU to execute the first task.

[0128] In the CPU scheduling method provided in this application, the actual power consumption values ​​of each frequency point obtained through frequency locking testing are pre-configured in the device tree of the electronic device. This allows the power consumption value of the EM (Energy Management System) to be corrected based on the actual power consumption values ​​in the device tree when the electronic device enters the EAS (Energy Management System) energy efficiency selection path. Compared to the uncorrected power consumption value of the EM, the power consumption value stored in the device tree is more accurate. Therefore, correcting the EM's power consumption value based on the power consumption value stored in the device tree enables the EAS energy efficiency selection to schedule a CPU with better performance and lower power consumption, truly achieving a dual benefit of performance and power efficiency.

[0129] The following example uses a shopping scenario. Based on Figures 9 and 10, and combined with Figure 13, we will introduce a schematic diagram of CPU scheduling in an electronic device in a shopping scenario.

[0130] ① In response to the user's first operation on the shopping application, the scene recognition module of the electronic device performs scene recognition based on the shopping application's configuration file.

[0131] As shown in Figure 13, the scene recognition module can include configuration files for various applications, such as configuration file 1 for a video application, configuration file 2 for a navigation application, configuration file 3 for a shopping application, configuration file 4 for a news application, configuration file 5 for a music application, and configuration file 6 for a novel application. For example, an application's configuration file can include the following configuration items: boost frequency, related thread group (RTG), double data rate (DDR), etc. The specific parameters of the configuration items differ for each application, resulting in different core selection strategies for each application. The scene recognition module can identify the scene of the current application based on the configuration file of each application to customize the core selection strategy corresponding to the current application's scene. When a user touches the icon, card, or interface of the shopping application, the electronic device creates a first task corresponding to the shopping application based on the shopping application's configuration file 3 and identifies the scene of the first task. If the scene of the first task matches a first preset scene (a scene with frequent user interaction), then EAS energy efficiency core selection is enabled.

[0132] ② The scene module of the electronic device calls the scheduler to enable EAS energy efficiency selection.

[0133] When the system's EAS (Energy Efficiency Selection) core selection mechanism is enabled, the scheduler calls the function `find_energy_efficient_cpu()` to find the CPU with the highest energy efficiency when a Completely Fair Scheduler (CFS) task is awakened from a blocked state. EAS core selection relies on the EM (Energy Management Optimizer) to select the most energy-efficient CPU for each task. As an example, the EM used by EAS core selection is not maintained by the scheduler, but by a dedicated software framework.

[0134] ③ The EAS energy efficiency selection core obtains the configuration table from the device tree and corrects the power consumption value stored in EM based on the power consumption value in the configuration table.

[0135] The configuration table above stores power consumption values ​​corresponding to frequency levels for each performance domain. These power consumption values ​​are obtained through frequency locking tests using benchmark tools for electronic devices under different application scenarios, representing the power consumption of each CPU at multiple frequency points. All CPUs within a performance domain share a set of configuration parameters, which may include the mapping relationship between frequency levels and power consumption values. The EAS energy efficiency selection core can pass the power consumption values ​​from all frequency points in the configuration table to the EM to correct the power consumption values ​​of each frequency point in the EM. The frequency points in the configuration table correspond one-to-one with the frequency points in the EM.

[0136] ④ The EAS energy efficiency selection core selects a CPU from multiple CPUs based on the corrected power consumption value and schedules that CPU to execute the first task corresponding to the shopping application. For example, if the EAS energy efficiency selection core selects a CPU from a mid-core cluster that has the lowest power consumption, then that CPU will be scheduled to execute the first task corresponding to the shopping application.

[0137] It's understandable that if EAS energy efficiency core selection is based on the uncorrected power consumption value in the EM (Energy Management System), the final selection result might be the second CPU. The second CPU differs from the first CPU, and the energy consumption increment for scheduling the third CPU to execute a task is greater than the energy consumption increment for scheduling the first CPU. In other words, by correcting the EM's power consumption value based on the power consumption value stored in the device tree, EAS energy efficiency core selection schedules CPUs with better performance and lower power consumption.

[0138] Furthermore, the tasks performed by the processor differ depending on the user's interaction with different applications, resulting in varying computational power requirements and power consumption. Consequently, EAS's energy efficiency core selection may ultimately choose the most power-efficient CPU from different CPUs. For instance, the first task for a shopping application might select the first CPU, while the second task for an e-book application might select the third CPU, and these two CPUs may be different.

[0139] The following is a schematic diagram of the specific process for EAS energy efficiency selection, with reference to Figure 14.

[0140] As shown in Figure 14, the kernel layer may include task placement core.c, scheduler fair.c, energy_model.h, and device tree device_tree. This method may include the following steps S201 to S208.

[0141] S201. The task placement core.c calls the function try_to_wake_up() to wake up the task thread.

[0142] The Linux kernel configures a runqueue for each CPU to maintain all threads that need to run on that CPU. Electronic devices retrieve a thread from the runqueue for execution according to certain rules. If a thread is hanging on a CPU's runqueue, it is in a ready state but has not yet received CPU resources. The scheduler will adjust the task distribution through load balancing as needed. When a task is retrieved from the runqueue and begins execution, it is in a running state. If the task load in this state is beyond the current CPU's capacity, the scheduler will mark it as an overloaded task and periodically trigger active upmigration, assigning the misfit task to a CPU with higher computing power. If a task thread has not yet been placed on any CPU (i.e., it is in a blocked state), or if a task has just been created and has just started execution, the scheduler needs to place the task.

[0143] Task placement occurs in three scenarios: Scenario 1, a process creates a child process using `fork`; Scenario 2, a process begins execution using `sched_exec`; Scenario 3, a blocked process is awakened. When constructing the CPU topology, initial flags are configured for each sched domain. In heterogeneous systems, `SD_BALANCE_WAKE` is set. All threads belong to their own sched class, and different sched classes employ different scheduling strategies. The final function entry point for all three task placement scenarios is the `select_task_rq()` method defined in the task placement module `core.c`.

[0144] S202. The function try_to_wake_up() calls the function selet_task_rq() to select a suitable path for the thread.

[0145] Specifically, when a thread in the CFS scheduling class places a task, it will jump to select_task_rq_fair() through the select_task_rq() method.

[0146] S203, load balancing function selet_task_rq_fair().

[0147] Taking the three important core selection functions involved in the function `select_task_rq_fair()`—`find_energy_efficient_cpu()`, `find_idlest_cpu()`, and `select_idle_sibling()`—as examples, they represent three paths in the task placement process: EAS energy efficiency core selection, slow path core selection, and fast path core selection, respectively. Depending on the conditions, each of the three task placement scenarios will eventually enter one of these three paths, calculate the CPU required for task placement, and end the current task placement process.

[0148] 1. EAS energy efficiency core selection path find_energy_efficient_cpu().

[0149] When the passed parameter `sd_flag` is `SD_BALANCE_WAKE`, and the system configuration key value is `sched_energy_present`, the system will enter the EAS energy efficiency core selection path. The EAS energy efficiency core selection path selects the CPU that minimizes the overall system power consumption for the task, while ensuring the task can run normally. Normally, if the current platform is not a heterogeneous system, or if there are over-utilized CPUs in the system, EAS will directly return -1.

[0150] 2. Slow path selection kernel find_idlest_cpu().

[0151] In two scenarios, the slow path selection process will occur: First, if the passed parameter `sd_flag` is `SD_BALANCE_WAKE` and EAS is not enabled or returns -1, the task will enter the slow path if it is not a wake affine. Second, if the passed parameter `sd_flag` is `SD_BALANCE_FORK` or `SD_BALANCE_EXEC`, the task load is untrusted, and its impact on system power consumption cannot be predicted, thus also entering the slow path. The slow path selection process uses the `find_idlest_cpu()` method to find the most idle CPU in the system, selects it as the CPU to place the task on, and returns it.

[0152] 3. Quick path selection kernel select_idle_sibling().

[0153] If the input parameter `sd_flag` is `SD_BALANCE_WAKE`, but EAS cannot function, and if the task is a wake affine type task, the scheduler will enter the fast path to select a CPU for placement. Under certain conditions, it will prioritize the CPU where the task last ran (prev CPU), and then select the CPU that woke up the task (wake CPU), i.e., the CPU where the waker resides.

[0154] The above embodiments are only examples of EAS energy efficiency core selection, slow path core selection, and fast path core selection. It can be understood that in actual implementation, it may also include previous path core selection, core selection based on boosts parameters, and other paths.

[0155] S204. The scheduler fair.c calls the function find_energy_efficient_cpu() to find the CPU with the highest energy efficiency ratio.

[0156] When EAS is enabled, the scheduler uses `find_energy_efficient_cpu()` to select the most energy-efficient CPU for a CFS task when it is awakened from a blocked state. It searches for the CPU with the highest idle computing power in each performance domain and uses it as a candidate CPU for thread execution. Then, it calls the `compute_energy()` function to estimate the energy consumption of the performance domain to determine which candidate CPU in which performance domain is the most energy-efficient.

[0157] It should be noted that a performance domain corresponds to a CPU cluster. If a thread is scheduled to run on the CPU with the largest idle computing power in the performance domain, it can be guaranteed that the CPUs in that cluster will run at the minimum required frequency.

[0158] S205. The function find_energy_efficient_cpu() calls the function compute_energy() to estimate the energy consumption of the performance domain.

[0159] For each performance domain, the following operations can be performed: The function `compute_energy()` can estimate the `max_util` of the CPU with the highest utilization in a performance domain and the sum of the `util` values ​​of all CPUs in that performance domain, `sum_util`, when a thread migrates to a candidate CPU in that performance domain. Then, steps S206-S208 are executed to calculate the energy consumption of the thread migrating to that performance domain. Here, `max_util` is the utilization of the CPU with the highest utilization in a performance domain, which determines the operating frequency of that performance domain; `sum_util` is the estimated energy consumption of that performance domain after considering the utilization of all CPUs in that performance domain. `util` can be used to represent the CPU's capability.

[0160] S206. The function find_energy_efficient_cpu() calls the function em_create_perf_table_DT() to obtain the configuration table from the device tree.

[0161] S207. The function find_energy_efficient_cpu() calls the function em_compute_costs() to read the power consumption value from the configuration table and pass it to EM for power consumption value correction.

[0162] S208. The function compute_energy() calls the EM API interface em_cpu_energy() to estimate the sum of energy consumption of all CPUs in the performance domain.

[0163] In some embodiments, the execution flow of the function compute_energy() is as follows:

[0164] 1. Estimate the CPU's computing power (util) when executing the first task. Multiply the computing power (util) by a first coefficient to obtain the minimum computing power value required by the CPU in this performance domain. The first coefficient must be greater than or equal to 1. For example, if the first coefficient is 1.25, then the minimum computing power value required by the CPU in this performance domain is 1.25 times util.

[0165] 2. Find the lowest performance state in EM that meets the minimum computing power value.

[0166] The EM stores tables of computing power information for each performance domain, with each level of computing power corresponding to a frequency point, which can be understood as a performance state. "The minimum performance state that meets the minimum computing power value" means that the computing power value of the minimum performance state is greater than or equal to the minimum computing power value required by the CPU (e.g., 1.25 * util), and the energy efficiency ratio of the minimum performance state is better than that of other performance states.

[0167] Since frequency and computing power are positively correlated, "determining the minimum computing power value of a CPU in a performance domain" is equivalent to determining the minimum operating frequency required by the CPU in a performance domain. "Finding the lowest performance state that meets the minimum computing power value in the EM" is equivalent to finding the performance state in the EM that has a frequency greater than the minimum operating frequency and the highest energy efficiency.

[0168] In some embodiments, the electronic device can determine M frequency points greater than or equal to the minimum operating frequency from a table of computing power information at each level; based on the cost values ​​of these M frequency points, inflection points are removed from these M frequency points; after removing inflection points from these M frequency points, a first frequency point is selected from the frequency points after removing inflection points, and the performance state corresponding to the first frequency point is taken as the minimum performance state. As an example, the cost value of the first frequency point is less than the cost values ​​of other frequency points, and other frequency points refer to the frequency points among the M frequency points that do not include inflection points and the first frequency point.

[0169] The cost value, also known as the energy efficiency coefficient, can be used to reflect the energy efficiency at a specific frequency.

[0170] The cost value of a frequency point can be obtained by the following relationship (2):

[0171] Where max_freq represents the highest frequency point of a performance domain, freq(i) represents a frequency point (i.e., level 1 computing power) of that performance domain, and power(i) represents the corrected power consumption value corresponding to that frequency point.

[0172] The specific method for "removing inflection points from these M frequency points based on their cost values" is as follows: Following the order of power consumption from high to low, compare the cost values ​​corresponding to two adjacent power consumption values ​​sequentially. If the cost value of the lower power consumption value is less than the cost value of the higher power consumption value, continue comparing the cost values ​​corresponding to the next set of two adjacent power consumption values. If the cost value of the lower power consumption value is greater than or equal to the cost value of the higher power consumption value, delete the frequency point corresponding to the lower power consumption value as an inflection point, and then continue comparing the cost values ​​corresponding to the next set of two adjacent power consumption values. In other words, when comparing in descending order of power consumption, frequency points whose cost values ​​do not decrease sequentially will be removed.

[0173] For example, Figure 15 illustrates a schematic diagram of finding the lowest performance state based on the energy efficiency curve of a certain performance domain. As shown in Figure 15, the energy efficiency curve is obtained by correcting the power consumption value in the EM based on the power consumption value stored in the device tree. Assuming the lowest computing power is util1 and the lowest operating frequency is f1, then frequencies f2 to f13 are frequencies greater than f1. The power consumption values ​​are sorted in descending order: power13, power12...power3, power2. The cost value decreases sequentially from power13 to power3, but the cost value of power2 is greater than that of power3. Therefore, frequency f2 corresponding to power2 is taken as the inflection point, frequency f2 is deleted, and frequency f3 is selected as the final frequency. It can be understood that because the energy efficiency curve in Figure 15 corrects the power consumption value of f2, making f2's energy efficiency relatively poor, the final selected frequency is f3, not f2, thus making the energy consumption of this performance domain more accurate.

[0174] 3. Estimate the energy consumption of this performance domain based on the sum of the utilization of all CPUs in the performance domain (sum_util), the computing power of the candidate CPUs, and the cost variable in the lowest performance state.

[0175] Specifically, the energy consumption of the performance domain is obtained by multiplying the cost variable in the lowest performance state by the sum of the utilization rates of all CPUs, sum_util, and dividing by the computing power of the candidate CPUs. The cost variable in the lowest performance state can be obtained through the above relation (2).

[0176] The above embodiments describe the specific implementation method of EAS core selection based on EM. Experimental data verifies that the CPU's energy efficiency curve will shift when the CPU's ambient temperature is changed.

[0177] For example, Figures 16 to 18 show the measured energy efficiency curves of CPU0, CPU2, and CPU7 at temperatures of 30°C and 50°C. CPU0, CPU2, and CPU7 belong to the small core cluster, medium core cluster, and large core cluster, respectively. Referring to Figures 16 to 18, the trends of the energy efficiency curves of each CPU are similar. The energy efficiency curve of the small core shifts upward with increasing temperature; the energy efficiency curves of the medium and large cores have a high degree of overlap, the shift in curve is small, and the inflection points of the energy efficiency curves are basically the same. Analyzing the test data, at different temperatures, the energy efficiency curves will drift up and down or remain basically unchanged, the trend of the energy efficiency curves (such as the inflection point) remains unchanged, and the energy efficiency ratio at each frequency will increase proportionally or remain basically unchanged. Thus, even if the CPU temperature is changed, the final selected frequency will be consistent, for example, the first frequency. Based on the above rules, this application provides the following implementation methods:

[0178] One possible implementation involves storing only one set of mapping relationships between frequency levels, power consumption values, and capability values ​​in the device tree for each performance domain. This mapping relationship corresponds to an energy curve. The energy curve for a performance domain can be obtained by frequency locking testing of the electronic device at a first temperature. The first temperature is a temperature set by the hardware manufacturer according to requirements, such as 30°C. During user operation of the electronic device, regardless of the ambient temperature, frequency tuning and core selection are performed based on the mapping relationships in the device tree.

[0179] Referring to the description of the above embodiments, when selecting a core, the power consumption value corresponding to the first frequency needs to be used. As the temperature increases, the energy efficiency curve of the small core shifts upward, and the power consumption value corresponding to the first frequency also increases. If the power consumption value in the device tree is directly used to calculate the energy consumption of the small core performance domain, the energy consumption value of that performance domain will be underestimated. In view of this problem, this application also provides a second possible implementation.

[0180] A second possible implementation involves storing a mapping relationship between frequency levels, power consumption values, and capability values ​​in the device tree for each performance domain. This mapping relationship corresponds to an energy curve. The energy curve for a performance domain can be obtained through frequency locking testing of the electronic device at a first temperature. The first temperature is a temperature determined by the hardware manufacturer based on its requirements. Additionally, the device tree can store the offset of the energy curve at various temperatures relative to the first temperature.

[0181] During user operation of electronic devices, the device can collect the current ambient temperature as a second temperature. Based on the current ambient temperature, it determines the offset of the energy curve when adjusting from the first temperature to the second temperature (this offset can be stored in the device tree or other modules). The energy curve obtained from the device tree is then offset based on this offset. The offset power consumption value is then passed to the EM (Energy Management Module) for power consumption correction. In this way, the EM can estimate the sum of the energy consumption of all CPUs within a performance domain based on the energy curve corresponding to the current ambient temperature. It is understandable that the frequency modulation results of the first and second possible implementations are consistent. However, because the energy curve of each performance domain is shifted based on temperature in the second possible implementation, the energy consumption value of the performance domain calculated based on the power consumption value is more accurate, which helps improve the accuracy of the core selection results.

[0182] This application also provides a computer-readable storage medium storing computer instructions; when the computer-readable storage medium is run on a computer, it causes the computer to perform the method described above. The computer instructions can be stored in the computer-readable storage medium or transferred from one computer-readable storage medium to another.

[0183] This application also provides a computer program product, which includes computer program code that, when run on a computer, causes the computer to perform the methods described in the above embodiments.

[0184] This application also provides a chip coupled to a memory. This chip is used to read and execute computer programs or instructions stored in the memory to perform the methods described in the above embodiments. The chip can be a general-purpose processor or a special-purpose processor. It should be noted that the chip can be implemented using one or more field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), controllers, state machines, gate logic, discrete hardware components, any other suitable circuits, or any combination of circuits capable of performing the various functions described throughout this application.

[0185] The terminal device, computer-readable storage medium, computer program product, and chip provided in the embodiments of this application are all used to execute the methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects corresponding to the methods provided above, and will not be repeated here.

[0186] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0187] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0188] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0189] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0190] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application.

[0191] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A central processing unit (CPU) scheduling method, characterized in that, Applied to electronic devices, the method includes: The electronic device creates a first task in response to a user's operation on the first application; When the first task meets the first preset scenario, the electronic device corrects the power consumption value stored in the energy model EM based on the power consumption value configured in the device tree; The electronic device selects a first CPU from multiple CPUs based on the corrected power consumption value; The electronic device schedules the first CPU to execute the first task.

2. The method according to claim 1, characterized in that, The electronic device corrects the power consumption value stored in the EM based on the power consumption value configured in the device tree, including: The electronic device transmits the power consumption values ​​corresponding to all frequencies in the device tree to the EM; The electronic device corrects the power consumption corresponding to each frequency in the EM by traversing the data. Each frequency point configured in the device tree corresponds one-to-one with each frequency point stored in the EM.

3. The method according to claim 2, characterized in that, The electronic device corrects the power consumption corresponding to each frequency in the EM by traversing the data, including: For each frequency, the electronic device performs the following operations: Compare a first power consumption value and a second power consumption value, wherein the first power consumption value is the power consumption value corresponding to a frequency stored in the EM, and the second power consumption value is the power consumption value corresponding to the frequency obtained from the device tree; If the first power consumption value and the second power consumption value are not equal, then the second power consumption value shall be used as the corrected power consumption value corresponding to the frequency. If the first power consumption value and the second power consumption value are equal, then the first power consumption value or the second power consumption value is taken as the corrected power consumption value corresponding to the frequency.

4. The method according to claim 2, characterized in that, The electronic device transmits the power consumption values ​​corresponding to all frequencies in the device tree to the EM, including: The electronic device calls the function em_create_perf_table_DT() to obtain the configuration table from the device tree; The electronic device calls the function em_compute_costs() to read the power consumption values ​​of each power level from the configuration table and passes them to the EM.

5. The method according to any one of claims 1 to 4, characterized in that, The EM stores the power consumption values ​​of the multiple CPUs at multiple frequency points. The power consumption value of each CPU in the EM is calculated using the following formula: P = C * V 2 *f; Where C represents the capacitor of a CPU, V and f are the voltage and frequency of the CPU at a performance operating node, respectively, and P represents the power consumption of the CPU at a performance operating node.

6. The method according to claim 5, characterized in that, The power consumption values ​​configured in the device tree are the power consumption values ​​of the multiple CPUs at multiple frequency points obtained by frequency locking tests based on the benchmark testing tools used by the electronic device when launching different applications. The frequency point of each CPU in the device tree is determined according to the performance operation node of each CPU.

7. The method according to any one of claims 1 to 6, characterized in that, The multiple CPUs are divided into multiple performance domains according to their processing capabilities, and each CPU in each performance domain shares a set of corrected power consumption values. The electronic device selects a first CPU from multiple CPUs based on the corrected power consumption value, including: For each performance domain, the electronic device performs the following operation: estimating the CPU's computing power when executing the first task. The computing power value is multiplied by a first coefficient to obtain the minimum computing power value of a CPU in a performance domain; the minimum operating frequency that meets the minimum computing power value is determined based on the corrected power consumption value; the energy consumption of a performance domain is determined based on the sum of the utilization rates of all CPUs in a performance domain, the computing power of candidate CPUs, and the energy efficiency coefficient of the minimum operating frequency. The electronic device determines the first CPU as the CPU that executes the first task based on the energy consumption of each of the plurality of performance domains; Wherein, when the first CPU executes the first task, the energy consumption of the performance domain where the first CPU is located is less than the energy consumption of the performance domain where other CPUs execute the first task.

8. The method according to claim 7, characterized in that, The step of determining the minimum operating frequency that satisfies the minimum computing power value based on the corrected power consumption value includes: In the computing power information table of the performance domain, determine M frequency points that are greater than or equal to the minimum operating frequency; The first frequency point is used as the minimum operating frequency to meet the minimum computing power value, and the energy efficiency coefficient of the first frequency point is less than the energy efficiency coefficients of the other frequency points among the M frequency points.

9. The method according to claim 8, characterized in that, Before setting the first frequency point as the minimum operating frequency to meet the minimum computing power value, the method further includes: According to the power consumption values ​​corresponding to the M frequency points in descending order, the energy efficiency coefficients corresponding to two adjacent power consumption values ​​are compared sequentially; the frequency points whose energy efficiency coefficients do not decrease sequentially are taken as inflection points and removed from the M frequency points; wherein, the first frequency point is the frequency point selected from other frequency points after removing the inflection point from the M frequency points.

10. The method according to any one of claims 7 to 9, characterized in that, The energy efficiency coefficient at a given frequency is calculated using the following formula: Where max_freq represents the highest frequency point of a performance domain, freq(i) represents a frequency point of the performance domain, power(i) represents the corrected power consumption value corresponding to the frequency point, and cost represents the energy efficiency coefficient of the frequency point.

11. The method according to any one of claims 1 to 10, characterized in that, The device tree stores energy curves, which represent a mapping relationship between a set of frequency point classifications, power consumption values, and capability values. The energy curves are obtained by frequency locking tests on the electronic device at a first temperature. The electronic device corrects the power consumption value stored in the EM based on the power consumption value configured in the device tree, including: The electronic device determines the current ambient temperature as the second temperature; The electronic device obtains a first offset from the device tree, the first offset being the offset of the energy curve when the temperature is adjusted from the first temperature to the second temperature; The electronic device offsets the energy curve obtained from the device tree based on the first offset; The electronic device corrects the power consumption values ​​stored in the EM based on the offset energy curve.

12. The method according to claim 11, characterized in that, The device tree stores N energy curves, which are obtained by CPU frequency locking tests on N performance domains at the first temperature. At the second temperature, the electronic device performs the following operation for each of the N performance domains: Obtain the first offset corresponding to the first performance domain from the device tree, wherein the first performance domain is any one of the N performance domains; Based on the first offset corresponding to the first performance domain, the first energy curve obtained from the device tree corresponding to the first performance domain is offset; Based on the offset first energy curve, the power consumption values ​​corresponding to the first performance domain stored in the EM are... Make corrections.

13. An electronic device, characterized in that, Includes a processor and a memory coupled to the processor; The memory stores instructions, and the processor invokes the instructions to cause the electronic device to execute the CPU scheduling method as described in any one of claims 1 to 12.

14. A chip, characterized in that, The chip is coupled to a memory, and the chip is used to read and execute a computer program stored in the memory to implement the CPU scheduling method as described in any one of claims 1 to 12.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when run on an electronic device, causes the electronic device to perform the CPU scheduling method as described in any one of claims 1 to 12.

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