Photodetection device and electronic apparatus

Abstract

Provided is a photodetection device including a plurality of light-receiving elements that are arrayed in a matrix on a semiconductor substrate and detect light. Each of the light-receiving elements comprises: a photoelectric conversion part which is provided inside the semiconductor substrate and which generates electric charge in response to light incident from a first surface, which is the light-receiving surface of the semiconductor substrate; a transmission suppression part which is provided on a second surface of the semiconductor substrate located on the opposite side from the first surface and which suppresses the transmission of the light through the semiconductor substrate; and one or more multiplication regions which are provided on the second-surface side inside the semiconductor substrate and which amplify electric charge from the photoelectric conversion part. When each of the light-receiving elements is viewed from above the semiconductor substrate, the one or more multiplication regions are located in an area excluding a pixel center-of-gravity region of the light-receiving element.

Description

Photodetector and electronic equipment

[0001] The present disclosure relates to photodetection devices and electronic devices.

[0002] In recent years, distance measurement systems that measure distances using the ToF (Time of Flight) method have been attracting attention. Some distance measurement systems use a SPAD (Single Photon Avalanche Diode) as the light receiving element. In the SPAD, a single light (photon) is incident, and electrons (charges) generated by photoelectric conversion are multiplied in a PN junction region (avalanche amplification), thereby enabling highly accurate detection of the light. The distance measurement system can then measure the distance with high accuracy by detecting the timing at which a current caused by the multiplied electrons flows.

[0003] International Publication No. 2020 / 012984 International Publication No. 2023 / 013408

[0004] For the light receiving elements described above, there is a strong demand for improvement in photon detection efficiency (PDE) in order to improve the accuracy of distance measurement, for example.

[0005] Therefore, the present disclosure proposes a photodetector and electronic equipment that can further improve the photon detection efficiency (PDE).

[0006] According to the present disclosure, there is provided a photodetection device including a plurality of light receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light receiving elements are provided within the semiconductor substrate and include a photoelectric conversion unit that generates an electric charge in response to light incident from a first surface that is a light receiving surface of the semiconductor substrate, a transmission suppression unit that is provided on a second surface of the semiconductor substrate opposite to the first surface and suppresses the light from passing through the semiconductor substrate, and one or more multiplication regions that are provided on the second surface side within the semiconductor substrate and amplify the electric charge from the photoelectric conversion unit, and when the light receiving elements are viewed from above the semiconductor substrate, the one or more multiplication regions are located in an area excluding a pixel center of gravity area of ​​the light receiving elements.

[0007] Furthermore, according to the present disclosure, there is provided a photodetection device including a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light-receiving elements are provided within the semiconductor substrate and include: a photoelectric conversion unit that generates charge from light incident from a first surface that is a light-receiving surface of the semiconductor substrate; a transmission suppression unit that is provided on a second surface of the semiconductor substrate opposite to the first surface and suppresses the light from passing through the semiconductor substrate; one or more multiplication regions that are provided on the second surface side in the semiconductor substrate and amplify the charge from the photoelectric conversion unit; and a light-guiding unit that is provided on the first surface and consists of a plurality of pillars and guides the light to the transmission suppression unit.

[0008] Furthermore, according to the present disclosure, there is provided an electronic device equipped with a photodetector, wherein the photodetector includes a plurality of light receiving elements arranged in a matrix on a semiconductor substrate and detecting light, the light receiving elements each including: a photoelectric conversion unit provided within the semiconductor substrate and generating an electric charge in response to light incident from a first surface which is a light receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite to the first surface and suppressing the light from passing through the semiconductor substrate; and one or more multiplication regions provided on the second surface side within the semiconductor substrate and amplifying the electric charge from the photoelectric conversion unit, wherein when the light receiving elements are viewed from above the semiconductor substrate, the one or more multiplication regions are located in an area excluding a pixel center of gravity area of ​​the light receiving elements.

[0009] Furthermore, according to the present disclosure, there is provided an electronic device equipped with a photodetector, wherein the photodetector includes a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, and the light-receiving elements each include: a photoelectric conversion unit provided within the semiconductor substrate and generating charge from light incident from a first surface which is a light-receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite to the first surface and suppressing the light from passing through the semiconductor substrate; one or more multiplication regions provided on the second surface side in the semiconductor substrate and amplifying charge from the photoelectric conversion unit; and a light-guiding unit provided on the first surface and consisting of a plurality of pillars and guiding the light to the transmission suppression unit.

[0010] 1 is an explanatory diagram (part 1) for describing an example of a circuit configuration of a pixel 10. FIG. 2 is an explanatory diagram (part 2) for describing an example of a circuit configuration of a pixel 10. FIG. 3 is a graph showing a change in a cathode voltage VS of a light receiving element 100 in response to incidence of light and a detection signal PFout. FIG. 4 is a block diagram showing an example of a configuration of a light detecting device 501. FIG. 5 is a block diagram showing an example of a configuration of a distance measuring system 611 incorporating the light detecting device 501. FIG. 6 is a cross-sectional view showing an example of a configuration of a light receiving element 100a according to a comparative example. FIG. 7 is a plan view showing an example of a configuration of a light receiving element 100a according to a comparative example. FIG. 8 is a cross-sectional view showing an example of a configuration of a light receiving element 100 according to a first embodiment of the present disclosure. FIG. 9 is a plan view showing an example of a configuration of a light receiving element 100 according to a first modification of the first embodiment of the present disclosure. FIG. 10 is a plan view showing an example of a configuration of a light receiving element 100 according to a second modification of the first embodiment of the present disclosure. FIG. 11 is a plan view showing an example of a configuration of a light receiving element 100 according to a third modification of the first embodiment of the present disclosure. FIG. 1 is a plan view illustrating an example of a configuration of a light-receiving element 100 according to a fourth modification of the first embodiment of the present disclosure. FIG. 2 is a cross-sectional view illustrating an example of a configuration of a light-receiving element 100 according to a fifth modification of the first embodiment of the present disclosure. FIG. 3 is a cross-sectional view illustrating an example of a configuration of a light-receiving element 100 according to a fifth modification of the first embodiment of the present disclosure. FIG. 4 is a cross-sectional view illustrating an example of a configuration of a light-receiving element 100 according to a second embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating an example of a configuration of a light-receiving element 100 according to a first modification of the second embodiment of the present disclosure. FIG. 6 is a cross-sectional view illustrating an example of a configuration of a light-receiving element 100 according to a second modification of the second embodiment of the present disclosure. FIG. 7 is a cross-sectional view illustrating an example of a configuration of a light-receiving element 100 according to a second modification of the second embodiment of the present disclosure. FIG. 13 is a cross-sectional view illustrating an example of a configuration of a light-receiving element 100 according to a second modification of the third embodiment of the present disclosure.FIG. 1 is a cross-sectional view illustrating an example of the configuration of a light-receiving element 100 according to Modification 3 of the third embodiment of the present disclosure. FIG. 2 is a plan view (part 1) illustrating an example of the configuration of a light-receiving element 100 according to Modification 3 of the third embodiment of the present disclosure. FIG. 3 is a plan view (part 2) illustrating an example of the configuration of a light-receiving element 100 according to Modification 3 of the third embodiment of the present disclosure. FIG. 4 is a cross-sectional view illustrating an example of the configuration of a light-receiving element 100 according to a fourth embodiment of the present disclosure. FIG. 5 is a plan view (part 1) illustrating an example of the configuration of a light-receiving element 100 according to a fourth embodiment of the present disclosure. FIG. 6 is a plan view (part 2) illustrating an example of the configuration of a light-receiving element 100 according to a fifth embodiment of the present disclosure. FIG. 7 is a cross-sectional view illustrating an example of the configuration of a light-receiving element 100 according to a sixth embodiment of the present disclosure. FIG. 8 is a plan view (part 1) illustrating an example of the configuration of a light-receiving element 100 according to a sixth embodiment of the present disclosure. FIG. 9 is a plan view (part 2) illustrating an example of the configuration of a light-receiving element 100 according to a sixth embodiment of the present disclosure. FIG. 10 is an explanatory diagram (part 1) illustrating a sixth embodiment of the present disclosure. FIG. 11 is an explanatory diagram (part 2) illustrating a sixth embodiment of the present disclosure. 19 is a block diagram illustrating a configuration example of a smartphone 900 as an electronic device to which a ranging system 611 according to an embodiment of the present disclosure is applied.

[0011] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted. Furthermore, in this specification and the drawings, multiple components having substantially the same or similar functional configurations may be distinguished by adding different letters after the same reference numeral. However, when there is no particular need to distinguish between multiple components having substantially the same or similar functional configurations, only the same reference numerals will be used.

[0012] In addition, the drawings referred to in the following description are intended to facilitate the description and understanding of the embodiments of the present disclosure, and for clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual shapes, dimensions, ratios, etc. Furthermore, the light receiving elements (photodiodes) and components included in the light receiving elements shown in the drawings may be appropriately modified in design taking into account the following description and known technologies. In addition, in the following description, unless otherwise specified, the vertical direction of the stacked structure of the light receiving element corresponds to the relative direction when the light receiving element is arranged so that light incident on the light receiving element is directed from top to bottom.

[0013] The description of specific shapes in the following description does not mean only geometrically defined shapes. In particular, the description of specific shapes in the following description also includes shapes that have allowable differences (errors and distortions) in the light receiving element (photodiode), its manufacturing process, and its use and operation, as well as shapes similar to those shapes.

[0014] In the following description of circuits (electrical connections), unless otherwise specified, "electrically connected" means connecting multiple elements so that electricity (signals) is conducted between them. In addition, in the following description, "electrically connected" includes not only cases where multiple elements are directly and electrically connected, but also cases where elements are indirectly and electrically connected via other elements.

[0015] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order: 1. Background leading to the creation of the embodiments of the present disclosure 1.1 Circuit configuration of pixel 10 1.2 Configuration example of photodetector 501 1.3 Configuration example of ranging system 611 1.4 Detailed configuration of light receiving element 100a according to a comparative example 2. First embodiment 2.1 Background 2.2 Detailed configuration 2.3 Modified example 3. Second embodiment 3.1 Detailed configuration 3.2 Modified example 4. Third embodiment 4.1 Detailed configuration 4.2 Modified example 5. Fourth embodiment 6. Fifth embodiment 7. Sixth embodiment 7.1 Background 7.2 Detailed configuration 8. Summary 9. Application example 10. Supplementary information

[0016] <<1. Background to the Creation of the Embodiments of the Present Disclosure>> <1.1 Circuit Configuration of Pixel 10> First, before describing the details of the embodiments of the present disclosure, an example of a circuit configuration of a pixel 10 to which the embodiments of the present disclosure can be applied will be described with reference to FIGS. 1 and 2. FIGS. 1 and 2 are explanatory diagrams for describing an example of the circuit configuration of the pixel 10, and in detail show the circuit configuration of the pixel 10 including a light-receiving element (photodiode) 100 having a SPAD (Single Photon Avalanche Diode) structure that can be applied to a distance measurement sensor that measures distance using a direct ToF (Time-of-Flight) method. As shown in FIG. 1 , the pixel 10 includes the light-receiving element 100, an inverter 24, and a transistor 26. Each element of the pixel 10 will be described below in order.

[0017] As described above, the light receiving element 100 has a SPAD structure and can be operated at a bias voltage greater than the breakdown voltage VBD (Geiger mode). The light receiving element 100 is an element that can detect one light (photon) for each pixel 10 by multiplying electrons (charges) generated by photoelectric conversion in a pn junction region (multiplication region) to which a high electric field is applied, which is provided for each pixel 10. More specifically, the light receiving element 100 is a photodiode (single-photon avalanche photodiode) that avalanche-amplifies electrons (charges) generated by incident light and outputs the amplified signal voltage VS to the inverter 24.

[0018] The light receiving element 100 has a cathode electrically connected to the input terminal of the inverter 24 and the drain of the transistor 26. Furthermore, the light receiving element 100 has an anode electrically connected to a power supply. For example, to efficiently detect light (photons), a voltage (hereinafter referred to as excess bias) greater than the breakdown voltage VBD of the light receiving element 100 is applied to the light receiving element 100. Furthermore, the power supply voltage VSPAD supplied to the anode of the light receiving element 100 is set to, for example, a negative bias (negative potential) that is the same voltage as the breakdown voltage VBD of the light receiving element 100.

[0019] The transistor 26 is configured, for example, as a p-type MOS (Metal Oxide Semiconductor) transistor that operates in the saturation region and performs passive quenching by functioning as a quenching resistor. A power supply voltage VE is supplied to the transistor 26. The transistor 26 may also be configured using a pull-up resistor or the like instead of a p-type MOS transistor.

[0020] Furthermore, the pixel 10 may have another transistor (not shown) connected to the cathode of the light receiving element 100, the input terminal of the inverter 24, and the drain of the transistor 26. For example, the source of the other transistor is connected to ground (GND), and a control signal is supplied to the gate of the other transistor from a pixel drive unit (not shown) that drives the pixel 10. More specifically, when the pixel 10 is an effective pixel, a Lo (Low) control signal is supplied to the gate of the transistor from the pixel drive unit. On the other hand, when the pixel 10 is not an effective pixel, a Hi (High) control signal is supplied to the gate of the transistor from the pixel drive unit. Note that, here, an effective pixel is a pixel that is in a state where it can detect light, while a pixel that is not an effective pixel is a pixel that is not in a state where it does not detect light.

[0021] The inverter 24 is composed of, for example, a NOT gate, and outputs a Hi signal PFout when the voltage VS from the cathode of the light receiving element 100 as an input signal is Lo, and outputs a Lo signal PFout when the voltage VS from the cathode is Hi.

[0022] In the embodiment of the present disclosure, the light receiving element 100 may be a light receiving element (photodiode) having the polarity reversed relative to the light receiving element 100 shown in FIG. 1 , and FIG. 2 shows an example of a circuit configuration of a pixel 10 when such a light receiving element is used. Specifically, the pixel 10 shown in FIG. 2 also includes the light receiving element 100, an inverter 24, and a transistor 26. Specifically, the light receiving element 100 shown in FIG. 2 is a light receiving element having the polarity reversed from that of the light receiving element 100 shown in FIG. 1 , and has an anode electrically connected to the input terminal of the inverter 24 and the drain of the transistor 26. In addition, in FIG. 2 , the transistor 26 is, for example, an n-type MOS transistor, and the inverter 24 is, for example, a NOT gate.

[0023] Next, the operation when the pixel 10 is an effective pixel will be described with reference to Fig. 3. Fig. 3 is a graph showing the change in the cathode voltage VS of the light receiving element 100 in response to incident light and the detection signal PFout. Here, the operation of the pixel 10 shown in Fig. 1 will be described.

[0024] First, when pixel 10 is an effective pixel, a transistor (not shown) is set to off by a low control signal. At times before time t0, the cathode of light-receiving element 100 is supplied with power supply voltage VE, and the anode is supplied with power supply VDD. Therefore, a reverse voltage greater than the breakdown voltage VBD is applied to light-receiving element 100, setting the light-receiving element 100 in Geiger mode. In this state, the cathode voltage VS of light-receiving element 100 is equal to the power supply voltage VE.

[0025] When light is incident on the light receiving element 100 set to the Geiger mode, avalanche multiplication occurs, causing a current to flow through the light receiving element 100. Specifically, at time t0, when avalanche multiplication occurs and a current flows through the light receiving element 100, a current also flows through the p-type MOS transistor 26 acting as a constant current source, causing a voltage drop due to the resistance component of the transistor 26.

[0026] Furthermore, when the cathode voltage VS of the light-receiving element 100 becomes lower than 0 V, a reverse voltage smaller than the breakdown voltage VBD is applied to the light-receiving element 100, thereby stopping the avalanche amplification. Here, the current generated by the avalanche amplification flows through the transistor 26, causing a voltage drop, and the cathode voltage VS becomes lower than 0 V due to the voltage drop, thereby stopping the avalanche amplification, which is called a quench operation.

[0027] Then, when the avalanche amplification stops at time t2, the current flowing through the transistor 26 gradually decreases, and at time t4, the cathode voltage VS recovers to the original power supply voltage VE, and the photodetector 100 is ready to detect light anew (recharge operation).

[0028] For example, the inverter 24 outputs a Lo (Low) PFout signal when the cathode voltage VS, which is the input voltage, is equal to or higher than a predetermined threshold voltage Vth (=VE / 2), and outputs a Hi (High) PFout signal when the cathode voltage VS is lower than the predetermined threshold voltage Vth. In the example shown in FIG. 3 , a Hi (High) PFout signal is output during the period from time t1 to time t3.

[0029] When the pixel 10 is not an effective pixel, a high control signal is supplied from a pixel drive unit (not shown) to the gate of the transistor (not shown), turning on the transistor. As a result, the cathode voltage VS of the light receiving element 100 becomes 0 V (GND), and the anode-cathode voltage of the light receiving element 100 becomes equal to or lower than the breakdown voltage VBD. Therefore, even if light is incident on the light receiving element 100, no current is generated.

[0030] 1.2 Example of Configuration of Photodetection Device 501 The pixel 10 described above can be applied to, for example, a pixel of a photodetection device 501 shown in FIG. 4. Here, an example of the configuration of the photodetection device 501 will be described with reference to FIG. 4. FIG. 4 is a block diagram showing an example of the configuration of the photodetection device 501. As shown in FIG. 4, the photodetection device 501 includes, for example, a pixel drive unit 511, a pixel array unit 512, a MUX (multiplexer) 513, a time measurement unit 514, and an input / output unit 515. Details of each block included in the photodetection device 501 will be described below in order.

[0031] (Pixel Driving Unit 511) In the pixel array unit 512 described later, the pixels 10 are arranged in a matrix, and pixel driving lines 522 are wired in the horizontal direction for each row of the pixels 10. The pixel driving unit 511 drives each pixel 10 by supplying a predetermined driving signal to each pixel 10 via the pixel driving lines 522. Specifically, the pixel driving unit 511 can perform control to make some of the multiple pixels 10 arranged two-dimensionally in a matrix effective pixels, at a timing according to a light-emission timing signal supplied from the outside via the input / output unit 515 described later.

[0032] (Pixel Array Unit 512) The pixel array unit 512 has a configuration in which pixels 10, which detect light and output a detection signal PFout indicating the detection result as a pixel signal, are two-dimensionally arranged in a matrix in the row and column directions. The number of rows and columns of the pixels 10 in the pixel array unit 512 is not limited to the number shown in FIG. 4 . As described above, a pixel drive line 522 is wired horizontally for each pixel row in the matrix-like pixel arrangement of the pixel array unit 512. Although the pixel drive line 522 is shown as a single wire, it may also be configured with multiple wires. One end of the pixel drive line 522 is connected to an output terminal of the pixel drive unit 511 corresponding to each pixel row.

[0033] (MUX 513) The MUX 513 can select an output from an effective pixel in accordance with switching between effective pixels and non-effective pixels in the pixel array unit 512, and output the pixel signal input from the selected effective pixel to the time measurement unit 514, which will be described later.

[0034] (Time Measurement Unit 514) The time measurement unit 514 generates a count value corresponding to the time from when a light emission source emits light to when an effective pixel detects the light, based on the pixel signal of the effective pixel supplied from the MUX 513 and a light emission timing signal indicating the light emission timing of a light emission source (not shown). The light emission timing signal is supplied from the outside via the input / output unit 515, which will be described later.

[0035] (Input / Output Unit 515) The input / output unit 515 outputs the count value of the effective pixels supplied from the time measurement unit 514 as a pixel signal to the outside. The input / output unit 515 also supplies a light emission timing signal supplied from the outside to the pixel drive unit 511 and the time measurement unit 514.

[0036] 1.3 Configuration Example of Distance Measuring System 611 The light detection device 501 described above can be applied to, for example, the distance measuring system 611 shown in FIG. 5 . Here, an example configuration of the distance measuring system 611 will be described with reference to FIG. 5 . FIG. 5 is a block diagram showing an example configuration of the distance measuring system 611 incorporating the light detection device 501. The distance measuring system 611 is a system that captures a distance image using, for example, the ToF method. Here, the distance image is an image that detects the depth distance from the distance measuring system 611 to a subject for each pixel and is composed of distance pixel signals based on the detected distance. In more detail, as shown in FIG. 5 , the distance measuring system 611 includes an illumination device 621 and an imaging device 622. Below, the details of each block included in the distance measuring system 611 will be sequentially described.

[0037] (Lighting Device 621) As shown in Fig. 5 , the lighting device 621 has a lighting control unit 631 and a light source 632. The lighting control unit 631 controls the light emission pattern of the light source 632 under the control of the control unit 642 of the imaging device 622. Specifically, the lighting control unit 631 controls the light emission pattern of the light source 632 in accordance with an emission code included in an emission signal supplied from the control unit 642. For example, the emission code is composed of two values, 1 (High) and 0 (Low), and the lighting control unit 631 turns on the light source 632 when the emission code value is 1 and turns off the light source 632 when the emission code value is 0.

[0038] The light source 632 emits light in a predetermined wavelength range under the control of the illumination control unit 631. The light source 632 may be, for example, an infrared laser diode. The type of light source 632 and the wavelength range of the emitted light may be set as desired depending on the application of the distance measurement system 611, etc.

[0039] (Image capture device 622) The image capture device 622 is a device that receives reflected light that is generated when light (irradiated light) emitted from the lighting device 621 is reflected by the subject 612, the subject 613, etc. As shown in FIG. 5 , the image capture device 622 has an image capture unit 641, a control unit 642, a display unit 643, and a storage unit 644.

[0040] 5, the imaging unit 641 has a lens 651, a signal processing circuit 653, and a photodetector 501. The lens 651 can form an image of incident light on the light receiving surface of the photodetector 501. The lens 651 may have any configuration, and for example, the lens 651 may be formed of a group of multiple lenses.

[0041] The photodetector 501 can be the photodetector 501 described above. Under the control of the control unit 642, the photodetector 501 receives reflected light from the subjects 612, 613, etc., and supplies the resulting pixel signal to the signal processing circuit 653. The pixel signal indicates a digital count value that counts the time from when the illumination device 621 emits irradiation light to when the photodetector 501 receives the light. A light emission timing signal that indicates the timing at which the light source 632 emits light is supplied from the control unit 642 to the photodetector 501.

[0042] The signal processing circuit 653 processes pixel signals supplied from the photodetector 501 under the control of the control unit 642. For example, the signal processing circuit 653 detects the distance to the subjects 612 and 613 for each pixel based on the pixel signals supplied from the photodetector 501, and generates a distance image indicating the distance to the subjects 612 and 613 for each pixel 10. Specifically, the signal processing circuit 653 acquires the time (count value) from when the light source 632 emits light to when each pixel 10 of the photodetector 501 receives the light multiple times (e.g., thousands to tens of thousands of times) for each pixel 10. The signal processing circuit 653 creates a histogram corresponding to the acquired time. Then, by detecting peaks in the histogram, the signal processing circuit 653 determines the time it takes for the light emitted from the light source 632 to be reflected by the subject 612 or the subject 613 and return. Furthermore, the signal processing circuit 653 performs calculations to determine the distance to the subjects 612 and 613 based on the determined time and the speed of light. The signal processing circuit 653 supplies the generated distance image to the control unit 642 .

[0043] The control unit 642 is configured with a control circuit and a processor, such as a field programmable gate array (FPGA) or a digital signal processor (DSP). The control unit 642 controls the illumination control unit 631 and the photodetector 501. Specifically, the control unit 642 supplies an irradiation signal to the illumination control unit 631 and a light emission timing signal to the photodetector 501. The light source 632 emits irradiation light in response to the irradiation signal. The light emission timing signal may be the irradiation signal supplied to the illumination control unit 631. The control unit 642 also supplies the distance image acquired from the imaging unit 641 to the display unit 643, causing the display unit 643 to display the distance image. The control unit 642 also stores the distance image acquired from the imaging unit 641 in the memory unit 644. The control unit 642 also outputs the distance image acquired from the imaging unit 641 to an external device.

[0044] The display unit 643 is, for example, a panel display device such as a liquid crystal display device or an organic EL (Electro Luminescence) display device.

[0045] The storage unit 644 can be configured with any storage device or storage medium, and stores distance images and the like.

[0046] 1.4 Detailed Configuration of Light-Receiving Element 100a According to Comparative Example Next, with reference to FIGS. 6A and 6B , an example of the detailed configuration of a light-receiving element (photodiode) 100a according to a comparative example, which is compared with the embodiment of the present disclosure, will be described. FIG. 6A is a cross-sectional view illustrating an example of the configuration of the light-receiving element 100a according to the comparative example, and more specifically, corresponds to the cross-sectional view of the light-receiving element 100a taken along line B-B' in FIG. 6B. FIG. 6B is a plan view illustrating an example of the configuration of the light-receiving element 100a according to the comparative example, and more specifically, corresponds to the cross-sectional view of the light-receiving element 100a taken along line A-A' in FIG. 6A. In the following description, the light-receiving element 100a will be described as a back-illuminated type in which light is incident from the upper surface (back surface) of FIG. 6A. Here, the comparative example refers to the light-receiving element 100a that the inventors of the present disclosure had studied extensively before developing the embodiment of the present disclosure.

[0047] In the comparative example, as shown in FIG. 6A , the light-receiving element 100a mainly includes a well region 202, an n-type semiconductor region 210, a p-type semiconductor region 212, a hole accumulation film 204, a high-concentration p-type semiconductor region 222, an element isolation portion 108, and a transmission suppression portion 250, which are provided in a semiconductor substrate 200 made of a silicon substrate. The upper side of FIG. 6A corresponds to the back surface 200a of the semiconductor substrate 200, on which an on-chip lens 102 and the like are formed. The back surface 200a also serves as a light-receiving surface onto which light reflected from an object is incident. Meanwhile, the lower side of FIG. 6A corresponds to the front surface 200b of the semiconductor substrate 200, on which an insulating film 230 including wiring and a circuit (not shown) for driving the light-receiving element 100a is formed. Each element of the light-receiving element 100a will be described below.

[0048] The well region 202 is a region in the semiconductor substrate 200 with a low concentration of impurities having n-type or p-type conductivity, which generates charges (electrons) through photoelectric conversion and transfers the generated charges to the multiplication region.

[0049] In the light-receiving element 100a, a stacked body is provided in contact with the well region 202, in which the p-type semiconductor region 212 and the n-type semiconductor region 210 are stacked to form a pn junction. The multiplication region described above is formed by a depletion layer generated in the region where the p-type semiconductor region 212 and the n-type semiconductor region 210 are junctioned. The center of the n-type semiconductor region 210 is electrically connected to a cathode electrode 260 for supplying a positive voltage to form the multiplication region.

[0050] The hole accumulation film 204 is a p-type semiconductor region formed to cover the side surface of the well region 202, and can accumulate positive charges (holes) generated by photoelectric conversion. Specifically, the accumulated holes cause electrons generated due to the interface states between the element isolation region 108 and the semiconductor substrate 200 (described later) to recombine with the accumulated holes and disappear. This prevents the electrons from diffusing into the multiplication region, which is the pn junction. As a result, in the comparative example, the hole accumulation film 204 can reduce the influence of dark current due to the interface states.

[0051] Furthermore, a high-concentration p-type semiconductor region 222, which has a high concentration of p-type impurities, is provided in a region of the hole accumulation film 204 near the surface 200b of the semiconductor substrate 200. The high-concentration p-type semiconductor region 222 is electrically connected to the anode electrode 262. Therefore, a power supply voltage VSPAD is applied to the high-concentration p-type semiconductor region 222 via the anode electrode 262.

[0052] The element isolation portion 108 is provided to surround the light receiving element 100a and isolates it from other adjacent light receiving elements 100a. By providing the element isolation portion 108, electrical and optical crosstalk between adjacent light receiving elements 100a can be reduced.

[0053] Furthermore, a transmission suppressing portion 250 that suppresses light incident from the back surface (light-receiving surface) 200a from transmitting through the semiconductor substrate 200 is provided on the front surface 200b of the semiconductor substrate 200. The transmission suppressing portion 250 has an uneven structure configured by forming, for example, a plurality of trenches (STI (Shallow Trench Isolation)) that are concave relative to the front surface 200b of the semiconductor substrate 200. The transmission suppressing portion 250 with an uneven structure can scatter light into the semiconductor substrate 200. Therefore, by providing such a transmission suppressing portion 250, it is possible to suppress light incident from the back surface (light-receiving surface) 200a from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light-receiving element 100a.

[0054] 6A , in the comparative example, an on-chip lens 102 is provided on the back surface (light-receiving surface) 200 a of the semiconductor substrate 200. Light incident from the back surface 200 a side is condensed by the on-chip lens 102 and enters the semiconductor substrate 200.

[0055] 6B, in the comparative example, a multiplication region formed by a pn junction between the p-type semiconductor region 212 and the n-type semiconductor region 210 is located in the central region of the light-receiving element 100a. Furthermore, in the comparative example, a transmission suppressing portion 250 having an uneven structure is provided so as to surround the multiplication region.

[0056] Although the above-described light-receiving element 100a has been described as having a structure in which electrons are read out as signal charges (electric charges), the present invention is not limited to this and may have a structure in which holes are read out. In this case, each semiconductor region of the light-receiving element 100a has a conductivity type that is the inverse of the above-described conductivity type.

[0057] <<2. First Embodiment>> <2.1 Background> Next, a detailed description will be given of the background that led the inventors to create the first embodiment of the present disclosure, taking into account the configuration of the light receiving element 100a according to the comparative example described above.

[0058] As described above, in the comparative example, the multiplication region is located at the center of the light receiving element 100a, and further, a transmission suppression portion 250 having an uneven structure is provided so as to surround the multiplication region. Therefore, in the comparative example, as shown in FIG. 6A , the zero-order light (indicated by the arrow in the figure) incident from the back surface (light receiving surface) 200a is directly incident on the multiplication region, not on the transmission suppression portion 250. Therefore, in the comparative example, the zero-order light is not effectively scattered by the transmission suppression portion 250, and therefore, it is difficult to further improve the photon detection efficiency (PDE) of the light receiving element 100a according to the comparative example.

[0059] In view of this situation, the present inventors have come up with a first embodiment of the present disclosure that can further improve the PDE of the light receiving element 100. The details of the first embodiment of the present disclosure that the present inventors have created will be described below in order.

[0060] 2.2 Detailed Configuration First, a detailed configuration of the light-receiving element 100 according to the first embodiment of the present disclosure will be described with reference to FIGS. 7A and 7B . FIG. 7A is a cross-sectional view illustrating an example of the configuration of the light-receiving element 100 according to this embodiment, and more specifically, corresponds to the cross-sectional view of the light-receiving element 100 cut along line B-B′ in FIG. 7B . FIG. 7B is a plan view illustrating an example of the configuration of the light-receiving element 100 according to this embodiment, and more specifically, corresponds to the cross-sectional view of the light-receiving element 100 cut along line A-A′ in FIG. 7A . In the following description, the light-receiving element 100 is described as a back-illuminated type in which light is incident from the upper surface (back surface) of FIG. 7A . However, the light-receiving element 100 is not limited to a back-illuminated type, and may be a front-illuminated type in which light is incident from the front surface of the semiconductor substrate 200.

[0061] 7A , the photodetector 100 according to this embodiment, like the comparative example, mainly includes a well region (photoelectric conversion portion) 202, an n-type semiconductor region (second semiconductor layer) 210, a p-type semiconductor region (first semiconductor layer) 212, a hole accumulation film (hole accumulation region) 204, a high-concentration p-type semiconductor region (second contact portion) 222, an element isolation portion (element isolation wall) 108, and a transmission suppression portion 250, which are provided in a semiconductor substrate 200 made of, for example, a silicon substrate. Each element of the photodetector 100 will be described below in order.

[0062] As in the comparative example, the well region 202 is a region with a low impurity concentration in the semiconductor substrate 200 that has an n-type conductivity type (second conductivity type) or a p-type conductivity type (first conductivity type). The well region 202 photoelectrically converts light incident from the back surface (light-receiving surface) (first surface) 200a of the semiconductor substrate 200 to generate electric charges (electrons), and transfers the generated electric charges to the multiplication region.

[0063] Similarly to the comparative example, the photodetector 100 according to this embodiment includes a stacked structure in which a p-type semiconductor region 212 and an n-type semiconductor region 210 are stacked to form a p-n junction in contact with the well region 202. A depletion layer formed in the p-n junction region forms a multiplication region. More specifically, the multiplication region that amplifies charge is provided on the front surface (second surface) of the semiconductor substrate 200, opposite the back surface (light-receiving surface) 200a of the well region 202. As shown in FIG. 7A , the multiplication region is formed by stacking a p-type semiconductor region 212 provided on the well region 202 side and an n-type semiconductor region 210 provided on the front surface 200b side. The planar shapes of the p-type semiconductor region 212 and the n-type semiconductor region 210 are not limited to the rectangular shape shown in FIG. 7B , but may be circular, elliptical, polygonal, or the like. The central portion of the n-type semiconductor region 210 is provided on the surface 200b of the semiconductor substrate 200 and is electrically connected to a cathode electrode (first contact portion) 260 for supplying a positive voltage for forming a multiplication region. Details of the arrangement of the multiplication region made up of the p-type semiconductor region 212 and the n-type semiconductor region 210 in this embodiment will be described later.

[0064] Furthermore, in this embodiment as well, a transmission suppressing portion 250 that suppresses light incident from the back surface (light receiving surface) 200a from transmitting through the semiconductor substrate 200 is provided on the front surface 200b of the semiconductor substrate 200. The transmission suppressing portion 250 has an uneven structure that is configured by forming, for example, a plurality of trenches (STI) that are recessed in the front surface 200b of the semiconductor substrate 200. Furthermore, in this embodiment, for example, silicon oxide (SiO ２Alternatively, the transmission suppressing portion 250 may have an oxide film such as a silicon dioxide film embedded therein, or may have an uneven structure formed from polysilicon. In this embodiment, the number, size, and shape of the trenches in the transmission suppressing portion 250 are not particularly limited. Specifically, the trenches may have a depth of, for example, 100 nm or more, and the distance between the trenches may be, for example, 100 nm or more and 1000 nm or less. The transmission suppressing portion 250 having an uneven structure can scatter light into the semiconductor substrate 200. Therefore, in this embodiment, by providing such a transmission suppressing portion 250, it is possible to suppress light incident from the back surface (light-receiving surface) 200a from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light-receiving element 100. Details of the arrangement of the transmission suppressing portion 250 in this embodiment will be described later.

[0065] Also in this embodiment, as in the comparative example, a p-type semiconductor region is provided as the hole accumulation film 204, which is formed to cover the outer surface of the well region 202 and the inner surface of the element isolation region 108. The hole accumulation film 204 accumulates positive charges (holes) generated by photoelectric conversion, and the accumulated holes cause electrons, which are generated due to an interface state between the element isolation region 108 and the semiconductor substrate 200 (described later), to recombine with the accumulated holes and disappear. As a result, in this embodiment, it is possible to prevent the electrons from diffusing into the multiplication region, reduce the influence of dark current caused by the interface state, and improve the DCR (Dark Count Rate) of the photodiode 100.

[0066] 7A , in this embodiment as well, a high-concentration p-type semiconductor region 222 containing p-type impurities at a higher concentration than the hole accumulation film 204 is provided on the front surface 200b side of the hole accumulation film 204, which is the surface opposite to the back surface (light-receiving surface) 200a of the semiconductor substrate 200. The high-concentration p-type semiconductor region 222 is electrically connected to an anode electrode 262, and a power supply voltage VSPAD is applied via the anode electrode 262.

[0067] Furthermore, in this embodiment, as in the comparative example, as shown in FIG. 7A, the light receiving element 100 has an element isolation portion 108 that surrounds the light receiving element 100 and isolates it from other adjacent light receiving elements 100. The element isolation portion 108 is made of, for example, a silicon oxide film (SiO ２ Alternatively, the light receiving element 100 may have a double structure in which the outside of a metal layer such as tungsten (W) is covered with an insulating layer such as a silicon oxide film. In this embodiment, the element isolation portion 108 is provided to reduce electrical and optical crosstalk between adjacent light receiving elements 100.

[0068] Furthermore, in this embodiment, as in the comparative example, an on-chip lens 102 is provided on the back surface (light-receiving surface) 200a of the semiconductor substrate 200. Light incident from the back surface 200a side is condensed by the on-chip lens 102 and enters the semiconductor substrate 200. The on-chip lens 102 can be formed from, for example, a silicon nitride film (SiN) or a resin material such as a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer resin, or a siloxane-based resin.

[0069] In this embodiment, similarly to the comparative example, a silicon oxide (SiO ２ 7A , electrodes 260 and 262 and wiring (not shown) for connecting the light receiving element 100 to a circuit (not shown) for driving the light receiving element 100 are formed on the insulating film 230 on the front surface 200b side of the semiconductor substrate 200.

[0070] Furthermore, in this embodiment, unlike the comparative example, as shown in FIG. 7B , the multiplication region formed by stacking the p-type semiconductor region 212 and the n-type semiconductor region 210 is provided in a region other than the region of the pixel centroid 300 of the light receiving element 100. Specifically, in this embodiment, as shown in FIG. 7B , the multiplication region is provided adjacent to one of the four corners of the light receiving element 100. Note that in the following description, the pixel centroid 300 refers to the position on the light receiving surface (back surface) 200 a of the light receiving element 100 where the principal ray is incident. For example, in a light receiving element 100 located at the center of the pixel array section 512, the pixel centroid 300 is the center of the light receiving element 100, while in a light receiving element 100 located on the periphery of the pixel array section 512, the pixel centroid 300 is located at a position offset from the center of the light receiving element 100.

[0071] That is, in this embodiment, the multiplication region only needs to be arranged to avoid the pixel centroid 300 of the light receiving element 100, and if the pixel centroid 300 and the center of the light receiving element 100 do not coincide, the multiplication region may be arranged at the center of the light receiving element 100.

[0072] Furthermore, in this embodiment, as shown in Fig. 7B , a transmission suppression portion 250 having an uneven structure is provided around the multiplication region. By doing so, in this embodiment, zero-order light (indicated by the arrow in Fig. 7B ) incident from the back surface (light-receiving surface) 200a is incident on the transmission suppression portion 250. Therefore, in this embodiment, the light is effectively scattered into the semiconductor substrate 200 by the transmission suppression portion 250, and the light incident from the back surface 200a is suppressed from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light-receiving element 100.

[0073] As described above, in this embodiment, the multiplication region formed by stacking the p-type semiconductor region 212 and the n-type semiconductor region 210 is provided in a region other than the pixel centroid 300 region of the photodetector 100, and the transmission suppression portion 250 having an uneven structure is provided around the multiplication region. In this manner, in this embodiment, zero-order light incident from the rear surface (light-receiving surface) 200 a is incident on the transmission suppression portion 250. Therefore, in this embodiment, the light is effectively scattered into the semiconductor substrate 200 by the transmission suppression portion 250, and the light incident from the rear surface 200 a is suppressed from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the photodetector 100.

[0074] Although the above-described light-receiving element 100 has been described as having a structure in which electrons are read out as signal charges (electric charges), this embodiment is not limited to this, and the light-receiving element 100 may have a structure in which holes are read out. In this case, each semiconductor region of the light-receiving element 100 has a conductivity type that is the inverse of the above-described conductivity type.

[0075] In this embodiment, the light receiving element 100 is not limited to the configuration shown in FIGS. 7A and 7B, but can be modified into various other configurations.

[0076] <2.3 Modifications> (Modification 1) First, a detailed configuration of the light receiving element 100 according to Modification 1 will be described with reference to Fig. 8. Fig. 8 is a plan view showing an example of the configuration of the light receiving element 100 according to Modification 1, and corresponds to a cross-sectional view of the light receiving element 100 taken along line A-A' in Fig. 7A. Furthermore, Fig. 7A corresponds to a cross-sectional view of the light receiving element 100 taken along line B-B' in Fig. 8.

[0077] In the present modified example 1, as shown in FIG. 8 , the multiplication region formed by the pn junction of the p-type semiconductor region 212 and the n-type semiconductor region 210 is provided so as to avoid the pixel centroid 300, and specifically, is provided adjacent to one of the four sides of the light receiving element 100. Furthermore, in the present modified example 1, a transmission suppression portion 250 having an uneven structure is provided around the multiplication region. In this manner, in the present modified example 1, zero-order light incident from the back surface (light receiving surface) 200 a is incident on the transmission suppression portion 250. Therefore, in the present modified example 1, the light is effectively scattered into the semiconductor substrate 200 by the transmission suppression portion 250, and the light incident from the back surface 200 a is suppressed from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light receiving element 100. Furthermore, according to the present modification 1, by providing the multiplication region adjacent to one of the four sides of the light-receiving element 100, it is possible to alleviate the electric field concentration at the corners of the light-receiving element 100, compared to when the multiplication region is provided adjacent to one of the four corners of the light-receiving element 100. Therefore, according to the present modification 1, the electric field is applied uniformly to the entire light-receiving element 100, and further, the breakdown voltage of the light-receiving element 100 can be improved.

[0078] (Modification 2) Next, a detailed configuration of the light receiving element 100 according to Modification 2 will be described with reference to Fig. 9. Fig. 9 is a plan view showing an example of the configuration of the light receiving element 100 according to Modification 2, and corresponds to a cross-sectional view of the light receiving element 100 taken along line A-A' in Fig. 7A. Fig. 7A also corresponds to a cross-sectional view of the light receiving element 100 taken along line B-B' in Fig. 9.

[0079] In the present modification 2, as shown in FIG. 9 , the two multiplication regions each formed by stacking the p-type semiconductor region 212 and the n-type semiconductor region 210 are provided so as to avoid the pixel centroid 300. Specifically, the two multiplication regions are provided adjacent to two of the four corners of the light receiving element 100. Furthermore, in the present modification 2, a transmission suppression portion 250 having an uneven structure is provided around the two multiplication regions. In this manner, in the present modification 2, zero-order light incident from the back surface (light receiving surface) 200 a is incident on the transmission suppression portion 250. Therefore, in the present modification 2, the light is effectively scattered into the semiconductor substrate 200 by the transmission suppression portion 250, and the light incident from the back surface 200 a is suppressed from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light receiving element 100. Furthermore, according to this modification 2, by providing two multiplication regions, an electric field is applied uniformly to the entire light receiving element 100, thereby suppressing variations in characteristics among the multiple light receiving elements 100. Note that in this modification 2, the number of multiplication regions is not limited to two, and two or more multiplication regions may be provided.

[0080] (Variation 3) Next, a detailed configuration of the light receiving element 100 according to Variation 3 will be described with reference to Fig. 10. Fig. 10 is a plan view showing an example of the configuration of the light receiving element 100 according to Variation 3, and more specifically, corresponds to a cross-sectional view of the light receiving element 100 taken along line A-A' in Fig. 7A. Fig. 7A also corresponds to a cross-sectional view of the light receiving element 100 taken along line B-B' in Fig. 10.

[0081] In the third modification, the multiplication regions are also provided so as to avoid the pixel centroid 300. Specifically, in the third modification, as shown in FIG. 10 , one of the two multiplication regions formed by stacking the p-type semiconductor region 212 and the n-type semiconductor region 210 is provided adjacent to one of the four corners of the light-receiving element 100, and the other is provided adjacent to one of the four sides of the light-receiving element 100. Furthermore, in the third modification, a transmission suppression portion 250 having an uneven structure is provided around the two multiplication regions. In this manner, in the third modification, zero-order light incident from the back surface (light-receiving surface) 200 a is incident on the transmission suppression portion 250. Therefore, in the third modification, the transmission suppression portion 250 effectively scatters light into the semiconductor substrate 200, thereby suppressing the light incident from the back surface 200 a from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light-receiving element 100. Furthermore, according to the present modification 3, by providing two multiplication regions, an electric field is applied uniformly to the entire light receiving element 100, thereby suppressing variations in characteristics among the plurality of light receiving elements 100. Note that in the present modification 3, the number of multiplication regions is not limited to two, and two or more multiplication regions may be provided.

[0082] (Modification 4) Next, a detailed configuration of the light receiving element 100 according to Modification 4 will be described with reference to Fig. 11. Fig. 11 is a plan view showing an example of the configuration of the light receiving element 100 according to Modification 4, and corresponds to a cross-sectional view of the light receiving element 100 taken along line A-A' in Fig. 7A. Fig. 7A also corresponds to a cross-sectional view of the light receiving element 100 taken along line B-B' in Fig. 11.

[0083] In the fourth modification, the multiplication regions are also provided so as to avoid the pixel centroid 300. Specifically, in the fourth modification, as shown in FIG. 11 , of the five multiplication regions formed by stacking the p-type semiconductor region 212 and the n-type semiconductor region 210, three are provided adjacent to three of the four corners of the light-receiving element 100, and the remaining two are provided adjacent to two of the four sides of the light-receiving element 100. Furthermore, in the fourth modification, a transmission suppression portion 250 having an uneven structure is provided around the five multiplication regions. In this manner, in the fourth modification, zero-order light incident from the back surface (light-receiving surface) 200 a is incident on the transmission suppression portion 250. Therefore, in the fourth modification, the transmission suppression portion 250 effectively scatters light into the semiconductor substrate 200, thereby suppressing the light incident from the back surface 200 a from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light-receiving element 100. Furthermore, according to the fourth modification, by providing multiple multiplication regions, an electric field is applied uniformly to the entire photodetector 100, and the variation in characteristics among the multiple photodetectors 100 can be further suppressed.

[0084] (Modification 5) Next, a detailed configuration of the light receiving element 100 according to Modification 5 will be described with reference to Figures 12A and 12B. Figure 12A is a cross-sectional view showing an example of the configuration of the light receiving element 100 according to Modification 5, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line B-B' in Figure 12B. Figure 12B is a plan view showing an example of the configuration of the light receiving element 100 according to this embodiment, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line A-A' in Figure 12A.

[0085] In the fifth modification, the multiplication regions are also provided so as to avoid the pixel centroid 300. Specifically, in the fifth modification, as shown in FIGS. 12A and 12B , four multiplication regions each formed by stacking p-type semiconductor regions 212 and n-type semiconductor regions 210 are provided adjacent to each of the four corners of the light-receiving element 100. Furthermore, in the fifth modification, a transmission suppression portion 250 having an uneven structure is provided around the four multiplication regions. In this manner, in the fifth modification, zero-order light (indicated by the arrow in FIG. 12A ) incident from the rear surface (light-receiving surface) 200 a is incident on the transmission suppression portion 250. Therefore, in the fifth modification, the transmission suppression portion 250 effectively scatters light into the semiconductor substrate 200, thereby suppressing the light incident from the rear surface 200 a from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE) of the light-receiving element 100. Furthermore, according to this variant example 5, by providing four multiplication regions adjacent to all four corners of the photodetector 100, an electric field is applied uniformly to the entire photodetector 100, thereby further suppressing the variation in characteristics among multiple photodetectors 100 and the variation in characteristics within the photodetector 100 itself.

[0086] <<3. Second Embodiment>> <3.1 Detailed Configuration> Next, a detailed configuration of a light receiving element 100 according to a second embodiment of the present disclosure will be described with reference to Figures 13A and 13B. Figure 13A is a cross-sectional view illustrating an example of the configuration of the light receiving element 100 according to this embodiment, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line B-B' in Figure 13B. Figure 13B is a plan view illustrating an example of the configuration of the light receiving element 100 according to this embodiment, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line A-A' in Figure 13A.

[0087] 13A and 13B , in this embodiment, similarly to the first embodiment described above, a multiplication region formed by stacking a p-type semiconductor region 212 and an n-type semiconductor region 210 is provided adjacent to one of the four corners of the light-receiving element 100. Furthermore, in this embodiment as well, a transmission suppressing portion 250 having an uneven structure is provided around the multiplication region.

[0088] Furthermore, in this embodiment, as shown in FIGS. 13A and 13B , unlike the first embodiment, the high-concentration p-type semiconductor region 222 is not provided on the surface 200b side of the corner adjacent to the multiplication region (specifically, the n-type semiconductor region 210). That is, in this embodiment, the high-concentration p-type semiconductor region 222 is provided so as not to be adjacent to the multiplication region (specifically, the n-type semiconductor region 210). In this embodiment, the high-concentration p-type semiconductor region 222, which serves as the anode, can be further separated from the n-type semiconductor region 210 connected to the cathode. Therefore, this embodiment can mitigate electric field concentration at the corners of the photodiode 100, resulting in a uniform application of an electric field throughout the entire photodiode 100. Furthermore, this embodiment can improve the breakdown voltage of the photodiode 100.

[0089] 13A and 13B, the light receiving element 100 can be modified into various forms. Furthermore, this embodiment can be applied to the first embodiment and the modified examples described above.

[0090] <3.2 Modifications> (Modification 1) First, a detailed configuration of the light receiving element 100 according to Modification 1 will be described with reference to Fig. 14. Fig. 14 is a cross-sectional view showing an example of the configuration of the light receiving element 100 according to Modification 1, and more specifically, corresponds to a cross-sectional view of the light receiving element 100 taken along line BB' in Fig. 13B.

[0091] 14 , in this first modification, similarly to the second embodiment described above, a multiplication region formed by stacking a p-type semiconductor region 212 and an n-type semiconductor region 210 is provided adjacent to one of the four corners of the light-receiving element 100. Furthermore, in this first modification as well, a transmission suppressing portion 250 having an uneven structure is provided around the multiplication region.

[0092] Furthermore, in this first modification, as shown in FIG. 14 , the high-concentration p-type semiconductor region 222 and the hole accumulation film 204 are not provided on the surface 200b side of the corner adjacent to the multiplication region (specifically, the n-type semiconductor region 210). That is, in this first modification, the high-concentration p-type semiconductor region 222 and the hole accumulation film 204 are provided so as not to be adjacent to the multiplication region (specifically, the n-type semiconductor region 210). This modification can further separate the high-concentration p-type semiconductor region 222 containing p-type impurities from the hole accumulation film 204 and the n-type semiconductor region 210. Therefore, this modification can mitigate electric field concentration at the corners of the light-receiving element 100, resulting in a uniform application of an electric field throughout the entire light-receiving element 100. Furthermore, this modification can improve the breakdown voltage of the light-receiving element 100.

[0093] (Modification 2) Next, a detailed configuration of the light receiving element 100 according to Modification 2 will be described with reference to Figures 15A and 15B. Figure 15A is a cross-sectional view showing an example of the configuration of the light receiving element 100 according to Modification 2, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line B-B' in Figure 15B. Figure 15B is a plan view showing an example of the configuration of the light receiving element 100 according to Modification 2, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line A-A' in Figure 15A.

[0094] 15A and 15B , in this second modification, similarly to the second embodiment described above, an avalanche multiplication region formed by stacking the p-type semiconductor region 212 and the n-type semiconductor region 210 is provided adjacent to one of the four corners of the light-receiving element 100. Furthermore, in this second modification as well, a transmission suppressing portion 250 having an uneven structure is provided around the multiplication region.

[0095] Furthermore, in this second modification, silicon oxide (SiO ) is provided on the surface 200b side of the corner adjacent to the multiplication region (specifically, the n-type semiconductor region 210 ) instead of the high-concentration p-type semiconductor region 222 . ２An insulating layer 270 made of an insulating film such as an oxide film such as SiO 2 is provided. In this modification 2, by providing the insulating layer 270 near the multiplication region, it is possible to alleviate electric field concentration at corners of the photodetector 100 near the multiplication region, resulting in a uniform electric field being applied to the entire photodetector 100. Furthermore, according to this modification 2, the breakdown voltage of the photodetector 100 can be improved. Note that in this modification 2, a diffusion region (not shown) containing impurities with p-type conductivity may be provided to cover the insulating layer 270. In this manner, holes accumulated in the diffusion region can capture electrons generated at the interface of the insulating layer 270, thereby preventing the electrons from diffusing into the multiplication region. As a result, the influence of dark current due to electrons generated at the interface of the insulating layer 270 can be reduced.

[0096] <<4. Third Embodiment>> <4.1 Detailed Configuration> Next, a detailed configuration of a light receiving element 100 according to a third embodiment of the present disclosure will be described with reference to Figures 16A and 16B. Figure 16A is a cross-sectional view illustrating an example of the configuration of the light receiving element 100 according to this embodiment, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line B-B' in Figure 16B. Figure 16B is a plan view illustrating an example of the configuration of the light receiving element 100 according to this embodiment, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line A-A' in Figure 16A.

[0097] 16A and 16B , in this embodiment, similarly to the first embodiment described above, a multiplication region formed by stacking a p-type semiconductor region 212 and an n-type semiconductor region 210 is provided adjacent to one of the four corners of the light-receiving element 100. Furthermore, in this embodiment as well, a transmission suppressing portion 250 having an uneven structure is provided around the multiplication region.

[0098] Furthermore, in this embodiment, a diffusion region 214 containing p-type impurities is provided so as to cover the entire transmission suppression portion 250 having a concave-convex structure. In this embodiment, by providing the diffusion region 214 containing p-type impurities, charges (electrons) generated in the well region 202 located above the diffusion region 214 can be efficiently guided to the multiplication region, thereby improving the photon detection efficiency (PDE) of the photodetector 100. Furthermore, according to this embodiment, holes generated in the diffusion region 214 can capture electrons generated at the interface of the concave-convex structure of the transmission suppression portion 250, thereby preventing the electrons from diffusing into the multiplication region. As a result, according to this embodiment, the influence of dark current due to electrons generated at the interface of the concave-convex structure of the transmission suppression portion 250 can be reduced, thereby improving the DCR of the photodetector 100.

[0099] 16A and 16B, the light receiving element 100 can be modified into various forms. Furthermore, this embodiment can be applied to the first and second embodiments and the modifications thereof.

[0100] 4.2 Modifications (Modification 1) First, a detailed configuration of the light receiving element 100 according to Modification 1 will be described with reference to Fig. 17A and Fig. 17B. Fig. 17A is a cross-sectional view showing an example of the configuration of the light receiving element 100 according to Modification 1, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line B-B' in Fig. 17B. Fig. 17B is a plan view showing an example of the configuration of the light receiving element 100 according to Modification 1, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line A-A' in Fig. 17A.

[0101] 17A and 17B , in this first modification, similarly to the third embodiment described above, a multiplication region formed by stacking a p-type semiconductor region 212 and an n-type semiconductor region 210 is provided adjacent to one of the four corners of the light-receiving element 100. Furthermore, in this first modification as well, a transmission suppressing portion 250 having an uneven structure is provided around the multiplication region.

[0102] Furthermore, in this first modification, a diffusion region 216 containing p-type impurities is provided so as to cover only the upper surface of the transmission suppressing portion 250 having the uneven structure. In this first modification, by providing the diffusion region 216 containing p-type impurities, charges (electrons) generated in the well region 202 located above the diffusion region 216 can be efficiently guided to the multiplication region, thereby improving the photon detection efficiency (PDE) of the photodetector 100. Furthermore, according to this first modification, holes generated in the diffusion region 214 can capture electrons generated below the diffusion region 216, thereby preventing the electrons from diffusing into the multiplication region. As a result, according to this first modification, the influence of dark current due to electrons generated below the diffusion region 216 can be reduced, thereby improving the DCR of the photodetector 100.

[0103] (Modification 2) Next, a detailed configuration of the light receiving element 100 according to Modification 2 will be described with reference to Fig. 18. Fig. 18 is a cross-sectional view showing an example of the configuration of the light receiving element 100 according to Modification 2, and more specifically, corresponds to a cross-sectional view of the light receiving element 100 taken along line BB' in Fig. 16B.

[0104] In this second modification, as in the third embodiment described above, a multiplication region formed by stacking the p-type semiconductor region 212 and the n-type semiconductor region 210 is provided adjacent to one of the four corners of the light-receiving element 100. Furthermore, in this second modification, a transmission suppressing portion 250 having an uneven structure is provided around the multiplication region.

[0105] 18 , in this second modification, a diffusion region 214 containing p-type impurities is provided so as to cover only the lower portion of the side surface of the transmission suppressing portion 250 having the uneven structure. In this second modification, by providing the diffusion region 214 in this manner, the range of the well region 202 located above the diffusion region 214 is widened. According to this second modification, charges (electrons) generated over a wide range can be efficiently guided to the multiplication region, thereby improving the photon detection efficiency (PDE) of the light receiving element 100.

[0106] (Variation 3) Next, a detailed configuration of the light receiving element 100 according to Variation 3 will be described with reference to Figures 19A, 19B, and 19C. Figure 19A is a cross-sectional view showing an example of the configuration of the light receiving element 100 according to Variation 3, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line B-B' in Figure 19B. Figure 19B is a plan view showing an example of the configuration of the light receiving element 100 according to Variation 3, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line A-A' in Figure 17A. Figure 19B is a plan view showing an example of the configuration of the light receiving element 100 according to Variation 3, and more specifically, corresponds to the cross-sectional view of the light receiving element 100 taken along line C-C' in Figure 19A.

[0107] 19A , 19B, and 19C , two n-type semiconductor regions 210 and one p-type semiconductor region 212 are provided. One of the two n-type semiconductor regions 210 is provided adjacent to one of the four corners of the light-receiving element 100. The other of the two n-type semiconductor regions 210 is provided adjacent to one of the n-type semiconductor regions 210 at a position spaced apart from it. Furthermore, in this modification 3 as well, a transmission suppressing portion 250 having an uneven structure is provided around the two n-type semiconductor regions 210.

[0108] 19A and 19C , in Modification 3, a p-type semiconductor region 212 is provided so as to cover the two n-type semiconductor regions 210 and also to cover the upper surface of a portion of the transmission suppression portion 250 located around the two n-type semiconductor regions 210. That is, in Modification 3, the p-type semiconductor region 212 extends onto the upper surface of the portion of the transmission suppression portion 250 and covers the upper surface of the portion of the transmission suppression portion 250. By doing so, in Modification 3, holes generated in the p-type semiconductor region 212 can capture electrons generated at the interface of the uneven structure of the transmission suppression portion 250, thereby preventing the electrons from diffusing into the multiplication region. As a result, Modification 3 reduces the influence of dark current due to electrons generated at the interface of the uneven structure of the transmission suppression portion 250, thereby improving the DCR of the light-receiving element 100. In this third modification, the p-type semiconductor region 212 is not limited to the form shown in FIG. 19C, and furthermore, its area and shape are not particularly limited, and it may, for example, extend over the entire light receiving element 100.

[0109] 5. Fourth Embodiment Next, a detailed configuration of a light-receiving element 100 according to a fourth embodiment of the present disclosure will be described with reference to FIGS. 20A, 20B, and 20C. FIG. 20A is a cross-sectional view illustrating an example of the configuration of the light-receiving element 100 according to this embodiment. FIG. 20B is a plan view illustrating an example of the configuration of the light-receiving element 100 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the light-receiving element 100 taken along line A-A' in FIG. 20A. FIG. 20C is a plan view illustrating an example of the configuration of the light-receiving element 100 according to this embodiment, and shows an example having a different configuration from that shown in FIGS. 20A and 20B.

[0110] 20A and 20B , the unit light receiving elements 100 arranged in a 2×2 matrix within the pixel array section 512 may have multiplication regions in different positions within each light receiving element 100. Alternatively, as shown in FIG. 20C , the multiple light receiving elements 100 arranged in a matrix across the entire pixel array section 512 may have multiplication regions in different positions within each light receiving element 100 depending on their positions within the pixel array section 512. In this way, according to this embodiment, it is possible to further suppress variations in characteristics among the multiple light receiving elements 100 and variations in characteristics within each light receiving element 100.

[0111] 20A, 20B, and 20C, the light receiving element 100 can be modified into various forms. Furthermore, this embodiment can be applied to the first to third embodiments and the modifications thereof.

[0112] <<6. Fifth Embodiment>> Next, a detailed configuration of a light-receiving element 100 according to a fifth embodiment of the present disclosure will be described with reference to Fig. 21. Fig. 21 is a cross-sectional view illustrating an example of the configuration of the light-receiving element 100 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the light-receiving element 100 taken along line BB' in Fig. 7B.

[0113] In this embodiment, as shown in FIG. 21 , a reflection suppression portion 280 for suppressing light reflection is formed on the back surface (light-receiving surface) 200a of the semiconductor substrate 200. The reflection suppression portion 280 is configured by a concave-convex structure provided on the back surface 200a of the semiconductor substrate 200. For example, the reflection suppression portion 280 can be a concave-convex structure formed by providing, at a predetermined interval, a plurality of square pyramid shapes or inverted square pyramid shapes each having an inclination angle according to the plane indices of the crystal planes of the single-crystal silicon wafer that constitutes the semiconductor substrate 200. In the case of such a structure, for example, the plane indices of the crystal planes of the single-crystal silicon wafer can be set to 110 or 111, and the distance between adjacent vertices of the plurality of square pyramid shapes or inverted square pyramid shapes that constitute the reflection suppression portion 280 can be set to, for example, 200 nm or more and 1000 nm or less.

[0114] In this embodiment, by providing such a reflection suppression portion 280, light diffracted and reflected by the transmission suppression portion 250 is reflected by the reflection suppression portion 280 located on the back surface (light-receiving surface) 200a of the semiconductor substrate 200. As a result, in this embodiment, light is confined within the semiconductor substrate 200, and the photon detection efficiency (PDE) of the light-receiving element 100 can be improved.

[0115] In this embodiment, the light receiving element 100 is not limited to the form shown in Fig. 21 and can be modified into various forms. In addition, this embodiment can also be applied to the first to fourth embodiments and the modifications thereof described above.

[0116] <<7. Sixth Embodiment>> <7.1 Background> First, the details of the background that led the inventors to create the sixth embodiment of the present disclosure will be described.

[0117] In the conventional technology, the on-chip lenses 102 provided above the light receiving elements 100 are arranged according to so-called pupil correction in order to effectively utilize light even for light receiving elements 100 located on the periphery of the pixel array unit 512. Specifically, the on-chip lenses 102 corresponding to the light receiving elements 100 located in the center of the pixel array unit 512 (zero image height) are arranged so that their optical axes coincide with the center of the light receiving elements 100, while the on-chip lenses 102 corresponding to the light receiving elements 100 located on the periphery of the pixel array unit 512 (high image height) are arranged so that their optical axes are shifted from the center of the light receiving elements 100. In this manner, in the conventional technology, even for light receiving elements 100 located on the periphery of the pixel array unit 512, the shifted on-chip lenses 102 can guide obliquely incident chief rays into the interior of the light receiving elements 100, thereby enabling effective utilization of light.

[0118] However, even when such pupil correction of the on-chip lens 102 is performed, it may be difficult to properly guide light incident from the back surface (light-receiving surface) 200a of the semiconductor substrate 200 to the transmission suppression unit 250 in the light receiving elements 100 located in the outer periphery (high image height) of the pixel array unit 512. If the light cannot be properly guided to the transmission suppression unit 250, the light cannot be effectively scattered by the transmission suppression unit 250, making it difficult to improve the photon detection efficiency (PDE). Furthermore, in the light receiving elements 100 located in the outer periphery (high image height) of the pixel array unit 512, if the PDE degradation is significant, a large difference in the PDE of the light receiving elements 100 within the pixel array unit 512 may occur.

[0119] In view of this situation, the present inventors have come up with a sixth embodiment of the present disclosure that can further improve the photon detection efficiency (PDE) even for a light receiving element 100 located at the outer periphery (high image height) of the pixel array unit 512 where a chief ray is obliquely incident. Hereinafter, the sixth embodiment of the present disclosure that the present inventors have created will be described in detail one by one.

[0120] 7.2 Detailed Configuration First, a detailed configuration of the light receiving element 100 according to the sixth embodiment of the present disclosure will be described with reference to Fig. 22. Fig. 22 is a cross-sectional view illustrating an example of the configuration of the light receiving element 100 according to this embodiment.

[0121] As shown in FIG. 22 , the photodetector 100 according to this embodiment, like the first embodiment, mainly includes a well region 202, an n-type semiconductor region 210 (not shown), a p-type semiconductor region (not shown) 212, a hole accumulation film 204, an element isolation portion 108, and a transmission suppression portion 250, which are provided in a semiconductor substrate 200 made of, for example, a silicon substrate.

[0122] 22, in this embodiment, the light receiving element 100 has an element isolation portion 108 that surrounds the light receiving element 100 provided on the semiconductor substrate 200 and isolates it from other adjacent light receiving elements 100. The element isolation portion 108 is made of, for example, a silicon oxide film (SiO ２Alternatively, the light receiving element 100 may have a double structure in which the outside of a metal layer such as tungsten (W) is covered with an insulating layer such as a silicon oxide film. In this embodiment, the element isolation portion 108 is provided to reduce electrical and optical crosstalk between adjacent light receiving elements 100.

[0123] In this embodiment, a multiplication region formed by stacking a p-type semiconductor region 212 (not shown) and an n-type semiconductor region 210 (not shown) is provided in the semiconductor substrate 200. The n-type semiconductor region 210 is connected to a cathode (not shown) for supplying a positive voltage to form the multiplication region. The position of the multiplication region in the light-receiving element 100 of this embodiment is not particularly limited, and specific examples will be described later.

[0124] Furthermore, in this embodiment, as shown in FIG. 22 , the transmission suppression portion 250 has an uneven structure formed by forming, for example, multiple trenches (STI) that are concave relative to the surface 200 b of the semiconductor substrate 200. Furthermore, in this embodiment, an oxide film may be embedded in the trenches. Alternatively, in this embodiment, the uneven structure may be formed from polysilicon. Specifically, the trenches have a depth of, for example, 100 nm or more, and the distance between the trenches is, for example, 200 nm or more and 1000 nm or less. The transmission suppression portion 250 having an uneven structure can scatter light into the semiconductor substrate 200. In this embodiment, by providing the transmission suppression portion 250 in this manner, when zero-order light incident from the back surface (light-receiving surface) 200 a reaches the transmission suppression portion 250, the transmission suppression portion 250 suppresses the light from transmitting through the semiconductor substrate 200, thereby improving the photon detection efficiency (PDE).

[0125] In this embodiment, the well region 202 is a region with a low impurity concentration in the semiconductor substrate 200 that has n-type conductivity or p-type conductivity. The well region 202 photoelectrically converts light incident from the back surface (light-receiving surface) 200a of the semiconductor substrate 200 to generate charges (electrons), and transfers the generated charges to the multiplication region.

[0126] Also in this embodiment, as in the first embodiment, a p-type semiconductor region is provided as the hole accumulation film 204, which is formed to cover the outer surface of the well region 202 and the inner surface of the element isolation region 108. The hole accumulation film 204 accumulates positive charges (holes) generated by photoelectric conversion, and the accumulated holes cause electrons, which are generated due to an interface state between the element isolation region 108 and the semiconductor substrate 200 (described later), to recombine with the accumulated holes and disappear. As a result, in this embodiment, it is possible to prevent the electrons from diffusing into the multiplication region, reduce the influence of dark current caused by the interface state, and improve the DCR of the light-receiving element 100.

[0127] Furthermore, in this embodiment as well, a high-concentration p-type semiconductor region 222 (not shown) containing p-type impurities at a higher concentration than the hole accumulation film 204 is provided on the front surface 200b side of the hole accumulation film 204, which is the surface opposite to the back surface (light-receiving surface) 200a of the semiconductor substrate 200. The high-concentration p-type semiconductor region 222 is connected to an anode (not shown) to which a power supply voltage VSPAD is applied.

[0128] In this embodiment, similarly to the first embodiment, an insulating film 230 is formed on the surface of the semiconductor substrate 200 .

[0129] Furthermore, in this embodiment, unlike the first embodiment, a light guide section 110 is provided on the back surface (light receiving surface) 200a of the semiconductor substrate 200, as shown in FIG.

[0130] Specifically, the light guide unit 110 has multiple pillars 120 provided on the back surface (light receiving surface) 200a of the semiconductor substrate 200 via an anti-reflection film 114. The multiple pillars 120 have, for example, a columnar shape and differ from one another in width, height, spacing, or shape. More specifically, the width, height, spacing, or shape of each pillar 120 differs from one another depending on the position of the corresponding light receiving element 100 within the pixel array unit 512 and the position of the pillar 120 within the light receiving element 100. By forming the multiple pillars 120 in this manner, the phase difference of light changes locally, making it possible to control the direction of light using the pillars 120. Therefore, in this embodiment, the multiple pillars 120 can appropriately guide light incident on the light receiving element 100 to the transmission suppression unit 250.

[0131] When the light is near-infrared light, the pillars 120 can be formed of, for example, amorphous silicon, polycrystalline silicon, etc. When the light is visible light, the pillars 120 can be formed of, for example, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride oxide, silicon carbide, silicon oxide carbide, silicon nitride carbide, zirconium oxide, etc., or a laminate structure of these.

[0132] The height of the pillars 120 is, for example, 200 nm or more, the diameter of the pillars 120 is, for example, about several hundred nm, and the cross-sectional shape is not particularly limited, and may be rectangular, polygonal, circular, elliptical, cross-shaped, ring-shaped, L-shaped, etc. The spacing between the pillars 120 is equal to or less than the wavelength of the target light, and the arrangement of the pillars 120 may be, for example, a square arrangement or a hexagonal close-packed arrangement.

[0133] Furthermore, in this embodiment, an anti-reflection film 122 for suppressing reflection may be provided on the upper surface of the pillar 120. The anti-reflection films 114 and 122 may be formed of, for example, a silicon nitride film.

[0134] In this embodiment, fillers 116 are embedded between the pillars 120. As the filler 116, for example, organic materials such as siloxane resins, styrene resins, acrylic resins, and styrene-acrylic copolymer resins can be used. As the filler 116, silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon nitride oxide, silicon carbide, silicon oxide carbide, silicon nitride carbide, zirconium oxide, and stacked structures of these inorganic materials can also be used.

[0135] Furthermore, in this embodiment, an inorganic protective film 118 is formed on the filler 116, and has the function of protecting the filler 116. The inorganic protective film 118 can be formed of, for example, silicon oxide.

[0136] In this embodiment, as described above, the pillars 120 locally change the phase difference of light, making it possible to control the direction of light. Therefore, the plurality of pillars 120 can appropriately guide light incident on the light-receiving element 100 to the transmission suppression portion 250. Therefore, in this embodiment, the on-chip lens 102 that focuses the incident light on the light-receiving element 100 does not need to be provided. In this way, if the on-chip lens 102 is not provided, increases in the manufacturing cost and manufacturing time of the light-receiving element 100 can be suppressed. However, this embodiment is not limited to not providing the on-chip lens 102, and the on-chip lens 102 may be provided above the back surface (light-receiving surface) 200a of the semiconductor substrate 200. In this case, the position of the on-chip lens 102 may be subjected to pupil correction, which allows the incident light to be more reliably guided to the transmission suppression portion 250.

[0137] Next, examples of the positions of the multiplication region and the transmission suppression portion 250 will be described with reference to FIGS. 23A and 23B . FIGS. 23A and 23B are plan views illustrating an example of the configuration of a light-receiving element 100 according to this embodiment. In this embodiment, similar to the first embodiment of the present disclosure described above, for example, the multiplication region formed by a stack of a p-type semiconductor region 212 (not shown) and an n-type semiconductor region 210 may be provided in a region other than the center of the light-receiving element 100. Specifically, in this embodiment, for example, as shown in FIG. 23A , the multiplication region may be provided adjacent to one of the four corners of the light-receiving element 100. Furthermore, in the example of FIG. 23A , a transmission suppression portion 250 having an uneven structure is provided so as to surround the multiplication region. Note that in this embodiment, similar to the first embodiment described above, the multiplication region may be provided so as to avoid the pixel centroid 300 (not shown) of the light-receiving element 100, or may be provided at the center of the light-receiving element 100 if the pixel centroid 300 and the center of the light-receiving element 100 do not coincide. Furthermore, in this embodiment, when the position of the transmission suppression unit 250 (described later) is adjusted in accordance with the position (image height) of the light receiving element 100 in the pixel array unit 512, the position of the multiplication region may also be changed in accordance with the position of the transmission suppression unit 250. As described above, the pixel centroid 300 refers to the position at which the chief ray is incident on the light receiving surface (rear surface) 200a of the light receiving element 100. For example, for a light receiving element 100 located in the center of the pixel array unit 512, the pixel centroid 300 is the center of the light receiving element 100, and for a light receiving element 100 located on the periphery of the pixel array unit 512, the pixel centroid 300 is located at a position displaced from the center of the light receiving element 100.

[0138] Furthermore, in this embodiment, because the multiple pillars 120 can appropriately guide light incident on the light-receiving element 100 to the transmission suppression portion 250, the arrangement of the multiplication region and the transmission suppression portion 250 is not limited to the positions shown in FIG. 23A . In this embodiment, for example, as shown in FIG. 23B , a multiplication region formed by a stack of a p-type semiconductor region 212 (not shown) and an n-type semiconductor region 210 may be located at the center of the light-receiving element 100. Furthermore, in the example of FIG. 23B , a transmission suppression portion 250 formed by a concavo-convex structure is provided so as to surround the multiplication region. In other words, the positions of the multiplication region and the transmission suppression portion 250 within the light-receiving element 100 of this embodiment are not particularly limited. Furthermore, in this embodiment, the shapes of the p-type semiconductor region 212 and the n-type semiconductor region 210 in a planar view may be rectangular, circular, elliptical, polygonal, or the like.

[0139] Next, an example of a method for designing the pillars 120 of the light-guiding section 110 will be described with reference to Fig. 24 and Fig. 25. Fig. 24 and Fig. 25 are explanatory diagrams for explaining this embodiment.

[0140] In this embodiment, the multiple pillars 120 are designed to guide light to the transmission suppression section 250, avoiding the multiplication region. In this embodiment, for example, when the multiple pillars 120 are designed to guide light to the transmission suppression section 250 located at the center of the light receiving element 100, a lens 700 that guides light to the center of the light receiving element 100 and a prism having a polarization angle according to the position (image height) of each light receiving element 100 in the pixel array section 512 are virtually set, as shown in the upper part of Fig. 24 . Furthermore, in this embodiment, for example, when designing multiple pillars 120 to guide light to a transmission suppression section 250 located to the lower right of the light receiving element 100, as shown in the lower part of Figure 24, a lens 700 that guides light to the center of the light receiving element 100, a prism with an angle of polarization depending on the position (image height) of each light receiving element 100 in the pixel array section 512, and, for example, a right-angled triangular pyramid prism 710 that guides light to the lower right of the light receiving element 100 are virtually set.

[0141] Specifically, in this embodiment, a phase difference map showing the phase difference for each position of the prism is first derived. When the incident angle of light at a certain position x in the light receiving element 100 is θ, the size of the light receiving element 100 is D, and the wavelength of the light is λ, the phase difference ΔΦ required for perpendicular incidence is calculated. ｐｒｉ (x) can be calculated using the following formula (1).

[0142] Here, the phase difference of the prism in the x direction is shown, but it can be expanded two-dimensionally in the x-direction and y-direction to create a phase difference map of the prism.

[0143] Furthermore, if the lens shape and refractive index of the lens 700 are known, the phase difference can be calculated from the lens thickness and the wavelength of light corresponding to a certain position x in the light receiving element 100. For example, for a position (x, y), the lens thickness T(x, y) of the lens 700 and the refractive index n １ , the refractive index of the surroundings n ２ , the phase difference ΔΦ required for normal incidence when the wavelength of light is λ ｌｅｎｓ (x, y) can be calculated using the following equation (2).

[0144] 25, the phase difference maps are derived using the above formulas (1) and (2) for each of the lens 700, the prism having a polarization angle according to the position (image height) of each light receiving element 100 in the pixel array unit 512, and the right-angled triangular pyramid prism 710 that guides light to the lower right of the light receiving element 100. Furthermore, in this embodiment, as shown in the lower part of FIG. 25, the phase difference maps can be synthesized by simply adding up the phase difference maps for each position (section).

[0145] Next, in this embodiment, a phase difference library is created that links the phase difference with the diameter of the pillar 120, taking into consideration the pitch, height, refractive index, extinction coefficient, shape, and film configuration around the pillar 120 of the pillar 120. The phase difference library may be calculated by optical simulation, or may be obtained experimentally.

[0146] Next, in this embodiment, as shown in the lower part of Figure 25, a phase difference library is used to replace the phase difference of each pillar 120 with the pillar diameter from the phase difference map, thereby allowing the design of multiple pillars 120.

[0147] As described above, in this embodiment, the multiple pillars 120 of the light-guiding unit 110 locally change the phase difference of light, making it possible to control the direction of light, and the multiple pillars 120 can appropriately guide light incident on the light-receiving element 100 to the transmission suppression unit 250. As a result, according to this embodiment, the transmission suppression unit 250 can scatter light and suppress transmission of the light through the semiconductor substrate 200, thereby further improving the photon detection efficiency (PDE). In particular, even in a light-receiving element 100 that is located at the outer periphery of the pixel array unit 512 (where the image height is high) and where light is incident obliquely, the multiple pillars 120 can guide light to the transmission suppression unit 250, thereby improving the photon detection efficiency (PDE).

[0148] For example, in the on-chip lens 102 with pupil correction performed on the light-receiving element 100b according to the comparative example shown on the left side of FIG. 26 , which is an explanatory diagram illustrating this embodiment, it is difficult to properly guide zero-order light incident from the back surface (light-receiving surface) 200a of the semiconductor substrate 200 to the transmission suppression portion 250. However, in the light-receiving element 100 according to this embodiment shown on the right side of FIG. 26 , the properly designed pillars 120 allow the zero-order light incident from the back surface (light-receiving surface) 200a of the semiconductor substrate 200 to be guided to the transmission suppression portion 250 without following a complex path (for example, a path in which the light is reflected and refracted multiple times and bent multiple times). In particular, when the light-receiving surface of the light-receiving element 100 is narrow or when the film thickness of the semiconductor substrate 200 is thick relative to the area of ​​the light-receiving surface, it becomes difficult to guide the light to the transmission suppression portion 250 located on the front surface 200b of the semiconductor substrate 200 without being reflected by the element isolation portion 108. However, in this embodiment, the angle of incidence of light is appropriately adjusted by the plurality of pillars 120 , and therefore the light can be guided to the transmission suppressing portion 250 without being reflected by the element isolation portion 108 .

[0149] Although the above-described light-receiving element 100 has been described as having a structure in which electrons are read out as signal charges (electric charges), this embodiment is not limited to this, and the light-receiving element 100 may have a structure in which holes are read out. In this case, each semiconductor region of the light-receiving element 100 has a conductivity type that is the inverse of the above-described conductivity type.

[0150] 22 , 23A, and 23B , the light-receiving element 100 can be modified into various forms. Furthermore, the light-guiding unit 110 including the plurality of pillars 120 according to this embodiment can also be applied to the first to fifth embodiments and their modifications described above. By applying the plurality of pillars 120 according to the sixth embodiment to the first to fifth embodiments and their modifications described above, light can be more efficiently guided to the transmission suppressing unit 250, thereby further improving the photon detection efficiency (PDE). Furthermore, when such an application is performed, the light-guiding unit 110 can be used instead of or together with the on-chip lens 102.

[0151] <<8. Summary>> As described above, according to each embodiment of the present disclosure, the photon detection efficiency (PDE) of the light receiving element 100 can be further improved.

[0152] In each of the above-described embodiments of the present disclosure, the conductivity types of the semiconductor substrate 200 and the semiconductor regions may be reversed. For example, the present embodiments can be applied to a light-receiving element 100 that uses holes as signal charges. That is, in the above-described embodiments of the present disclosure, a light-receiving element 100 in which the first conductivity type is p-type, the second conductivity type is n-type, and electrons are used as signal charges has been described. However, the embodiments of the present disclosure are not limited to such examples. For example, the embodiments of the present disclosure can be applied to a light-receiving element 100 in which the first conductivity type is n-type, the second conductivity type is p-type, and holes are used as signal charges.

[0153] Furthermore, the light receiving element 100 according to the embodiment of the present disclosure is not limited to being applied to the light detection device 501 that is applied to the ranging system 611. For example, the light receiving element 100 according to the embodiment of the present disclosure may be applied to an imaging device that captures an image by detecting the distribution of incident light amounts of visible light. Furthermore, for example, the present embodiment may be applied to an imaging device that captures an image by detecting the distribution of incident amounts of infrared rays, X-rays, particles, etc., or an imaging device (physical quantity distribution detection device) such as a fingerprint detection sensor that detects the distribution of other physical quantities such as pressure or capacitance and captures the image.

[0154] In addition, in the embodiments of the present disclosure, examples of methods for forming the above-described layers, films, elements, etc. include physical vapor deposition (PVD) and chemical vapor deposition (CVD). Examples of PVD methods include vacuum deposition using resistance heating or high-frequency heating, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, RF (Radio Frequency)-DC (Direct Current) combined bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, high-frequency sputtering, etc.), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, MO (Metal Organic)-CVD, and photo-CVD. Other methods include electrolytic plating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing; stamping; spraying; and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Examples of patterning methods for each layer include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or a laser. Additionally, examples of planarization techniques include a CMP (Chemical Mechanical Polishing) method, a laser planarization method, a reflow method, etc. That is, the light-receiving element 100 according to the embodiment of the present disclosure can be manufactured easily and inexpensively using an existing semiconductor device manufacturing process.

[0155] <<9. Application Examples>> The above-described ranging system 611 can be applied to various electronic devices, such as a camera with a ranging function, a smartphone with a ranging function, and an industrial camera installed on a production line. Therefore, with reference to Fig. 27 , a configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described. Fig. 27 is a block diagram illustrating a configuration example of a smartphone 900 as an electronic device to which the ranging system 611 according to an embodiment of the present disclosure is applied.

[0156] 27 , the smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903. The smartphone 900 also includes a storage device 904, a communication module 905, and a sensor module 907. The smartphone 900 further includes the distance measurement system 611 described above, and also includes an imaging device 909, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. The smartphone 900 may also include a processing circuit such as a DSP (Digital Signal Processor) instead of or in addition to the CPU 901.

[0157] The CPU 901 functions as an arithmetic processing unit and control device, and controls all or part of the operations within the smartphone 900 in accordance with various programs recorded in the ROM 902, RAM 903, storage device 904, etc. The ROM 902 stores programs and calculation parameters used by the CPU 901. The RAM 903 temporarily stores programs used in the execution of the CPU 901 and parameters that change as appropriate during the execution. The CPU 901, ROM 902, and RAM 903 are interconnected by a bus 914. The storage device 904 is a data storage device configured as an example of a storage unit of the smartphone 900. The storage device 904 is configured, for example, by a magnetic storage device such as an HDD (hard disk drive), a semiconductor storage device, an optical storage device, etc. This storage device 904 stores programs executed by the CPU 901, various data, and various data acquired from outside.

[0158] The communication module 905 is a communication interface configured with, for example, a communication device for connecting to a communication network 906. The communication module 905 may be, for example, a communication card for a wired or wireless local area network (LAN), Bluetooth (registered trademark), or wireless USB (WUSB). The communication module 905 may also be a router for optical communication, a router for asymmetric digital subscriber line (ADSL), or a modem for various communications. The communication module 905 transmits and receives signals, for example, between the Internet and other communication devices using a predetermined protocol such as TCP / IP. The communication network 906 connected to the communication module 905 is a wired or wireless network, for example, the Internet, a home LAN, infrared communication, or satellite communication.

[0159] The sensor module 907 includes various sensors such as a motion sensor (e.g., an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biometric information sensor (e.g., a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (e.g., a GNSS (Global Navigation Satellite System) receiver, etc.).

[0160] The distance measurement system 611 is provided on the surface of the smartphone 900, and can obtain, for example, the distance and three-dimensional shape of subjects 612 and 613 facing the surface as distance measurement results.

[0161] The imaging device 909 is provided on the surface of the smartphone 900 and can capture images of an object 800 or the like located around the smartphone 900. Specifically, the imaging device 909 may include an imaging element (not shown) such as a complementary metal-oxide semiconductor (CMOS) image sensor, and a signal processing circuit (not shown) that performs imaging signal processing on a signal photoelectrically converted by the imaging element. Furthermore, the imaging device 909 may further include an optical system mechanism (not shown) including an imaging lens, an aperture mechanism, a zoom lens, a focus lens, and the like, and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. The imaging element collects incident light from subjects 612 and 613 as an optical image, and the signal processing circuit photoelectrically converts the formed optical image for each light receiving element 100, reads out the signal from each light receiving element 100 as an imaging signal, and performs image processing to obtain a captured image. The light receiving element 100 according to an embodiment of the present disclosure may be applied to the imaging device 909.

[0162] The display device 910 is provided on the surface of the smartphone 900 and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display. The display device 910 can display an operation screen, an image captured by the imaging device 909 described above, and the like.

[0163] The speaker 911 can output, for example, telephone call audio and audio accompanying the video content displayed by the display device 910 described above to the user.

[0164] The microphone 912 can collect, for example, the user's voice during a call, voice including commands to activate functions of the smartphone 900, and voice from the surrounding environment of the smartphone 900.

[0165] The input device 913 is a device operated by a user, such as a button, a keyboard, a touch panel, or a mouse. The input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the signal to the CPU 901. By operating the input device 913, the user can input various data to the smartphone 900 and instruct processing operations.

[0166] The above describes an example configuration of the smartphone 900. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be changed as appropriate depending on the technical level at the time of implementation.

[0167] <<10. Supplementary Information>> Although preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modified or altered examples within the scope of the technical idea described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure.

[0168] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0169] The present technology can also be configured as follows. (1) A photodetector including a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light-receiving elements include: a photoelectric conversion unit provided in the semiconductor substrate and generating charge in response to light incident from a first surface that is a light-receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite the first surface and suppressing transmission of the light through the semiconductor substrate; and one or more multiplication regions provided on the second surface side of the semiconductor substrate and amplifying charge from the photoelectric conversion unit, wherein when the light-receiving elements are viewed from above the semiconductor substrate, the one or more multiplication regions are located in a region excluding a pixel center of gravity region of the light-receiving elements. (2) The photodetector according to (1), wherein the transmission suppression unit is provided around the multiplication region. (3) The photodetector according to (1) or (2), wherein the transmission suppression unit is formed of an uneven structure provided on the second surface. (4) The photodetector according to any one of (1) to (3), wherein at least one of the multiplication regions is adjacent to one of four corners of the photodetector when the photodetector is viewed from above the semiconductor substrate. (5) The photodetector according to any one of (1) to (3), wherein at least one of the multiplication regions is adjacent to one of four sides of the photodetector when the photodetector is viewed from above the semiconductor substrate. (6) The photodetector according to any one of (1) to (5), wherein the photodetector further includes: an element isolation wall surrounding the photodetector; a hole accumulation region provided so as to cover an inner side surface of the element isolation wall; a first contact portion provided on the second surface side of the multiplication region; and a second contact portion provided on the second surface of the hole accumulation region. (7) The photodetector device according to (6), wherein the multiplication region has: a first semiconductor layer provided on the photoelectric conversion section side and containing impurities of a first conductivity type; and a second semiconductor layer stacked on the first semiconductor layer and containing impurities of a second conductivity type opposite to the first conductivity type.(8) The photodetector according to (7) above, wherein the hole accumulation region contains the impurity of the first conductivity type, and the second contact portion contains the impurity of the first conductivity type at a higher concentration than the hole accumulation region. (9) The photodetector according to (8) above, wherein the second contact portion is provided so as not to be adjacent to the second semiconductor layer of the multiplication region. (10) The photodetector according to (9) above, wherein the hole accumulation region is provided so as not to be adjacent to the second semiconductor layer of the multiplication region. (11) The photodetector according to (7) or (8) above, wherein the light receiving element further includes an insulating layer adjacent to the second semiconductor layer of the multiplication region. (12) The photodetector according to (7) or (8) above, wherein the light receiving element further includes a diffusion region containing the impurity of the first conductivity type, provided so as to cover at least a portion of the surface of the transmission suppressing portion. (13) The photodetector according to (12) above, wherein the diffusion region is provided so as to cover an upper surface of the transmission suppressing portion. (14) The photodetector according to (13), wherein the diffusion region is provided so as to further cover a side surface of the transmission suppression portion. (15) The photodetector according to (7) or (8), wherein the second semiconductor layer is provided so as to extend onto an upper surface of a portion of the transmission suppression portion. (16) The photodetector according to any one of (1) to (15), wherein the position of the multiplication region within each light-receiving element is different for each light-receiving element when the photodetector is viewed from above the semiconductor substrate. (17) The photodetector according to any one of (1) to (16), wherein the light-receiving element further includes a reflection suppression portion having an uneven structure provided on the first surface. (18) The photodetector according to any one of (1) to (17), wherein the light-receiving element further includes a light-guiding portion formed of a plurality of pillars provided on the first surface and guiding the light to the transmission suppression portion. (19) The photodetector according to (18), wherein the plurality of pillars are different from one another in width, height, interval, or shape.(20) A photodetector including a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light-receiving elements include: a photoelectric conversion unit provided in the semiconductor substrate and generating charge in response to light incident from a first surface that is a light-receiving surface of the semiconductor substrate; a transmission suppressing unit provided on a second surface of the semiconductor substrate opposite the first surface and suppressing transmission of the light through the semiconductor substrate; one or more multiplication regions provided on the second surface side in the semiconductor substrate and amplifying charge from the photoelectric conversion unit; and a light guiding unit made of a plurality of pillars provided on the first surface and guiding the light to the transmission suppressing unit. (21) The photodetector according to (20), wherein the plurality of pillars differ from one another in width, height, spacing, or shape. (22) The photodetector according to (22), wherein the plurality of pillars have an anti-reflection film on an upper surface. (23) The photodetector according to (21) or (22), wherein the plurality of pillars include at least one of amorphous silicon, polycrystalline silicon, germanium, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride oxide, silicon carbide, silicon oxide carbide, silicon nitride carbide, and zirconium oxide. (24) The detection device according to any one of (21) to (23), wherein the height of the plurality of pillars is 200 nm or more. (25) The photodetector according to any one of (20) to (24), wherein the transmission suppressing portion is formed of a concave-convex structure provided on the second surface. (26) The photodetector according to any one of (20) to (25), wherein the interval between convex portions of the concave-convex structure is 200 nm or more and 1000 nm or less. (27) The photodetector according to any one of (20) to (26), wherein the concave-convex structure is formed by a trench filled with an oxide film or by polysilicon. (28) The photodetector according to any one of (20) to (27), wherein the light receiving element further includes an on-chip lens provided on the first surface.(29) An electronic device equipped with a photodetector, wherein the photodetector includes a plurality of light receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light receiving elements are provided within the semiconductor substrate and comprise: a photoelectric conversion unit that generates electric charges by light incident from a first surface that is a light receiving surface of the semiconductor substrate; a transmission suppression unit that is provided on a second surface of the semiconductor substrate opposite to the first surface and suppresses the light from passing through the semiconductor substrate; and one or more multiplication regions that are provided on the second surface side in the semiconductor substrate and amplify electric charges from the photoelectric conversion unit; and wherein when the light receiving elements are viewed from above the semiconductor substrate, the one or more multiplication regions are located in an area excluding a pixel center of gravity area of ​​the light receiving elements. (30) An electronic device equipped with a photodetector, wherein the photodetector includes a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, and the light-receiving elements each include: a photoelectric conversion unit provided in the semiconductor substrate and generating electric charges from light incident from a first surface which is a light-receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite to the first surface and suppressing the light from passing through the semiconductor substrate; one or more multiplication regions provided on the second surface side in the semiconductor substrate and amplifying electric charges from the photoelectric conversion unit; and a light-guiding unit provided on the first surface and consisting of a plurality of pillars and guiding the light to the transmission suppression unit.

[0170] 10 Pixel 24 Inverter 26 Transistor 100, 100a, 100b Light receiving element 102 On-chip lens 108 Element isolation section 110 Light guiding section 114, 122 Anti-reflection film 116 Filler 118 Inorganic protective film 120 Pillar 200 Semiconductor substrate 200a Back surface (light receiving surface) 200b Front surface 202 Well region 204 Hole accumulation film 210 N-type semiconductor region 212 P-type semiconductor region 214, 216 Diffusion region 222 High concentration p-type semiconductor region 230 Insulating film 250 Transmission suppression section 260 Cathode electrode 262 Anode electrode 270 Insulating layer 280 Reflection suppression section 300 Pixel center of gravity 501 Photodetector 511 Pixel driving section 512 Pixel array unit 513 MUX 514 Time measurement unit 515 Input / output unit 522 Pixel drive line 611 Distance measurement system 612, 613 Object 621 Illumination device 622 Imaging device 631 Illumination control unit 632 Light source 641 Imaging unit 642 Control unit 643 Display unit 644 Storage unit 651, 700 Lens 653 Signal processing circuit 710 Prism 900 Smartphone 901 CPU 902 ROM 903 RAM 904 Storage device 905 Communication module 906 Communication network 907 Sensor module 909 Imaging device 910 Display device 911 Speaker 912 Microphone 913 Input device 914 Bus

Claims

1. A photodetection device comprising a plurality of light receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light receiving elements comprise: a photoelectric conversion unit provided within the semiconductor substrate and generating electric charges in response to light incident from a first surface which is the light receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite the first surface and suppressing the light from passing through the semiconductor substrate; and one or more multiplication regions provided on the second surface side of the semiconductor substrate and amplifying electric charges from the photoelectric conversion units, wherein when the light receiving elements are viewed from above the semiconductor substrate, the one or more multiplication regions are located in an area excluding the pixel center of gravity area of ​​the light receiving elements.

2. The photodetector according to claim 1, wherein the transmission suppressing portion is provided around the multiplication region.

3. The light detection device according to claim 1, wherein the transmission suppressing portion is formed by a concave-convex structure provided on the second surface.

4. The photodetector according to claim 1, wherein, when the photodetector is viewed from above the semiconductor substrate, at least one of the multiplication regions is adjacent to one of four corners of the photodetector.

5. The photodetector according to claim 1, wherein, when the photodetector is viewed from above the semiconductor substrate, at least one of the multiplication regions is adjacent to one of four sides of the photodetector.

6. The photodetector according to claim 1, wherein the light-receiving element further comprises: an element isolation wall surrounding the light-receiving element; a hole accumulation region provided so as to cover the inner surface of the element isolation wall; a first contact portion provided on the second surface side of the multiplication region; and a second contact portion provided on the second surface of the hole accumulation region.

7. The photodetector device according to claim 6, wherein the multiplication region comprises: a first semiconductor layer provided on the photoelectric conversion section side and containing impurities of a first conductivity type; and a second semiconductor layer stacked on the first semiconductor layer and containing impurities of a second conductivity type opposite to the first conductivity type.

8. The photodetector according to claim 7, wherein the hole accumulation region contains impurities of the first conductivity type, and the second contact portion contains impurities of the first conductivity type at a higher concentration than the hole accumulation region.

9. The photodetector according to claim 8, wherein said second contact portion is provided so as not to be adjacent to said second semiconductor layer of said multiplication region.

10. The photodetector device according to claim 9, wherein the hole accumulation region is provided so as not to be adjacent to the second semiconductor layer of the multiplication region.

11. The photodetector device of claim 7, wherein said photodetector further comprises an insulating layer adjacent said second semiconductor layer of said multiplication region.

12. The photodetector according to claim 7, wherein the light receiving element further comprises a diffusion region containing impurities of the first conductivity type, the diffusion region being provided so as to cover at least a portion of the surface of the transmission suppressing portion.

13. The photodetector according to claim 7, wherein the second semiconductor layer is provided so as to extend onto a top surface of a portion of the transmission suppressing portion.

14. The photodetector according to claim 1, wherein when the photodetector is viewed from above the semiconductor substrate, the position of the multiplication region within each photodetector is different for each photodetector.

15. A photodetector comprising a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light-receiving elements comprise: a photoelectric conversion unit provided within the semiconductor substrate and generating electric charges in response to light incident from a first surface which is the light-receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite the first surface and suppressing the light from passing through the semiconductor substrate; one or more multiplication regions provided on the second surface side within the semiconductor substrate and amplifying electric charges from the photoelectric conversion units; and a light-guiding unit provided on the first surface and consisting of a plurality of pillars and guiding the light to the transmission suppression unit.

16. The photodetector device according to claim 15, wherein the plurality of pillars differ from one another in width, height, spacing, or shape.

17. The light detection device according to claim 15, wherein the transmission suppressing portion is formed of an uneven structure provided on the second surface.

18. The photodetector device according to claim 17, wherein the uneven structure is formed by a trench filled with an oxide film or by polysilicon.

19. An electronic device equipped with a photodetector, wherein the photodetector includes a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, wherein the light-receiving elements each include: a photoelectric conversion unit provided within the semiconductor substrate and generating electric charges in response to light incident from a first surface, which is the light-receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite the first surface, and suppressing the light from passing through the semiconductor substrate; and one or more multiplication regions provided on the second surface side within the semiconductor substrate and amplifying electric charges from the photoelectric conversion unit; and wherein when the light-receiving elements are viewed from above the semiconductor substrate, the one or more multiplication regions are located in an area excluding the pixel center of gravity area of ​​the light-receiving elements.

20. An electronic device equipped with a photodetector, wherein the photodetector includes a plurality of light-receiving elements arranged in a matrix on a semiconductor substrate and detecting light, and each of the light-receiving elements comprises: a photoelectric conversion unit provided within the semiconductor substrate and generating electric charges from light incident from a first surface which is the light-receiving surface of the semiconductor substrate; a transmission suppression unit provided on a second surface of the semiconductor substrate opposite to the first surface and suppressing the light from passing through the semiconductor substrate; one or more multiplication regions provided on the second surface side within the semiconductor substrate and amplifying electric charges from the photoelectric conversion unit; and a light-guiding unit provided on the first surface and consisting of a plurality of pillars and guiding the light to the transmission suppression unit.

Images