System and method for plasma process

The tailored bias waveform pulser circuit addresses the challenge of precise ion energy and angular distribution control in plasma processing, enhancing etch rate and material selectability while reducing energy consumption and improving throughput in semiconductor devices.

WO2025243102A1PCT designated stage Publication Date: 2025-11-27TOKYO ELECTRON LTD +1
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
PCT/IB2025/053490
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-05-24
Filing Date
2025-04-02
Publication Date
2025-11-27

AI Technical Summary

Technical Problem

Existing plasma processing technologies face challenges in achieving precise control over etch ion energies and ion angular distributions, particularly in next-generation semiconductor devices with three-dimensional structures, leading to inefficiencies in material selectability and throughput.

Method used

A tailored bias waveform pulser circuit using current and voltage sources with a high-voltage switch separates discharge and charge regions, generating a constant sheath voltage through multiple sinusoidal pulses and a negative linear slope, allowing precise control of wafer sheath voltage.

Benefits of technology

This approach enhances etch rate and material selectability, reduces energy consumption, and improves ion angular distribution, addressing the challenges of high aspect ratio processes and reducing aspect ratio dependent etching effects.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure IB2025053490_27112025_PF_FP_ABST
    Figure IB2025053490_27112025_PF_FP_ABST
Patent Text Reader

Abstract

A method for plasma processing includes providing a substrate into a plasma processing chamber, generating a plasma in the plasma processing chamber by providing source power to a top electrode of the plasma processing chamber, and biasing a bottom electrode of the plasma processing chamber by providing a waveform voltage to the bottom electrode. The waveform voltage includes: a discharging step including multiple sinusoidal pulses, and a biasing step including a negative linear slope.
Need to check novelty before this filing date? Find Prior Art

Citation Information

Patent Citations

  • Homing apparatus for throttle valve

    KR1020250119906A

  • Ion current droop compensation

    US20220037122A1

  • Power generator with partial sinusoidal waveform, plasma processing apparatus including the same and method of manufacturing semiconductor device using the same

    US20240128892A1

  • Apparatus and method of ion current compensation

    WO2022265838A1

  • Ion energy distribution control over substrate edge with non-sinusoidal voltage source

    WO2023225033A1