Boost converter circuit and electric conveyor provided therewith

Abstract

A boost converter circuit (1) is provided with a reactor (L1), a first half-bridge circuit (10), a second half-bridge circuit (20), a first boost capacitor (C1), a second boost capacitor (C2), a smoothing capacitor (C0) for smoothing the output from an output line linking to a connection line connecting the first boost capacitor and the second boost capacitor, and a switching control circuit (15) for executing control with separate excitation so that the first half-bridge circuit and the second half-bridge circuit perform a switching operation in antiphase. A current pathway for superimposing the voltage of the second boost capacitor onto the voltage of a voltage source and charging the first boost capacitor, and a second current pathway for superimposing the voltage of the first boost capacitor onto the voltage of the voltage source and outputting same are implemented.

Description

Boost converter circuit and electric transport equipped with same

[0001] The present invention relates to a boost converter circuit.

[0002] A boost converter (boost converter) is a DC-DC conversion device for obtaining an output at a voltage higher than the input voltage, and is sometimes called a boost chopper, boost converter, etc. Boost converters used in power conditioner circuits in solar power generation, hybrid electric vehicles (HEVs), electric vehicles (EVs), other electric transport vehicles, etc. are provided with a reactor.

[0003] Patent Document 1 listed below discloses a DC-DC converter including a reactor, an inverter circuit including at least one bit inverter connected downstream of the reactor and having a capacitor and a bridge circuit, a smoothing capacitor that smoothes the output of the inverter circuit, a short-circuit switch that switches between a charge mode and a discharge mode, and a control unit.

[0004] Japanese Patent Application Laid-Open No. 2022-132132

[0005] In existing boost converters that include a reactor, the ripple factor increases along with the reactor current, particularly in high-power applications, and a high-inductance reactor must be used to suppress this, resulting in a problem of increased reactor size. In this regard, the DC-DC converter disclosed in Patent Document 1 uses a switched capacitor that can be configured with low inductance, thereby achieving a smaller reactor.

[0006] However, in the DC-DC converter disclosed in Patent Document 1, when bit inverters are connected in multiple stages to increase the magnification of the output voltage, there is a problem in that the switching timing control of each switch element becomes complicated in order to ensure a low ripple rate of the reactor current.

[0007] The present invention has been made in view of the above problems, and provides a boost converter circuit that enables the boost reactor to be miniaturized even in high-power applications.

[0008] One aspect of the present invention is a boost converter circuit comprising: a reactor that can be connected in series to a DC voltage source; a first half-bridge circuit connected to the reactor; a first boost capacitor connected to a midpoint of the first half-bridge circuit, the charging and discharging of which are switched by a switching operation of the first half-bridge circuit; a second half-bridge circuit connected in parallel to the first half-bridge circuit; a second boost capacitor connected to the midpoint of the second half-bridge circuit, the charging and discharging of which are switched by a switching operation of the second half-bridge circuit; a smoothing capacitor that smoothes output from an output line that is connected to a connection line that connects the first boost capacitor and the second boost capacitor; and a switching control circuit that controls the first half-bridge circuit and the second half-bridge circuit by a separate excitation method so that the switching operation of the first half-bridge circuit is in opposite phase, wherein, under the control of the switching control circuit, a first current path that charges the first boost capacitor by superimposing the voltage of the second boost capacitor on the voltage of the voltage source, and a second current path that outputs the voltage of the first boost capacitor by superimposing it on the voltage of the voltage source from the output line.

[0009] Another aspect of the present invention is a bidirectional converter circuit including the above-mentioned boost converter circuit, a first terminal to which the voltage source and the reactor can be connected, a second terminal to which the voltage smoothed by the smoothing capacitor can be output, a plurality of reverse-conducting switching elements including a reverse-conducting switching element provided in the output line, and a control circuit that controls the conduction directions of the plurality of reverse-conducting switching elements to switch the input and output of power of the boost converter circuit in reverse directions, thereby causing the boost converter circuit to also operate as a buck converter circuit. Another aspect of the present invention is an electric transport including a power conversion mechanism including the above-mentioned boost converter circuit or the above-mentioned bidirectional converter circuit.

[0010] According to the above-described aspects, it is possible to provide a boost converter circuit that enables the boost reactor to be miniaturized even in high-power applications.

[0011] 1 is a circuit diagram of a boost converter circuit (present circuit) according to a first embodiment. FIG. 2 is a diagram illustrating an example of operation of the boost converter circuit (present circuit) according to the first embodiment. FIG. 3 is a circuit diagram of a boost converter circuit (present modified circuit) according to a first modified example. FIG. 4 is a circuit diagram of a boost converter circuit (present circuit) according to a second embodiment. FIG. 5 is a schematic diagram of a boost converter circuit according to a fifth embodiment. FIG. 6 is a graph showing the relationship between duty and boost ratio. FIG. 7(A) is a diagram showing a drive signal in gradation mode, and FIG. 7(B) is a diagram showing a drive signal in improved chopper mode. FIG. 7 is a diagram showing changes in the output voltage and the voltage of each boost capacitor when transitioning from gradation mode to chopper mode. FIG. 8 is a schematic diagram of a boost converter circuit according to a sixth embodiment. FIG. 9 is a circuit diagram of a bidirectional converter circuit as a modified example. FIG. 10 is a graph showing simulation results of Example 1. FIG. 11 is a graph showing circuit startup characteristics when soft start control is not applied to the circuit configuration of the first embodiment, and FIG. 12 is a graph showing circuit startup characteristics when soft start control is applied to the circuit configuration of the first embodiment (fourth embodiment). 13A is a graph showing changes in the output voltage (Vout) and the voltages (V1, V2, and V3) of the boost capacitors C1, C2, and C3 with changes in duty in Example 5, and Fig. 13B is a graph showing changes in the power supply current with changes in duty in Example 5. Graphs showing the relationship between the output voltage (Vout) and the output current and ripple current in Example 5.

[0012] Hereinafter, embodiments of the present invention will be described. Note that the following embodiments are merely examples, and the present invention is not limited to the configurations of the following embodiments.

[0013] First Embodiment FIG. 1 is a circuit diagram of a boost converter circuit 1 according to a first embodiment. The boost converter circuit 1 according to the first embodiment (hereinafter sometimes referred to as the present circuit) is configured to be connectable to a voltage source V1 and a load R1, and boosts the DC voltage of the voltage source V1 to a desired voltage and supplies the voltage to the load R1. The voltage source V1 is a DC voltage source that is capable of supplying a substantially constant voltage even when the magnitude of the load R1 fluctuates. The voltage source V1 may also be a circuit (such as an ADDC converter circuit) that converts an AC voltage output from an AC voltage source into a DC voltage and outputs the DC voltage. Hereinafter, in the description of the present circuit 1, the side closer to the load R1 will be referred to as the "rear stage" or "output side," and the side closer to the voltage source V1 will be referred to as the "front stage" or "input side."

[0014] [Circuit Configuration] This circuit 1 includes a reactor L1, half-bridge circuits 10 and 20, boost capacitors C1, C2, and C3, a smoothing capacitor C0, and a switching control circuit 15. The reactor L1 is provided between a voltage source V1 and the half-bridge circuit 10, and is connected in series to the voltage source V1. This circuit 1 operates to reduce the ripple factor of the current flowing through this reactor L1, thereby achieving a miniaturization of the reactor L1.

[0015] Half-bridge circuits 10 and 20 are connected in parallel to a voltage source V1 and a reactor L1, respectively. In the example of Fig. 1, half-bridge circuit 20 is connected to the output side of half-bridge circuit 10. Half-bridge circuit 10 includes a pair of switching elements S11 and S12 connected in series with each other, and half-bridge circuit 20 includes a pair of switching elements S21 and S22 connected in series with each other.

[0016] The half-bridge circuit 10 is controlled by a switching control circuit 15 (described later) in a separately excited manner to perform a switching operation. Specifically, the pair of switching elements S11 and S12 is controlled to alternately perform a complementary on-off switching operation (one is turned on and the other is turned off). The half-bridge circuit 20 is also controlled by the switching control circuit 15 (described later) to perform a switching operation. Specifically, the pair of switching elements S21 and S22 is controlled to alternately perform a complementary on-off switching operation (one is turned on and the other is turned off). This complementary switching operation between the pair of switching elements constituting the half-bridge circuit is referred to as the switching operation of the half-bridge circuit. The switching elements S11, S12, S21, and S22 are semiconductor switching elements such as field effect transistors (FETs), metal oxide semiconductor field effect transistors (MOSFETs), and insulated gate bipolar transistors (IGBTs).

[0017] The boost capacitor C1 is arranged so that the direction of current flowing through it is switched by the switching operation of the half-bridge circuit 10. As a result, the charging and discharging of the boost capacitor C1 is switched by the switching operation. More specifically, one terminal of the boost capacitor C1 is connected to the connection line between the pair of switching elements of the half-bridge circuit 10 (between the switching element S11 and the switching element S12), i.e., the midpoint of the half-bridge circuit 10, and the other terminal is connected to the output line LN0.

[0018] The boost capacitor C2 is arranged so that the direction of current flowing therethrough is switched by the switching operation of the half-bridge circuit 20, and as a result, the charging and discharging of the boost capacitor C2 is switched by the switching operation. More specifically, one terminal of the boost capacitor C2 is connected to the connection line between the pair of switching elements of the half-bridge circuit 20 (between switching element S21 and switching element S22), i.e., the midpoint of the half-bridge circuit 20, and the other terminal is connected to the output line LN0. That is, one terminal of the boost capacitor C1 and one terminal of the boost capacitor C2 are connected, and the output line LN0 branches off from the connection line between the boost capacitors C1 and C2.

[0019] The smoothing capacitor C0 is provided on the output side of the half-bridge circuit 10, is connected to the output terminal to which the load R1 is connected, and smoothes the output from the output line LN0 which is connected to the connection line connecting the boost capacitor C1 and the boost capacitor C2.

[0020] The switching control circuit (hereinafter sometimes referred to as the control circuit) 15 controls the switching operation of the half-bridge circuit 10 and the switching operation of the half-bridge circuit 20 using a separate excitation method as described above, and also controls the half-bridge circuits 10 and 20 so that they perform switching operations in opposite phases. Here, the opposite-phase switching operation between the half-bridge circuits 10 and 20 refers to a switching operation in which the high-potential side switching elements S12 and S22 are in opposite phases to each other and the low-potential side switching elements S11 and S21 are in opposite phases to each other. For example, if the duty cycle of the switching operation is set to 0.5 (50%) or less, when the switching element S11 is in the on state and the switching element S12 is in the off state, the opposite-phase switching operation results in the switching element S21 being in the off state and the switching element S22 being in the on state, and when the switching element S11 is in the off state and the switching element S12 is in the on state, the switching element S21 being in the on state and the switching element S22 being in the off state. However, "opposite phase" here does not only mean a completely opposite phase where the phase difference is 180 degrees, but also includes a phase difference in the range of 180 degrees ±10 degrees. Furthermore, as will be described later, when the duty of the switching operation exceeds 0.5 (50%), there will be a small amount of timing when the high-potential side switching elements S12 and S22 or the low-potential side switching elements S11 and S21 are both in the on state or both in the off state.

[0021] The on / off control of each of the switching elements S11, S12, S21, and S22 by the control circuit 15 can be appropriately realized depending on the configuration of each switching element, and the specific method of realizing this control is not limited. For example, when MOSFETs are used as each switching element, the control circuit 15 is connected to each MOSFET so as to be able to apply a gate-source voltage (hereinafter sometimes referred to as a VGS voltage) to each MOSFET. The control circuit 15 alternately applies a VGS voltage exceeding a threshold voltage to each MOSFET in a switching element pair, thereby alternately switching the on / off state of each MOSFET.

[0022] Such control by the control circuit 15 provides a first current path in which the voltage of the boost capacitor C2 is superimposed on the voltage of the voltage source V1 to charge the boost capacitor C1, and a second current path in which the voltage of the boost capacitor C1 is superimposed on the voltage of the voltage source V1 and output from the output line LN0. In the first embodiment, the second current path provides the voltage of the boost capacitor C1 superimposed on the voltage of the voltage source V1 to charge a boost capacitor C3 (described later) via the output line. Furthermore, in the first embodiment, control by the control circuit 15 provides a third current path in which the voltage of the boost capacitor C3 is superimposed on the voltage of the voltage source V1 to output from the output line LN0. In the third current path in the first embodiment, the smoothing capacitor C0 is charged with the voltage output from the output line.

[0023] The boost capacitor C3 is a boost capacitor similar to the boost capacitors C1 and C2 described above, but for ease of understanding, it may be referred to as an additional boost capacitor to distinguish it from the boost capacitors C1 and C2. One terminal of the boost capacitor C3 is connected to the output line LN0, and the other terminal is connected to a branch line extending from between the switching element pair (the pair of switching element S21 and switching element S22) of the half-bridge circuit 20.

[0024] The boost converter circuit 1 further includes rectifying diodes D0, D1, D2, and D3 as other circuit components. The diodes D0 and D3 are provided on the output line LN0. The diode D2 is provided on the boost capacitor C2 side of the branch point of the output line in the connection line between the boost capacitor C1 and the boost capacitor C2. The diode D1 is provided on a line that branches off from the connection point between the reactor L1, the switching element S12, and the switching element S22, and that is connected to the anode side of the diode D2 in the line that connects to the connection line between the boost capacitor C1 and the boost capacitor C2.

[0025] [Circuit Operation] The operation of the boost converter circuit 1 having the circuit configuration described above will be described below with reference to FIG. 2 . FIG. 2 is a diagram illustrating an example of operation of the boost converter circuit 1 according to the first embodiment. The half-bridge circuits 10 and 20 perform switching operations in opposite phases due to the switching control of the control circuit 15. As a result, the low-side switching element S11 is turned off, the high-side switching element S12 is turned on, the low-side switching element S21 is turned on, and the high-side switching element S22 is turned off. As a result, current flows through the path I1 shown in FIG. 2 due to the output voltage of the voltage source V1. That is, current flows through the path passing through the reactor L1, the diode D1, the boost capacitor C2, and the switching element S21. As a result, the boost capacitor C2 is charged by the voltage (Vin) of the voltage source V1.

[0026] With the next switching operation, switching element S11 turns on, switching element S12 turns off, switching element S21 turns off, and switching element S22 turns on, causing current to flow through path I2 shown in FIG. 2. That is, current flows through a path passing through reactor L1, switching element S22, boost capacitor C2, diode D2, boost capacitor C1, and switching element S11. As a result, boost capacitor C1 is charged with a voltage (2×Vin) obtained by superimposing the voltage (Vin) of boost capacitor C2, which has been charged as described above, on the voltage (Vin) of voltage source V1. This path I2 corresponds to the first current path described above.

[0027] Furthermore, with the next switching operation, switching element S11 turns off, switching element S12 turns on, switching element S21 turns on, and switching element S22 turns off, causing current to flow through path I3 shown in FIG. 2. That is, current flows through the path passing through reactor L1, switching element S12, boost capacitor C1, diode D3, additional boost capacitor C3, and switching element S21. As a result, boost capacitor C3 is charged with a voltage (3×Vin) obtained by superimposing the voltage (Vin) of voltage source V1 and the voltage (2×Vin) of boost capacitor C1 charged as described above. This path I3 corresponds to the second current path described above.

[0028] With the next switching operation, switching element S11 turns on, switching element S12 turns off, switching element S21 turns off, and switching element S22 turns on, causing current to flow through path I4 shown in FIG. 2. That is, current flows through a path passing through reactor L1, switching element S22, additional boost capacitor C3, diode D0, and smoothing capacitor C0. As a result, a voltage (4×Vin) obtained by superimposing the voltage (Vin) of voltage source V1 and the voltage (3×Vin) of boost capacitor C3 charged as described above is applied to smoothing capacitor C0, smoothed, and output to load R1. This path I4 corresponds to the third current path described above.

[0029] As described above, circuit 1 can boost the input voltage from voltage source V1 by four times (4 × Vin) and output it. Furthermore, by providing reactor L1 in the upstream stage of circuit 1, the resonance between reactor L1 and the downstream boost capacitors C1, C2, and C3 and smoothing capacitor C0 suppresses the occurrence of steep peaks in the charging current of each capacitor. This suppresses peak currents in each switching element, allowing the use of inexpensive semiconductor switch elements. Furthermore, circuit 1 achieves a reduction in the ripple factor of the current flowing through reactor L1 through the two-phase structure of half-bridge circuits 10 and 20 and the switching control of each switching element, thereby successfully reducing the size of reactor L1. The effects of circuit 1 are described in more detail in the Examples section, providing more specific examples.

[0030] [First Modification] The first embodiment has a circuit configuration capable of boosting the input voltage from the voltage source V1 by four times (4×Vin), but the circuit can also be modified to a configuration capable of boosting the input voltage by three times (3×Vin). FIG. 3 is a circuit diagram of a boost converter circuit 1A according to the first modification. The boost converter circuit 1A according to the first modification (hereinafter, sometimes referred to as the present modified circuit) has a configuration in which the boost capacitor C3 and diode D0 are removed from the boost converter circuit 1 according to the first embodiment. In other words, the present modified circuit 1A and the above-described present circuit 1 have the same configuration, except for the presence or absence of the boost capacitor C3 and diode D0.

[0031] The operation of this modified circuit 1A is as follows: In this modified circuit 1A, the half-bridge circuits 10 and 20 perform switching operations in opposite phases due to the above-described switching control of the control circuit 15, and the process up to the point where the boost capacitor C1 is charged with a voltage (2×Vin) obtained by superimposing the voltage (Vin) of the boost capacitor C2 on the voltage (Vin) of the voltage source V1 is the same as in the first embodiment.

[0032] As a result of subsequent switching operations, switching element S11 turns off, switching element S12 turns on, switching element S21 turns on, and switching element S22 turns off, causing a current to flow through a path that passes through reactor L1, switching element S12, boost capacitor C1, diode D3, and smoothing capacitor C0. As a result, a voltage (3×Vin) obtained by superimposing the voltage (Vin) of voltage source V1 and the voltage (2×Vin) of boost capacitor C1 charged as described above is applied to smoothing capacitor C0, smoothed, and output to load R1. In the first modified example, this path corresponds to a second current path and is different from the path corresponding to the second current path in the first embodiment.

[0033] In this way, the modified circuit 1A can boost the input voltage from the voltage source V1 by three times (3×Vin) and output the boosted voltage, while achieving the same effects as the first embodiment.

[0034] Second Embodiment Fig. 4 is a circuit diagram of a boost converter circuit 2 according to a second embodiment. The boost converter circuit 2 according to the second embodiment (hereinafter, sometimes referred to as the present circuit) will be described below with reference to Fig. 4. In the following description, the configuration different from the first embodiment will be mainly described, and the description of the configuration similar to the first embodiment will be omitted as appropriate. The present circuit 2 is also configured to be connectable to a voltage source V1 and a load R1. However, the present circuit 2 can boost the DC voltage of the voltage source V1 to a voltage four times, six times, or eight times higher and supply it to the load R1.

[0035] [Circuit Configuration] In addition to the circuit configuration of the circuit 1 shown in FIG. 1, the circuit 2 further includes boost capacitors C11, C12, C13, and C14, diodes D11, D12, D13, and D14, and contacts TA, TB, TC, and TS.

[0036] The boost capacitors C11, C12, C13, and C14 are boost capacitors similar to the above-mentioned boost capacitors C1, C2, and C3, but for ease of understanding, they may be referred to as additional boost capacitors to distinguish them from the boost capacitors C1 and C2. The boost capacitors C11, C12, C13, and C14 are arranged in that order toward the output side.

[0037] The boost capacitors C11 and C13 have one terminal connected to the output line LN0 and the other terminal connected to a branch line LN1 extending from between the switching element pairs of the half-bridge circuit 10. Therefore, the boost capacitors C11 and C13 correspond to second additional boost capacitors. The boost capacitors C12 and C14 have one terminal connected to the output line LN0 and the other terminal connected to a branch line LN2 extending from between the switching element pairs of the half-bridge circuit 20. Therefore, the boost capacitors C12 and C14, together with the above-mentioned boost capacitor C3, correspond to first additional boost capacitors.

[0038] In this way, in this circuit 2, the first additional boost capacitors (C3, C12, and C14) and the second additional boost capacitors (C11 and C13) are alternately provided in one or more stages toward the output side. In the example of Fig. 4, the first additional boost capacitors (C3, C12, and C14) are provided in three stages, and the second additional boost capacitors (C11 and C13) are provided in two stages.

[0039] Diodes D11, D12, D13, and D14 are rectifying diodes similar to diodes D1, D2, D3, etc., and are provided on output line LN0. Specifically, diode D11 is provided between boost capacitor C3 and boost capacitor C11, diode D12 is provided between boost capacitor C11 and boost capacitor C12, diode D13 is provided between boost capacitor C12 and boost capacitor C13, and diode D14 is provided between boost capacitor C13 and boost capacitor C14.

[0040] Contact TS is an output contact connected to smoothing capacitor C0 via diode D0, and the other contacts TA, TB, and TC are configured so that one of them can selectively come into contact with contact TS. Contact TA is connected to the connection point between boost capacitor C3 and output line LN0, contact TB is connected to the connection point between boost capacitor C12 and output line LN0, and contact TC is connected to the connection point between boost capacitor C14 and output line LN0.

[0041] [Circuit Operation] The operation of this circuit 2 will now be described. First, when the contact TA is in contact with the output contact TS and is in a conductive state, the circuit operates in the same manner as in the first embodiment described above. That is, a voltage (4×Vin) obtained by superimposing the voltage (3×Vin) of the boost capacitor C3 on the voltage (Vin) of the voltage source V1 is applied to the smoothing capacitor C0, smoothed, and output to the load R1. Therefore, in this case, a voltage that is four times the input voltage (4×Vin) is output.

[0042] When the contact TB is in contact with the output contact TS and is in a conductive state, the circuit operates in the same manner as in the first embodiment, whereby the additional boost capacitor C3 is charged with a voltage (3×Vin) obtained by superimposing the voltage (2×Vin) of the boost capacitor C1 on the voltage (Vin) of the voltage source V1, and then the present circuit 2 operates as follows.

[0043] As a result of the switching operation being performed in opposite phases between the half-bridge circuits 10 and 20, the switching element S11 is turned on, the switching element S12 is turned off, the switching element S21 is turned off, and the switching element S22 is turned on, and a current flows through a path that passes through the reactor L1, the switching element S22, the additional boost capacitor C3, the diode D11, the additional boost capacitor C11, and the switching element S11. As a result, the additional boost capacitor C11 is charged with a voltage (4×Vin) obtained by superimposing the voltage (Vin) of the voltage source V1 and the voltage (3×Vin) of the additional boost capacitor C3.

[0044] In the next switching cycle, when switching element S11 is turned off, switching element S12 is turned on, switching element S21 is turned on, and switching element S22 is turned off, a current flows through a path passing through reactor L1, switching element S12, additional boost capacitor C11, diode D12, additional boost capacitor C12, and switching element S21. As a result, additional boost capacitor C12 is charged with a voltage (5×Vin) obtained by superimposing the voltage of additional boost capacitor C11 (4×Vin) on the voltage (Vin) of voltage source V1.

[0045] Furthermore, in the next switching cycle, when switching element S11 is turned on, switching element S12 is turned off, switching element S21 is turned off, and switching element S22 is turned on, current flows through a path that passes through reactor L1, switching element S22, additional boost capacitor C12, contact TB, contact TS, diode D0, and smoothing capacitor C0. As a result, a voltage (6×Vin) obtained by superimposing the voltage (Vin) of boost capacitor C12 charged as described above (5×Vin) on the voltage (Vin) of voltage source V1 is applied to smoothing capacitor C0, smoothed, and output to load R1. Therefore, in this case, a voltage that is six times the input voltage (6×Vin) is output.

[0046] When the contact TC is in contact with the output contact TS and is in a conductive state, first, the additional boost capacitor C12 is charged with a voltage five times the input voltage (5 × Vin) through the above-described circuit operation, and then the present circuit 2 operates as follows.

[0047] When switching element S11 is turned on, switching element S12 is turned off, switching element S21 is turned off, and switching element S22 is turned on, a current flows through a path passing through reactor L1, switching element S22, additional boost capacitor C12, diode D13, additional boost capacitor C13, and switching element S11. As a result, additional boost capacitor C13 is charged with a voltage (6×Vin) obtained by superimposing the voltage (Vin) of voltage source V1 and the voltage (5×Vin) of additional boost capacitor C12.

[0048] In the next switching cycle, when switching element S11 is turned off, switching element S12 is turned on, switching element S21 is turned on, and switching element S22 is turned off, a current flows through a path passing through reactor L1, switching element S12, additional boost capacitor C13, diode D14, additional boost capacitor C14, and switching element S21. As a result, additional boost capacitor C14 is charged with a voltage (7×Vin) obtained by superimposing the voltage of additional boost capacitor C13 (6×Vin) on the voltage (Vin) of voltage source V1.

[0049] Furthermore, in the next switching cycle, when switching element S11 is turned on, switching element S12 is turned off, switching element S21 is turned off, and switching element S22 is turned on, current flows through a path that passes through reactor L1, switching element S22, additional boost capacitor C14, contact TC, contact TS, diode D0, and smoothing capacitor C0. As a result, a voltage (8×Vin) obtained by superimposing the voltage (Vin) of boost capacitor C14 charged as described above (7×Vin) on the voltage (Vin) of voltage source V1 is applied to smoothing capacitor C0, smoothed, and output to load R1. Therefore, in this case, a voltage that is eight times the input voltage (8×Vin) is output.

[0050] In this way, in this circuit 2, by adding multiple stages of combinations of capacitors and diodes, a boost output of 4x, 6x, or 8x is achieved, making it possible to set the boost multiplier with a small number of additional components. Furthermore, this circuit 2 not only can boost the input voltage by 4x, 6x, or 8x, but also, as in the first embodiment, can reduce the ripple factor of the current flowing through the reactor L1, thereby enabling the reactor L1 to be made smaller. In addition, in this circuit 2, by providing multiple contacts for each boost multiplier, the output voltage can be varied at the desired boost multiplier.

[0051] Note that one of the contacts TA, TB, and TC can be omitted to set two boost multiples (e.g., 4x and 6x, 4x and 8x, or 6x and 8x). A new contact may be added to enable switching to an output that is three times the input voltage. In this case, the new contact is connected between the connection point of the additional boost capacitor C3 on the output line LN0 and the diode D3. It is also possible to add a contact that outputs an odd-numbered multiplication of the input voltage. For example, adding a contact connected to the connection point of the additional boost capacitor C11 on the output line LN0 enables an output that is five times the input voltage, while adding a contact connected to the connection point of the additional boost capacitor C13 on the output line LN0 enables an output that is seven times the input voltage. Furthermore, by adding a first additional boost capacitor, a second additional boost capacitor, and a diode in the same manner as described above, it is possible to realize a circuit configuration that boosts the input voltage by a multiple greater than eight and outputs the boosted voltage.

[0052] As described above, if the boost capacitors C3, C12, and C14 are referred to as the first additional boost capacitors, and the boost capacitors C11 and C12 are referred to as the second additional boost capacitors, the circuit operation described above can be generalized and expressed as follows: In this case, the first additional boost capacitor and the second additional boost capacitor are each referred to as the first stage, second stage, third stage, etc., from the input side according to their placement positions. That is, under the control of the control circuit 15, the following current paths are realized according to the numbers of first and second additional boost capacitors: a current path in which the voltage of the first additional boost capacitor in the nth stage (n is 1 or more) is superimposed on the voltage of the voltage source V1 to charge the second additional boost capacitor in the nth stage; a current path in which the voltage of the second additional boost capacitor in the nth stage is superimposed on the voltage of the voltage source to charge the first additional boost capacitor in the (n+1)th stage; and a current path in which the voltage of the first additional boost capacitor or second additional boost capacitor in the final stage is superimposed on the voltage of the voltage source to be output to the output line LN0.

[0053] In this circuit 2, the boost capacitor C3 corresponds to the first additional boost capacitor in the first stage, the boost capacitor C11 corresponds to the second additional boost capacitor in the first stage, the boost capacitor C12 corresponds to the first additional boost capacitor in the second stage, the boost capacitor C13 corresponds to the second or final stage second additional boost capacitor, and the boost capacitor C14 corresponds to the first additional boost capacitor in the third or final stage. When a circuit configuration is used in which two or more stages of the first additional boost capacitor are provided (three stages in FIG. 4), one or more stages of the second additional boost capacitor are provided (two stages in FIG. 4), and the number of first additional boost capacitors is greater than the number of second additional boost capacitors, the input voltage can be boosted by an even number and output, and the ripple factor of the current flowing through the reactor L1 can be reduced.

[0054] Also, it is preferable to provide contacts (TA, TB, and TC in FIG. 4) that come into electrical contact with the output contact (TS) to superimpose the voltage of the n-th stage first additional boost capacitor or the n-th stage second additional boost capacitor on the voltage of the voltage source and output the superimposed voltage to the smoothing capacitor (C0). Also, a contact may be provided that comes into electrical contact with the output contact (TS) to superimpose the voltage of the first boost capacitor (C1) on the voltage of the voltage source and output the superimposed voltage to the smoothing capacitor (C0).

[0055] Third Embodiment In each of the above-described embodiments and modifications, the control circuit 15 may change the ratio between the on-time and off-time (referred to as the duty cycle) in one cycle of the switching operation of the half-bridge circuits 10 and 20. For example, the control circuit 15 may perform PWM (Pulse Width Modulation) control to change the on-duty of the switching operation of the half-bridge circuits 10 and 20, or may perform off-time control to change the length of the off-time while keeping the on-time constant. Such a control circuit 15 can make the output from the smoothing capacitor C0 variable. For example, the control circuit 15 can linearly vary the output voltage while reducing the ripple factor by adjusting the duty cycle within a range of approximately 0.5±0.1 (50%±10%).

[0056] [Fourth Embodiment] In each of the above-described embodiments and modifications, the control circuit 15 controls the switching operation of the half-bridge circuits 10 and 20 to achieve a target duty cycle corresponding to the target output voltage. However, in the circuit configurations according to the first and second embodiments and the first modification, an inrush current occurs when the circuit is started with a fixed target duty cycle. This is because the circuit configurations suppress the ripple factor to achieve a small reactor L1, which is one factor that increases the inrush current. The inrush current may continue to occur from the time the circuit is started until each capacitor (such as the boost capacitors C1, C2, and C3 and the smoothing capacitor C0) is fully charged.

[0057] Therefore, the control circuit 15 gradually changes the duty of the switching operation of the half-bridge circuits 10 and 20 to a target duty corresponding to the target output voltage over a predetermined time period from the time the circuit is started. This makes it possible to suppress inrush current during circuit startup. Hereinafter, such control by the control circuit 15 may be referred to as soft start control. Herein, the predetermined time period is determined in advance based on the capacitance of the boost capacitor and smoothing capacitor, the capacitance of the reactor L1, the internal impedance, and the like in the circuit configuration described above. For example, by setting the predetermined time period to be greater than the time constant of the circuit configuration or to be equal to or greater than half the oscillation period, inrush power can be effectively suppressed.

[0058] Fifth Embodiment Even in the circuit configurations according to the first and second embodiments and the first modification, the ripple factor may exceed 20% depending on the balance between the capacitances of the boost capacitor and the smoothing capacitor and the capacitance of the reactor L1. The inventors discovered through circuit simulation analysis that in such cases, a voltage imbalance occurs between the boost capacitors, and found that resolving this imbalance can reduce the ripple factor. For example, in the circuit 1 according to the first embodiment, when the input voltage is boosted four times and output, the voltage of the boost capacitor C3 may be three times the voltage of the boost capacitor C2, and the voltage of the boost capacitor C1 may be four times the voltage of the boost capacitor C2, resulting in an imbalance in voltage division. When the voltage division balance between the boost capacitors is disrupted in this way, the ripple current increases, resulting in increased losses.

[0059] Therefore, the boost converter circuit according to the fifth embodiment further includes an error detection circuit that detects an error in the voltage balance between the boost capacitors, and the control circuit 15 adjusts the duty based on the error detected by the error detection circuit, thereby providing a predetermined difference in duty between the pairs of switching elements in each of the half-bridge circuits 10 and 20. This adjusts the voltage division balance between the boost capacitors and reduces the ripple factor.

[0060] Fig. 5 is a diagram schematically illustrating a boost converter circuit according to a fifth embodiment. The circuit configuration of the fifth embodiment can be applied to any of the circuit configurations of the first and second embodiments and the first modified example described above, but Fig. 5 illustrates an example in which the circuit configuration is applied to the circuit configuration of the first embodiment shown in Fig. 1. That is, the circuit configuration other than the control circuit 15 shown in the upper part of Fig. 5 is the same as the circuit configuration of Fig. 1, with the notation of the wiring being changed.

[0061] In the fifth embodiment, the control circuit 15 includes a voltage balance control circuit 150 and a drive signal generation circuit 151. The voltage balance control circuit 150 detects a voltage balance error between one or more pairs of boost capacitors C1, C2, and C3. In the example of FIG. 5 , the voltage balance between the boost capacitors C1, C2, and C3 must be 2:1:3. Therefore, the control circuit 150 checks whether the voltage ratio between the boost capacitors C1 and C2 is 2:1, whether the voltage ratio between the boost capacitors C2 and C3 is 1:3, or whether the voltage ratio between the boost capacitors C1 and C3 is 2:3, and detects an error from the proper voltage ratio. For example, the difference between half the voltage of the boost capacitor C1 and the voltage of the boost capacitor C2 is detected as a voltage balance error. As another example, the voltage balance error may be detected as the sum of the difference between half the voltage of boost capacitor C1 and the voltage of boost capacitor C2, and the difference between two-thirds the voltage of boost capacitor C3 and the voltage of boost capacitor C1.

[0062] The drive signal generation circuit 151 generates a drive signal (sometimes referred to as a PWM (Pulse Width Modulation) signal) for driving the switching operations of the switching elements S11, S12, S21, and S22 of the half-bridge circuits 10 and 20. The generated drive signal indicates a predetermined switching frequency and a predetermined duty cycle, and a drive circuit (not shown) switches the on and off states of the switching elements S11, S12, S21, and S22 in response to this drive signal.

[0063] The drive signal generation circuit 151 in the fifth embodiment adjusts the target duty corresponding to the target output voltage based on the error detected by the voltage balance control circuit 150, thereby providing a predetermined difference in duty between the pairs of switching elements in each of the half-bridge circuits 10 and 20. Here, during the anti-phase switching operation of the half-bridge circuits 10 and 20, when the switching elements S11 and S22 are on and the switching elements S12 and S21 are off (hereinafter sometimes referred to as phase 1), the voltage of the boost capacitor C2 decreases, the voltage of the boost capacitor C1 increases, and the voltage of the boost capacitor C3 decreases. On the other hand, when the switching elements S11 and S22 are off and the switching elements S12 and S21 are on (hereinafter sometimes referred to as phase 2), the voltage of the boost capacitor C2 increases, the voltage of the boost capacitor C1 decreases, and the voltage of the boost capacitor C3 increases.

[0064] Therefore, the drive signal generation circuit 151 adds a value based on the error detected by the voltage balance control circuit 150 to the on-time of the switching elements S11 and S22 and subtracts it from the on-time of the switching elements S12 and S21. For example, when the voltage balance control circuit 150 detects a voltage (V Ｃ１ / 2) and the voltage of the boost capacitor C2 (V Ｃ２ ) is detected as a voltage balance error, Ｃ１ / 2 is V Ｃ２ , the drive signal generating circuit 151 reduces the on-time of the switching elements S11 and S22 (subtracts a value based on the error) and increases the on-time of the switching elements S12 and S21 (adds a value based on the error) so that the voltage of the boost capacitor C1 decreases and the voltage of the boost capacitor C2 increases, thereby shortening the time of Phase 1 and lengthening the time of Phase 2. Conversely, when V Ｃ１ / 2 is V Ｃ２If the difference is smaller than , the drive signal generation circuit 151 increases the on-time of the switching elements S11 and S22 and decreases the on-time of the switching elements S12 and S21, thereby lengthening the time of Phase 1 and shortening the time of Phase 2, so that the voltage of the boost capacitor C1 increases and the voltage of the boost capacitor C2 decreases. Depending on the detected error, a value corresponding to the error may be subtracted from the on-time of the switching elements S11 and S22 and added to the on-time of the switching elements S12 and S21. The value added or subtracted to the on-time based on the detected voltage balance error, i.e., the predetermined duty difference, may be determined appropriately depending on the capacitance, characteristics, etc. of each boost capacitor. By providing a predetermined duty difference between the pairs of switching elements in each of the half-bridge circuits 10 and 20 through such control, the voltage division balance can be adjusted and the ripple factor can be reduced.

[0065] When the control of the control circuit 15 in the fifth embodiment is applied to the circuit configuration of the first modification, the voltage balance control circuit 150 only needs to detect a voltage balance error between the pair of boost capacitors C1 and C2. In this case, it is sufficient to detect a deviation in the voltage ratio between the boost capacitors C1 and C2 from the proper voltage ratio (2:1). When the control of the control circuit 15 in the fifth embodiment is applied to the circuit configuration of the second embodiment, and the contact TC is in contact with the output contact TS and is in a conductive state, the voltage balance control circuit 150 only needs to detect a voltage balance error between one or more pairs of boost capacitors C1, C2, C3, C11, C12, C13, and C14. In this case, the voltage balance between the boost capacitors C1, C2, C3, C11, C12, C13, and C14 must be 2:1:3:4:5:6:7, and it is sufficient to detect a deviation between the voltage ratio of one or more pairs of boost capacitors and the proper voltage ratio.

[0066] [Sixth Embodiment] As shown in the third embodiment, the control circuit 15 changes the duty cycle, thereby continuously varying the output voltage while reducing the ripple factor. In the circuit configuration of the first embodiment, when the duty cycle is 0.5, an output four times the input voltage is possible (standard mode). By increasing the duty cycle beyond 0.5, an output greater than four times the input voltage is possible (boost mode). By lowering the duty cycle below 0.5, an output less than four times the input voltage is possible (buck mode). However, when the duty cycle is lowered below 0.33 in buck mode, reverse current flows through the switching elements S11, S12, S21, and S22, increasing the ripple current. It was found that in this case, the voltage division in the boost capacitors C1, C2, and C3 does not function properly, and the voltages of the boost capacitors operate to be equal. Thus, two operating modes have been discovered for the buck mode.

[0067] Here, taking the circuit configuration of the first embodiment as an example, when the duty is greater than 0.33, the voltage division state of each boost capacitor is maintained, and from the relationship between this voltage division state and the VT product, the output voltage Vout is expressed by the following equation using the input voltage Vdc and duty α: Vout = 2Vdc / (1 - α) (Equation 1) This operation mode, in which the duty is greater than 0.33, can be referred to as a gradation mode, including the step-down mode, standard mode, and step-up mode. On the other hand, when the duty is less than 0.33, the voltages of each boost capacitor are equal, and the output voltage Vout can be expressed by the following equation: Vout = Vdc / (1 - 2α) (Equation 2) This operation mode, in which the duty is less than 0.33, can be referred to as a chopper mode.

[0068] The relationship between the duty and the boost ratio in the chopper mode and the gradation mode is shown in the graph of Fig. 6. Fig. 6 is a graph showing the relationship between the duty and the boost ratio. As shown in the third embodiment, the control circuit 15 changes the duty, causing the operating point to shift as shown by the dashed line in Fig. 6. However, in the chopper mode, losses occur, such as reverse currents in the switching elements S11, S12, S21, and S22.

[0069] Therefore, when the duty cycle is less than 0.33, an operating mode may be considered in each of the above circuit configurations in which the switching elements S11 and S12 of the half-bridge circuit 10 are both turned off, and the switching elements S21 and S22 of the half-bridge circuit 20 are alternately switched between a phase (referred to as Phase 3) in which both are turned on and a phase (referred to as Phase 4) in which both are turned off. This operating mode can be referred to as a standard chopper mode. In this standard chopper mode, energy is stored in the reactor L1 by the input voltage from the voltage source V1 in Phase 3, and in Phase 4, the energy stored in the reactor L1 is superimposed on the input voltage and output. This standard chopper mode can suppress the generation of reverse current in each of the switching elements S11, S12, S21, and S22, thereby preventing loss. However, as will be described in detail later, this standard chopper mode cannot prevent an increase in ripple current. In addition, in the case where the duty is greater than 0.33 in such a standard chopper mode, the operation mode as described in the third embodiment may be executed, and this operation mode is referred to as a gradation mode.

[0070] Therefore, in the sixth embodiment, an operation mode obtained by improving the standard chopper mode is introduced as an operation mode when the duty cycle is less than 0.33. This operation mode can be referred to as an improved chopper mode. This improved chopper mode is similar to the standard chopper mode in that both switching elements S11 and S12 of the half-bridge circuit 10 are turned off. However, the improved chopper mode differs from the standard chopper mode in that the switching operation of the half-bridge circuit 20 is performed in the same manner as in the gradation mode (hereinafter referred to as a first improvement), and in that the switching frequency of the switching elements S21 and S22 of the half-bridge circuit 20 is set to a predetermined frequency higher than the frequency in the gradation mode, thereby increasing the duty cycle (hereinafter referred to as a second improvement). That is, the control circuit 15 in the sixth embodiment is capable of switching between a first operation mode (gradation mode) in which the half-bridge circuits 10 and 20 are switched at a first set frequency and the duty of the switching operation is changed to increase or decrease the output from the smoothing capacitor C0, and a second operation mode (improved chopper mode) in which the half-bridge circuit 20 is switched at a second set frequency higher than the first set frequency while keeping both of the switching element pairs S11 and S12 of the half-bridge circuit 10 in the off state and the output from the smoothing capacitor C0 is increased or decreased by changing the duty of the switching operation, in accordance with a target duty corresponding to the target output voltage; and operates in the first operation mode (gradation mode) when the target duty is higher than one or more predetermined thresholds (e.g., 0.33), and operates in the second operation mode (improved chopper mode) when the target duty is lower than the predetermined thresholds (e.g., 0.33).

[0071] 7A and 7B are diagrams illustrating drive signals in the gradation mode and improved chopper mode in the step-down mode. FIG. 7A shows the drive signal in the gradation mode, and FIG. 7B shows the drive signal in the improved chopper mode. As shown in FIG. 7A, in the improved chopper mode, the switching elements S11 and S12 of the half-bridge circuit 10 are always in the off state, and the switching operations of the switching elements S21 and S22 of the half-bridge circuit 20 continue as in the gradation mode. As a result, in the improved chopper mode, in a phase in which the switching element S21 is in the on state and the switching element S22 is in the off state, the boost capacitors C2 and C3 are charged by the input voltage from the voltage source V1. In a phase in which the switching element S21 is in the off state and the switching element S22 is in the on state, the voltages of the boost capacitors C2 and C3 are superimposed on the input voltage and output.

[0072] In the example of FIG. 7 , the on-time of the drive signals (S21 signal and S22 signal) in the improved chopper mode remains constant from the gradation mode, but the frequency is set to twice the frequency of the gradation mode. Therefore, the duty of the drive signal in the improved chopper mode immediately after switching from the gradation mode is approximately twice the duty of the drive signal in the gradation mode immediately before the switching. If the target output voltage is even lower, the duty is reduced from this doubled duty. Here, the set frequency for the improved chopper mode (corresponding to the second set frequency) set when switching from the gradation mode to the improved chopper mode is higher than the set frequency for the gradation mode (corresponding to the first set frequency), and is set so that the duty of the improved chopper mode immediately after the switching is higher than the duty of the gradation mode immediately before the switching, and the output voltage is approximately linear before and after the mode switching. Therefore, in the example of FIG. 7 , the frequency is set to twice the frequency without changing the on-time, but this is not limiting. The frequency may be more than twice the frequency, and the on-time may be changed.

[0073] As described above, in the sixth embodiment, by adopting the improved chopper mode when the duty cycle is less than 0.33, not only can reverse current be prevented from occurring in each switching element, thereby preventing losses, but also reducing ripple current. Taking the circuit configurations of FIGS. 1 and 5 as an example, the voltage applied to reactor L1 is determined by the sum of the difference between the voltages of boost capacitors C2 and C3 and the output voltage and the input voltage from voltage source V1. Therefore, in the improved chopper mode, the first improvement allows boost capacitors C2 and C3 to charge, thereby lowering the voltage applied to reactor L1 and reducing ripple current. Furthermore, according to the second improvement in the improved chopper mode, the switching frequency is set higher than in the gradation mode, thereby further reducing ripple current. However, because the improved chopper mode achieves sufficient ripple reduction through the operation mode of the first improvement, the switching frequency of switching elements S21 and S22 of the half-bridge circuit 20 in the second improvement does not necessarily have to be set higher than the frequency in the gradation mode, and may be set approximately the same as the frequency in the gradation mode. As described above, according to the sixth embodiment, it is possible to suppress loss and reduce ripple current while making the output voltage continuously variable and further increasing the variable range.

[0074] On the other hand, the inventors have found that output voltage fluctuations can increase when switching between the gradation mode and the improved chopper mode. Regarding the switching characteristics from the improved chopper mode to the gradation mode, it is possible to reduce the output voltage fluctuation by moving the switching timing closer to the mode cross point shown in Figure 6. However, it has been found that the same method cannot reduce the output voltage fluctuation when switching from the gradation mode to the improved chopper mode. This is thought to be because, as mentioned above, a voltage difference occurs between the boost capacitors in the gradation mode, and if the mode is suddenly switched to the improved chopper mode from this state, the charge stored in each boost capacitor will flow into or out of the load R1.

[0075] 8 shows the changes in the output voltage and the voltage of each boost capacitor when transitioning from gradation mode to chopper mode. In the example of FIG. 8, the voltage difference between each boost capacitor begins to decrease when the duty is around 0.338, and the voltage difference between each boost capacitor is almost zero when the duty is 0.333. This indicates that a method of switching from gradation mode to improved chopper mode after the voltage difference between each boost capacitor has become sufficiently small can be found, and that this method can suppress output voltage fluctuations.

[0076] 6 is set as the predetermined threshold for mode switching, and the control circuit 15 switches from the improved chopper mode to the gradation mode when the target duty corresponding to the target output voltage becomes equal to or greater than the predetermined threshold (e.g., 0.338), and switches from the gradation mode to the improved chopper mode when the voltage difference between the boost capacitors (boost capacitors C3 and C2 in the first embodiment) becomes equal to or less than the predetermined threshold. In other words, the boost converter circuit in the sixth embodiment further includes a voltage division detection circuit that detects the voltage difference between two of the boost capacitors (C1, C2, and C3) that are repeatedly charged and discharged during operation in the first operation mode (gradation mode), and the control circuit 15 switches from the first operation mode (gradation mode) to the second operation mode (improved chopper mode) based on the comparison result between the target duty and the predetermined threshold (e.g., 0.33) and the comparison result between the voltage difference detected by the voltage division detection circuit and the predetermined threshold (e.g., 30 V). Although it is preferable to detect the voltage difference between the pair of boost capacitors with the highest voltage and the lowest voltage, other boost capacitors may also be included in the detection targets. In this way, it is possible to suppress output power fluctuations that accompany switching of the operating mode.

[0077] Furthermore, it is preferable to maintain voltage balance between the boost capacitors in the improved chopper mode, as in the gradation mode. Therefore, the control circuit 15 in the sixth embodiment adjusts the duty cycle so that the voltage balance between the boost capacitors is maintained even in the improved chopper mode, thereby providing a predetermined difference in duty between the switching elements S21 and S22 of the half-bridge circuit 20. In other words, the boost converter circuit in the sixth embodiment further includes a voltage difference detection circuit that detects the voltage difference between the target output voltage and the voltage of the second boost capacitor (C2) or another boost capacitor (C3) that is repeatedly charged and discharged during operation in the second operating mode (improved chopper mode). During operation in the second operating mode (improved chopper mode), the control circuit 15 adjusts the duty cycle based on the voltage difference detected by the voltage difference detection circuit, thereby providing a predetermined difference in duty between the pair of switching elements (S21 and S22) of the half-bridge circuit 20. This allows the voltage balance between the boost capacitors to be maintained even in the improved chopper mode, thereby reducing the ripple factor.

[0078] Fig. 9 is a diagram schematically illustrating a boost converter circuit according to a sixth embodiment. The circuit configuration of the sixth embodiment can be applied to any of the circuit configurations of the first and second embodiments and the first modified example described above, but Fig. 9 illustrates an example in which the circuit configuration is applied to the circuit configuration of the first embodiment shown in Fig. 1. That is, the circuit configuration other than the control circuit 15 shown in the upper part of Fig. 9 is the same as the circuit configuration of Fig. 1, with the notation of the wiring being changed.

[0079] In the sixth embodiment, the control circuit 15 includes a gradation mode voltage control circuit 152, a gradation mode drive signal generation circuit 153, a chopper mode voltage control circuit 154, a chopper mode drive signal generation circuit 155, a differential voltage detection circuit 156, a target DUTY setting circuit 157, a mode switching determination circuit 158, and a signal switching circuit 159, and realizes the circuit operation as described above.

[0080] The target duty setting circuit 157 receives a setting signal for the target output voltage and determines a duty for gradation mode (hereinafter sometimes abbreviated as gradation duty) and a duty for improved chopper mode (hereinafter sometimes abbreviated as chopper duty) corresponding to this target output voltage. The gradation duty (α) corresponding to the target output voltage can be calculated based on the above (Equation 1), and the chopper duty (α) corresponding to the target output voltage can be calculated based on the above (Equation 2).

[0081] The gradation mode voltage control circuit 152 operates in gradation mode and, similar to the voltage balance control circuit 150 of the fifth embodiment, detects a voltage balance error between each boost capacitor. In the example of FIG. 9 , a voltage balance error between one or more pairs of boost capacitors C1, C2, and C3 is detected. Similarly to the drive signal generation circuit 151 of the fifth embodiment, the gradation mode voltage control circuit 152 adjusts the gradation duty sent from the target duty setting circuit 157 based on the detected error. As a result, if an error is detected, a predetermined difference is set in the gradation duty between the switching element pairs in each of the half-bridge circuits 10 and 20. The gradation mode drive signal generation circuit 153 generates a drive signal (PWM signal) for the gradation duty adjusted by the gradation mode voltage control circuit 152. The generated drive signal is a signal with a gradation mode frequency and is used to drive the switching elements S11, S12, S21, and S22 of the half-bridge circuits 10 and 20.

[0082] The chopper mode voltage control circuit 154 operates in the improved chopper mode and, as described above, performs control so as to maintain the voltage balance between the boost capacitors in the improved chopper mode. In the example of FIG. 9 , the chopper mode voltage control circuit 154 detects the difference between the voltage of the boost capacitor C2 or C3 and half the target output voltage as an error so that the voltage of the boost capacitor C2 or C3 becomes half the target output voltage, and adjusts the chopper duty sent from the target duty setting circuit 157 based on this error. At this time, a predetermined difference is set in the chopper duty between the switching element pairs of the half-bridge circuit 20 as necessary. For example, when the voltage of the boost capacitor C2 or C3 is higher than half the target output voltage, the chopper duty is adjusted so that the duty of the switching element S22 is greater than the duty of the switching element S21. When the voltage of the boost capacitor C2 or C3 is lower than half the target output voltage, the chopper duty is adjusted so that the duty of the switching element S22 is smaller than the duty of the switching element S21.

[0083] Chopper mode drive signal generation circuit 155 generates a drive signal (PWM signal) for the chopper duty adjusted by chopper mode voltage control circuit 154. The generated drive signal is a signal with an improved chopper mode frequency, and is a signal for driving each of the switching elements S21 and S22 of half bridge circuit 20. The improved chopper mode frequency is higher than the above-mentioned gradation mode frequency, and is set to, for example, twice the gradation mode frequency (25 kHz) (50 kHz).

[0084] The differential voltage detection circuit 156 detects the voltage difference between the multiple boost capacitors that are repeatedly charged and discharged during operation in the gradation mode, and detects when the detected voltage difference is less than a predetermined threshold. Therefore, the differential voltage detection circuit 156 can be referred to as a voltage division detection circuit. In the example of FIG. 9 , the differential voltage detection circuit 156 detects when the voltage difference between the boost capacitor C3, to which the highest voltage is applied among the boost capacitors C1, C2, and C3, and the boost capacitor C2, to which the lowest voltage is applied, is less than a predetermined threshold (e.g., 30 V) in the gradation mode.

[0085] The mode switching determination circuit 158 ​​selects the gradation mode when the gradation duty sent from the target duty setting circuit 157 is equal to or greater than a predetermined threshold (0.338), and selects the improved chopper mode when the gradation duty is less than the predetermined threshold (0.338). However, when switching from the gradation mode to the improved chopper mode, the mode switching determination circuit 158 ​​selects the improved chopper mode when the gradation duty is less than the predetermined threshold (0.338) and a detection signal (a signal indicating that the voltage difference has become less than the predetermined threshold) is received from the differential voltage detection circuit 156. When switching the operation mode, the mode switching determination circuit 158 ​​may be provided with a filter to suppress hunting immediately after switching, thereby stabilizing the operation mode switching.

[0086] The signal switching circuit 159 outputs a drive signal generated by either the gradation mode drive signal generation circuit 153 or the chopper mode drive signal generation circuit 155 in accordance with the operation mode selected by the mode switching determination circuit 158. Specifically, when the gradation mode is selected by the mode switching determination circuit 158, the signal switching circuit 159 outputs the drive signal sent from the gradation mode drive signal generation circuit 153 to drive each switching element of the half bridge circuits 10 and 20. On the other hand, when the improved chopper mode is selected by the mode switching determination circuit 158, the signal switching circuit 159 outputs the drive signal sent from the chopper mode drive signal generation circuit 155 to drive each switching element S21 and S22 of the half bridge circuit 20.

[0087] [Modifications] The contents of the above-described embodiments and modifications can be modified as appropriate. The boost converter circuits 1 and 2 according to the first and second embodiments, and the boost converter circuit 1A according to the first modification, are not limited to the illustrated circuit configuration examples. Furthermore, the configuration of the control circuit 15 shown in FIGS. 5 and 9 is not limited to the illustrated configuration. For example, the boost converter circuits according to the above-described embodiments and modifications can be modified into a step-up / step-down bidirectional converter circuit by replacing some of the circuit components. FIG. 10 is a circuit diagram of a modified bidirectional converter circuit 1. FIG. 10 illustrates a bidirectional converter circuit 1 modified from the boost converter circuit 1 shown in FIG. 1. That is, in the bidirectional converter circuit 1, the rectifying diodes D0, D1, D2, and D3 are replaced with reverse-conducting switching elements RS0, RS1, RS2, and RS3, and both ends are terminalized (terminals TM1, TM2, TM3, and TM4).

[0088] The reverse-conducting switching elements RS0, RS1, RS2, and RS3 may be, for example, insulated gate bipolar transistors (RC-IGBTs) with built-in reverse-conducting diodes. The reverse-conducting switching elements may be configured in any manner as long as they can switch their conduction direction using a control voltage or the like. Terminals TM1 and TM2 correspond to first terminals that can connect a voltage source V1 and a reactor L1, and terminals TM3 and TM4 correspond to second terminals that can output a voltage smoothed by a smoothing capacitor C0.

[0089] The bidirectional converter circuit 1 further includes a control circuit capable of controlling the conduction direction of the reverse-conducting switching elements RS0, RS1, RS2, and RS3. This control circuit may be realized by the switching control circuit 15 described above, or may be realized as a circuit separate from the switching control circuit 15. When this control circuit is realized by the switching control circuit 15, the control circuit 15 controls the conduction direction of the reverse-conducting switching elements RS0, RS1, RS2, and RS3 in addition to controlling the switching operation of the half-bridge circuits 10 and 20 described above, thereby enabling switching of the direction of power input and output (direction of current) within the circuit. Specifically, as in the above-described embodiments and modifications, when the terminals TM1 and TM2 are the power input side and the terminals TM3 and TM4 are the power output side, the bidirectional converter circuit 1 operates as a boost converter circuit and can be described as operating in boost mode. On the other hand, when the terminals TM1 and TM2 are on the power output side and the terminals TM3 and TM4 are on the power input side, the bidirectional converter circuit 1 operates as a step-down converter circuit and can be described as operating in step-down mode. In this way, by controlling the conduction direction of the reverse-conducting switching elements RS0, RS1, RS2, and RS3, the operation mode of the bidirectional converter circuit 1 can be switched between step-up mode and step-down mode.

[0090] As an application example of the bidirectional converter circuit 1, when a charging station for an electric vehicle such as an electric aircraft or electric vehicle, or a home power source is connected to terminals TM1 and TM2 via an AC-DC converter or the like, and a storage battery installed in the electric vehicle is connected to terminals TM3 and TM4, the control circuit 15 controls the reverse-conducting switching element so that the circuit operates in step-up mode. This allows the bidirectional converter circuit 1 to operate as a step-up converter circuit as described above, boosting the power input from terminals TM1 and TM2 and supplying it to the storage battery connected to terminals TM3 and TM4. Furthermore, when an electronic device in the electric vehicle is connected to terminals TM1 and TM2 and the storage battery is connected to terminals TM3 and TM4, the control circuit 15 controls the reverse-conducting switching element so that the circuit operates in step-down mode. As a result, the bidirectional converter circuit 1 operates as a step-down converter circuit by allowing current to flow in the opposite direction to that in the above-described embodiments and modified examples, and can step down the power input from the terminals TM3 and TM4 and supply it to an electronic device connected to the terminals TM1 and TM2.

[0091] The bidirectional converter circuit 1 as such a modification can operate as a bidirectional converter circuit for boosting and bucking by controlling the direction of input and output of power in the boost converter circuits according to the above-mentioned embodiments and modifications. Note that not only the boost converter circuit 1 shown in Fig. 1 but also the boost converter circuits 1A and 2 shown in Fig. 3 and Fig. 4 can be similarly modified to realize a bidirectional converter circuit as the modification.

[0092] The above content will be explained in more detail below with reference to examples, but the following examples do not limit the above content in any way.

[0093] Example 1 shows the results of verifying the effects of the first embodiment described above. Example 1 shows the results of simulating the boost converter circuit (present circuit) 1 of the first embodiment shown in FIG. 1 using SPICE simulator software (LTspice (registered trademark)).

[0094] In this simulation, the circuit 1 was configured to receive an input voltage of 100 V from a voltage source V1 and output a boosted voltage to a load R1 having a resistance of 1 Ω, the capacitances of the boost capacitors C1, C2, and C3 were set to 300 μF, the capacitance of the smoothing capacitor C0 was set to 10,000 μF, and the inductance of the reactor L1 was set to 2 μH. Furthermore, the frequency of the switching control of the control circuit 15 was set to 30 kHz, and the on-duty was set to 51.1%.

[0095] The simulation results are as follows: Output voltage: 383.22 (V) Output current: 383.22 (A) Output power: 146.9 (kW) Input current: 1565.4 (A) Input power: 156.540 (kW) Ripple current of reactor L1: 79.4 (App) Ripple factor: 5.1% Output efficiency: 93.8%

[0096] 11 is a graph showing the simulation results of Example 1. In the graph of Fig. 11, symbol L1 indicates the waveform of the ripple current of reactor L1, symbol R1 indicates the output voltage to load R1, symbol S11 indicates the voltage applied to switching element S11, and symbol S21 indicates the voltage applied to switching element S21. When the voltage of symbol S11 is HI (approximately 20 V), switching element S11 is in the ON state. When the voltage of symbol S11 is LO (approximately 0 V), switching element S11 is in the OFF state. When the voltage of symbol S21 is HI (approximately 20 V), switching element S21 is in the ON state. When the voltage of symbol S21 is LO (approximately 0 V), switching element S21 is in the OFF state.

[0097] The ripple current (79.4 App) mentioned above indicates the average value of the difference between the peak current value and the valley current value in the ripple current waveform (L1) shown in Figure 11, and the ripple factor (5.1%) indicates the ratio of the ripple current (79.4 App) to the input current (1565.4 A). Also, the output efficiency (93.8%) indicates the ratio of the output power (146.9 kW) to the input power (156.5 kW).

[0098] The simulation results demonstrate that Circuit 1 can boost the input voltage (100 V) to approximately four times (383.22 V) and output it, while also reducing the reactor current ripple factor (5.1%) even with a small reactor L1 (2 μF). Existing boost converters (boost choppers) that handle relatively large input power, such as an input voltage (100 V) and an input current (1565.4 A), typically have a ripple factor exceeding 20%, even when using a large reactor (a reactor with an inductance of several tens of μF, or more than five times that of Circuit 1). Circuit 1 significantly reduces the ripple factor (5.1%) even when using a small reactor. Because a large ripple factor directly translates into losses in the reactor L1, reducing the ripple factor as in Circuit 1 achieves high output efficiency (93.8%).

[0099] 11, it can be seen that the peak current can be suppressed by converting the capacitor charging current into a pseudo-sine wave using the LCR filter characteristics (reactor L1, boost capacitor, etc.) of this circuit 1. Furthermore, because this effect can be achieved at a relatively low switching frequency of 30 kHz, an inexpensive magnetic material can be used for reactor L1.

[0100] In Example 1, further simulations were performed under the same simulation conditions as above, but with the resistance value of the load R1 changed from the set value (1Ω) to 10Ω and 15Ω, and the simulation results are shown below.

[0101] According to Table 1, this circuit 1 is proven to be able to boost the input voltage by approximately four times and output it even when the load resistance changes from 1 Ω to 10 Ω and 15 Ω. The ripple factor is also below 20%, and even with a small reactor L1, the ripple factor can be kept low. Although the ripple factor worsens as the load resistance increases, the low input current and ripple current (22.2 A, 20.6 A) prevent an increase in reactor loss, improving output efficiency. Thus, this circuit 1 can adapt to load fluctuations while keeping the ripple factor low, even with a small reactor L1.

[0102] In Example 2, further simulations were performed by varying the on-duty in the switching control of the control circuit 15 while adjusting the resistance value of the load R1 so that the output power in the circuit 1 was approximately constant under the same simulation conditions as in Example 1. The simulation results are shown below.

[0103] Table 2 shows the simulation results for Example 1, where the ripple factor is lowest when the on-duty is 51.5%. The ripple factor is lowest when the on-duty is near 50%, and the ripple factor decreases as the on-duty moves away from 50%. Meanwhile, as the on-duty is increased from 39.0% to 60.1%, the output voltage (Vout) also increases approximately linearly. Therefore, Table 2 demonstrates that circuit 1 can reduce the ripple factor while linearly varying the output voltage by adjusting the on-duty in the switching control of control circuit 15 within a range of approximately 50% ±10%.

[0104] Example 3 shows the results of verifying the effects of the second embodiment described above. Example 3 shows the results of simulating the boost converter circuit (main circuit) 2 of the second embodiment shown in FIG. 4 using the same simulator software as in Example 1.

[0105] The simulation results show the circuit characteristics of each of the contacts TA, TB, and TC of the circuit 2 when the output power is set to a substantially constant value. Table 2 shows the circuit characteristics when the contact TA is in electrical contact with the output contact TS, when the contact TB is in electrical contact with the output contact TS, and when the contact TC is in electrical contact with the output contact TS. The simulation conditions for Example 3 were as follows: the capacitances of the boost capacitors C1, C2, and C3 were set to 300 μF; the capacitance of the smoothing capacitor C0 was set to 5000 μF; and the inductance of the reactor L1 was set to 2 μH. Furthermore, the frequency of the switching control of the control circuit 15 was set to 30 kHz, and the on-duty was set to 51.1%.

[0106]

[0107] As shown in Table 3, when contact TA is in a conductive state, the input voltage is boosted to approximately four times the output voltage, when contact TB is in a conductive state, the input voltage is boosted to approximately six times the output voltage, and when contact TC is in a conductive state, the input voltage is boosted to approximately eight times the output voltage. Therefore, Table 3 demonstrates that circuit 2 can achieve boosted outputs of four, six, and eight times the input voltage while reducing the ripple factor even with a small reactor L1.

[0108] The demonstration results of the above-mentioned examples show that the boost converter circuits 1, 1A, and 2 in the above-mentioned embodiments and modifications enable reactor miniaturization even in high-power applications. As a result, the boost converter circuits 1, 1A, and 2 in the above-mentioned embodiments and modifications, and the bidirectional converter circuit 1 as a modification, can be said to be suitable for boost converter circuits or bidirectional converter circuits in power conversion mechanisms provided in electric transports such as electric aircraft, electric vehicles, etc.

[0109] Example 4 demonstrates the effects of the fourth embodiment. Example 4 shows simulation results using the same simulator software as Example 1 for the case where the soft-start control of the fourth embodiment is applied to the circuit configuration of the first embodiment shown in FIG. 1 . In this simulation, the input voltage from the voltage source V1 was set to 100 V, the resistance value of the load R1 was set to 1 Ω, the capacitances of the boost capacitors C1, C2, and C3 and the smoothing capacitor C0 were set to 1000 μF, and the inductance of the reactor L1 was set to 2 μH. Furthermore, the frequency and duty cycle of the switching control of the control circuit 15 were set to 25 kHz and 0.5, respectively. Furthermore, the predetermined time of the first-order delay in the soft-start control of the fourth embodiment was set to 10 ms.

[0110] 12(A) is a graph showing the circuit startup characteristics when soft start control is not applied to the circuit configuration of the first embodiment, and FIG. 12(B) is a graph showing the circuit startup characteristics when soft start control is applied to the circuit configuration of the first embodiment (fourth embodiment). FIG. 12(A) shows that an inrush current exceeding 8 kA occurs at circuit startup (within 1 ms). This is thought to be due to the overlap of currents flowing through all paths as well as current directly charging smoothing capacitor C0 from voltage source V1. Another possible factor is the miniaturization of reactor L1.

[0111] 12B, it can be seen that the inrush current is suppressed to about 2 kA. This is four times the effect of suppressing the inrush current compared to when soft start control is not applied. This demonstrates that the fourth embodiment, which applies soft start control, can suppress the inrush current at the time of circuit startup.

[0112] Example 5 demonstrates the effects of the sixth embodiment. Example 5 shows the results of a simulation using the same simulator software as Example 1, in which the control circuit 15 of the sixth embodiment is applied to the circuit configuration of the first embodiment shown in FIG. 1 . In this simulation, the input voltage from the voltage source V1 was set to 100 V, the resistance value of the load R1 was set to 1 Ω, the capacitances of the boost capacitors C1, C2, and C3 and the smoothing capacitor C0 were set to 1000 μF, and the inductance of the reactor L1 was set to 2 μH. Furthermore, the frequency of the gradation mode drive signal was set to 25 kHz, the frequency of the chopper mode drive signal was set to 50 kHz, the gradation duty threshold used by the mode switching determination circuit 158 ​​for mode switching was set to 0.338, and the voltage difference threshold used by the differential voltage detection circuit 156 for differential voltage detection was set to 30 V. The threshold voltage difference is set to approximately 1 / 10 of the voltage of the boost capacitor C3, which has the highest voltage and rises to over 300 V. With this setting, the duty was changed to verify whether the output voltage could be linearly stepped up and down.

[0113] Fig. 13A is a graph showing changes in the output voltage (Vout) and the voltages (V1, V2, and V3) of the boost capacitors C1, C2, and C3 with changes in duty in Example 5, and Fig. 13B is a graph showing changes in the power supply current with changes in duty in Example 5. Fig. 14 is a graph showing the relationship between the output voltage (Vout) and the output current and ripple current in Example 5.

[0114] 13A, as the duty cycle changes, the circuit's operating mode transitions from improved chopper mode to gradation mode and from gradation mode to improved chopper mode. With this transition, the output voltage (Vout) can be linearly increased and decreased from 1 to 4 times the input voltage (100V) and from 4 to 1. It can also be seen that voltage fluctuations during switching between operating modes are suppressed. Furthermore, in gradation mode, the voltages of the boost capacitors C1, C2, and C3 are divided at a ratio of approximately 2:1:3, demonstrating that voltage division control is operating properly.

[0115] 13(B) and 14, it can be seen that in Example 5, the ripple current can be suppressed to a small value across the entire range of step-up and step-down of the output voltage from 100 V to 400 V. The L current average value indicates the average value of the current flowing through reactor L1. On the other hand, when the standard chopper mode is adopted instead of the improved chopper mode, the ripple current exceeds 600 A at maximum, and exceeds 500 A even when the output voltage is 200 V. Therefore, it was demonstrated that Example 5 (control of the sixth embodiment in which the gradation mode and the improved chopper mode are switched between) in which the ripple current is below 200 A at maximum can achieve a significant effect in suppressing the ripple current, even compared to when the standard chopper mode is adopted.

[0116] The above content can also be specified as follows: However, the above content is not limited to the following description.

[0117] a first half-bridge circuit connected to the reactor; a first boost capacitor connected to a midpoint of the first half-bridge circuit, the charging and discharging of which is switched by a switching operation of the first half-bridge circuit; a second half-bridge circuit connected in parallel to the first half-bridge circuit; a second boost capacitor connected to a midpoint of the second half-bridge circuit, the charging and discharging of which is switched by a switching operation of the second half-bridge circuit; a smoothing capacitor that smoothes output from an output line connected to a connection line that connects the first boost capacitor and the second boost capacitor; and a switching control circuit that controls the first half-bridge circuit and the second half-bridge circuit by a separate excitation method so that switching operations are performed in opposite phases, wherein a first current path that charges the first boost capacitor by superimposing the voltage of the second boost capacitor on the voltage of the voltage source and a second current path that outputs the voltage of the voltage source by superimposing the voltage of the first boost capacitor on the voltage of the voltage source are realized under the control of the switching control circuit. <2> The boost converter circuit according to <1>, further comprising: a first additional boost capacitor, one terminal of which is connected to the output line and the other terminal of which is connected to a branch line extending from between the switching element pairs of the second half-bridge circuit; in the second current path, the voltage of the first additional boost capacitor is superimposed on the voltage of the voltage source to charge the first additional boost capacitor; and a third current path is further realized, under control of the switching control circuit, that superimposes the voltage of the first additional boost capacitor on the voltage of the voltage source and outputs the result from the output line.<3> The power supply further comprises a second additional boost capacitor, which is a boost capacitor having one terminal connected to the output side of the first additional boost capacitor in the output line and the other terminal connected to a branch line extending from between the switching element pairs of the first half-bridge circuit, wherein the first additional boost capacitor and the second additional boost capacitor are alternately provided in one or more stages toward the output side, and the number of the first additional boost capacitors is equal to or greater than the number of the second additional boost capacitors, <2> The boost converter circuit according to <2>, wherein, under the control of the switching control circuit, a current path in which the voltage of the first additional boost capacitor of the nth stage (n is 1 or more) is superimposed on the voltage of the voltage source to charge the second additional boost capacitor of the nth stage, a current path in which the voltage of the second additional boost capacitor of the nth stage is superimposed on the voltage of the voltage source to charge the first additional boost capacitor of the (n+1)th stage, and a current path in which the voltage of the first additional boost capacitor or the second additional boost capacitor of the final stage is superimposed on the voltage of the voltage source to output to the output line are realized according to the numbers of the first additional boost capacitors and the second additional boost capacitors. <4> The boost converter circuit according to <3>, wherein the first additional boost capacitor is provided in two or more stages, the second additional boost capacitor is provided in one or more stages, and the number of the first additional boost capacitors is greater than the second additional boost capacitors, and under control of the switching control circuit, the following current paths are realized according to the numbers of the first additional boost capacitors and the second additional boost capacitors: a current path in which the voltage of the first additional boost capacitor in an n-th stage (n is 1 or more) is superimposed on the voltage of the voltage source to charge the second additional boost capacitor in the n-th stage; a current path in which the voltage of the second additional boost capacitor in the n-th stage is superimposed on the voltage of the voltage source to charge the first additional boost capacitor in the (n+1)th stage; and a current path in which the voltage of the first additional boost capacitor in a final stage is superimposed on the voltage of the voltage source to output to the output line.<5> The boost converter circuit according to <3> or <4>, further comprising: an output contact connected to one terminal of the smoothing capacitor; and a plurality of contacts, any one of which can be selectively brought into contact with the output contact, wherein the plurality of contacts includes a contact that, by coming into electrical contact with the output contact, can superimpose the voltage of the first additional boost capacitor of the nth stage or the second additional boost capacitor of the nth stage on the voltage of the voltage source and output the superimposed voltage to the smoothing capacitor. <6> The boost converter circuit according to <2>, further comprising: an output contact connected to one terminal of the smoothing capacitor; and a plurality of contacts, any one of which can be selectively brought into contact with the output contact, wherein the plurality of contacts includes a contact that, by coming into electrical contact with the output contact, can superimpose the voltage of the first boost capacitor on the voltage of the voltage source and output the superimposed voltage to the smoothing capacitor, or a contact that, by coming into electrical contact with the output contact, can superimpose the voltage of the first additional boost capacitor on the voltage of the voltage source and output the superimposed voltage to the smoothing capacitor. <7> The boost converter circuit according to any one of <1> to <6>, wherein the switching control circuit varies the output from the smoothing capacitor by changing a duty that indicates a ratio between an on time and an off time in one cycle of the switching operation of the first half-bridge circuit and the second half-bridge circuit. <8> The boost converter circuit according to any one of <1> to <7>, wherein the switching control circuit gradually changes the duty of the switching operation of the first half-bridge circuit and the second half-bridge circuit to a target duty that corresponds to a target output voltage over a predetermined time from circuit startup. <9> The boost converter circuit according to <7> or <8>, further comprising: an error detection circuit that detects an error in voltage balance between the boost capacitors, wherein the switching control circuit adjusts the duty based on the error detected by the error detection circuit, thereby providing a predetermined difference in duty between the pairs of switching elements in each of the first half-bridge circuit and the second half-bridge circuit.<10> The boost converter circuit according to any one of <7> to <9>, wherein the switching control circuit is capable of switching between a first operation mode in which the first half-bridge circuit and the second half-bridge circuit are subjected to switching operation at a first set frequency and the duty of the switching operation is changed to increase or decrease the output from the smoothing capacitor, and a second operation mode in which the second half-bridge circuit is subjected to switching operation at a second set frequency and the duty of the switching operation is changed to increase or decrease the output from the smoothing capacitor, while keeping both switching element pairs of the first half-bridge circuit in an off state, according to a target duty corresponding to a target output voltage, wherein, when switching between the first operation mode and the second operation mode, the duty in the second operation mode is higher than the duty in the first operation mode, and the boost converter circuit operates in the first operation mode when the target duty is higher than one or more predetermined thresholds, and operates in the second operation mode when the target duty is lower than the predetermined thresholds. <11> The boost converter circuit according to <10>, wherein the second set frequency is higher than the first set frequency. <12> The boost converter circuit according to <10> or <11>, further comprising: a voltage division detection circuit that detects a voltage difference between a plurality of boost capacitors that are repeatedly charged and discharged during operation in the first operation mode, wherein the switching control circuit switches from the first operation mode to the second operation mode based on a comparison result between the target duty and the predetermined threshold value, and also based on a comparison result between the voltage difference detected by the voltage division detection circuit and a predetermined threshold value. <13> The boost converter circuit according to any one of <10> to <12>, further comprising: a voltage difference detection circuit that detects a voltage difference between the target output voltage and a voltage of the second boost capacitor or another boost capacitor that is repeatedly charged and discharged during operation in the second operation mode, wherein the switching control circuit adjusts a duty based on the voltage difference detected by the voltage difference detection circuit during operation in the second operation mode, to provide a predetermined difference in duty between a pair of switching elements of the second half-bridge circuit.<14> A bidirectional converter circuit comprising: the boost converter circuit according to any one of <1> to <13>, a first terminal capable of connecting the voltage source and the reactor, a second terminal capable of outputting the voltage smoothed by the smoothing capacitor, a plurality of reverse-conducting switching elements including a reverse-conducting switching element provided in the output line, and a control circuit capable of switching the input and output of power of the boost converter circuit in reverse directions by controlling the conduction directions of the plurality of reverse-conducting switching elements, thereby causing the boost converter circuit to also operate as a step-down converter circuit. <15> An electric transport equipped with a power conversion mechanism including the boost converter circuit according to any one of <1> to <13> or the bidirectional converter circuit according to <14>.

[0118] This application claims priority based on International Application No. PCT / JP2024 / 019727, filed May 29, 2024, the entire disclosure of which is incorporated herein by reference.

[0119] 1 Boost converter circuit (main circuit) 1A Boost converter circuit (modified circuit) 2 Boost converter circuit (main circuit) 10 Half-bridge circuit 20 Half-bridge circuit 15 Switching control circuit (control circuit) 150 Voltage balance control circuit 151 Drive signal generation circuit 152 Gradation mode voltage control circuit 153 Gradation mode drive signal generation circuit 154 Chopper mode voltage control circuit 155 Chopper mode drive signal generation circuit 156 Difference voltage detection circuit 157 Target DUTY setting circuit 158 ​​Mode switching determination circuit 159 Signal switching circuit V1 Voltage source L1 Reactor S11, S12, S21, S22 Switching elements C1, C2, C3, C11, C12, C13, C14 Boost capacitor C0 Smoothing capacitor D0, D1, D2, D3, D11, D12, D13, D14 Diode LN0 Output line LN1, LN2 Branch line R1 Load TA, TB, TC, TS Contacts RS0, RS1, RS2, RS3 Reverse conducting switching element

Claims

a first half-bridge circuit connected to the reactor; a first boost capacitor connected to a midpoint of the first half-bridge circuit, the charging and discharging of which is switched by the switching operation of the first half-bridge circuit; a second half-bridge circuit connected in parallel to the first half-bridge circuit; a second boost capacitor connected to the midpoint of the second half-bridge circuit, the charging and discharging of which is switched by the switching operation of the second half-bridge circuit; a smoothing capacitor that smoothes output from an output line connected to a connection line that connects the first boost capacitor and the second boost capacitor; and a switching control circuit that controls the first half-bridge circuit and the second half-bridge circuit by a separate excitation method so that switching operations are performed in opposite phases, wherein a first current path that charges the first boost capacitor by superimposing the voltage of the second boost capacitor on the voltage of the voltage source, and a second current path that outputs the voltage of the first boost capacitor by superimposing it on the voltage of the voltage source, are realized under the control of the switching control circuit.

2. The boost converter circuit according to claim 1, further comprising: a first additional boost capacitor, one terminal of which is connected to the output line and the other terminal of which is connected to a branch line extending from between the switching element pairs of the second half-bridge circuit; wherein in the second current path, the voltage of the first additional boost capacitor is superimposed on the voltage of the voltage source to charge the first additional boost capacitor; and wherein a third current path is further realized under the control of the switching control circuit, which superimposes the voltage of the first additional boost capacitor on the voltage of the voltage source to output the voltage from the output line.

3. A second additional boost capacitor is a boost capacitor having one terminal connected to the output side of the first additional boost capacitor in the output line and the other terminal connected to a branch line extending from between the switching element pairs of the first half-bridge circuit, wherein the first additional boost capacitor and the second additional boost capacitor are alternately provided in one or more stages toward the output side, and the number of the first additional boost capacitors is equal to or greater than the number of the second additional boost capacitors, 3. The boost converter circuit according to claim 2, wherein under the control of the switching control circuit, the following current paths are realized according to the numbers of the first additional boost capacitors and the second additional boost capacitors: a current path in which the voltage of the first additional boost capacitor of the nth stage (n is 1 or more) is superimposed on the voltage of the voltage source to charge the second additional boost capacitor of the nth stage; a current path in which the voltage of the second additional boost capacitor of the nth stage is superimposed on the voltage of the voltage source to charge the first additional boost capacitor of the (n+1)th stage; and a current path in which the voltage of the first additional boost capacitor or the second additional boost capacitor of the final stage is superimposed on the voltage of the voltage source to output to the output line.

4. The boost converter circuit according to claim 3, wherein the first additional boost capacitor is provided in two or more stages, the second additional boost capacitor is provided in one or more stages, and the number of first additional boost capacitors is greater than the number of second additional boost capacitors, and under the control of the switching control circuit, the following current paths are realized according to the numbers of the first additional boost capacitors and the second additional boost capacitors: a current path in which the voltage of the first additional boost capacitor in the nth stage (n is 1 or more) is superimposed on the voltage of the voltage source to charge the second additional boost capacitor in the nth stage; a current path in which the voltage of the second additional boost capacitor in the nth stage is superimposed on the voltage of the voltage source to charge the first additional boost capacitor in the (n+1)th stage; and a current path in which the voltage of the first additional boost capacitor in the final stage is superimposed on the voltage of the voltage source to output to the output line.

5. A boost converter circuit as claimed in claim 3, further comprising an output contact connected to one terminal of said smoothing capacitor, and a plurality of contacts, any one of which can be selectively brought into contact with said output contact, said plurality of contacts including a contact which, when in contact and conductive with said output contact, superimposes the voltage of said first additional boost capacitor of said nth stage or said second additional boost capacitor of said nth stage on the voltage of said voltage source, and enables the voltage to be output to said smoothing capacitor.

6. A boost converter circuit as claimed in claim 2, further comprising an output contact connected to one terminal of said smoothing capacitor, and a plurality of contacts, any one of which can selectively come into contact with said output contact, said plurality of contacts including a contact which, by coming into electrical contact with said output contact, allows the voltage of said first boost capacitor to be superimposed on the voltage of said voltage source and output to said smoothing capacitor, or a contact which, by coming into electrical contact with said output contact, allows the voltage of said first additional boost capacitor to be superimposed on the voltage of said voltage source and output to said smoothing capacitor.

7. The boost converter circuit according to claim 1, wherein the switching control circuit varies the duty cycle, which indicates the ratio between the on time and the off time in one cycle of the switching operation of the first half-bridge circuit and the second half-bridge circuit, to vary the output from the smoothing capacitor.

8. The boost converter circuit according to claim 1, wherein the switching control circuit gradually changes the duty of the switching operation of the first half-bridge circuit and the second half-bridge circuit to a target duty corresponding to the target output voltage over a predetermined period of time from when the circuit is started.

9. The boost converter circuit according to claim 7, further comprising an error detection circuit that detects an error in the voltage balance between the boost capacitors, wherein the switching control circuit adjusts the duty cycle based on the error detected by the error detection circuit, thereby providing a predetermined difference in duty cycle between the pairs of switching elements in each of the first half-bridge circuit and the second half-bridge circuit.

10. The boost converter circuit according to claim 7, wherein the switching control circuit is capable of switching between a first operation mode in which the first half-bridge circuit and the second half-bridge circuit are subjected to switching operation at a first set frequency and the duty of the switching operation is changed to increase or decrease the output from the smoothing capacitor, and a second operation mode in which the second half-bridge circuit is subjected to switching operation at a second set frequency and the duty of the switching operation is changed to increase or decrease the output from the smoothing capacitor, while keeping both switching element pairs of the first half-bridge circuit in an off state; and wherein, when switching between the first operation mode and the second operation mode, the duty in the second operation mode is higher than the duty in the first operation mode, and the boost converter circuit operates in the first operation mode when the target duty is higher than one or more predetermined thresholds, and operates in the second operation mode when the target duty is lower than the predetermined thresholds.

11. The boost converter circuit according to claim 10, wherein the second set frequency is higher than the first set frequency.

12. The boost converter circuit according to claim 10, further comprising a voltage division detection circuit that detects a voltage difference between a plurality of boost capacitors that are repeatedly charged and discharged during operation in the first operation mode, wherein the switching control circuit switches from the first operation mode to the second operation mode based on the result of comparing the voltage difference detected by the voltage division detection circuit with the predetermined threshold value, in addition to the result of comparing the target duty with the predetermined threshold value.

13. The boost converter circuit according to claim 10, further comprising a voltage difference detection circuit that detects a voltage difference between the target output voltage and the voltage of the second boost capacitor or another boost capacitor that is repeatedly charged and discharged during operation in the second operating mode, wherein the switching control circuit, during operation in the second operating mode, adjusts the duty based on the voltage difference detected by the voltage difference detection circuit to provide a predetermined difference in duty between the switching element pairs of the second half-bridge circuit.

14. A bidirectional converter circuit comprising: a boost converter circuit according to claim 1; a first terminal capable of connecting said voltage source and said reactor; a second terminal capable of outputting the voltage smoothed by said smoothing capacitor; a plurality of reverse-conducting switching elements including a reverse-conducting switching element provided on said output line; and a control circuit capable of controlling the conduction directions of said plurality of reverse-conducting switching elements to switch the input and output of power of said boost converter circuit in reverse directions, thereby causing said boost converter circuit to also operate as a buck converter circuit.

15. An electric transport equipped with a power conversion mechanism including the boost converter circuit according to any one of claims 1 to 13 or the bidirectional converter circuit according to claim 14.

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