Method and apparatus for generating quantum bit calibration graph, device, and storage medium

Abstract

A method and apparatus for generating a quantum bit calibration graph, a device, and a storage medium, relating to the technical field of quanta. The method comprises: acquiring a calibration template, wherein the calibration template comprises at least two template nodes and at least one first directed edge, each template node is used for representing a calibration process for a quantum bit, and the first directed edge is used for indicating the execution order of the calibration processes respectively represented by the two template nodes connected by the first directed edge (310); acquiring structural data of a quantum chip, wherein the structural data is used for indicating N quantum bits comprised in the quantum chip, and N is an integer greater than 1 (320); and on the basis of the calibration template and the structural data, generating a quantum bit calibration graph of the quantum chip, wherein the quantum bit calibration graph is used for graphically representing a calibration task for the N quantum bits (330). The method achieves automatic generation of a quantum bit calibration graph of a quantum chip, thereby improving the calibration efficiency of quantum bits.

Description

Method, device and equipment for generating quantum bit calibration graph and storage medium

[0001] The present application claims priority from the Chinese patent application No. 202410733831.3 filed on June 6, 2024 and entitled "Method, device and equipment for generating quantum bit calibration graph and storage medium", the whole content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the field of quantum technology, in particular to a method, device and equipment for generating quantum bit calibration graph and storage medium. BACKGROUND

[0003] A quantum chip is a central processing unit (CPU) of a quantum computer. To make the quantum computer run efficiently and stably, quantum bits in the quantum chip need to be calibrated to maintain accurate control over quantum states of the quantum bits.

[0004] In related technologies, a quantum bit calibration graph is generally used to represent and drive calibration tasks for quantum bits in a quantum chip.

[0005] Currently, a quantum bit calibration graph of a quantum chip is defined manually, and when the scale of the quantum chip changes, the structure of the quantum bit calibration graph needs to be adjusted manually. Therefore, the calibration efficiency of the quantum bits is low. SUMMARY

[0006] Embodiments of the present application provide a method, device and equipment for generating quantum bit calibration graph and storage medium, which can improve the calibration efficiency of quantum bits. The technical solutions provided by embodiments of the present application are as follows:

[0007] According to an aspect of embodiments of the present application, a method for generating a quantum bit calibration graph is provided, the method is executed by a computer device, and the method comprises:

[0008] obtaining a calibration template, the calibration template comprising at least two template nodes and at least one first directed edge, the template node being used to represent a calibration process for a quantum bit, and the first directed edge being used to indicate the execution order of the calibration processes represented by the two template nodes connected by the first directed edge;

[0009] obtaining structure data of a quantum chip, the structure data being used to indicate that the quantum chip comprises N quantum bits, N being an integer greater than 1;

[0010] According to the calibration template and the structure data, a quantum bit calibration graph of the quantum chip is generated, the quantum bit calibration graph being used for graphically representing a calibration task for the N quantum bits.

[0011] According to an aspect of the embodiment of the present application, a quantum bit calibration graph generation device is provided, the device comprising:

[0012] An acquisition module is configured to acquire a calibration template, the calibration template comprising at least two template nodes and at least one first directed edge, the template node being used for representing a calibration process for a quantum bit, and the first directed edge being used for indicating an execution order of the calibration processes represented by the two template nodes connected by the first directed edge;

[0013] The acquisition module is further configured to acquire structure data of a quantum chip, the structure data being used for indicating N quantum bits included in the quantum chip, N being an integer greater than 1.

[0014] A generation module is configured to generate, according to the calibration template and the structure data, a quantum bit calibration graph of the quantum chip, the quantum bit calibration graph being used for graphically representing a calibration task for the N quantum bits.

[0015] According to an aspect of the embodiment of the present application, a computer device is provided, the computer device comprising a processor and a memory, the memory storing a computer program, the computer program being loaded and executed by the processor to implement the above-mentioned quantum bit calibration graph generation method.

[0016] According to an aspect of the embodiment of the present application, a computer readable storage medium is provided, the storage medium storing a computer program, the computer program being loaded and executed by a processor to implement the above-mentioned quantum bit calibration graph generation method.

[0017] According to an aspect of the embodiment of the present application, a computer program product is provided, the computer program product comprising a computer program, the computer program being stored in a computer readable storage medium, and a processor reading and executing the computer program from the computer readable storage medium to implement the above-mentioned quantum bit calibration graph generation method.

[0018] The technical scheme provided by the embodiment of the present application has at least the following beneficial effects:

[0019] The quantum bit calibration graph is automatically generated by generating a quantum bit calibration graph for graphically representing the calibration tasks for the N quantum bits in the quantum chip according to the calibration template and the structure data of the quantum chip. In the method, the template node in the calibration template represents a calibration process for a quantum bit (or a type of calibration process), and the structure data is used to indicate the N quantum bits included in the quantum chip and the coupling relationship between the N quantum bits. Therefore, by combining the structure data and the fixed calibration template, the quantum bit calibration graph that conforms to the actual structure of the quantum chip can be automatically generated regardless of the change in the scale of the quantum chip (e.g., the increase in the number of quantum bits included in the quantum chip or the change in the coupling relationship between the quantum bits in the quantum chip). Compared with the manual definition and adjustment of the quantum bit calibration graph in the related art, the quantum bit calibration graph is automatically generated in the present application, which not only improves the generation efficiency of the quantum bit calibration graph, but also further improves the calibration efficiency of the quantum bit. BRIEF DESCRIPTION OF DRAWINGS

[0020] FIG. 1 is a schematic diagram of a computer system according to an embodiment of the present application;

[0021] FIG. 2 is a schematic diagram of a method for generating a quantum bit calibration graph according to an embodiment of the present application;

[0022] FIG. 3 is a flowchart of a method for generating a quantum bit calibration graph according to an embodiment of the present application;

[0023] FIG. 4 is a schematic diagram of a calibration template according to an embodiment of the present application;

[0024] FIG. 5 is a schematic diagram of a topological structure of a quantum chip according to an embodiment of the present application;

[0025] FIG. 6 is a schematic diagram of a topological structure of a quantum chip according to another embodiment of the present application;

[0026] FIG. 7 is a flowchart of a method for generating a quantum bit calibration graph according to another embodiment of the present application;

[0027] FIG. 8 is a schematic diagram of a quantum bit calibration graph of a quantum chip according to an embodiment of the present application;

[0028] FIG. 9 is a schematic diagram of a generation process of a quantum bit calibration graph according to an embodiment of the present application;

[0029] FIG. 10 is a block diagram of a device for generating a quantum bit calibration graph according to an embodiment of the present application;

[0030] FIG. 11 is a structural block diagram of a computer device according to an embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0032] Before the embodiments of the present application are introduced and described, some terms involved in the present application will be explained and described first. The following related explanations are optional solutions which can be combined with the technical solutions of the embodiments of the present application arbitrarily, and all of them belong to the protection scope of the embodiments of the present application. The embodiments of the present application include at least part of the following contents.

[0033] Quantum Computation: a computing method based on quantum logic, which uses the superposition and entanglement of quantum states to complete computing tasks quickly. The basic unit of data storage of quantum computation is quantum bit.

[0034] Qubit: the form of carrying quantum information, and also the basic unit of quantum computation. Classical computers use 0 and 1 as the basic unit of binary computation. Unlike them, the state of a quantum bit is described by a linear combination of the computational basis states (0 state or 1 state), usually referred to as a superposition state.

[0035] Quantum Operation: an operation that manipulates quantum bits and thus processes the quantum information carried by quantum bits. Common quantum operations include Pauli X, Y, Z transformations (or written as σx, σy, σz), Hadamard transformation (H), controlled Pauli X transformation, etc. Quantum operations include single-bit operations for a single quantum bit and multi-bit operations for multiple coupled quantum bits.

[0036] Quantum Chip: a chip based on the principles of quantum mechanics, which is the central processing unit of a quantum computer. Different scales of quantum chips have different numbers of quantum bits.

[0037] Qubit Calibration: the storage and computation of a quantum computer are carried out by quantum bits, which is a storage and computation integrated structure. Its data storage and operation control need to be based on accurate control of quantum states. Qubit calibration is the standardization of this control process. A calibrated quantum bit can maintain accurate control within a certain range of accuracy for a period of time.

[0038] Qubit calibration graph: In order to meet the needs of formal computation, qubits will undergo a series of calibration procedures based on physical models, usually including searching for the working frequency of quantum devices, calibrating the quantum state of isolated qubits and quantum gates, and calibrating a series of physical parameters such as multi-bit gates. The calibration and setting process can be abstracted as a directed graph structure containing at least two calibration nodes, called qubit calibration graph. The qubit calibration graph can indicate the dependency relationship of each calibration node and drive the qubit calibration process.

[0039] Directed acyclic graph (DAG): composed of a finite number of nodes and directed edges, from any node, through several directed edges, it is impossible to return to the node, the graph that meets the above conditions is a directed acyclic graph.

[0040] Calibration automation: The calibration process of qubits involves a plurality of quantum devices, a plurality of dependent groups of calibration processes that can be defined as a qubit calibration graph, and the calibration nodes corresponding to these calibration processes involve complex microwave control. Moreover, the corresponding control parameters have the characteristics of high dimension, multiple dependencies and random drift. Automating the control process of these parameters means calibration automation.

[0041] Please refer to FIG. 1, which shows a schematic diagram of a computer system provided by an embodiment of the present application. The computer system includes a first device 11, a second device 12, a control device 13, and a quantum computing device 14.

[0042] The quantum computing device 14 is a quantum chip or a quantum computer containing a quantum chip.

[0043] The first device 11 and the second device 12 are classical computers. The first device 11 and the second device 12 can be the same computer device, or they can be different computer devices. In some embodiments, the first device 11 performs the task of generating a qubit calibration graph, and the first device 11 sends the qubit calibration graph generated for the quantum computing device 14 to the second device 12. In some embodiments, the second device 12 is used to control the control device 13, for example, the second device 12 sends instructions indicating different qubit calibration processes to the control device 13 in order according to the qubit calibration graph. The second device 12 and the control device 13 can communicate through a network, such as a wireless or wired network.

[0044] The control device 13 includes a series of analog controllers for controlling the quantum computing device 14. For example, in the case that the quantum computing device 14 is a superconducting quantum chip, the control device 13 controls the quantum bits in the quantum computing device 14 by controlling the temperature of the environment in which the quantum computing device 14 is located. In some embodiments, the control device 13 performs calibration on the quantum bits in the quantum computing device 14 according to the instructions sent by the second device 12.

[0045] In the following method embodiments, for ease of illustration, only the execution subject of each step is a computer device. For example, the computer device can be the first device 11 in the computer system described above, or the second device 12, or the control device 13, which is not limited in the present application.

[0046] Please refer to FIG. 2, which shows a schematic diagram of a method for generating a quantum bit calibration graph according to an embodiment of the present application.

[0047] In this embodiment, based on two graph structures, a calibration template 21 and a topology graph 22 of a quantum chip, a quantum bit calibration graph 23 of the quantum chip is generated. The calibration template 21 includes at least two template nodes and at least one first directed edge. The template nodes are used to represent a calibration process for a quantum bit. The first directed edge is used to indicate the execution order of the calibration processes represented by the two template nodes connected by the first directed edge. The topology graph 22 of the quantum chip includes N topology nodes. Each topology node in the topology graph is used to represent a quantum bit in the quantum chip. The connection relationship between these topology nodes can indicate the coupling relationship between the quantum bits.

[0048] The technical solution provided in the embodiments of the present application can separate the work of quantum chip designers and quantum chip calibration personnel, i.e., the quantum chip designers design the topology graph of the quantum chip, and the quantum chip calibration personnel design the calibration template. Furthermore, by combining the topology graph and the calibration template in a “graph-in-graph” manner, the automatic generation of the quantum bit calibration graph can be realized, and the research and development efficiency of the quantum chip is improved.

[0049] Please refer to FIG. 3, which shows a flowchart of a method for generating a quantum bit calibration graph according to an embodiment of the present application. The execution subject of each step of the method is a computer device. The method includes at least one of the following steps 310-330.

[0050] Step 310: Obtain a calibration template. The calibration template includes at least two template nodes and at least one first directed edge. The template nodes are used to represent a calibration process for a quantum bit. The first directed edge is used to indicate the execution order of the calibration processes represented by the two template nodes connected by the first directed edge.

[0051] The quantum bit mentioned in the embodiments of the present application refers to a physical quantum bit with a physical structure. For example, the quantum bit is a superconducting quantum bit including a Josephson junction.

[0052] The calibration process for the quantum bit is used to calibrate the parameters of the quantum bit. The parameters of the quantum bit refer to parameters related to the quantum bit. In some embodiments, the parameters of the quantum bit include at least one of the following: parameters describing the physical characteristics of the quantum bit, parameters of quantum operations for the quantum bit. Exemplarily, the parameters describing the physical characteristics of the quantum bit include the read frequency of the quantum bit, the position of the quantum bit, the read power of the quantum bit, the coherence time of the quantum bit (including the spin relaxation time t1 and the decoherence time t2), etc. The parameters of the quantum operation include the parameters of the quantum gate, including the single quantum bit gate for implementing single-bit operations and the multi-quantum bit gate for implementing multi-bit operations. The parameters of the quantum operation include the parameters of the single-bit operation (including the parameters of the single quantum bit gate) and the parameters of the multi-bit operation (including the parameters of the multi-quantum bit gate).

[0053] In some embodiments, the calibration template refers to a template for implementing the calibration process for the quantum bit. The calibration template not only embodies what kind of calibration process is performed, but also embodies the execution order between the calibration processes. In some embodiments, the calibration template includes at least one calibration process for the quantum bit, and the execution order between different kinds of calibration processes. Exemplarily, one template node is used to represent one kind of calibration process for the quantum bit, and a directed edge (i.e. a first directed edge) connecting two different template nodes is used to indicate the execution order between the calibration processes represented by the two different template nodes. In some embodiments, as shown in FIG. 4, it is a schematic diagram of the calibration template provided by an embodiment of the present application. Wherein, A, B, C, D are different template nodes, respectively corresponding to different kinds of calibration processes, and edges ab, ac, bd, cd are different first directed edges, respectively used to indicate the execution order of different kinds of calibration processes. Exemplarily, as shown in FIG. 4, for the quantum bit, first, the calibration process represented by the template node A is executed, and then the calibration processes represented by the template nodes B and C are executed (the two calibration processes can be executed in parallel or not). After the calibration process represented by the template node B is executed, the calibration process represented by the template node D is executed, or after the calibration process represented by the template node C is executed, the calibration process represented by the template node D is executed.

[0054] In some embodiments, the template nodes are used to represent calibration processes for qubits, and different template nodes represent different calibration processes for qubits. As shown in FIG. 4, A, B, C, and D are different template nodes, each of which corresponds to a different kind of calibration process.

[0055] In some embodiments, the first directed edge is used to indicate the execution order of the calibration processes represented by the two template nodes connected by the first directed edge. In some embodiments, the first directed edge is a directed edge connecting two template nodes. For example, as shown in FIG. 4, the first directed edge ab connects template node A and template node B, and is a directed edge from template node A to template node B. For example, the first directed edge ab indicates that the calibration process corresponding to template node A is executed first, and then the calibration process corresponding to template node B is executed.

[0056] In some embodiments, the template nodes are single template nodes or coupled template nodes, the single template nodes are used to represent calibration processes for a single qubit, and the coupled template nodes are used to represent calibration processes for Q qubits that have a coupling relationship, where Q is an integer greater than 1.

[0057] In some embodiments, a single template node refers to a calibration process represented by the template node being for a single qubit. Of course, the qubit can be a qubit that does not have a coupling relationship with other qubits (isolated qubit), or a qubit that has a coupling relationship with other qubits. In some embodiments, a coupled template node refers to a calibration process represented by the template node being for at least two qubits that have a coupling relationship. As shown in FIG. 4, template nodes A and B are two single template nodes, and template nodes C and D are two coupled template nodes.

[0058] The calibration process for a single qubit is used to calibrate parameters of the single qubit.

[0059] In some embodiments, the parameters of the single qubit include the parameters described above for representing physical characteristics of the qubit, and the parameters of single-qubit operations (such as the parameters of Pauli X, Y, and Z transformations).

[0060] In some embodiments, the calibration process for Q qubits is used to calibrate parameters of multi-qubit operations (such as controlled Pauli X, Y, and Z transformations) for the Q qubits.

[0061] It should be noted that the calibration process represented by the template node is universal and is not for one or several qubits. For example, the calibration process represented by a single template node is applicable to all qubits in the quantum chip, i.e., the calibration process represented by the single template node can be used to calibrate certain parameters of each qubit in the quantum chip (e.g., the parameters of the Pauli X transformation corresponding to each qubit). For another example, if a coupling template node is used to represent a calibration process for two qubits that have a coupling relationship, the calibration process represented by the coupling template node is applicable to all double-qubit groups in the quantum chip, which include two qubits that are coupled in the quantum chip, i.e., the calibration process represented by the coupling template node can be used to calibrate certain parameters of the double-bit operation for each double-qubit group in the quantum chip (e.g., the parameters of the controlled Pauli X transformation, i.e., the controlled non (C-Not) gate, for each double-qubit group). Therefore, in the embodiments of the present application, the calibration process represented by the template node is referred to as "a" calibration process.

[0062] In some embodiments, the coupling template node is used to represent a calibration process for two qubits that have a coupling relationship.

[0063] In some embodiments, the calibration template is represented in the form of a directed acyclic graph.

[0064] Exemplarily, reference is made to FIG. 4, which shows a schematic diagram of a calibration template provided by an embodiment of the present application. In the calibration template, there are template nodes A, B, C, and D, and first directed edges ab, ac, bd, and cd. The template nodes A and B are respectively used to represent a calibration process for a single qubit, so the template nodes A and B are both single template nodes. The template nodes C and D are respectively used to represent a calibration process for two qubits that have a coupling relationship, so the template nodes C and D are both coupling template nodes. The first directed edge ab indicates that the calibration process represented by the template node A is performed first, and then the calibration process represented by the template node B is performed. The first directed edge ac indicates that the calibration process represented by the template node A is performed first, and then the calibration process represented by the template node C is performed. The first directed edge bd indicates that the calibration process represented by the template node B is performed first, and then the calibration process represented by the template node D is performed. The first directed edge cd indicates that the calibration process represented by the template node C is performed first, and then the calibration process represented by the template node D is performed.

[0065] In some embodiments, the calibration template is constructed by the following code:

[0066] In step 320, the structure data of the quantum chip is obtained, and the structure data is used to indicate N qubits included in the quantum chip, where N is an integer greater than 1.

[0067] The quantum chip can be a superconducting quantum chip containing superconducting qubits, or a semiconductor quantum chip, an optical quantum chip, etc., which are not limited in the present application.

[0068] In some embodiments, the structure data is used to indicate N qubits included in the quantum chip. For example, the N qubits included in the quantum chip can be obtained from the structure data, which can be all qubits on the quantum chip, or part of the qubits on the quantum chip. As shown in FIG. 5, a schematic diagram of the structure data is shown. For example, the structure data indicates that there are four different qubits q1, q2, q3 and q4.

[0069] In some embodiments, in addition to indicating the N qubits included in the quantum chip, the structure data is also used to indicate the coupling between the N qubits. In some embodiments, the structure data is used to indicate the qubits with coupling relationship in the N qubits, and the isolated qubits not coupled with any other qubits. For example, as shown in FIG. 5, the black border between qubits q1 and q2 indicates that there is a coupling relationship between the two qubits, the black border between qubits q2 and q4 indicates that there is a coupling relationship between the two qubits, the black border between qubits q3 and q4 indicates that there is a coupling relationship between the two qubits, and the black border between qubits q1 and q3 indicates that there is a coupling relationship between the two qubits. For example, as shown in the structure data in FIG. 5, there is no isolated qubit. For example, as shown in the structure data in FIG. 6, there is an isolated qubit q5.

[0070] In some embodiments, the structure data of the quantum chip is represented in the form of a topological structure diagram.

[0071] For example, please refer to FIG. 5, which shows a schematic diagram of a topological structure diagram of a quantum chip provided by an embodiment of the present application. The topological structure diagram indicates that the quantum chip contains four qubits q1, q2, q3 and q4, and indicates that q1 and q2 have a coupling relationship, q1 and q3 have a coupling relationship, q2 and q4 have a coupling relationship, and q3 and q4 have a coupling relationship.

[0072] In some embodiments, the coupling relationship between at least two qubits means that the at least two qubits are directly connected in the quantum chip. In some embodiments, the coupling relationship between at least two qubits means that the at least two qubits are connected through other devices (such as capacitors and inductors) in the quantum chip other than qubits.

[0073] It should be noted that in the embodiments of the present application, at least two quantum bits that are not coupled through other quantum bits are referred to as at least two quantum bits having a coupling relationship. For example, in FIG. 5, q2 and q3 both have a coupling relationship with q1, but q2 and q3 do not have a coupling relationship.

[0074] In addition, it should be noted that in FIG. 5, quantum bits are coupled two by two, which is only an example of the coupling condition between quantum bits. In actual quantum chips, there can be isolated quantum bits, and there can be more quantum bits coupled (such as a three-qubit gate). For example, refer to FIG. 6, which shows a schematic diagram of a topological structure of a quantum chip according to another embodiment of the present application. Compared with FIG. 5, FIG. 6 further indicates an isolated quantum bit q5, and further indicates that q1, q3 and q4 have a coupling relationship.

[0075] In some embodiments, the topological structure of the quantum chip is constructed by the following code:

[0076] In step 330, a quantum bit calibration graph of the quantum chip is generated according to the calibration template and the structure data, and the quantum bit calibration graph is used to graphically represent the calibration task for the N quantum bits.

[0077] The calibration task for the N quantum bits includes a plurality of calibration processes for at least one of the N quantum bits, that is, the calibration task for the N quantum bits can be divided into a plurality of local calibration processes, and each local calibration process can be represented as a calibration node in the quantum bit calibration graph.

[0078] In some embodiments, graphically representing the calibration task for the N quantum bits can be understood as using a graphical form to represent the calibration task for the N quantum bits, so that the execution order of the calibration task for the N quantum bits and the quantum bits calibrated by different calibration tasks can be clearly and intuitively perceived.

[0079] In some embodiments, the quantum bit calibration graph includes at least two calibration nodes and at least one second directed edge. In some embodiments, a calibration node is used to represent one calibration process for at least one of the N quantum bits. Exemplarily, as shown in FIG. 8, calibration node A(q1) represents performing the calibration process represented by template node A for quantum bit q1, and calibration node B(q1) represents performing the calibration process represented by template node B for quantum bit q1. In some embodiments, a second directed edge is used to indicate the execution order of the calibration processes represented by the two calibration nodes connected by the second directed edge. Exemplarily, as shown in FIG. 8, the edge connecting calibration node A(q1) and calibration node B(q1) and pointing from calibration node A(q1) to calibration node B(q1) is a second directed edge. The second directed edge is used to indicate that the calibration process represented by template node A is performed for quantum bit q1 first, and then the calibration process represented by template node B is performed for quantum bit q1.

[0080] It should be noted that each calibration node has a corresponding relationship with a quantum bit in the quantum chip, i.e., the calibration process represented by the calibration node is actually required to be performed for one or more quantum bits in the quantum chip. Therefore, in the embodiments of the present application, the calibration process represented by the calibration node is referred to as "one" calibration process.

[0081] In some embodiments, the calibration task of the quantum chip is divided into two stages, i.e., a first stage and a second stage, and corresponding quantum bit calibration graphs are generated for the first stage and the second stage. In the first stage, calibration processes are performed for each quantum bit in the quantum chip respectively, and accordingly, the calibration templates used in the first stage only include single template nodes, such as only including template nodes A and B in FIG. 4, and the quantum bit calibration graph corresponding to the first stage is used to graphically represent the calibration processes performed for the N quantum bits respectively. In the second stage, calibration processes are performed for each quantum bit group in the quantum chip respectively, and a quantum bit group includes Q quantum bits (Q can be any integer greater than 1) having a coupling relationship, and accordingly, the calibration templates used in the second stage only include coupling template nodes, such as only including template nodes C and D in FIG. 4, and the quantum bit calibration graph corresponding to the second stage is used to graphically represent the calibration processes performed for each quantum bit group included in the N quantum bits respectively.

[0082] The technical scheme provided in the embodiments of the present application realizes automatic generation of the qubit calibration graph by generating the qubit calibration graph for graphically representing the calibration task for the N qubits in the quantum chip according to the calibration template and the structure data of the quantum chip. In the above method, the template node in the calibration template represents a kind of or a type of calibration process for the qubit, and the structure data is used to indicate the N qubits included in the quantum chip and the coupling conditions between the N qubits. Therefore, by combining the structure data and the fixed calibration template, the quantum chip calibration graph conforming to the actual structure of the quantum chip can be automatically generated regardless of the change in the scale of the quantum chip (for example, the increase in the number of qubits included in the quantum chip or the change in the coupling relationship between the qubits in the quantum chip), thereby improving the generation efficiency of the quantum chip calibration graph and improving the calibration efficiency of the qubits.

[0083] In the following embodiments, the specific method of generating the qubit calibration graph according to the calibration template and the structure data will be described.

[0084] In some embodiments, referring to FIG. 7, the step 330 includes at least one of the following sub-steps 332-334.

[0085] In the sub-step 332, the template node is expanded into at least one calibration node in the qubit calibration graph according to the structure data, and the calibration node is used to represent a calibration process for at least one qubit in the N qubits.

[0086] In some embodiments, the expansion in the embodiments of the present application can also be understood as splitting, that is, splitting one template node into at least one calibration node. In some embodiments, the at least one calibration node obtained by expanding from one template node can also be considered as at least one calibration node split from the template node. In some embodiments, the structure data indicates the N qubits on the quantum chip. In some embodiments, after the N qubits on the quantum chip are determined from the structure data, there are at least two template nodes in the calibration template, and the number of qubits calibrated by each template node is the same or different, thereby realizing calibration for the N qubits.

[0087] For example, when the calibration process represented by the i th template node in the at least two template nodes is for each qubit on the quantum chip, the i th template node is expanded into N calibration nodes, and each calibration node is used to perform the calibration process represented by the i th template node on one qubit in the N qubits, where i is a positive integer.

[0088] Exemplarily, when the calibration process represented by the i-th template node in the at least two template nodes is for the case that at least two qubits on the quantum chip satisfy the first relationship, the i-th template node is expanded into M calibration nodes, each of which is used to perform the calibration process represented by the i-th template node on one qubit group in the N qubits, i being a positive integer. The one qubit group includes at least two qubits satisfying the first relationship. In some embodiments, there are M qubit groups in the N qubits on the quantum chip. In some embodiments, the first relationship includes at least one of a coupling relationship, a position relationship, a distance relationship, etc. In some embodiments, the structure data further indicates the qubits in the N qubits that have a relationship. Exemplarily, the relationship includes at least one of a coupling relationship, a position relationship, a distance relationship, etc. Exemplarily, the qubits having the relationship are determined directly from the structure data, and it is determined whether the relationship is the first relationship. When the relationship is the first relationship, at least two qubits satisfying the first relationship are taken as one qubit group, and the calibration process represented by the i-th template node is performed on the one qubit group.

[0089] Exemplarily, there can be qubits on the quantum chip that are not calibrated by any calibration process represented by the template nodes in the calibration template. Of course, there can be qubits on the quantum chip that are calibrated by multiple calibration processes represented by multiple template nodes in the calibration template.

[0090] It should be noted that the calibration process represented by the calibration node expanded from a template node corresponds to the calibration process represented by the template node. Exemplarily, if the template node j is a single template node, and the calibration node k is expanded from the template node j, the calibration node k can be used to represent the calibration process represented by the template node j performed on a qubit in the N qubits. That is, the calibration node is used to represent the calibration process represented by the template node corresponding to the calibration node performed on at least one qubit in the N qubits. In the embodiments of the present application, each template node and each directed edge in the calibration template needs to be expanded according to the structure data respectively.

[0091] In some embodiments, the calibration node is a single calibration node or a coupled calibration node, the single calibration node is used to represent one calibration process performed on one qubit in the N qubits, and the coupled calibration node is used to represent one calibration process performed on multiple qubits in the N qubits having a coupling relationship.

[0092] In some embodiments, the coupled calibration node is used to represent one calibration process performed on two qubits in the N qubits having a coupling relationship.

[0093] In some embodiments, the sub-step 332 comprises at least one of the following steps:

[0094] 1. In the case that the template node is a single template node, according to the structure data, the single template node is expanded into N single calibration nodes in the quantum bit calibration graph.

[0095] In some embodiments, in the case that the template node is a single template node, according to each of the N quantum bits of the quantum chip indicated by the structure data, the template node is respectively expanded to obtain N single calibration nodes, each single calibration node is used to indicate a calibration process for one quantum bit.

[0096] Specifically, in the case that the i-th template node of the at least two template nodes is a single template node, the i-th template node is expanded into N calibration nodes, each calibration node is used to perform the calibration process represented by the i-th template node on one of the N quantum bits, and the N quantum bits correspond to the N calibration nodes. At this time, the calibration node is also called a single calibration node, and the number of quantum bits calibrated by the calibration node is 1.

[0097] Exemplarily, for each of the at least two template nodes, it is judged whether it belongs to a single template node. In the case that it belongs to a single template node, each single template node is expanded into a single calibration node corresponding to each of the N quantum bits respectively, thereby obtaining N single calibration nodes. Exemplarily, the N single calibration nodes expanded from the same single template node correspond to the same calibration process, but the calibrated quantum bits are different.

[0098] Please refer to FIG. 8, which shows a schematic diagram of a quantum bit calibration graph of a quantum chip according to an embodiment of the present application.

[0099] Exemplarily, according to the topological structure diagram of the quantum chip shown in FIG. 5, it can be known that N=4, so the single template node A shown in FIG. 4 can be expanded into the single calibration nodes A(q1), A(q2), A(q3) and A(q4) in FIG. 8, taking A(q1) as an example, A(q1) represents performing the calibration process represented by the single template node A on the quantum bit q1; the single template node B shown in FIG. 4 can be expanded into the single calibration nodes B(q1), B(q2), B(q3) and B(q4) in FIG. 8, taking B(q1) as an example, B(q1) represents performing the calibration process represented by the single template node B on the quantum bit q1.

[0100] 2. In a case where the template node is a coupling template node, according to the structure data, the coupling template node is expanded into M coupling calibration nodes in the quantum bit calibration graph, where M is the number of quantum bit groups contained in the N quantum bits, M is a positive integer, and the quantum bit group includes Q quantum bits that have a coupling relationship.

[0101] In some embodiments, in a case where the template node is a coupling template node, according to the quantum bits that have a coupling relationship in the N quantum bits of the quantum chip indicated by the structure data, the template node is expanded respectively to obtain M coupling calibration nodes, and each coupling calibration node is used to indicate a calibration process for a group of quantum bits that have a coupling relationship.

[0102] Specifically, in a case where the i-th template node in the at least two template nodes is a coupling template node, the i-th template node is expanded into M calibration nodes, and each calibration node is used to perform a calibration process represented by the i-th template node on a group of quantum bits in the N quantum bits, where i is a positive integer. The group of quantum bits includes at least two quantum bits that satisfy a coupling relationship. In some embodiments, there are M groups of quantum bits in the N quantum bits on the quantum chip. In some embodiments, the first relationship described above is the coupling relationship described herein. In some embodiments, the structure data further indicates quantum bits that have a relationship in the N quantum bits. Exemplarily, the relationship includes the coupling relationship. Exemplarily, the quantum bits that have the relationship are determined directly from the structure data, and it is determined whether the relationship is the coupling relationship. In a case where the relationship is the coupling relationship, at least two quantum bits that satisfy the coupling relationship are taken as a group of quantum bits, and a calibration process represented by the i-th template node is performed on the group of quantum bits. Each calibration node is used to perform a calibration process represented by the i-th template node on a group of quantum bits in the N quantum bits, and the M groups of quantum bits correspond to the M calibration nodes. At this time, the calibration node is also referred to as a coupling calibration node, and the number of quantum bits calibrated by the calibration node is the number of quantum bits in a group of quantum bits that have a coupling relationship.

[0103] Exemplarily, for each template node in the at least two template nodes, it is determined whether it belongs to a coupling template node. In a case where it belongs to a coupling template node, for each coupling template node, M groups of quantum bits in the N quantum bits are obtained, the coupling template node is expanded into a coupling calibration node corresponding to each of the M groups of quantum bits respectively, thereby obtaining M coupling calibration nodes. Exemplarily, the M coupling calibration nodes obtained from the same coupling template node have the same calibration process but different groups of quantum bits to be calibrated.

[0104] Exemplarily, the template node C and the template node D in FIG. 4 are both coupling template nodes (Q = 2). According to the topology diagram of the quantum chip shown in FIG. 5, it is known that the number of quantum bit groups contained in the four quantum bits is 4, which are a quantum bit group c1_2 including q1 and q2, a quantum bit group c1_3 including q1 and q3, a quantum bit group c2_4 including q2 and q4, and a quantum bit group c3_4 including q3 and q4. Therefore, the coupling template node C shown in FIG. 4 can be expanded into coupling calibration nodes C(c1_2), C(c1_3), C(c2_4) and C(c3_4) in FIG. 8, taking C(c1_2) as an example, C(c1_2) represents performing the calibration process characterized by the coupling template node C on quantum bits q1 and q2; the coupling template node D shown in FIG. 4 can be expanded into coupling calibration nodes D(c1_2), D(c1_3), D(c2_4) and D(c3_4) in FIG. 8, taking D(c1_2) as an example, D(c1_2) represents performing the calibration process characterized by the coupling template node D on quantum bits q1 and q2.

[0105] In the above embodiment, the single template node is expanded into a single calibration node, and the coupling template node is expanded into a coupling calibration node, so that the generated quantum bit calibration graph can be used not only for performing single quantum bit calibration tasks on the quantum chip, but also for performing multi-quantum bit calibration tasks on the quantum bits coupled in the quantum chip, thereby guaranteeing the completeness of the quantum bit calibration graph.

[0106] In some embodiments, the sub-step 332 comprises: in the case that the template node is a target template node, expanding the target template node into at least two calibration nodes connected by a third directed edge according to the structure data. The calibration process characterized by the target template node is affected by the coupling relationship between quantum bits when acting on different quantum bits.

[0107] In some embodiments, the calibration process characterized by the target template node is affected by the coupling relationship between quantum bits when acting on different quantum bits refers to that the execution order of the calibration process characterized by the target template node for different quantum bits (different single quantum bits or different quantum bit groups) is affected by the coupling relationship between quantum bits.

[0108] Exemplarily, the calibration process characterized by the target template node is used to calibrate the timing parameter of the quantum bit, and the timing parameter is a parameter related to the working timing of the quantum chip. The calibration of the timing parameter needs to be based on the coupling relationship between quantum bits. Considering the execution order for different quantum bits or different quantum bit groups in the quantum chip, therefore, the calibration process characterized by the target template node is affected by the coupling relationship between quantum bits.

[0109] Exemplarily, the calibration process represented by the target template node is used for calibrating a crosstalk parameter of a quantum bit, the crosstalk parameter is used for describing noise formed due to coupling of quantum bits in a quantum chip, and calibration for the crosstalk parameter also needs to consider an execution order for different quantum bits or different groups of quantum bits in the quantum chip according to a coupling relationship between the quantum bits, and therefore the calibration process represented by the target template node is affected by the coupling relationship between the quantum bits.

[0110] The third directed edge is used for indicating that the calibration processes represented by the two calibration nodes connected by the third directed edge cannot be executed in parallel.

[0111] Exemplarily, referring to FIG. 8, the third directed edge connecting B(q1) and B(q2) is used for indicating that the calibration processes represented by B(q1) and B(q2) cannot be executed in parallel, the third directed edge connecting B(q1) and B(q3) is used for indicating that the calibration processes represented by B(q1) and B(q3) cannot be executed in parallel, and the third directed edge connecting B(q3) and B(q4) is used for indicating that the calibration processes represented by B(q3) and B(q4) cannot be executed in parallel. In some embodiments, as shown in FIG. 8, the third directed edge connecting B(q1) and B(q2) is not only used for indicating that the calibration processes represented by B(q1) and B(q2) cannot be executed in parallel, but also can indicate that the calibration process represented by B(q1) is executed first and then the calibration process represented by B(q2) is executed, that is, the third directed edge is used for indicating that the calibration processes represented by the two calibration nodes connected by the third directed edge are executed in series.

[0112] In the above embodiments, the target template node is expanded into a plurality of calibration nodes connected by third directed edges, so that in the finally generated quantum bit calibration graph, it is limited that the calibration nodes expanded from the target template node cannot be executed in parallel, a constraint for parallel execution of the calibration process represented by the target template node is set, and the correctness of executing the calibration task according to the quantum bit calibration graph is guaranteed.

[0113] In some embodiments, the target template node is a single template node or a coupled template node.

[0114] In some embodiments, in the case where the target template node is a single template node, the two calibration nodes connected by the third directed edge correspond to quantum bits that have a coupling relationship.

[0115] Exemplarily, referring to FIG. 8, the quantum bits q1 and q2 corresponding to B(q1) and B(q2) respectively have the coupling relationship shown in FIG. 4, the quantum bits q1 and q3 corresponding to B(q1) and B(q3) respectively have the coupling relationship shown in FIG. 4, and the quantum bits q3 and q4 corresponding to B(q3) and B(q4) respectively have the coupling relationship shown in FIG. 4.

[0116] In some embodiments, in the case that the target template node is a coupling template node, the two calibration nodes connected by the third directed edge correspond to Q quantum bits respectively, which contain the same quantum bit.

[0117] Exemplarily, one of the two calibration nodes connected by the third directed edge corresponds to q1 and q2 in FIG. 4, and the other of the two calibration nodes connected by the third directed edge corresponds to q1 and q3 in FIG. 4.

[0118] In some embodiments, according to the structure data, the target template node is expanded into a plurality of calibration nodes connected by third directed edges by a tree search method.

[0119] In some embodiments, the tree search method includes BFS (Breath First Search) and DFS (Deep First Search).

[0120] Exemplarily, for the template node B shown in FIG. 4, if the BFS method is used according to the topological structure diagram shown in FIG. 5, it can be expanded into B(q1), B(q2), B(q3) and B(q4) connected by third directed edges in FIG. 8. The order indicated by the third directed edge is the search order of the BFS method. In this example, the quantum bit q1 in the topological structure diagram is taken as the starting search point of the BFS, and B(q1) is generated. Then, according to the principle of breadth priority, q2 and q3 coupled with q1 are searched, and B(q2) and B(q3) are generated. Finally, q4 is searched from q3, and B(q4) is generated. The quantum bit as the starting search point of the tree search algorithm is set by the technician as needed, which is not limited in the present application.

[0121] In the above embodiments, the quantum bits corresponding to the two calibration nodes connected by the third directed edge have a coupling relationship, or the plurality of quantum bits corresponding to the two calibration nodes connected by the third directed edge contain the same quantum bit. That is, the quantum bits corresponding to the two calibration nodes connected by the third directed edge have a direct physical association relationship. Therefore, by the above method, the calibration process represented by the target template node can be executed separately when acting on these quantum bits (or quantum bit groups) with relatively close physical distance in the quantum chip, so as to avoid the deviation of the calibration result caused by simultaneously executing the calibration process represented by the template node on the coupled quantum bits (or two quantum bit groups containing the same quantum bit).

[0122] In some embodiments, the following code is used to determine whether the template node in the calibration template is for a single quantum bit or for a plurality of quantum bits having a coupling relationship, and the expansion method of the template node:

[0123] Sub-step 334, the first directed edge is unfolded into at least one second directed edge in the quantum bit calibration graph, the second directed edge is used to indicate the execution order of the calibration processes respectively represented by the two calibration nodes connected by the second directed edge.

[0124] In some embodiments, the unfolding in the embodiments of the present application can also be understood as splitting, splitting a first directed edge into at least one second directed edge. In some embodiments, the at least one second directed edge obtained by unfolding from a first directed edge can also be considered as at least one second directed edge split from the first directed edge.

[0125] In some embodiments, each second directed edge connects two calibration nodes to generate the quantum bit calibration graph.

[0126] It should be noted that the two calibration nodes connected by the second directed edge correspond to the two template nodes connected by the first directed edge corresponding to the second directed edge. Exemplarily, if the second directed edge t is obtained by unfolding from the first directed edge r, and the two template nodes connected by the first directed edge r are template node j and template node k, respectively, then the two calibration nodes connected by the second directed edge t are obtained by unfolding from template node j and template node k, respectively.

[0127] In addition, it should be noted that the direction of the second directed edge also corresponds to the direction of the first directed edge corresponding to the second directed edge. Exemplarily, if the second directed edge t is obtained by unfolding from the first directed edge r, and the two template nodes connected by the first directed edge r are template node j and template node k, respectively, and the first directed edge r points from template node j to template node k, then the second directed edge t points from the calibration node obtained by unfolding from template node j to the calibration node obtained by unfolding from template node k.

[0128] In some embodiments, sub-step 334 includes at least one of the following steps:

[0129] 1. In the case where both template nodes connected by the first directed edge are single template nodes, the first directed edge is unfolded into N second directed edges in the quantum bit calibration graph, each of the N second directed edges connects two single calibration nodes corresponding to the same quantum bit in the N quantum bits.

[0130] The two single calibration nodes corresponding to the same quantum bit in the N quantum bits means that the quantum bits to which the calibration processes respectively represented by the two single calibration nodes are directed are all the quantum bit.

[0131] Exemplarily, if the first directed edge is ab in FIG. 4, the first directed edge ab can be unfolded into 4 second directed edges connecting A(q1) and B(q1), connecting A(q2) and B(q2), connecting A(q3) and B(q3), and connecting A(q4) and B(q4) in FIG. 8 (since A and B are both unfolded into 4 calibration nodes, N = 4 is known), and the second directed edge connecting A(q1) and B(q1) corresponds to q1 in FIG. 5.

[0132] 2. In the case that the two template nodes connected by the first directed edge are a single template node and a coupled template node respectively, the first directed edge is unfolded into M x Q second directed edges in the quantum bit calibration graph, and each of the M x Q second directed edges connects a single calibration node and a coupled calibration node corresponding to a same quantum bit in the N quantum bits.

[0133] The single calibration node and the coupled calibration node corresponding to a same quantum bit in the N quantum bits means that the quantum bits to which the calibration processes represented by the two calibration nodes correspond both include the quantum bit.

[0134] Exemplarily, if the first directed edge is ac in FIG. 4 (the coupled template node C is directed to two quantum bits, Q = 2), the first directed edge ac can be unfolded into 8 second directed edges connecting A(q1) and C(c1_2), connecting A(q1) and C(c1_3), connecting A(q2) and C(c1_2), connecting A(q2) and C(c2_4), connecting A(q3) and C(c1_3), connecting A(q3) and C(c3_4), connecting A(q4) and C(c3_4), and connecting A(q4) and C(c2_4) in FIG. 8 (since the coupled template node C is unfolded into 4 calibration nodes, M = 4), and the second directed edge connecting A(q1) and C(c1_2) corresponds to q1 in FIG. 5.

[0135] Exemplarily, if the first directed edge is bd in FIG. 4 (the coupling template node D is coupled to two quantum bits, Q = 2), the first directed edge bd can be expanded into 8 second directed edges in FIG. 8, which are the second directed edge connecting B (q1) and D (c1_2), the second directed edge connecting B (q1) and D (c1_3), the second directed edge connecting B (q2) and D (c1_2), the second directed edge connecting B (q2) and D (c2_4), the second directed edge connecting B (q3) and D (c1_3), the second directed edge connecting B (q3) and D (c3_4), the second directed edge connecting B (q4) and D (c3_4), and the second directed edge connecting B (q4) and D (c2_4) (M = 4 because the coupling template node D is expanded into 4 calibration nodes), taking the second directed edge connecting B (q1) and D (c1_2) as an example, B (q1) and D (c1_2) connected by the second directed edge both correspond to the quantum bit q1 in FIG. 5.

[0136] 3. In the case where the two template nodes connected by the first directed edge are a first coupling template node and a second coupling template node, the first directed edge is expanded into P second directed edges in the quantum bit calibration graph.

[0137] The first coupling template node is used to represent a calibration process for Q1 quantum bits having a coupling relationship, the second coupling template node is used to represent a calibration process for Q2 quantum bits having a coupling relationship, Q2 is an integer greater than 1 and less than or equal to Q1, P is the sum of the number of second quantum bit groups contained in each first quantum bit group (in the N quantum bits), and P is a positive integer. The first quantum bit group includes Q1 quantum bits having a coupling relationship in the N quantum bits, the second quantum bit group includes Q2 quantum bits having a coupling relationship in the N quantum bits, and each of the P second directed edges connects two coupling calibration nodes corresponding to a same second quantum bit group in the N quantum bits.

[0138] The two coupling calibration nodes corresponding to a same second quantum bit group in the N quantum bits means that the quantum bits corresponding to the calibration processes represented by the two coupling calibration nodes both include the quantum bits in the second quantum bit group.

[0139] Exemplarily, if the first directed edge is cd in FIG. 4, the second coupling template node is C in FIG. 4, and the first coupling template node is D in FIG. 4 (since both the second coupling template node C and the first coupling template node D are for two quantum bits, Q1 = Q2 = 2), the first directed edge cd can be expanded into four second directed edges connecting C(c1_2) and D(c1_2), connecting C(c1_3) and D(c1_3), connecting C(c3_4) and D(c3_4), and connecting C(c2_4) and D(c2_4) in FIG. 8 (since the first quantum bit group and the second quantum bit group are the same, P = M = 4), and the second directed edge connecting C(c1_2) and D(c1_2) is taken as an example, both C(c1_2) and D(c1_2) connected by the second directed edge correspond to the second quantum bit group c1_2 (i.e., the quantum bits q1 and q2 in FIG. 5).

[0140] Exemplarily, refer to FIG. 9, which shows a schematic diagram of a generation process of a quantum bit calibration graph according to an embodiment of the present application. In the calibration template 91 shown in FIG. 9, the second coupling template node E is used to represent a calibration process for two quantum bits with a coupling relationship, i.e., Q2=2, and the first coupling template node F is used to represent a calibration process for three quantum bits with a coupling relationship, i.e., Q1=3. In the topology structure graph 92, the quantum chip includes quantum bits q5, q6, q7, and q8, in which q5 and q6 have a coupling relationship, q6 and q7 have a coupling relationship, q7 and q8 have a coupling relationship, q5, q6, and q7 have a coupling relationship, and q5, q7, and q8 have a coupling relationship. In the corresponding quantum bit calibration graph 93, the second coupling template node E is expanded into three coupling calibration nodes E(c5_6), E(c6_7), and E(c7_8). E(c5_6) represents performing the calibration process represented by the second coupling template node E on the quantum bits q5 and q6 (i.e., the second quantum bit group (c5_6)), E(c6_7) represents performing the calibration process represented by the second coupling template node E on the quantum bits q6 and q7 (i.e., the second quantum bit group (c6_7)), and E(c7_8) represents performing the calibration process represented by the second coupling template node E on the quantum bits q7 and q8 (i.e., the second quantum bit group (c7_8)). The first coupling template node F is expanded into two coupling calibration nodes F(c5_6_7) and F(c5_7_8). F(c5_6_7) represents performing the calibration process represented by the first coupling template node F on the quantum bits q5, q6, and q7, and F(c5_7_8) represents performing the calibration process represented by the first coupling template node F on the quantum bits q5, q7, and q8. Then, the first directed edge ef can be expanded into three second directed edges ((c5_6_7) contains (c5_6) and (c6_7), and (c5_7_8) contains (c7_8), i.e., P=3) connecting E(c5_6) and F(c5_6_7), E(c6_7) and F(c5_6_7), and E(c7_8) and F(c5_7_8) in FIG. 9. Among them, E(c5_6) and F(c5_6_7) correspond to (c5_6), E(c6_7) and F(c5_6_7) correspond to (c6_7), and E(c7_8) and F(c5_7_8) correspond to E(c7_8).

[0141] In various cases of the above embodiments, the two calibration nodes connected by the second directed edge each correspond to the same quantum bit or the same quantum bit group in the quantum chip. Therefore, each second directed edge expanded by the above method can fully and accurately indicate the order of performing different calibration processes on each quantum bit and each quantum bit group in the quantum chip based on the coupling relationship of each quantum bit in the quantum chip.

[0142] In some embodiments, according to the structure data, each template node in the calibration template is expanded into at least one calibration node, and each first directed edge is expanded into at least one second directed edge, so as to obtain a qubit calibration graph of the quantum chip.

[0143] In the above embodiments, based on the calibration template, the template nodes and the first directed edges in the calibration template are respectively expanded according to the structure data of the quantum chip, so as to expand the calibration template into the qubit calibration graph of the quantum chip. The inverted expansion method is adopted, and the topological structure graph of the quantum chip is not used as the bottom structure, but the relatively stable calibration template is used as the bottom structure, so as to ensure the consistency of the calibration processes represented by the template nodes in the calibration template when the calibration processes are applied to the qubits in the quantum chip, and to ensure the stability of the bottom structure of the qubit calibration graph, which will not change with the size and topology of the quantum chip, and is beneficial to the instant generation and optimization of the qubit calibration graph.

[0144] In some embodiments, the qubit calibration graph of the quantum chip is generated by the following code:

[0145] In some embodiments, after the qubit calibration graph is generated, the calibration processes represented by the respective calibration nodes are executed in the execution order indicated by the respective second directed edges in the qubit calibration graph.

[0146] Exemplarily, referring to FIG. 8, the calibration processes represented by the calibration nodes A(q1), A(q2), A(q3) and A(q4) expanded from the template node A in FIG. 4 are executed first, then the calibration processes represented by the calibration nodes B(q1), B(q2), B(q3) and B(q4) expanded from the template node B in FIG. 4 are executed, and the calibration processes represented by the calibration nodes C(c1_2), C(c1_3), C(c3_4) and C(c2_4) expanded from the template node C in FIG. 4 are executed, and finally the calibration processes represented by the calibration nodes D(c1_2), D(c1_3), D(c3_4) and D(c2_4) expanded from the template node D in FIG. 4 are executed.

[0147] In the above embodiments, the calibration processes represented by the respective calibration nodes are executed in the execution order indicated by the second directed edges expanded from the first directed edges. While realizing the automatic execution of the calibration task for the quantum chip, the correctness of the execution order of the respective calibration processes is ensured.

[0148] In some embodiments, in the qubit calibration graph, the calibration processes respectively represented by the J calibration nodes are executed in parallel, and the J calibration nodes are expanded from the same template node, and J is an integer greater than 1.

[0149] For example, referring to FIG. 8, the calibration processes respectively represented by the calibration nodes A(q1), A(q2), A(q3) and A(q4) expanded from the template node A in FIG. 4 can be executed in parallel. The calibration processes respectively represented by the calibration nodes C(c1_2), C(c1_3), C(c3_4) and C(c2_4) expanded from the template node C in FIG. 4 can be executed in parallel. And the calibration processes respectively represented by the calibration nodes D(c1_2), D(c1_3), D(c3_4) and D(c2_4) expanded from the template node D in FIG. 4 can be executed in parallel.

[0150] In the above embodiments, by setting the J calibration nodes expanded from the same template node to be executed in parallel, the efficiency of performing the calibration task for the N qubits in the quantum chip can be improved, and the time required for the calibration task execution process can be reduced.

[0151] In some embodiments, in the qubit calibration graph, the calibration processes respectively represented by the K calibration nodes are executed in parallel.

[0152] The K calibration nodes are expanded from the same target template node, and the number of third directed edges between the K calibration nodes is greater than a first threshold.

[0153] For example, referring to FIG. 8, among the calibration nodes B(q1), B(q2), B(q3) and B(q4) expanded from the target template node B in FIG. 4, B(q1) is the calibration node to be executed first, and the number of third directed edges between B(q2) and B(q3) is 2. If the first threshold is 1, the calibration processes respectively represented by B(q2) and B(q3) are executed in parallel. If the first threshold is greater than or equal to 2, the calibration processes respectively represented by B(q2) and B(q3) cannot be executed in parallel.

[0154] The first threshold can be set by the technician according to the parameters required for calibration of the target template node, and the arrangement of each device (such as a qubit and a device coupling qubits) in the quantum chip, and can be 1, 2, 3, etc., which is not limited in the present application.

[0155] As can be known from the above embodiments, the two quantum bits corresponding to the two calibration nodes connected by the third directed edge have a physical direct correlation relationship, and thus the number of the third directed edges between the two calibration nodes can be used to represent the distance of the two quantum bits or the quantum bit group corresponding to the two calibration nodes in the quantum chip, or the degree of mutual influence in the quantum chip. Therefore, by setting the first threshold value and enabling the calibration nodes expanded from the target template node to be executed in parallel with intervals, the execution efficiency of the calibration task is ensured, and the actual physical structure and arrangement of the quantum chip are considered, so that the effectiveness of the calibration task is ensured.

[0156] The following is an apparatus embodiment of the present application, which can be used to execute the method embodiments of the present application. For details not disclosed in the apparatus embodiments of the present application, please refer to the method embodiments of the present application.

[0157] Please refer to FIG. 10, which shows a block diagram of a quantum bit calibration graph generation apparatus according to an embodiment of the present application. The apparatus has the function of implementing the above-mentioned method for generating a quantum bit calibration graph, which can be realized by hardware or by executing corresponding software by hardware. The apparatus can be a computer device or can be arranged in a computer device. The apparatus 1000 can include an acquisition module 1010 and a generation module 1020.

[0158] The acquisition module 1010 is configured to acquire a calibration template, wherein the calibration template includes at least two template nodes and at least one first directed edge, the template nodes are used to represent a calibration process for quantum bits, and the first directed edge is used to indicate the execution order of the calibration processes represented by the two template nodes connected by the first directed edge.

[0159] The acquisition module 1010 is further configured to acquire structure data of a quantum chip, wherein the structure data is used to indicate that the quantum chip includes N quantum bits, and N is an integer greater than 1.

[0160] The generation module 1020 is configured to generate a quantum bit calibration graph of the quantum chip according to the calibration template and the structure data, wherein the quantum bit calibration graph is used to graphically represent a calibration task for the N quantum bits.

[0161] In some embodiments, the generation module 1020 includes a node expansion submodule, an edge expansion submodule, and a generation submodule (not shown in FIG. 10).

[0162] The node expansion submodule is configured to expand the template nodes into at least one calibration node in the quantum bit calibration graph according to the structure data, wherein the calibration node is used to represent a calibration process for at least one quantum bit in the N quantum bits.

[0163] an edge unfolding sub-module, configured to unfold the first directed edge into at least one second directed edge in the quantum bit calibration graph, the second directed edge being used to indicate an execution order of calibration processes respectively represented by two calibration nodes connected by the second directed edge.

[0164] In some embodiments, the template node is a single template node or a coupled template node, the single template node being used to represent one calibration process for one quantum bit, the coupled template node being used to represent one calibration process for Q quantum bits having a coupling relationship, the calibration node is a single calibration node or a coupled calibration node, the single calibration node being used to represent one calibration process for one quantum bit of the N quantum bits, the coupled calibration node being used to represent one calibration process for Q quantum bits of the N quantum bits having a coupling relationship, Q being an integer greater than 1.

[0165] a node unfolding sub-module, configured to, in a case that the template node is the single template node, unfold the single template node into N single calibration nodes in the quantum bit calibration graph according to the structure data, and in a case that the template node is the coupled template node, unfold the coupled template node into M coupled calibration nodes in the quantum bit calibration graph according to the structure data, M being a number of quantum bit groups included in the N quantum bits, M being a positive integer, and the quantum bit group including Q quantum bits having a coupling relationship.

[0166] In some embodiments, the edge expanding submodule is configured to, in a case where both of the two template nodes connected by the first directed edge are the single template nodes, expand the first directed edge into N second directed edges in the qubit calibration graph, each of the N second directed edges connecting two single calibration nodes corresponding to a same qubit among the N qubits; in a case where the two template nodes connected by the first directed edge are the single template node and the coupled template node respectively, expand the first directed edge into MxQ second directed edges in the qubit calibration graph, each of the MxQ second directed edges connecting a single calibration node and a coupled calibration node corresponding to a same qubit among the N qubits; in a case where the two template nodes connected by the first directed edge are the first coupled template node and the second coupled template node respectively, expand the first directed edge into P second directed edges in the qubit calibration graph, wherein the first coupled template node is configured to represent a calibration process for Q1 qubits having a coupling relationship, the second coupled template node is configured to represent a calibration process for Q2 qubits having a coupling relationship, Q2 is an integer greater than 1 and less than or equal to Q1, P is a sum of quantities of second qubit groups included in each first qubit group, P is a positive integer, the first qubit group includes Q1 qubits among the N qubits having a coupling relationship, the second qubit group includes Q2 qubits among the N qubits having a coupling relationship, and each of the P second directed edges connects two coupled calibration nodes corresponding to a same second qubit group among the N qubits.

[0167] In some embodiments, the node expanding submodule is configured to, in a case where the template node is a target template node, expand the target template node into at least two calibration nodes connected by a third directed edge in the qubit calibration graph according to the structure data, the calibration process represented by the target template node being affected by a coupling relationship between qubits when acting on different qubits, and the third directed edge being configured to indicate that the calibration processes represented by the two calibration nodes connected by the third directed edge cannot be executed in parallel.

[0168] In some embodiments, the target template node is a single template node or a coupling template node, the single template node is used to represent a calibration process for a single qubit, and the coupling template node is used to represent a calibration process for Q qubits that have a coupling relationship, Q being an integer greater than 1; in the case where the target template node is the single template node, the two calibration nodes connected by the third directed edge correspond to qubits that have a coupling relationship; and in the case where the target template node is the coupling template node, the Q qubits corresponding to the two calibration nodes connected by the third directed edge include the same qubit.

[0169] In some embodiments, the apparatus 1000 further includes an execution module (not shown in FIG. 10).

[0170] The execution module is configured to execute the calibration processes represented by the respective calibration nodes in the order indicated by the second directed edges in the qubit calibration graph.

[0171] In some embodiments, the calibration processes represented by the J calibration nodes are executed in parallel, the J calibration nodes are derived from the same template node, and J is an integer greater than 1.

[0172] In some embodiments, the calibration processes represented by the K calibration nodes are executed in parallel; the K calibration nodes are derived from the same target template node, and the number of third directed edges between the K calibration nodes is greater than a first threshold; and the calibration process represented by the target template node is affected by the coupling relationship between qubits when acting on different qubits, and the third directed edge is used to indicate that the calibration processes represented by the two calibration nodes connected by the third directed edge cannot be executed in parallel.

[0173] It should be noted that the apparatus provided in the above embodiments is only used as an example to illustrate the division of the above functional modules, and in actual applications, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the apparatus and method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process is described in detail in the method embodiments, which will not be repeated here.

[0174] Please refer to FIG. 11, which exemplarily shows a structural block diagram of a computer device provided in an embodiment of the present application.

[0175] Generally, the computer device 1100 includes a processor 1101 and a memory 1102.

[0176] The processor 1101 can include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like. The processor 1101 can be implemented in at least one of a hardware form of a DSP (Digital Signal Processing), an FPGA (Field Programmable Gate Array), a PLA (Programmable Logic Array). The processor 1101 can also include a main processor and a coprocessor, the main processor being a processor for processing data in an awake state, also known as a CPU, and the coprocessor being a low-power processor for processing data in a standby state. In some embodiments, the processor 1101 can be integrated with a GPU (Graphics Processing Unit) that is responsible for rendering and drawing the content required to be displayed by the display screen. In some embodiments, the processor 1101 can also include an AI (Artificial Intelligence) processor for processing machine learning-related computing operations.

[0177] The memory 1102 can include one or more computer-readable storage media that can be tangible and non-transitory. The memory 1102 can also include a high-speed random access memory, and a non-volatile memory such as one or more disk storage devices, flash storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 1102 stores a computer program loaded and executed by the processor 1101 to implement the above-mentioned method for generating a qubit calibration graph.

[0178] Those skilled in the art can understand that the structure shown in FIG. 11 does not constitute a limitation on the computer device 1100, and can include more or fewer components than those shown, or combine certain components, or adopt different component arrangements.

[0179] In some embodiments, a chip product is also provided, which includes programmable logic circuits and / or computer programs, and when the chip product is running, is used to implement the above-mentioned method for generating a qubit calibration graph.

[0180] In some embodiments, a computer-readable storage medium is also provided, which stores a computer program, and the computer program is loaded and executed by a processor to implement the above-mentioned method for generating a qubit calibration graph.

[0181] Optionally, the computer readable storage medium can include: ROM (Read-Only Memory), RAM (Random-Access Memory), SSD (Solid State Drives), or optical disc, etc. Among them, the random access memory can include ReRAM (Resistance Random Access Memory) and DRAM (Dynamic Random Access Memory).

[0182] In some embodiments, a computer program product is also provided, which includes a computer program stored in a computer readable storage medium, and a processor reads and executes the computer program from the computer readable storage medium to implement the above-mentioned generation method of the qubit calibration graph.

[0183] It should be understood that "multiple" mentioned herein refers to two or more. The "and / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent: A exists alone, A and B exist together, and B exists alone. The character " / " generally represents that the associated objects before and after it are in an "or" relationship. In addition, the step numbers described herein only exemplarily show a possible execution order between steps. In some other embodiments, the above steps can also be executed in a different order, such as two different numbered steps are executed at the same time, or two different numbered steps are executed in an order opposite to the illustration, and the embodiments of the present application are not limited to this.

[0184] The above is only an exemplary embodiment of the present application, and is not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for generating a quantum bit calibration graph, the method being performed by a computer device, the method comprising: obtaining a calibration template, the calibration template comprising at least two template nodes and at least one first directed edge, the template nodes being used to represent a calibration process for a quantum bit, the first directed edge being used to indicate an execution order of the calibration processes represented by the two template nodes connected by the first directed edge; obtaining structure data of a quantum chip, the structure data being used to indicate that the quantum chip comprises N quantum bits, N being an integer greater than 1; generating a quantum bit calibration graph of the quantum chip according to the calibration template and the structure data, the quantum bit calibration graph being used to graphically represent calibration tasks for the N quantum bits.

2. The method of claim 1, wherein, the generating a quantum bit calibration graph of the quantum chip according to the calibration template and the structure data comprises: expanding the template nodes into at least one calibration node in the quantum bit calibration graph according to the structure data, the calibration node being used to represent a calibration process for at least one quantum bit of the N quantum bits; expanding the first directed edge into at least one second directed edge in the quantum bit calibration graph, the second directed edge being used to indicate an execution order of the calibration processes represented by the two calibration nodes connected by the second directed edge.

3. The method of claim 2, wherein, the structure data is further used to indicate coupling conditions among the N quantum bits, the template nodes are single template nodes or coupled template nodes, the single template node is used to represent a calibration process for a single quantum bit, the coupled template node is used to represent a calibration process for Q quantum bits having a coupling relationship, the calibration nodes are single calibration nodes or coupled calibration nodes, the single calibration node is used to represent a calibration process for one quantum bit of the N quantum bits, the coupled calibration node is used to represent a calibration process for Q quantum bits of the N quantum bits having a coupling relationship, Q being an integer greater than 1; the expanding the template nodes into at least one calibration node in the quantum bit calibration graph according to the structure data comprises at least one of: in a case where the template node is the single template node, expanding the single template node into N single calibration nodes in the quantum bit calibration graph according to the structure data; in a case where the template node is the coupled template node, expanding the coupled template node into M coupled calibration nodes in the quantum bit calibration graph according to the structure data, M being a number of quantum bit groups included in the N quantum bits, M being a positive integer, the quantum bit group comprising Q quantum bits having a coupling relationship.

4. The method of claim 3, wherein, the expanding the first directed edge into at least one second directed edge in the quantum bit calibration graph comprises at least one of: in a case where the two template nodes connected by the first directed edge are both the single template nodes, the first directed edge is expanded into N second directed edges in the qubit calibration graph, each of the N second directed edges connecting two single calibration nodes corresponding to a same qubit among the N qubits; in a case where the two template nodes connected by the first directed edge are the single template node and the coupled template node respectively, the first directed edge is expanded into MxQ second directed edges in the qubit calibration graph, each of the MxQ second directed edges connecting one single calibration node and one coupled calibration node corresponding to a same qubit among the N qubits; in a case where the two template nodes connected by the first directed edge are a first coupled template node and a second coupled template node respectively, the first directed edge is expanded into P second directed edges in the qubit calibration graph, wherein the first coupled template node is used to represent a calibration process for Q1 qubits having a coupling relationship, the second coupled template node is used to represent a calibration process for Q2 qubits having a coupling relationship, Q1 is a positive integer greater than 1, Q2 is an integer greater than 1 and less than or equal to Q1, P is a sum of quantities of second qubit groups respectively included by each first qubit group, P is a positive integer, the first qubit group includes Q1 qubits having a coupling relationship among the N qubits, the second qubit group includes Q2 qubits having a coupling relationship among the N qubits, and each of the P second directed edges connects two coupled calibration nodes corresponding to a same second qubit group among the N qubits.

5. The method according to any one of claims 2 to 4, wherein, The structure data is also used to indicate a coupling relationship among the N qubits, and the expanding the template nodes into at least one calibration node in the qubit calibration graph according to the structure data comprises: in a case where the template node is a target template node, expanding the target template node into at least two calibration nodes connected by a third directed edge in the qubit calibration graph according to the structure data, a calibration process represented by the target template node is affected by a coupling relationship among qubits when acting on different qubits, and the third directed edge is used to indicate that calibration processes represented by two calibration nodes connected by the third directed edge cannot be executed in parallel.

6. The method of claim 5, wherein, the target template node is a single template node or a coupled template node, the single template node is used to represent a calibration process for a single qubit, and the coupled template node is used to represent a calibration process for Q qubits having a coupling relationship, Q being an integer greater than 1; in a case where the target template node is the single template node, the two calibration nodes connected by the third directed edge correspond to qubits having a coupling relationship respectively; In a case where the target template node is the coupling template node, two calibration nodes connected by the third directed edge correspond to a same quantum bit.

7. The method according to any one of claims 2 to 6, wherein, The method further includes: The calibration processes respectively represented by the calibration nodes are executed in an order indicated by the second directed edges in the quantum bit calibration graph.

8. The method according to any one of claims 2 to 7, wherein, The calibration processes respectively represented by J calibration nodes are executed in parallel, the J calibration nodes being derived from a same template node, and J being an integer greater than 1.

9. The method according to any one of claims 2 to 8, wherein, The calibration processes respectively represented by K calibration nodes are executed in parallel. The K calibration nodes are derived from a same target template node, and a number of third directed edges between the K calibration nodes is greater than a first threshold. In a case where the calibration process represented by the target template node is affected by a coupling relationship between quantum bits when acting on different quantum bits, the third directed edge is used to indicate that the calibration processes respectively represented by two calibration nodes connected by the third directed edge cannot be executed in parallel.

10. An apparatus for generating a quantum bit calibration graph, the apparatus comprising: an obtaining module configured to obtain a calibration template, the calibration template comprising at least two template nodes and at least one first directed edge, the template nodes being used to represent a calibration process for a quantum bit, and the first directed edge being used to indicate an execution order of the calibration processes represented by two template nodes connected by the first directed edge; the obtaining module is further configured to obtain structure data of a quantum chip, the structure data being used to indicate N quantum bits included in the quantum chip, N being an integer greater than 1; a generating module configured to generate a quantum bit calibration graph of the quantum chip according to the calibration template and the structure data, the quantum bit calibration graph being used to graphically represent a calibration task for the N quantum bits.

11. A computer device, comprising a processor and a memory, the memory storing a computer program, the computer program being loaded and executed by the processor to implement the method according to any one of claims 1 to 9.

12. A chip product, comprising a programmable logic circuit and / or a computer program, when the chip product is running, being used to implement the method according to any one of claims 1 to 9.

13. A computer readable storage medium, the computer readable storage medium storing a computer program, the computer program being loaded and executed by a processor to implement the method according to any one of claims 1 to 9.

14. A computer program product, the computer program product comprising a computer program, the computer program being stored in a computer readable storage medium, and a processor reading and executing the computer program from the computer readable storage medium to implement the method according to any one of claims 1 to 9.

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