Latency measurement method and apparatus, communication device, storage medium, and program product

Abstract

Disclosed are a latency measurement method and apparatus, a communication device, a storage medium, and a program product. The method comprises: for each port among a plurality of ports of a device, at the port, the device sends a packet carrying a timestamp and / or receives the packet carrying the timestamp; on the basis of one or more interactions of the packet, the device determines a first latency and / or a second latency corresponding to the port, wherein the first latency and the second latency are latencies in two directions of the same link.

Description

Delay measurement method and device, communication device, storage medium, and program product

[0001] Cross-reference to related disclosures

[0002] The present disclosure is based on and claims priority to Chinese Patent Publication No. 2024107335141.1, filed on June 6, 2024, the entire contents of which are hereby incorporated by reference into the present disclosure. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of transmission, and in particular to a delay measurement method and device, a communication device, a storage medium, and a program product. BACKGROUND

[0004] With the development of services such as computing power networks, typical applications such as machine vision, remote medical care, Internet of Vehicles, cloud video, and applications such as Artificial Intelligence (AI) large model training all require low network latency, and 5G mobile communication system front transmission also needs front transmission to meet certain latency requirements. Different latency values have different degrees of impact on service performance. Therefore, the network field needs to research and promote low latency technology, and needs to know the actual network latency value.

[0005] Network latency is usually composed of two parts, one part is the latency of the transmission link, and the other part is the internal processing latency of the network device, wherein the latency of the transmission link is related to the length of the transmission medium, for example, using optical fiber as the transmission medium, the latency of the transmission link is related to the length of the optical fiber. For a network with a large scale and a long transmission distance, the transmission link latency accounts for a large proportion of the network latency. The latency corresponding to different transmission links has a large difference, and if the latency of each transmission link in the network can be obtained, it is of great significance for selecting a lower latency path, ensuring latency performance, and monitoring latency data. However, the current latency measurement method cannot fully obtain the latency of each transmission link in the network. SUMMARY

[0006] The present disclosure provides a delay measurement method, a delay measurement device, a communication device, a computer-readable storage medium, and a computer program product.

[0007] The delay measurement method provided by the present disclosure comprises:

[0008] For each port of a plurality of ports of a device, the device transmits a packet carrying a timestamp at the port and / or receives a packet carrying a timestamp at the port.

[0009] The device determines the first time delay and / or the second time delay corresponding to the port according to one interaction or multiple interactions of the packet, and the first time delay and the second time delay are time delays of two directions of the same link.

[0010] The time delay measurement method provided by the present disclosure comprises:

[0011] The centralized unit receives time delay information reported by at least one device, and the time delay information comprises a first time delay and / or a second time delay.

[0012] The centralized unit aggregates time delays of multiple links based on the reported time delay information.

[0013] The time delay measurement device provided by the present disclosure is applied to a device, and comprises:

[0014] The first communication unit is configured to, for each port of multiple ports of the device, send a packet carrying a time stamp through the port and / or receive a packet carrying a time stamp.

[0015] The first processing unit is configured to determine a first time delay and / or a second time delay corresponding to the port according to one interaction or multiple interactions of the packet, and the first time delay and the second time delay are time delays of two directions of the same link.

[0016] The time delay measurement device provided by the present disclosure is applied to a centralized unit, and comprises:

[0017] The second communication unit is configured to receive time delay information reported by at least one device, and the time delay information comprises a first time delay and / or a second time delay.

[0018] The second processing unit is configured to aggregate time delays of multiple links based on the reported time delay information.

[0019] The communication device provided by the present disclosure comprises a processor and a memory, the memory is configured to store a computer program, and the processor is configured to call and run the computer program stored in the memory to execute any one of the above time delay measurement methods.

[0020] The computer readable storage medium provided by the present disclosure is configured to store a computer program, and the computer program enables a computer to execute any one of the above time delay measurement methods.

[0021] The computer program product provided by the present disclosure comprises computer program instructions, and the computer program instructions enable a computer to execute any one of the above time delay measurement methods.

[0022] The technical solution of the present disclosure proposes a time delay measurement mechanism. Through one or more interactions between any two devices carrying timestamp messages, the time delay of a link between the two devices can be determined. The time delay measurement mechanism is easy to implement and has universality, so it can obtain the time delay of each transmission link in the centralized unit in full amount, thereby providing strong support for selecting a lower time delay path, ensuring time delay performance, and monitoring time delay data. BRIEF DESCRIPTION OF DRAWINGS

[0023] Fig. 1 is a flow diagram of a time delay measurement method according to an embodiment of the present disclosure;

[0024] Fig. 2 is a schematic diagram of an Ethernet frame structure according to an embodiment of the present disclosure;

[0025] Fig. 3 is a flow diagram of a time delay measurement method according to an embodiment of the present disclosure;

[0026] Fig. 4 is a schematic diagram of a one-way message interaction according to an embodiment of the present disclosure;

[0027] Fig. 5 is a schematic diagram of a two-way message interaction according to an embodiment of the present disclosure;

[0028] Fig. 6 is a schematic diagram of a two-way message interaction based on a request message according to an embodiment of the present disclosure;

[0029] Fig. 7 is a schematic diagram of the structure of a time delay measurement device according to an embodiment of the present disclosure;

[0030] Fig. 8 is a schematic diagram of the structure of a time delay measurement device according to an embodiment of the present disclosure;

[0031] Fig. 9 is a schematic structural diagram of a communication device according to an embodiment of the present disclosure;

[0032] Fig. 10 is a schematic structural diagram of a chip according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] It should be noted that the term "and / or" in this document is only to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone. In addition, the character " / " in this document generally represents an "or" relationship between the front and rear associated objects. It should also be understood that the "indication" mentioned in this document can be direct indication or indirect indication, and can also mean having an association relationship. For example, A indicates B, which can mean that B can be obtained through A; it can also mean that A indirectly indicates B, for example, A indicates C, and B can be obtained through C; it can also mean that A and B have an association relationship. It should also be understood that the "protocol" mentioned in this document can refer to a standard protocol in the communication field, for example, it can refer to an NR protocol and a related protocol applied to a future communication system, and the present disclosure does not limit this.

[0034] In order to facilitate understanding of the technical solutions of the embodiments of the present disclosure, the technical solutions of the present disclosure are described in detail below through specific embodiments. The above related technologies can be combined with the technical solutions of the embodiments of the present disclosure in any way, and all of them belong to the protection scope of the embodiments of the present disclosure. The embodiments of the present disclosure include at least part of the following contents.

[0035] It should be noted that the "device" in the embodiments of the present disclosure refers to any communication device in the network, and the device has a port, for example, a terminal, a switch, etc.

[0036] FIG. 1 is a flow diagram of a time delay measurement method according to an embodiment of the present disclosure. As shown in FIG. 1, the time delay measurement method includes the following steps:

[0037] Step 101: For each port of a plurality of ports of a device, the device sends a message carrying a timestamp at the port and / or receives a message carrying a timestamp.

[0038] Step 102: The device determines a first time delay and / or a second time delay corresponding to the port according to one interaction or multiple interactions of the message.

[0039] In the embodiments of the present disclosure, the first time delay and the second time delay are the time delays of two directions of the same link, and the first time delay can be referred to as a downlink time delay, and the second time delay can be referred to as an uplink time delay.

[0040] In some cases, the same link can have two transmission media, one for downlink transmission (corresponding to the downlink) and the other for uplink transmission (corresponding to the uplink), the delay of the downlink transmission is the first delay, and the delay of the uplink transmission is the second delay. The first delay can be determined through one message interaction, and the second delay can be determined through another message interaction. Here, the message corresponding to the first delay is the message received by the device, and the message corresponding to the second delay is the message sent by the device.

[0041] For example, there are uplink and downlink optical fibers on the target link, the uplink optical fiber is used for uplink transmission, and the downlink optical fiber is used for downlink transmission. The sending timestamp and the receiving timestamp of the message transmitted through the downlink optical fiber can be used to determine the first delay, and the sending timestamp and the receiving timestamp of the message transmitted through the uplink optical fiber can be used to determine the second delay.

[0042] In other cases, the same link has a single transmission medium, which is used for downlink transmission (corresponding to the downlink) and uplink transmission (corresponding to the uplink), and the delay of the downlink transmission and the delay of the uplink transmission are consistent, so the delay can be determined through one message interaction.

[0043] For example, there is a single optical fiber on the target link, which is used for both uplink transmission and downlink transmission (i.e., single-fiber bidirectional), and the sending timestamp and the receiving timestamp of the message transmitted through the optical fiber can be used to determine the delay.

[0044] In the embodiments of the present disclosure, the device determines the first delay and / or the second delay corresponding to the port according to one or more interactions of the message, which can have several or two cases:

[0045] Case 1: The device determines the first delay according to one interaction of the first message, and the first message is a message carrying a timestamp received by the device.

[0046] In some embodiments, the device receives a first message carrying a first timestamp, records the receiving timestamp of the first message as a second timestamp, and the first timestamp is the sending timestamp of the first message. The device determines the first delay based on the first timestamp and the second timestamp.

[0047] Case 2: The device determines the second delay according to one interaction of the second message, and the second message is a message carrying a timestamp sent by the device.

[0048] In some embodiments, the device sends a second packet carrying a third timestamp, receives a fourth timestamp of the second packet, the third timestamp is the sending time of the second packet, and the fourth timestamp is the receiving time of the second packet; and the device determines the second time delay based on the third timestamp and the fourth timestamp. Here, the fourth timestamp can be carried in a third packet.

[0049] Case 3: The device determines the first time delay and the second time delay according to one interaction of a first packet and one interaction of a second packet, the first packet is a packet carrying a timestamp received by the device, and the second packet is a packet carrying a timestamp sent by the device.

[0050] In some embodiments, the device receives a first packet carrying a first timestamp, records the receiving timestamp of the first packet as a second timestamp, and the first timestamp is the sending time of the first packet; the device determines the first time delay based on the first timestamp and the second timestamp; the device sends a second packet carrying a third timestamp, receives a fourth timestamp of the second packet, the third timestamp is the sending time of the second packet, and the fourth timestamp is the receiving time of the second packet; and the device determines the second time delay based on the third timestamp and the fourth timestamp. Here, the fourth timestamp can be carried in a third packet.

[0051] In the above scheme, the first time delay = the second timestamp - the first timestamp. The second time delay = the fourth timestamp - the third timestamp.

[0052] In some embodiments, before the device sends and / or receives a packet carrying a timestamp at the port, the device receives and / or sends a request packet, and the request packet is used to request time delay measurement.

[0053] In some embodiments, the packet carrying a timestamp also carries a first identifier, and the first identifier is used to identify that the packet is a packet for time delay measurement.

[0054] Here, the packet for time delay measurement needs to be distinguished from other types of packets, so that the device can distinguish the processing when processing the packet. For example: the packet for time delay measurement and the packet for time synchronization are distinguished by different identifiers, so that the packet for time delay measurement is not used for time synchronization processing and / or time source selection (i.e. not involved in the Best Master Clock Algorithm (BMCA) to select the master time source), and the packet for time synchronization is not used for time delay measurement.

[0055] In order to distinguish the packet for the delay measurement, a first identifier is carried in the packet, and the first identifier is used to indicate that the packet is the packet for the delay measurement.

[0056] In some embodiments, the first identifier is carried in at least one of the following fields of the packet: an Ethertype field, a message type field, a domain number field, a flag field, and a Type Length Value (TLV) field.

[0057] For example, the Ethertype field has a first value, which is used to indicate that the packet is the packet for the delay measurement; the message type field has a second value, which is used to indicate that the packet is the packet for the delay measurement; the domain number field has a third value, which is used to indicate that the packet is the packet for the delay measurement; the flag field has a fourth value, which is used to indicate that the packet is the packet for the delay measurement; and the TLV field has a fifth value, which is used to indicate that the packet is the packet for the delay measurement.

[0058] In one example, as shown in FIG. 2, FIG. 2 is a schematic diagram of an Ethernet frame structure. The Ethernet frame structure mainly includes the following parts: a Destination Address (DA), a Source Address (SA), an Ethertype, a Precision Time Protocol (PTP) packet, a padding area, and a Cyclic Redundancy Check (CRC). In the Ethernet frame structure, different values of the Ethertype are used to distinguish packets of different types / purposes. For example, for a packet for time synchronization, the value of the Ethertype in the Ethernet frame structure is value 1 (e.g., 0x88F7); and for a packet for delay measurement, the value of the Ethertype in the Ethernet frame structure is value 2 (different from 0x88F7).

[0059] In one example, as shown in Table 1 below, Table 1 is a PTP packet header format. In the PTP packet header format, different values of a message type are used to distinguish packets of different types / purposes. For example, for a packet for time synchronization, the value of the message type in the PTP packet header is value 1; and for a packet for delay measurement, the value of the message type in the PTP packet header is value 2.

[0060] Table 1 PTP packet header format

[0061] In one example, as shown in Table 1 above, in the PTP packet header format, different values of the domain number are used to distinguish different types / purposes of packets. For example, for packets used for time synchronization, the value of the domain number in the PTP packet header is 1; for packets used for delay measurement, the value of the domain number in the PTP packet header is 2.

[0062] In one example, as shown in Table 1 above, in the PTP packet header format, specific values of the reserved bits of the flag field are used to identify packets for delay measurement.

[0063] In one example, in the PTP packet header format, TLV information is added, and specific values of the TLV are used to identify packets for delay measurement.

[0064] In some embodiments, the device reports the delay information of each port to the centralized unit, and the delay information of the port includes the first delay and / or the second delay corresponding to the port.

[0065] Here, the device periodically reports the delay information of each port to the centralized unit.

[0066] As an implementation manner, the device reports the delay information of each port determined once to the centralized unit in each first period. The first period can be understood as a packet interaction period, and in the packet interaction period, the device can determine a delay information through one or more packet interactions.

[0067] As another implementation manner, the device reports statistical values of the delay information of each port determined multiple times to the centralized unit in each second period. The statistical values can include, but are not limited to, maximum value, minimum value, and average value. The second period can be understood as a larger time period (greater than the packet interaction period, such as M packet interaction periods (M is an integer greater than 1)), and in the period, the device can perform multiple rounds of packet interactions, each round of packet interaction can determine a delay information, and multiple rounds of packet interactions can determine multiple delay information.

[0068] In some embodiments, the centralized unit described above can be a network management device or a network management system.

[0069] It should be noted that, in the case that the device is in a synchronous state (synchronous here refers to time synchronization), the sending timestamp and the receiving timestamp of the packet do not have a time difference, the delay determined based on the sending timestamp and the receiving timestamp of the packet is accurate, and the accurate delay can also be referred to as a normal delay. Conversely, in the case that the device is in a non-synchronous state (non-synchronous here refers to time asynchronization), the sending timestamp and the receiving timestamp of the packet have a time difference, the delay determined based on the sending timestamp and the receiving timestamp of the packet is inaccurate, and the inaccurate delay can also be referred to as an abnormal delay.

[0070] In some embodiments, if the device is in the non-synchronous state, the device reports second information to the centralized unit, and the second information is used to indicate that the delay information reported by the device is abnormal delay information.

[0071] In some embodiments, if the device is in the non-synchronous state, the device reports delay information with a first value to the centralized unit, and the delay information with the first value represents abnormal delay information. The first value here is, for example, all 0 or all F, etc.

[0072] The non-synchronous state described above is a fault state or an initialization state. For example, when the first device performs time synchronization with the second device, if the first device is not in a normal synchronous state (for example, in a fault state or in an initialization state that is not completely synchronized), because the devices are not completely synchronized, the delay determined by the first device / second device is not accurate. Then, the first device / second device reports second information to the centralized unit when reporting the delay information, and the second information can be a special value or special information, which is used to indicate that the delay information reported by the first device / second device is abnormal delay information. The centralized unit will not adopt the abnormal delay information, that is, the abnormal delay information will not be used for subsequent shortest delay path calculation, etc., so as to improve the accuracy of routing decision.

[0073] In some embodiments, the device receives a first instruction sent by the centralized unit, and the first instruction is used to enable or disable the delay measurement function of the device port; in the case that the delay measurement function of the device port is enabled, the device port supports the following capabilities: sending a packet carrying a timestamp; and / or processing a received packet carrying a timestamp; and / or in the case that the delay measurement function of the device port is disabled, the device port does not support the following capabilities: sending a packet carrying a timestamp; and / or processing a received packet carrying a timestamp.

[0074] Here, the centralized unit can enable or disable the time delay measurement function of any port of any device. If the time delay measurement function of a port of a device is disabled, the device will not send or process the message for time delay measurement.

[0075] It should be noted that the "multiple ports of a device" involved in the above scheme can be all or part of the ports of the device. In some embodiments, the multiple ports of the device refer to the ports for which the time delay measurement function is enabled.

[0076] The technical scheme of the embodiment of the present disclosure proposes a time delay measurement mechanism. Through the interaction of messages (i.e., first message and / or second message) between any two devices (i.e., first device and second device), the time delay of the transmission link between the two devices can be determined. This time delay measurement mechanism is easy to implement and has universality, so it can obtain the time delay of each transmission link in the centralized unit in full amount, thereby providing strong support for selecting a lower time delay path, ensuring time delay performance, and monitoring time delay data.

[0077] FIG. 3 is a flowchart of a time delay measurement method provided by an embodiment of the present disclosure. As shown in FIG. 3, the time delay measurement method includes the following steps:

[0078] Step 301: The centralized unit receives time delay information reported by at least one device, wherein the time delay information includes a first time delay and / or a second time delay.

[0079] It should be noted that the centralized unit in the embodiment of the present disclosure refers to a centralized device or a control device or a control system in a network.

[0080] It should be noted that the first time delay and / or the second time delay in step 301 can be determined by the method steps in the above description related to FIG. 1.

[0081] For some devices, the devices can only determine one time delay of a port (e.g., the first time delay in the above scheme), and then the devices only report one time delay of the port to the centralized unit. For other devices, the devices can determine two time delays of a port (e.g., the first time delay and the second time delay in the above scheme), and then the devices report two time delays of the port to the centralized unit.

[0082] Step 302: The centralized unit aggregates the time delays of multiple links based on the reported time delay information.

[0083] In some embodiments, if two devices report the same link delay information, the centralized unit determines the link delay between the two devices based on the link delay information reported by one of the two devices, or the centralized unit determines the link delay between the two devices based on the link delay information reported by both of the two devices.

[0084] For example, device 1 and device 2 are opposite to each other, the link between device 1 and device 2 is called target link, device 1 reports target link delay information 1, device 2 reports target link delay information 2, the centralized unit can select delay information 1 to determine the target link delay, or can select delay information 2 to determine the target link delay, or can take the average of delay information 1 and delay information 2 as the target link delay.

[0085] In some embodiments, the centralized unit selects the route with the shortest path delay as the service route based on the link delays of the multiple links.

[0086] Here, after the centralized unit receives the link delays reported by each device, the link delays of each transmission link are summarized and used for route calculation based on the minimum delay strategy. The centralized unit can select the route with the shortest path delay as the service route with the minimum delay according to the link delays of each transmission link, and generate route configuration information to be sent to the device to establish the service route. It should be noted that after the centralized unit receives the link delays of each transmission link, if two devices report the same link delay, the centralized unit takes the reported link delay of one of the two devices or takes the average of the reported link delays of both devices as the basis for minimum route calculation.

[0087] In some embodiments, the centralized unit sends a first instruction to the at least one device, the first instruction being used to enable or disable the delay measurement function of the device port.

[0088] In the case where the delay measurement function of the device port is enabled, the device port supports the following capabilities: sending a message carrying a timestamp; and / or, processing a received message carrying a timestamp; and / or, in the case where the delay measurement function of the device port is disabled, the device port does not support the following capabilities: sending a message carrying a timestamp; and / or, processing a received message carrying a timestamp.

[0089] The technical solutions of the embodiments of the present disclosure are illustrated below in combination with specific application examples.

[0090] Application Example One

[0091] Figure 4 is a schematic diagram of a single-direction message interaction. As shown in Figure 4, device 1 sends message 1 to device 2, and message 1 carries the sending time t1 of message 1 at device 1. After receiving message 1, device 2 records the receiving time t2 of message 1 at device 2. Further, device 2 can obtain the uplink time delay information of the transmission link between device 1 and device 2 by t2-t1.

[0092] Similarly, device 2 sends message 2 to device 1, and message 2 carries the sending time t1' of message 2 at device 2. After receiving message 2, device 1 records the receiving time t2' of message 2 at device 1. Further, device 1 can obtain the downlink time delay information of the transmission link between device 2 and device 1 by t2'-t1'.

[0093] Device 1 reports the obtained uplink time delay information to the management device, and device 2 reports the obtained downlink time delay information to the management device. After collecting the time delay information reported by different devices, the management device can obtain the bidirectional time delay information (i.e., the uplink time delay information and the downlink time delay information) of each transmission link.

[0094] Application Example II

[0095] Figure 5 is a schematic diagram of a bidirectional message interaction. As shown in Figure 5, device 1 sends message 1 to device 2, and message 1 carries the sending time t1 of message 1 at device 1. After receiving message 1, device 2 records the receiving time t2 of message 1 at device 2. Further, device 2 can obtain the uplink time delay information of the transmission link between device 1 and device 2 by t2-t1. Further, device 2 sends message 2 to device 1, and the sending time of message 2 at device 2 is t3. After receiving message 2, device 1 records the receiving time t4 of message 2 at device 1. Device 1 sends message 3 carrying t4 to device 2, and device 2 can obtain the downlink time delay information of the transmission link between device 2 and device 1 by t4-t3.

[0096] Similarly, device 2 sends message 4 to device 1, and message 4 carries the sending time t1' of message 4 at device 2. After receiving message 4, device 1 records the receiving time t2' of message 4 at device 1. Further, device 1 can obtain the downlink time delay information of the transmission link between device 2 and device 1 by t2'-t1'. Further, device 1 sends message 5 to device 2, and the sending time of message 5 at device 1 is t3'. After receiving message 5, device 2 records the receiving time t4' of message 5 at device 2. Device 2 sends message 6 carrying t4' to device 1, and device 1 can obtain the uplink time delay information of the transmission link between device 1 and device 2 by t4'-t3'.

[0097] The device 1 reports the obtained uplink time delay information and downlink time delay information to the management device, and the device 2 reports the obtained downlink time delay information and downlink time delay information to the management device. After the management device collects the time delay information reported by different devices, the two-way time delay information (i.e., uplink time delay information and downlink time delay information) of each transmission link is obtained by summarization. Here, the device 1 and the device 2 report the time delay information of the same transmission link, in which case, the management device can take the reported time delay information of one party or take the average of the reported time delay information of both parties as the basis for minimum route calculation.

[0098] Application Example Three

[0099] On the basis of the application example two, the application adds the step of requesting a message. Specifically, as shown in FIG. 6, before the device 1 sends the message 1 to the device 2, the device 2 sends a request message to the device 1, and when the device 1 receives the request message sent by the device 2, the device 1 and the device 2 start the two-way message interaction. Similarly, before the device 2 sends the message 4 to the device 1, the device 1 sends a request message to the device 2, and when the device 2 receives the request message sent by the device 1, the device 2 and the device 1 start the two-way message interaction. The specific process of the two-way message interaction can refer to the description of the aforementioned application example two.

[0100] FIG. 7 is a structural composition schematic diagram of a time delay measurement device provided by an embodiment of the present disclosure, which is applied to a device. As shown in FIG. 7, the time delay measurement device comprises:

[0101] A first communication unit 701, configured to, for each port of a plurality of ports of a device, send a message carrying a timestamp at the port and / or receive a message carrying a timestamp at the port;

[0102] A first processing unit 702, configured to determine a first time delay and / or a second time delay corresponding to the port according to one interaction or multiple interactions of the message, the first time delay and the second time delay being the time delays of two directions of the same link.

[0103] In some embodiments, the first processing unit 702 is configured to determine the first time delay according to one interaction of a first message, the first message being a message carrying a timestamp received by the device; or determine the second time delay according to one interaction of a second message, the second message being a message carrying a timestamp sent by the device; or determine the first time delay and the second time delay according to one interaction of the first message and one interaction of the second message, the first message being a message carrying a timestamp received by the device, and the second message being a message carrying a timestamp sent by the device.

[0104] In some embodiments, the message carrying the time stamp further carries a first identifier, the first identifier being used to identify the message as a message for latency measurement.

[0105] In some embodiments, the first identifier is carried in at least one of the following fields of the message: an Ethernet type field, a message type field, a domain number field, a flag field, a TLV field.

[0106] In some embodiments, the message for latency measurement and a message for time synchronization adopt different identifiers.

[0107] In some embodiments, the message for latency measurement is not used for time synchronization processing and / or time source selection.

[0108] In some embodiments, the first communication unit 701 is configured to report the latency information of each port to a centralized unit, the latency information of each port including the first latency and / or the second latency corresponding to the port.

[0109] In some embodiments, the first communication unit 701 is configured to periodically report the latency information of each port to a centralized unit.

[0110] In some embodiments, the first communication unit 701 is configured to report the latency information of each port to a centralized unit once in each first period, or report a statistical value of the latency information of each port to the centralized unit multiple times in each second period.

[0111] In some embodiments, the first communication unit 701 is configured to report second information to the centralized unit if the device is in a non-synchronized state, the second information being used to indicate that the latency information reported by the device is abnormal; or the first communication unit 701 is configured to report latency information with a first value to the centralized unit if the device is in a non-synchronized state, the latency information with the first value representing abnormal latency information.

[0112] In some embodiments, the non-synchronized state is a fault state or an initialization state.

[0113] In some embodiments, the first communication unit 701 is configured to receive a first message carrying a first time stamp, and the first processing unit 702 is configured to record a receiving time stamp of the first message as a second time stamp, the first time stamp being a sending time of the first message, and determine the first latency based on the first time stamp and the second time stamp.

[0114] In some embodiments, the first communication unit 701 is configured to send a second message carrying a third timestamp, receive a fourth timestamp of the second message, the third timestamp being a sending time of the second message, and the fourth timestamp being a receiving time of the second message; and the first processing unit 702 is configured to determine the second time delay based on the third timestamp and the fourth timestamp. Here, the fourth timestamp can be carried in a third message.

[0115] In some embodiments, the first communication unit 701 is configured to receive a first message carrying a first timestamp; the first processing unit 702 is configured to record a receiving timestamp of the first message as a second timestamp, the first timestamp being a sending time of the first message; determine the first time delay based on the first timestamp and the second timestamp; the first communication unit 701 is configured to send a second message carrying a third timestamp, receive a fourth timestamp of the second message, the third timestamp being a sending time of the second message, and the fourth timestamp being a receiving time of the second message; and the first processing unit 702 is configured to determine the second time delay based on the third timestamp and the fourth timestamp. Here, the fourth timestamp can be carried in a third message.

[0116] In some embodiments, the first communication unit 701 is configured to receive and / or send a request message, the request message being used to request to perform time delay measurement.

[0117] In some embodiments, the message carrying the timestamp is sent periodically.

[0118] Those skilled in the art should understand that the implementation functions of each unit in the time delay measurement apparatus shown in FIG. 7 can be understood with reference to the related description of the foregoing method. The functions of each unit in the time delay measurement apparatus shown in FIG. 7 can be implemented by a program running on a processor, or by a specific logic circuit.

[0119] FIG. 8 is a schematic diagram of a structure of a time delay measurement apparatus according to an embodiment of the present disclosure, which is applied to a centralized unit. As shown in FIG. 8, the time delay measurement apparatus comprises:

[0120] A second communication unit 801 is configured to receive time delay information reported by at least one device, the time delay information comprising a first time delay and / or a second time delay.

[0121] A second processing unit 802 is configured to aggregate time delays of multiple links based on the reported time delay information.

[0122] In some embodiments, the second processing unit 802 is configured to determine the delay of a link between two devices based on the delay information reported by one of the two devices if the two devices report the same delay information of the link, or determine the delay of a link between two devices based on the delay information reported by the two devices.

[0123] In some embodiments, the second processing unit 802 is configured to select a route with the shortest path delay as the service route based on the delays of the multiple links.

[0124] In some embodiments, the second communication unit 801 is configured to send a first instruction to the at least one device, the first instruction being used to enable or disable the delay measurement function of a device port; in the case that the delay measurement function of the device port is enabled, the device port supports the following capabilities: sending a message carrying a timestamp; and / or processing a received message carrying a timestamp; and / or in the case that the delay measurement function of the device port is disabled, the device port does not support the following capabilities: sending a message carrying a timestamp; and / or processing a received message carrying a timestamp.

[0125] Those skilled in the art should understand that the implementation functions of each unit in the delay measurement apparatus shown in FIG. 8 can be understood with reference to the related description of the foregoing method. The functions of each unit in the delay measurement apparatus shown in FIG. 8 can be implemented by a program running on a processor, or by a specific logic circuit.

[0126] FIG. 9 is a schematic structural diagram of a communication device 900 provided by an embodiment of the present disclosure. The communication device 900 shown in FIG. 9 includes a processor 910. The processor 910 can invoke and run a computer program from a memory to implement the method in the embodiments of the present disclosure.

[0127] Optionally, as shown in FIG. 9, the communication device 900 can further include a memory 920. The processor 910 can invoke and run a computer program from the memory 920 to implement the method in the embodiments of the present disclosure.

[0128] The memory 920 can be a separate device independent of the processor 910, or can be integrated in the processor 910.

[0129] Optionally, as shown in FIG. 9, the communication device 900 can further include a transceiver 930. The processor 910 can control the transceiver 930 to communicate with other devices, specifically, send information or data to other devices, or receive information or data sent by other devices.

[0130] The transceiver 930 can include a transmitter and a receiver. The transceiver 930 can further include an antenna, and the number of antennas can be one or more.

[0131] Optionally, the communication device 900 can be specifically a device of the embodiments of the present disclosure, and the communication device 900 can implement the corresponding procedures realized by the device in the various methods of the embodiments of the present disclosure. For brevity, details are not described herein.

[0132] Optionally, the communication device 900 can be specifically a centralized unit (such as a management and control device) of the embodiments of the present disclosure, and the communication device 900 can implement the corresponding procedures realized by the centralized unit (such as the management and control device) in the various methods of the embodiments of the present disclosure. For brevity, details are not described herein.

[0133] FIG. 10 is a schematic structural diagram of a chip according to an embodiment of the present disclosure. The chip 1000 shown in FIG. 10 includes a processor 1010. The processor 1010 can call and run a computer program from a memory to implement the method in the embodiments of the present disclosure.

[0134] Optionally, as shown in FIG. 10, the chip 1000 can further include a memory 1020. The processor 1010 can call and run a computer program from the memory 1020 to implement the method in the embodiments of the present disclosure.

[0135] The memory 1020 can be a separate device independent of the processor 1010, or can be integrated in the processor 1010.

[0136] Optionally, the chip 1000 can further include an input interface 1030. The processor 1010 can control the input interface 1030 to communicate with other devices or chips, and specifically, information or data sent by other devices or chips can be acquired.

[0137] Optionally, the chip 1000 can further include an output interface 1040. The processor 1010 can control the output interface 1040 to communicate with other devices or chips, and specifically, information or data can be output to other devices or chips.

[0138] Optionally, the chip can be applied to the device in the embodiments of the present disclosure, and the chip can implement the corresponding procedures realized by the device in the various methods of the embodiments of the present disclosure. For brevity, details are not described herein.

[0139] Optionally, the chip can be applied to the centralized unit (such as the management and control device) in the embodiments of the present disclosure, and the chip can implement the corresponding procedures realized by the centralized unit (such as the management and control device) in the various methods of the embodiments of the present disclosure. For brevity, details are not described herein.

[0140] It should be understood that the chip mentioned in the embodiments of the present disclosure can also be referred to as a system chip, a system chip, a chip system or a system on chip, etc.

[0141] It should be understood that the processor of the embodiments of the present disclosure can be an integrated circuit chip with signal processing capability. In the implementation process, each step of the above method embodiments can be completed by the integrated logic circuit of hardware in the processor or the instruction in the form of software. The processor mentioned above can be a general processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The disclosed methods, steps and logic block diagrams in the embodiments of the present disclosure can be implemented or executed. The general processor can be a microprocessor or the processor can be any conventional processor. The steps of the method disclosed in combination with the embodiments of the present disclosure can be directly embodied as a hardware code processor for execution, or a combination of hardware and software modules in the code processor for execution. The software module can be located in a random access memory, a flash memory, a read only memory, a programmable read only memory or an electrically erasable programmable memory, a register or other mature storage medium in the art. The storage medium is located in the memory, and the processor reads the information in the memory, and combines the hardware to complete the steps of the above method.

[0142] It is to be understood that the memory in the embodiments of the present disclosure can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (Read-Only Memory, ROM), a programmable read-only memory (Programmable ROM, PROM), an erasable programmable read-only memory (Erasable PROM, EPROM), an electrically erasable programmable read-only memory (Electrically EPROM, EEPROM) or a flash memory. The volatile memory can be a random access memory (Random Access Memory, RAM) used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (Static RAM, SRAM), dynamic random access memory (Dynamic RAM, DRAM), synchronous dynamic random access memory (Synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (Enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (Synchlink DRAM, SLDRAM) and direct memory bus random access memory (Direct Rambus RAM, DR RAM). It should be noted that the memory of the system and method described herein is intended to include, but not limited to, these and any other suitable types of memory.

[0143] It should be understood that the above-mentioned memory is exemplary but not limiting, for example, the memory in the embodiments of the present disclosure can also be static random access memory (static RAM, SRAM), dynamic random access memory (dynamic RAM, DRAM), synchronous dynamic random access memory (synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (synch link DRAM, SLDRAM) and direct memory bus random access memory (Direct Rambus RAM, DR RAM) and the like. That is, the memory in the embodiments of the present disclosure is intended to include, but not limited to, these and any other suitable types of memory.

[0144] The embodiment of the present disclosure further provides a computer readable storage medium for storing a computer program.

[0145] Optionally, the computer readable storage medium can be applied to the device in the embodiment of the present disclosure, and the computer program makes the computer execute the corresponding process realized by the device in the various methods of the embodiment of the present disclosure. For the sake of brevity, details are not described herein.

[0146] Optionally, the computer readable storage medium can be applied to the centralized unit (such as the management and control device) in the embodiment of the present disclosure, and the computer program makes the computer execute the corresponding process realized by the centralized unit (such as the management and control device) in the various methods of the embodiment of the present disclosure. For the sake of brevity, details are not described herein.

[0147] The embodiment of the present disclosure further provides a computer program product comprising computer program instructions.

[0148] Optionally, the computer program product can be applied to the device in the embodiment of the present disclosure, and the computer program instructions make the computer execute the corresponding process realized by the device in the various methods of the embodiment of the present disclosure. For the sake of brevity, details are not described herein.

[0149] Optionally, the computer program product can be applied to the centralized unit (such as the management and control device) in the embodiment of the present disclosure, and the computer program instructions make the computer execute the corresponding process realized by the centralized unit (such as the management and control device) in the various methods of the embodiment of the present disclosure. For the sake of brevity, details are not described herein.

[0150] Those skilled in the art can realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized in electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present disclosure.

[0151] Those skilled in the art can clearly understand that, for the convenience and brevity of the description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, and details are not described herein.

[0152] In several embodiments provided by the present disclosure, it should be understood that the disclosed system, apparatus and method can be implemented in other manners. For example, the apparatus embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There can be another division manner for the actual implementation, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between the units can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0153] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place, or can be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0154] In addition, each functional unit in the various embodiments of the present disclosure can be integrated into one processing unit, or each unit can exist physically, or two or more units can be integrated into one unit.

[0155] If the functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present disclosure can be embodied in the form of a software product, and the computer software product is stored in a storage medium, and includes several instructions for causing a computer device (which can be a personal computer, a server, or a device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present disclosure. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0156] The above description is merely a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A method for measuring time delay, comprising: for each port of a plurality of ports of a device, the device sends and / or receives a packet carrying a timestamp at the port; the device determines a first time delay and / or a second time delay corresponding to the port according to one or more interactions of the packet, the first time delay and the second time delay being time delays of two directions of a same link.

2. The method of claim 1, wherein, the device determining the first time delay and / or the second time delay corresponding to the port according to one or more interactions of the packet comprises: the device determines the first time delay according to one interaction of a first packet, the first packet being a packet carrying a timestamp received by the device; or, the device determines the second time delay according to one interaction of a second packet, the second packet being a packet carrying a timestamp sent by the device; or, the device determines the first time delay and the second time delay according to one interaction of the first packet and one interaction of the second packet, the first packet being a packet carrying a timestamp received by the device, the second packet being a packet carrying a timestamp sent by the device.

3. The method of claim 1 or 2, wherein, the packet carrying a timestamp further carries a first identifier, the first identifier being used to identify that the packet is a packet for time delay measurement.

4. The method of claim 3, wherein, the first identifier is carried in at least one of the following fields of the packet: an Ethernet type field, a message type field, a domain number field, a flag field, a type length value (TLV) field.

5. The method of claim 3 or 4, wherein, the packet for time delay measurement adopts a different identifier from a packet for time synchronization.

6. The method according to any one of claims 3-5, wherein, the packet for time delay measurement is not used for time synchronization processing and / or time source selection. 7.The method of any one of claims 1 to 6, further comprising: the device reports time delay information of each port to a centralized unit, the time delay information of the port including the first time delay and / or the second time delay corresponding to the port.

8. The method of claim 7, wherein, the device reporting the time delay information of each port to the centralized unit comprises: the device periodically reports the time delay information of each port to the centralized unit.

9. The method of claim 8, wherein, the device periodically reports the time delay information of each port to the centralized unit, comprising: the device reports, in each first period, the time delay information of each port determined once to the centralized unit; or, the device reports, in each second period, a statistical value of the time delay information of each port determined multiple times to the centralized unit. 10.The method of any one of claims 1 to 9, further comprising: if the device is in a non-synchronized state, the device reports second information to the centralized unit, the second information being used to indicate that the time delay information reported by the device is abnormal time delay information; or, if the device is in a non-synchronized state, the device reports time delay information with a first value to the centralized unit, the time delay information with the first value representing abnormal time delay information. the non-synchronized state is a fault state or an initialization state.

11. The method of claim 10, wherein, the device determines the first time delay according to one interaction of a first packet, comprising:

12. The method of claim 2, wherein, ​ The device receives a first packet carrying a first timestamp, records a second timestamp of the receiving time of the first packet, the first timestamp being the sending time of the first packet; The device determines the first time delay based on the first timestamp and the second timestamp.

13. The method of claim 2 or 12, wherein, The device determines the second time delay according to one interaction of a second packet, including: The device sends a second packet carrying a third timestamp, receives a fourth timestamp of the second packet, the third timestamp being the sending time of the second packet, the fourth timestamp being the receiving time of the second packet; The device determines the second time delay based on the third timestamp and the fourth timestamp.

14. The method of any one of claims 2, 12, or 13, wherein, The device determines the first time delay and the second time delay according to one interaction of a first packet and one interaction of a second packet, including: The device receives a first packet carrying a first timestamp, records a second timestamp of the receiving time of the first packet, the first timestamp being the sending time of the first packet; the device determines the first time delay based on the first timestamp and the second timestamp; The device sends a second packet carrying a third timestamp, receives a fourth timestamp of the second packet, the third timestamp being the sending time of the second packet, the fourth timestamp being the receiving time of the second packet; the device determines the second time delay based on the third timestamp and the fourth timestamp.

15. The method of any one of claims 1 to 14, wherein, The method further includes, before the device sends a packet carrying a timestamp and / or receives a packet carrying a timestamp at the port: The device receives and / or sends a request packet, the request packet being used to request to perform time delay measurement.

16. The method of any one of claims 1 to 15, wherein, The packet carrying a timestamp is periodically sent.

17. The method according to any one of claims 1 to 15, further comprising: receiving a first instruction sent by a centralized unit, the first instruction being used to enable or disable the time delay measurement function of the port of the device; wherein, in the case that the time delay measurement function of the port of the device is enabled, the port of the device supports at least one of the following capabilities: sending a packet carrying a timestamp; or, processing a received packet carrying a timestamp; in the case that the time delay measurement function of the port of the device is disabled, the port of the device does not support at least one of the following capabilities: sending a packet carrying a timestamp; or, processing a received packet carrying a timestamp.

18. A time delay measurement method, comprising: a centralized unit receiving time delay information reported by at least one device, the time delay information including a first time delay and / or a second time delay, the first time delay and / or the second time delay being determined by the method according to any one of claims 1 to 16; the centralized unit aggregating time delays of multiple links based on the reported time delay information.

19. The method of claim 18, wherein, The centralized unit aggregates time delays of multiple links based on the reported time delay information, including: If two devices report the same link delay information, the centralized unit determines the link delay between the two devices based on the link delay information reported by one of the two devices, or the centralized unit determines the link delay between the two devices based on the link delay information reported by the two devices.

20. The method of claim 18 or 19, further comprising: The centralized unit selects a route with the shortest path delay as the traffic route based on the link delays of the multiple links.

21. The method of any one of claims 18 to 20, further comprising: The centralized unit sends a first instruction to the at least one device, the first instruction being used to enable or disable the delay measurement function of the device port; In the case where the delay measurement function of the device port is enabled, the device port supports the following capabilities: sending a timestamp-carrying packet; and / or, processing the received timestamp-carrying packet; and / or, in the case where the delay measurement function of the device port is disabled, the device port does not support the following capabilities: sending a timestamp-carrying packet; and / or, processing the received timestamp-carrying packet.

22. A delay measurement apparatus applied to a device, the apparatus comprising: a first communication unit configured to send a timestamp-carrying packet and / or receive a timestamp-carrying packet for each port of a plurality of ports of the device; a first processing unit configured to determine a first delay and / or a second delay corresponding to the port according to one or more interactions of the packet, the first delay and the second delay being the delays of two directions of the same link.

23. A delay measurement apparatus applied to a centralized unit, the apparatus comprising: a second communication unit configured to receive link delay information reported by at least one device, the link delay information comprising a first delay and / or a second delay, the first delay and / or the second delay being determined by the method of any one of claims 1 to 16; a second processing unit configured to aggregate link delays of multiple links based on the reported link delay information.

24. A communication device comprising: a processor and a memory, the memory being configured to store a computer program, and the processor being configured to invoke and run the computer program stored in the memory to perform the method of any one of claims 1 to 20.

25. A computer-readable storage medium configured to store a computer program, the computer program causing a computer to perform the method of any one of claims 1 to 21.

26. A computer program product comprising computer program instructions, the computer program instructions causing a computer to perform the method of any one of claims 1 to 21.

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