Optoelectronic semiconductor device and method to manufacture the optoelectronic semiconductor device

The introduction of a dual V-pit generation layer structure with a V-pit control layer in optoelectronic semiconductor devices enables independent control of V-pit sizes and densities, enhancing optical power and minimizing forward voltage.

WO2025252345A1PCT designated stage Publication Date: 2025-12-11AMS OSRAM INT GMBH
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Patent Information

Application Number
PCT/EP2025/061080
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-06-06
Filing Date
2025-04-23
Publication Date
2025-12-11

AI Technical Summary

Technical Problem

Conventional optoelectronic semiconductor devices face a trade-off between V-pit size and density, which affects the forward voltage and brightness, limiting the control of electro-optical properties.

Method used

An optoelectronic semiconductor device with an epitaxial structure comprising two n-type V-pit generation layers and a V-pit control layer, allowing independent control of V-pit sizes and densities through adjustable growth conditions.

Benefits of technology

This structure maximizes optical power and minimizes the active volume loss while maintaining sufficient V-pit size and density, optimizing electro-optical properties.

✦ Generated by Eureka AI based on patent content.

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Abstract

An optoelectronic semiconductor device (10) comprises an epitaxial semiconductor layer sequence (1). The epitaxial semiconductor layer sequence (1) comprises an n-type semiconductor layer (110),a first n-type V-pit generation layer (112), a first type of V-pits (V1) being formed from first dislocations in the n-type semiconductor layer (110), first starting points of the first V-pits (V1) being arranged in the first n-type V-pit generation layer (112), a second n-type V-pit generation layer (116), a second type of V-pits (V2) being formed from second dislocations in the n-type semiconductor layer (110), second starting points of the second V-pits (V2) being arranged in the second n- type V-pit generation layer (116), a V-pit control layer (114) arranged between the first n-type V-pit generation layer (112) and the second n-type V-pit generation layer (114), an p-type semiconductor layer (120), and an active layer arranged (118) between the n-type semiconductor layer (110) and the p-type semiconductor layer (120) and configured to generate and / or absorb electromagnetic radiation. The first n-type V-pit generation layer (112), the V-pit control layer (114), and the second type n-type V-pit generation layer (116) are arranged between the n- type semiconductor layer (110) and the active layer (118). The first n-type V-pit generation layer (112) being arranged over the n-type semiconductor layer (110) and the second n-type V- pit generation layer (116) being arranged on a side of the first n-type V-pit generation layer (112) opposite the n-type semiconductor layer (110).
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Description

[0001] OPTOELECTRONIC SEMICONDUCTOR DEVICE AND METHOD TO MANUFACTURE THE OPTOELECTRONIC SEMICONDUCTOR DEVICE

[0002] Gallium nitride ( GaN) based optoelectronic and electronic semiconductor devices such as light-emitting diodes ( LEDs ) are widely used and their reliability is of great importance for many applications . Generally, optoelectronic semiconductor devices may comprise an underlying epitaxial (EPI ) structure including an active layer that has a quantum well structure and i s employed as a light-emitting layer . For example , when a voltage is applied, an electron and a hole are recombined in a well layer in the active layer, and as a result , light is generated .

[0003] In addition, a defect in the form of a so-called V-pit (V-shaped pit , V defect , or inverted hexagonal pyramid defect ) may suppress nonradiative recombination in the active layer as shown in previous studies , which results in an increased light emission efficiency . V-pits are associated with threading dislocations and may reach lateral si zes as large as a few hundred nm . They are buried inside a buf fer layer of the EPI structure and play a key role in the optoelectronic semiconductor devices acting as a carrier inj ection channel to the active layer and influencing its electrical and optical properties .

[0004] Conventional EPI structures have only a single si zed V-pit , which is created from a single layer below the active layer . In general , increasing the si ze or density of the V-pit reduces a forward voltage of an optoelectronic semiconductor device such as a LED, but at the cost of reducing the area of the active layer, and thus , the brightness . The opposite is the case for smaller V- pit si zes or lower V-pit densities . Therefore , there is always a trade-of f as there are limits to the control of V-pit density or si ze . Thus , an obj ect of the present invention is to provide an improved optoelectronic semiconductor device with optimi zed electro-optical properties as well as an improved method for manufacturing such a device .

[0005] According to embodiments , the obj ect is achieved by the subj ectmatter and the method of the appended claims . Further developments are defined in the dependent claims .

[0006] SUMMARY

[0007] An optoelectronic semiconductor device comprises an epitaxial semiconductor layer sequence . The epitaxial semiconductor layer sequence comprises an n-type semiconductor layer and a first n- type V-pit generation layer, where a first type of V-pits is being formed from first dislocations in the n-type semiconductor layer . First starting points of the first V-pits are being arranged in the first n-type V-pit generation layer . The epitaxial semiconductor layer sequence further comprises a second n-type V-pit generation layer, where a second type of V-pits is being formed from second dislocations in the n-type semiconductor layer . Second starting points of the second V-pits are being arranged in the second n-type V-pit generation layer . In addition, the epitaxial semiconductor layer sequence includes a V- pit control layer arranged between the first n-type V-pit generation layer and the second n-type V-pit generation layer, an p-type semiconductor layer, and an active layer arranged between the n-type semiconductor layer and the p-type semiconductor layer . The active layer is configured to generate and / or absorb electromagnetic radiation . The first n-type V-pit generation layer, the V-pit control layer, and the second type n-type V- pit generation layer are arranged between the n-type semiconductor layer and the active layer . The first n-type V-pit generation layer is arranged over the n-type semiconductor layer and the second n-type V-pit generation layer is arranged on a side of the first n-type V-pit generation layer opposite the n- type semiconductor layer .

[0008] The optoelectronic semiconductor device according to the present disclosure arti ficially implements V-pits having two di f ferent si zes . The implementation of two V-pit si zes is achieved by adding additional layers with di f ferent growth conditions . Conventional epitaxial structures have only a single V-pit generation layer, which complicates a controlling of a V-pit number density . The epitaxial semiconductor layer sequence according to the present disclosure comprises two n-type V-pit generation layers and an additional V-pit control layer, which is arranged between the two n-type V-pit generation layers . Thus , there may be three layers as compared to conventional structures .

[0009] It is possible via an epitaxial layer sequence as described above to control two V-pit si zes and V-pit number densities independently . Since the two V-pit si zes are controlled independently, the optical power of the optoelectronic semiconductor device ( e . g . , the LED) may be maximi zed by minimi zing the active volume loss . Furthermore , a forward voltage may be minimi zed by maintaining a V-pit distribution with first- and second V-pits of suf ficient si ze and density .

[0010] The optoelectronic semiconductor device of the present disclosure therefore alleviates the trade-of f limitations by introducing a new structure and providing degrees of freedom to optimi ze the electro-optical properties .

[0011] Thereby, a starting point of the first V-pits and / or a starting point of the second V-pits may be absent from the V-pit control layer . For example , the first V-pits may extend from the first n-type V-pit generation layer to the p-type semiconductor layer . For example , the second V-pits may extend from the second n-type V- pit generation layer to the p-type semiconductor layer .

[0012] The first n-type V-pit generation layer may comprise GaN, AlGaN, or InGaN .

[0013] Furthermore , the first n-type V-pit generation layer may have a higher Si concentration than the second n-type V-pit generation layer .

[0014] Speci fically, the first n-type V-pit generation layer may comprise a Si concentration that may be more than 7xl 018 / cm3. Moreover, the Si concentration may be less than 7xl 019 / cm3.

[0015] In addition, a layer thickness of the first n-type V-pit generation layer may be more than 30 nm . And the layer thickness may be less than 300 nm .

[0016] The second n-type V-pit generation layer may comprise GaN, AlGaN, or InGaN .

[0017] Moreover, the second n-type V-pit generation layer may comprise a Si concentration that may be more than 4xl 017 / cm3. Furthermore , the Si concentration may be less than 9xl 017 / cm3.

[0018] And the layer thickness of the second n-type V-pit generation layer may be more than 30 nm . And the layer thickness may be less than 300 nm .

[0019] The V-pit control layer may comprise GaN, AlGaN, or InGaN . The Si concentration of the V-pit control layer may be lower than the Si concentration of the first n-type V-pit generation layer and higher than the Si concentration of the second n-type V-pit generation layer .

[0020] In detail , the V-pit control layer may comprise a Si concentration that may be more than 0 . And the Si concentration may be less than 9xl 019 / cm3.

[0021] Furthermore , the layer thickness of the V-pit control layer may be more than 5 nm . And the layer thickness may be less than 300 nm .

[0022] More generally, the sum of the first n-type V-pit generation layer thickness , the V-pit control layer thickness , and the second n-type V-pit layer thickness may be less than 400 nm .

[0023] According to embodiments , the epitaxial semiconductor layer sequence may further comprise a substrate and a buf fer layer . The buf fer layer may comprise AlGalnN . In addition, it may include the first- and second dislocations that extend through the buf fer layer and the n-type semiconductor layer .

[0024] Each one of the first n-type V-pit generation layer, the second n-type V-pit generation layer, and the V-pit control layer may be formed as a single layer not comprising a superlattice structure .

[0025] A method of manufacturing the above-described optoelectronic semiconductor device comprises forming an n-type semiconductor layer, forming a first n-type V-pit generation layer, where a first type of V-pits is being formed from first dislocations in the n-type semiconductor layer . First starting points of the first V-pits are being arranged in the first n-type V-pit generation layer . The method further comprises forming a second n-type V-pit generation layer, where a second type of V-pits is being formed from second dislocations in the n-type semiconductor layer . Second starting points of the second V-pits are being arranged in the second n-type V-pit generation layer . In addition, the method also includes forming a V-pit control layer arranged between the first n-type V-pit generation layer and the second n-type V-pit generation layer, forming an p-type semiconductor layer, and forming an active layer arranged between the n-type semiconductor layer and the p-type semiconductor layer and configured to generate and / or absorb electromagnetic radiation . The first n-type V-pit generation layer, the V-pit control layer, and the second type n-type V-pit generation layer are arranged between the n-type semiconductor layer and the active layer . The first n-type V-pit generation layer is arranged over the n-type semiconductor layer and the second n-type V-pit generation layer is arranged on a side of the first n-type V-pit generation layer opposite the n-type semiconductor layer .

[0026] The method above allows adj usting the si ze and the number density of two di f ferently si zed V-pits by controlling growth conditions of the respective layers as outlined in the following . Thi s enables adapting electro-optical properties of the optoelectronic semiconductor device depending on characteristics of a speci fic application model . Di f ferent applications may have di fferent priorities for the electro-optical properties . For example , some applications prioriti ze voltage while others prioriti ze electrostatic discharge (ESD) characteristics . Therefore , by controlling two V-pits independently and easily, customer requirements may be met .

[0027] In this context , a number density of first V-pits formed from first dislocations in the n-type semiconductor layer and second V-pits formed from second dislocations in the n-type semiconductor layer may be controlled depending on growth conditions of the first n-type V-pit generation layer . More speci fically, the first n-type V-pit generation layer may be provided with growth conditions that allow the first V-pits to be partially generated from dislocations at the time of generation, where a V-pit number density is easily and simply controlled by the growth conditions . The growth conditions may comprise a growth rate , a temperature , a pressure , and a Si doping of the respective layer .

[0028] Furthermore , a si ze of the first V-pits may be controlled depending on a thickness of the V-pit control layer .

[0029] In addition, si zes of both the first V-pits and the second V- pits may be controlled depending on a thickness of the second n- type V-pit generation layer .

[0030] The V-pit control layer may play a role in controlling a V-pit si ze of the first V-pits that are created from the first n-type V-pit generation layer . The second n-type V-pit generation layer may allow creating the remaining second V-pits from the dislocations , and also may control both the first- and second V-pit si zes .

[0031] Hence , a degree of freedom may be added for controlling the two V-pit si zes and V-pit number densities independently .

[0032] In greater detail , a ratio of the number density of the first type of V-pits to the number density of the second type of V- pits may be controlled depending on the growth rate of the first n-type V-pit generation layer . The growth rate of the first n-type V-pit generation layer may be more than 0 . 5 pm / hr . Furthermore , the growth rate may be less than 1 . 0 pm / hr .

[0033] Controlling the number density of the first V-pits and the number density of the second V-pits may further comprise controlling a temperature during growth of the first n-type V-pit generation layer . For example , the number density of the first V-pits may be increased with increasing temperature .

[0034] Moreover, controlling the number density of the first V-pits and the number density of the second V-pits may further comprise controlling a NH3flow during growth of the first n-type V-pit generation layer . For example , the number density of the first V-pits may be increased with increasing NH3flow .

[0035] In addition, controlling the number density of the first V-pits and the number density of the second V-pits may further comprise controlling a ratio of a N2- flow to a H2- flow during growth of the first n-type V-pit generation layer . For example , the number density of the first V-pits may be increased with increasing ratio .

[0036] And a layer thickness of the first n-type V-pit generation layer may be more than 30 nm . The layer thickness may also be less than 300 nm .

[0037] The layer thickness of the second n-type V-pit generation layer may be more than 30 nm . And it may be less than 300 nm .

[0038] The si zes of the first V-pits and second V-pits may be controlled such that the first V-pits may extend from the first n-type V- pit generation layer to the p-type semiconductor layer, and the second V-pits may extend from the second n-type V-pit generation layer to the p-type semiconductor layer .

[0039] BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings serve to provide an understanding of exemplary embodiments of the invention . The drawings illustrate exemplary embodiments and, together with the description, serve for explanation thereof . Further exemplary embodiments and many of the intended advantages will become apparent directly from the following detailed de-scription . The elements and structures shown in the drawings are not necessarily shown to scale relative to each other . Like reference numerals refer to like or corresponding elements and structures .

[0041] Fig . 1A shows a cross-sectional view of an optoelectronic semiconductor device according to embodiments .

[0042] Fig . IB shows a top view of V-pits of the optoelectronic semiconductor device according to embodiments .

[0043] Fig . 2 shows a number density of V-pits as a function of a growth rate of a first n-type V-pit generation layer of the optoelectronic semiconductor device according to embodiments .

[0044] Fig . 3 shows cross-sectional views of the optoelectronic semiconductor device when applying di f ferent growth rates of the first n-type V-pit generation layer according to embodiments .

[0045] Fig . 4 shows a case study of di f ferent layer thicknesses of a second n-type V-pit generation layer and a V-pit control layer of the optoelectronic semiconductor device and resulting V-pit si zes . Fig. 5A shows a measurement result of a breakdown voltage, a brightness, and a voltage of the optoelectronic semiconductor device for a specific application.

[0046] Fig. 5B shows a measurement result of the breakdown voltage, the brightness, and the voltage of the optoelectronic semiconductor device for a further specific application.

[0047] Fig. 5C shows a measurement result of the breakdown voltage, the brightness, and the voltage of the optoelectronic semiconductor device for a further specific application.

[0048] Fig. 6 shows a method for manuf cturing the optoelectronic semiconductor device according to embodiments.

[0049] DETAILED DESCRIPTION

[0050] In the following detailed description, reference is made to the accompanying drawings, which form a part of the disclosure and in which specific exemplary embodiments are shown for purposes of illustration. In this context, directional terminology such as "top", "bottom", "front", "back", "over", "on", "in front", "behind", "leading", "trailing", etc. refers to the orientation of the figures just described. As the components of the exemplary embodiments may be positioned in different orientations, the directional terminology is used by way of explanation only and is in no way intended to be limiting.

[0051] The description of the exemplary embodiments is not limiting, since there are also other exemplary embodiments, and structural or logical changes may be made without de-parting from the scope as defined by the patent claims. In particular, elements of the exemplary embodiments described below may be combined with elements from others of the exemplary embodiments described, unless the context indicates otherwise .

[0052] The terms "wafer" or " semiconductor substrate" used in the following description may include any semiconductor-based structure that has a semiconductor surface . Wafer and structure are to be understood to include doped and undoped semiconductors , epitaxial semiconductor layers , supported by a base , i f applicable , and further semiconductor structures . For example , a layer of a first semiconductor material may be grown on a growth substrate made of a second semiconductor material or of an insulating material , for example sapphire . Further examples of materials for growth substrates include glass , silicon dioxide , quartz , silicon, SiC, AIN, GaN or a ceramic .

[0053] Depending on the intended use , the semiconductor material described as part of the present description may be based on a direct or an indirect semiconductor material . Examples of semiconductor materials particularly suitable for being used in the context of the present disclosure include nitride semiconductor compounds , by means of which, for example , ultraviolet , blue or longer-wave light may be generated, such as GaN, InGaN, AIN,

[0054] AlGaN, AlGalnN, and AlGalnBN .

[0055] The term " substrate" generally includes insulating, conductive or semiconductor substrates .

[0056] The terms " lateral" and "hori zontal" , as used in the present description, are intended to describe an orientation or alignment which extends essentially parallel to a first surface of a semiconductor substrate or semiconductor body . This may be the surface of a wafer or a chip ( die ) , for example . The hori zontal direction may, for example , be in a plane perpendicular to a direction of growth when layers are grown .

[0057] The term "vertical" as used in this description is intended to describe an orientation which is essentially perpendicular to the first surface of the semiconductor substrate or semiconductor body . The vertical direction may correspond, for example , to a direction of growth when layers are grown .

[0058] To the extent used herein, the terms "have" , " include" , "comprise" , and the like are open-ended terms that indicate the presence of said elements or features , but do not exclude the presence of further elements or features . The indefinite articles and the definite articles include both the plural and the singular, unless the context clearly indicates otherwise .

[0059] In the context of this description, the term "electrically connected" means a low-ohmic electrical connection between the connected elements . The electrically connected elements need not necessarily be directly connected to one another . Further elements may be arranged between electrically connected elements .

[0060] The term "electrically connected" also encompasses tunnel contacts between the connected elements .

[0061] Examples of optoelectronic semiconductor devices will be described below . In particular, light-emitting diodes will be described . However, the concepts may also be applied to other optoelectronic semiconductor components and are therefore not limited to light-emitting diodes . Further speci fic examples include , without limitation, semiconductor laser devices , such as surface-emitting semiconductor laser devices , photodetectors , sensors , and others . Fig. 1A shows a cross-sectional view of an optoelectronic semiconductor device 10 according to embodiments. The optoelectronic semiconductor device 10 comprises an epitaxial semiconductor layer sequence 1, which includes an n-type semiconductor layer 110, a first n-type V-pit generation layer 112, a second n-type V-pit generation layer 116, a V-pit control layer 114 arranged between the first n-type V-pit generation layer 112 and the second n-type V-pit generation layer 114, an p-type semiconductor layer 120, and an active layer 118. In addition, the epitaxial semiconductor layer sequence 1 may further comprise a substrate 100, a buffer layer 105, an unintentionally doped (UID) layer 106, a superlattice layer 117, and an electron blocking layer 119. Furthermore, a first contact element 130 may be arranged over the n-type semiconductor layer 110, and a second contact elements 135 may be arranged over the p-type semiconductor layer 120.

[0062] The n-type semiconductor layer 110 may be electrically connected via the first contact element 130. And the p-type semiconductor layer 120 may be electrically connected via the second contact element 135, for example. By applying a suitable voltage between the first contact element 130 and the second contact element 135, electromagnetic radiation 15 may be emitted within the active layer 118.

[0063] The n-type semiconductor layer 110 may comprise, for example, GaN, or a composition of AlGaN, and may have any suitable concentration of Al (e.g., Al < 20%) . Furthermore, it may have a layer thickness of 1 to 3 pm, e.g., approximately 1.5 pm. These values are, however, only by way of example and further thicknesses and / or compositions may be applied as necessary. The n- type semiconductor layer 110 may be arranged over the transparent substrate 100, for example, a sapphire substrate. The additional layers 105, 106 may be arranged between the n-type semiconductor layer 110 and the substrate 100 as follows.

[0064] For example, the n-type semiconductor layer 110 may be disposed on top of the UID layer 106. The UID layer 106 may comprise GaN or AlGaN (with a concentration of e.g., Al < 20%) and may be of n-type due to nitrogen vacancy and impurities. The thickness may range from 2 to 4 pm or even more. The UID layer 106 may be arranged on top of the buffer layer 105.

[0065] The buffer layer 105 may comprise further buffer layers 105 (not shown in Fig. 1A) , for example, it may comprise a plurality of AlGalnN, GaN, or AlGaN layers having different compositions or composition ratios (e.g., a concentration of Al < 20%) . A layer thickness of the buffer layer (s) 105 is not limited and may, for example, range from 1 to 3 pm and / or may be up to 10 pm. In addition, the buffer layer (s) 105 may have spiral or helical dislocations 103 ("threading dislocations") embedded therein that give rise to V-pits VI, V2 as shown in Fig. 1A. In general, V-pits (or inverted pyramids) are prominent and extended defects in heteroepitaxially grown GaN surfaces. They are detrimental for influencing the opto- and power-electronic properties. This will be explained in more detail later on.

[0066] In the first n-type V-pit generation layer 112 a first type of V-pits VI is formed from first dislocations 103 in the n-type semiconductor layer 110. The dislocations may refer to the threading dislocations in the buffer layer (s) 105 that extend through the layers 105, 106, 110. This has been indicated in Fig. 1A by the solid lines extending from starting points (or apexes) of the V-pits VI, V2 to the buffer layer (s) 105. In greater detail, first starting points (or apexes) of the first V-pits VI are being arranged in the first n-type V-pit generation layer 112. In the second n-type V-pit generation layer 116 a second type o f V-pits V2 is being formed from second dislocations 103 in the n- type semiconductor layer 110 . And second starting points ( or apexes ) of the second V-pits V2 are being arranged in the second n-type V-pit generation layer 116 . The first V-pits VI extend to the second n-type V-pit generation layer 116 . For example , the first V-pits VI may extend to the p-type semiconductor layer 120 . For example , a portion of the p-type semiconductor layer 120 may be arranged in the first V-pits VI . The portion of the p- type semiconductor layer 120 may extend to the starting points of the first V-pits VI . For example , the second V-pits V2 may extend to the p-type semiconductor layer 120 . For example , the p-type semiconductor layer 120 may be arranged in the second V- pits V2 . For example , the second V-pits V2 may extend to the starting points of the second V-pits V2 .

[0067] Furthermore , the first n-type V-pit generation layer 112 , the V- pit control layer 114 , and the second type n-type V-pit generation layer 116 are arranged between the n-type semiconductor layer 110 and the active layer 118 as illustrated in Fig . 1A.

[0068] In greater detail , the first n-type V-pit generation layer 112 is arranged over the n-type semiconductor layer 110 and the second n-type V-pit generation layer 116 is arranged on a side of the first n-type V-pit generation layer 112 opposite the n- type semiconductor layer 110 .

[0069] The generated V-pits do not block or terminate any of dislocation propagation to a surface of the p-type semiconductor layer 120 . As a result , the dislocations 103 propagate through the p-type semiconductor layer 120 in the V-pits . For example , a density of dislocations 103 at the surface of the p-type semiconductor layer 120 may be equal to the dislocation density in the buf fer layer 105 . Further, the density of dislocations 103 at the surface of the p-type semiconductor layer 120 or the buf fer layer 105 may be equal to the density o f V-pits at the surface of the p-type semiconductor layer 120 . In more detail , according to embodiments , the dislocation density does not change during the epitaxy process for growing the n-type semiconductor layer 110 , the first n-type V-pit generation layer 112 , the V-pit control layer 114 , the active layer 118 , and the p-type semiconductor layer 120 .

[0070] The active layer 118 may comprise a quantum well structure for generating radiation, for example a single quantum well structure ( SQW) or a multiple quantum well structure (MQW) . The term "quantum well structure" does not imply any particular meaning here with regard to the dimensionality of the quanti zation . Therefore , it includes , among other things , quantum wells , quantum wires and quantum dots as well as any combination of these structures .

[0071] The active layer 118 is arranged between the n-type semiconductor layer 110 and the p-type semiconductor layer 120 and generates and / or absorbs electromagnetic radiation . It may be disposed over the superlattice layer 117 , which in turn may be arranged over the second n-type V-pit generation layer 116 on a side opposite the side of the second n-type V-pit generation layer 116 that faces the side of the first n-type V-pit generation layer 112 , which is opposite the n-type semiconductor layer 110 .

[0072] In other words , the stacking order may be as follows when starting from the substrate 100 towards the p-type semiconductor layer 120 . On the substrate 100 the buf fer layer ( s ) 105 may be arranged . On the buf fer layer ( s ) 105 , the UID layer may be arranged . On the UID layer 106 , the n-type semiconductor layer 110 may be arranged followed by the first n-type V-pit generation layer 112 , the V-pit control layer 114 , and the second n-type V- pit generation layer 116 . On the second n-type V-pit generation layer 116, the superlattice layer 117 may be disposed followed by the active layer 118 and the electron blocking layer 119. On top of the electron blocking layer 119, the p-type semiconductor layer 120 may be arranged.

[0073] In greater detail, the superlattice layer 117 may comprise al- ternatingly stacked InGaN and GaN or InGaN and AlGaN layers (comprising a concentration of e.g., In < 12% and e.g., Al < 20%) . It may comprise a thickness more than 30 nm. And the thickness may be less than 100 nm.

[0074] Moreover, the one or more electron blocking layers 119 may, for example, contain AlGaN (having a concentration e.g., Al < 30%) and may be p-doped. The thickness of this layer 119 may be more than 10 nm. Furthermore, the thickness may be less than 80 nm. The p-type semiconductor layer 120 that may be arranged over the electron blocking layer (s) 119 may also be an AlGaN or GaN layer (having a concentration e.g., Al < 20%) p-doped with Mg. The thickness of the p-type semiconductor layer 120 may be more than 30 nm. And the thickness may be less than 100 nm.

[0075] The epitaxial semiconductor layer sequence 1 described above differs from conventional ones. Common epitaxial structures may comprise V-pits having only one size. In detail, these common structures may employ only a single V-pit generation layer that may control the V-pit size. However, generally, it is not possible to also control a number density of V-pits. This imposes limitations to realize an efficient optoelectronic semiconductor device such as a LED.

[0076] For example, a small V-pit size implies a high forward voltage due to poor hole injection. On the other hand, a large V-pit size results in a low brightness due to high active area loss. The structure of the optoelectronic semiconductor device 10 according to the present disclosure allows creating two di f ferent V-pit si zes intentionally .

[0077] More speci fically, due to the presence of two n-type V-pit generation layers 112 , 116 in combination with the V-pit control layer 114 the number density of first- and second V-pits VI , V2 as well as their corresponding si zes can be controlled independently . This structure alleviates the limitations implied by conventional epitaxial semiconductor structures that have only one V-pit generation layer . Furthermore , the implementation of an additional n-type V-pit generation layer 116 provides degrees of freedom to optimi ze the electro-optical properties .

[0078] An example of the first- and second V-pits VI , V2 of two di fferent si zes on a surface of the optoelectronic semiconductor device 10 is shown in top view in Fig . IB, which is an image obtained, for example , by scanning electron microscopy ( SEM) and / or scanning transmission electron microscopy . As explained above , the V-pits VI , V2 are generated via threading dislocations of the underlying layers 110 , 106 , 105 .

[0079] The first V-pits VI may be generated in the first n-type V-pit control layer 112 and may be approximately 300 to 500 nm in diameter . The second V-pits V2 may be generated in the second n- type V-pit generation layer 116 and may be approximately 100 to 300 nm in diameter . Both V-pits VI , V2 may comprise a hexagonal form .

[0080] As will be explained in the following section, the first n-type V-pit control layer 112 allows control ling a number density of first V-pits VI and second V-pits . 1. Control of number density of first- and second V-pits VI,

[0081] V2 :

[0082] As explained above, the V-pits are generated from dislocations embedded in the buffer layer (s) 105. In detail, the buffer layer (s) 105 may include the first- and second dislocations. This number of dislocations ( #dislcocations ) is fixed. In general, if a specific number of first V-pits VI (#V1) is formed from these dislocations, then the remaining ones are available for forming the second V-pits V2 (#V2) . This may be expressed by the following relation.

[0083] #dislocations (fixed number) = #V1 + #V2

[0084] If the number of first V-pits VI rises, then the number of second V-pits V2 decreases, and vice versa. The number density of firstand second V-pits may be controlled by growth conditions such as a growth rate of the first n-type V-pit generation layer 112.

[0085] In this context, Fig. 2 shows a number density of V-pits VI, V2 as a function of the growth rate of the first n-type V-pit generation layer 112. The horizontal axis illustrates the growth rate in pm / hr of the first n-type V-pit generation layer 112, and the vertical axis shows the number density of V-pits VI, V2 x 108cm-2. As can be seen, if the growth rate increases the number density of first V-pits VI illustrated by a solid line may decrease. Consequently, for an increasing growth rate the number density of second V-pits V2 may rise as indicated by a dashed line. This experimental data has been obtained by SEM, where a total dislocation density may be about 2.8 108cm-2. Thus, the sum of first V-pits VI and second V-pits V2 may be VI + V2 » 2.8 108cm-2. Based on this measurement, it can be seen that the number density of first- and second V-pits VI, V2 may be controlled through the growth conditions (e.g., the growth rate) of the first n-type V-pit generation layer 112.

[0086] Fig. 3 shows cross-sectional views of the optoelectronic semiconductor device 10 applying different growth rates of the first n-type V-pit generation layer 112. On the left side of Fig. 3, a first example (a) is shown with a growth rate that is smaller than 0.65 pm / hr. The resulting number of first V-pits VI is larger than the number of second V-pits V2 (#V1 >> #V2 ) .

[0087] The middle part of Fig. 3 illustrates a second example (b) where the growth rate is about 0.65 pm / hr. The number of first V-pits VI and the number of second V-pits V2 is about the same (#V1 » #V2) .

[0088] On the right side of Fig. 3, a third example (c) is shown with a growth rate larger than 0.65 pm / hr. In this case, the number of first V-pits VI is substantially smaller than the number of second V-pits V2 (#V1 << #V2 ) .

[0089] It is noted that the first- and second contact elements 130, 135 are omitted in Fig. 3 for simplicity.

[0090] As follows from the exemplary measurements above, the growth rate of the first n-type V-pit generation layer 112 influences the number density of V-pits VI and V2, where a growth rate smaller than 0.65 pm / hr results in more first V-pits VI and a growth rate higher than 0.65 pm / hr in more second V-pits V2.

[0091] Thus, the number density of first V-pits VI formed from first dislocations in the n-type semiconductor layer 110 and second V- pits V2 formed from second dislocations in the n-type semiconductor layer 110 is controlled depending on growth conditions ( e . g . , the growth rate ) of the first n-type V-pit generation layer 112 .

[0092] In greater detail , a ratio of the number density of the first type of V-pits VI to the number density of the second type of V- pits V2 may be controlled depending on the growth rate of the first n-type V-pit generation layer 112 .

[0093] The growth rate of the first n-type V-pit generation layer 112 may thereby be more than 0 . 5 pm / hr . In addition, the growth rate may be less than 1 . 0 pm / hr .

[0094] In summary, it is possible to control the number density of first- and second V-pits VI , V2 by setting the growth rate of the first n-type V-pit generation layer 112 .

[0095] In addition, it is possible to control the number density of the first V-pits VI and the number dens ity of second V-pits V2 by controlling a temperature during growth of the first n-type V- pit generation layer 112 . For example , the number density of the first V-pits VI may increase with increasing temperature .

[0096] Moreover, it is possible to control the number density of the first V-pits VI and the number dens ity of second V-pits V2 by controlling a NH3flow during the growth of the first n-type V- pit generation layer 112 . For example , the number density of the first V-pits VI may increase with increasing NH3flow .

[0097] It is also possible to control the number density of the first V-pits VI and the number density of second V-pits V2 by controlling a ratio o f a N2- flow to a H2-flow during the growth of the first n-type V-pit generation layer 112 . For example , the number density of the first V-pits VI may increase with increasing ratio of N2- flow to H2- flow . According to examples, the temperature during the growth of the first n-type V-pit generation layer 112 may be more than 700 °C. And the temperature may be less than 940 °C.

[0098] The NH3flow during the growth of the first n-type V-pit generation layer 112 may be more than 100 L. And the NH3flow may be less than 300 L.

[0099] The ratio of the N2-flow to the H2-flow during the growth of the first n-type V-pit generation layer 112 may be more than 1 / 0.3. And the ratio may be less than 1 / 4.

[0100] Furthermore, it is also possible to control the sizes of firstand second V-pits VI, V2 by controlling thicknesses of the V- pit control layer 114 and the second n-type V-pit generation layer 116. The V-pit control layer 114 does not comprise a starting point of the first V-pits VI and / or a starting point of the second V-pits V2 as apparent from Figs. 1A and 3. That is, a starting point of the first V-pits VI and / or a starting point of the second V-pits V2 may be absent from the V-pit control layer 114.

[0101] All V-pits VI, V2 may be created before the superlattice layer 117 for hole injection. In this context, it is noted that the active layer 118 and the superlattice layer 117 may not comprise any apexes or starting points of the first- and the second V- pits VI, V2. This is because V-pits generated by the superlattice layer 117 may have a relatively small size. Therefore, they do not contribute to the hole injection. Thus, all V-pits VI, V2 should open before the superlattice layer 117.

[0102] In other words, the first V-pits VI may extend from the first n- type V-pit generation layer 112 to the p-type semiconductor layer 120 , and the second V-pits V2 may extend from the second n-type V-pit generation layer 116 to the p-type semiconductor layer 120 .

[0103] The controlling of the V-pit si zes will be explained in detail in the third section . In the following section, further details regarding the first- and second n-type V-pit generation layers 112 , 116 , and the V-pit control layer 114 are provided .

[0104] 2 . Layer conditions for layers 112 , 114 , and 116 :

[0105] The first n-type V-pit generation layer 112 may comprises GaN, AlGaN, or InGaN, where an amount of In may be more than 0% . Furthermore , the amount of In may be less than 5% .

[0106] Furthermore , the first n-type V-pit generation layer 112 may have a higher Si concentration than the second n-type V-pit generation layer 116 .

[0107] In greater detail , a Si concentration of the first n-type V-pit generation layer 112 may be more than 7xl 018 / cm3. And the Si concentration may be less than 7xl 019 / cm3.

[0108] The first n-type V-pit generation layer 112 may further comprise a superlattice structure .

[0109] A layer thickness of the first n-type V-pit generation layer 112 may be more than 30 nm . And the thickness may be les s than 300 nm .

[0110] The second n-type V-pit generation layer 116 also may comprise GaN, AlGaN, or InGaN, where an amount of In may be more than 0% . And the amount of In may be less than 5% . Moreover, it may comprise a Si concentration that may be more than 4xl 017 / cm3. The Si concentration may further be less than 9x1017 / cm3.

[0111] The second n-type V-pit generation layer 116 may further comprise a superlattice structure .

[0112] The layer thickness of the second n-type V-pit generation layer 116 may be more than 30 nm . In addition, it may be less than 300 nm .

[0113] The V-pit control layer 114 may comprise GaN, AlGaN, or InGaN too . Also , the amount of In may be more than 0% . And the amount of In may be less than 5% .

[0114] A Si concentration of the V-pit control layer 114 may be lower than the Si concentration of the first n-type V-pit generation layer 112 and higher than the Si concentration of the second n- type V-pit generation layer 116 . However, according to further examples , it is also possible that the Si concentration of the V-pit control layer 114 may be higher, lower or equal to that of other layers 112 , 116 .

[0115] The V-pit control layer 114 may further comprise a superlattice structure .

[0116] The layer thickness of the V-pit control layer 114 may be more than 5 nm . And the thickness may be less than 300 nm .

[0117] More generally, the sum of the first n-type V-pit generation layer thickness , the V-pit control layer thickness , and the second n-type V-pit layer thickness may be less than 400 nm . According to embodiments , each one of the first n-type V-pit generation layer 112 , the second n-type V-pit generation layer 116 , and the V-pit control layer 114 may also be formed as a single layer not comprising a superlattice structure .

[0118] The details regarding the layers 112 , 114 , and 116 are summari zed in the table below, where also a temperature during growth of these layers is indicated .

[0119] 3. Control of first- and second V-pit VI , V2 sizes :

[0120] In addition to controlling the number density of first- and second V-pits VI , V2 , the structure of the optoelectronic semiconductor device 10 allows to control the si zes of V-pits VI , V2 as well . This is achieved through di f ferent layer thicknesses of the second n-type V-pit generation layer 116 and the V-pit control layer 114 .

[0121] Fig . 4 shows a case study of di f ferent layer thicknesses of the second n-type V-pit generation layer 116 and the V-pit control layer 114 and resulting V-pit si zes VI , V2 .

[0122] Case I represents a reference example with a layer thickness of 120 nm for the second n-type V-pit generation layer 116 and a layer thickness of 100 nm for the V-pit control layer 114 . The resulting first V-pits VI have a diameter of about 480 nm and the second V-pits have a diameter of about 260 nm . The bottom part shows a respective image obtained by SEM .

[0123] Case I I shows an example with reduced layer thickness of the V- pit control layer 114 , which, in this example , is about 30 nm. As can be seen in the corresponding image at the bottom o f Fig 4 , reducing the layer thickness of the V-pit control layer 114 results in smaller first V-pits VI , which are about 400 nm in diameter . The si ze of the second V-pits V2 does not vary substantially .

[0124] Case I I I shows an example with reduced layer thickness of the second n-type V-pit generation layer 116 , which is about 80 nm. As can be seen, both the first V-pits VI and the second V-pits V2 have smaller diameters , for example , 440 nm for the first V- pits VI and 186 nm for the second V-pits V2 , respectively . Thus , varying the thickness of the second n-type V-pit generation layer 116 af fects both si zes of the first V-pits VI and the second V- pits V2 .

[0125] This trend is further shown by case IV, which is an example where the thickness of the second n-type V-pit generation layer 116 is further decreased to about 30 nm . This results in even smaller first- and second V-pits VI , V2 .

[0126] Finally, case V illustrates an example where both layer thicknesses of the second n-type V-pit generation layer 116 and the V-pit control layer 114 have been reduced to 30 nm each . Thi s results in even smaller si zes for VI and V2 with respect to the other test cases .

[0127] From the measurements above , it follows that a si ze of the first V-pits VI is controlled depending on a thickness of the V-pit control layer 114 . In addition, the si zes of both the first V- pits VI and the second V-pits V2 are controlled depending on a thickness of the second n-type V-pit generation layer 116 .

[0128] Therefore , the combination of these two conditions may achieve an independent control of VI and V2 si zes .

[0129] From these examples the ef fect of the layer thicknesses of the V-pit control layer 114 and the second n-type generation layer 116 may be seen .

[0130] That is , depending on the requirements regarding the optoelectronic semiconductor device 10 , the layer thicknesses of the V- pit control layer 114 and the second n-type V-pit generation layer 116 may be adapted correspondingly .

[0131] More speci fically, by adapting the number density and the si zes of the V-pits VI , V2 to generate a two si zed V-pit distribution, it is possible to achieve speci fic opto-electronic properties . This may be done depending on speci fic requirements for the optoelectronic semiconductor device 10 . For example , some applications may prioriti ze a low forward voltage while others prioriti ze high brightness , or a high breakdown voltage .

[0132] For example , Figs . 5A to 5C show measurement results of a breakdown voltage Ubr, a brightness Br, and a forward voltage FV of the optoelectronic semiconductor device 10 depending on the growth rate of the first n-type V-pit generation layer 112 , the layer thickness of the V-pit control layer 114 , and the layer thickness of the second n-type V-pit control layer 116 for speci fic applications .

[0133] Fig . 5A shows an example illustrating by dotted lines a point at which the optoelectronic semiconductor device 10 has a low power consumption ( e . g . , a low forward voltage FV) highlighted by a corresponding rectangle. This may be the case using a growth rate for the first n-type V-pit generation layer 112 of about 0.6 pm / hr, a layer thickness for the V-pit control layer 114 of about 49.6 nm and a layer thickness for the second n-type generation layer 116 of about 78.9 nm. The corresponding forward voltage FV may be about 2.88 V.

[0134] Fig. 5B shows an example illustrating by dotted lines a point at which the optoelectronic semiconductor device 10 has a high brightness Br highlighted by a corresponding rectangle. This may be the case for a growth rate of 0.9 pm / hr, a layer thickness for the V-pit control layer 114 of about 5 nm and a layer thickness for the second n-type generation layer 112 of about 37.1 nm. The corresponding brightness may be about 17.02 mW.

[0135] Fig. 5C shows an example, illustrating by dotted lines a point at which the optoelectronic semiconductor device 10 has a high reliability (e.g., a high breakdown voltage Ubr) highlighted by a corresponding rectangle. This may be the case for a growth rate of 0.6 pm / hr, a layer thickness for the V-pit control layer 114 of about 5 nm and a layer thickness for the second n-type generation layer 116 of about 90 nm. The corresponding breakdown voltage may be about 60.4 V.

[0136] A corresponding method for manufacturing an optoelectronic semiconductor device 10 as described above may comprise the following processes shown in Fig. 6.

[0137] In operation S110, the n-type semiconductor layer (110) is formed .

[0138] In operation S120, the first n-type V-pit generation layer 112 is formed, where a first type of V-pits VI is being formed from first dislocations in the n-type semiconductor layer 110, and first starting points of the first V-pits VI are being arranged in the first n-type V-pit generation layer 112 .

[0139] In operation S 130 , a second n-type V-pit generation layer 116 is formed, where a second type of V-pits V2 is being formed from second dislocations in the n-type semiconductor layer 110 , and second starting points of the second V-pits V2 are being arranged in the second n-type V-pit generation layer 116 .

[0140] In operation S 140 , the V-pit control layer 114 arranged between the first n-type V-pit generation layer 112 and the second n- type V-pit generation layer 114 is formed .

[0141] In operation S 150 , the p-type semiconductor layer 120 is formed . For example , a portion of the p-type semiconductor layer 120 may be formed in the V-pits VI . For example , a portion of the p-type semiconductor layer 120 may be formed in the V-pits V2 .

[0142] And in operation S 160 , the active layer arranged 118 between the n-type semiconductor layer 110 and the p-type semiconductor layer 120 is formed, which is configured to generate and / or absorb electromagnetic radiation .

[0143] The first n-type V-pit generation layer 112 , the V-pit control layer 114 , and the second type n-type V-pit generation layer 116 are arranged between the n-type semiconductor layer 110 and the active layer 118 .

[0144] The first n-type V-pit generation layer 112 is arranged over the n-type semiconductor layer 110 and the second n-type V-pit generation layer 116 is arranged on a s ide of the first n-type V- pit generation layer 112 opposite the n-type semiconductor layer 110 . Thus , an epitaxial deposition of the epitaxial semiconductor layer sequence 1 may comprise the n-type semiconductor layer 110 , the first n-type V-pit generation layer 112 , the second n- type V-pit generation layer 116 , the V-pit control layer 114 arranged between the first n-type V-pit generation layer 112 and the second n-type V-pit generation layer 116 , the p-type semiconductor layer 120 , and the active layer arranged 118 between the n-type semiconductor layer 110 and the p-type semiconductor layer 120 .

[0145] Speci fically, the number density of first V-pits VI formed from first dislocations in the n-type semiconductor layer 110 and second V-pits V2 formed from second dislocations in the n-type semiconductor layer 110 may be controlled depending on growth conditions of the first n-type V-pit generation layer 112 .

[0146] The si ze of the first V-pits VI may be controlled depending on the thickness of the V-pit control layer 114 .

[0147] The si zes of both the first V-pits VI and the second V-pits V2 may be controlled depending on the thickness of the second n- type V-pit generation layer 116 .

[0148] As explained above , the ratio of the number density of the first type of V-pits VI to the number density of the second type of V- pits V2 may be controlled depending on the growth rate of the first n-type V-pit generation layer 112 .

[0149] In addition, as described above , controlling the number density of the f irst V-pits VI and the number density of the second V- pits V2 may further comprise controlling the temperature during growth of the first n-type V-pit generation layer 112 .

[0150] Furthermore , controlling the number density of the first V-pits VI and the number density of the second V-pits V2 may also comprise controlling the NH3 flow during growth of the first n- type V-pit generation layer 112.

[0151] And controlling the number density of the first V-pits VI and the number density of the second V-pits V2 may also comprise controlling the ratio of the N2-flow to a H2-flow during growth of the first n-type V-pit generation layer 112.

[0152] According to the method above, it is possible to create two different V-pit sizes intentionally. In detail, the two V-pit sizes and the number density of V-pits VI, V2 can be controlled independently .

[0153] Although specific embodiments have been illustrated and described herein, those skilled in the art will recognize that the specific embodiments shown and described may be replaced by a multiplicity of alternative and / or equivalent configurations without departing from the scope of the invention. The application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is to be limited by the claims and their equivalents only.

[0154] LIST OF REFERENCES

[0155] 1 epitaxial semiconductor layer sequence

[0156] 10 optoelectronic semiconductor device

[0157] 15 electromagnetic radiation

[0158] 100 substrate

[0159] 103 dislocation

[0160] 105 buf fer layer

[0161] 106 unintentionally doped layer

[0162] 110 n-type semiconductor layer

[0163] 112 first n-type V-pit generation layer

[0164] 114 V-pit control layer

[0165] 116 second n-type V-pit generation layer

[0166] 117 superlattice layer

[0167] 118 active layer

[0168] 119 electron blocking layer

[0169] 120 p-type semiconductor layer

[0170] 130 first contact element

[0171] 135 second contact element

[0172] VI first type of V-pit

[0173] V2 second type of V-pit

Claims

CLAIMS1. An optoelectronic semiconductor device (10) comprising an epitaxial semiconductor layer sequence (1) , the epitaxial semiconductor layer sequence (1) comprising: an n-type semiconductor layer (110) ; a first n-type V-pit generation layer (112) , a first type of V-pits (VI) being formed from first dislocations in the n-type semiconductor layer (110) , first starting points of the first V-pits (VI) being arranged in the first n-type V-pit generation layer (112) ; a second n-type V-pit generation layer (116) , a second type of V-pits (V2) being formed from second dislocations in the n-type semiconductor layer (110) , second starting points of the second V-pits (V2) being arranged in the second n-type V-pit generation layer (116) ; a V-pit control layer (114) arranged between the first n-type V-pit generation layer (112) and the second n-type V- pit generation layer (116) ; an p-type semiconductor layer (120) ; and an active layer arranged (118) between the n-type semiconductor layer (110) and the p-type semiconductor layer (120) and configured to generate and / or absorb electromagnetic radiation, wherein the first V-pits (VI) extend to the second n- type V-pit generation layer (116) , wherein the first n-type V-pit generation layer (112) , the V-pit control layer (114) , and the second type n-type V- pit generation layer (116) are arranged between the n-type semiconductor layer (110) and the active layer (118) , wherein the first n-type V-pit generation layer (112) is arranged over the n-type semiconductor layer (110) and the second n-type V-pit generation layer (116) is arranged on aside of the first n-type V-pit generation layer (112) opposite the n-type semiconductor layer (110) .

2. The optoelectronic semiconductor device (10) according to claim 1, wherein a starting point of the first V-pits (VI) and / or a starting point of the second V-pits (V2) is absent from the V-pit control layer (114) .

3. The optoelectronic semiconductor device (10) according to claim 1 or 2, wherein the first V-pits (VI) extend from the first n-type V-pit generation layer (112) to the p-type semiconductor layer (120) , and the second V-pits (V2) extend from the second n-type V-pit generation layer (116) to the p-type semiconductor layer (120) .

4. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the first n-type V-pit generation layer (112) comprises GaN, AlGaN, or InGaN.

5. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the first n-type V-pit generation layer (112) has a higher Si concentration than the second n-type V-pit generation layer (116) .

6. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the first n-type V-pit generation layer (112) comprises a Si concentration more than 7xl018 / cm3, and wherein the first n-type V-pit generation layer (112) comprises a Si concentration less than 7xl019 / cm3.

7. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the second n-type V-pit generation layer (116) comprises GaN, AlGaN or InGaN.

8. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the second n-type V-pit generation layer (116) comprises a Si concentration more than 4xl017 / cm3, and wherein the second n-type V-pit generation layer (116) comprises a Si concentration less than 9xl017 / cm3.

9. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the V-pit control layer (114) comprises GaN, AlGaN, or InGaN.

10. The optoelectronic semiconductor device (10) , according to any one of the preceding claims wherein the Si concentration of the V-pit control layer (114) is lower than the Si concentration of the first n-type V-pit generation layer (112) and higher than the Si concentration of the second n-type V- pit generation layer (116) .

11. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the V-pit control layer (114) comprises a Si concentration more than 0, and wherein the V-pit control layer (114) comprises a Si concentration less than 9xl019 / cm3.

12. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the sum of the first n-type V-pit generation layer thickness, the V-pit control layer thickness, and the second n-type V-pit layer thickness may be less than 400 nm.

13. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the epitaxial semiconductor layer sequence (1) further comprises: a substrate (100) ; anda buffer layer (105) arranged between the substrate(100) and the n-type semiconductor layer (110) , wherein the first- and second dislocations are generated in the buffer layer (105) and extend through the buffer layer (105) and the n-type semiconductor layer (110) .

14. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein each one of the first n-type V-pit generation layer (112) , the second n-type V-pit generation layer (116) , and the V-pit control layer(114) is formed as a single layer not comprising a superlattice structure.

15. The optoelectronic semiconductor device (10) according to any one of the preceding claims, wherein the V-pits (VI,V2 ) extend to the p-type semiconductor layer (120) .

16. A method of manufacturing an optoelectronic semiconductor device (10) comprising the steps of: forming (S110) an n-type semiconductor layer (110) ; forming (S120) a first n-type V-pit generation layer (112) , a first type of V-pits (VI) being formed from first dislocations in the n-type semiconductor layer (110) , first starting points of the first V-pits (VI) being arranged in the first n-type V-pit generation layer (112) ; forming (S130) a second n-type V-pit generation layer (116) , a second type of V-pits (V2) being formed from second dislocations in the n-type semiconductor layer (110) , second starting points of the second V-pits (V2) being arranged in the second n-type V-pit generation layer (116) ; forming (S140) a V-pit control layer (114) arranged between the first n-type V-pit generation layer (112) and the second n-type V-pit generation layer (116) ; forming (S150) a p-type semiconductor layer (120) ; andforming (S160) an active layer arranged (118) between the n-type semiconductor layer (110) and the p-type semiconductor layer (120) and configured to generate and / or absorb electromagnetic radiation, wherein the first V-pits (VI) extend to the second n- type V-pit generation layer (116) , wherein the first n-type V- pit generation layer (112) , the V-pit control layer (114) , and the second type n-type V-pit generation layer (116) are arranged between the n-type semiconductor layer (110) and the active layer (118) , wherein the first n-type V-pit generation layer (112) is arranged over the n-type semiconductor layer (110) and the second n-type V-pit generation layer (116) is arranged on a side of the first n-type V-pit generation layer (112) opposite the n-type semiconductor layer (110) .

17. The method according to claim 16, wherein controlling a number density of first V-pits (VI) formed from first dislocations in the n-type semiconductor layer (110) and second V- pits (V2) formed from second dislocations in the n-type semiconductor layer (110) comprises controlling growth conditions of the first n-type V-pit generation layer (112) .

18. The method according to claim 16 or 17, wherein controlling a size of the first V-pits (VI) comprises controlling a thickness of the V-pit control layer (114) .

19. The method according to claims 16 to 18, wherein controlling sizes of both the first V-pits (VI) and the second V- pits (V2) comprises controlling a thickness of the second n- type V-pit generation layer (116) .

20. The method according to claims 16 to 19, wherein controlling a ratio of the number density of the first type of V-pits (VI) to the number density of the second type of V-pits (V2) comprises controlling a growth rate of the first n-type V-pit generation layer (112) .

21. The method according to claim 20, wherein the growth rate of the first n-type V-pit generation layer (112) is more than 0.5 pm / hr, and wherein the growth rate of the first n- type V-pit generation layer (112) is less than 1.0 pm / hr.

22. The method according to claims 16 to 21, wherein controlling the number density of the first V-pits (VI) and the number density of the second V-pits (V2) further comprises controlling a temperature during growth of the first n-type V- pit generation layer (112) , wherein the number density of the first V-pits (VI) is increased with increasing temperature.

23. The method according to claims 16 to 22, wherein controlling the number density of the first V-pits (VI) and the number density of the second V-pits (V2) further comprises controlling a NH3flow during growth of the first n-type V-pit generation layer (112) , wherein the number density of the first V-pits (VI) is increased with increasing NH3flow.

24. The method according to claims 16 to 23, wherein controlling the number density of the first V-pits (VI) and the number density of the second V-pits (V2) further comprises controlling a ratio of a N2-flow to a H2-flow during growth of the first n-type V-pit generation layer (112) , wherein the number density of the first V-pits (VI) is increased with increasing ratio.

25. The method according to claims 16 to 24, wherein the sizes of the first V-pits (VI) and second V-pits (V2) are controlled such that the first V-pits (VI) extend from the firstn-type V-pit generation layer (112) to the p-type semiconductor layer (120) , and the second V-pits (V2) extend from the second n-type V-pit generation layer (116) to the p-type semiconductor layer (120) .

Citation Information

Patent Citations

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    CN108039397A

  • Epitaxial structure and manufacturing method thereof

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  • V-pit-containing dual-wavelength LED epitaxial structure and preparation method thereof

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  • Light emitting diode and light emitting device

    CN117352612A

  • Semiconductor device and light emitting device package having thereof

    KR1020180072367A