Buck-boost converter with parallel switches and method to detect and remove switch that failed in closed circuit by exposing it to a targeted overcurrent

Abstract

A DC power system that comprises a power bus (31, 32, 4) comprising an input positive voltage rail (31), an output positive voltage rail (32), and a negative voltage rail (4), a DC / DC converter (6) that comprises a plurality of switching units (S1 -S4), the switching units (S1- S4) forming a first leg (61) and a second leg (62), wherein the first leg (61) comprises a top switching unit (S1) connected to the input positive voltage rail (31) and a bottom switching unit (S2, S4) connected to the negative voltage rail (4), wherein the second leg (62) comprises a top switching unit (S3) connected to the output positive voltage rail (32) and a bottom switching unit (S4) connected to the negative voltage rail (4), and wherein the switching units (S1-S4) each comprise a plurality of semiconductor switches (S11-S15, S21-S25, S31 -S35, S41-S45) arranged in parallel. It is further provided a controller (5) configured to receive information or determine that one of the semiconductor switches of the switching units (S1 -S4) has a fault condition. In such case, the controller (5) is further configured to control the switching units (S1-S4) such that the semiconductor switches (S11 -S15, S21-S25, S31-S35, S41-S45) of the switching unit (S1-S4) that comprises the faulty semiconductor switch (S11, S21, S31, S41) are switched off, and that the semiconductor switches (S11-S15, S21-S25, S31-S35, S41-S45) of one of the switching units (S1-S4) of the other leg (61, 62) that does not comprise the switching unit with the faulty semiconductor switch (S11, S21, S31, S41) are switched on. Thereby, a current is guided through the faulty semiconductor switch (S11, S21, S31, S41) and the semiconductor switches of the switching unit (S1-S4) of the other leg (61, 62) to remove the faulty semiconductor switch (S11, S21, S31, S41).

Description

[0001] BUCK-BOOST CONVERTER WITH PARALLEL SWITCHES AND METHOD TO DETECT AND REMOVE SWITCH THAT FAILED IN CLOSED CIRCUIT BY EXPOSING IT TO A TARGETED OVERCURRENT

[0002] FIELD

[0003] The present disclosure relates a DC power system and a method for servicing such DC power system in case of failure of a semiconductor switch.

[0004] BACKGROUND

[0005] With increased penetration of electrical systems and the progression towards full electric and hybrid propulsion systems, the use of energy storage systems and DC power distribution has gained increased use. Multiple loads and sources may be connected to a DC distribution system such as a hybrid propulsion system. In such system, power converters such as inverters, rectifiers and DC / DC converters are needed for interfacing electrical propulsion motors, turbo generators, fuel cells and battery energy storage systems.

[0006] To improve power density there is a trend to move away from traditional power module-based power converter designs to power converter designs based on surface mount devices (SMD) type power devices which are mounted on a printed circuit board (PCB), wherein multiple power devices are connected in parallel to meet the power / current requirements. In particular, the switching units of the power converter may each comprise a plurality of semiconductor switches arranged in parallel. One disadvantage of such system with parallel semiconductor switches lies in that failure of one semiconductor switch can lead to a complete shutdown of the power converter and / or the complete power converter may become unusable.

[0007] There is a need to provide for a DC power system with a power converter, namely, a DC / DC converter that avoids that failure of one of a plurality of semiconductor switches arranged in parallel leads to failure of the complete DC / DC converter, or to at least provide a useful alternative to known DC power systems.

[0008] SUMMARY

[0009] In a first aspect of the invention a DC power system is provided. The DC power system comprises a power bus comprising an input positive voltage rail, an output positive voltage rail, and a negative voltage rail, and a DC / DC converter that comprises a plurality of switching units, the switching units forming a first leg and a second leg, wherein the first leg comprises a top switching unit connected to the input positive voltage rail and a bottom switching unit connected to the negative voltage rail, and wherein the second leg comprises a top switching unit connected to the output positive voltage rail and a bottom switching unit connected to the negative voltage rail. Further, it is provided that the switching units each comprise a plurality of semiconductor switches arranged in parallel.

[0010] The DC power system further comprises a controller that is configured to receive information or determine that one of the semiconductor switches of the switching units has a fault condition. In such case, the controller is further configured to control the switching units such that the semiconductor switches of the switching unit that comprises the faulty semiconductor switch are switched off, and that the semiconductor switches of one of the switching units of the other leg (the leg that does not comprise the switching unit with the faulty semiconductor switch) are switched on, wherein a current is guided through the faulty semiconductor switch and the semiconductor switches of the switching unit of the other leg to remove the faulty semiconductor switch.

[0011] Aspects of the invention are thus based on the idea to address the problem of a faulty semiconductor switch by removing the faulty semiconductor switch in that a controlled current is provided that burns the faulty semiconductor switch or an element arranged in series with the faulty semiconductor switch, thereby removing the faulty semiconductor switch from the DC / DC converter without damaging the other components in the system.

[0012] To this end, some of the power switches in the DC / DC converter are turned / switched on to transfer energy into the faulty semiconductor switch to create a controlled short circuit and make the faulty semiconductor switch open circuit. As the semiconductor switches of the switching unit that comprises a faulty semiconductor switch are switched off, the current flows through the faulty semiconductor switch only, for which the switching off does not have an effect due to its faulty nature. At the same time, as the semiconductor switches of that switching unit are switched off, the healthy semiconductor switches are not affected by the operation.

[0013] Aspects of the present invention thus service a DC power system by removing a faulty semiconductor switch without damaging the other components, thereby allowing to bring the power system back into operation.

[0014] One further advantage associated with the present invention lies in that it can be implemented without needing additional switching units, using the components already present in the DC / DC converter for diagnosis and removal of a faulty semiconductor switch.

[0015] The fault that a faulty semiconductor switch may experience may be of different nature. For example, the fault may be that the semiconductor switch is short-circuited. In such case, after the faulty semiconductor switch has been burned, the current path through the faulty semiconductor switch is opened and no current is flowing through the faulty semiconductor switch anymore. In another example, the fault may be that the switching function of the semiconductor switch is impaired. In some embodiments, the controller is configured to operate the semiconductor switches of the switching unit of the other leg such that a pre-determined continuous stream of pulses is applied when a fault condition is present for the purpose of controlling the current and its duration. By applying pulses, the faulty semiconductor switch or an element arranged in series with the semiconductor switch such as a fuse can be blown off safely and in a controlled manner without damaging the semiconductor switches of the other switching unit through which a current flows (which may be damaged if a current is present for a longer period of time).

[0016] The applied continuous pulsed stream may follow a high-frequency pulse pattern. The pulses may be pulse-width modulation. By means of the continuous stream of pulses, a pulsed current is created which burns the faulty semiconductor switch or an element arranged in series with the faulty semiconductor switch.

[0017] In some embodiments, a current is provided through the faulty semiconductor switch such that the faulty semiconductor switch is burned, thereby removing the faulty semiconductor switch. For example, if the faulty semiconductor switch had been short- circuited before being burned, there is an opened circuit after the faulty semiconductor switch has been burned. According to this embodiment, it is the faulty semiconductor switch itself which is burned.

[0018] In another embodiment, a series fuse is arranged in series with each of the semiconductor switches, wherein the current is provided such that the series fuse associated with the faulty semiconductor switch is burned in order to remove the faulty semiconductor switch. According to this embodiment, it is not the faulty semiconductor switch itself which is burned but a fuse arranged in series with the semiconductor switch.

[0019] Each semiconductor switch of a switching unit may be arranged in combination with an antiparallel diode. Such diodes give current that flows in the opposite direction a path to flow, thereby avoiding high voltage peaks eventually caused by inductive currents.

[0020] In some embodiments, the number of semiconductor switches arranged in parallel in the switching units is such that a level of redundancy is provided for. The idea of such a redundancy is to ensure that a switching unit can still operate normally after one of its semiconductor switches has been deactivated in accordance with the invention.

[0021] In some embodiments, the semiconductor switches of each leg of the DC / DC converter are controlled by a common gate driver (common for the semiconductor switches of that leg). The semiconductor switches of the other leg are controlled by another common gate driver. This is convenient as the number of gate drivers can be limited in this way. However, in principle, the semiconductor switches may be driven by individual gate drivers. The gate drivers are controlled by the controller. Generally, the semiconductor switches each comprise a control terminal (such as a Gate-Terminal in case of a MOSFET) which is controlled by the gate driver for the respective leg or, alternatively, by an individual gate driver.

[0022] In some embodiments, if the faulty semiconductor switch is from a top switching unit of one of the legs, the controller is configured to control the semiconductor switches of the bottom switching unit of the other leg to be switched on such that the current flows through them; and if the faulty semiconductor switch is from a bottom switching unit of one of the legs, the controller is configured to control the semiconductor switches of the top switching unit of the other leg to be switched on such that the current flows through them.

[0023] This embodiment implements a scheme in which complementary switching units are used for guiding the current, the term “complementary” referring to the top switching units and bottom switching units. For example, if the faulty semiconductor switch is from a top switching unit, the switching unit of the other leg through which the current flows is a bottom switching unit. If the faulty semiconductor switch is from a bottom switching unit, the switching unit of the other leg through which the current flows is a top switching units.

[0024] In some embodiments, the controller is configured to determine if one of the semiconductor switches has a fault condition in that it is configured to implement the following steps: determine if an error signal is received from one of the common gate drivers; in such case initially switch off all semiconductor switches of all switching units; subsequently determine the leg in which the faulty semiconductor switch is located by determining the common gate driver from which the signal has been received; after having identified the faulty leg in which the faulty semiconductor switch is located, apply a high frequency pulse train to the semiconductor switches of the bottom switching unit of the other leg, and measure the current that flows through the top switching unit of the faulty leg; if a current flow is measured, choose the top switching unit to be the switching unit with the faulty semiconductor switch; otherwise, apply a high frequency pulse train to the semiconductor switches of the top switching unit of the other leg, and measure the current that flows through the bottom switching unit of the faulty leg; and choose the bottom switching unit to be the switching unit with the faulty semiconductor switch if a current flow is measured; or apply this sequence in reverse order.

[0025] Accordingly, a scheme is implemented in which it is first determined by identification of the gate driver which provided an error signal in which leg the faulty semiconductor switch is located. Subsequently, to determine which of the two switching units of that leg is affected, it is tried to guide a current through the top switching unit of the faulty leg (the semiconductor switches of which are turned off) and the bottom switching unit of the other leg (by applying a high frequency pulse train to the bottom switching unit). If a current is detected, it must be from the faulty, short-circuited semiconductor switch. In such case, it is the top switching unit of the faulty leg in which the faulty semiconductor switch is arranged. If no current is detected, it is tried to guide a current through the bottom switching unit of the faulty leg and the top switching unit of the other leg. If a current is detected, it must be from the faulty, short-circuited semiconductor switch. In this case, it is the bottom switching unit of the faulty leg in which the faulty semiconductor switch is arranged. Of course, the sequence may be reversed, i.e., it is first determined if a current is guided through the bottom switching unit of the faulty leg and the top switching unit of the other leg.

[0026] The semiconductor switches may be implemented as MOSFET, IGBT, GaN or SiC transistors in embodiments. The gate of such semiconductor switch is the control terminal to which a driver signal is applied.

[0027] In a second aspect a method for servicing a DC power system in case of failure of a semiconductor switch is provided. The DC power system in which the method is carried out comprises an input positive voltage rail, an output positive voltage rail, and a negative voltage rail, and a DC / DC converter that comprises a plurality of switching units, the switching units forming a first leg and a second leg, wherein the first leg comprises a top switching unit connected to the input positive voltage rail and a bottom switching unit connected to the negative voltage rail, wherein the second leg comprises a top switching unit connected to the output positive voltage rail and a bottom switching unit connected to the negative voltage rail, and wherein the switching units each comprise a plurality of semiconductor switches arranged in parallel. The method comprises: receiving information or determining that one of the semiconductor switches of the switching units has a fault condition; switching off the semiconductor switches of the switching unit that comprises the faulty semiconductor switch; and switching on the semiconductor switches of one of the switching units of the other leg that does not comprise the switching unit with the faulty semiconductor switch; thereby guiding a current through the faulty semiconductor switch and the semiconductor switches of the switching unit of the other leg to remove the faulty semiconductor switch.

[0028] The method allows to service a power system by removing a faulty semiconductor switch without damaging the other components, thereby allowing to bring the power system back into operation.

[0029] In some embodiments, the faulty semiconductor switch itself or a series fuse arranged in series with the faulty semiconductor switch is burned by the current. Further, it may be provided that the semiconductor switches of the switching unit of the other leg are operated by applying a pre-determined continuous stream of pulses when a fault condition is present. In some embodiments, the method further comprises: if the faulty semiconductor switch is from a top switching unit of one of the legs, switching on the bottom switching unit of the other leg such that the current flows through them; and if the faulty semiconductor switch is from a bottom switching unit of one of the legs, switching on the semiconductor switches of the top switching unit of the other leg such that the current flows through them.

[0030] In such case, the following method may be implemented to determine that one of the semiconductor switches of the switching units has a fault condition: determine if an error signal is received from one of the common gate drivers; in such case initially switch off all semiconductor switches of all switching units; subsequently determine the leg in which the faulty semiconductor switch is located by determining the common gate driver from which the signal has been received; after having identified the faulty leg in which the faulty semiconductor switch is located, apply a high frequency pulse train to the semiconductor switches of the bottom switching unit of the other leg, and measure the current that flows through the top switching unit of the faulty leg; if a current flow is measured, choose the top switching unit to be the switching unit with the faulty semiconductor switch; otherwise, apply a high frequency pulse train to the semiconductor switches of the top switching unit of the other leg, and measure the current that flows through the bottom switching unit of the faulty leg; and choose the bottom switching unit to be the switching unit with the faulty semiconductor switch if a current flow is measured; or apply this sequence in reverse order.

[0031] The skilled person will appreciate that except where mutually exclusive, a feature or parameter described in relation to any one of the above aspects may be applied to any other aspect. Furthermore, except where mutually exclusive, any feature or parameter described herein may be applied to any aspect and / or combined with any other feature or parameter described herein.

[0032] BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The invention will be explained in more detail on the basis of exemplary embodiments with reference to the accompanying drawings in which:

[0034] FIG. 1 is an embodiment of a DC power system that implements a DC / DC converter that comprises four switching units arranged in two legs, each leg having a top switching unit and a bottom switching unit, wherein each of the switching units comprises a plurality of semiconductor switches arranged in parallel, and wherein in case one of the semiconductor switches has a fault a current is guided through the faulty semiconductor switch and the semiconductor switches of the one of the switching units of the other leg to burn of the faulty semiconductor switch; FIG. 2 is an embodiment of a DC power system which is similar to the embodiment of FIG. 1 except that a series fuse is arranged in series with each of the semiconductor switches;

[0035] FIG. 3 is the DC power system of FIG. 1 , wherein a current is guided through a particular faulty semiconductor switch of the top switching unit of the first leg and the semiconductor switches of the bottom switching unit of the second leg;

[0036] FIG. 4 is the DC power system of FIG. 1 , wherein a current is guided through a particular faulty semiconductor switch of the bottom switching unit of the second leg and the semiconductor switches of the top switching unit of the first leg;

[0037] FIG. 5 is the DC power system of FIG. 1 , wherein a current is guided through a particular faulty semiconductor switch of the bottom switching unit of the first leg and the semiconductor switches of the top switching unit of the second leg;

[0038] FIG. 6 is the DC power system of FIG. 1 , wherein a current is guided through a particular faulty semiconductor switch of the top switching unit of the second leg and the semiconductor switches of the bottom switching unit of the first leg;

[0039] FIG. 7 is a flowchart of a method allowing to service a DC power system by removing a faulty semiconductor switch;

[0040] FIG. 8 is a flowchart of an embodiment indicating the current flow dependent on whether the faulty semiconductor switch is from a top switching unit or from a bottom switching unit;

[0041] FIG. 9 is a flowchart of an embodiment to determine a switching unit that comprises a faulty semiconductor switch;

[0042] FIG. 10 indicates an electric distribution architecture in which the DC power system of the present invention may be implemented; and

[0043] FIG. 11 is a standard architecture of a DC / DC converter.

[0044] DETAILED DESCRIPTION

[0045] Initially, it is pointed out that in the following a DC power system is described by way of example that comprises a power converter which is implemented as a DC / DC converter. However, the principles of the present invention similarly apply to other kinds of power converters.

[0046] Before discussing embodiments of the present invention with respect to FIGS. 1 to 9, the background of the invention is discussed with respect to FIGS. 10 and 11 to provide for a better understanding of the present invention.

[0047] FIG. 10 depicts an electric distribution architecture which may be implemented in a hybrid aircraft power system. Two input sources are provided to provide power to a propulsion motor 15. One input source is a DC battery 13 which represents an energy storage system. The other input source is a turbo generator 14. A power inverter 11 is provided that supplies the propulsion motor 15 with a three-phase alternating current. The power inverter 1 1 receives direct current either from a DC / DC converter 12 coupled to the DC battery 13 or from a rectifier 10 coupled to the turbo generator 14 (or alternatively directly from the DC battery 13). The DC power system of the present invention may regard the DC / DC converter 12 in embodiments.

[0048] FIG. 11 shows a DC power system that comprises a power bus. The power bus comprises an input positive voltage rail 31 , an output positive voltage rail 32, and a common negative voltage rail 4. The input positive voltage rail 31 is connected to the positive terminal 21 of a DC power source 2 (such as a DC battery) which has a positive terminal 21 and a negative terminal 22. The output positive voltage rail 32 is connected to a load R. The negative voltage rail 4 is connected to the negative terminal 22. The voltage rails 31 , 32, 4 form a high-voltage bus.

[0049] The system further comprises a DC / DC converter 6. The DC / DC converter comprises four switching units S1 -S4 which are arranged in two parallel legs 61 , 62, wherein the first leg 61 comprises a top switching unit S1 connected to the input positive voltage rail 31 and a bottom switching unit S2 connected to the negative voltage rail 4, wherein the second leg 62 comprises a top switching unit S3 connected to the output positive voltage rail 32 and a bottom switching unit S4 connected to the negative voltage rail 4.

[0050] Accordingly, the voltage present on the input positive voltage rail 31 is applied as positive input voltage to the DC / DC converter 6. The positive output voltage of the DC / DC converter 6 is applied the output positive voltage rail 32, wherein the positive voltage on the output positive voltage rail 32 is different than the positive voltage of the input positive voltage rail 31 (as is the nature of a DC / DC converter).

[0051] An inductance L is arranged between and connects the two parallel legs 61 , 62. The inductance L has the function of an intermediate energy storage. There is also provided a filtering capacitor CL at the DC power source side of the system which is arranged between the input positive voltage rail 31 and the negative voltage rail 4.

[0052] The load R may be formed in a plurality of manners. In examples, the load may be a power inverter and / or an electric motor. A capacitive load generally depicted as CH is arranged at the load side of the system in parallel to the load R and extends between the output positive voltage rail 32 and the negative voltage rail 4.

[0053] FIG. 1 1 shows a DC / DC converter as known to the skilled person such that it is refrained from providing further details. Also, it is pointed out that the circuit may comprise further elements such as gate drivers, control logic and a solid-state power controller or a circuit braker. FIG. 1 shows an embodiment of a DC power system in accordance with the principles of the present invention. Similar as in FIG. 1 1 , the DC power system comprises a DC power source 2, an input positive voltage rail 31 , an output positive voltage rail 32, and a common negative voltage rail 4, a filtering capacitor CL, a DC / DC converter 6, a load R and a capacitive load CH.

[0054] The DC / DC converter comprises four switching units S1 -S4 arranged in parallel first and second legs 61 , 62, wherein the first leg 61 comprises a top switching unit S1 connected to the input positive voltage rail 31 and a bottom switching unit S2 connected to the negative voltage rail 4, wherein the second leg 62 comprises a top switching unit S3 connected to the output positive voltage rail 32 and a bottom switching unit S4 connected to the negative voltage rail 4. The difference in architecture with respect to the system of FIG. 1 1 lies in that each of the switching units S1 -S4 is comprised of a plurality of semiconductor switches S1 1 -S15, S21 -S25, S31 -S35, S41 -S45 arranged in parallel. More particularly, switching unit S1 comprises semiconductor switches S1 1 -S15, switching unit S2 comprises semiconductor switches S21 -S25, etc.

[0055] It is pointed out that the number of five parallel semiconductor switches in the switching units S1 -S4 is to be understood as an example only. The number of parallel semiconductor switches is determined by the current requirements.

[0056] The semiconductor switches S11 -S15, S21 -S25, S31 -S35, S41 -S45 may be a MOSFET (metal-oxide-semiconductor field-effect transistor), GaN (Gallium Nitride), SiC (Silicon Carbide) or IGBT (Insulated Gate Bipolar Transistor) switches. An antiparallel diode is provided for each semiconductor switch. Such antiparallel diode gives current that flows in the opposite direction a path to flow. Without such diodes, inductive currents would cease instantly, generating high voltage peaks.

[0057] The power system further comprises two gate drivers 81 , 82 for the semiconductor switches S11 -S15, S21 -S25, S31 -S35, S41 -S45. In the depicted embodiment, but not necessarily, a separate common gate driver is provided for the semiconductor switches of each leg 61 , 62. Accordingly, gate driver 81 provides control signals to the control terminals of semiconductor switches S1 1 -S15 and S21 -S25, and gate driver 82 provides control signals to the control terminals of semiconductor switches S31 -S35 and S41 -S45. In other embodiments, there may be provided a separate gate driver for each switching unit S1 -S4 or there may even be provided a separate gate driver for each semiconductor switch.

[0058] By implementing a plurality of parallel semiconductor switches for each switching unit S1 -S4, it is easier to meet the power requirements, as the current capacity can be increased with each additional parallel semiconductor switch. However, switching devices may fail due to multiple reasons, such as overvoltage, EMI, high dv / dt, unequal current sharing, manufacturing defects, etc. With a large number of parallel semiconductor switches, there is an increased risk of failure of a semiconductor switch. However, the failure of a single semiconductor switch may lead to a complete shutdown of the DC / DC converter.

[0059] To address this problem, the DC power system of FIG. 1 implements a servicing method which allows to service the DC power system by removing a faulty semiconductor switch without damaging the other semiconductor switches.

[0060] To implement such function, the DC power system comprises a controller 5 which is depicted schematically. The controller comprises input lines 52 and output lines 51. In particular, the controller communicates 5 through input lines 52 and output lines 51 with the gate drivers 81 , 82 to receive information about the semiconductor switches and to provide control signals regarding which semiconductor switches are to be switched on and off by the gate driver.

[0061] In particular, the controller 5 is configured to receive information or determine from the received information that one of the semiconductor switches of the switching units S1 - S4 has a fault condition. This situation is considered in FIG. 3 which is identical to FIG. 1 except that a fault situation and current path to heal the fault situation are additionally indicated.

[0062] According to FIG. 3, as an example the situation is considered that switch S11 of switching unit S1 of leg 61 has a fault condition (such as being short-circuited). The information that one of the semiconductor switches has experienced a fault can be provided from gate driver 81 to controller 5. For example, gate driver 81 flags an error signal that is received by controller 5 through input lines 52. In other embodiments, there may be provided sensors associated with the semiconductor switches (such as thermal sensors) which provide information about a fault condition.

[0063] In case a fault condition of a semiconductor switch is detected (in the depicted example semiconductor switch S1 1 ), the controller 5 is configured to switch off all semiconductor switches of the switching unit that comprises the faulty semiconductor switch S1 1 , which is switching unit S1 in the present case. Accordingly, semiconductor switches S11 -S15 are switched off (by means of gate driver 81 receiving respective control signals from controller 5 through output lines 51 ).

[0064] At the same time, the controller 5 provides control signals to gate drive 82 to the effect that the switching unit S4 is completely switched on, i.e., semiconductor switches S41 -S45 are switched on. This leads to the situation that a current from the DC power source 2 is guided through the faulty semiconductor switch S11 of switching unit S1 only and is further guided through all semiconductor switches S41 -S45 of switching unit S4. As the current is concentrated on the faulty semiconductor switch S11 in switching unit S1 , the faulty semiconductor switch S11 is burned by the current and, thereby, removed from the switching unit S1 . In particular, a previous short-circuit of the semiconductor switch S11 is transformed by the burning into an open state of the semiconductor switch S11 .

[0065] For removing the faulty semiconductor switch S11 , the controller 5 may control the semiconductor switches S41 -S45 of switching unit S4 such that a pre-determined continuous stream of pulses is applied when a fault condition is present. This allows the semiconductor switch S1 1 to be blown off safely without damaging the semiconductor switches S41 -S45 and S61 -S65.

[0066] The controller 5 may comprise a processor for executing instructions and a memory which is coupled to the processor and in which instructions are stored which, when executed by the processor, cause the processor to perform said functions of receiving information about the semiconductor switches and controlling the auxiliary switching instance and the semiconductor switches. The controller 5 may be a separate unit or may be integrated into other components such as a general control logic or a microcontroller of a solid-state power controller. Also, the controller 5 may communicate with other control devices of the system.

[0067] FIG. 2 depicts an embodiment which is similar to the embodiment of FIGS. 1 and 3 except that each of the semiconductor switches S1 1 -S15, S21 -S25, S31 -S35, S41 -S45 is arranged in series with a series fuse F11 , F21 , F31 , F41 , wherein for ease of depiction only some of the series fuses are indicated with a reference sign. In this embodiment, in case of a current through a faulty semiconductor switch, it is not the faulty semiconductor switch but the corresponding fuse which is burned.

[0068] In FIG. 3, a scheme has been implemented in which, if the fault occurred in a top switching unit (switching unit S1 in FIG. 3), the current is guided through a bottom switching unit of the other leg (switching unit S4), and vice versa. This scheme can be applied in a similar manner if the fault occurred in switching units S4, S2 and S3.

[0069] In FIG. 4, the situation is depicted that semiconductor switch S41 of switching unit S4 of leg 62 has a fault condition, such as being short-circuited. The information that one of the semiconductor switches has experienced a fault can be provided from gate driver 82 (see FIG. 1 ). When a fault condition of semiconductor switch S41 is detected, the controller 5 is configured to switch off all semiconductor switches S41 -S45 of switching unit S4. At the same time, the controller 5 provides control signals to gate drive 81 to the effect that the switching unit S1 is completely switched on, i.e., semiconductor switches S11 -S15 are switched on. This leads to the situation that a current from the DC power source 2 is guided through the semiconductor switches S1 1 -S15 of switching unit S1 and through semiconductor switch S41 of switching unit S4. As the current is concentrated on the faulty semiconductor switch S41 in switching unit S4, the faulty semiconductor switch S41 is burned. It is pointed out that in FIG. 4 for ease of depiction the controller 5 and the gate drivers 81 , 82 are not depicted. The same is true for the embodiments of FIGS. 5 and 6. Of course, these components are present just as described with respect to FIGS. 1 to 3.

[0070] In FIG. 5, the situation is depicted that semiconductor switch S21 of switching unit

[0071] 52 of leg 61 has a fault condition, such as being short-circuited. The information that one of the semiconductor switches has experienced a fault can be provided from gate driver

[0072] 81. When a fault condition of semiconductor switch S42 is detected, the controller 5 is configured to switch off all semiconductor switches S21 -S25 of switching unit S2. At the same time, the controller 5 provides control signals to gate drive 82 to the effect that the switching unit S3 is completely switched on, i.e., semiconductor switches S31 -S35 are switched on. This leads to the situation that a current is guided through semiconductor switches S31 -S35 of switching unit S3 and through semiconductor switch S21 of switching unit S2. As the current is concentrated on the faulty semiconductor switch S21 in switching unit S2, the faulty semiconductor switch S21 is burned.

[0073] While in principle the function of the system of FIG. 5 is the same as with the systems of FIGS. 3 and 4, in FIG. 5 an energized DC link is required, i.e., the load R in FIGS. 1 to 4 has been replaced by a further DC power source 20. In other words, the output voltage of the DC / DC converter needs to be excited to make the operation possible. However, the power source 20 may be a load as well, wherein a particular condition of the load is considered in which energy is provided into the power bus. For example, power source 20 may be an electric drive when acting as a generator (when converting mechanical energy back into electrical energy).

[0074] In FIG. 6, the situation is depicted that semiconductor switch S31 of switching unit

[0075] 53 of leg 62 has a fault condition, such as being short-circuited. The information that one of the semiconductor switches has experienced a fault can be provided from gate driver

[0076] 82. When fault condition of semiconductor switch S31 is detected, the controller 5 is configured to switch off all semiconductor switches S31 -S35 of switching unit S3. At the same time, the controller 5 provides control signals to gate drive 81 to the effect that the switching unit S2 is completely switched on, i.e., semiconductor switches S21 -S25 are switched on. This leads to the situation that a current from the DC power source 2 is guided through the faulty semiconductor switch S31 and through the semiconductor switches S21 - S25 of switching unit S2. As the current is concentrated on the faulty semiconductor switch S31 in switching unit S3, the faulty semiconductor switch S31 is burned.

[0077] In the same manner as in FIG. 5, in FIG. 6 an energized DC link is required, i.e., the load R in FIGS. 1 to 4 has been replaced by a further DC power source 20.

[0078] FIG. 7 is a flowchart of a method for servicing a DC power system, such as the DC power system of FIGS. 1 to 6. In step 701 , information is received or determined that one of the semiconductor switches of the switching units has a fault condition. In such case, in step 702, the semiconductor switches of the switching unit that comprises the faulty semiconductor are switched off. At the same time, according to step 703, the semiconductor switches of one of the switching units of the other leg are switched on. In consequence, according to step 704, a current is guided through the faulty semiconductor switch and the semiconductor switches of the switching unit of the other leg to remove the faulty semiconductor switch.

[0079] FIG. 8 regards an example of which switching units are chosen for guiding the current. According to step 801 , if the faulty semiconductor switch is from a top switching unit of one of the legs (such as of top switching unit S1 in FIG. 2 and of top switching unit S3 in FIG. 6), the semiconductor switches of the bottom switching unit of the other leg are switched on (such as bottom switching unit S4 in FIG. 3 and bottom switching unit S2 in FIG. 6).

[0080] On the other hand, if the faulty semiconductor switch is from a bottom switching unit of one of the legs (such as of bottom switching unit S4 in FIG. 4 and of bottom switching unit S2 in FIG. 5), the semiconductor switches of the top switching unit of the other leg are switched on such that a current flows to them (such as top switching unit S1 in FIG. 4 and top switching unit S3 in FIG. 5).

[0081] As discussed, it is initially determined that one of the semiconductor switches of the switching units has a fault condition, wherein the switching unit with the faulty semiconductor switch is determined. It is simple to make that determination if each semiconductor switch is associated with an individual gate driver: in such a situation, by knowing the gate driver which provides the respective error signal, the respective switching unit is also known. However, in embodiments such as the embodiments of FIGS. 1 to 6 where one common gate driver 81 , 82 is provided for all switching units of one leg, such determination is more complicated. FIG. 9 shows an example method to make such determination.

[0082] In step 901 , it is determined if an error signal is received from one of the common gate drivers, such as gate drivers 81 , 82 in FIGS. 1 to 7. In such case, initially all semiconductor switches of all switching units S1 -S4 are switched off, step 902. Subsequently, it is determined in step 903 the leg in which the faulty semiconductor switch is located by determining the common gate driver from which the signal has been received. After having identified the faulty leg in which the faulty semiconductor switch is located, next is applied in step 904 a high frequency pulse train to the semiconductor switches of the bottom switching unit of the other leg. It is then measured the current that flows through the top switching unit of the faulty leg. If the faulty semiconductor switch is in the top switching unit, a current will be measured (as the faulty semiconductor switch is short- circuited). In such case, the top switching unit of the faulty leg is chosen / determined to be the switching unit with the faulty semiconductor switch, step 905.

[0083] Otherwise, in step 906, a high frequency pulse train is applied to the semiconductor switches of the top switching unit of the other leg. It is then measured the current that flows through the bottom switching unit of the faulty leg. As the faulty semiconductor switch is not in the top switching unit of that leg (as has been determined in step 905), it can be expected that a current is now measured. If this is the case, in step 907 the bottom switching unit is chosen / determined to be the switching unit with the faulty semiconductor switch.

[0084] It is pointed out that such determination may be made in the reverse sequence alternatively, meaning that first a high frequency pulse train is applied to the semiconductor switches of the top switching unit of the other, not faulty leg.

[0085] It should be understood that the above description is intended for illustrative purposes only, and is not intended to limit the scope of the present disclosure in any way. Also, those skilled in the art will appreciate that other aspects of the disclosure can be obtained from a study of the drawings, the disclosure and the appended claims. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. Various features of the various embodiments disclosed herein can be combined in different combinations to create new embodiments within the scope of the present disclosure. In particular, the disclosure extends to and includes all combinations and sub-combinations of one or more features described herein. Any ranges given herein include any and all specific values within the range and any and all sub-ranges within the given range.

Claims

CLAIMS1 . A DC power system comprising: a power bus (31 , 32, 4) comprising an input positive voltage rail (31 ), an output positive voltage rail (32), and a negative voltage rail (4); a DC / DC converter (6) that comprises a plurality of switching units (S1 -S4), the switching units (S1 -S4) forming a first leg (61 ) and a second leg (62), wherein the first leg (61 ) comprises a top switching unit (S1 ) connected to the input positive voltage rail (31 ) and a bottom switching unit (S2) connected to the negative voltage rail (4), wherein the second leg (62) comprises a top switching unit (S3) connected to the output positive voltage rail (32) and a bottom switching unit (S4) connected to the negative voltage rail (4), and wherein the switching units (S1 -S4) each comprise a plurality of semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 -S45) arranged in parallel; and a controller (5) configured to receive information or determine that one of the semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 -S45) of the switching units (S1 -S4) has a fault condition; wherein, in such case, the controller (5) is further configured to control the switching units (S1 -S4) such that: the semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 -S45) of the switching unit (S1 -S4) that comprises the faulty semiconductor switch (S11 , S21 , S31 , S41 ) are switched off, and the semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 -S45) of one of the switching units (S1 - S4) of the other leg (61 , 62) that does not comprise the switching unit with the faulty semiconductor switch (S11 , S21 , S31 , S41 ) are switched on, wherein a current is guided through the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ) and the semiconductor switches (S11 -S15, S21 -S25, S31 -S35, S41 -S45) of the switching unit (S1 -S4) of the other leg (61 , 62) to remove the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ).

2. The system of claim 1 , wherein the controller (5) is configured to operate the semiconductor switches (S11 -S15, S21 -S25, S31 -S35, S41 -S45) of the switching unit (S1 -S4) of the other leg (61 , 62) such that a pre-determined continuous stream of pulses is applied when a fault condition is present.

3. The system of claim 1 or 2, wherein the current is provided through the faulty semiconductor switch (S11 , S21 , S31 , S41 ) such that the faulty semiconductor switch (S11 , S21 , S31 , S41 ) is burned.

4. The system of claim 1 or 2, wherein a series fuse (F11 , F21 , F31 , F41 ) is arranged in series with each of the semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 - S45), wherein the current is provided such that the series fuse (F11 , F21 , F31 , F41 ) associated with the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ) is burned in order to remove the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ).

5. The system of any preceding claim, wherein the semiconductor switches of each leg (61 , 62) of the DC / DC converter (6) are controlled by a common gate driver (81 , 82).

6. The system of any preceding claim, wherein: if the faulty semiconductor switch (S11 , S21 , S31 , S41 ) is from a top switching unit (S1 , S3) of one of the legs (61 , 62), the controller (5) is configured to control the semiconductor switches of the bottom switching unit (S2, S4) of the other leg (62, 61 ) to be switched on such that the current flows through them; and if the faulty semiconductor switch (S11 , S21 , S31 , S41 ) is from a bottom switching unit (S2, S4) of one of the legs (61 , 62), the controller (5) is configured to control the semiconductor switches of the top switching unit (S3, S5) of the other leg (62, 61 ) to be switched on such that the current flows through them.

7. The system of claim 6, wherein the controller (5) is configured to determine if one of the semiconductor switches has a fault condition in that it is configured to: determine if an error signal is received from one of the common gate drivers (81 , 82); in such case initially switch off all semiconductor switches of all switching units (S1 - S4); subsequently determine the leg (61 , 62) in which the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ) is located by determining the common gate driver (81 -83) from which the signal has been received; after having identified the faulty leg (61 , 62) in which the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ) is located, apply a high frequency pulse train to the semiconductor switches of the bottom (S2, S4) switching unit of the other leg (62, 61 ), and measure the current that flows through the top switching unit (S1 , S3) of the faulty leg (61 , 62); if a current flow is measured, choose the top switching unit (S1 , S3) to be the switching unit with the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ); otherwise, apply a high frequency pulse train to the semiconductor switches of the top switching unit (S3, S5) of the other leg (62, 61 ), and measure the current that flows through the bottom switching unit (S2, S4) of the faulty leg (61 , 62); andchoose the bottom switching unit (S2, S4) to be the switching unit with the faulty semiconductor switch (S11 , S21 , S31 , S41 ) if a current flow is measured; or apply this sequence in reverse order.

8. The system of any preceding claim, wherein the semiconductor switches (S11 -S15, S21 -S25, S31 -S35, S41 -S45, S51 -S55, S61 -S65) are MOSFET, IGBT, GaN or SiC transistors.

9. A method for servicing a DC power system in case of failure of a semiconductor switch, wherein the DC power system comprises: a power bus (31 , 32, 4) comprising an input positive voltage rail (31 ), an output positive voltage rail (32), and a negative voltage rail (4); and a DC / DC converter (6) that comprises a plurality of switching units (S1 -S4), the switching units (S1 -S4) forming a first leg (61 ) and a second leg (62), wherein the first leg (61 ) comprises a top switching unit (S1 ) connected to the input positive voltage rail (31 ) and a bottom switching unit (S2) connected to the negative voltage rail (4), wherein the second leg (62) comprises a top switching unit (S3) connected to the output positive voltage rail (32) and a bottom switching unit (S4) connected to the negative voltage rail (4), and wherein the switching units (S1 -S4) each comprise a plurality of semiconductor switches (S11 -S15, S21 -S25, S31 -S35, S41 -S45) arranged in parallel; the method comprising the steps of: receiving (701 ) information or determining that one of the semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 -S45) of the switching units (S1 -S4) has a fault condition; switching off (702) the semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 - S45) of the switching unit (S1 -S4) that comprises the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ); and switching on (703) the semiconductor switches (S1 1 -S15, S21 -S25, S31 -S35, S41 - S45) of one of the switching units (S1 -S4) of the other leg (61 , 62) that does not comprise the switching unit with the faulty semiconductor switch; thereby guiding (704) a current through the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ) and the semiconductor switches (S11 -S15, S21 -S25, S31 -S35, S41 -S45) of the switching unit (S1 -S4) of the other leg (61 , 62) to remove the faulty semiconductor switch (S11 , S21 , S31 , S41 ).

10. The method of claim 9, wherein the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ) or a series fuse (F11 , F21 , F31 , F41 ) arranged in series with the faulty semiconductor switch (S11 , S21 , S31 , S41 ) is burned by the current.11 . The method of claim 9 or 10, wherein the semiconductor switches (S11 -S15, S21 -S25, S31 -S35, S41 -S45) of the switching unit (S1 -S4) of the other leg (61 , 62) are operated by applying a pre-determined continuous stream of pulses when a fault condition is present.

12. The method of any one of claims 9 to 11 , wherein the method further comprises: if the faulty semiconductor switch (S11 , S21 , S31 , S41 ) is from a top switching unit (S1 , S3) of one of the legs (61 , 62), switching on (801 ) the semiconductor switches of the bottom switching unit (S2, S4) of the other leg (62, 61 ) such that the current flows through them; and if the faulty semiconductor switch (S11 , S21 , S31 , S41 ) is from a bottom switching unit (S2, S4) of one of the legs (61 , 62), switching on (802) the semiconductor switches of the top switching unit (S3, S5) of the other leg (62, 61 ) that the current flows through them.

13. The method of claim 12, wherein determining that one of the semiconductor switches of the switching units (S1 -S4) has a fault condition comprises: determine (901 ) if an error signal is received from one of the common gate drivers (81 , 82); in such case initially switch off (902) all semiconductor switches of all switching units (S1 -S4); subsequently determine (903) the leg (61 , 62) in which the faulty semiconductor switch (S11 , S21 , S31 , S41 ) is located by determining the common gate driver (81 -83) from which the signal has been received; after having identified the faulty leg (61 , 62) in which the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ) is located, apply (904) a high frequency pulse train to the semiconductor switches of the bottom (S2, S4) switching unit of the other leg (62, 61 ), and measure the current that flows through the top switching unit (S1 , S3) of the faulty leg (61 , 62); if a current flow is measured, choose (905) the top switching unit (S1 , S3) to be the switching unit with the faulty semiconductor switch (S1 1 , S21 , S31 , S41 ); otherwise, apply (906) a high frequency pulse train to the semiconductor switches of the top switching unit (S3, S5) of the other leg (62, 61 ), and measure the current that flows through the bottom switching unit (S2, S4) of the faulty leg (61 , 62); and choose (907) the bottom switching unit (S2, S4) to be the switching unit with the faulty semiconductor switch (S11 , S21 , S31 , S41 ) if a current flow is measured; or apply this sequence in reverse order.

Images