Control flow monitoring method, apparatus and device, and storage medium

Abstract

The present application relates to the technical field of data processing. Disclosed are a control flow monitoring method, apparatus and device, and a storage medium. The control flow monitoring method comprises: by means of a monitoring processor, receiving a data stream fed back by a main processor; on the basis of the data stream, performing a continuous operation check to obtain a continuous operation check result; on the basis of the data stream, performing a sequential execution check of control codes to obtain a code execution check result; on the basis of the data stream, performing a logical operation check to obtain a logical operation check result; and on the basis of the continuous operation check result, the code execution check result and the logical operation check result, determining the operating state of the main processor.

Description

Control flow monitoring method, device, equipment and storage medium Cross-reference to related applications

[0001] Embodiments of the present application are based on and claim priority from Chinese Patent Application No. 202410838080.1, filed on June 26, 2024, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of data processing, and in particular to a control flow monitoring method, device, equipment and storage medium. BACKGROUND

[0003] Major manufacturers pay more and more attention to the functional safety design of automobiles. The rise of automatic driving, the prevalence of software-defined automobiles, and more and more functions directly lead to the increase of system complexity, and the risks from system failure and random hardware failure are increasing. To avoid these risks, feasible requirements and processes are provided, and the ISO 26262 standard divides the safety requirement levels (Automotive Safety Integrity Level, ASIL) from A to D, among which ASIL D is the highest level and requires the most stringent safety requirements. However, the problems such as whether the processor is in a stall, whether the critical control logic is executed in the normal order, and whether the operation result of the logic operator is normal cannot be monitored centrally.

[0004] The above content is only used to assist in understanding the technical solutions of the present application and does not represent the acknowledgement of the above content as prior art. SUMMARY

[0005] The main purpose of the present application is to provide a control flow monitoring method, device, equipment and storage medium, aiming to solve the technical problem that multiple problems of the processor cannot be monitored simultaneously.

[0006] To achieve the above-mentioned purpose, the present application provides a control flow monitoring method, which comprises:

[0007] receiving a data stream fed back by a main processor through a monitoring processor;

[0008] performing continuous operation checking according to the data stream to obtain a continuous operation checking result;

[0009] performing sequential execution control code checking according to the data stream to obtain a code execution checking result;

[0010] performing logic operation checking according to the data stream to obtain a logic operation checking result;

[0011] Determine the working state of the main processor according to the continuous running check result, the code execution check result and the logic running check result.

[0012] In addition, to achieve the above object, the application further provides a control flow monitoring device, which comprises:

[0013] A data flow acquisition module is configured to receive a data flow fed back by the main processor through the monitoring processor.

[0014] A continuous running check module is configured to perform continuous running check according to the data flow, and obtain a continuous running check result.

[0015] A code execution check module is configured to perform sequential execution control code check according to the data flow, and obtain a code execution check result.

[0016] A logic running check module is configured to perform logic running check according to the data flow, and obtain a logic running check result.

[0017] A state judgment module is configured to determine the working state of the main processor according to the continuous running check result, the code execution check result and the logic running check result.

[0018] In addition, to achieve the above object, the application further provides a control flow monitoring device, which comprises a memory, a processor and a computer program stored in the memory and executable on the processor, and the computer program is configured to implement the steps of the control flow monitoring method as described above.

[0019] In addition, to achieve the above object, the application further provides a storage medium, which is a computer readable storage medium, and the storage medium stores a computer program, and the computer program is executable on a processor to implement the steps of the control flow monitoring method as described above.

[0020] In addition, to achieve the above object, the application further provides a computer program product, which comprises a computer program, and the computer program is executable on a processor to implement the steps of the control flow monitoring method as described above.

[0021] The one or more technical solutions provided by the application have at least the following technical effects:

[0022] The application receives a data stream fed back by a main processor through monitoring the processor; performs continuous running checking according to the data stream to obtain a continuous running checking result; performs sequential execution control code checking according to the data stream to obtain a code execution checking result; performs logic running checking according to the data stream to obtain a logic running checking result; and determines a working state of the main processor according to the continuous running checking result, the code execution checking result and the logic running checking result. In this way, it is realized to monitor whether the processor is in stall, whether the key control logic is executed in normal sequence, and whether the logic operation result is normal. The application is applied to a key control part of a car controller with high safety requirement. BRIEF DESCRIPTION OF DRAWINGS

[0023] The drawings incorporated in the specification and constituting a part of the specification illustrate embodiments consistent with the present application and, together with the specification, serve to explain the principles of the present application.

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced as follows. Obviously, those drawings can also provide other drawings based on these drawings without creative labor for those skilled in the art.

[0025] Fig. 1 is a flowchart provided by the control flow monitoring method according to an embodiment of the present application;

[0026] Fig. 2 is a structural diagram of the monitoring system according to the present application;

[0027] Fig. 3 is a flowchart provided by the control flow monitoring method according to an embodiment of the present application;

[0028] Fig. 4 is a flowchart provided by the control flow monitoring method according to an embodiment of the present application;

[0029] Fig. 5 is a module structure diagram of the control flow monitoring device according to an embodiment of the present application;

[0030] Fig. 6 is a device structure diagram of the hardware running environment involved in the control flow monitoring method according to an embodiment of the present application.

[0031] The object implementation, functional features and advantages of the present application will be further explained with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0032] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application, and are not used to limit the present application.

[0033] In order to better understand the technical solutions of the present application, the following will be described in detail with reference to the accompanying drawings and specific embodiments.

[0034] The main solution of the embodiment of the application is: receiving, by a monitoring processor, a data stream fed back by a main processor; performing continuous running checking according to the data stream to obtain a continuous running checking result; performing sequential execution control code checking according to the data stream to obtain a code execution checking result; performing logic running checking according to the data stream to obtain a logic running checking result; and determining a working state of the main processor according to the continuous running checking result, the code execution checking result and the logic running checking result.

[0035] In the embodiment, for convenience of description, the following is described by taking the monitoring processor as an execution subject.

[0036] As the existing technology of major host manufacturers pays more and more attention to the functional safety design of automobiles. The rise of automatic driving, software-defined automobiles becoming mainstream, and more and more functions directly lead to the improvement of system complexity, the risk from system failure and random hardware failure is increasing, to avoid these risks provides the feasibility requirements and processes, ISO 26262 standard divides the safety requirement level (Automotive Safety Integrity Level, ASIL) from A to D, among which ASIL D is the highest level and requires the most stringent safety requirements. However, whether the processor is stalled, whether the monitoring of the key control logic is executed in the normal order, and whether the operation result of the logic operator is normal cannot be monitored.

[0037] The application provides a solution, which realizes the simultaneous monitoring of whether the processor is stalled, whether the monitoring of the key control logic is executed in the normal order, and whether the operation result of the logic operator is normal. The application is applied to the key control part of the automobile controller with high safety requirements. The ISO 26262 standard divides the safety requirement level (Automotive Safety Integrity Level, ASIL) from A to D, among which ASIL D is the highest level and requires the most stringent safety requirements. For the key control part with high safety requirements, the application provides a control flow monitoring method and system for monitoring whether the processor is stalled, whether the monitoring of the key control logic is executed in the normal order, and whether the operation result of the logic operator is normal. The application is applied to the key control part of the automobile controller with high safety requirements.

[0038] It should be noted that the execution subject of the embodiment can be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device, a monitoring processor, etc. capable of realizing the above functions. The following takes the monitoring processor as an example to describe the embodiment and the following embodiments.

[0039] Based on this, the embodiment of the application provides a control flow monitoring method. Referring to FIG. 1, FIG. 1 is a flowchart of a first embodiment of the control flow monitoring method of the application.

[0040] In step S10, the monitoring processor receives the data stream fed back by the main processor.

[0041] It should be noted that the processor originally used in the automobile controller is called the main processor, and another processor independent of the main processor is used as the monitoring processor. The level output pin 1 (reset signal) of the monitoring processor is connected to the reset input pin of the main processor, for monitoring and outputting a signal to reset the main processor in time when an exception occurs. The main processor and the monitoring processor communicate through a communication interface, such as an SPI interface, a UART interface, etc. The level output pin 1 of the main processor and the level output pin 2 of the monitoring processor are both connected to the input interface of a logic AND circuit, and the output interface of the logic AND circuit is connected to the controlled object as an enable signal (enable) of the controlled object. The control signal (control) of the main processor is connected to the controlled object as a control signal (control) of the controlled object. The controlled object returns the enable and control status signals (control status) to the main processor. The overall system block diagram is shown in FIG. 2.

[0042] In the specific implementation, the following specific terms are used in the embodiment: AUTOSAR (Automotive Open System Architecture); IDE (Integrated Development Environment); ASIL (Automotive Safety Integrity Level); SPI (Serial Peripheral Interface); SWC (Software Component, a concept in AUTOSAR); and UART (Universal Asynchronous Receiver / Transmitter).

[0043] It should be understood that the control logic of the controlled object is enabled only when the control signal is true; the enable signal is false, and the controlled object is not working. The communication content between the main processor and the monitoring processor has three parts.

[0044] In step S20, a continuous running check is performed according to the data stream, and a continuous running check result is obtained.

[0045] In a specific implementation, in order to accurately perform the continuous running check, the watchdog function is used, that is, the watchdog is fed at a regular time. Specifically, the data stream fed back by the main processor during running is continuously received, and the data stream is verified, so that it can be determined whether the data of the watchdog fed back is normal, whether the time period is normal, and the like, thereby the continuous running check can be performed, and it can be verified whether the main processor continuously runs normally.

[0046] It should be noted that the watchdog (watchdog timer) is a timer circuit. Generally, there is an input called watchdog and an output to the RST end of the MCU. When the MCU normally works, a signal is output to the watchdog end every time interval, and the WDT is cleared. If the watchdog timer exceeds the specified time without being fed (usually when the program runs away), the watchdog timer will give a reset signal to the MCU, so that the MCU is reset to prevent the MCU from crashing. The function of the watchdog is to prevent the program from running in a dead loop or running away.

[0047] It should be understood that the working principle of the watchdog is that after the system runs, the watchdog counter is started, and the watchdog starts to count automatically. If the watchdog is not cleared within a certain time, the watchdog counter will overflow, causing a watchdog interrupt and causing the system to reset. Therefore, when using a chip with a watchdog, attention should be paid to clearing the watchdog.

[0048] In a specific implementation, the hardware watchdog is a timer that monitors the running of the main program, that is, the timer is reset before the timing time arrives during the running of the main program. If a dead loop occurs or the PC pointer cannot return, the single-chip microcomputer will be reset after the timing time arrives. The principle of the software watchdog technology is similar, but it is implemented by software. Taking the 51 series as an example, there are two timers in the 51 single-chip microcomputer for monitoring the running of the main program. We can set a certain timing time for T0, and assign a value to a variable when a timing interrupt occurs. The variable has an initial value at the beginning of the main program. The set timing value is less than the running time of the main program, and then the value of the variable is judged at the tail of the main program. If the value changes as expected, it means that the T0 interrupt is normal; if there is no change, the program is reset.

[0049] Step S30, according to the data flow sequential execution control code inspection, code execution inspection results;

[0050] It should be noted that the second part is the main processor sends key SWC execution information, is to monitor whether the main processor in order to execute the key control code. Execution information should include the need to monitor the SWC start execution, execution, execution complete and other necessary state signal, for example, need to monitor three key SWC, respectively, SWC1, SWC2, SWC3, so as to verify the three key SWC to carry out the key code and software component execution sequence verification.

[0051] Further, in order to accurately perform code execution inspection, step S30 includes: according to the data flow to determine the key software component execution information; the key software component execution information and the preset standard execution information comparison, get code execution inspection results.

[0052] It should be understood that the monitoring processor receives the key SWC execution information of the main processor and the preset correct key SWC execution information comparison, if the comparison result is consistent, it is considered that the key SWC execution sequence of the main processor meets the expectation; if the comparison result is inconsistent, it is considered that the key SWC execution sequence of the main processor does not meet the expectation.

[0053] Further, in order to accurately perform comparison and inspection, the step of comparing the key software component execution information with the preset standard execution information to obtain the code execution inspection result includes: determining the execution state signal information according to the key software component execution information; the execution state signal information and the preset standard execution information comparison, get code execution inspection results.

[0054] In specific implementation, execution information should include the need to monitor the SWC start execution, execution, execution complete and other necessary state signal, for example, need to monitor three key SWC, respectively, SWC1, SWC2, SWC3, define not executed as 0x00, start execution as 0x11, execution as 0x22, execution complete as 0x33.

[0055] It should be noted that the correct SWC execution sequence is SWC1, SWC2, SWC3 in turn and is executed in a loop, so the correct SWC execution information should be: 0x11 0x00 0x00 -> 0x22 0x00 0x00 -> 0x33 0x00 0x00 -> 0x00 0x11 0x00 -> 0x00 0x22 0x00 -> 0x00 0x33 0x00 -> 0x00 0x00 0x11 -> 0x00 0x00 0x22 -> 0x00 0x00 0x33, and the loop is repeated, and the corresponding SWC execution information sent by the main processor can be: "part 2: 0x11 0x00 0x00" -> "part 2: 0x22 0x00 0x00" -> "part 2: 0x33 0x00 0x00" -> "part 2: 0x00 0x11 0x00" -> "part 2: 0x00 0x22 0x00" -> "part 2: 0x00 0x33 0x00" -> "part 2: 0x00 0x00 0x11" -> "part 2: 0x00 0x00 0x22" -> "part 2: 0x00 0x00 0x33" and is sent in a loop, and the monitoring processor compares the key SWC execution information received from the main processor with the preset correct key SWC execution information, if the comparison result is consistent, it is considered that the key SWC execution sequence of the main processor meets the expectation; if the comparison result is inconsistent, it is considered that the key SWC execution sequence of the main processor does not meet the expectation.

[0056] In step S40, logical operation checking is performed according to the data stream, and a logical operation checking result is obtained.

[0057] It should be understood that the third part of the content is to realize the question and answer, and is to monitor whether the logical operation of the main processor is normal, specifically, the data interaction between the monitoring processor and the main processor is realized.

[0058] In step S50, the working state of the main processor is determined according to the continuous operation checking result, the code execution checking result and the logical operation checking result.

[0059] In specific implementation, in order to accurately determine the working state of the main processor, if any one of the above three parts of monitoring content judges that the working state of the main processor does not meet the expectation or is not normal, it is determined that the working state of the main processor is not normal.

[0060] Further, in order to accurately exclude faults, step S50 comprises: sending a reset signal to the main processor to reset when the working state of the main processor is abnormal; and contacting the reset signal when the working state of the main processor is normal.

[0061] It should be noted that, when the working state of the main processor is abnormal, a reset signal is output to reset the main processor and a low level is output to the logic AND circuit to disable the controlled object until the working state of the main processor is normal, and then the reset signal is output and a high level is output to the logic AND circuit to disable the controlled object.

[0062] The embodiment provides a control flow monitoring method, which comprises the following steps: receiving a data stream fed back by a main processor through a monitoring processor; performing continuous running checking according to the data stream to obtain a continuous running checking result; performing sequential execution control code checking according to the data stream to obtain a code execution checking result; performing logic running checking according to the data stream to obtain a logic running checking result; and determining a working state of the main processor according to the continuous running checking result, the code execution checking result and the logic running checking result. In this way, the processor whether to stop, the key control logic whether to be executed in a normal sequence, and the logic operation result whether to be normal can be monitored simultaneously. The method is applied to a key control part of a vehicle controller which has high safety requirements.

[0063] Based on the first embodiment, in the second embodiment, the same or similar contents as those in the first embodiment can be referred to the above description, and will not be described hereinafter. On this basis, referring to FIG. 3, step S20 comprises steps S201-S202.

[0064] Step S201: determining periodic timing data fed back by the main processor according to the data stream.

[0065] It should be noted that, first, the periodic timing data is determined, that is, the period of sending specific information (i.e., periodic feeding) when the main processor works (for example, 50 ms).

[0066] Step S202: performing continuous running checking according to the periodic timing data to obtain a continuous running checking result.

[0067] It should be understood that, after the periodic timing data is obtained, the continuous running checking of the main processor is performed, so as to determine whether an abnormality occurs.

[0068] Further, in order to accurately perform the continuous running detection, step S202 comprises: determining timer information and string content information according to the periodic timing data; and performing the continuous running check according to the timer information and the string content information to obtain a continuous running check result.

[0069] In a specific implementation, the main processor sends specific information (i.e., the timing dog feeding) at a timing (e.g., 50 ms) during operation, which can be a string content, for example, "part 1: feed a dog!", and a timer 1 is set in the monitoring processor. After power-on, the timer 1 is activated. When the specific information sent by the main processor is received, the timer is reset to 0 and starts timing again. If the timer is timed out (e.g., 100 ms), it is considered that the main processor is not operating normally.

[0070] In this embodiment, the periodic timing data fed back by the main processor is determined according to the data stream, and the continuous running check is performed according to the periodic timing data to obtain a continuous running check result. In this way, the continuous running of the main processor is checked based on the watchdog function, and whether the main processor is normally and continuously running is determined by verifying the period of the dog feeding and the string in the data.

[0071] Based on the first embodiment of the present application, in the third embodiment of the present application, the same or similar contents as the above embodiment one can be referred to the above description, and will not be described hereinafter. On this basis, please refer to FIG. 4, steps S40 steps S401~S402:

[0072] Step S401, according to the data stream to the main processor sends problem data;

[0073] It should be noted that the problem data refers to the data containing the operation problem sent to the main processor.

[0074] Further, in order to construct the problem data, step S401 comprises: extracting a target problem from a preset problem library; generating problem data according to the target problem; and sending the problem data to the main processor.

[0075] It should be understood that the preset problem library is first determined, which includes pre-stored problems, and the problems include arithmetic operation operations (addition, subtraction, multiplication, division, etc.), shift operations (left shift, right shift, etc.), table lookup operations, logical operation operations (and, or, not, exclusive or, etc.), and control flow operations (conditional branching, loop, etc.). The monitoring processor randomly takes out a problem in the problem library and sends it to the main processor.

[0076] Step S402, receiving the answer data fed back by the main processor, and performing a logical running check according to the answer data to obtain a logical running check result.

[0077] In a specific implementation, after sending the question data, the answer data fed back by the main processor is waited for and accepted, and the logical operation checking result is determined by verifying the answer data.

[0078] Further, in order to accurately perform the logical operation checking, step S402 comprises: determining question operation information according to the question data; determining a target corresponding answer according to the question operation information; comparing the target corresponding answer with the answer data to obtain a logical operation checking result.

[0079] It should be noted that, after the monitoring processor sends a question to the main processor, the main processor calculates a result and sends the result to the monitoring processor. After receiving the result, the monitoring processor compares the result with a preset result. If the result is consistent with the preset result, it is considered that the logical operation of the main processor is normal, and if the result is inconsistent with the preset result, it is considered that the logical operation of the main processor is abnormal. For example, taking C language as an example, the C language code of question 1 in the question library is as follows:

[0080] double Question1(unsigned char Param[])

[0081] {

[0082] unsigned char i=0;

[0083] double temp=0;

[0084] if(Param[0]==1)

[0085] temp = 1;

[0086] else

[0087] temp = 5;

[0088] for(i=0;i<Param[1];i++)

[0089] {

[0090] temp = temp + 1;

[0091] }

[0092] temp = temp + ((((Param[2]+Param[3]-Param[4])*Param[5] / Param[6])<<Param[7])>>Param[8]);

[0093] return temp;

[0094] }

[0095] The question information sent by the monitoring processor is as follows: "Question1 1 2 20 55 69 9 18 5 3", after receiving the information, the main processor indexes to the Question1 function in the preset question library, the function parameter array is assigned the content in the question information: "1 2 20 55 69 9 18 5 3", then the function double Question1(unsigned char Param[]) is called, the result of the calculation is sent to the monitoring processor, for example, the result of the calculation is 15, the reply information is sent as follows: "Answer Question1:15", after receiving the reply, the monitoring processor compares the result of the reply with the preset correct result, if consistent, it is considered that the logic operation of the main processor is normal, if not consistent, it is considered that the logic operation of the main processor is abnormal.

[0096] In the embodiment, the question data is sent to the main processor according to the data flow, the answer data fed back by the main processor is received, and the logic operation check is performed according to the answer data, so that the logic operation check result is obtained. In this way, the operation logic of the main processor is verified based on the random question and answer operation, and the accurate operation check is more intelligently realized.

[0097] It should be noted that the above examples are only used for understanding the present application, and do not constitute a limitation on the control flow monitoring method of the present application, and more forms of simple transformation based on the technical concept are within the protection scope of the present application.

[0098] The present application also provides a control flow monitoring device, please refer to Fig. 5, the control flow monitoring device comprises:

[0099] The data flow acquisition module 10 is used for receiving the data flow fed back by the main processor through the monitoring processor.

[0100] It should be noted that the processor originally used in the automobile controller is called a main processor, and another processor independent of the main processor is used as a monitoring processor. The level output pin 1 (reset signal) of the monitoring processor is connected to the reset input pin of the main processor, which is used to output a signal in time to reset the main processor when an exception is detected. The main processor and the monitoring processor communicate through a communication interface, such as an SPI interface, a UART interface, etc. The level output pin 1 of the main processor and the level output pin 2 of the monitoring processor are both connected to the input interface of the logic and circuit, and the output interface of the logic and circuit is connected to the controlled object as an enable signal (enable) of the controlled object. The control signal (control) of the main processor is connected to the controlled object as a control signal (control) of the controlled object. The controlled object returns the enable and control status signals (control status) to the main processor. The overall system block diagram is shown in FIG. 2.

[0101] In specific implementation, the specific terms in the embodiment are as follows: AUTOSAR (Automotive Open System Architecture); IDE (Integrated Development Environment); ASIL (Automotive Safety Integrity Level); SPI (Serial Peripheral Interface); SWC (Software Component, a concept in AUTOSAR); and UART (Universal Asynchronous Receiver / Transmitter).

[0102] It should be understood that the control logic of the controlled object responds to the control signal only when the enable signal is true; and the enable signal is false, and the controlled object does not work. There are three parts of communication content between the main processor and the monitoring processor.

[0103] The continuous operation checking module 20 is configured to perform continuous operation checking according to the data stream, and obtain a continuous operation checking result.

[0104] In specific implementation, in order to accurately perform continuous operation checking, the watchdog function is used, that is, the timing dog is fed. Specifically, the data stream fed back by the main processor during operation is continuously received, and the data stream is verified, so as to determine whether the data of the timing dog fed back is normal, whether the time period is normal, and the like, thereby performing continuous operation checking and verifying whether the continuous operation of the main processor is normal.

[0105] Need to explain, watchdog (watchdog timer) is a timer circuit. Generally have an input called feeding dog, an output to the MCU RST end. MCU normal work, every time output a signal to the feeding dog end, to WDT zero. If more than the specified time not feeding dog (usually in the program run fly), WDT timing more than, will give a reset signal to the MCU, so that the MCU reset, prevent the MCU crash. The role of watchdog is to prevent the program from running in a loop, or say program run fly.

[0106] It should be understood that the working principle of watchdog: after the system runs, the watchdog counter is started, and the watchdog starts to count automatically. If the watchdog is not cleared within a certain time, the watchdog counter will overflow, causing a watchdog interrupt and system reset. Therefore, when using a watchdog chip, you should pay attention to clearing the watchdog.

[0107] In specific implementation, hardware watchdog is to use a timer to monitor the running of the main program, that is, in the running process of the main program, the timer is reset before the timing time. If there is a dead loop or PC pointer can't come back, the timer will reset the single-chip microcomputer after the timing time. The principle of software watchdog technology is similar, but it is realized by software method. Still taking 51 series as an example, there are two timers in 51 single-chip microcomputer, which are used to monitor the running of the main program. We can set a certain timing time for T0, and assign a value to a variable when the timing interrupt occurs. The variable has an initial value at the beginning of the main program. The set timing value should be less than the running time of the main program, and then the value of the variable is judged at the tail of the main program. If the value changes as expected, it means that T0 interrupt is normal; if it does not change, the program is reset.

[0108] The code execution checking module 30 is configured to perform sequential execution control code checking according to the data flow, and obtain a code execution checking result.

[0109] It should be noted that the second part is the main processor sending key SWC execution information, which is to monitor whether the main processor executes the key control code in sequence. The execution information should include necessary state signals such as SWC start, execution, completion, etc. For example, three key SWCs, SWC1, SWC2 and SWC3, need to be monitored, so as to verify the execution sequence of the key code and software components of the three key SWCs.

[0110] Further, in order to accurately perform the code execution check, the step S30 comprises: determining critical software component execution information according to the data flow; comparing the critical software component execution information with preset standard execution information to obtain a code execution check result.

[0111] It should be understood that the monitoring processor receives the critical SWC execution information of the main processor and compares it with the preset correct critical SWC execution information, and if the comparison result is consistent, it is considered that the critical SWC execution sequence of the main processor is in line with the expectation; if the comparison result is inconsistent, it is considered that the critical SWC execution sequence of the main processor is not in line with the expectation.

[0112] Further, in order to accurately perform the comparison and check, the step of comparing the critical software component execution information with the preset standard execution information to obtain a code execution check result comprises: determining execution state signal information according to the critical software component execution information; comparing the execution state signal information with the preset standard execution information to obtain a code execution check result.

[0113] In a specific implementation, the execution information should include necessary state signals such as start of execution, execution in progress, and execution completion of the SWC to be monitored, for example, three critical SWCs need to be monitored, which are SWC1, SWC2, and SWC3, and the unexecuted is defined as 0x00, the start of execution is defined as 0x11, the execution in progress is defined as 0x22, and the execution completion is defined as 0x33.

[0114] It should be noted that the correct SWC execution sequence is SWC1, SWC2, SWC3 in turn and is executed in a loop, so the correct SWC execution information should be: 0x11 0x00 0x00 -> 0x22 0x00 0x00 -> 0x33 0x00 0x00 -> 0x00 0x11 0x00 -> 0x00 0x22 0x00 -> 0x00 0x33 0x00 -> 0x00 0x00 0x11 -> 0x00 0x00 0x22 -> 0x00 0x00 0x33, and the loop is repeated, and the corresponding SWC execution information sent by the main processor can be: "part 2: 0x11 0x00 0x00" -> "part 2: 0x22 0x00 0x00" -> "part 2: 0x33 0x00 0x00" -> "part 2: 0x00 0x11 0x00" -> "part 2: 0x00 0x22 0x00" -> "part 2: 0x00 0x33 0x00" -> "part 2: 0x00 0x00 0x11" -> "part 2: 0x00 0x00 0x22" -> "part 2: 0x00 0x00 0x33" and is sent in a loop, and the monitoring processor compares the key SWC execution information received from the main processor with the preset correct key SWC execution information, if the comparison result is consistent, it is considered that the key SWC execution sequence of the main processor meets the expectation, and if the comparison result is inconsistent, it is considered that the key SWC execution sequence of the main processor does not meet the expectation.

[0115] The logic running checking module 40 is configured to perform logic running checking according to the data flow, and obtain a logic running checking result.

[0116] It should be understood that the third part of the content is to realize the question and answer, and is to monitor whether the logic running of the main processor is normal, specifically, the data interaction between the monitoring processor and the main processor is realized.

[0117] The state determining module 50 is configured to determine the working state of the main processor according to the continuous running checking result, the code execution checking result and the logic running checking result.

[0118] In specific implementation, in order to accurately determine the working state of the main processor, if any one of the above three parts of monitoring content judges that the working state of the main processor does not meet the expectation or is not normal, it is determined that the working state of the main processor is not normal.

[0119] Further, in order to accurately exclude faults, step S50 comprises: sending a reset signal to the main processor to reset when the working state of the main processor is abnormal; and contacting the reset signal when the working state of the main processor is normal.

[0120] It should be noted that when the working state of the main processor is abnormal, a reset signal is output to reset the main processor and a low level is output to the logic AND circuit to disable the controlled object until the working state of the main processor is normal, and then the reset signal is output and a high level is output to the logic AND circuit to disable the controlled object.

[0121] In an embodiment, the continuous running checking module 20 is further configured to determine periodic timing data fed back by the main processor according to the data stream; and perform continuous running checking according to the periodic timing data to obtain a continuous running checking result.

[0122] In an embodiment, the continuous running checking module 20 is further configured to determine timer information and string content information according to the periodic timing data; and perform continuous running checking according to the timer information and the string content information to obtain a continuous running checking result.

[0123] In an embodiment, the code execution checking module 30 is further configured to determine key software component execution information according to the data stream; and compare the key software component execution information with preset standard execution information to obtain a code execution checking result.

[0124] In an embodiment, the code execution checking module 30 is further configured to determine execution state signal information according to the key software component execution information; and compare the execution state signal information with preset standard execution information to obtain a code execution checking result.

[0125] In an embodiment, the logic running checking module 40 is further configured to send question data to the main processor according to the data stream; receive answer data fed back by the main processor; and perform logic running checking according to the answer data to obtain a logic running checking result.

[0126] In an embodiment, the logic running checking module 40 is further configured to extract a target question from a preset question library; generate question data according to the target question; and send the question data to the main processor.

[0127] In an embodiment, the logic running checking module 40 is further configured to determine question operation information according to the question data; determine a target corresponding answer according to the question operation information; and compare the target corresponding answer with the answer data to obtain a logic running checking result.

[0128] In an embodiment, the state judging module 50 is further configured to send a reset signal to the main processor to reset when an abnormality occurs in the working state of the main processor, and to contact the reset signal when the working state of the main processor is monitored to be in a normal working condition.

[0129] The embodiment receives a data stream fed back by the main processor through the monitoring processor, performs continuous running checking according to the data stream to obtain a continuous running checking result, performs control code checking according to the data stream to obtain a code execution checking result, performs logic running checking according to the data stream to obtain a logic running checking result, and determines the working state of the main processor according to the continuous running checking result, the code execution checking result and the logic running checking result. In this way, the processor is monitored for stalling, the control logic is monitored for being executed in a normal sequence, and the logic operation result is monitored for being normal. The embodiment is applied to a control part of a vehicle controller which is critical and has high safety requirements.

[0130] The control flow monitoring device provided in the application adopts the control flow monitoring method in the above embodiments, and can solve the technical problem that multiple problems of a processor cannot be monitored simultaneously. Compared with the prior art, the control flow monitoring device provided in the application has the same beneficial effects as the control flow monitoring method provided in the above embodiments, and other technical features in the control flow monitoring device are the same as the features disclosed in the above embodiments, and thus will not be described herein.

[0131] The application provides a control flow monitoring device, which comprises at least one processor and a memory in communication connection with the at least one processor, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the control flow monitoring method in the above embodiment one.

[0132] Reference is now made to FIG. 6, which illustrates a structural diagram of a control flow monitoring device suitable for implementing embodiments of the present application. The control flow monitoring device in embodiments of the present application can include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDA (Personal Digital Assistant), PAD (Portable Application Description), PMP (Portable Media Player), car terminals (e.g., car navigation terminals), and the like, as well as fixed terminals such as digital TVs, desktop computers, and the like. The control flow monitoring device illustrated in FIG. 6 is merely an example and should not impose any limitation on the functions and use range of embodiments of the present application.

[0133] As shown in FIG. 6, the control flow monitoring device can include a processing device 1001 (e.g., a central processor, a graphic processor, and the like) that can perform various appropriate actions and processes according to programs stored in a ROM (Read Only Memory) 1002 or loaded from a storage device 1003 into a RAM (Random Access Memory) 1004. Various programs and data required for operation of the control flow monitoring device are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other through a bus 1005. An I / O (Input / Output) interface 1006 is also connected to the bus. In general, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, and the like; output devices 1008 including, for example, an LCD (Liquid Crystal Display), a speaker, a vibrator, and the like; the storage device 1003 including, for example, a magnetic tape, a hard disk, and the like; and a communication device 1009. The communication device 1009 can allow the control flow monitoring device to communicate with other devices wirelessly or by wire to exchange data. Although the control flow monitoring device having various systems is illustrated in the figure, it should be understood that all of the illustrated systems are not required to be implemented or provided. More or less systems can be alternatively implemented or provided.

[0134] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product comprising a computer program carried on a computer readable medium, the computer program containing program codes for executing the method shown in the flowchart. In such embodiments, the computer program can be downloaded and installed from a network through a communication device, or installed from the storage device 1003, or installed from the ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiments disclosed in the present application are executed.

[0135] The control flow monitoring device provided in the present application adopts the control flow monitoring method in the above-mentioned embodiments, and can solve the technical problem that multiple problems of the processor cannot be monitored simultaneously. Compared with the prior art, the control flow monitoring device provided in the present application has the same beneficial effects as the control flow monitoring method provided in the above-mentioned embodiments, and other technical features in the control flow monitoring device are the same as the features disclosed in the above-mentioned embodiments, and will not be described here.

[0136] It should be understood that various parts of the present application can be realized by hardware, software, firmware or a combination thereof. In the description of the above-mentioned embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0137] The above is merely specific embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

[0138] The present application provides a computer readable storage medium having stored thereon computer readable program instructions (i.e. computer program) for executing the control flow monitoring method in the above-mentioned embodiments.

[0139] The computer readable storage medium provided in the application may, for example, be a U disk, but is not limited to an electric, magnetic, optical, electromagnetic, infrared, or semiconductor system, system, or device, or any combination of the above. More specific examples of the computer readable storage medium may include, but are not limited to, an electric connection with one or more conductive wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the embodiment, the computer readable storage medium may be any tangible medium containing or storing a program, which can be used by or in combination with an instruction execution system, system, or device. The program code contained on the computer readable storage medium can be transmitted by any suitable medium, including but not limited to an electric wire, an optical cable, an RF (Radio Frequency), and the like, or any suitable combination of the above.

[0140] The computer readable storage medium described above may be contained in the control flow monitoring device, or may exist separately without being assembled into the control flow monitoring device.

[0141] The computer readable storage medium described above carries one or more programs, which, when executed by the control flow monitoring device, cause the control flow monitoring device to: receive a data stream fed back by a host processor through monitoring of the processor; perform a continuous running check according to the data stream to obtain a continuous running check result; perform a sequential execution control code check according to the data stream to obtain a code execution check result; perform a logic running check according to the data stream to obtain a logic running check result; and determine a working state of the host processor according to the continuous running check result, the code execution check result, and the logic running check result.

[0142] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).

[0143] The flow diagrams and the block diagrams in the drawings are illustrations of architectures, functionalities, and operations of possible implementations of systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a segment, or a portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks may

[0144] The modules involved in the embodiments of the present application can be implemented in the form of software or in the form of hardware. In some cases, the name of the module does not constitute a limitation on the module itself.

[0145] The readable storage medium provided by the present application is a computer readable storage medium, which stores computer readable program instructions (i.e., computer programs) for executing the above control flow monitoring method, and can solve the technical problem that multiple problems of a processor cannot be monitored simultaneously. Compared with the prior art, the computer readable storage medium provided by the present application has the same beneficial effects as the control flow monitoring method provided by the above embodiments, which will not be described here.

[0146] The application further provides a computer program product comprising a computer program which, when executed by a processor, implements the steps of the control flow monitoring method as described above.

[0147] The computer program product provided by the application can solve the technical problem that multiple problems of a processor cannot be monitored simultaneously. Compared with the prior art, the computer program product provided by the application has the same beneficial effects as the control flow monitoring method provided by the above-described embodiments, and thus will not be described herein.

[0148] The above only describes some embodiments of the application, and does not limit the patent scope of the application. Any equivalent structural transformation, direct / indirect application in other related technical fields, or the like made by using the content of the application specification and drawings is included in the patent protection scope of the application.

Claims

1. A control flow monitoring method, applied in an electronic device, the method comprising: The monitoring processor receives the data stream fed back by the main processor. Perform continuous operation checks based on the data stream to obtain continuous operation check results; Based on the data stream, sequential execution control code checks are performed to obtain code execution check results; Perform a logical operation check based on the data stream to obtain the logical operation check result; The operating state of the main processor is determined based on the results of the continuous operation check, the code execution check, and the logic operation check.

2. The method as described in claim 1, wherein, The step of performing continuous operation checks based on the data stream and obtaining the continuous operation check results includes: The periodic timing data fed back by the main processor is determined based on the data stream; A continuous operation check is performed based on the periodic timing data to obtain the continuous operation check results.

3. The method as described in claim 2, wherein, The step of performing continuous operation checks based on the periodic timing data and obtaining the continuous operation check results includes: The timer information and string content information are determined based on the periodic timing data; A continuous operation check is performed based on the timer information and the string content information to obtain the continuous operation check result.

4. The method of claim 1, wherein, The step of performing sequential execution control code checks based on the data stream to obtain code execution check results includes: The execution information of key software components is determined based on the data stream; The execution information of the key software components is compared with the preset standard execution information to obtain the code execution check results.

5. The method of claim 4, wherein, The step of comparing the execution information of the key software components with preset standard execution information to obtain the code execution check result includes: The execution status signal information is determined based on the execution information of the key software components; The execution status signal information is compared with the preset standard execution information to obtain the code execution check result.

6. The method of claim 1, wherein, The step of performing a logical operation check based on the data stream to obtain the logical operation check result includes: Problem data is sent to the main processor according to the data stream; The system receives the answer data fed back by the main processor, performs a logic operation check based on the answer data, and obtains the logic operation check result.

7. The method of claim 6, wherein, The step of sending problem data to the main processor according to the data stream includes: Extract target questions from a pre-set question bank; Generate problem data based on the target problem; The problem data is sent to the main processor.

8. The method of claim 6, wherein, The step of performing a logical operation check based on the answer data to obtain the logical operation check result includes: Determine the problem operation information based on the problem data; Determine the answer corresponding to the target based on the question operation information; The answer corresponding to the target is compared with the answer data to obtain the logic operation check result.

9. The method of claim 1, wherein, Following the step of determining the operating state of the main processor based on the continuous operation check result, the code execution check result, and the logic operation check result, the method further includes: When the main processor malfunctions, a reset signal is sent to the main processor to perform a reset. The reset signal is activated when the main processor is found to be operating under normal conditions.

10. A control flow monitoring device, the device comprising: The data stream acquisition module is used to receive the data stream fed back by the main processor through the monitoring processor; The continuous operation check module is used to perform continuous operation checks based on the data stream and obtain continuous operation check results. The code execution inspection module is used to perform sequential execution control code inspection based on the data stream and obtain the code execution inspection result. The logic operation check module is used to perform a logic operation check based on the data stream and obtain the logic operation check result. The status determination module is used to determine the working status of the main processor based on the continuous operation check results, the code execution check results, and the logic operation check results.

11. A control flow monitoring device, the device comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the control flow monitoring method as described in any one of claims 1 to 9.

12. A storage medium, said storage medium being a computer-readable storage medium, said storage medium storing a computer program, said computer program, when executed by a processor, implementing the steps of the control flow monitoring method as described in any one of claims 1 to 9.

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