Scanning deflector design for a charged particle beam apparatus

Abstract

A system and method for operating an electron deflector in a scanning electron microscope comprises operating the electron deflector in two different modes of operation. In a first mode of operation, a control circuit may comprise an amplifier stage configured as a transimpedance amplifier. The first mode of operation may be used for performing relatively higher scanning speeds with relatively lower spatial resolution. In a second mode of operation, the amplifier stage may be configured as an integrator amplifier. The second mode of operation may be used for performing relatively lower scanning speeds with relatively higher spatial resolution.

Description

SCANNING DEFLECTOR DESIGN FOR A CHARGED PARTICLE BEAM APPARATUSCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63 / 665,984 which was filed on June 28, 2024 and which is incorporated herein in its entirety by reference.FIELD

[0002] The description herein relates to charged particle beam systems, and more particularly, to systems and methods for controlling a charged particle beam deflector.BACKGROUND

[0003] Charged particle beam tools, such as scanning electron microscopes (SEMs), may be used to capture nano-scale images of a sample, such as a semiconductor wafer. For example, the SEM may be used to scan an electron beam across the wafer while detecting the electrons that are emitted from it, thus taking a pixel-by -pixel image of the wafer surface as it scans. The scanning action of the beam may be controlled by a deflector having multiple deflection electrodes. By controlling the voltages applied to each deflection electrode, the precise location of the electron beam on the wafer surface can be controlled.

[0004] With continuing miniaturization of semiconductor devices, performance demands for SEMs and other charged particle beam systems may continue to increase. To achieve inspection images with finer image resolution, it may be necessary to improve the control of the deflection electrodes.SUMMARY

[0005] Embodiments of the present disclosure provide systems and methods for controlling a charged particle beam deflector. Some embodiments of the present disclosure provide a charged particle beam deflector control circuit. The charged particle beam deflector control circuit may comprise: a first digital to analog converter (DAC) configured to drive a first output of the first DAC; a first amplifier configured to receive the first output of the first DAC and drive a first output of the first amplifier; a first capacitor connected between the first output of the first DAC and the first output of the first amplifier; a first switch, wherein a first side of the first switch is connected to the first output of the first DAC; and a first resistor connected between a second side of the first switch and the first output of the first amplifier. The charged particle beam deflector control circuit may be configured to operate a first deflection electrode in a first mode when the first switch is closed and a second mode when the first switch is open.

[0006] Some embodiments of the present disclosure provide charged particle beam apparatus. The charged particle beam apparatus may comprise: a charged particle beam source configured to generate a charged particle beam; a charged particle optical system configured to direct the charged particlebeam at a surface, the charged particle optical system comprising a deflector configured to deflect the charged particle beam to different locations within a field of view of the charged particle beam apparatus; and a controller comprising one or more processors and configured to cause the charged particle beam apparatus to perform operations. The operations may comprise: controlling the deflector to deflect the beam in a first mode having a first spatial resolution; and controlling the deflector to deflect the beam in a second mode having a second spatial resolution that is higher than the first spatial resolution.

[0007] Some embodiments of the present disclosure provide a non-transitory computer-readable medium. The non-transitory computer-readable medium may store a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations. The operations may comprise: generating a charged particle beam by a charged particle beam source of a charged particle beam apparatus; directing the charged particle beam at a surface by a charged particle optical system of the charged particle beam apparatus, the charged particle optical system comprising a deflector configured to deflect the charged particle beam to different locations within a field of view of the charged particle beam apparatus; controlling the deflector to deflect the beam in a first mode having a first spatial resolution; and controlling the deflector to deflect the beam in a second mode having a second spatial resolution that is higher than the first spatial resolution.BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The above and other aspects of the present disclosure will become more apparent from the description of exemplary embodiments, taken in conjunction with the accompanying drawings.

[0009] Fig. 1 is a diagrammatic representation of an exemplary electron beam inspection (EBI) system, consistent with embodiments of the present disclosure.

[0010] Figs. 2A-B are diagrams illustrating charged particle beam apparatus that may be examples of an electron beam tool, consistent with embodiments of the present disclosure.

[0011] Figs. 3A-B are diagrammatic representations of exemplary structures of a charged particle beam deflector, according to a comparative embodiment.

[0012] Figs. 4A-B are diagrammatic representations of exemplary structures of a charged particle beam deflector, consistent with embodiments of the present disclosure.

[0013] Figs. 5A-B are diagrammatic representations of exemplary structures of a charged particle beam deflector, consistent with embodiments of the present disclosure.

[0014] Fig. 6 is a diagrammatic representation of an exemplary structure of a charged particle beam deflector, consistent with embodiments of the present disclosure.

[0015] Fig. 7 is a diagrammatic representation of exemplary scanning operations in a field of view of a charged particle beam apparatus, consistent with embodiments of the present disclosure.

[0016] Fig. 8 illustrates a flowchart of an example method of scanning a sample in a charged particle beam process, consistent with embodiments of the present disclosure.

[0017] Fig. 9 illustrates a flowchart of an example method of scanning a sample in a charged particle beam process, consistent with embodiments of the present disclosure.DETAILED DESCRIPTION

[0018] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the invention. Instead, they are merely examples of apparatuses, systems, and methods consistent with aspects related to subject matter that may be recited in the appended claims. For example, although some embodiments are described in the context of utilizing charged-particle beams (e.g., electron beams), the disclosure is not so limited. Other types of charged particle beams (e.g., proton beams) may be similarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photodetection, x-ray detection, or the like.

[0019] Electronic devices are constructed of circuits formed on a piece of silicon called a substrate. Many circuits may be formed together on the same piece of silicon and are called integrated circuits or ICs. With advancements in technology, the size of these circuits has decreased dramatically so that many more of them can fit on the substrate. For example, an IC chip in a smart phone can be as small as a fingernail and yet may include over 2 billion transistors, the size of each transistor being less than 1 / 1, 000th the width of a human hair.

[0020] Making these ICs with extremely small structures or components is a complex, timeconsuming, and expensive process, often involving hundreds of individual steps. Errors in even one step have the potential to result in defects in the finished IC, rendering it useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs made in the process, that is, to improve the overall yield of the process.

[0021] One component of improving yield is monitoring the chip making process to ensure that it is producing a sufficient number of functional integrated circuits. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection can be carried out using a scanning charged-particle microscope, such as a scanning electron microscope (SEM). A SEM can be used to image these extremely small structures, in effect, taking a “picture” of the structures. The image can be used to determine if the structure was formed properly, and also if it was formed in the proper location. If the structure is defective, then the process can be adjusted so the defect is less likely to recur. To enhance throughput (e.g., the number of samples processed per hour), it is desirable to conduct inspection as quickly as possible.

[0022] The working principle of a SEM is similar to a camera. A camera takes a picture by receiving and recording intensity of light reflected or emitted from people or objects, pixel by pixel. The number of image pixels per unit area in an image may be referred to as the spatial resolution of theimage, such that a higher pixel density corresponds to a higher spatial resolution A SEM takes a “picture” by receiving and recording energies or quantities of electrons reflected or emitted from the structures of the wafer. Before taking such a “picture,” an electron beam may be projected onto the structures, and when the electrons are reflected or emitted (“exiting”) from the structures (e.g., from the wafer surface, from the structures underneath the wafer surface, or both), a detector of the SEM may receive and record the energies or quantities of those electrons to generate an inspection image. To take such a “picture,” the electron beam may scan through the wafer (e.g., in a line-by-line or zigzag manner), and the detector may receive exiting electrons coming from a region under electronbeam projection (referred to as a “beam spot”). The detector may receive and record exiting electrons from each beam spot one at a time and join the information recorded for all the beam spots to generate the inspection image. Some SEMs use a single electron beam (referred to as a “single-beam SEM”) to take a single “picture” to generate the inspection image, while some SEMs use multiple electron beams (referred to as a “multi-beam SEM”) to take multiple “sub-pictures” of the wafer in parallel and, in some instances, stitch them together to generate the inspection image. By using multiple electron beams, the SEM may provide more electron beams onto the structures for obtaining these multiple “sub-pictures,” resulting in more electrons exiting from the structures. Accordingly, the detector may receive more exiting electrons simultaneously and generate inspection images of the structures of the wafer with higher efficiency and faster speed.

[0023] In some inspection processes, such as critical dimension (CD) metrology, a charged particle image may be used to measure widths of the smallest features printed on the sample to determine how well the printed pattern meets design specifications. For instance, an electron beam may be scanned across the surface topography of the pattern, such as a set of repeating lines and spaces, taking pixel- by-pixel intensity measurements as it goes. Each line may have a substantially flat, raised upper surface. The lower spaces between each line may also be relatively flat, while the transition between line and space may comprise a sharp vertical line edge. In the electron beam image, the pixel intensities at these edge transitions may contrast sharply with the flat regions around them, providing a means of measuring the widths of these features.

[0024] To ensure high-quality imaging, the electron beam placement must be precisely controlled by electron optics including a deflector. The deflector may comprise electrodes that, depending on an applied voltage, may generate electric fields to attract or repel the electron beam as it passes by, thus bending the beam path. This path-bending may be used to, e.g., scan the beam across an entire region of the sample within the SEM field of view, or to skip the beam around the field of view to target specific locations. Thus the finest achievable image resolution of the SEM images depends in part on how finely the beam placement can be controlled on the wafer surface. This in turn depends on how finely the voltage values at the electrodes can be controlled.

[0025] For example, using round numbers for the sake of illustration, if an electrode can only be set to either voltage value 1 or voltage value 5, then it may only be capable of deflecting the beam by twoamounts, and the beam spot cannot be placed at a location between these two deflection amounts. For example, voltage 1 may deflect the beam to point A, and voltage 5 may deflect the beam to point E. However, if the voltage can be controlled to finer levels in between 1 and 5, then the beam can be moved in finer increments between points A and E. For example, voltage levels of 1, 2, 3, 4, 5 may place the beam spot at points A, B, C, D, E, leading to finer image pixels. The smallest incremental distance over which a charged particle beam apparatus may move a beam spot along the sample may determine the number of image pixels that can be generated per unit area, which may affect the spatial resolution of the charged particle beam apparatus. The spatial resolution of a charged particle beam apparatus may refer to the number of distinct points at which a beam spot may be placed within a given area. This is analogous to the spatial resolution of an image generated by the charged particle beam apparatus, which may refer to the number of image pixels per unit area as discussed above.

[0026] A problem occurs in that a control circuit for a deflector may only be capable of applying a limited number of distinct voltage levels within a given range. For example, the control circuit may include a digital-to-analog converter (DAC) that receives a digital control signal and outputs an electric current. The current may be converted into voltage and then amplified to provide the desired voltage level at a deflection electrode. But existing DACs may not have a sufficient bit resolution, i.e., they may not be capable of outputting the electric current at fine enough levels. And they may suffer from poor linearity, such that the difference between each successive current level may not be uniform. As the number of pixels in a field of view increases, the accuracy of the current DAC / amplifier combination may be insufficient, primarily due to the bit resolution limit of the DAC. As the number of pixels grows in future products due to, e.g., higher resolution requirements at similar field of view sizes, or due to the need for a larger field of view to increase inspection throughput, a deflector may require control at a greater resolution than what current DACs can support.

[0027] Embodiments of the present disclosure provide systems and methods for overcoming the limitations of DACs in a deflector control circuit. The deflector control circuit may be configured to switch between two modes of operation. A first mode may be configured to prioritize, e.g., beam deflection speed, and a second mode may be configured to prioritize, e.g., spatial resolution. The first mode may be referred to as a transimpedance amplifier (TIA) mode, and it may operate similarly to the control circuit discussed above. The voltage value produced at the deflection electrode may be based on the present output current of the DAC. In this way, every time a new current level is output from the DAC, the electrode voltage is changed according to the new current level and is independent of the previous current level occurring immediately before the present current level. The second mode may be described as an integration mode. In the integration mode, whenever current is output from the DAC, voltage may instead be added to (or subtracted from) the previous value. Therefore, in the integration mode, the DAC may be used as a “dial” to move the existing electrode voltage incrementally up or down. Although changing the electrode voltage in this mode may be slower thanthe TIA mode, it is capable of much finer control of the voltage value. This allows the DAC to output a greater bit resolution than what current DACs can support, and meet the higher resolution requirements of cutting edge inspection tools.

[0028] As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component includes A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component includes A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0029] Reference is now made to Fig. 1, which illustrates an exemplary electron beam inspection (EBI) system 10 that may be used for wafer inspection, consistent with embodiments of the present disclosure. As shown in Fig. 1, EBI system 10 includes a main chamber Il a load / lock chamber 20, an electron beam tool 100 (e.g., a scanning electron microscope (SEM)), and an equipment front end module (EFEM) 30. Electron beam tool 100 is located within main chamber 11 and may be used for imaging. EFEM 30 includes a first loading port 30a and a second loading port 30b. EFEM 30 may include additional loading ports. First loading port 30a and second loading port 30b receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other materials) or samples to be inspected (wafers and samples may be collectively referred to as “wafers” herein).

[0030] One or more robotic arms (not shown) in EFEM 30 may transport the wafers to load / lock chamber 20. Load / lock chamber 20 is connected to a load / lock vacuum pump system (not shown) which removes gas molecules in load / lock chamber 20 to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load / lock chamber 20 to main chamber 11. Main chamber 11 is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber 11 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by electron beam tool 100. Electron beam tool 100 may be a single-beam system or a multi-beam system. A controller 109 is electronically connected to electron beam tool 100, and may be electronically connected to other components as well. Controller 109 may be a computer configured to execute various controls of EBI system 10. While controller 109 is shown in Fig. 1 as being outside of the structure that includes main chamber 11, load / lock chamber 20, and EFEM 30, it is appreciated that controller 109 can be part of the structure.

[0031] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a generic or specific electronic device capable of manipulating or processing information. For example, the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controllers, a microcontroller, a microprocessor, a digital signal processor, anintellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field- Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network.

[0032] In some embodiments, controller 109 may further include one or more memories (not shown). A memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device. The codes and data may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks. The memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network.

[0033] A charged particle beam microscope, such as that formed by or which may be included in EBI system 10, may be capable of resolution down to, e.g., the nanometer scale, and may serve as a practical tool for inspecting IC components on wafers. With an e-beam system, electrons of a primary electron beam may be focused at probe spots on a wafer under inspection. The interactions of the primary electrons with the wafer may result in secondary particle beams being formed. The secondary particle beams may comprise backscattered electrons, secondary electrons, or Auger electrons, etc. resulting from the interactions of the primary electrons with the wafer. Characteristics of the secondary particle beams (e.g., intensity) may vary based on the properties of the internal or external structures or materials of the wafer, and thus may indicate whether the wafer includes defects.

[0034] The intensity of the secondary particle beams may be determined using a detector. The secondary particle beams may form beam spots on a surface of the detector. The detector may generate electrical signals (e.g., a current, a charge, a voltage, etc.) that represent intensity of the detected secondary particle beams. The electrical signals may be measured with measurement circuitries which may include further components (e.g., analog-to-digital converters) to obtain a distribution of the detected electrons. The electron distribution data collected during a detection time window, in combination with corresponding scan path data of the primary electron beam incident on the wafer surface, may be used to reconstruct images of the wafer structures or materials under inspection. The reconstructed images may be used to reveal various features of the internal or external structures or materials of the wafer and may be used to reveal defects that may exist in the wafer. There are two ways for CD-SEM to perform image reconstruction based on the signal: based on amplitude integral of the signal in each scanning pixel; or based on signal pulse edge detection and discrimination. At each scanned pixel location, multiple electrical signal pulses collected by differentdetector segments may have different pulse shapes. These various pulse shapes contain information about the electron energy distribution collected by the detector. Electrons with higher energy can cause faster rising times in the electrical pulse shape. With multiple segments of the detector (4 channels), up to 4 pulse edge detection image channels can be used to perform electron energy analysis, yielding higher SEM resolution.

[0035] Fig. 2A illustrates a charged particle beam apparatus that may be an example of electron beam tool 100, consistent with embodiments of the present disclosure. Fig. 2A shows an apparatus that uses a plurality of beamlets formed from a primary electron beam to simultaneously scan multiple locations on a wafer.

[0036] As shown in Fig. 2A, electron beam tool 200A may comprise an electron source 202, a gun aperture 204, a condenser lens 206, a primary electron beam 210 emitted from electron source 202, a source conversion unit 212, a plurality of beamlets 214, 216, and 218 of primary electron beam 210, a primary projection optical system 220, a wafer stage (not shown in Fig. 2A), multiple secondary electron beams 236, 238, and 240, a secondary optical system 242, and electron detection device 244. Electron source 202 may generate primary particles, such as electrons of primary electron beam 210. A controller, image processing system, and the like may be coupled to electron detection device 244. Primary projection optical system 220 may comprise beam separator 222, deflection scanning unit 226, and objective lens 228. Electron detection device 244 may comprise detection sub-regions 246, 248, and 250.

[0037] Electron source 202, gun aperture 204, condenser lens 206, source conversion unit 212, beam separator 222, deflection scanning unit 226, and objective lens 228 may be aligned with a primary optical axis 260 of electron beam tool 200A. Secondary optical system 242 and electron detection device 244 may be aligned with a secondary optical axis 252 of electron beam tool 200 A.

[0038] Electron source 202 may comprise a cathode, an extractor or an anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form a primary electron beam 210 with a crossover (virtual or real) 208. Primary electron beam 210 can be visualized as being emitted from crossover 208. Gun aperture 204 may block off peripheral electrons of primary electron beam 210 to reduce size of probe spots 270, 272, and 274.

[0039] Source conversion unit 212 may comprise an array of image-forming elements (not shown in Fig. 2A) and an array of beam-limit apertures (not shown in Fig. 2A). An example of source conversion unit 212 may be found in U.S. Patent No 9,691,586; U.S. Publication No. 2017 / 0025243; and International Application No. PCT / EP2017 / 084429, all of which are incorporated by reference in their entireties. The array of image-forming elements may comprise an array of micro-deflectors or micro-lenses. The array of image-forming elements may form a plurality of parallel images (virtual or real) of crossover 208 with a plurality of beamlets 214, 216, and 218 of primary electron beam 210. The array of beam-limit apertures may limit the plurality of beamlets 214, 216, and 218.

[0040] Condenser lens 206 may focus primary electron beam 210. The electric currents of beamlets 214, 216, and 218 downstream of source conversion unit 212 may be varied by adjusting the focusing power of condenser lens 206 or by changing the radial sizes of the corresponding beam-limit apertures within the array of beam-limit apertures. Condenser lens 206 may be an adjustable condenser lens that may be configured so that the position of its first principle plane is movable. The adjustable condenser lens may be configured to be magnetic, which may result in off-axis beamlets 216 and 218 landing on the beamlet-limit apertures with rotation angles. The rotation angles change with the focusing power and the position of the first principal plane of the adjustable condenser lens. In some embodiments, the adjustable condenser lens may be an adjustable anti-rotation condenser lens, which involves an anti-rotation lens with a movable first principal plane. An example of an adjustable condenser lens is further described in U.S. Publication No. 2017 / 0025241, which is incorporated by reference in its entirety.

[0041] Objective lens 228 may focus beamlets 214, 216, and 218 onto a wafer 230 for inspection and may form a plurality of probe spots 270, 272, and 274 on the surface of wafer 230. Secondary electron beamlets 236, 238, and 240 may be formed that are emitted from wafer 230 and travel back toward beam separator 222.

[0042] Beam separator 222 may be a beam separator of Wien filter type generating an electrostatic dipole field and a magnetic dipole field. In some embodiments, if they are applied, the force exerted by electrostatic dipole field on an electron of beamlets 214, 216, and 218 may be equal in magnitude and opposite in direction to the force exerted on the electron by magnetic dipole field. Beamlets 214, 216, and 218 can therefore pass straight through beam separator 222 with zero deflection angle. However, the total dispersion of beamlets 214, 216, and 218 generated by beam separator 222 may also be non-zero. Beam separator 222 may separate secondary electron beams 236, 238, and 240 from beamlets 214, 216, and 218 and direct secondary electron beams 236, 238, and 240 towards secondary optical system 242.

[0043] Deflection scanning unit 226 may deflect beamlets 214, 216, and 218 to scan probe spots 270, 272, and 274 over an area on a surface of wafer 230. In response to incidence of beamlets 214, 216, and 218 at probe spots 270, 272, and 274, secondary electron beams 236, 238, and 240 may be emitted from wafer 230. Secondary electron beams 236, 238, and 240 may comprise electrons with a distribution of energies including secondary electrons and backscattered electrons. Secondary optical system 242 may focus secondary electron beams 236, 238, and 240 onto detection sub-regions 246, 248, and 250 of electron detection device 244. Detection sub-regions 246, 248, and 250 may be configured to detect corresponding secondary electron beams 236, 238, and 240 and generate corresponding signals used to reconstruct an image of the surface of wafer 230.

[0044] The generated signals may represent intensities of secondary electron beams 236, 238, and 240 and may be provided to an image processing system (e.g. such as image processing system 199 provided in Fig. 2B below) that is in communication with detection device 244, primary projectionoptical system 220, and motorized wafer stage. The movement speed of motorized wafer stage may be synchronized and coordinated with the beam deflections controlled by deflection scanning unit 226, such that the movement of the scan probe spots (e.g., scan probe spots 270, 272, and 274) may orderly cover regions of interests on the wafer 230. The parameters of such synchronization and coordination may be adjusted to adapt to different materials of wafer 230. For example, different materials of wafer 230 may have different resistance-capacitance characteristics that may cause different signal sensitivities to the movement of the scan probe spots.

[0045] The intensity of secondary electron beams 236, 238, and 240 may vary according to the external or internal structure of wafer 230, and thus may indicate whether wafer 230 includes defects. Moreover, as discussed above, beamlets 214, 216, and 218 may be projected onto different locations of the top surface of wafer 230, or different sides of local structures of wafer 230, to generate secondary electron beams 236, 238, and 240 that may have different intensities. Therefore, by mapping the intensity of secondary electron beams 236, 238, and 240 with the areas of wafer 230, the image processing system may reconstruct an image that reflects the characteristics of internal or external structures of wafer 230.

[0046] Detection sub-regions 246, 248, and 250 may include separate detector packages, separate sensing elements, or separate regions of an array detector. In some embodiments, each detection subregion may include a single sensing element.

[0047] While Fig. 2A shows detector 244 having several detection sub-regions aligned with secondary optical axis 252, it is appreciated that other multi-beam detector schemes may exist. For example, it is appreciated that a detector may correspond with each beamlet, such as a different detector for each of beamlets 214, 216, 218. It is appreciated that these different detectors may be positioned under the primary column corresponding to primary axis 260. For example, these different detectors could be positioned between primary projection optical system 220 and the wafer stage.

[0048] Another example of a charged particle beam apparatus will now be discussed with reference to Fig. 2B. An electron beam tool 200B (also referred to herein as charged particle apparatus 200B) may be an example of electron beam tool 100 and may be similar to electron beam tool 200A shown in Fig. 2A. However, different from electron beam tool 200 A, electron beam tool 200B may be a single-beam tool that uses only one primary electron beam to scan one location on the wafer at a time.

[0049] As shown in Fig. 2B, apparatus 200B includes a wafer holder 136 supported by motorized stage 134 to hold a wafer 150 to be inspected. Electron beam tool 200B includes an electron emitter, which may comprise a cathode 103, an anode 121, and a gun aperture 122. Electron beam tool 200B may further include a beam limit aperture 125, a condenser lens 126, a column aperture 135, an objective lens assembly 132, and a detector 144. Objective lens assembly 132, in some embodiments, may be a modified SORIL lens, which includes a pole piece 132a, a control electrode 132b, a deflector 132c, and an exciting coil 132d. In a detection or imaging process, an electron beam 161 emanating from the tip of cathode 103 may be accelerated by anode 121 voltage, pass through gunaperture 122, beam limit aperture 125, condenser lens 126, and be focused into a probe spot 170 by the modified SORIL lens and impinge onto the surface of wafer 150. Probe spot 170 may be scanned across the surface of wafer 150 by a deflector, such as deflector 132c or other deflectors in the SORIL lens. Secondary or scattered particles, such as secondary electrons or scattered primary electrons emanated from the wafer surface may be collected by detector 144 to determine intensity of the beam and so that an image of an area of interest on wafer 150 may be reconstructed.

[0050] There may also be provided an image processing system 199 that includes an image acquirer 120, a storage 130, and controller 109. Image acquirer 120 may comprise one or more processors. For example, image acquirer 120 may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, and the like, or a combination thereof. Image acquirer 120 may be communicatively coupled with detector 144 of electron beam tool 200B through a medium such as an electrical conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, or a combination thereof. Image acquirer 120 may receive a signal from detector 144 and may construct an image. Image acquirer 120 may thus acquire images of wafer 150. Image acquirer 120 may also perform various post-processing functions, such as image averaging, generating contours, superimposing indicators on an acquired image, and the like. Image acquirer 120 may be configured to perform adjustments of brightness and contrast, etc. of acquired images. Storage 130 may be a storage medium such as a hard disk, random access memory (RAM), cloud storage, other types of computer readable memory, and the like. Storage 130 may be coupled with image acquirer 120 and may be used for saving scanned raw image data as original images, and post-processed images. Image acquirer 120 and storage 130 may be connected to controller 109. In some embodiments, image acquirer 120, storage 130, and controller 109 may be integrated together as one electronic control unit.

[0051] In some embodiments, image acquirer 120 may acquire one or more images of a sample based on an imaging signal received from detector 144. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas that may contain various features of wafer 150. The single image may be stored in storage 130. Imaging may be performed on the basis of imaging frames.

[0052] The condenser and illumination optics of the electron beam tool may comprise or be supplemented by electromagnetic quadrupole electron lenses. For example, as shown in Fig. 2B, electron beam tool 200B may comprise a first quadrupole lens 148 and a second quadrupole lens 158. In some embodiments, the quadrupole lenses may be used for controlling the electron beam. For example, first quadrupole lens 148 may be controlled to adjust the beam current and second quadrupole lens 158 may be controlled to adjust the beam spot size and beam shape.

[0053] Fig. 2B illustrates a charged particle beam apparatus that may use a single primary beam configured to generate secondary electrons by interacting with wafer 150. Detector 144 may be placed along optical axis 105, as in the embodiment shown in Fig. 2B. The primary electron beam may beconfigured to travel along optical axis 105. Accordingly, detector 144 may include a hole at its center so that the primary electron beam may pass through to reach wafer 150. Fig. 2B shows an example of detector 144 having an opening at its center. However, some embodiments may use a detector placed off-axis relative to the optical axis along which the primary electron beam travels. For example, as in the embodiment shown in Fig. 2A, discussed above, a beam separator 222 may be provided to direct secondary electron beams toward a detector placed off-axis. Beam separator 222 may be configured to divert secondary electron beams by an angle a toward an electron detection device 244, as shown in Fig. 2A.

[0054] In some embodiments of the disclosure, a PIN detector may be used as an in-lens detector in a retarding objective lens SEM column of EBI system 10. The PIN detector may be placed between a cathode for generating an electron beam and the objective lens. The electron beam emitted from the cathode may be potentialized at -BE keV (typically around -10 kV). Electrons of the electron beam may be immediately accelerated and travel through the column. The column may be at ground potential. Thus, electrons may travel with kinetic energy of BE keV while passing through the opening of detector 144. Electrons passing through the pole piece of the objective lens, such as pole piece 132a of objective lens assembly 132 of Fig. 2B, may be steeply decelerated down to landing energy LE keV as the wafer surface potential may be set at -(BE - LE) keV.

[0055] For ease of explanation without causing ambiguity, electrons are used as examples in some of the descriptions herein. However, it should be noted that any charged particle may be used in any embodiment of this disclosure, not limited to electrons. For instance, a source in a charged-particle beam tool can emit one or more charged particles, such as electrons, protons, ions, muons, or any other particle carrying electric charges. Furthermore, some embodiments of the present disclosure may use photons instead of charged particles, such as light in the visible, UV, DUV, EUV, x-ray, or any other wavelength range. Therefore, while detectors in the present disclosure may be disclosed with respect to electron detection, some embodiments of the present disclosure may be directed to detecting other charged particles or photons.

[0056] Figs. 3A-B illustrate example configurations of charged particle beam deflectors 300A-B, according to a comparative embodiment. A charged particle beam deflector may be included in, e.g., a charged particle beam apparatus, such as a SEM, for directing an electron beam to a desired located on a wafer. As shown in Fig. 3A, a charged particle beam deflector 300A may comprise an electrode 360 configured to generate an electric field when a voltage is applied to it. For example, charged particle beam deflector 300A may comprise a plurality of electrodes 360 arranged in opposing pairs around an electron beam optical axis 305 (pointing into the page in Fig. 3A). A control circuit 361 may be configured to apply voltages to two opposing electrodes 360 in, e.g., the x or y direction to deflect an electron beam path in the x or y direction. Each control circuit 361 may comprise, e.g., a digital to analog converter (DAC) 362, an amplifier 363, resistors 364, and capacitors 365. The resistors 364 and capacitors 365 may comprise, e.g., adjustable resistors or adjustable capacitors.

[0057] The control circuitry used to drive the electrodes 360 will be described with respect to a control circuit 361 of the y electrodes 360, though it should be understood that circuitry for driving the x electrodes 360 may have a similar arrangement. Control circuit 361 may comprise a transimpedance amplifier (TIA) configured to generate a voltage signal at the electrodes based on a current signal. The current signal may be provided by, e.g., a DAC. For example, DAC1 may be configured to drive a current output based on a digital input signal such as, e.g., a command signal from a controller of the SEM. The current output may comprise, e.g., a first DAC output 367a and a second DAC output 367b. Amplifier Al may be configured to receive the first and second DAC outputs 367a and 367b at first and second amplifier inputs 368a and 368b, and generate first and second amplifier outputs 369a and 369b, respectively. The first and second amplifier outputs 369a and 369b may each be coupled to one of the y electrodes 360 as shown. The first and second amplifier outputs may have an opposite polarity to each other. In this way, each pair of opposing electrodes 360 may have opposite voltages applied to generate an electric field that deflects the electron beam in a desired way. Along with the amplifier 363, each output 367 of a DAC 362 may be connected to a resistor 364 and capacitor 365. For example, resistor R11 and capacitor Cl 1 may be connected between the first DAC output 367a and the first amplifier output 369a. Resistor R12 and capacitor C12 may be connected between the second DAC output 367b and the second amplifier output 369b. The resistors 364 may be used to determine the transimpedance gain of the TIA. Capacitors 365 may be used to compensate the amplifier to achieve a desired response in both the frequency and time domains. Thus each electrode 360 may be driven by a separate electrical path comprising: a DAC output; an amplifier input; an amplifier output; a resistor connected between the DAC output and the amplifier output; and a capacitor connected between the DAC output and the amplifier output.

[0058] Fig. 3B illustrates an alternative charged particle beam deflector 300B. the configuration in Fig. 3B may be similar to that of Fig. 3A except as described below. For example, in charged particle deflector 300 A, a single amplifier stage may perform conversion of current to voltage, as well as amplification to a desired amplitude. Charged particle beam deflector 300B may instead comprise a dual stage arrangement. In this arrangement, a first low-voltage amplifier stage 370 may comprise a TIA amplifier similar to the one described above. A second high-voltage amplifier stage 371 may then receive the output of the low -voltage amplifier stage 370 via further input resistors (such as resistors Ril l and R112 for the y-deflector control circuit) and amplify the signal. The two amplifier stages may have similar architectures as schematically illustrated in Fig. 3B. Using either the single stage or dual stage TIA configurations above, a charged particle beam deflector may deflect an electron beam from its optical axis 305 with high speed.

[0059] However, as discussed above, demands on SEM inspection systems and other charged particle beam apparatus are increasing. For example, the finest image resolution that a SEM can produce may depend on the minimum size of an image pixel that the SEM can generate. This pixel size depends in part on how finely the electron beam can be moved. For example, if the probe spot of an electronbeam can be placed at five distinct and evenly spaced points along a given line, then the SEM may be capable of generating only five distinct image data points along that line. However, if the probe spot could instead be moved in smaller increments, such as to be placed at ten distinct points along the same distance, then the SEM may generate ten image data points to produce an image with more pixels and thus a higher image resolution. The number of distinct points at which a beam spot may be placed within a given area may be referred to as the spatial resolution. The smallest incremental distance over which a charged particle beam apparatus can move the electron beam spot on the wafer may be referred to as the spatial resolution of the charged particle beam apparatus. As the sizes of circuit features in modem semiconductor wafers continually decrease, higher SEM image resolution is needed to inspect those wafers. Therefore it may be desirable to deflect an electron beam more finely than conventional charged particle beam deflectors will allow.

[0060] Some factors that limit the capabilities of charged particle beam deflectors include the bit resolution and linearity of the DAC. The bit resolution may refer to the number of discrete current levels that the DAC is capable of outputting over a given current range. Linearity may refer to how evenly the DAC current intervals are spaced from each other. These are important because the number and uniformity of distinct voltage levels that can be produced at an electrode depend directly on these DAC current outputs. If the DAC cannot reliably output current levels in small enough increments, then the corresponding voltages at the electrodes will not deflect the electron beams with sufficient spatial resolution and precision. Additionally, high bit resolution and linearity may be required for more complex actions, such as for compensating aberrations in the electron beam optics. Due to, e.g., device performance limits and power consumption requirements, it may not be feasible to overcome these limitations solely by improving the DAC itself.

[0061] Embodiments of the present disclosure provide a deflector control circuit that is configured to switch between two modes of operation. A first mode may comprise a TIA mode like the arrangements discussed above. A second mode may comprise an integrator mode. The TIA mode may be useful for applications that require high-speed scanning movements or have lower spatial resolution requirements, such as jumping between different positions on a wafer surface or scanning large features. The integrator mode may be useful for applications requiring high spatial resolution, such as critical device features, selected regions of interest on the wafer, or any operation whose requirements approach or exceed the bit resolution of the DAC.

[0062] Figs. 4A-B illustrate example configurations of a charged particle beam deflector 400, consistent with embodiments of the present disclosure. Charged particle beam deflector 400 may be included in a charged particle beam apparatus such as, e.g., electron beam tools 100, 200 A, or 200B of Figs. 1-2B. Charged particle beam deflector 400 may be similar to charged particle beam deflector 300 A of Fig. 3 A except as described below. For example, some components in Figs. 4A-B may correspond to components in Fig. 3A with the leading digits of their reference characters increased according to the figure number (e.g., electrodes 460 in Figs. 4A-B may be similar to electrodes 360 inFig. 3A), and therefore their description may be omitted here. The same is true for Figs. 5A-B and Fig- 6.

[0063] Charged particle beam deflector 400 may comprise a plurality of switches 466 configured to selectively connect or disconnect resistors 464 from the current outputs of their respective DACs 462. For example, charged particle beam deflector 400 may comprise a first switch KI 1, wherein a first side of the first switch KI 1 is connected to a first output of DAC1. Resistor R11 may be connected between a second side of the first switch KI 1 and a first amplifier output of amplifier Al. With the switches 466 closed as shown in Fig. 4A, charged particle beam deflector 400 may be configured to operate in a TIA mode. Resistors R11-R22 may be used to determine the transimpedance gain of the TIA’s in each control circuit 461, and capacitors Cl 1-C22 may compensate the amplifiers to achieve a desired response as discussed above. In the TIA mode, the voltage produced at each electrode 460 may be based on the present current output from the DAC. For example, when a new current level is output from the DAC, the voltage at electrode 460 is produced as a function of the new current level and does not depend on the previous current level (ignoring, e.g., lingering effects, settling time, or other effects associated with making the change between the previous and new output current levels). Thus the speed of operation in the TIA mode may be as fast as the DAC switching speed and circuitry delay time will allow.

[0064] However, when the switches 466 are opened as shown in Fig. 4B, the resistors 464 are deactivated. In this configuration the control circuit 461 may comprise an integrator amplifier rather than a TIA, and the mode of operation may be referred to as an integrator mode. In the integrator mode, individual current output values from a DAC 462 are not necessarily proportional to a desired voltage level at the corresponding electrode 460. Instead, in the integrator mode, DAC 462 is used to control a rate of change of the voltage that is output to electrode 460. By supplying an appropriate output current, the DAC 462 can move the existing electrode voltage in the positive or negative direction as desired. When no change is desired, the DAC would in theory supply no current at all. However, in practice, the DAC may output a current that is sufficient to compensate an input bias current of the integrator amplifier stage.

[0065] In some embodiments, as discussed above, capacitors 465 may comprise adjustable capacitors. This may be beneficial especially because the optimal capacitance value may not be identical for the TIA and integrator modes. For example, to achieve a desired bit resolution in the integrator mode, it may be necessary to increase the capacitance value from the optimal value of the TIA mode. Therefore control circuit 461 may be configured to adjust the capacitor 465 to a first capacitance value in the TIA mode and a second capacitance value in the integrator mode. The second capacitance value may be higher than the first capacitance value.

[0066] In the integrator mode, the control circuit can essentially achieve an infinite bit resolution because it acts as on the rate of change, rather than on an absolute magnitude, of the electrode voltage. However, this benefit may come at the expense of reduced operation speed. But even this speedreduction may be beneficial because reduced operation speed may be accompanied by a corresponding bandwidth reduction. Since low bandwidth may reduce noise in the system, this reduced speed effect may be desirable for the types of high spatial resolution and high linearity applications in which the integrator mode is expected to be used (such as in high resolution SEM inspection of critical features or other regions of interest).

[0067] In either the TIA or integrator modes, the charged particle beam deflector 400 may move the electron beam as needed or allow the electron beam to remain at a desired location on the wafer. Thus the two modes of operation are compatible with each other and indeed can be swapped back and forth during a single continuous scanning operation. For example, with the two-mode design, a SEM may use the TIA mode for low resolution scans and the integrator mode for high resolution scans in selected regions of interest. Alternatively or additionally, a SEM may use the TIA mode to quickly relocate the electron beam, such as by jumping from one region of interest to another, and then switch to integrator mode for a high resolution scan at the new region of interest. These operations are described further with respect to Fig. 7.

[0068] In addition to combining high speed with high resolution, this two-mode design also overcomes a design tradeoff that comparative systems faced. For example, comparative systems may need to balance the field of view size with the spatial resolution of the system. Due to the limited bit resolution of the DAC, there is a limited number of discrete points at which an electron beam spot may be directed. By increasing the field of view, one must spread those points out. With the twomode design, a SEM may achieve a large field of view and high spatial resolution by switching between the two modes.

[0069] Figs. 5A-B illustrate further example configurations of a charged particle beam deflector 500, consistent with embodiments of the present disclosure. Charged particle beam deflector 500 may comprise a dual stage arrangement which may be similar to charged particle beam deflector 300B of Fig. 3B with modifications such as discussed above with respect to Figs. 4A-B. For example, charged particle beam deflector 500 may comprise a plurality of switches 566 configured to selectively connect or disconnect resistors 564 from the current outputs of their respective DACs 562. In this way a first low-voltage amplifier stage 570 may be switched between a TIA mode (as seen in Fig. 5A) and an integrator mode (as seen in Fig. 5B). A second high-voltage amplifier stage 571 may then receive the output of the low-voltage amplifier stage 570 via further input resistors and amplify the signal to drive electrodes 560. Therefore the dual stage arrangement may likewise be configured to be operated in both the TIA and integrator modes.

[0070] Furthermore, in some embodiments, a charged particle beam deflector may be configured to operate in a continuous integrator mode. Fig. 6 illustrates a further example configuration of a charged particle beam deflector 600, consistent with embodiments of the present disclosure. In this setup, the TIA mode is eliminated and a charged particle beam deflector 600 may operate in the integrator mode only. This design may be desirable in view of its simplicity, for applications whichrequire full-scale high resolution imaging, or when the DAC 662 or other circuit elements provide sufficient modulation speed to render the TIA mode less necessary.

[0071] Fig. 7 illustrates example scanning operations in a field of view 780 of a charged particle beam apparatus, consistent with embodiments of the present disclosure. As discussed above with respect to Figs. 4A-B, a scanning operation may comprise repeatedly switching back and forth between the TIA and integrator modes. The arrows indicate the path of a beam spot along a fast scan direction in a charged particle beam apparatus, such as a SEM. The SEM may perform, e.g., raster or vector scanning operations, both of which may utilize a dual-mode system.

[0072] For example, in the raster scan operation, a charged particle beam deflector (such as, e.g., charged particle beam deflectors 400 or 500 of Figs. 4A-5B) may scan a beam spot along the horizontal axis in a regular series of lines, imaging the full field of view as it goes. This raster scanning may be performed under the high-speed TIA mode except in the regions of interest 1-4. These regions may represent areas that are, e.g., determined to require higher resolution image than the TIA is configured to provide. When the electron beam approaches a region of interest, the charged particle beam deflector may switch to integrator mode and scan one or more lines of the region of interest. Then the charged particle beam deflector may switch back to the TIA to complete the regular raster scanning operation until it encounters a next region of interest.

[0073] In the vector scanning operation, the SEM may not scan the full field of view 780. Instead, the regions of interest 1-4 alone may be scanned. In this way, the throughput of an inspection process may be increased. In the vector scanning operation, the charged particle beam deflector may use the highspeed TIA mode for large-scale positioning, and the high-resolution integrator mode for imaging. For example, the integrator mode may be used to scan a first region of interest 1. Next, the TIA mode may be used to quickly deflect the electron beam from the first region of interest 1 to a second region of interest 2. Then the integrator mode may be used to scan the second region of interest 2, and the process may repeat until all regions of interest in a field of view have been scanned.

[0074] Fig. 8 illustrates a flowchart of an example method 800 of scanning a sample in a charged particle beam process, consistent with embodiments of the present disclosure. The method 800 may be performed using a charged particle beam apparatus, such as, e.g., electron beam tools 100, 200A, or 200B of Figs. 1-2B. the charged particle beam apparatus may comprise a charged particle deflector, such as charged particle beam deflectors 400 or 500 of Figs. 4A-5B. In some embodiments, the method 800 may be utilized in, e.g., a raster scan operation as discussed above with respect to Fig. 7, in which imaging is performed under both TIA and integrator deflection modes. Method 800 may begin at step 801 in which the charged particle beam apparatus may irradiate a sample, such as a wafer, with a primary charged particle beam.

[0075] At step 802, the charged particle apparatus may deflect the charged particle beam using a charged particle deflector in a first deflection mode. The charged particle beam deflector may comprise, e.g., a control circuit configured to selectively apply a desired voltage to one or moreelectrodes. The electrodes may be arranged proximal to the charged particle beam to deflect the charged particle beam as a function of the applied voltage. The control circuit may comprise an amplifier stage configured to operate in a TIA mode as the first mode.

[0076] At step 803, the charged particle apparatus may detect emitted charged particles. For example, the emitted charged particles may comprise secondary, backscattered, or other emitted electrons that were emitted as a result of irradiation of the wafer surface by the charged particle beam under the first mode.

[0077] At step 804, the charged particle apparatus may deflect the charged particle beam using the charged particle deflector in a second deflection mode. The second deflection mode may comprise, e.g., an integrator mode. For example, the control circuit may comprise one or more switches configured to selectively connect or disconnect a resistor or other element from the control circuit to transform the mode of operation from the first mode to the second mode. Further, the control circuit may make other changes when switching between the first mode and the second mode. For example, the control circuit may adjust a capacitance value of a capacitor in the control circuit to accommodate the requirements of the second mode.

[0078] At step 805, the charged particle apparatus may again detect emitted charged particles. For example, the emitted charged particles may comprise secondary, backscattered, or other emitted electrons that were emitted as a result of irradiation of the wafer surface by the charged particle beam under the second mode.

[0079] Finally at step 806, the charged particle apparatus may generate a charged particle image based on the first detection and the second detection at steps 803 and 805. The charged particle image may comprise areas of relatively lower and relatively higher resolution based on the first and second detections, respectively.

[0080] Fig. 9 illustrates a flowchart of an example method 900 of scanning a sample in a charged particle beam process, consistent with embodiments of the present disclosure. The method 900 may be similar to method 800 except as described below. In some embodiments, the method 900 may be utilized in, e.g., a vector scan operation as discussed above with respect to Fig. 7, in which large-scale movement is performed under the TIA deflection mode and imaging is performed under the integrator deflection mode. Method 900 may begin at step 901 in which the charged particle beam apparatus may irradiate a sample, such as a wafer, with a primary charged particle beam.

[0081] At step 902, the charged particle apparatus may deflect the charged particle beam using a charged particle deflector in a first deflection mode. For example, the first deflection mode may comprise a TIA deflection mode. The charged particle beam deflector may deflect the charged particle beam to a region of interest on the wafer within a field of view of the charged particle apparatus.

[0082] At step 903, the charged particle apparatus may deflect the charged particle beam using the charged particle deflector in the second deflection mode. For example, the second deflection mode may comprise an integrator deflection mode. For example, the charged particle beam deflector maydeflect the charged particle beam to scan the region of interest to which the beam was moved in step 902.

[0083] At step 904, the charged particle apparatus may detect the emitted charged particles that were emitted as a result of irradiation of the wafer surface by the charged particle beam under the second mode.

[0084] At step 905, if there are more regions of interest to be scanned in the field of view, the method returns to step 902 and repeats. If there are no further regions of interest to be scanned in the field of view, the method moves on to step 906 where charged particle apparatus may generate a charged particle image. The charged particle image may comprise, e.g., one or more high-resolution images of distinct areas within the field of view corresponding to the regions of interest.

[0085] A non-transitory computer-readable medium may be provided that stores instructions for a processor of a controller (e.g., controller 109 in Fig. 1) for performing charged particle beam deflection operations using embodiments of the present disclosure. For example, the instructions stored in the non-transitory computer-readable medium may be executed by the circuitry of the controller for performing methods 800 or 900 in part or in entirety. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid-state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read-Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read-Only Memory (PROM), and Erasable Programmable Read- Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same.

[0086] The embodiments may further be described using the following clauses:1. A charged particle beam deflector control circuit, comprising: a first digital to analog converter (DAC) configured to drive a first output of the first DAC; a first amplifier configured to receive the first output of the first DAC and drive a first output of the first amplifier; a first capacitor connected between the first output of the first DAC and the first output of the first amplifier; a first switch, wherein a first side of the first switch is connected to the first output of the first DAC; and a first resistor connected between a second side of the first switch and the first output of the first amplifier, wherein the charged particle beam deflector control circuit is configured to operate a first deflection electrode in a first mode when the first switch is closed and a second mode when the first switch is open.2. The charged particle beam deflector control circuit of clause 1, wherein the first mode comprises a transimpedance amplifier mode, and the second mode comprises an integration mode.3. The charged particle beam deflector control circuit of clause 1, wherein: the charged particle beam deflector control circuit is configured to operate the first deflection electrode to deflect a charged particle beam with a first spatial resolution in the first mode and a second spatial resolution in the second mode; and the second spatial resolution is higher than the first spatial resolution.4. The charged particle beam deflector control circuit of clause 1, wherein: the charged particle beam deflector control circuit is configured to operate the first deflection electrode to deflect a charged particle beam with a first deflection speed in the first mode and a second deflection speed in the second mode; and the first deflection speed is greater than the second deflection speed.5. The charged particle beam deflector control circuit of clause 1, wherein in the first mode, the charged particle beam deflector control circuit is configured to provide a voltage value at the deflection electrode that is based on a present DAC output of the first DAC.6. The charged particle beam deflector control circuit of clause 5, wherein in the first mode, the voltage value at the deflection electrode is independent of a previous DAC output of the first DAC occurring immediately before the present DAC output.7. The charged particle beam deflector control circuit of clause 1, wherein in the second mode, the charged particle beam deflector control circuit is configured to provide a voltage value at the deflection electrode that is based on an integrated DAC output of the first DAC.8. The charged particle beam deflector control circuit of clause 1, wherein the first resistor comprises an adjustable resistor.9. The charged particle beam deflector control circuit of clause 1, wherein the first capacitor comprises an adjustable capacitor.10. The charged particle beam deflector control circuit of clause 9, wherein: the charged particle beam deflector control circuit is configured to adjust the first capacitor to a first capacitance value in the first mode and a second capacitance value in the second mode, and the second capacitance value is higher than the first capacitance value.11. The charged particle beam deflector control circuit of clause 1, wherein: the first DAC is configured to drive a second output of the first DAC; and the first amplifier is configured to receive the second output of the first DAC and drive a second output of the first amplifier having an opposite polarity to the first output of the first amplifier.12. The charged particle beam deflector control circuit of clause 11, further comprising: a second capacitor connected between the second output of the first DAC and the second output of the first amplifier;a second switch, wherein a first side of the second switch is connected to the second output of the first DAC; and a second resistor connected between a second side of the second switch and the second output of the first amplifier, wherein the charged particle beam deflector control circuit is configured to operate a second deflection electrode in the first mode when the second switch is closed and the second mode when the second switch is open.13. The charged particle beam deflector control circuit of clause 1, further comprising: a first amplifier stage comprising the first amplifier, the first switch, the first resistor, and the first capacitor; and a second amplifier stage comprising: a second amplifier configured to receive a first output of the first amplifier stage at a first input of the second amplifier and drive a first output of the second amplifier; a second capacitor connected between the first input of the second amplifier and the first output of the second amplifier; and a second resistor connected between the first input of the second amplifier and the first output of the second amplifier; wherein the charged particle beam deflector control circuit is configured to operate the first deflection electrode based on the first output of the second amplifier.14. A charged particle beam apparatus, comprising: a charged particle beam source configured to generate a charged particle beam; a charged particle optical system configured to direct the charged particle beam at a surface, the charged particle optical system comprising a deflector configured to deflect the charged particle beam to different locations within a field of view of the charged particle beam apparatus; and a controller comprising one or more processors and configured to cause the charged particle beam apparatus to perform operations comprising: controlling the deflector to deflect the beam in a first mode having a first spatial resolution; and controlling the deflector to deflect the beam in a second mode having a second spatial resolution that is higher than the first spatial resolution.15. The charged particle beam apparatus of clause 14, wherein the first mode comprises a transimpedance amplifier mode, and the second mode comprises an integration mode.16. The charged particle beam apparatus of clause 14, wherein the controller is configured to cause the charged particle beam apparatus to perform further operations comprising: controlling the deflector to deflect the beam in the first mode at a first deflection speed; andcontrolling the deflector to deflect the beam in the second mode at a second deflection speed that is lower than the first deflection speed.17. A charged particle beam deflector control circuit, comprising: a first digital to analog converter (DAC) configured to drive a first output of the first DAC; a first amplifier configured to receive the first output of the first DAC and drive a first output of the first amplifier; and a capacitor connected between the first output of the first DAC and the first output of the first amplifier; wherein the charged particle beam deflector control circuit is configured to provide a voltage value at a deflection electrode that is based on an integrated DAC output of the DAC.18. A method of operating a charged particle beam deflector control circuit, comprising: driving a first output of a first digital to analog converter (DAC), wherein a first amplifier receives the first output of the first DAC and drives a first output of the first amplifier; and controlling a first switch to operate a first deflection electrode by the charged particle beam deflector control circuit in a first mode when the first switch is closed and a second mode when the first switch is open; wherein the charged particle beam deflector control circuit comprises: the first DAC; the first amplifier; a first capacitor connected between the first output of the first DAC and the first output of the first amplifier; a first switch, wherein a first side of the first switch is connected to the first output of the first DAC; and a first resistor connected between a second side of the first switch and the first output of the first amplifier.19. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: sending a command signal to a first digital to analog converter (DAC) to drive a first output of the first DAC, wherein a first amplifier receives the first output of the first DAC and drives a first output of the first amplifier; and controlling a first switch to operate a first deflection electrode by the charged particle beam deflector control circuit in a first mode when the first switch is closed and a second mode when the first switch is open; wherein the charged particle beam deflector control circuit comprises: the first DAC;the first amplifier; a first capacitor connected between the first output of the first DAC and the first output of the first amplifier; a first switch, wherein a first side of the first switch is connected to the first output of the first DAC; and a first resistor connected between a second side of the first switch and the first output of the first amplifier.20. A method of operating a charged particle beam apparatus, comprising: generating a charged particle beam by a charged particle beam source of a charged particle beam apparatus; directing the charged particle beam at a surface by a charged particle optical system of the charged particle beam apparatus, the charged particle optical system comprising a deflector configured to deflect the charged particle beam to different locations within a field of view of the charged particle beam apparatus; controlling the deflector to deflect the beam in a first mode having a first spatial resolution; and controlling the deflector to deflect the beam in a second mode having a second spatial resolution that is higher than the first spatial resolution.21. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: generating a charged particle beam by a charged particle beam source of a charged particle beam apparatus; directing the charged particle beam at a surface by a charged particle optical system of the charged particle beam apparatus, the charged particle optical system comprising a deflector configured to deflect the charged particle beam to different locations within a field of view of the charged particle beam apparatus; controlling the deflector to deflect the beam in a first mode having a first spatial resolution; and controlling the deflector to deflect the beam in a second mode having a second spatial resolution that is higher than the first spatial resolution.22. A method of operating a charged particle beam deflector control circuit, comprising: driving a first output of a first digital to analog converter (DAC), wherein a first amplifier: receives the first output of the first DAC; drives a first output of the first amplifier, andgenerates a voltage value at a deflection electrode that is based on an integrated DAC output of the first DAC; wherein the charged particle beam deflector control circuit comprises: the first DAC; the first amplifier; and a capacitor connected between the first output of the first DAC and the first output of the first amplifier.23. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: sending a command signal to a first digital to analog converter (DAC) to drive a first output of the first DAC, wherein a first amplifier: receives the first output of the first DAC; drives a first output of the first amplifier, and generates a voltage value at a deflection electrode that is based on an integrated DAC output of the first DAC; wherein the charged particle beam deflector control circuit comprises: the first DAC; the first amplifier; and a capacitor connected between the first output of the first DAC and the first output of the first amplifier.

[0087] Some embodiments of the present disclosure have been described with electron beam systems, such as SEM, having an electron deflector for deflecting electron beams. However, the present disclosure is not limited to this. It should be understood that the above disclosed embodiments may be applicable to other systems, such as other non-SEM electron beam systems or non-electron based charged particle beam systems. Further, it should be understood that other charged particles, or other classes of electrons are contemplated within the scope of the present disclosure. Additionally, it should be understood that the above-described control circuits and related system may be applicable to other charged particle optical elements, such as other deflectors or lenses. Further, it should be understood that while some embodiments of the present disclosure are described with respect to electrostatic elements, other classes of elements, such as magnetic and electromagnetic optical elements are contemplated within the scope of the present disclosure.

[0088] Block diagrams in the figures may illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer hardware or software products according to various exemplary embodiments of the present disclosure. In this regard, each block in a schematic diagram may represent certain arithmetical or logical operation processing that may beimplemented using hardware such as an electronic circuit. Blocks may also represent a module, segment, or portion of code that comprises one or more executable instructions for implementing the specified logical functions. It should be understood that in some alternative implementations, functions indicated in a block may occur out of the order noted in the figures. For example, two blocks shown in succession may be executed or implemented substantially concurrently, or two blocks may sometimes be executed in reverse order, depending upon the functionality involved. Some blocks may also be omitted. It should also be understood that each block of the block diagrams, and combination of the blocks, may be implemented by special purpose hardware-based systems that perform the specified functions or acts, or by combinations of special purpose hardware and computer instructions.

[0089] It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes can be made without departing from the scope thereof. For example, a charged particle inspection system may be but one example of a charged particle beam system consistent with embodiments of the present disclosure.

Claims

CLAIMS1. A charged particle beam deflector control circuit, comprising: a first digital to analog converter (DAC) configured to drive a first output of the first DAC; a first amplifier configured to receive the first output of the first DAC and drive a first output of the first amplifier; a first capacitor connected between the first output of the first DAC and the first output of the first amplifier; a first switch, wherein a first side of the first switch is connected to the first output of the first DAC; and a first resistor connected between a second side of the first switch and the first output of the first amplifier, wherein the charged particle beam deflector control circuit is configured to operate a first deflection electrode in a first mode when the first switch is closed and a second mode when the first switch is open.

2. The charged particle beam deflector control circuit of claim 1, wherein the first mode comprises a transimpedance amplifier mode, and the second mode comprises an integration mode.

3. The charged particle beam deflector control circuit of claim 1, wherein: the charged particle beam deflector control circuit is configured to operate the first deflection electrode to deflect a charged particle beam with a first spatial resolution in the first mode and a second spatial resolution in the second mode; and the second spatial resolution is higher than the first spatial resolution.

4. The charged particle beam deflector control circuit of claim 1, wherein: the charged particle beam deflector control circuit is configured to operate the first deflection electrode to deflect a charged particle beam with a first deflection speed in the first mode and a second deflection speed in the second mode; and the first deflection speed is greater than the second deflection speed.

5. The charged particle beam deflector control circuit of claim 1, wherein in the first mode, the charged particle beam deflector control circuit is configured to provide a voltage value at the deflection electrode that is based on a present DAC output of the first DAC.

6. The charged particle beam deflector control circuit of claim 5, wherein in the first mode, the voltage value at the deflection electrode is independent of a previous DAC output of the first DAC occurring immediately before the present DAC output.

7. The charged particle beam deflector control circuit of claim 1, wherein in the second mode, the charged particle beam deflector control circuit is configured to provide a voltage value at the deflection electrode that is based on an integrated DAC output of the first DAC.

8. The charged particle beam deflector control circuit of claim 1, wherein the first resistor comprises an adjustable resistor.

9. The charged particle beam deflector control circuit of claim 1, wherein the first capacitor comprises an adjustable capacitor.

10. The charged particle beam deflector control circuit of claim 9, wherein: the charged particle beam deflector control circuit is configured to adjust the first capacitor to a first capacitance value in the first mode and a second capacitance value in the second mode, and the second capacitance value is higher than the first capacitance value.

11. The charged particle beam deflector control circuit of claim 1, wherein: the first DAC is configured to drive a second output of the first DAC; and the first amplifier is configured to receive the second output of the first DAC and drive a second output of the first amplifier having an opposite polarity to the first output of the first amplifier.

12. The charged particle beam deflector control circuit of claim 11, further comprising: a second capacitor connected between the second output of the first DAC and the second output of the first amplifier; a second switch, wherein a first side of the second switch is connected to the second output of the first DAC; and a second resistor connected between a second side of the second switch and the second output of the first amplifier, wherein the charged particle beam deflector control circuit is configured to operate a second deflection electrode in the first mode when the second switch is closed and the second mode when the second switch is open.

13. The charged particle beam deflector control circuit of claim 1, further comprising:a first amplifier stage comprising the first amplifier, the first switch, the first resistor, and the first capacitor; and a second amplifier stage comprising: a second amplifier configured to receive a first output of the first amplifier stage at a first input of the second amplifier and drive a first output of the second amplifier; a second capacitor connected between the first input of the second amplifier and the first output of the second amplifier; and a second resistor connected between the first input of the second amplifier and the first output of the second amplifier; wherein the charged particle beam deflector control circuit is configured to operate the first deflection electrode based on the first output of the second amplifier.

14. A charged particle beam apparatus, comprising: a charged particle beam source configured to generate a charged particle beam; a charged particle optical system configured to direct the charged particle beam at a surface, the charged particle optical system comprising a deflector configured to deflect the charged particle beam to different locations within a field of view of the charged particle beam apparatus; and a controller comprising one or more processors and configured to cause the charged particle beam apparatus to perform operations comprising: controlling the deflector to deflect the beam in a first mode having a first spatial resolution; and controlling the deflector to deflect the beam in a second mode having a second spatial resolution that is higher than the first spatial resolution.

15. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: generating a charged particle beam by a charged particle beam source of a charged particle beam apparatus; directing the charged particle beam at a surface by a charged particle optical system of the charged particle beam apparatus, the charged particle optical system comprising a deflector configured to deflect the charged particle beam to different locations within a field of view of the charged particle beam apparatus; controlling the deflector to deflect the beam in a first mode having a first spatial resolution; and controlling the deflector to deflect the beam in a second mode having a second spatial resolution that is higher than the first spatial resolution.

Images