Light detection device

Abstract

Provided is a light detection device including a plurality of pixels arranged in a matrix on a semiconductor substrate. The plurality of pixels include: a first pixel in which hot carrier light emission is induced by application of a predetermined voltage larger than a breakdown voltage; and a second pixel that is adjacent to the first pixel and in which a voltage generated by a photoelectric effect by a photon from the first pixel is measured.

Description

Photodetector

[0001] The present disclosure relates to a light detection device.

[0002] In recent years, distance measurement systems that measure distances using the ToF (Time of Flight) method have been attracting attention. Some distance measurement systems use a SPAD (Single Photon Avalanche Diode) as the light receiving element. In the SPAD, a single light (photon) is incident, and electrons (charges) generated by photoelectric conversion are multiplied in a PN junction region (avalanche amplification), thereby enabling highly accurate detection of the light. The distance measurement system can then measure the distance with high accuracy by detecting the timing at which a current caused by the multiplied electrons flows.

[0003] International Publication No. 2020 / 0158401 Japanese Patent Application Laid-Open No. 2021-56016

[0004] The above-mentioned SPAD requires appropriate adjustment of the applied voltage to maintain the signal detection level at a desired level. Therefore, in the prior art, in addition to the distance measurement SPAD, a reference SPAD is provided that monitors a reference voltage for adjustment. However, the reference SPAD in the prior art may not be able to stably measure the reference voltage.

[0005] Therefore, the present disclosure proposes a photodetector that can stably measure a reference voltage.

[0006] According to the present disclosure, there is provided a photodetection device having a plurality of pixels arranged in a matrix on a semiconductor substrate, the plurality of pixels including a first pixel in which hot carrier light emission is induced when a predetermined voltage greater than a breakdown voltage is applied, and a second pixel adjacent to the first pixel in which a voltage generated by a photoelectric effect due to photons from the first pixel is measured.

[0007] Furthermore, according to the present disclosure, there is provided a photodetection device comprising a plurality of pixels arranged in a matrix on a semiconductor substrate and detecting light, the plurality of pixels including a third pixel having a light-emitting portion in which hot carrier light emission is induced when a predetermined voltage greater than a breakdown voltage is applied, and a first light-receiving portion in which a photoelectric effect is produced by photons from the light-emitting portion and a voltage is measured.

[0008] FIG. 1 is an explanatory diagram (part 1) for explaining an example of a circuit configuration of a pixel. FIG. 2 is an explanatory diagram (part 2) for explaining an example of a circuit configuration of a pixel. FIG. 3 is a graph showing a change in the cathode voltage VS of a light-receiving element and a detection signal PFout in response to incidence of light. FIG. 4 is a cross-sectional schematic diagram illustrating an example of a detailed configuration of a light-receiving element. FIG. 5 is a block diagram illustrating an example of a configuration of a light-detecting device. FIG. 6 is a block diagram illustrating an example of a configuration of a distance measuring system incorporating a light-detecting device. FIG. 7 is an explanatory diagram illustrating the background of an embodiment of the present disclosure. FIG. 8 is a cross-sectional diagram illustrating an example of a configuration of an element according to a first embodiment of the present disclosure. FIG. 9 is a circuit diagram illustrating an example of a circuit configuration of a pixel according to the first embodiment of the present disclosure. FIG. 10 is a cross-sectional diagram (part 1) illustrating an example of a configuration of an element according to Modification 1 of the first embodiment of the present disclosure. FIG. 11 is a cross-sectional diagram (part 2) illustrating an example of a configuration of an element according to Modification 2 of the first embodiment of the present disclosure. FIG. 12 is a cross-sectional diagram illustrating an example of a configuration of an element according to Modification 3 of the first embodiment of the present disclosure. FIG. 13 is a cross-sectional diagram illustrating an example of a configuration of an element according to Modification 4 of the first embodiment of the present disclosure. FIG. 14 is a cross-sectional diagram illustrating an example of a configuration of an element according to Modification 5 of the first embodiment of the present disclosure. FIG. 1 is a circuit diagram showing an example of a circuit configuration of a pixel according to Modification 6 of the first embodiment of the present disclosure. FIG. 2 is a cross-sectional view showing an example of a configuration of an element according to Modification 1 of the second embodiment of the present disclosure. FIG. 3 is a cross-sectional view showing an example of a configuration of an element according to Modification 2 of the second embodiment of the present disclosure. FIG. 4 is a cross-sectional view showing an example of a configuration of an element according to Modification 3 of the second embodiment of the present disclosure. FIG. 5 is a cross-sectional view showing an example of a configuration of an element according to a third embodiment of the present disclosure. FIG. 6 is a circuit diagram showing an example of a circuit configuration of a pixel according to a third embodiment of the present disclosure. FIG. 7 is a cross-sectional view showing an example of a configuration of an element according to a modification of the third embodiment of the present disclosure. FIG. 8 is a cross-sectional view showing an example of a configuration of an element according to a fourth embodiment of the present disclosure. FIG. 9 is a cross-sectional view showing an example of a configuration of an element according to a fifth embodiment of the present disclosure. FIG. 10 is a circuit diagram showing an example of a circuit configuration of a pixel according to a fifth embodiment of the present disclosure. FIG. 11 is a cross-sectional view showing an example of a configuration of an element according to Modification 1 of the sixth embodiment of the present disclosure. FIG. 12 is a cross-sectional view showing an example of a configuration of an element according to Modification 1 of the sixth embodiment of the present disclosure.FIG. 10 is a cross-sectional view showing an example of a main part of an element configuration according to a second modified example of the sixth embodiment of the present disclosure. FIG. 11 is a cross-sectional view (part 1) showing an example of an element configuration according to a seventh embodiment of the present disclosure. FIG. 12 is a cross-sectional view (part 2) showing an example of an element configuration according to the seventh embodiment of the present disclosure. FIG. 13 is a cross-sectional view showing an example of an element configuration according to an eighth embodiment of the present disclosure. FIG. 14 is a cross-sectional view showing an example of an element configuration according to a ninth embodiment of the present disclosure. FIG. 15 is a cross-sectional view showing an example of an element configuration according to a tenth embodiment of the present disclosure. FIG. 16 is an explanatory diagram illustrating the operation of a photodetector according to an eleventh embodiment of the present disclosure. FIG. 17 is a block diagram showing an example of the configuration of a smartphone 900 as an electronic device to which a ranging system 611 according to an embodiment of the present disclosure is applied.

[0009] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted. Furthermore, in this specification and the drawings, multiple components having substantially the same or similar functional configurations may be distinguished by adding different letters after the same reference numeral. However, when there is no particular need to distinguish between multiple components having substantially the same or similar functional configurations, only the same reference numerals will be used.

[0010] The drawings referred to in the following description are for explaining and facilitating understanding of the embodiments of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the elements shown in the drawings may be modified as appropriate, taking into consideration the following description and known techniques.

[0011] In the following description of circuits (electrical connections), unless otherwise specified, "electrically connected" means connecting multiple elements so that electricity (signals) is conducted between them. In addition, in the following description, "electrically connected" includes not only cases where multiple elements are directly and electrically connected, but also cases where elements are indirectly and electrically connected via other elements.

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order: 1. Background to the creation of embodiments of the present disclosure 1.1 Pixel circuit configuration 1.2 Light receiving element configuration 1.3 Configuration example of a light detection device 1.4 Configuration example of a ranging system 1.5 Background 2. First embodiment 2.1 Detailed configuration 2.2 Modification 3. Second embodiment 3.1 Detailed configuration 3.2 Modification 4. Third embodiment 4.1 Detailed configuration 4.2 Modification 5. Fourth embodiment 6. Fifth embodiment 7. Sixth embodiment 6.1 Detailed configuration 6.2 Modification 8. Seventh embodiment 9. Eighth embodiment 10. Ninth embodiment 11. Tenth embodiment 12. Eleventh embodiment 13. Summary 14. Application example 15. Supplementary information

[0013] <<1. Background to the Creation of the Embodiments of the Present Disclosure>> <1.1 Circuit Configuration of Pixel> First, before describing the details of the embodiments of the present disclosure, an example of a circuit configuration of a pixel 10 to which the embodiments of the present disclosure can be applied will be described with reference to FIGS. 1 and 2 . The pixel 10 described here is a pixel that can be used for distance measurement. FIGS. 1 and 2 are explanatory diagrams for describing an example of the circuit configuration of the pixel 10, and more specifically, show the circuit configuration of the pixel 10 including a light-receiving element (photodiode) 100 having a SPAD (Single Photon Avalanche Diode) structure that can be used in a distance measurement sensor that measures distance using a direct ToF (Time-of-Flight) method. As shown in FIG. 1 , the pixel 10 includes the light-receiving element 100, an inverter 24, and a transistor 26. Each element of the pixel 10 will be described below in order.

[0014] As described above, the light receiving element 100 has a SPAD structure and can be operated at a bias voltage (Geiger mode) greater than the breakdown voltage VBD. The light receiving element 100 is an element that can detect one light (photon) for each pixel 10 by multiplying electrons (charges) generated by photoelectric conversion in a pn junction region (multiplication region) to which a high electric field is applied, which is provided for each pixel 10. More specifically, the light receiving element 100 is a photodiode (single-photon avalanche photodiode) that avalanche-amplifies electrons (charges) generated by incident light and outputs the amplified signal voltage VS to the inverter 24.

[0015] The light receiving element 100 has a cathode electrically connected to the input terminal of the inverter 24 and the drain of the transistor 26. Furthermore, the light receiving element 100 has an anode electrically connected to a power supply having a reference potential. For example, to efficiently detect light (photons), a voltage (hereinafter referred to as excess bias) greater than the breakdown voltage VBD of the light receiving element 100 is applied to the light receiving element 100. Furthermore, the power supply voltage VSPAD supplied to the anode of the light receiving element 100 is, for example, a negative bias (negative potential) that is the same voltage as the breakdown voltage VBD of the light receiving element 100.

[0016] The transistor 26 is configured, for example, as a p-type MOS (Metal Oxide Semiconductor) transistor that operates in the saturation region and performs passive quenching by functioning as a quenching resistor. A power supply voltage VE is supplied to the transistor 26. The transistor 26 may also be configured using a pull-up resistor or the like instead of a p-type MOS transistor.

[0017] Furthermore, the pixel 10 may have another transistor (not shown) connected to the cathode of the light receiving element 100, the input terminal of the inverter 24, and the drain of the transistor 26. For example, the source of the other transistor is connected to ground (GND), and a control signal is supplied to the gate of the other transistor from a pixel drive unit (not shown) that drives the pixel 10. More specifically, when the pixel 10 is an effective pixel, a Lo (Low) control signal is supplied to the gate of the transistor from the pixel drive unit. On the other hand, when the pixel 10 is not an effective pixel, a Hi (High) control signal is supplied to the gate of the transistor from the pixel drive unit. Note that, here, an effective pixel is a pixel that is in a state where it can detect light, while a pixel that is not an effective pixel is a pixel that is not in a state where it does not detect light.

[0018] The inverter 24 is composed of, for example, a NOT gate, and outputs a Hi signal PFout when the voltage VS from the cathode of the light receiving element 100 as an input signal is Lo, and outputs a Lo signal PFout when the voltage VS from the cathode is Hi.

[0019] In the embodiment of the present disclosure, the light receiving element 100 may be a light receiving element (photodiode) having the polarity reversed relative to the light receiving element 100 shown in FIG. 1 , and FIG. 2 shows an example of a circuit configuration of a pixel 10 when such a light receiving element is used. Specifically, the pixel 10 shown in FIG. 2 also includes the light receiving element 100, an inverter 24, and a transistor 26. Specifically, the light receiving element 100 shown in FIG. 2 is a light receiving element having the polarity reversed from that of the light receiving element 100 shown in FIG. 1 , and has an anode electrically connected to the input terminal of the inverter 24 and the drain of the transistor 26. In addition, in FIG. 2 , the transistor 26 is, for example, an n-type MOS transistor, and the inverter 24 is, for example, a NOT gate.

[0020] Next, the operation when the pixel 10 is an effective pixel will be described with reference to Fig. 3. Fig. 3 is a graph showing the change in the cathode voltage VS of the light receiving element 100 in response to incident light and the detection signal PFout. Here, the operation of the pixel 10 shown in Fig. 1 will be described.

[0021] First, when pixel 10 is an effective pixel, a transistor (not shown) is set to off by a low control signal. At times before time t0, the cathode of light-receiving element 100 is supplied with power supply voltage VE, and the anode is supplied with power supply VDD. Therefore, a reverse voltage greater than breakdown voltage VBD is applied to light-receiving element 100, setting light-receiving element 100 in Geiger mode. In this state, the cathode voltage VS of light-receiving element 100 is equal to power supply voltage VE.

[0022] When light is incident on the light receiving element 100 set to the Geiger mode, avalanche multiplication occurs, causing a current to flow through the light receiving element 100. Specifically, at time t0, when avalanche multiplication occurs and a current flows through the light receiving element 100, a current also flows through the p-type MOS transistor 26 acting as a constant current source, causing a voltage drop due to the resistance component of the transistor 26.

[0023] Furthermore, when the cathode voltage VS of the light-receiving element 100 becomes lower than 0 V, a reverse voltage smaller than the breakdown voltage VBD is applied to the light-receiving element 100, thereby stopping the avalanche amplification. Here, the current generated by the avalanche amplification flows through the transistor 26, causing a voltage drop, and the cathode voltage VS becomes lower than 0 V due to the voltage drop, thereby stopping the avalanche amplification, which is called a quench operation.

[0024] Then, when the avalanche amplification stops at time t2, the current flowing through the transistor 26 gradually decreases, and at time t4, the cathode voltage VS recovers to the original power supply voltage VE, and the photodetector 100 is ready to detect light anew (recharge operation).

[0025] For example, the inverter 24 outputs a Lo (Low) PFout signal when the cathode voltage VS, which is the input voltage, is equal to or higher than a predetermined threshold voltage Vth (=VE / 2), and outputs a Hi (High) PFout signal when the cathode voltage VS is lower than the predetermined threshold voltage Vth. In the example shown in FIG. 3 , a Hi (High) PFout signal is output during the period from time t1 to time t3.

[0026] When the pixel 10 is not an effective pixel, a high control signal is supplied from a pixel drive unit (not shown) to the gate of the transistor (not shown), turning on the transistor. As a result, the cathode voltage VS of the light receiving element 100 becomes 0 V (GND), and the anode-cathode voltage of the light receiving element 100 becomes equal to or lower than the breakdown voltage VBD. Therefore, even if light is incident on the light receiving element 100, no current is generated.

[0027] <1.2 Detailed Configuration of Light Receiving Element> Next, with reference to FIG. 4 , an example of a detailed configuration of the light receiving element 100 of the pixel 10 that can be used for distance measurement according to an embodiment of the present disclosure will be described. FIG. 4 is a schematic cross-sectional view illustrating an example of a detailed configuration of the light receiving element 100. Note that FIG. 4 is a schematic representation to make it easier to understand the positional relationship of the components, and may differ from the actual cross section. In the following description, the light receiving element 100 will be described as a back-illuminated type in which light is incident from the upper surface (back surface) side of FIG. 4 . However, the light receiving element 100 is not limited to a back-illuminated type, and may also be a front-illuminated type in which light is incident via a wiring layer (not shown) provided on the surface of a semiconductor substrate.

[0028] 4 shows a cross-sectional view of the light-receiving element 100, mainly showing the structure related to the semiconductor substrate 200. The upper side of FIG. 4 is the back surface 200a of the semiconductor substrate 200, on which the on-chip lens 102 and the like are formed. Furthermore, the back surface 200a serves as a light-receiving surface onto which reflected light from an object is incident. Meanwhile, the lower side of FIG. 4 is the front surface 200b of the semiconductor substrate 200, on which an insulating film 230 is formed, on which wiring (not shown) is provided to connect to a circuit that drives the light-receiving element 100 and the like.

[0029] 4, the light-receiving element 100 has a well region 202, an n-type semiconductor region 210, a p-type semiconductor region 212, a hole accumulation film 204, a high-concentration n-type semiconductor region 220, and a high-concentration p-type semiconductor region 222, which are provided in a semiconductor substrate 200 made of a silicon substrate. Furthermore, as shown in Fig. 4, the light-receiving element 100 has an element isolation portion 108 that surrounds the light-receiving element 100 and isolates it from other adjacent light-receiving elements 100, and a light-shielding film 206 that shields light from other adjacent light-receiving elements 100. The elements of the light-receiving element 100 will be described below in order.

[0030] The well region 202 is a region with a low impurity concentration in the semiconductor substrate 200 having n-type or p-type conductivity, and absorbs light to generate charge 350 through photoelectric conversion. A pn ​​junction is formed between the p-type semiconductor region 212 and the n-type semiconductor region 210 in contact with the well region 202. A depletion layer formed in the region where the p-type semiconductor region 212 and the n-type semiconductor region 210 are junctioned forms the multiplication region 250 described above. The generated charge 350 is amplified in the multiplication region 250.

[0031] Furthermore, the n-type semiconductor region 210 has, in its center, a high-concentration n-type semiconductor region 220, which is a high-concentration n-type semiconductor region formed from the surface 200b side of the semiconductor substrate 200 to a predetermined depth. The high-concentration n-type semiconductor region 220 functions as a cathode for supplying a positive voltage for forming the multiplication region 250. Therefore, the high-concentration n-type semiconductor region 220 is connected to a cathode electrode 266 provided with an insulating film 230.

[0032] The hole accumulation film 204 is a p-type semiconductor region formed to cover the side surface of the well region 202, and is capable of accumulating positive charges (holes). Specifically, the accumulated holes cause electrons resulting from the interface state between the element isolation portion 108 and the semiconductor substrate 200 to recombine with the accumulated holes and disappear, thereby preventing the electrons from diffusing into the multiplication region 250. As a result, the hole accumulation film 204 can reduce the influence of dark current resulting from the interface state.

[0033] Furthermore, a high-concentration p-type semiconductor region 222, which has a high concentration of p-type impurities, is provided in a region of the hole accumulation film 204 near the surface 200b of the semiconductor substrate 200. The high-concentration p-type semiconductor region 222 functions as an anode. Therefore, the high-concentration p-type semiconductor region 222 is connected to an anode electrode 260 provided with an insulating film 230.

[0034] The element isolation portion 108 is made of, for example, an insulating material. The light-shielding film 206 is made of, for example, a metal material. By providing the element isolation portion 108 and the light-shielding film 206, electrical and optical crosstalk between adjacent light-receiving elements 100 can be reduced.

[0035] Although the above-described light-receiving element 100 has been described as having a structure in which electrons are read out as signal charges (electric charges), the present invention is not limited to this and may have a structure in which holes are read out. In this case, each semiconductor region of the light-receiving element 100 has a conductivity type that is the inverse of the above-described conductivity type.

[0036] 1.3 Configuration Example of Photodetection Device The pixel 10 described above can be applied to, for example, a pixel of a photodetection device 501 shown in FIG. 5. Here, with reference to FIG. 5, a configuration example of the photodetection device 501 will be described. FIG. 5 is a block diagram showing a configuration example of the photodetection device 501. As shown in FIG. 5, for example, the photodetection device 501 has a pixel drive unit 511, a pixel array unit 512, a MUX (multiplexer) 513, a time measurement unit 514, and an input / output unit 515. Details of each block included in the photodetection device 501 will be described in order below.

[0037] (Pixel Driving Unit 511) In the pixel array unit 512 described later, the pixels 10 are arranged in a matrix, and pixel driving lines 522 are wired in the horizontal direction for each row of the pixels 10. The pixel driving unit 511 drives each pixel 10 by supplying a predetermined driving signal to each pixel 10 via the pixel driving lines 522. Specifically, the pixel driving unit 511 can perform control to make some of the multiple pixels 10 arranged two-dimensionally in a matrix effective pixels, at a timing according to a light-emission timing signal supplied from the outside via the input / output unit 515 described later.

[0038] (Pixel Array Unit 512) The pixel array unit 512 has a configuration in which pixels 10, which detect light and output a detection signal PFout indicating the detection result as a pixel signal, are two-dimensionally arranged in a matrix in the row and column directions. The number of rows and columns of the pixels 10 in the pixel array unit 512 is not limited to the number shown in FIG. 4 . As described above, a pixel drive line 522 is wired horizontally for each pixel row in the matrix-like pixel arrangement of the pixel array unit 512. Although the pixel drive line 522 is shown as a single wire, it may also be configured with multiple wires. One end of the pixel drive line 522 is connected to an output terminal of the pixel drive unit 511 corresponding to each pixel row.

[0039] (MUX 513) The MUX 513 can select an output from an effective pixel in accordance with switching between effective pixels and non-effective pixels in the pixel array unit 512, and output the pixel signal input from the selected effective pixel to the time measurement unit 514, which will be described later.

[0040] (Time Measurement Unit 514) The time measurement unit 514 generates a count value corresponding to the time from when a light emission source emits light to when an effective pixel detects the light, based on the pixel signal of the effective pixel supplied from the MUX 513 and a light emission timing signal indicating the light emission timing of a light emission source (not shown). The light emission timing signal is supplied from the outside via the input / output unit 515, which will be described later.

[0041] (Input / Output Unit 515) The input / output unit 515 outputs the count value of the effective pixels supplied from the time measurement unit 514 as a pixel signal to the outside. The input / output unit 515 also supplies a light emission timing signal supplied from the outside to the pixel drive unit 511 and the time measurement unit 514.

[0042] 1.4 Configuration Example of a Distance Measuring System The optical detection device 501 described above can be applied to, for example, a distance measuring system 611 shown in FIG. 6 . Here, an example configuration of the distance measuring system 611 will be described with reference to FIG. 6 . FIG. 6 is a block diagram showing an example configuration of the distance measuring system 611 incorporating the optical detection device 501. The distance measuring system 611 is a system that captures a distance image using, for example, the ToF method. Here, the distance image is an image that detects the depth distance from the distance measuring system 611 to a subject for each pixel and is composed of distance pixel signals based on the detected distance. In more detail, as shown in FIG. 6 , the distance measuring system 611 includes an illumination device 621 and an imaging device 622. Below, the details of each block included in the distance measuring system 611 will be sequentially described.

[0043] (Lighting Device 621) As shown in Fig. 6 , the lighting device 621 has a lighting control unit 631 and a light source 632. The lighting control unit 631 controls the light emission pattern of the light source 632 under the control of the control unit 642 of the imaging device 622. Specifically, the lighting control unit 631 controls the light emission pattern of the light source 632 in accordance with an emission code included in an emission signal supplied from the control unit 642. For example, the emission code is composed of two values, 1 (High) and 0 (Low), and the lighting control unit 631 turns on the light source 632 when the emission code value is 1 and turns off the light source 632 when the emission code value is 0.

[0044] The light source 632 emits light in a predetermined wavelength range under the control of the illumination control unit 631. The light source 632 may be, for example, an infrared laser diode. The type of light source 632 and the wavelength range of the emitted light may be set as desired depending on the application of the distance measurement system 611, etc.

[0045] (Image capture device 622) The image capture device 622 is a device that receives reflected light that is generated when light (irradiated light) emitted from the lighting device 621 is reflected by the subject 612, the subject 613, etc. As shown in FIG. 6 , the image capture device 622 has an image capture unit 641, a control unit 642, a display unit 643, and a storage unit 644.

[0046] 6, the imaging unit 641 has a lens 651, a signal processing circuit 653, and a photodetector 501. The lens 651 can form an image of incident light on the light receiving surface of the photodetector 501. The lens 651 may have any configuration, and for example, the lens 651 may be formed of a group of multiple lenses.

[0047] The photodetector 501 can be the photodetector 501 described above. Under the control of the control unit 642, the photodetector 501 receives reflected light from the subjects 612, 613, etc., and supplies the resulting pixel signal to the signal processing circuit 653. The pixel signal indicates a digital count value that counts the time from when the illumination device 621 emits irradiation light to when the photodetector 501 receives the light. A light emission timing signal that indicates the timing at which the light source 632 emits light is supplied from the control unit 642 to the photodetector 501.

[0048] The signal processing circuit 653 processes pixel signals supplied from the photodetector 501 under the control of the control unit 642. For example, the signal processing circuit 653 detects the distance to the subjects 612 and 613 for each pixel based on the pixel signals supplied from the photodetector 501, and generates a distance image indicating the distance to the subjects 612 and 613 for each pixel 10. Specifically, the signal processing circuit 653 acquires the time (count value) from when the light source 632 emits light to when each pixel 10 of the photodetector 501 receives the light multiple times (e.g., thousands to tens of thousands of times) for each pixel 10. The signal processing circuit 653 creates a histogram corresponding to the acquired time. Then, by detecting peaks in the histogram, the signal processing circuit 653 determines the time it takes for the light emitted from the light source 632 to be reflected by the subject 612 or the subject 613 and return. Furthermore, the signal processing circuit 653 performs calculations to determine the distance to the subjects 612 and 613 based on the determined time and the speed of light. The signal processing circuit 653 supplies the generated distance image to the control unit 642 .

[0049] The control unit 642 is configured with a control circuit and a processor, such as a field programmable gate array (FPGA) or a digital signal processor (DSP). The control unit 642 controls the illumination control unit 631 and the photodetector 501. Specifically, the control unit 642 supplies an irradiation signal to the illumination control unit 631 and a light emission timing signal to the photodetector 501. The light source 632 emits irradiation light in response to the irradiation signal. The light emission timing signal may be the irradiation signal supplied to the illumination control unit 631. The control unit 642 also supplies the distance image acquired from the imaging unit 641 to the display unit 643, causing the display unit 643 to display the distance image. The control unit 642 also stores the distance image acquired from the imaging unit 641 in the memory unit 644. The control unit 642 also outputs the distance image acquired from the imaging unit 641 to an external device.

[0050] The display unit 643 is, for example, a panel display device such as a liquid crystal display device or an organic EL (Electro Luminescence) display device.

[0051] The storage unit 644 can be configured with any storage device or storage medium, and stores distance images and the like.

[0052] <1.5 Background> Next, before describing the details of the embodiments of the present disclosure, the details of the background that led the inventors to create the embodiments of the present disclosure will be described with reference to Fig. 7. Fig. 7 is an explanatory diagram that describes the background of the embodiments of the present disclosure.

[0053] As described above, the SPAD applies a voltage greater than the breakdown voltage VBD to the SPAD, thereby avalanching the charge (electrons) 350 and outputting the amplified signal voltage VS. Because the breakdown voltage VBD varies due to external factors such as temperature, it is necessary to appropriately adjust the voltage applied to the SPAD in order to maintain the detection level of the SPAD signal at a desired level. For this reason, in the prior art, in addition to the ranging SPAD, a reference SPAD is provided, whose reference voltage is monitored for adjustment. In the prior art, the voltage of the cathode or anode of the reference SPAD is measured, and the voltage of the cathode or anode of the ranging SPAD is adjusted based on the measured value, thereby maintaining the detection level of the ranging SPAD signal at a desired level even when external factors fluctuate.

[0054] An example of the change in cathode voltage obtained by operating the reference SPAD multiple times at a predetermined count rate is shown in Figure 7. In the prior art, for example, the cathode voltage of the reference SPAD is operated multiple times to obtain multiple cathode voltage values. Then, in the prior art, these values ​​are averaged and the anode voltage of the ranging SPAD is adjusted based on the average value.

[0055] In the prior art, the signal voltage VS generated by externally incident light or noise is detected by the SPAD, and therefore, for example, when there is little external incident light or little noise, the cathode voltage of the reference SPAD cannot be stably measured. In such cases, it is conceivable to provide a mechanism (e.g., a waveguide) to stabilize the amount of light incident on the reference SPAD, but this would result in the structure within the SPAD and the circuit configuration of the photodetector becoming more complex and larger. Furthermore, it is conceivable to increase the number of operations of the reference SPAD, but this would increase the power consumption of the photodetector 501.

[0056] In view of the above circumstances, the present inventors have come up with the embodiments of the present disclosure. The details of the embodiments of the present disclosure created by the present inventors will be described below one by one.

[0057] 8A , detailed configurations of elements 100a and 100b included in pixel 10a and pixel 10b according to the first embodiment of the present disclosure will be described. In this embodiment, the pixel array unit 512 described above includes a pixel (second pixel) 10a and a pixel (first pixel) 10b in addition to a ranging pixel (fourth pixel) 10 that generates a photoelectric effect due to light incident from outside. The pixel (second pixel) 10a includes an element 100a (described later) and is a reference pixel whose cathode voltage is monitored to adjust the anode voltage of the ranging pixel 10. The pixel (first pixel) 10b also includes an element 100b (described later) and is a supply pixel that supplies photons to element 100a by inducing hot carrier emission when a predetermined voltage greater than a breakdown voltage VBD is applied. 8A is a cross-sectional view showing an example of the configuration of elements 100a and 100b according to this embodiment. Specifically, the upper part of FIG. 8A shows a cross-sectional view of elements 100a and 100b cut along the film thickness direction of semiconductor substrate 200, and the lower part of FIG. 8A shows a cross-sectional view of elements 100a and 100b cut along line A-A' shown in the upper part of FIG. 8A.

[0058] 8A , the elements 100a and 100b according to this embodiment are provided adjacent to each other and have a configuration similar to that of the light receiving element 100 of the ranging pixel 10 described above. In detail, the elements 100a and 100b have a well region 202, n-type semiconductor regions (second semiconductor layers) 210a and 210b, p-type semiconductor regions (first semiconductor layers) 212a and 212b, a hole accumulation film 204, a high-concentration n-type semiconductor region 220, and a high-concentration p-type semiconductor region 222 provided in a semiconductor substrate 200 made of a silicon substrate. 8A, the elements 100a and 100b have an element isolation portion 108 that surrounds the elements 100a and 100b and isolates them from the adjacent elements 100, 100a, and 100b, and a light-shielding film (light-shielding wall) 206 that blocks light from the adjacent elements 100, 100a, and 100b. Details of the elements 100a and 100b will be described below.

[0059] The well region (light absorption layer) 202 is a region in the semiconductor substrate 200 where impurities having n-type conductivity (second conductivity type) or p-type conductivity (first conductivity type) are thinly present, and absorbs light and generates charges 350 through photoelectric conversion. Specifically, in this embodiment, the element 100a can absorb photons supplied from the element 100b and generate charges 350.

[0060] In the elements 100a and 100b, a pn junction is formed between the p-type semiconductor regions 212a and 212b and the n-type semiconductor regions 210a and 210b in contact with the well region 202. In the elements 100a and 100b, the multiplication region 250 is formed by a depletion layer generated in the region where the p-type semiconductor regions 212a and 212b and the n-type semiconductor regions 210a and 210b join. The charge 350 generated by the photoelectric effect is amplified in the multiplication region 250.

[0061] Furthermore, in the device 100b, a predetermined voltage greater than the breakdown voltage VBD is applied to the pn junction, and the charge is avalanche-amplified in the multiplication region, inducing hot carrier light emission and enabling light emission. The photons generated in the device 100b are then incident on the device 100a. Additionally, in the device 100b, the generated photons are absorbed in the well region 202 of the device 100b, generating charge 350. The generated charge 350 is then multiplied in the multiplication region 250 of the device 100b, resulting in a large current flowing through the device 100b. Therefore, hot carrier light emission is more likely to occur in the device 100b.

[0062] In this embodiment, the n-type impurity concentrations in the n-type semiconductor regions 210a and 210b of the elements 100a and 100b are the same, and the p-type impurity concentrations in the p-type semiconductor regions 212a and 212b of the elements 100a and 100b are the same. This makes it possible to simultaneously fabricate the elements 100a and 100b, thereby suppressing increases in the manufacturing time and manufacturing costs of the photodetector 501.

[0063] Furthermore, the n-type semiconductor regions 210a, 210b have, in their central portions, a high-concentration n-type semiconductor region 220, which is a high-concentration n-type semiconductor region formed from the surface 200b side of the semiconductor substrate 200 to a predetermined depth. The high-concentration n-type semiconductor region 220 functions as a cathode for supplying a positive voltage for forming the multiplication region 250. Therefore, the high-concentration n-type semiconductor region 220 is connected to cathode electrodes 262, 264 provided in the insulating film 230.

[0064] The hole accumulation film 204 is a p-type semiconductor region formed to cover the side surface of the well region 202, and is capable of accumulating holes. Specifically, the accumulated holes cause electrons resulting from the interface state between the element isolation portion 108 and the semiconductor substrate 200 to recombine with the accumulated holes and disappear, thereby preventing the electrons from diffusing into the multiplication region 250. As a result, the hole accumulation film 204 can reduce the influence of dark current resulting from the interface state.

[0065] Furthermore, a high-concentration p-type semiconductor region 222, which has a high concentration of p-type impurities, is provided in a region of the hole accumulation film 204 near the surface 200b of the semiconductor substrate 200. The high-concentration p-type semiconductor region 222 functions as an anode. Therefore, the high-concentration p-type semiconductor region 222 is connected to an anode electrode 260 provided in the insulating film 230.

[0066] The element isolation portion 108 and the light-shielding film 206 are provided between the elements 100, 100a, and 100b. The element isolation portion 108 is made of, for example, a silicon oxide film (SiO ２ The light-shielding film 206 is made of an insulating material such as tungsten (W).

[0067] 8A , in the elements 100a and 100b, an on-chip lens 102 and the like are formed on a rear surface 200a of a semiconductor substrate 200. The rear surface 200a serves as a light-receiving surface onto which reflected light from an object is incident. On the other hand, an insulating film 230 is formed on the front surface 200b side of the semiconductor substrate 200, on which wiring (not shown) is provided to connect to circuits and the like that drive the elements 100a and 100b.

[0068] Next, the circuit configuration of the pixel 10a and pixel 10b according to this embodiment will be described with reference to Fig. 8B, which is a circuit diagram showing the circuit configuration of the pixel 10a and pixel 10b according to this embodiment.

[0069] As shown in FIG. 8B , the pixel 10a includes a pn junction formed by a p-type semiconductor region 212a and an n-type semiconductor region 210a, indicated as a diode 32a in the figure, an inverter 24, and a transistor 26a. Specifically, the pn junction indicated as the diode 32a has a cathode (second terminal) electrically connected to the input terminal of the inverter 24 and the drain of the transistor 26. In this embodiment, the voltage generated at the cathode is measured (monitored). Furthermore, the pn junction indicated as the diode 32a has an anode (first terminal) connected to ground, and is supplied with a power supply voltage via the transistor 26. Note that the pixel 10a has a circuit configuration basically similar to that of the pixel 10 shown in FIG. 1 , and therefore a description of the circuit operation will be omitted here.

[0070] On the other hand, as shown in FIG. 8B , pixel 10b includes a pn junction, designated as diode 32b, which is formed by a p-type semiconductor region 212b and an n-type semiconductor region 210b, and transistors 28 and 30. Specifically, the pn junction designated as diode 32b has a cathode (second terminal) electrically connected to the drain of transistor 28 and an anode (first terminal) connected to ground. In this embodiment, a predetermined voltage greater than the breakdown voltage VBD is applied between the cathode and anode of the pn junction designated as diode 32b by, for example, transistor 28 connected to a constant voltage source, causing avalanche amplification and a continuous large current flow. Therefore, hot carrier light emission is induced in pixel 10b. Specifically, in this embodiment, a predetermined voltage greater than that applied to the pn junction of pixel 10a is applied to the pn junction designated as diode 32b. Furthermore, the cathode of the pn junction shown as diode 32b is connected to transistor 30, which is connected to a constant voltage source or ground, and light emission can be stopped by switching transistor 30 to stop avalanche amplification. In this way, light emission can be stopped when the cathode voltage is not being measured, and an increase in power consumption of the photodetector device 501 can be suppressed.

[0071] In this embodiment, photons generated by hot carrier emission from element 100b are incident on element 100a, which stably generates charge within element 100a and avalanche amplifies it, allowing element 100a to stably output a voltage signal VS. As a result, in this embodiment, the cathode voltage of element 100a can be stably measured, thereby enabling the anode voltage of the distance-measuring light-receiving element 100 to be suitably controlled. Furthermore, in this embodiment, photons generated by hot carrier emission from element 100b are incident on element 100a, so the number of operations of element 100a, which serves as reference pixel 10a, is not reduced even in dark places. Furthermore, in this embodiment, elements 100a and 100b basically have the same configuration as light-receiving element 100, which prevents the elements and the entire circuit from becoming more complex or larger.

[0072] In the above description, the n-type semiconductor regions 210a and 210b of the elements 100a and 100b have the same n-type impurity concentration, and the p-type semiconductor regions 212a and 212b of the elements 100a and 100b have the same p-type impurity concentration. However, this embodiment is not limited to this. For example, in this embodiment, the n-type semiconductor regions 210a and 210b of the elements 100a and 100b may have different n-type impurity concentrations, and the p-type semiconductor regions 212a and 212b of the elements 100a and 100b may have different p-type impurity concentrations. Specifically, in this embodiment, the impurity concentrations in the n-type semiconductor region 210b and the p-type semiconductor region 212b of the element 100b may be adjusted to lower the breakdown voltage VBD of the element 100b compared to that of the element 100a. In this manner, in this embodiment, hot carrier light emission can be induced in element 100b even when the same voltage as that applied to element 100a is applied to element 100b. Therefore, according to this embodiment, it is possible to apply the same voltage to elements 100a and 100b to operate them, and therefore the circuit configuration of the photodetector 501 can be simplified.

[0073] In this embodiment, the elements 100a and 100b are not limited to the shapes shown in FIGS. 8A and 8B, but can be modified into various shapes.

[0074] <2.2 Modifications> (Modification 1) Next, with reference to Fig. 9A , a detailed configuration of the elements 100a and 100b included in the pixel 10a and pixel 10b according to Modification 1 of this embodiment will be described. Fig. 9A is a cross-sectional view showing an example of the configuration of the elements 100a and 100b according to Modification 1. In detail, the upper part of Fig. 9A shows a cross-sectional view of the elements 100a and 100b taken along the film thickness direction of the semiconductor substrate 200, and the lower part of Fig. 9A shows a cross-sectional view of the elements 100a and 100b taken along line A-A' shown in the upper part of Fig. 9A.

[0075] 9A , the n-type semiconductor region 210b of the element 100b is positioned closer to the element 100a than the center of the element 100b, thereby bringing the pn junction of the element 100b closer to the element 100a. According to the first modification, this arrangement makes it easier for photons generated in the element 100b to be incident on the element 100a, and electric charges are stably generated in the element 100a, causing avalanche amplification, so that the element 100a can stably output the voltage signal VS.

[0076] Furthermore, this modified example 1 may have a configuration as shown in Fig. 9B. Fig. 9B is a cross-sectional view showing an example of the configuration of elements 100a and 100b according to this modified example 1, and more specifically, shows a cross-sectional view of elements 100a and 100b taken along line A-A' shown in the upper part of Fig. 9A.

[0077] In the example shown in Figure 9B, the n-type semiconductor region 210b of the element 100b is closer to the element 100a than the center of the element 100b, and the n-type semiconductor region 210b has a rectangular shape with its long side along the boundary between the elements 100a and 100b. In the example shown in Figure 9B, the pn junction is provided along the element 100a, making it easier for photons generated in the element 100b to be incident on the element 100a. Charge is stably generated within the element 100a, and avalanche amplification occurs, allowing the element 100a to stably output the voltage signal VS. Note that in this first modification, the shape of the n-type semiconductor regions 210a and 210b is not limited to a circular shape and may be rectangular, polygonal, or the like.

[0078] (Modification 2) Next, a detailed configuration of elements 100a and 100b included in pixels 10a and 10b according to Modification 2 of this embodiment will be described with reference to Fig. 10. Fig. 10 is a cross-sectional view showing an example of the configuration of elements 100a and 100b according to Modification 2. In detail, the upper part of Fig. 10 shows a cross-sectional view of elements 100a and 100b cut along the film thickness direction of semiconductor substrate 200, and the lower part of Fig. 10 shows a cross-sectional view of elements 100a and 100b cut along line A-A' shown in the upper part of Fig. 10.

[0079] In this second modification, as shown in FIG. 10 , the n-type semiconductor region 210b and the p-type semiconductor region 212b of the element 100b are disposed closer to the surface 200b of the semiconductor substrate 200 than the n-type semiconductor region 210a and the p-type semiconductor region 212a of the element 100a. According to this second modification, the p-n junction of the element 100b is located closer to the surface 200b of the semiconductor substrate 200, which makes it easier for electrons from surface defects to enter the p-n junction and more likely to cause avalanche amplification. As a result, in this second modification, a large current flows through the element 100b, which more easily induces hot carrier light emission, and photons generated in the element 100b are more likely to be incident on the element 100a. Therefore, according to this second modification, the element 100a stably generates charge and undergoes avalanche amplification, allowing the element 100a to stably output the voltage signal VS.

[0080] (Modification 3) Next, a detailed configuration of elements 100a and 100b included in pixels 10a and 10b according to Modification 3 of the present embodiment will be described with reference to Fig. 11. Fig. 11 is a cross-sectional view showing an example of the configuration of elements 100a and 100b according to Modification 3, and more specifically, shows a cross-sectional view of elements 100a and 100b cut along the film thickness direction of a semiconductor substrate 200.

[0081] 11 , the element isolation portion 108 and the light-shielding film 206 are not provided between the element 100a and the element 100b. According to the present modification 3, this configuration makes it easier for photons from the element 100b to be incident on the element 100a without being reflected by the light-shielding film 206, and electric charges are stably generated in the element 100a and avalanche-amplified, so that the element 100a can stably output the voltage signal VS.

[0082] (Modification 4) Next, a detailed configuration of elements 100a and 100b included in pixels 10a and 10b according to Modification 4 of the present embodiment will be described with reference to Fig. 12. Fig. 12 is a cross-sectional view showing an example of the configuration of elements 100a and 100b according to Modification 4, and more specifically, shows a cross-sectional view of elements 100a and 100b cut along the film thickness direction of a semiconductor substrate 200.

[0083] 12 , in the present modification 4, the back surface 200a of the semiconductor substrate 200 of the element 100b is provided with a metal film 104, but no on-chip lens 102. According to the present modification 4, this configuration makes it possible to prevent photons generated in the element 100b from being reflected by the metal film 104 and passing above the element 100b. Therefore, the generated photons are more likely to be incident on the element 100a, and charges are stably generated in the element 100a, causing avalanche amplification, so that the element 100a can stably output the voltage signal VS.

[0084] (Modification 5) Next, a detailed configuration of the elements 100a and 100b included in the pixel 10a and pixel 10b according to Modification 5 of the present embodiment will be described with reference to Fig. 13. Fig. 13 is a cross-sectional view showing an example of the configuration of the elements 100a and 100b according to Modification 4, and more specifically, shows a cross-sectional view of the elements 100a and 100b cut along the film thickness direction of the semiconductor substrate 200.

[0085] 13 , in the present modification 5, a portion of the surface of the well region 202 located on the back surface 200a side of the semiconductor substrate 200 of the element 100b is recessed inward, and a metal film 104 is buried in the recessed portion. According to the present modification 5, this increases the density of crystal defects at the interface of the recessed portion of the well region 202, making it easier for charges (electrons) 350 to be generated. Therefore, in the present modification 5, the generated charges 350 are multiplied at the pn junction within the element 100b, causing a large current to flow and making it easier for hot carrier light emission to occur.

[0086] (Modification 6) Next, the circuit configuration of the pixel 10a and pixel 10b according to Modification 6 of the present embodiment will be described with reference to Fig. 14. Fig. 14 is a circuit diagram showing the circuit configuration of the pixels 10a and 10b according to Modification 6.

[0087] 14 , in the sixth modification, both the pixels 10a and 10b have pn junctions formed by p-type semiconductor regions 212a and 212b and n-type semiconductor regions 210a and 210b, which are shown as diodes 32a and 32b, inverters 24 and 24b, and transistors 26a, 28, 30, and 30a. That is, in the sixth modification, the pixels 10a and 10b have the same circuit configuration. In the sixth modification, by providing a switching circuit (not shown) that controls the transistors 26a, 28, 30, and 30a, the pixels 10a and 10b can be operated as reference pixels or as source pixels.

[0088] <<3. Second Embodiment>> <3.1 Detailed Configuration> Next, a detailed configuration of elements 100a and 100b according to a second embodiment of the present disclosure will be described with reference to FIG. 15 . FIG. 15 is a cross-sectional view illustrating an example of the configuration of elements 100a and 100b according to this embodiment. In detail, the upper part of FIG. 15 shows a cross-sectional view of elements 100a and 100b cut along the film thickness direction of semiconductor substrate 200, and the lower part of FIG. 15 shows a cross-sectional view of elements 100a and 100b cut along line A-A′ shown in the upper part of FIG. 15 .

[0089] In this embodiment, as shown in Fig. 15, elements 100a and elements 100b are arranged alternately. In this manner, elements 100b that supply photons are arranged on both sides of element 100a, making it easier for photons from element 100b to be incident on element 100a. As a result, according to this embodiment, charge is stably generated in element 100a and avalanche amplification occurs, allowing element 100a to stably output voltage signal VS.

[0090] In this embodiment, the elements 100a and 100b are not limited to the form shown in FIG. 15, but can be modified into various forms.

[0091] <3.2 Modifications> (Modification 1) Next, a detailed configuration of the elements 100a and 100b according to Modification 1 of this embodiment will be described with reference to Fig. 16. Fig. 16 is a cross-sectional view showing an example of the configuration of the elements 100a and 100b according to Modification 1. In detail, the upper part of Fig. 16 shows a cross-sectional view of the elements 100a and 100b taken along the film thickness direction of the semiconductor substrate 200, and the lower part of Fig. 16 shows a cross-sectional view of the elements 100a and 100b taken along line A-A' shown in the upper part of Fig. 16.

[0092] As shown in FIG. 16 , in this first modification, one element 100b is sandwiched between two elements 100a. This ensures that element 100a is always adjacent to element 100b, making it easier for photons from hot carrier light emission in element 100b to be incident on element 100a. As a result, according to this first modification, charges are stably generated within element 100a, and avalanche amplification occurs, allowing element 100a to stably output voltage signal VS. Additionally, according to this first modification, it is possible to arrange as many elements 100a as necessary within a limited area of ​​semiconductor substrate 200.

[0093] (Modification 2) Next, a detailed configuration of elements 100a and 100b according to Modification 2 of this embodiment will be described with reference to Fig. 17. Fig. 17 is a cross-sectional view showing an example of the configuration of elements 100a and 100b according to Modification 2. In detail, the upper part of Fig. 17 shows a cross-sectional view of elements 100a and 100b cut along the film thickness direction of semiconductor substrate 200, and the lower part of Fig. 17 shows a cross-sectional view of elements 100a and 100b cut along line A-A' shown in the upper part of Fig. 17.

[0094] 17 , in this modification 2, a plurality of elements 100a are arranged to surround one element 100b. In this manner, a plurality of elements 100a can be arranged around one element 100b, and therefore, it is possible to arrange as many elements 100a as necessary in a limited area of ​​the semiconductor substrate 200.

[0095] (Variation 3) Next, a detailed configuration of elements 100a and 100b according to Variation 3 of this embodiment will be described with reference to Fig. 18. Fig. 18 is a cross-sectional view showing an example of the configuration of elements 100a and 100b according to Variation 3. In detail, the upper part of Fig. 18 shows a cross-sectional view of elements 100a and 100b cut along the film thickness direction of semiconductor substrate 200, and the lower part of Fig. 18 shows a cross-sectional view of elements 100a and 100b cut along line A-A' shown in the upper part of Fig. 18.

[0096] As shown in FIG. 18 , in this third modification, four elements 100a are arranged in a 2×2 pattern, with elements 100b, smaller in size than the elements 100a, being placed between adjacent elements 100a. This ensures that elements 100a are always adjacent to elements 100b, making it easier for photons generated by hot carrier light emission in elements 100b to be incident on elements 100a. As a result, according to this third modification, charges are stably generated within elements 100a, and avalanche amplification occurs, allowing elements 100a to stably output voltage signals VS. Additionally, according to this third modification, it is possible to arrange as many elements 100a as necessary within a limited, narrow area of ​​the semiconductor substrate 200.

[0097] <<4. Third Embodiment>> <4.1 Detailed Configuration> Next, with reference to FIG. 19A , a detailed configuration of an element 100c included in a pixel 10c according to a third embodiment of the present disclosure will be described. In this embodiment, the pixel array unit 512 described above includes a pixel (third pixel) 10c in addition to the distance measurement pixel (fourth pixel) 10 described above, which generates a photoelectric effect due to light incident from the outside. The pixel 10c is a reference pixel whose cathode voltage is monitored to adjust the anode voltage of the distance measurement pixel 10, and also a source pixel that supplies photons by inducing hot carrier emission when a predetermined voltage capable of causing a charge amplification phenomenon is applied. FIG. 19A is a cross-sectional view illustrating an example of the configuration of the element 100c according to this embodiment. In detail, the upper part of FIG. 19A shows a cross-sectional view of the element 100c cut along the film thickness direction of the semiconductor substrate 200, and the lower part of FIG. 19A shows a cross-sectional view of the element 100c cut along line A-A′ shown in the upper part of FIG. 19A.

[0098] As shown in FIG. 19A , the element 100 c according to this embodiment mainly includes a well region 202, a plurality of n-type semiconductor regions 210 a, 210 b, a p-type semiconductor region 212, a hole accumulation film 204, a high-concentration n-type semiconductor region 220, and a high-concentration p-type semiconductor region 222, which are provided in a semiconductor substrate 200 made of a silicon substrate.

[0099] In this embodiment, a predetermined voltage (specifically, a voltage greater than the breakdown voltage VBD) capable of causing charge amplification is applied to the pn junction formed by the p-type semiconductor region 212 and the n-type semiconductor region 210b, inducing hot carrier light emission and enabling light emission. The photons thus generated are absorbed in the well region 202 within the same element 100c, generating charge 350 through the photoelectric effect. The charge 350 is then multiplied by the pn junction formed by the p-type semiconductor region 212 and the n-type semiconductor regions 210a, 210b of the element 100c. Note that in this embodiment, the number of each of the multiple n-type semiconductor regions 210a, 210b is not limited to the form shown in FIG. 19A .

[0100] 19A, in this embodiment, for example, n-type semiconductor regions 210a and 210b are arranged close to the four corners of the element 100c. Note that in this embodiment, the positions of the n-type semiconductor regions 210a and 210b are not limited to the form shown in FIG.

[0101] Next, the circuit configuration of the pixel 10c according to this embodiment will be described with reference to Fig. 19B, which is a circuit diagram showing the circuit configuration of the pixel 10c according to this embodiment.

[0102] 19B , pixel 10c includes a pn junction formed by a p-type semiconductor region 212 and n-type semiconductor regions 210a and 210b, shown as diodes 32a and 32b, an inverter 24, and transistors 26, 28, and 30. Specifically, the pn junction formed by the p-type semiconductor region 212 and n-type semiconductor region 210a, shown as diode 32a, has a cathode (second terminal) electrically connected to the input terminal of the inverter 24 and the drain of transistor 26. The cathode is the high-concentration n-type semiconductor region 220 of the n-type semiconductor region 210a, and the voltage generated at the cathode is measured (monitored). Furthermore, the pn junction formed by the p-type semiconductor region 212 and n-type semiconductor region 210a, shown as diode 32a, has an anode (first terminal) connected to ground, and is supplied with a power supply voltage via transistor 26.

[0103] Furthermore, the pn junction formed by the p-type semiconductor region 212 and the n-type semiconductor region 210b, shown as diode 32b, has a cathode electrically connected to the drain of transistor 28. The cathode is a high-concentration n-type semiconductor region 220 of n-type semiconductor region 210b, and is also connected to transistor 30, which is connected to a constant voltage source or ground. By switching transistor 30, avalanche amplification can be stopped, thereby stopping light emission.

[0104] In this embodiment, photons are generated within one element 100c by hot carrier emission, and the photons are used to stably generate and avalanche-amplify charge 350, allowing the element 100c to stably output a voltage signal VS. As a result, in this embodiment, the cathode voltage of the element 100c can be stably measured, making it possible to suitably control the anode voltage of the ranging light-receiving element 100. Furthermore, in this embodiment, photons generated by hot carrier emission in the element 100c are used, so the number of operations of the element 100c, which serves as the reference pixel 10c, is not reduced even in a dark place. Furthermore, according to this embodiment, the number of reference pixels and supply pixels can be reduced compared to the embodiments described above, making it possible to arrange more ranging pixels 10 in the pixel array unit 512 described above.

[0105] In this embodiment, the element 100c is not limited to the form shown in FIGS. 19A and 19B, but can be modified into various forms.

[0106] 19C is a cross-sectional view illustrating an example of the configuration of the element 100c according to the modification of the present embodiment, and more specifically, illustrates a cross-sectional view of the element 100c cut parallel to the substrate surface of the semiconductor substrate 200.

[0107] 19C , in this modification, multiple n-type semiconductor regions 210a are arranged to surround one n-type semiconductor region 210b. In this manner, photons due to hot carrier emission at the p-n junction between the n-type semiconductor region 210b and the p-type semiconductor region 212 are absorbed by the surrounding well region 202, and the charges generated therein are more likely to be incident on the p-n junction between the n-type semiconductor region 210a and the p-type semiconductor region 212. Therefore, according to this modification, the element 100c can stably cause avalanche amplification and stably output the voltage signal VS.

[0108] 5. Fourth Embodiment Next, with reference to FIG. 20 , a detailed configuration of an element 100d according to a fourth embodiment of the present disclosure will be described. In this embodiment, the pixel array unit 512 described above includes a pixel (third pixel) 10d having an element 100d, in addition to the distance measurement pixel (fourth pixel) 10 described above, which generates a photoelectric effect due to light incident from outside. The pixel 10d is a reference pixel whose cathode voltage is monitored to adjust the anode voltage of the distance measurement pixel 10, and also a source pixel that supplies photons by inducing hot carrier emission when a predetermined voltage capable of causing a charge amplification phenomenon is applied. FIG. 20 is a cross-sectional view illustrating an example of the configuration of the element 100d according to this embodiment, specifically, a cross-sectional view of the element 100d cut along the film thickness direction of the semiconductor substrate 200.

[0109] As shown in FIG. 20 , the element 100d according to this embodiment has a well region 202, a plurality of n-type semiconductor regions 210a and 210b, p-type semiconductor regions 212a and 212b, a hole accumulation film 204, a high-concentration n-type semiconductor region 220, and a high-concentration p-type semiconductor region 222, which are provided in a semiconductor substrate 200.

[0110] In this embodiment, the pn junction between the p-type semiconductor region 212b and the n-type semiconductor region 210b can function as a light-emitting portion in which hot carrier light emission is induced by application of a predetermined voltage (specifically, a voltage greater than the breakdown voltage VBD) capable of causing a charge amplification phenomenon. Furthermore, photons generated at the pn junction between the p-type semiconductor region 212b and the n-type semiconductor region 210b are absorbed in the well region 202 to generate charge 350. Furthermore, the pn junction between the p-type semiconductor region 212b and the n-type semiconductor region 210b can function as a multiplication region that multiplies the generated charge 350. In other words, the well region 202, the p-type semiconductor region 212b, and the n-type semiconductor region 210b form a light-receiving portion (first light-receiving portion) that receives light, generates charge, and multiplies it.

[0111] In this embodiment, the pn junction of the p-type semiconductor region 212b and the n-type semiconductor region 210b, which is the light-emitting portion, is located closer to the surface 200b of the semiconductor substrate 200 than the well region 202, the p-type semiconductor region 212b, and the n-type semiconductor region 210b, which are the light-receiving portion. Furthermore, the light-emitting portion may be surrounded by a metal film 270. By providing such a metal film 270, photons generated in the light-emitting portion are absorbed in the well region 202 without leaking to the adjacent elements 100 and 100d.

[0112] In this embodiment, photons are generated within one element 100d by hot carrier emission, and the photons are used to stably generate charge 350, which is then avalanche amplified. This allows the element 100d to stably output a voltage signal VS. As a result, in this embodiment, the cathode voltage of the element 100d can be stably measured, making it possible to suitably control the anode voltage of the ranging light receiving element 100. Furthermore, in this embodiment, photons generated by hot carrier emission in the element 100d are used, so the number of operations of the element 100d, which serves as the reference pixel 10d, is not reduced, even in dark places. Furthermore, according to this embodiment, the number of reference pixels and supply pixels can be reduced compared to the embodiments described above, making it possible to arrange more ranging pixels 10 in the pixel array unit 512 described above.

[0113] In this embodiment, the element 100d is not limited to the form shown in FIG. 20, but can be modified into various forms.

[0114] <<6. Fifth Embodiment>> The fifth embodiment of the present disclosure is an embodiment created by further considering the fourth embodiment described above. A detailed configuration of an element 100e included in a pixel 10e according to the fifth embodiment of the present disclosure will be described with reference to FIG. 21A . In this embodiment, the pixel array unit 512 described above includes a pixel (third pixel) 10e having an element 100e in addition to the ranging pixel (fourth pixel) 10 described above, which generates a photoelectric effect due to light incident from the outside. The pixel 10e is a reference pixel whose cathode voltage is monitored to adjust the anode voltage of the ranging pixel 10, and also a source pixel that supplies photons by inducing hot carrier emission when a predetermined voltage capable of causing a charge amplification phenomenon is applied. FIG. 21A is a cross-sectional view illustrating an example of the configuration of an element 100e according to this embodiment. In detail, the upper part of Figure 21A shows a cross-sectional view of element 100e cut along the film thickness direction of semiconductor substrate 200, and the lower part of Figure 21A shows a cross-sectional view of element 100e cut along line A-A' shown in the upper part of Figure 21A.

[0115] 21A , the element 100e according to this embodiment includes a well region 202, an n-type semiconductor region (second semiconductor layer) 210, a p-type semiconductor region (first semiconductor layer) 212, a hole accumulation film 204, a high-concentration n-type semiconductor region 220, and a high-concentration p-type semiconductor region 222, which are provided in a semiconductor substrate 200 made of a silicon substrate. Furthermore, as shown in FIG. 21A , in this embodiment, the element 100e includes an element isolation portion 108 that surrounds the element 100e and isolates it from adjacent elements 100 and 100e, and a light-shielding film (light-shielding wall) 206 that shields light from the adjacent elements 100 and 100e.

[0116] 21A , in the element 100e according to this embodiment, an on-chip lens 102 and the like are formed on a rear surface 200a of a semiconductor substrate 200. Furthermore, the rear surface 200a serves as a light-receiving surface onto which reflected light from an object is incident. Meanwhile, a substrate 300 is provided on a front surface 200b side of the semiconductor substrate 200, and a plurality of transistors 310 and 312 are provided within the substrate 300.

[0117] In this embodiment, a predetermined voltage capable of causing a charge amplification phenomenon, specifically, a predetermined voltage near the threshold voltage, is applied to the transistor (first transistor) 310 in the substrate 300, thereby inducing hot carrier light emission. That is, in this embodiment, the transistor 310 can function as a light-emitting portion. In this embodiment, the conductivity type of the transistor 310 is not particularly limited, but it is preferably an n-type MOS transistor because light emission is easily induced therein. In addition, in this embodiment, the function of the transistor 312 is not particularly limited, and it can be, for example, a transistor that functions as a constant current source, a transistor that functions to read out the generated charge 350, or the like.

[0118] In this embodiment, photons generated in the transistor 310, which is the light-emitting portion, are absorbed in the well region 202, generating charge 350. Furthermore, in this embodiment, the pn junction between the p-type semiconductor region 212 and the n-type semiconductor region 210 in the semiconductor substrate 200 functions as a multiplication region that multiplies the charge 350 generated in the well region 202. That is, the well region 202, the p-type semiconductor region 212, and the n-type semiconductor region 210 form a light-receiving portion (first light-receiving portion) that receives light, generates charge, and multiplies the charge. In this embodiment, the transistor 310, which is the light-emitting portion, is located on the surface 200b side of the semiconductor substrate 200 relative to the light-receiving portion. Furthermore, in this embodiment, it is preferable that the transistor 310 be located as close as possible to the light-receiving portion. This arrangement makes it easier for photons from the transistor 310 to be incident on the well region 202.

[0119] 21A, in this embodiment, for example, one transistor 310 and three transistors 312 are arranged close to the four corners of the element 100e. Note that in this embodiment, the number and arrangement of these transistors 310 and 312 are not limited to the form shown in FIG.

[0120] Next, the circuit configuration of the pixel 10e according to this embodiment will be described with reference to Fig. 21B, which is a circuit diagram showing the circuit configuration of the pixel 10e according to this embodiment.

[0121] As shown in FIG. 21B , pixel 10e includes a pn junction formed by a p-type semiconductor region 212 and an n-type semiconductor region 210, indicated as diode 32a, an inverter 24, a constant current source 26e, and a transistor 34. Specifically, the pn junction indicated as diode 32a has a cathode (second terminal) electrically connected to the input terminal of the inverter 24 and the drain of the transistor 26. The cathode is the high-concentration n-type semiconductor region 220 of the n-type semiconductor region 210a, and the voltage generated at the cathode is measured (monitored). Furthermore, the pn junction indicated as diode 32a has an anode (first terminal) connected to ground and connected to constant current source 26e. Furthermore, transistor 34 is the aforementioned transistor 310, and hot carrier light emission is induced by applying a predetermined voltage Vg near the threshold voltage to the gate.

[0122] In this embodiment, photons are generated within a single element 100e by hot carrier emission, and the photons are used to stably generate and avalanche-amplify charge 350, allowing the element 100e to stably output a voltage signal VS. As a result, in this embodiment, the cathode voltage of the element 100e can be stably measured even in a dark place, thereby enabling the anode voltage of the ranging light receiving element 100 to be suitably controlled. Furthermore, in this embodiment, photons generated by hot carrier emission in the element 100e are used, so the number of operations of the element 100e, which serves as the reference pixel 10e, is not reduced even in a dark place. Furthermore, according to this embodiment, the number of reference pixels and supply pixels can be reduced compared to the embodiments described above, allowing a greater number of ranging pixels 10 to be arranged in the pixel array unit 512 described above.

[0123] In this embodiment, the element 100e is not limited to the form shown in FIGS. 21A and 21B, but can be modified into various forms.

[0124] <<7. Sixth Embodiment>> <7.1 Detailed Configuration> Next, with reference to FIG. 22 , a detailed configuration of an element 100f included in a pixel 10f according to a sixth embodiment of the present disclosure will be described. In this embodiment, the pixel 10f is a distance measurement pixel (fourth pixel) 10 that generates a photoelectric effect due to light incident from the outside. Note that the pixel 10f does not emit hot carrier light, and therefore appears darker than the pixel 10e that emits hot carrier light. FIG. 22 is a cross-sectional view illustrating an example of the configuration of the elements 100e and 100f according to this embodiment, specifically a cross-sectional view of the elements 100e and 100f cut along the film thickness direction of the semiconductor substrate 200. Note that in this embodiment, the element 100e included in the pixel 10e is the same as that in the fifth embodiment, and therefore description thereof will be omitted.

[0125] 22 , the element 100 f according to this embodiment has a well region 202, an n-type semiconductor region 210, a p-type semiconductor region 212, a hole accumulation film 204, a high-concentration n-type semiconductor region 220, and a high-concentration p-type semiconductor region 222, which are provided in a semiconductor substrate 200 made of a silicon substrate. Furthermore, as shown in FIG. 22 , the element 100 f has an element isolation portion 108, a light-shielding film 206, and an on-chip lens 102. Furthermore, in the element 100 f according to this embodiment, a substrate 300 is provided on the front surface 200 b side of the semiconductor substrate 200, and a plurality of transistors 310 a, 312 are provided in the substrate 300.

[0126] In this embodiment, the pn junction between the p-type semiconductor region 212 and the n-type semiconductor region 210 in the semiconductor substrate 200 functions as a multiplication region that multiplies the charge 350 generated in the well region 202. That is, in the element 100f, the well region 202, the p-type semiconductor region 212, and the n-type semiconductor region 210 form a light-receiving portion (second light-receiving portion) that receives light, generates charge, and multiplies it. Furthermore, in this embodiment, the transistor 310a is provided in the same manner as the transistor 310 in the element 100e, but does not perform any particular function. Therefore, it is preferable that the terminals of the transistor 310a are short-circuited. The function of the transistor 312 is not particularly limited, and it can be, for example, a transistor that functions as a constant current source, a transistor that functions to read out the generated charge 350, or the like.

[0127] That is, in this embodiment, the element 100f has substantially the same shape as the element 100e. In this embodiment, by making the element 100f have substantially the same shape as the element 100e, it becomes easier to make the performance of the elements 100 of each pixel 10 in the pixel array unit 512 uniform, and it is possible to suppress variations in the characteristics of the elements 100.

[0128] In this embodiment, the elements 100e and 100f are not limited to the form shown in FIG. 22, but can be modified into various forms.

[0129] <7.2 Modifications> (Modification 1) Next, a detailed configuration of elements 100e and 100f included in pixels 10e and 10f according to Modification 1 of this embodiment will be described with reference to Fig. 23A. Fig. 23A is a cross-sectional view showing an example of the configuration of elements 100e and 100f according to Modification 1, and more specifically, shows a cross-sectional view of elements 100e and 100f cut along the film thickness direction of a semiconductor substrate 200. Note that in Modification 1, pixel 10e is the same as in the fifth embodiment, and therefore description thereof will be omitted.

[0130] 23A, like the element 100f of the present embodiment, the element 100f of this modification 1 has a plurality of transistors 310b, 312 provided within a substrate 300. Furthermore, in this modification 1, the transistor 310b can be operated as a gating transistor that drives the element 100e, and therefore the terminals of the transistor 310b are not short-circuited.

[0131] Next, the circuit configuration of pixel 10f according to Modification 1 will be described with reference to Fig. 23B. Fig. 23B is a circuit diagram showing the circuit configuration of pixels 10e and 10f according to this embodiment. Note that in Modification 1, pixel 10e is the same as in the fifth embodiment, and therefore description thereof will be omitted.

[0132] 21B, pixel 10f includes a pn junction formed by a p-type semiconductor region 212 and an n-type semiconductor region 210, shown as diode 32a, inverter 24, constant current source 26e, and transistor 36. Transistor 36 is transistor 310b described above, and operates as a gating transistor that drives element 100e.

[0133] That is, in this modified example, the element 100f has substantially the same shape as the element 100e. In the present embodiment, by making the element 100f have substantially the same shape as the element 100e, it becomes easier to make the performance of the elements 100 of each pixel 10 in the pixel array section 512 uniform, and it is possible to suppress variations in the characteristics of the elements 100.

[0134] (Modification 2) Next, the detailed configuration of elements 100e and 100f according to Modification 2 of this embodiment will be described with reference to Fig. 24. Fig. 24 is a cross-sectional view showing an example of the main parts of the configuration of elements 100e and 100f according to Modification 2, and more specifically, an enlarged view of regions A and B shown in Fig. 23A.

[0135] In this second modification, as shown in FIG. 24 , the transistor (second transistor) 310b of the element 100f has a semiconductor layer 320 in which a channel is provided, a gate 340, a drain 330, and a source 332. Furthermore, the drain 330 of the transistor 310b is provided with an LDD (Lightly Doped Drain) 322 as an electric field alleviation layer. Also, in this second modification, as shown in FIG. 24 , the transistor (first transistor) 310 of the element 100e also has a semiconductor layer 320 in which a channel is provided, a gate 340, a drain 330, and a source 332. However, the drain of the transistor 310 of the element 100e does not have the LDD 322. In this second modification, because the transistor 310b of the element 100f does not emit hot carrier light, the LDD 322 may be provided to alleviate the electric field generated in the transistor 310b.

[0136] <<8. Seventh Embodiment>> Next, with reference to FIGS. 25A and 25B , a detailed configuration of elements 100e and 100f included in pixels 10e and 10f according to a seventh embodiment of the present disclosure will be described. FIG. 23A is a cross-sectional view illustrating an example of the configuration of elements 100e and 100f according to this embodiment, specifically a cross-sectional view of the elements 100e and 100f cut along the film thickness direction of a semiconductor substrate 200. FIG. 25B is a cross-sectional view illustrating an example of the configuration of elements 100e and 100f according to this embodiment, specifically a cross-sectional view of the elements 100e and 100f cut along line A-A′ shown in FIG. 25A . Note that in this embodiment, the element 100e of pixel 10e is the same as in the fifth embodiment, and therefore a description thereof will be omitted.

[0137] As shown in FIGS. 25A and 25B, in the device 100f according to this embodiment, only a transistor 310b is provided on the substrate 300 on the front surface 200b side of the semiconductor substrate 200.

[0138] In this embodiment, element 100f is provided with only transistor 310b and not transistor 312, so that additional circuits, etc. can be placed in the vacant space, thereby improving the functionality of the circuits built into, for example, photodetector device 501.

[0139] In this embodiment, the elements 100e and 100f are not limited to the shapes shown in FIGS. 25A and 25B, but can be modified into various shapes.

[0140] 9. Eighth Embodiment Next, a detailed configuration of an element 100e included in a pixel 10e according to an eighth embodiment of the present disclosure will be described with reference to Fig. 26. Fig. 26 is a cross-sectional view showing an example of the configuration of the element 100e according to this embodiment, and more specifically, shows a cross-sectional view of the element 100e cut along the film thickness direction of the semiconductor substrate 200.

[0141] In this embodiment, a diode 310c may be used instead of the transistor 310. In this embodiment, when a predetermined voltage is applied to the diode 310c, hot carrier light emission is induced, and the diode 310c can function as a light-emitting portion. Note that in this embodiment, the light-emitting portion is not limited to the transistor 310 or the diode 310c, and may be any element having an electrode structure with two or more terminals. Specifically, the light-emitting portion may be a pn junction element such as a diode, or an element such as a transistor that has an electric field distribution inside and is capable of emitting light by hot carrier light emission and recombination.

[0142] When the diode 310c is used as the light-emitting portion, the area of ​​the diode 310c can be reduced because the diode 310c has a two-terminal structure. Also, when the transistor 310 is used as the light-emitting portion, an electric field can be applied in the vertical direction (the film thickness direction of the substrate 300), which makes it easier for photons due to hot carrier light emission to be incident on the well region 202.

[0143] In this embodiment, the element 100e is not limited to the form shown in FIG. 26, but can be modified into various forms.

[0144] <<10. Ninth Embodiment>> Next, a detailed configuration of an element 100e included in a pixel 10e according to a ninth embodiment of the present disclosure will be described with reference to Fig. 27. Fig. 27 is a cross-sectional view showing an example of the configuration of the element 100e according to this embodiment, and more specifically, shows a cross-sectional view of the element 100e cut along the film thickness direction of the semiconductor substrate 200.

[0145] 27 , a light-shielding film (light-shielding wall) 360 is provided to surround the transistors 310 and 312. The light-shielding film 360 can prevent photons due to hot carrier light emission in the transistor 310 from leaking to the adjacent elements 100 f and 100 e. The light-shielding film 360 can be made of a metal material such as aluminum (Al) or tungsten (W), or can be made of a light-absorbing material.

[0146] According to this embodiment, when photons from element 100e are incident on element 100f, it is possible to prevent deterioration of the dark characteristics of element 100f, such as when element 100f detects light other than light from the outside.

[0147] In this embodiment, the element 100e is not limited to the form shown in FIG. 27, but can be modified into various forms.

[0148] <<11. Tenth Embodiment>> Next, a detailed configuration of an element 100e included in a pixel 10e according to a tenth embodiment of the present disclosure will be described with reference to Fig. 28. Fig. 28 is a cross-sectional view showing an example of the configuration of the element 100e according to this embodiment, and more specifically, shows a cross-sectional view of the element 100e cut along the film thickness direction of the semiconductor substrate 200.

[0149] 28 , the back surface 200a of the semiconductor substrate 200 of the element 100e is not provided with an on-chip lens 102, but is provided with a light-shielding film 352. The light-shielding film 352 can prevent photons caused by hot carrier light emission in the transistor 310 from leaking to the adjacent elements 100f and 100e. The light-shielding film 360 can be made of a metal material such as aluminum (Al) or tungsten (W), or can be made of a light-absorbing material.

[0150] According to this embodiment, by doing so, it is possible to prevent photons from the transistor 310 from being reflected by the light-shielding film 352 and passing upward. Furthermore, according to this embodiment, it is possible to stably operate the element 100e, which is the pixel 10e that serves as the reference pixel, without depending on the amount of light incident from outside. As a result, according to this embodiment, it is possible to appropriately measure the cathode voltage of the element 100e, thereby improving the accuracy of the anode voltage control of the element 100f of the ranging pixel 10f.

[0151] In this embodiment, the element 100e is not limited to the form shown in FIG. 28, but can be modified into various forms.

[0152] 29 , an eleventh embodiment of the present disclosure will be described, which relates to the operation of a photodetection device 501 that can cause the pixel 10 e to function as a reference pixel only in a dark place. FIG. 29 is an explanatory diagram illustrating the operation of the photodetection device 501 according to this embodiment.

[0153] As shown in FIG. 29, the photodetector 501 according to this embodiment can include a light-emitting element control circuit unit 400 that controls the light-emitting unit of the pixel 10e, a light-emitting element 402 that is the light-emitting unit of the pixel 10e, a SPAD 404 that is the light-receiving unit of the pixel 10e, an inverter 406, a counter circuit 410, and a threshold count determination unit 412.

[0154] First, in a dark place, the light-emitting element control circuit 400 references the count rate of the ranging pixel 10 (pixel 10f) and causes the light-emitting element 402 to emit light. Light (photons) from the light-emitting element 402 is incident on the SPAD 404 and generates an electric charge. The amount of generated electric charge is then measured by the counter circuit 410 via the inverter 406. The measured amount of electric charge is then compared with a predetermined threshold by the threshold count determination unit 412. If the measured amount of electric charge is lower than the predetermined threshold, the light-emitting element control circuit 400 causes the light-emitting element 402 to emit light again. This operation is then repeated until the amount of electric charge reaches the threshold. In this embodiment, the count rate of the pixel 10e, which is the reference pixel, under completely shaded conditions is set to be higher than the count rate of the ranging pixel 10 (pixel 10f).

[0155] In this embodiment, even in a dark place, the SPAD 404 of the pixel 10e serving as a reference pixel can be stably operated, and the cathode voltage value of the SPAD 404 of the pixel 10e serving as a reference pixel can be obtained with high accuracy. As a result, in this embodiment, the anode voltage of the element 100f of the ranging pixel 10f can be controlled with high accuracy based on the cathode voltage. Furthermore, in this embodiment, the light-emitting element 402 is caused to emit light only until the cathode voltage value of the SPAD 404 of the pixel 10e serving as a reference pixel can be obtained with high accuracy, thereby reducing the power consumption of the photodetector device 501.

[0156] <<13. Summary>> As described above, in each embodiment of the present disclosure, photons generated by hot carrier emission in the element 100 included in the reference pixel 10 or the source pixel 10 are incident on the element 100 of the reference pixel 10, causing stable generation of charge and avalanche amplification in the element 100 of the reference pixel 10. Therefore, in each embodiment of the present disclosure, the element 100 of the reference pixel 10 can stably output the voltage signal VS. As a result, in each embodiment of the present disclosure, the cathode voltage of the element 100 of the reference pixel 10 can be stably measured, making it possible to suitably control the anode voltage of the light receiving element 100 used for ranging. Furthermore, in each embodiment of the present disclosure, photons generated by hot carrier emission in the element 100 included in the reference pixel 10 or the source pixel 10 are used, so the number of operations of the element 100 serving as the reference pixel 10 is not reduced even in a dark place.

[0157] In each of the above-described embodiments of the present disclosure, the conductivity types of the semiconductor substrate 200 and the semiconductor regions may be reversed. For example, the present embodiments can be applied to the element 100 that uses holes as signal charges. That is, in the above-described embodiments of the present disclosure, the element 100 is described in which the first conductivity type is p-type, the second conductivity type is n-type, and electrons are used as signal charges. However, the embodiments of the present disclosure are not limited to such examples. For example, the embodiments of the present disclosure can be applied to the element 100 in which the first conductivity type is n-type, the second conductivity type is p-type, and holes are used as signal charges.

[0158] Furthermore, the element 100 according to the embodiment of the present disclosure is not limited to being applied to the light detection device 501 that is applied to the ranging system 611. For example, the element 100 according to the embodiment of the present disclosure may be applied to an imaging device that captures an image by detecting the distribution of incident light amounts of visible light. Furthermore, for example, the present embodiment may be applied to an imaging device that captures an image by detecting the distribution of incident amounts of infrared rays, X-rays, particles, etc., or an imaging device (physical quantity distribution detection device) such as a fingerprint detection sensor that detects the distribution of other physical quantities such as pressure or capacitance and captures the image.

[0159] In addition, in the embodiments of the present disclosure, examples of methods for forming the above-described layers, films, elements, etc. include physical vapor deposition (PVD) and chemical vapor deposition (CVD). Examples of PVD methods include vacuum deposition using resistance heating or high-frequency heating, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, RF (Radio Frequency)-DC (Direct Current) combined bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, high-frequency sputtering, etc.), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, MO (Metal Organic)-CVD, and photo-CVD. Other methods include electrolytic plating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing; stamping; spraying; and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Examples of patterning methods for each layer include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or a laser. Additionally, examples of planarization techniques include a CMP (Chemical Mechanical Polishing) method, a laser planarization method, a reflow method, etc. In other words, the element 100 according to the embodiment of the present disclosure can be manufactured easily and inexpensively using existing semiconductor device manufacturing processes.

[0160] <<14. Application Examples>> The above-described ranging system 611 can be applied to various electronic devices, such as a camera with a ranging function, a smartphone with a ranging function, and an industrial camera installed on a production line. Therefore, with reference to Fig. 30 , a configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described. Fig. 30 is a block diagram showing a configuration example of a smartphone 900 as an electronic device to which the ranging system 611 according to an embodiment of the present disclosure is applied.

[0161] 30 , the smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903. The smartphone 900 also includes a storage device 904, a communication module 905, and a sensor module 907. The smartphone 900 further includes the distance measurement system 611 described above, and also includes an imaging device 909, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. The smartphone 900 may also include a processing circuit such as a DSP (Digital Signal Processor) instead of or in addition to the CPU 901.

[0162] The CPU 901 functions as an arithmetic processing unit and control device, and controls all or part of the operations within the smartphone 900 in accordance with various programs recorded in the ROM 902, RAM 903, storage device 904, etc. The ROM 902 stores programs and calculation parameters used by the CPU 901. The RAM 903 temporarily stores programs used in the execution of the CPU 901 and parameters that change as appropriate during the execution. The CPU 901, ROM 902, and RAM 903 are interconnected by a bus 914. The storage device 904 is a data storage device configured as an example of a storage unit of the smartphone 900. The storage device 904 is configured, for example, by a magnetic storage device such as an HDD (hard disk drive), a semiconductor storage device, an optical storage device, etc. This storage device 904 stores programs executed by the CPU 901, various data, and various data acquired from outside.

[0163] The communication module 905 is a communication interface configured with, for example, a communication device for connecting to a communication network 906. The communication module 905 may be, for example, a communication card for a wired or wireless local area network (LAN), Bluetooth (registered trademark), or wireless USB (WUSB). The communication module 905 may also be a router for optical communication, a router for asymmetric digital subscriber line (ADSL), or a modem for various communications. The communication module 905 transmits and receives signals, for example, between the Internet and other communication devices using a predetermined protocol such as TCP / IP. The communication network 906 connected to the communication module 905 is a wired or wireless network, for example, the Internet, a home LAN, infrared communication, or satellite communication.

[0164] The sensor module 907 includes various sensors such as a motion sensor (e.g., an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biometric information sensor (e.g., a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (e.g., a GNSS (Global Navigation Satellite System) receiver, etc.).

[0165] The distance measurement system 611 is provided on the surface of the smartphone 900, and can obtain, for example, the distance and three-dimensional shape of subjects 612 and 613 facing the surface as distance measurement results.

[0166] The imaging device 909 is provided on the surface of the smartphone 900 and can capture images of an object 800 or the like located around the smartphone 900. Specifically, the imaging device 909 may include an imaging element (not shown) such as a complementary metal-oxide semiconductor (CMOS) image sensor, and a signal processing circuit (not shown) that performs imaging signal processing on a signal photoelectrically converted by the imaging element. Furthermore, the imaging device 909 may further include an optical system mechanism (not shown) including an imaging lens, an aperture mechanism, a zoom lens, a focus lens, and the like, and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. The imaging element collects incident light from subjects 612 and 613 as an optical image, and the signal processing circuit photoelectrically converts the formed optical image for each light receiving element 100, reads out the signal from each light receiving element 100 as an imaging signal, and performs image processing to obtain a captured image. The light receiving element 100 according to an embodiment of the present disclosure may be applied to the imaging device 909.

[0167] The display device 910 is provided on the surface of the smartphone 900 and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display. The display device 910 can display an operation screen, an image captured by the imaging device 909 described above, and the like.

[0168] The speaker 911 can output, for example, telephone call audio and audio accompanying the video content displayed by the display device 910 described above to the user.

[0169] The microphone 912 can collect, for example, the user's voice during a call, voice including commands to activate functions of the smartphone 900, and voice from the surrounding environment of the smartphone 900.

[0170] The input device 913 is a device operated by a user, such as a button, a keyboard, a touch panel, or a mouse. The input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the signal to the CPU 901. By operating the input device 913, the user can input various data to the smartphone 900 and instruct processing operations.

[0171] The above describes an example configuration of the smartphone 900. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be changed as appropriate depending on the technical level at the time of implementation.

[0172] <<15. Supplementary Information>> Although preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modified or altered examples within the scope of the technical idea described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure.

[0173] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0174] Note that the present technology can also be configured as follows. (1) A photodetector device comprising a plurality of pixels arranged in a matrix on a semiconductor substrate, the plurality of pixels including: a first pixel in which hot carrier light emission is induced by application of a predetermined voltage greater than a breakdown voltage; and a second pixel adjacent to the first pixel, in which a voltage generated by a photoelectric effect due to photons from the first pixel is measured. (2) The photodetector device according to (1), wherein each of the plurality of pixels has a first terminal and a second terminal, and the predetermined voltage is applied between the first terminal and the second terminal in the first pixel, and the voltage generated at the second terminal in the second pixel is measured. (3) The photodetector device according to (2), wherein the second terminal of the first pixel is connected to a transistor that operates as a switch to stop light emission of the first pixel. (4) The photodetector according to any one of (1) to (3), wherein each of the plurality of pixels has a junction formed by stacking a first semiconductor layer containing impurities of a first conductivity type and a second semiconductor layer containing impurities of a second conductivity type opposite to the first conductivity type, wherein hot carrier light emission is induced at the junction of the first pixel, and wherein the junction of the second pixel multiplies the charge generated by the photons. (5) The photodetector according to (4), wherein the first semiconductor layers of the first and second pixels have the same impurity concentration, and the second semiconductor layers of the first and second pixels have the same impurity concentration. (6) The photodetector according to (4), wherein the impurity concentrations in at least one of the first and second semiconductor layers are different between the first and second pixels. (7) The photodetector according to any one of (4) to (6), wherein, when viewed from above the semiconductor substrate, the junction of the first pixel is located closer to the second pixel than the center of the first pixel.(8) The photodetector according to any one of (4) to (7), wherein, in a cross section of the semiconductor substrate cut along a film thickness direction of the semiconductor substrate, the junction position of the first pixel is closer to a surface of the semiconductor substrate located opposite to the light-receiving surface than the junction position of the second pixel. (9) The photodetector according to any one of (1) to (8), wherein a light-shielding wall is provided between the first pixel and the second pixel. (10) The photodetector according to any one of (1) to (8), wherein no light-shielding wall is provided between the first pixel and the second pixel. (11) The photodetector according to any one of (1) to (10), wherein a metal film is provided on the light-receiving surface of the semiconductor substrate in the first pixel. (12) The photodetector according to any one of (1) to (11), wherein a part of a light-absorbing layer in the first pixel is recessed. (13) The photodetector according to any one of (1) to (12) above, wherein a pair of the second pixels are arranged to sandwich the first pixel. (14) The photodetector according to any one of (1) to (12) above, wherein a plurality of the second pixels are arranged to surround the first pixel. (15) The photodetector according to any one of (1) to (12) above, wherein, when viewed from above the semiconductor substrate, the size of the first pixel is smaller than the size of the second pixel. (16) The photodetector according to any one of (1) to (5) above, further comprising a switching circuit that switches between a pixel that functions as the first pixel and a pixel that functions as the second pixel, among the plurality of pixels. (17) An electronic device equipped with a photodetector, the photodetector having a plurality of pixels arranged in a matrix on a semiconductor substrate, the plurality of pixels including: a first pixel in which hot carrier light emission is induced by application of a predetermined voltage greater than a breakdown voltage; and a second pixel adjacent to the first pixel in which a voltage generated by a photoelectric effect due to photons from the first pixel is measured.(18) A photodetector comprising a plurality of pixels arranged in a matrix on a semiconductor substrate and detecting light, the plurality of pixels including a third pixel having a light-emitting portion in which hot carrier light emission is induced by application of a predetermined voltage capable of causing a charge amplification phenomenon, and a first light-receiving portion in which a photoelectric effect is caused by photons from the light-emitting portion and a voltage is measured. (19) The photodetector according to (18) above, wherein the plurality of pixels includes a fourth pixel having a second light-receiving portion in which a photoelectric effect is caused by light incident from outside. (20) The photodetector according to (18) or (19) above, wherein the third pixel has a first terminal and at least two or more second terminals, the light-emitting portion is connected to a predetermined number of the second terminals and the first terminal, and the first light-receiving portion is connected to the remaining second terminals and the first terminal, and the voltage generated at the remaining second terminal is measured. (21) The photodetector according to (20), wherein the second terminal of the light-emitting unit is connected to a transistor that operates as a switch to stop the light-emitting unit. (22) The photodetector according to (20) or (21), wherein the third pixel has: a first semiconductor layer containing impurities of a first conductivity type; and a plurality of second semiconductor layers stacked on the first semiconductor layer and containing impurities of a second conductivity type that is opposite to the first conductivity type, and each of the plurality of second semiconductor layers is connected to the second terminal. (23) The photodetector according to (19), wherein, in a cross section of the semiconductor substrate cut along a film thickness direction of the semiconductor substrate, the light-emitting unit is located on a surface of the first light-receiving unit that is opposite to the light-receiving surface of the semiconductor substrate. (24) The photodetector according to (23), wherein the light-emitting unit is composed of a first transistor. (25) The photodetector according to (24), wherein in a cross section of the semiconductor substrate cut along a film thickness direction of the semiconductor substrate, the fourth pixel has a second transistor located on a surface of the second light receiving portion opposite to the light receiving surface of the semiconductor substrate.(26) The photodetector according to (25) above, wherein the first transistor of the third pixel does not include an electric field relaxation layer, and the second transistor of the fourth pixel includes an electric field relaxation layer. (27) The photodetector according to (23) above, wherein the light-emitting portion is made of a diode. (28) The photodetector according to any one of (24) to (26) above, wherein a light-shielding wall is provided so as to surround the first transistor. (29) The photodetector according to any one of (23) to (28) above, wherein a light-shielding film is provided on the light-receiving surface of the semiconductor substrate in the third pixel. (30) An electronic device equipped with a photodetector, the photodetector comprising a plurality of pixels arranged in a matrix on a semiconductor substrate and detecting light, the plurality of pixels including a third pixel having a light-emitting portion in which hot carrier light emission is induced when a predetermined voltage greater than a breakdown voltage is applied, and a first light-receiving portion in which a photoelectric effect is generated by photons from the light-emitting portion and the voltage is measured.

[0175] 10, 10a, 10b, 10c, 10e, 10f Pixel 24, 24b, 406 Inverter 26, 26a, 28, 30, 30a, 34, 36, 310, 310a, 310b, 312 Transistor 26e Constant current source 32a, 32b, 310c Diode 100 Light receiving element 100a, 100b, 100c, 100d, 100e, 100f Element 102 On-chip lens 104, 270 Metal film 108 Element isolation portion 200 Semiconductor substrate 200a Back surface (light receiving surface) 200b Front surface 202 Well region 204 Hole accumulation film 206, 352, 360 Light shielding film 210, 210a, 210b n-type semiconductor region 212, 212a, 212b p-type semiconductor region 220 Highly-doped n-type semiconductor region 222 Highly-doped p-type semiconductor region 230 Insulating film 250 Multiplication region 260 Anode electrode 262, 264, 266 Cathode electrode 300 Substrate 320 Semiconductor layer 322 LDD 330 Drain 332 Source 340 Gate 350 Charge 400 Light-emitting element control circuit unit 402 Light-emitting element 404 SPAD 410 Counter circuit 412 Threshold count determination unit 501 Photodetector 511 Pixel drive unit 512 Pixel array unit 513 MUX 514 Time measurement unit 515 Input / output unit 522 Pixel drive line 611 Distance measurement system 612, 613 Object 621 Illumination device 622 Imaging device 631 Lighting control unit 632 Light source 641 Imaging unit 642 Control unit 643 Display unit 644 Storage unit 651 Lens 653 Signal processing circuit 800 Target object 900 Smartphone 901 CPU 902 ROM 903 RAM 904 Storage device 905 Communication module 906 Communication network 907 Sensor module 909 Imaging device 910 Display device 911 Speaker912 Microphone 913 Input device 914 Bus

Claims

1. A photodetector device comprising a plurality of pixels arranged in a matrix on a semiconductor substrate, the plurality of pixels including: a first pixel in which hot carrier light emission is induced when a predetermined voltage greater than the breakdown voltage is applied; and a second pixel adjacent to the first pixel in which a voltage generated by the photoelectric effect due to photons from the first pixel is measured.

2. The photodetector according to claim 1, wherein each of the plurality of pixels has a first terminal and a second terminal, the predetermined voltage is applied between the first terminal and the second terminal in the first pixel, and the voltage generated at the second terminal in the second pixel is measured.

3. The photodetector device according to claim 2, wherein the second terminal of the first pixel is connected to a transistor that operates as a switch to stop light emission of the first pixel.

4. The photodetector device according to claim 1, wherein each of the plurality of pixels has a junction formed by stacking a first semiconductor layer containing impurities of a first conductivity type and a second semiconductor layer containing impurities of a second conductivity type opposite to the first conductivity type, wherein hot carrier light emission is induced at the junction of the first pixel, and wherein charges generated by the photons are multiplied at the junction of the second pixel.

5. The photodetector device according to claim 4, wherein the impurity concentration in at least one of the first and second semiconductor layers differs between the first and second pixels.

6. The photodetector device according to claim 4, wherein, when viewed from above the semiconductor substrate, the junction of the first pixel is located closer to the second pixel than the center of the first pixel.

7. The photodetector according to claim 4, wherein, in a cross section of the semiconductor substrate cut along the film thickness direction of the semiconductor substrate, the position of the junction of the first pixel is closer to a surface of the semiconductor substrate located opposite to the light-receiving surface than the position of the junction of the second pixel.

8. The photodetection device according to claim 1, wherein no light-shielding wall is provided between the first pixel and the second pixel.

9. The photodetector according to claim 1, wherein a metal film is provided on the light-receiving surface of the semiconductor substrate in the first pixel.

10. The photodetector device according to claim 1, wherein a portion of the light absorption layer in the first pixel is recessed.

11. The photodetector according to claim 1, further comprising a switching circuit that switches between a pixel functioning as the first pixel and a pixel functioning as the second pixel among the plurality of pixels.

12. A photodetection device comprising a plurality of pixels arranged in a matrix on a semiconductor substrate and detecting light, the plurality of pixels including a third pixel having a light-emitting portion in which hot carrier light emission is induced when a predetermined voltage capable of causing a charge amplification phenomenon is applied, and a first light-receiving portion in which a photoelectric effect is produced by photons from the light-emitting portion and the voltage is measured.

13. The photodetector according to claim 12, wherein the plurality of pixels includes a fourth pixel having a second light receiving portion that generates a photoelectric effect when light enters from outside.

14. The photodetector according to claim 12, wherein the third pixel has a first terminal and at least two or more second terminals, the light-emitting portion is connected to a predetermined number of the second terminals and the first terminal, the first light-receiving portion is connected to the remaining second terminals and the first terminal, and the voltage generated at the remaining second terminals is measured.

15. The photodetector device according to claim 14, wherein the third pixel comprises: a first semiconductor layer containing impurities of a first conductivity type; and a plurality of second semiconductor layers stacked on the first semiconductor layer and containing impurities of a second conductivity type opposite to the first conductivity type; and each of the plurality of second semiconductor layers is connected to the second terminal.

16. The photodetector according to claim 13, wherein, in a cross section of the semiconductor substrate cut along the film thickness direction of the semiconductor substrate, the light emitting portion is located on a surface of the first light receiving portion that is located opposite to the light receiving surface of the semiconductor substrate.

17. The photodetector device according to claim 16, wherein the light-emitting portion comprises a first transistor.

18. The photodetector device according to claim 17, wherein, in a cross section of the semiconductor substrate cut along the film thickness direction of the semiconductor substrate, the fourth pixel has a second transistor located on a surface of the second light receiving portion opposite to the light receiving surface of the semiconductor substrate.

19. The photodetector device according to claim 18, wherein the first transistor of the third pixel does not include an electric field relaxation layer, and the second transistor of the fourth pixel includes an electric field relaxation layer.

20. The photodetector according to claim 16, wherein the light-emitting portion comprises a diode.

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