Time synchronization processing method and system

By using cascading search and synchronous K-code processing between the master and slave switches, combined with the anti-interference capability of the fiber optic link, the problems of high cost and insufficient anti-interference capability of time synchronization between devices in the existing technology are solved, and high-precision time synchronization is achieved.

WO2026008014A1PCT designated stage Publication Date: 2026-01-08NO 719 RES INST CHINA STATE SHIPBUILDING CORP LTD
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Patent Information

Application Number
PCT/CN2025/106843
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-04
Filing Date
2025-07-03
Publication Date
2026-01-08

AI Technical Summary

Technical Problem

In existing technologies, time synchronization between devices requires the laying of two physical links, which increases system costs and unnecessary load, and is not suitable for harsh environments and has insufficient anti-interference capabilities.

Method used

The master switch sends a cascading level search frame to the slave switch to obtain the maximum cascading level, and then sends it to the communication node device. The communication node device detects the edge of the pulse signal and converts it into a synchronization K code. Combined with the anti-interference capability of the fiber optic link, time synchronization between devices is achieved.

Benefits of technology

It improves the time synchronization accuracy and anti-interference capability between devices, reduces system costs, and requires only one physical link to achieve time synchronization.

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Abstract

Embodiments of the present disclosure provide a time synchronization processing method and system, applied to the field of control system data communications. The method comprises a master switch sends a cascaded stage number search frame to each slave switch, and the slave switch returns a cascaded stage number response frame to the master switch, and acquires its own cascaded stage number on the basis of the cascaded stage number response frame; the master switch acquires a maximum cascaded stage number on the basis of the cascaded stage number response frame returned from each slave switch; the master switch sends the maximum cascaded stage number to each communication node device mounted on the master switch, and each slave switch sends its own cascaded stage number to each communication node device mounted on the slave switch; a master communication node device receives an externally input pulse signal, simultaneously detects an edge of the pulse signal, and converts the edge of the pulse signal into two types of synchronous K codes to be sent to the master switch; the master switch sends the synchronization K codes to each slave switch and each communication node device mounted on the master switch; and each communication node device mounted on the master switch recovers the corresponding pulse signal on the basis of the types of the synchronization K codes and calculates delay compensation corresponding to each communication node device, such that the recovered pulse signal is subjected to the corresponding delay compensation and then output from an output port of the corresponding communication node device. In this way, the anti-interference capability and time synchronization precision are improved, system costs are reduced, and by means of only one physical link, time synchronization between devices can be implemented while data is transmitted.
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Description

Time synchronization processing method and system TECHNICAL FIELD

[0001] The present disclosure relates to the field of control system data communication, and in particular to a time synchronization processing method and system. BACKGROUND

[0002] The time synchronization process refers to a process in which a device in a system receives absolute time information and then time-synchronizes other devices through a network. The first device usually receives absolute time information in a specific manner, and the time information includes an absolute time code and a pulse signal, and the absolute time code indicates the time corresponding to the rising edge of the pulse signal.

[0003] In the existing solution, after a device receives absolute time information, it realizes time synchronization among all devices in the system by forwarding the pulse signal, and requires that all devices in the network have a time-keeping function, that is, a timer is internally maintained by the device between the reception of two pulse signals to record the local time of the device, and when the next pulse signal is received, the local clock is corrected by adjusting the time information of the timer, thereby realizing time synchronization among devices.

[0004] In the existing solution, in addition to the physical link for transmitting data information between devices, a dedicated link is also needed to deliver the pulse signal, and the link should have certain anti-interference ability and not be easily affected by power fluctuations, low signal noise, and electromagnetic environment changes to generate glitches and interfere with the time synchronization accuracy between devices. This solution requires at least two physical links to be laid, which not only increases the cost of the system but also increases the invalid load of the system, which is not conducive to the application in harsh environments. SUMMARY

[0005] The present disclosure provides a time synchronization processing method, system, device, and storage medium.

[0006] According to a first aspect of the present disclosure, a time synchronization processing method is provided. The method comprises:

[0007] The master switch sends a cascade order search frame to the slave switch, so that the slave switch returns a cascade order response frame to the master switch, and the slave switch acquires its own cascade order according to the cascade order response frame;

[0008] The master switch acquires the maximum cascade order according to the cascade order response frame returned by the slave switch;

[0009] The master switch sends the maximum cascade order to each communication node device mounted by itself, and the slave switch sends its own cascade order to each communication node device mounted by itself;

[0010] The master communication node device receives an externally input pulse signal, detects an edge of the pulse signal and converts the edge of the pulse signal into a synchronization K code sent to the master switch;

[0011] The master switch sends the synchronization K code to each communication node device mounted on the slave switch and the master switch;

[0012] Each communication node device mounted on the master switch recovers a corresponding pulse signal according to a type of the synchronization K code and calculates a corresponding delay compensation of each communication node device, so that the recovered pulse signal is output from a corresponding output port of the corresponding communication node device after the corresponding delay compensation.

[0013] In some implementable manners of the first aspect, the maximum cascade number is obtained, comprising:

[0014] If there is no slave switch, the maximum cascade number is 0.

[0015] In some implementable manners of the first aspect, the method further comprises:

[0016] Each level slave switch receives a cascade level number search frame sent by a cascade upper level switch and sends the cascade level number search frame to a cascade lower level slave switch, so that the cascade lower level slave switch returns a corresponding cascade level number response frame to the master switch level by level respectively;

[0017] The cascade lower level slave switch obtains a cascade level number of itself according to the corresponding cascade level number response frame of itself, and the master switch obtains a maximum cascade level number according to the corresponding cascade level number response frames returned by each slave switch.

[0018] In some implementable manners of the first aspect, the method further comprises:

[0019] Each level slave switch receives a synchronization K code sent by a cascade upper level switch and sends the synchronization K code to each communication node device mounted on a cascade lower level slave switch and the slave switch.

[0020] In some implementable manners of the first aspect, the externally input pulse signal adopts master-backup switching, the master communication node device is configured as a master pulse source, a preset slave communication node device is configured as a backup pulse source, and if the externally input pulse signal is lost, a corresponding switch of the master communication node device switches the master pulse source to the backup pulse source; wherein,

[0021] The switching of the master pulse source to the backup pulse source by the corresponding switch of the master communication node device if the externally input pulse signal is lost comprises:

[0022] If the externally input pulse signal is lost, the master communication node device sends a pulse status frame to the switch corresponding to the master communication node device, and the switch corresponding to the master communication node device switches the main pulse source to the backup pulse source according to the received pulse status frame; if the externally input pulse signal is restored, the switch corresponding to the master communication node device switches the backup pulse source back to the main pulse source.

[0023] In some implementable manners of the first aspect, the calculating the delay compensation corresponding to each communication node device comprises:

[0024] The delay compensation corresponding to each communication node device is calculated according to the maximum cascade number and the cascade number corresponding to the switch where each communication node device is located.

[0025] In some implementable manners of the first aspect, the calculating the delay compensation corresponding to each communication node device according to the maximum cascade number and the cascade number corresponding to the switch where each communication node device is located comprises:

[0026] ΔDelay = pDelay × (Nmax - Nm-c)

[0027] Wherein, ΔDelay is the delay compensation value corresponding to each communication node device, pDelay is the fixed delay value of each cascade of the switch, Nmax is the maximum cascade number, and Nm-c is the cascade number corresponding to the switch where the communication node device is located.

[0028] In some implementable manners of the first aspect, the fixed delay value of each cascade of the switch is the propagation delay time corresponding to the average value of the length of each cascade line.

[0029] According to a second aspect of the present disclosure, a time synchronization processing system is provided. The system comprises:

[0030] The cascade master switch and slave switch, each communication node device mounted on the master switch and the preset master communication node device, and each communication node device mounted on the slave switch; wherein,

[0031] The master switch is configured to send a cascade number search frame to the slave switch, and is further configured to obtain the maximum cascade number according to the cascade number response frame returned by the slave switch, and is further configured to send a synchronization K code to each communication node device mounted on the slave switch and the master switch;

[0032] The slave switch is configured to return a cascade number response frame to the master switch, and is further configured to obtain the cascade number of the slave switch according to the cascade number response frame;

[0033] The master communication node device is configured to receive an externally input pulse signal, detect the pulse signal edge, and convert the pulse signal edge into a synchronization K code and send the synchronization K code to the master switch;

[0034] Each communication node device mounted on the slave switch is configured to receive the cascade level number sent by the slave switch;

[0035] Each communication node device mounted on the master switch is configured to receive the maximum cascade level number sent by the master switch, and is further configured to recover the corresponding pulse signal according to the type of the synchronization K code, and calculate the corresponding delay compensation of each communication node device, so that the recovered pulse signal is output from the output port of the corresponding communication node device after the corresponding delay compensation.

[0036] According to a third aspect of the present disclosure, an electronic device is provided. The electronic device includes at least one processor, and a memory connected with the at least one processor in communication; the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method as described above.

[0037] According to a fourth aspect of the present disclosure, a non-transitory computer readable storage medium storing computer instructions is provided, the computer instructions being used to enable a computer to perform the method as described above.

[0038] In the present disclosure, the immunity of the optical fiber link to electromagnetic interference and the isolation ability to power fluctuations and ground signal ripples are combined with the reasonable scheduling of the FC frame to achieve time synchronization between devices. Specifically, the master switch sends a cascade level number search frame to the slave switch, the slave switch returns a cascade level number response frame to the master switch, and the slave switch obtains its own cascade level number according to the cascade level number response frame. The master switch obtains the maximum cascade level number according to the cascade level number response frame returned by the slave switch, the master switch sends the maximum cascade level number to each communication node device mounted thereon, the slave switch sends its own cascade level number to each communication node device mounted thereon, the master communication node device receives an externally input pulse signal, detects the pulse signal edge, converts the pulse signal edge into two types of synchronization K codes, and sends the two types of synchronization K codes to the master switch, the master switch sends the synchronization K codes to each communication node device mounted on the slave switch and the master switch, each communication node device mounted on the master switch recovers the corresponding pulse signal according to the type of the synchronization K code, and calculates the corresponding delay compensation of each communication node device, and the recovered pulse signal is output from the output port of the corresponding communication node device after the corresponding delay compensation. In this way, the anti-interference ability and the time synchronization accuracy are improved, and the system cost is reduced. Only one physical link is needed to achieve time synchronization between devices while transmitting data.

[0039] It should be understood that the content described in the summary section is not intended to limit or define key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become apparent through the following description. BRIEF DESCRIPTION OF DRAWINGS

[0040] The above and other features, advantages and aspects of embodiments of the present disclosure will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings. The following drawings are provided only for illustration of the embodiments of the present disclosure and thus should not be considered limiting the present disclosure. In the drawings:

[0041] FIG. 1 illustrates a flowchart of a time synchronization processing method according to an embodiment of the present disclosure;

[0042] FIG. 2 illustrates a time synchronization processing diagram of a single switch according to an embodiment of the present disclosure;

[0043] FIG. 3 illustrates a time synchronization processing diagram of three switches connected in cascade according to an embodiment of the present disclosure;

[0044] FIG. 4 illustrates a structure diagram of a time synchronization processing system according to an embodiment of the present disclosure;

[0045] FIG. 5 illustrates a structure diagram of an exemplary electronic device capable of implementing an embodiment of the present disclosure. DETAILED DESCRIPTION

[0046] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only some of the embodiments of the present disclosure, but not all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present disclosure.

[0047] In addition, the term "and / or" herein is only a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after it.

[0048] To solve the problems in the background art, the present disclosure provides a time synchronization processing method and system. Specifically, the master switch sends a cascade level search frame to the slave switch, the slave switch returns a cascade level response frame to the master switch, and the slave switch acquires its own cascade level according to the cascade level response frame; the master switch acquires the maximum cascade level according to the cascade level response frame returned by the slave switch; the master switch sends the maximum cascade level to each communication node device mounted thereby; the slave switch sends its own cascade level to each communication node device mounted thereby; the master communication node device receives an externally input pulse signal, detects the pulse signal edge, converts the pulse signal edge into two types of synchronization K codes, and sends the synchronization K codes to the master switch; the master switch sends the synchronization K codes to the slave switch and each communication node device mounted thereby; each communication node device mounted by the master switch recovers the corresponding pulse signal according to the type of the synchronization K code and calculates the delay compensation corresponding to each communication node device; and the recovered pulse signal is output from the corresponding communication node device output port after the corresponding delay compensation. In this way, the anti-interference capability and time synchronization accuracy are improved, and the system cost is reduced. Only one physical link is needed to achieve time synchronization between devices while transmitting data.

[0049] The time synchronization processing method and system provided by the present disclosure will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0050] FIG. 1 shows a flowchart of a time synchronization processing method provided by the present disclosure, and the method 100 includes the following steps:

[0051] S110, the master switch sends a cascade level search frame to the slave switch, so that the slave switch returns a cascade level response frame to the master switch, and the slave switch acquires its own cascade level according to the cascade level response frame; the master switch acquires the maximum cascade level according to the cascade level response frame returned by the slave switch.

[0052] In some embodiments, in a switch cascade network, the cascade level of the switch in the system is acquired by using a pulse level frame. The bit[31:8] field in the FC frame is a reserved segment, the bit[7:4] field is a switch cascade level field, the bit[3:0] field is a search and response field of the switch cascade level, 1 indicates a frame in which the master switch searches for the cascade level, i.e., a cascade level search frame, and 2 indicates a frame in which the slave switch responds to the cascade level, i.e., a cascade level response frame.

[0053] In some embodiments, the master switch and / or each slave switch is configured and set by software of a power device bus access device.

[0054] In some embodiments, acquiring the maximum cascade level includes:

[0055] If there is no slave switch, the maximum cascade number is 0.

[0056] In some embodiments, the method 100 further comprises:

[0057] Each slave switch receives the cascade number search frame sent by the upper level switch of the cascade and sends the cascade number search frame to the lower level slave switch of the cascade, so that the lower level slave switch of the cascade returns the cascade number response frame corresponding to itself to the master switch respectively;

[0058] The lower level slave switch of the cascade obtains its own cascade number according to the cascade number response frame corresponding to itself, and the master switch obtains the maximum cascade number according to the cascade number response frames corresponding to each slave switch returned.

[0059] For example, the master switch, the first level slave switch, the second level slave switch are cascaded in turn, and so on; the first level slave switch receives the cascade number search frame sent by the master switch through the cascade port and sends the cascade number search frame to the second level slave switch, the second level slave switch sends the cascade number search frame to the third level slave switch through the cascade port, and so on; the third slave switch sends its own cascade number response frame to the second slave switch through the cascade port, the second slave switch sends the cascade number response frame to the first slave switch through the cascade port, and the first slave switch sends the cascade number response frame to the master switch, in this way, the third slave switch obtains its own cascade number; similarly, the second slave switch sends its corresponding cascade number response frame to the first slave switch through the cascade port, and the first slave switch sends the cascade number response frame to the master switch through the cascade port, in this way, the second slave switch obtains its corresponding cascade number; the first slave switch sends its corresponding cascade number response frame to the master switch through the cascade port, in this way, the first slave switch obtains its corresponding cascade number; in this way, each switch can obtain the maximum cascade number according to the cascade number response frames returned by the lower level switch, for example, the master switch obtains the maximum cascade number according to the cascade number response frame of the third slave switch, the cascade number response frame of the second slave switch and the cascade number response frame of the first slave switch.

[0060] S120, the master switch sends the maximum cascade number to each communication node device mounted by itself, and the slave switch sends its own cascade number to each communication node device mounted by itself.

[0061] In some embodiments, each switch sends its corresponding cascade number to each communication node device mounted by itself.

[0062] S130, the master communication node device receives the externally input pulse signal, detects the pulse signal edge and converts the pulse signal edge into a synchronization K code sent to the master switch, and the master switch sends the synchronization K code to each communication node device mounted on the slave switch and the master switch.

[0063] In some embodiments, each level slave switch receives the synchronization K code sent by the cascaded upper level switch and sends the synchronization K code to each communication node device mounted on the cascaded lower level slave switch and the slave switch.

[0064] In some embodiments, the master communication node device is a preset one communication node device mounted on the master switch, and the slave communication node device is another preset communication node device mounted on the master switch except the master communication node device.

[0065] In some embodiments, the master communication node device is configured by a pulse configuration frame and determines the configuration result by a pulse response frame; wherein,

[0066] The bit[31:12] field of the pulse configuration frame is a reserved segment, the bit[11:8] field is a priority field of the configured communication node device, the bit[7:4] field is a priority field of the switch master-slave switching configuration node, the bit[3:0] is a switch master-slave switching configuration node type field, 1 indicates switching the communication node device to the master communication node device, and 2 indicates switching the communication node device to the slave communication node device.

[0067] The bit[31:8] field of the pulse response frame is a reserved segment, the bit[7:4] is a priority field of the response communication node device, and the bit[3:0] is a communication node device response result field, 1 indicates that the communication node device is successfully switched according to the requirement, and 2 indicates that the communication node device fails to switch.

[0068] In some embodiments, before the master communication node device detects the edge of the pulse signal, the received pulse signal is de-bounced by using a de-bouncing filter window.

[0069] In some embodiments, converting the pulse signal edge into a synchronization K code includes:

[0070] The synchronization K code converted from the rising edge is 0xBCAA0001, and the synchronization K code converted from the falling edge is 0xBCAA0002.

[0071] In some embodiments, the two types of synchronization K codes converted are inserted into an FC-AE link data stream for data transmission and sent to the master switch.

[0072] In some embodiments, the externally input pulse signal adopts master-backup switching, the master communication node device is configured as a master pulse source, the preset slave communication node device is configured as a backup pulse source, and if the externally input pulse signal is lost, the switch corresponding to the master communication node device switches the master pulse source to the backup pulse source; wherein,

[0073] If the externally input pulse signal is lost, the master communication node device sends a pulse status frame to the switch corresponding to the master communication node device, and the switch corresponding to the master communication node device switches the master pulse source to the backup pulse source according to the received pulse status frame; if the externally input pulse signal is restored, the switch corresponding to the master communication node device switches the backup pulse source back to the master pulse source.

[0074] If the externally input pulse signal is lost, the master communication node device sends a pulse status frame to the switch corresponding to the master communication node device, and the switch corresponding to the master communication node device switches the master pulse source to the backup pulse source according to the received pulse status frame; if the externally input pulse signal is restored, the switch corresponding to the master communication node device switches the backup pulse source back to the master pulse source.

[0075] In some embodiments, the bit[31:8] field of the pulse status frame is a reserved field, the bit[7:4] field is a priority field of the communication node device in the case of pulse loss or recovery, and the bit[3:0] field is a pulse loss or recovery field of the communication node device, where 1 indicates that the pulse signal of the current master communication node device is lost, and 2 indicates that the pulse signal of the original master communication node device is restored.

[0076] In some embodiments, the attribute information of the master pulse source is configured through a pulse parameter frame; wherein the attribute information includes the number of the switch to which the master pulse source belongs, the port number, the frequency of the master pulse source, and the delay between the master pulse source and the recovered pulse signal.

[0077] The pulse parameter frame is a common FC-AE-ASM message, the SID is 0x00A1A1, the DID is 0xffffff, the bit[31:24] field of the pulse parameter frame is the port number of the switch where the master pulse source is located, and the bit[23:0] field is the device ID of the switch where the master pulse source is located, wherein the delay between the master pulse source and the recovered pulse signal occupies 4 bytes, and the special frame tail occupies 4 bytes.

[0078] S140, each communication node device mounted by the master switch recovers the corresponding pulse signal according to the type of the synchronization K code and calculates the delay compensation corresponding to each communication node device, so that the recovered pulse signal is output from the output port of the corresponding communication node device after the corresponding delay compensation.

[0079] In some embodiments, each communication node mounted by the master switch recovers the rising edge and the falling edge of the pulse according to the type of the synchronization K code, and then synthesizes the pulse signal according to the rising edge and the falling edge, and the synthesized pulse signal is a pulse signal with the same frequency and edge alignment as the input pulse signal.

[0080] In some embodiments, the delay compensation corresponding to each communication node device is calculated by:

[0081] According to the maximum cascade number and the cascade number corresponding to the switch where each communication node device is located, the delay compensation corresponding to each communication node device is calculated.

[0082] In some embodiments, the delay compensation corresponding to each communication node device is calculated by:

[0083] ΔDelay = pDelay × (Nmax - Nm-c)

[0084] Where ΔDelay is the delay compensation value corresponding to each communication node device, pDelay is the fixed delay value of each cascade of the switch, Nmax is the maximum cascade number, and Nm-c is the cascade number corresponding to the switch where the communication node device is located.

[0085] In some embodiments, the fixed delay value of each cascade of the switch is the propagation delay time corresponding to the average value of the length of each cascade line;

[0086] Further, the calculation formula is as follows:

[0087] pDelay = mean(cascade1_len, cascade2_len,..., cascade n_len) × τ

[0088] Where cascade1_len represents the length of the first cascade line, cascade2_len represents the length of the second cascade line, and cascade n_len represents the length of the nth cascade line. mean(cascade1_len, cascade2_len,..., cascade n_len) represents the average value of the length of the first cascade line, the length of the second cascade line,..., and the length of the nth cascade line. τ is the propagation delay time corresponding to 1 meter of cascade line, and the actual measurement value is about 4 ns.

[0089] In some embodiments, the delay time of the communication node device relative to the input filtered pulse signal is calculated by:

[0090] Delay = pDelay × Nm-c

[0091] Where Delay is the delay time of the communication node device relative to the input filtered pulse signal, and pDelay can be set by the switch configuration management software in the case of equal length of each cascade line.

[0092] In some embodiments, the calculation method of the delay time ASdelay between the delay-compensated pulse signal and the input unfiltered pulse signal is as follows:

[0093] ASdelay = filter_window + pDelay x Nmax

[0094] Wherein, filter_window is the de-bounce filter window size, which is set in the switch configuration management software and delivered to each communication node device.

[0095] The above is the introduction of the method embodiment, and the following further describes the scheme of the present disclosure through specific embodiments adopting the method.

[0096] Fig. 2 shows a time synchronization processing schematic diagram of a single switch provided by an embodiment of the present disclosure, as shown in Fig. 2, the switch mounts two communication node devices, i.e. node 1 and node 2, wherein node 1 is configured as a main pulse source, and node 2 is configured as a backup pulse source; when node 1 receives an externally input pulse signal (i.e. a main pulse signal), node 1 first performs de-bounce filtering on the main pulse signal, then detects the rising edge and the falling edge, and converts the detected rising edge and falling edge into two kinds of synchronization K codes (i.e. pulse synchronization K codes) respectively, and then node 1 inserts the two kinds of synchronization K codes into the FC-AE link data stream and sends them to the switch; when the switch receives the synchronization K codes, it forwards them to each port with the time synchronization function enabled, and then sends the synchronization K codes to the corresponding communication node devices (i.e. node 1 and node 2) through the ports; when node 1 and node 2 receive the synchronization K codes, they restore the synchronization K codes into the rising edge and the falling edge of the pulse signal according to the type of the synchronization K codes, and then synthesize the pulse signal according to the rising edge and the falling edge; after the synthesized pulse signal is delay-compensated, it is output from the node 1 output port and the node 2 output port through the corresponding digital interface (such as GPIO), i.e. a pulse output with the same frequency and edge alignment as the main pulse signal is obtained; wherein the delay compensation is calculated according to the maximum cascade order obtained by the main switch and the cascade order corresponding to the switch where node 1 and node 2 are located.

[0097] Fig. 3 shows a time synchronization processing schematic diagram of three switches in cascade provided by an embodiment of the present disclosure, as shown in Fig. 3, switch 1 is cascaded with switch 2 and switch 3 through the cascade port in turn, switch 1 is configured as a main switch, switch 2 is configured as a first slave switch, and switch 3 is configured as a second slave switch; switch 1 mounts two communication node devices, i.e. node 1 and node 2, switch 2 mounts one communication node device, i.e. node 3, and switch 3 mounts one communication node device, i.e. node 4, wherein node 1 is configured as a main pulse source, and node 2 is configured as a backup pulse source.

[0098] When the node 1 receives the external input main pulse signal, the node 1 performs the de-bounce filtering on the main pulse signal according to the pre-configured filter window size, and then the node 1 detects the signal edges, converts the detected rising edge and falling edge into two kinds of pulse synchronization K codes respectively, and inserts the pulse synchronization K codes into the FC-AE link data stream and sends to the switch 1. The switch 1 forwards the pulse synchronization K codes to each enabled port (i.e. each port with the open time synchronization function) in each slave switch through the cascade port. The switch 1 inserts the pulse synchronization K codes into the FC-AE link data stream and sends to the nodes 1 and 2 mounted thereon. After receiving the pulse synchronization K codes, the nodes 1 and 2 synthesize the pulse signals according to the types of the pulse synchronization K codes. The synthesized pulse signals are output from the output ports of the nodes 1 and 2 through the corresponding digital interfaces after delay compensation. After receiving the pulse synchronization K codes sent by the switch 1 through the cascade port, the switch 2 inserts the pulse synchronization K codes into the FC-AE link data stream and sends to the node 3 mounted thereon. The pulse signal is recovered through the node 3 and output from the output port of the node 3 after delay compensation. In the same way, after receiving the pulse synchronization K codes sent by the switch 2 through the cascade port, the switch 3 inserts the pulse synchronization K codes into the FC-AE link data stream and sends to the node 4 mounted thereon. The pulse signal is recovered through the node 4 and output from the output port of the node 4 after delay compensation. The delay compensation corresponding to the nodes 1 and 2 is calculated according to the maximum cascade number obtained by the main switch and the cascade number of the main switch where the nodes 1 and 2 are located according to the above delay compensation formula (ΔDelay = pDelay × (Nmax-Nm-c)). The delay compensation corresponding to the node 3 is calculated according to the maximum cascade number obtained by the main switch and the cascade number of the switch 2 where the node 3 is located according to the above delay compensation formula. The delay compensation corresponding to the node 4 is calculated according to the maximum cascade number obtained by the main switch and the cascade number of the switch 3 where the node 4 is located according to the above delay compensation formula.

[0099] According to the embodiment of the present disclosure, the immunity to electromagnetic interference and the isolation to power fluctuation and ground signal ripple of the optical fiber link are combined with the reasonable scheduling of the FC frame to realize the time synchronization between devices. Specifically, the master switch sends a cascade order search frame to the slave switch, the slave switch returns a cascade order response frame to the master switch, and the slave switch acquires its own cascade order according to the cascade order response frame. The master switch acquires the maximum cascade order according to the cascade order response frame returned by the slave switch. The master switch sends the maximum cascade order to each communication node device mounted thereby. The slave switch sends its own cascade order to each communication node device mounted thereby. The master communication node device receives an externally input pulse signal, detects the pulse signal edge, converts the pulse signal edge into two types of synchronization K codes, and sends the two types of synchronization K codes to the master switch. The master switch sends the synchronization K codes to each communication node device mounted by the slave switch and the master switch. Each communication node device mounted by the master switch recovers the corresponding pulse signal according to the type of the synchronization K code and calculates the delay compensation corresponding to each communication node device. The recovered pulse signal is output from the output port of the corresponding communication node device after the corresponding delay compensation. In this way, the anti-interference capability and the time synchronization accuracy are improved, and the system cost is reduced. Only one physical link is needed to realize the time synchronization between devices while transmitting data.

[0100] It should be noted that, for the foregoing method embodiments, in order to simply describe, they are all expressed as a series of action combinations, but those skilled in the art should know that the present disclosure is not limited to the action sequence described, because according to the present disclosure, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily necessary for the present disclosure.

[0101] The above is the introduction of the method embodiment. The following will further illustrate the scheme of the present disclosure through the device embodiment.

[0102] FIG. 4 shows a structure diagram of a time synchronization processing system according to an embodiment of the present disclosure. The system 400 includes:

[0103] The cascaded master switch 410, the slave switch 420, each communication node device 430 mounted on the master switch, a preset master communication node device 440, and each communication node device 450 mounted on the slave switch.

[0104] The master switch 410 is configured to send a cascade order search frame to the slave switch, acquire a maximum cascade order according to a cascade order response frame returned by the slave switch, and send a synchronization K code to each communication node device mounted by the slave switch and the master switch.

[0105] In some embodiments, the maximum cascade number is acquired, comprising:

[0106] If there is no slave switch, the maximum cascade number is 0.

[0107] In some embodiments, the system 400 is further configured to:

[0108] Each slave switch receives a cascade number search frame sent by the upper level switch of the cascade and sends the cascade number search frame to the lower level slave switch of the cascade, so that the lower level slave switch of the cascade returns a cascade number response frame corresponding to itself to the master switch respectively.

[0109] The lower level slave switch of the cascade acquires its own cascade number according to the cascade number response frame corresponding to itself, and the master switch acquires the maximum cascade number according to the cascade number response frames corresponding to each slave switch returned.

[0110] In some embodiments, the system 400 is further configured to:

[0111] Each slave switch receives a synchronization K code sent by the upper level switch of the cascade and sends the synchronization K code to the lower level slave switch of the cascade and each communication node device mounted on the slave switch.

[0112] The slave switch 420 is configured to return a cascade number response frame to the master switch, and is further configured to acquire its own cascade number according to the cascade number response frame.

[0113] Each communication node device 430 mounted on the master switch is configured to receive the maximum cascade number sent by the master switch, and is further configured to recover a corresponding pulse signal according to the type of the synchronization K code and calculate a delay compensation corresponding to each communication node device, so that the recovered pulse signal is output from a corresponding output port of the corresponding communication node device after the corresponding delay compensation.

[0114] In some embodiments, each communication node device 430 mounted on the master switch is specifically configured to:

[0115] The calculation of the delay compensation corresponding to each communication node device comprises:

[0116] The delay compensation corresponding to each communication node device is calculated according to the maximum cascade number and the cascade number corresponding to the switch where each communication node device is located.

[0117] In some embodiments, each communication node device 430 mounted on the master switch is further specifically configured to:

[0118] The calculation of the delay compensation corresponding to each communication node device according to the maximum cascade number and the cascade number corresponding to the switch where each communication node device is located comprises:

[0119] ΔDelay = pDelay x (Nmax - Nm-c)

[0120] wherein, ΔDelay is the delay compensation value corresponding to each communication node device, pDelay is the fixed delay value of each cascade of the switch, Nmax is the maximum cascade number, Nm-c is the cascade number corresponding to the switch where the communication node device is located;

[0121] Further, the fixed delay value of each cascade of the switch is the propagation delay time corresponding to the average length of each cascade line.

[0122] The main communication node device 440 is configured to receive the externally input pulse signal, detect the pulse signal edge, and convert the pulse signal edge into a synchronous K code and send the synchronous K code to the main switch.

[0123] In some embodiments, the main communication node device 440 is specifically configured to:

[0124] The externally input pulse signal adopts master-slave switching, the main communication node device is configured as a master pulse source, the preset slave communication node device is configured as a standby pulse source, and if the externally input pulse signal is lost, the switch corresponding to the main communication node device switches the master pulse source to the standby pulse source; wherein,

[0125] If the externally input pulse signal is lost, the switch corresponding to the main communication node device switches the master pulse source to the standby pulse source, comprising:

[0126] If the externally input pulse signal is lost, the main communication node device sends a pulse state frame to the switch corresponding to the main communication node device, and the switch corresponding to the main communication node device switches the master pulse source to the standby pulse source according to the received pulse state frame; if the externally input pulse signal is restored, the switch corresponding to the main communication node device switches the standby pulse source back to the master pulse source.

[0127] Each communication node device 450 mounted on the slave switch is configured to receive the cascade number of itself sent by the slave switch.

[0128] It can be understood that each module / unit in the system 400 shown in FIG. 4 has the function of implementing each step in the detection method 100 provided by the embodiments of the present disclosure, and can achieve the corresponding technical effects. For the sake of brevity, it will not be repeated here.

[0129] FIG. 5 shows a diagram of an example electronic device that is capable of implementing embodiments of the present disclosure. The electronic device 500 is intended to represent various forms of digital computers, such as laptops, desktops, tablets, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device 500 can also represent various forms of mobile devices, such as personal digital assistants, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not intended to limit the implementations of the present disclosure described and / or claimed in this document.

[0130] As shown in FIG. 5, the electronic device 500 includes a computing unit 501 that can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 502 or a computer program loaded into a random access memory (RAM) 503 from a storage unit 508. Various programs and data required for the operation of the electronic device 500 can also be stored in the RAM 503. The computing unit 501, the ROM 502, and the RAM 503 are connected to each other through a bus 504. An I / O interface 505 is also connected to the bus 504.

[0131] Various components in the electronic device 500 are connected to the I / O interface 505, including an input unit 506, such as a keyboard, a mouse, etc.; an output unit 507, such as various types of displays, speakers, etc.; a storage unit 508, such as a magnetic disk, an optical disk, etc.; and a communication unit 509, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 509 allows the electronic device 500 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunication networks.

[0132] The computing unit 501 can be various general and / or special purpose processing components with processing and computing capabilities. Some examples of the computing unit 501 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 501 performs various methods and processes described above, such as the method 100. For example, in some embodiments, the method 100 can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 508. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 500 via the ROM 502 and / or the communication unit 509. When the computer program is loaded onto the RAM 503 and executed by the computing unit 501, one or more steps of the method 100 described above can be performed. Alternatively, in other embodiments, the computing unit 501 can be configured to perform the method 100 by any other suitable means, such as by means of firmware.

[0133] Various implementations of the systems and techniques described above can be realized in digital electronic circuitry, integrated circuitry, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on a chip (SOC), a programmable logic device (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

[0134] Program code for carrying out methods of the present disclosure can be written in any combination of one or more programming languages. The program code can be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the program code, when executed by the processor or controller, produces the functions / operations specified in the flowcharts and / or the block diagrams. The program code can be executed entirely on a machine, partially on a machine, partially on a machine and partially on a remote machine or entirely on a remote machine or server.

[0135] In the context of this disclosure, a machine-readable medium can be a tangible medium that contains or stores a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include but is not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine-readable storage medium will include one or more lines of electrical connections, portable computer disks, hard disk drives, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), optical fibers, portable compact disc read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0136] It should be noted that the present disclosure also provides a non-transitory computer readable storage medium having computer instructions stored therein, wherein the computer instructions are used to make a computer execute the method 100, and achieve the corresponding technical effects of the embodiments of the present disclosure executing the method, for brevity, the description is not repeated here.

[0137] To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0138] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0139] The computer system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, a server of a distributed system, or a server combined with a blockchain.

[0140] It should be understood that the various forms of flow shown above can be re-ordered, added to, or have steps deleted, using the steps described above. For example, the steps described in the present disclosure can be performed in parallel, in series, or in a different order, as long as the desired results of the technology disclosed in the present disclosure can be achieved, which is not limited herein.

[0141] The specific implementation described above does not constitute a limitation on the protection scope of the present disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A time synchronization processing method, characterized by, The method comprises: The master switch sends a cascade level search frame to the slave switch, so that the slave switch returns a cascade level response frame to the master switch, and the slave switch obtains its own cascade level according to the cascade level response frame; The master switch obtains the maximum cascade level according to the cascade level response frame returned by the slave switch; The master switch sends the maximum cascade level to each communication node device mounted by the master switch, and the slave switch sends its own cascade level to each communication node device mounted by the slave switch; The master communication node device receives an externally input pulse signal, detects the pulse signal edge, and converts the pulse signal edge into a synchronization K code and sends it to the master switch; The master switch sends the synchronization K code to each communication node device mounted by the slave switch and the master switch; Each communication node device mounted by the master switch recovers the corresponding pulse signal according to the type of the synchronization K code and calculates the corresponding delay compensation of each communication node device, so that the recovered pulse signal is output from the output port of the corresponding communication node device after the corresponding delay compensation.

2. The method of claim 1, wherein, The method further comprises: If there is no slave switch, the maximum cascade level is 0.

3. The method of claim 1, wherein, The method further comprises: Each level slave switch receives a cascade level search frame sent by the cascade upper level switch and sends the cascade level search frame to the cascade lower level slave switch, so that the cascade lower level slave switch returns a cascade level response frame corresponding to itself to the master switch level by level; The cascade lower level slave switch obtains its own cascade level according to the cascade level response frame corresponding to itself, and the master switch obtains the maximum cascade level according to the cascade level response frame corresponding to each slave switch returned by the master switch.

4. The method of claim 3, wherein, The method further comprises: Each level slave switch receives a synchronization K code sent by the cascade upper level switch and sends the synchronization K code to each communication node device mounted by the cascade lower level slave switch and the master switch.

5. The method of claim 1, wherein, The externally input pulse signal adopts master-backup switching, the master communication node device is configured as a master pulse source, a preset slave communication node device is configured as a backup pulse source, and if the externally input pulse signal is lost, the switch corresponding to the master communication node device switches the master pulse source to the backup pulse source; wherein If the externally input pulse signal is lost, the master communication node device sends a pulse state frame to the switch corresponding to the master communication node device, and the switch corresponding to the master communication node device switches the master pulse source to the backup pulse source according to the received pulse state frame; if the externally input pulse signal is recovered, the switch corresponding to the master communication node device switches the backup pulse source back to the master pulse source. The method further comprises:

6. The method of claim 1, wherein, According to the maximum cascade level and the cascade level corresponding to the switch where each communication node device is located, the delay compensation corresponding to each communication node device is calculated. The method further comprises:

7. The method of claim 6, wherein, According to the maximum cascade level and the cascade level corresponding to the switch where each communication node device is located, the delay compensation corresponding to each communication node device is calculated. ΔDelay = pDelay x (Nmax - Nm-c) Wherein, ΔDelay is the delay compensation value corresponding to each communication node device, pDelay is the fixed delay value of each cascade of the switch, Nmax is the maximum cascade number, Nm-c is the cascade number corresponding to the switch where the communication node device is located.

8. The method of claim 7, wherein, The fixed delay value of each cascade of the switch is the propagation delay time corresponding to the average length of each cascade line.

9. A time synchronization processing system, characterized by comprising: The method comprises the steps of: The main switch and the slave switch in cascade, each communication node device mounted on the main switch, the preset main communication node device, and each communication node device mounted on the slave switch; wherein, The main switch is configured to send a cascade level search frame to the slave switch, obtain the maximum cascade level according to a cascade level response frame returned by the slave switch, and send a synchronization K code to the slave switch and each communication node device mounted on the main switch; The slave switch is configured to return a cascade level response frame to the main switch, and obtain its own cascade level according to the cascade level response frame; The main communication node device is configured to receive an externally input pulse signal, detect the pulse signal edge, and convert the pulse signal edge into a synchronization K code to be sent to the main switch; Each communication node device mounted on the slave switch is configured to receive its own cascade level sent by the slave switch; Each communication node device mounted on the main switch is configured to receive the maximum cascade level sent by the main switch, restore the corresponding pulse signal according to the type of the synchronization K code, and calculate the delay compensation value corresponding to each communication node device, so that the restored pulse signal is output from the corresponding communication node device output port after the corresponding delay compensation.

10. An electronic device, comprising: The method comprises the steps of: At least one processor; And A memory in communication connection with the at least one processor; wherein The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method of any one of claims 1-8.

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