Back contact solar cell, manufacturing method therefor, and photovoltaic module

By incorporating stacked semiconductor components and intermediate gaps or dielectric layers in the back-contact battery, hot spot effects and leakage problems are solved, thereby improving the safety and efficiency of the back-contact battery.

WO2026011824A1PCT designated stage Publication Date: 2026-01-15LONGI GREEN ENERGY TECH CO LTD
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Patent Information

Application Number
PCT/CN2025/082912
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-10
Filing Date
2025-03-17
Publication Date
2026-01-15

AI Technical Summary

Technical Problem

Existing back-contact batteries are prone to hot spot effects when covered by obstructions, leading to risks of module delamination, burning, and fire, and also have the problem of excessive leakage loss.

Method used

A stacked structure is formed by placing first and second doped semiconductor sections on a semiconductor substrate, and a space gap or dielectric layer is placed therebetween to form an embedded diode and disperse the reverse leakage region, thereby adjusting the electrical connection area and distribution.

Benefits of technology

It reduces the risk of hot spots, improves safety performance and battery efficiency, reduces leakage loss, and enhances the battery's resistance to burnout.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the technical field of photovoltaics. Disclosed are a back contact solar cell, a manufacturing method therefor and a photovoltaic module, in order to reduce the hot spot risk of back contact solar cells. The back contact solar cell comprises: a semiconductor substrate, a first doped semiconductor part and a second doped semiconductor part. The semiconductor substrate has a first surface and a second surface opposite to each other. The first surface has a first region and a second region spaced apart from each other, and a third region located between the first region and the second region. The first doped semiconductor part is arranged within or on the first region and the third region. The second doped semiconductor part is arranged on the second region and the third region, the second doped semiconductor part and the first doped semiconductor part having opposite conductivity types. In the third region, the first doped semiconductor part and the second doped semiconductor part are stacked in the thickness direction of the semiconductor substrate, so as to form a stacked structure. In the stacked structure, there is a hollow gap between the first doped semiconductor part and the second doped semiconductor part.
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Description

A back contact battery and its manufacturing method, and a photovoltaic module

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202410918522.3, filed on July 10, 2024, entitled “A back contact battery and its manufacturing method, photovoltaic module”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of photovoltaic technology, and in particular to a back contact battery and its manufacturing method, and a photovoltaic module. Background Technology

[0004] A back-contact solar cell is a solar cell in which there are no electrodes on the light-facing side of the cell, and both the positive and negative electrodes are located on the back-facing side of the cell. This reduces the shading of the cells by the electrodes, increases the short-circuit current of the cells, and improves the energy conversion efficiency of the cells.

[0005] During actual use, back-contact solar cells may be obstructed by objects such as bird droppings, leaves, and dust. This obstruction can cause the cells to overheat and develop hot spots. If the temperature of these hot spots exceeds a certain threshold, it can lead to problems such as photovoltaic module delamination, backsheet burning, and glass shattering, ultimately rendering the entire solar cell unusable. In severe cases, it can even pose a fire risk.

[0006] However, existing back-contact batteries with heat-spot-proof structures suffer from excessive leakage and localized overheating. Summary of the Invention

[0007] The purpose of this application is to provide a back contact battery and its manufacturing method, as well as a photovoltaic module, to reduce the risk of hot spots in the back contact battery, effectively improve the safety performance of the back contact battery, control leakage loss, and adjust the area and distribution of the heat-generating area.

[0008] To achieve the above objectives, in a first aspect, this application provides a back contact battery comprising: a semiconductor substrate, a first doped semiconductor portion, and a second doped semiconductor portion. The semiconductor substrate has a first surface and a second surface opposite to each other. The first surface has a first region and a second region spaced apart, and a third region located between the first region and the second region. The first doped semiconductor portion is disposed within or on the first region and the third region. The second doped semiconductor portion is disposed on the second region and the third region. The second doped semiconductor portion and the first doped semiconductor portion have opposite conductivity types. In the third region, the first doped semiconductor portion and the second doped semiconductor portion are stacked along the thickness direction of the semiconductor substrate to form a stacked structure. In the stacked structure, a space gap exists between the first doped semiconductor portion and the second doped semiconductor portion.

[0009] In the back contact battery provided by this application, in the third region, a first doped semiconductor portion and a second doped semiconductor portion are stacked along the thickness direction of the semiconductor substrate to form a stacked structure. Furthermore, the first doped semiconductor portion and the second doped semiconductor portion have opposite conductivity types, and an electrical connection exists between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure. The first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, the one closer to the semiconductor substrate, has a top surface facing away from the semiconductor substrate, a bottom surface close to the semiconductor substrate, and a side surface connecting the top surface and the bottom surface. Based on this, the electrical connection can be an electrical connection formed between at least a partial area of ​​the top surface of the first doped semiconductor portion and the one farther from the semiconductor substrate, or it can be an electrical connection formed between the side surface area of ​​the first doped semiconductor portion and the one farther from the semiconductor substrate, or it can be a combination of both types of electrical connections. In the above case, in the third region, a built-in diode with a low reverse breakdown voltage can be formed at the electrical connection between the first doped semiconductor portion and the second doped semiconductor portion. This is beneficial for having a low reverse breakdown voltage when the back contact battery is shielded, thereby reducing the risk of hot spots on the back contact battery.

[0010] Furthermore, in the stacked structure, there is a space gap between the first doped semiconductor section and the second doped semiconductor section. This space gap serves as insulation, separating the first and second doped semiconductor sections with opposite conductivity types within the stacked structure. This prevents the formation of a reverse leakage region in the area with the space gap. The physical insulation formed by the space gap is stronger and more reliable than that of a dielectric layer with a certain degree of conductivity (such as an interface passivation layer), enhancing local insulation and reducing the proportion of reverse leakage regions in the stacked structure. Moreover, the stronger insulation method will not fail, resulting in lower leakage loss for the back contact battery in the forward voltage region.

[0011] As one possible implementation, in the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, at least a portion of the termination end of the one farther from the semiconductor substrate is flipped up in a direction away from the first surface. The region flipped up in the direction away from the first surface at the termination end of the one farther from the semiconductor substrate cannot be electrically connected to the one closer to the semiconductor substrate, which can further reduce the proportion of the reverse leakage region in the stacked structure. Furthermore, the physical insulation formed by the flipped-up termination end is more reliable than the insulation achieved by an insulating film layer, resulting in lower leakage loss of the back contact battery in the forward voltage region.

[0012] As one possible implementation, in the stacked structure including the first doped semiconductor portion and the second doped semiconductor portion, a portion of the portion farther from the semiconductor substrate bulges in a direction opposite to the first surface. Furthermore, in the bulging region of the portion farther from the semiconductor substrate, the first doped semiconductor portion and the second doped semiconductor portion are physically insulated.

[0013] By adopting the above technical solution, the spacing between the first and second doped semiconductor portions along the thickness direction of the semiconductor substrate can be further increased by setting a bulge, thereby enhancing the insulation effect of the first and second doped semiconductor portions in the bulge area and further reducing leakage current loss of the back contact battery in an installation environment with fewer obstructions such as dust. When a portion of the second doped semiconductor portion and a portion of the first doped semiconductor portion both bulge in the direction away from the first surface in the stacked structure, the specific setting scheme can be adjusted as needed to obtain an electrical connection area of ​​appropriate size and an electrical connection with a suitable distribution. Furthermore, when a portion of the second doped semiconductor portion and the first doped semiconductor portion in the stacked structure that is farther from the semiconductor substrate bulges in the direction away from the first surface, it is beneficial to increase the contact area between the portion farther from the semiconductor substrate and the surface passivation layer, reduce the surface defects of the portion farther from the semiconductor substrate, and improve the working efficiency of the back contact battery.

[0014] In addition, a raised area can be formed to create a central gap, which can be used to separate the electrical connections, thereby creating a dispersed reverse leakage area on one side of the first surface. This can disperse the heat generation area, further improve the back contact battery's resistance to burn-out, and effectively enhance the safety performance of the back contact battery.

[0015] As one possible implementation, in the first doped semiconductor section and the second doped semiconductor section included in the stacked structure, a portion of the region near the semiconductor substrate bulges in a direction away from the first surface.

[0016] With the above technical solution, the area and distribution of the electrical connection between the first doped semiconductor portion and the second doped semiconductor portion can be adjusted. When a portion of the second doped semiconductor portion and the first doped semiconductor portion in the stacked structure protrudes in a direction away from the first surface, the portion near the semiconductor substrate has an uneven surface morphology, which is beneficial to increasing the docking area between the first doped semiconductor portion and the second doped semiconductor portion in the stacked structure, and to increasing reverse leakage current, thereby further reducing the reverse breakdown voltage and hot spot risk of the back contact battery in installation environments with many obstructions such as dust or bird droppings. The applicability of the back contact battery provided in this application in different application scenarios can be improved by adjusting the morphology of the first doped semiconductor portion and the second doped semiconductor portion according to the requirements of the back contact battery in different installation environments.

[0017] As one possible implementation, the region in the first doped semiconductor portion and / or the second doped semiconductor portion that protrudes in the direction away from the first surface is bulging in the middle and low around the edges, or is tunnel-shaped.

[0018] When employing the above technical solution, the region protruding in the first doped semiconductor portion and / or the second doped semiconductor portion in the direction away from the first surface has at least two examples. Specifically, when the protruding region is a bulge shape with a high center and low periphery, and when the bulge shape and the first and second doped semiconductor portions in the stacked structure are electrically connected to the semiconductor substrate, the protruding region increases the contact area between the upper and lower doped semiconductor layers. This results in a higher area ratio of the reverse leakage region on the first surface side, which is beneficial for reducing the reverse breakdown voltage of the back contact battery in installation environments with many obstructions such as dust or bird droppings. When the bulge shape is a bulge formed through a space gap or dielectric layer, i.e., insulation is achieved at the center of the bulge shape, and insulation is achieved at the lower periphery and the region located near the semiconductor substrate in the first and second doped semiconductor portions of the stacked structure... Electrical connections are formed by dispersing the original integral electrical connections to the periphery of the bulge, thus dispersing the reverse leakage area and the heat generation area, further improving the back contact battery's resistance to burn-out and effectively enhancing its safety performance. When the bulge structure is a bulge-shaped protrusion formed by a central gap or dielectric layer, and a dielectric layer is also provided at the lower periphery and between the first doped semiconductor part and the second doped semiconductor part of the stacked structure near the semiconductor substrate, electrical isolation is achieved in both the center and the periphery of the bulge structure. The bulge strengthens the local electrical isolation effect, preventing electrical isolation failure caused by breakdown, insulation film quality issues, or other reasons, thus ensuring the electrical isolation effect.

[0019] Furthermore, when the raised region is tunnel-shaped, and the tunnel-shaped morphology and the stacked structure include an electrical connection between the first doped semiconductor portion and the second doped semiconductor portion closest to the semiconductor substrate, the raised region increases the contact area of ​​the upper and lower doped semiconductor portions. This results in a higher area ratio of the reverse leakage region on the first side, which helps to reduce the reverse breakdown voltage of the back contact battery in installation environments with many obstructions such as dust or bird droppings. When the tunnel-shaped morphology is a tunnel-shaped bulge formed through a space gap or dielectric layer, i.e., insulation is achieved at the middle position of the tunnel-shaped morphology, and electrical connections are formed at the lower sides of the tunnel with the portion of the stacked structure including the first doped semiconductor portion and the second doped semiconductor portion closest to the semiconductor substrate. By dispersing the original integral electrical connection to both sides of the tunnel, the reverse leakage area is dispersed, and the heat generation area is dispersed, further improving the burn-off resistance of the back contact battery and effectively enhancing its safety performance. When the tunnel-like morphology is a tunnel-like bulge formed by a central gap or dielectric layer, and a dielectric layer is also provided at the lower sides of the tunnel and between the first and second doped semiconductor parts of the stacked structure near the semiconductor substrate, electrical isolation is achieved at both the center and sides of the tunnel-like morphology. The bulge strengthens the local electrical isolation effect, preventing electrical isolation failure due to breakdown, insulation film quality issues, or other reasons, thus ensuring the electrical isolation effect. Based on this, bulge morphologies that meet the corresponding requirements can be set according to different actual application scenarios, or it can be combined with different film layers to improve the applicability of the back contact battery hot spot prevention structure provided in this application to different application scenarios.

[0020] As one possible implementation, in the stacked structure including a first doped semiconductor section and a second doped semiconductor section, at least a portion of the termination end of the section farther from the semiconductor substrate is connected to the section closer to the semiconductor substrate. In this case, at least a portion of the termination end of the section farther from the semiconductor substrate can be connected to the section closer to the semiconductor substrate to form a reverse leakage region. This helps to reduce the reverse breakdown voltage of the back-junction contact battery. The local connection can disperse the distribution of the reverse leakage region on one side of the first surface, preventing the back-contact battery from burning out due to uneven distribution of the reverse leakage region causing local heat concentration. The dispersed arrangement of the reverse leakage region can disperse the heat generation area, further improving the back-contact battery's resistance to burnout and effectively improving the safety performance of the back-contact battery.

[0021] As one possible implementation, the back contact battery also includes a dielectric layer disposed between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure. In this case, on the one hand, the dielectric layer can achieve physical structural separation, and on the other hand, the dielectric layer is a functional layer with electrical insulating or semi-insulating properties. Therefore, by disposing of the dielectric layer between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, a portion of the area between them can be separated, reducing the leakage loss of the back contact battery in the forward voltage region. This allows the back contact battery to have higher operating efficiency while preventing the reduction of structural reliability caused by creating a large area of ​​intermediate space between the first doped semiconductor portion and the second doped semiconductor portion in the stacked structure to reduce leakage loss, thus improving the yield of the back contact battery.

[0022] As one possible implementation, in the stacked structure including the first doped semiconductor portion and the second doped semiconductor portion, at least a portion of the termination end of the portion farther from the semiconductor substrate is electrically isolated from the portion closer to the semiconductor substrate by a dielectric layer and / or a space gap. In this case, another example of the connection method between at least a portion of the termination end of the portion farther from the semiconductor substrate and the portion closer to the semiconductor substrate is provided. Based on this, when the back contact battery provided in this application is installed in an environment with few obstructions such as bird droppings, leaves, or dust, at least a portion of the termination end of the portion farther from the semiconductor substrate can be electrically isolated from the portion closer to the semiconductor substrate by a dielectric layer and / or a space gap. Optionally, the space gap, or a combination of the space gap and the dielectric layer, can be used to physically insulate the at least a portion of the termination end of the portion farther from the semiconductor substrate from the portion closer to the semiconductor substrate. Alternatively, an insulating or semi-insulating dielectric layer can be used to achieve the aforementioned electrical isolation, thereby reducing the proportion of the reverse leakage region on the first side, which helps to further reduce the leakage loss of the back contact battery in the forward voltage region and ensures that the back contact battery has high operating efficiency. When the back contact battery provided in this application is installed in an environment with many obstructions such as bird droppings, leaves, or dust, at least a portion of the termination end of the battery located away from the semiconductor substrate can be connected to the battery located closer to the semiconductor substrate. This increases the proportion of the reverse leakage area on the first side, thereby reducing the reverse breakdown voltage of the back contact battery and ensuring a lower risk of hot spots. Therefore, the connection state between at least a portion of the termination end of the battery located away from the semiconductor substrate and the battery located closer to the semiconductor substrate can be configured according to different environmental requirements, improving the applicability of the back contact battery provided in this application in various practical application scenarios.

[0023] As one possible implementation, in the stacked structure, the thickness of the region of the dielectric layer in which a space gap is provided between the first doped semiconductor portion and the second doped semiconductor portion is less than the thickness of the region of the dielectric layer in which a space gap is not provided between the first doped semiconductor portion and the second doped semiconductor portion.

[0024] With the above technical solution, both the space gap and the dielectric layer can separate the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, thereby reducing forward leakage loss. Based on this, when the thickness of the region of the dielectric layer with the space gap between the first and second doped semiconductor portions in the stacked structure is less than the thickness of the region of the dielectric layer without the space gap, it is unnecessary to provide a dielectric layer with a large thickness in each region to separate parts of the first and second doped semiconductor portions in the stacked structure, thus reducing the amount of dielectric material used. Furthermore, in actual manufacturing, taking the first doped semiconductor portion as the one closest to the semiconductor substrate in the first and second doped semiconductor portions of the stacked structure as an example, after forming a continuous layer of the second doped semiconductor portion on the corresponding region of the semiconductor substrate and the first doped semiconductor portion, selective etching of the second doped semiconductor portion is required. The etchant used in selective etching may flow through the space gap between the first and second doped semiconductor portions of the stacked structure and affect the dielectric layer. In this case, when the thickness of the region where a space gap is provided between the first doped semiconductor portion and the second doped semiconductor portion in the stacked structure is less than the thickness of the region where no space gap is provided between the first doped semiconductor portion and the second doped semiconductor portion, it is not necessary to strictly control the type of etchant or etching time in order to separate the portion of the first doped semiconductor portion and the portion of the second doped semiconductor portion in the stacked structure so as not to affect the dielectric layer, which helps to reduce the difficulty of the process.

[0025] As one possible implementation, in the stacked structure, the region where a spacer is provided between the first and second doped semiconductor portions of the dielectric layer is interrupted, and the thickness of the dielectric layer near the end of the spacer gradually decreases in the direction approaching the spacer. The beneficial effect in this case is similar to the previously described beneficial effect where the thickness of the region where a spacer is provided between the first and second doped semiconductor portions in the stacked structure is less than the thickness of the region where no spacer is provided between the first and second doped semiconductor portions, and will not be repeated here.

[0026] As one possible implementation, in the stacked structure, the first doped semiconductor portion and the second doped semiconductor portion, the portion farther from the semiconductor substrate has a connection end and a termination end, and the connection end of the portion farther from the semiconductor substrate is connected to its own main body portion. Furthermore, along the direction from the termination end toward the center of the portion farther from the semiconductor substrate, a single stacked structure has continuously distributed second distribution regions and first distribution regions. The distribution density of the central gap in the portion of the stacked structure corresponding to the second distribution region is greater than the distribution density of the central gap in the portion of the stacked structure corresponding to the first distribution region.

[0027] When using the above technical solution, in the actual manufacturing process, taking the first doped semiconductor portion and the second doped semiconductor portion of the stacked structure, with the one closer to the semiconductor substrate as the first doped semiconductor portion, at least a portion of the space gaps are formed directly after the portion of the second doped semiconductor portion near the termination end bulges due to high-temperature laser etching during selective etching of the entire layer of the second doped semiconductor portion, or by the etching of a portion of the dielectric layer below the portion of the second doped semiconductor portion near the termination end by an etchant. Furthermore, in the continuously distributed first and second distribution regions of the stacked structure, the second distribution region is closer to the termination end of the portion farther from the semiconductor substrate. In the above case, when the distribution density of space gaps in the portion of the stacked structure corresponding to the second distribution region (i.e., the portion closer to the termination end of the portion farther from the semiconductor substrate) is greater than the distribution density of space gaps in the portion of the stacked structure corresponding to the first distribution region (i.e., the portion farther from the termination end of the portion farther from the semiconductor substrate), the difficulty of setting a large number of space gaps in the region of the stacked structure far from the edge of the laser etching operation range or far from the etchant-accessible operation range can be reduced. At the same time, it is not necessary to form a lot of medium-space gaps in the part corresponding to the first distribution area of ​​the stacked structure and to separately treat the area by means of laser irradiation, which reduces the difficulty of the process and improves the yield of the back contact battery.

[0028] As one possible implementation, the width of the first distribution region is smaller than the width of the second distribution region along the direction from the termination end toward the center of the semiconductor substrate. In this case, it is beneficial to reduce the operation time for forming the space gap, prevent the operation of forming the space gap (such as laser etching or wet etching) from affecting other structures included in the back contact cell, and ensure that the back contact cell has a high yield.

[0029] As one possible implementation, the back contact battery further includes a surface passivation layer. The surface passivation layer covers the side of the first doped semiconductor portion in the first region and the second doped semiconductor portion in the second region that faces away from the semiconductor substrate, and fills the space between the first doped semiconductor portion and the second doped semiconductor portion in the stacked structure. Furthermore, at least a portion of the space gaps are surrounded by the surface passivation layer.

[0030] When the above technical solution is adopted, the surface passivation layer can not only cover the side of the first doped semiconductor portion in the first region and the second doped semiconductor portion in the second region away from the semiconductor substrate, but also fill the space between the first doped semiconductor portion and the second doped semiconductor portion in the stacked structure, thereby increasing the passivation area of ​​the surface passivation layer, further reducing surface defects on the first side, and improving the working efficiency of the back contact battery.

[0031] As one possible implementation, the projected area of ​​the stacked structure on one side of the first surface is S1, and the projected area of ​​the dielectric layer on one side of the first surface is S2. The ratio of S2 to S1 is greater than or equal to 0.5 and less than or equal to 1. In this case, the reverse breakdown voltage and operating efficiency of the back contact battery can be controlled by adjusting the area ratio of the dielectric layer between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, thereby improving the applicability of the back contact battery provided in this application in different application scenarios.

[0032] As one possible implementation, along the arrangement direction of the first and second regions, the width of the stacked structure is greater than or equal to 10 μm and less than or equal to 300 μm.

[0033] When employing the above technical solution, and with the width of the stacked structure within the aforementioned range, if the back contact battery provided in this application is installed in an environment with few obstructions such as bird droppings, leaves, or dust, the width of the stacked structure can be set within a relatively small range to reduce the proportion of the reverse leakage region on the first side. This helps to further reduce the leakage loss of the back contact battery in the forward voltage region, ensuring that the back contact battery has high operating efficiency. Conversely, if the back contact battery provided in this application is installed in an environment with many obstructions such as bird droppings, leaves, or dust, the width of the stacked structure can be set within a relatively large range to increase the proportion of the reverse leakage region on the first side. This helps to reduce the reverse breakdown voltage of the back contact battery, ensuring that the back contact battery has a low risk of hot spots. Therefore, the width of the stacked structure can be set according to different environmental requirements, improving the applicability of the back contact battery provided in this application in different practical application scenarios. Furthermore, keeping the width of the stacked structure within the aforementioned range also prevents the difficulty of etching the part of the stacked structure, including the first doped semiconductor part and the second doped semiconductor part, that is farther from the semiconductor substrate due to a smaller width.

[0034] As one possible implementation, when the first doped semiconductor portion is at least disposed on the first region, the back contact cell further includes a first interface passivation layer. The first interface passivation layer is at least disposed between the semiconductor substrate and the first doped semiconductor portion.

[0035] When the above technical solution is adopted, the passivation contact structure composed of the first interface passivation layer and the first doped semiconductor part has excellent interface passivation effect and can achieve selective collection of charge carriers, at least reducing the charge carrier recombination rate of the first region of the first surface, and further improving the photoelectric conversion efficiency of the back contact cell.

[0036] As one possible implementation, the back contact battery also includes a second interface passivation layer, which is at least disposed between the second doped semiconductor portion and the semiconductor substrate.

[0037] When the above technical solution is adopted, the passivation contact structure composed of the second interface passivation layer and the portion of the second doped semiconductor located on the second region can achieve selective collection of charge carriers and reduce the carrier recombination rate of the second region of the first surface.

[0038] Secondly, this application provides a method for manufacturing a back contact battery, the method comprising: providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface opposite to each other. The first surface has a first region and a second region spaced apart, and a third region located between the first region and the second region. Next, a first doped semiconductor portion disposed within or on the first region and the third region is formed. Next, a second doped semiconductor portion disposed on the second region and the third region is formed. The second doped semiconductor portion and the first doped semiconductor portion have opposite conductivity types. In the third region, the first doped semiconductor portion and the second doped semiconductor portion are stacked along the thickness direction of the semiconductor substrate to form a stacked structure. In the stacked structure, a space gap exists between the first doped semiconductor portion and the second doped semiconductor portion.

[0039] As one possible implementation, forming a first doped semiconductor portion disposed within or above the first and third regions includes: forming a first doped semiconductor portion that is entirely disposed on one side of the first surface; next, forming a dielectric layer on the portion of the first doped semiconductor portion corresponding to the first and third regions; and next, removing the portion of the first doped semiconductor portion corresponding to the second region.

[0040] As one possible implementation, at least a portion of the dielectric layer on the side facing away from the semiconductor substrate has an uneven surface morphology. In this case, taking the first doped semiconductor portion and the second doped semiconductor portion in the stacked structure, which is closer to the semiconductor substrate, as an example, by providing a dielectric layer with an uneven surface morphology, when selectively etching the entire layer of the second doped semiconductor portion, the etchant etches the uneven portion of the dielectric layer to form a gap between the first and second doped semiconductor portions in the stacked structure. Alternatively, when depositing the entire layer of the second doped semiconductor portion, the deposition gas may have a poor coating effect on the uneven surface morphology of the dielectric layer, thus forming a gap. This provides another example for the formation of gaps, improving the applicability of the embodiments of this application in different application scenarios and improving the yield of the manufactured back contact battery.

[0041] As one possible implementation, a second doped semiconductor portion is formed on the second and third regions, including: forming a continuous layer of the second doped semiconductor portion on at least the second region and the first doped semiconductor portion; and forming a mask material layer on the side of the second doped semiconductor portion facing away from the semiconductor substrate. Next, a laser irradiation process is used to process at least a portion of the mask material layer corresponding to the first region, so that the unprocessed portion of the mask material layer forms an etching mask layer. Next, under the masking action of the etching mask layer, the portion of the second doped semiconductor portion at least corresponding to the first region and the portion of the dielectric layer at least corresponding to the first region are removed; and at least a portion of the dielectric layer located between the first and second doped semiconductor portions included in the stacked structure is etched to form at least a space gap in the portion.

[0042] The beneficial effects of the second aspect and its various implementations in this application can be found in the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0043] Thirdly, this application provides a photovoltaic module comprising a cell string and an encapsulation layer. The cell string is formed by connecting back-contact cells provided in the first aspect and its various implementations. The encapsulation layer is used to cover the surface of the cell string.

[0044] The beneficial effects of the third aspect and its various implementations in this application can be found in the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here. Attached Figure Description

[0045] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0046] Figure 1 is a longitudinal cross-sectional view of the first structure of the back contact battery provided in the embodiment of this application;

[0047] Figure 2 is a SEM image of the back contact battery in the stacked structure provided in the embodiment of this application;

[0048] Figure 3 is a second SEM image of the back contact battery in the stacked structure provided in the embodiment of this application;

[0049] Figure 4 is a longitudinal cross-sectional view of a second structure of the back contact battery provided in an embodiment of this application.

[0050] Figure 5 is a longitudinal cross-sectional view of the third structure of the back contact battery provided in the embodiment of this application;

[0051] Figure 6 is a longitudinal cross-sectional view of the fourth structure of the back contact battery provided in the embodiment of this application;

[0052] Figure 7 is a longitudinal cross-sectional view of the fifth structure of the back contact battery provided in the embodiments of this application;

[0053] Figure 8 is a top view of the back contact battery provided in an embodiment of this application.

[0054] Figure 9 is a top view of the back contact battery provided in an embodiment of this application.

[0055] Figure 10 is a top view of the back contact battery provided in an embodiment of this application.

[0056] Figure 11 is a longitudinal cross-sectional view of the sixth structure of the back contact battery provided in the embodiments of this application;

[0057] Figure 12 is a longitudinal cross-sectional view of the seventh structure of the back contact battery provided in the embodiments of this application;

[0058] Figure 13 is a longitudinal cross-sectional view of the eighth structure of the back contact battery provided in the embodiments of this application;

[0059] Figure 14 is a longitudinal cross-sectional view of the ninth structure of the back contact battery provided in the embodiments of this application;

[0060] Figure 15 is a longitudinal cross-sectional view of the tenth structure of the back contact battery provided in the embodiments of this application;

[0061] Figure 16 is a longitudinal cross-sectional view of the eleventh structure of the back contact battery provided in the embodiments of this application.

[0062] Reference numerals: 11 is a semiconductor substrate, 12 is a first region, 13 is a second region, 14 is a third region, 15 is a first doped semiconductor section, 16 is a second doped semiconductor section, 17 is a space gap, 18 is a dielectric layer, 19 is a surface passivation layer, 20 is a first interface passivation layer, and 21 is a second interface passivation layer. Detailed Implementation

[0063] The embodiments of this application will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of this application. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of this application.

[0064] The accompanying drawings show various structural schematic diagrams according to embodiments of this application. These drawings are not drawn to scale, and some details have been enlarged and may have been omitted for clarity. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0065] In the context of this application, when a layer / element is referred to as being "on top of" another layer / element, the layer / element can be directly on top of the other layer / element, or there can be an intermediate layer / element between them. Furthermore, if a layer / element is "on top of" another layer / element in one orientation, then when the orientation is reversed, the layer / element can be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0066] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0067] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0068] A back-contact solar cell is a solar cell in which there are no electrodes on the light-facing side of the cell, and both the positive and negative electrodes are located on the back-facing side of the cell. This reduces the shading of the cells by the electrodes, increases the short-circuit current of the cells, and improves the energy conversion efficiency of the cells.

[0069] During actual use, back-contact solar cells may be obstructed by objects such as bird droppings, leaves, and dust. This obstruction can cause the cells to overheat and develop hot spots. If the temperature of these hot spots exceeds a certain threshold, it can lead to problems such as photovoltaic module delamination, backsheet burning, and glass shattering, ultimately rendering the entire solar cell unusable. In severe cases, it can even pose a fire risk.

[0070] To address the aforementioned technical problems, in a first aspect, embodiments of this application provide a back-contact battery. As shown in Figures 1 to 3, the back-contact battery includes: a semiconductor substrate 11, a first doped semiconductor portion 15, and a second doped semiconductor portion 16. The semiconductor substrate 11 has a first surface and a second surface facing each other. The first surface has a first region 12 and a second region 13 spaced apart, and a third region 14 located between the first region 12 and the second region 13. The first doped semiconductor portion 15 is disposed within or above the first region 12 and the third region 14. The second doped semiconductor portion 16 is disposed on the second region 13 and the third region 14. The second doped semiconductor portion 16 and the first doped semiconductor portion 15 have opposite conductivity types. In the third region 14, the first doped semiconductor portion 15 and the second doped semiconductor portion 16 are stacked along the thickness direction of the semiconductor substrate 11 to form a stacked structure. In the stacked structure, a space gap 17 is provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16.

[0071] As shown in Figures 1 to 3, in the back contact battery provided in this embodiment of the application, in the third region 14, a first doped semiconductor portion 15 and a second doped semiconductor portion 16 are stacked along the thickness direction of the semiconductor substrate 11 to form a stacked structure. Furthermore, the first doped semiconductor portion 15 and the second doped semiconductor portion 16 have opposite conductivity types, and there is an electrical connection between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure. The first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, the one closest to the semiconductor substrate 11, has a top surface facing away from the semiconductor substrate 11, a bottom surface close to the semiconductor substrate 11, and a side surface connecting the top surface and the bottom surface. Based on this, the electrical connection can be an electrical connection formed between at least a partial region of the top surface of the first doped semiconductor portion 15 and the second doped semiconductor portion 16 near the semiconductor substrate 11 and the region away from the semiconductor substrate 11 in the stacked structure; it can also be an electrical connection formed between the side surface region of the first doped semiconductor portion 15 and the second doped semiconductor portion 16 near the semiconductor substrate 11 and the region away from the semiconductor substrate 11 in the stacked structure; or it can be a combination of both. In the above cases, on the third region 14, the electrical connection between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 can form a built-in diode with a low reverse breakdown voltage, which is beneficial for having a low reverse breakdown voltage when the back contact battery is shielded, reducing the risk of hot spots on the back contact battery. In addition, in the stacked structure, there is a middle space gap 17 between the first doped semiconductor portion 15 and the second doped semiconductor portion 16. The space gap can be used for insulation. For example, the presence of the space gap 17 can separate the first doped semiconductor part 15 and the second doped semiconductor part 16 with opposite conductivity in the stacked structure, so that a reverse leakage region cannot be formed in the area with the space gap 17 between them. The physical insulation formed by the space gap is stronger and more reliable than the dielectric layer with a certain conductivity (such as the interface passivation layer). It can enhance the local insulation effect, not only reduce the proportion of the reverse leakage region in the stacked structure, but also ensure that the insulation method used will not fail, so that the back contact battery has a lower leakage loss in the positive voltage region.Secondly, the presence of the intermediate space gap 17 can adjust the distribution of electrical connections between the first doped semiconductor section 15 and the second doped semiconductor section 16. Furthermore, the insulating and spacing functions of the intermediate space gap 17 can be utilized. For example, by setting the intermediate space gap 17, the distribution of electrical connections in the stacked structure can be adjusted, so that the electrical connections between the first doped semiconductor section 15 and the second doped semiconductor section 16 are no longer continuous as a whole, but are separated by insulating regions. The reverse leakage area is dispersed on one side of the first surface, preventing the back contact battery from burning out due to localized heat concentration caused by the continuous distribution of the reverse leakage area. The dispersed arrangement of the reverse leakage area can disperse the heat-generating area, further improving the back contact battery's resistance to burnout and effectively enhancing its safety performance.

[0072] In practical applications, this application does not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate can be a silicon substrate. Alternatively, the semiconductor substrate can be any semiconductor material such as a germanium-silicon substrate, a germanium substrate, or a gallium arsenide substrate.

[0073] The semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface of the semiconductor substrate corresponds to the back-light surface of the back contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing surface of the back contact battery. The distribution of the first, second, and third regions on the first surface can be determined based on the distribution of the first and second doped semiconductor portions formed on one side of the first surface. Since the first doped semiconductor portions of the back contact battery are disposed in the first and third regions, the distribution range of the first and third regions on the first surface can be determined according to the distribution requirements of the first doped semiconductor portions in the actual application scenario. Since a portion of the second doped semiconductor portion of the back contact battery is disposed on the second region of the first surface, the distribution range of the second region on the first surface can be determined according to the distribution requirements of the second doped semiconductor portions on the semiconductor substrate in the actual application scenario.

[0074] It is understandable that the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region; one of the first region and the second region corresponds to the P region, and the other corresponds to the N region, while the third region corresponds to the P-N overlapping region.

[0075] As for the morphology of the first and second regions in the first surface, it can be determined based on the morphology of the electrode structure of the back contact battery and the actual application scenario. For example, the first and second regions can be distributed in alternating stripe patterns or in alternating interdigitated patterns.

[0076] From a surface morphology perspective, the first and second surfaces of the semiconductor substrate can be planar. Alternatively, the second surface of the semiconductor substrate can also be textured to improve its light-trapping effect and increase the utilization rate of light by the semiconductor substrate. Secondly, when the stacked structure includes a first doped semiconductor portion and a second doped semiconductor portion, and the portion closer to the semiconductor substrate is the first doped semiconductor portion, at least the surface of the second region of the first surface can also be textured to increase the contact area between the second doped semiconductor portion and the corresponding electrode in the second region, thereby reducing transmission loss. Furthermore, when the stacked structure includes a first doped semiconductor portion and a second doped semiconductor portion, and the portion closer to the semiconductor substrate is the second doped semiconductor portion, at least the surface of the first region of the first surface can also be textured to increase the contact area between the first doped semiconductor portion and the corresponding electrode in the first region, thereby reducing transmission loss.

[0077] Regarding the first doped semiconductor portion and the second doped semiconductor portion, the embodiments of this application do not specifically limit the conductivity type of the first doped semiconductor portion and the second doped semiconductor portion, as long as the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite. For example, the conductivity type of the first doped semiconductor portion can be N-type, in which case the conductivity type of the second doped semiconductor portion is P-type; or, the conductivity type of the first doped semiconductor portion can also be P-type, in which case the conductivity type of the second doped semiconductor portion is N-type.

[0078] In terms of formation location, as shown in Figure 1, the first doped semiconductor portion 15 can be disposed on the first region 12 and the third region 14; or, as shown in Figure 4, the first doped semiconductor portion 15 can also be disposed within the first region 12 and the third region 14. In this case, it can be formed by diffusion or ion implantation.

[0079] For example, when the first doped semiconductor portion is disposed at least on a first region of the semiconductor substrate, the material of the first doped semiconductor portion may include any semiconductor material such as silicon, germanium silicon, germanium, or gallium arsenide. In terms of the arrangement of matter, the crystal phase of the first doped semiconductor portion may be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline, etc.

[0080] Optionally, as shown in FIG1, the first doped semiconductor portion 15 can be directly disposed on the first region 12 and the third region 14. Alternatively, as shown in FIG6, the back contact cell may further include a first interface passivation layer 20. The first interface passivation layer 20 is disposed at least between the semiconductor substrate 11 and the first doped semiconductor portion 15. In this case, the passivated contact structure composed of the first interface passivation layer 20 and the first doped semiconductor portion 15 has excellent interface passivation effect and can achieve selective collection of charge carriers, at least reducing the carrier recombination rate of the first region 12 on the first surface, and further improving the photoelectric conversion efficiency of the back contact cell. The material and thickness of the first interface passivation layer 20 can be set according to the material of the first doped semiconductor portion 15 and actual needs, and are not specifically limited here. For example, when the material of the first doped semiconductor portion is doped polycrystalline silicon, the first interface passivation layer is a tunneling passivation layer. For example, when the material of the first doped semiconductor includes at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the first interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixture of the three.

[0081] Regarding the second doped semiconductor section, in terms of materials, it can include any semiconductor material such as silicon, germanium-silicon, germanium, or gallium arsenide. In terms of the arrangement of matter, the crystal phase of the second doped semiconductor section can be amorphous, microcrystalline, nanocrystalline, single-crystal, or polycrystalline. The specific value of the crystallinity of the second doped semiconductor section can be determined based on the actual application scenario and is not specifically limited here.

[0082] In terms of formation location, as shown in Figure 4, the second doped semiconductor portion 16 can be directly disposed on the second region 13 and the third region 14. Alternatively, as shown in Figure 6, the back contact battery may further include a second interface passivation layer 21, which is disposed at least between the second doped semiconductor portion 16 and the semiconductor substrate 11. In this case, the passivated contact structure formed by the second interface passivation layer 21 and the portion of the second doped semiconductor portion 16 located on the second region can achieve selective collection of carriers and reduce the carrier recombination rate in the second region of the first surface. Optionally, the material and thickness of the second interface passivation layer 21 can be set according to the material of the second doped semiconductor portion 16 and actual needs, and are not specifically limited here. For example, when the material of the second doped semiconductor portion is doped polycrystalline silicon, the second interface passivation layer is a tunneling passivation layer. As another example, when the material of the second doped semiconductor portion includes doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the second interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixture of the three.

[0083] In this embodiment, where the back contact battery includes a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the first doped semiconductor portion constitute a first passivation contact structure, and the second interface passivation layer and the second doped semiconductor portion constitute a second passivation contact structure. Based on this, the passivation contact types of the first and second passivation contact structures can be the same. For example, both the first and second passivation contact structures can be tunneling passivation contact structures or heterogeneous contact structures. Alternatively, the passivation contact types of the first and second passivation contact structures can be different. For example, one of the first and second passivation contact structures can be a tunneling passivation contact structure, and the other can be a heterogeneous contact structure. In this case, when the passivation contact types of the first and second passivation contact structures are different, the passivation contact types of the first and second passivation contact structures can be adjusted according to different actual application scenario requirements to improve the applicability of the back contact battery provided in this application embodiment under different application scenarios.

[0084] In terms of the stacking method, as shown in Figure 4, when the first doped semiconductor portion 15 is disposed within the first region 12 and the third region 14, in the stacked structure, along the thickness direction of the semiconductor substrate 11, the second doped semiconductor portion 16 is disposed on the side of the first doped semiconductor portion 15 away from the semiconductor substrate 11; at this time, in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, the one closer to the semiconductor substrate 11 is the first doped semiconductor portion 15, and the one farther away from the semiconductor substrate 11 is the second doped semiconductor portion 16.

[0085] When the first doped semiconductor portion is disposed on the first and third regions, as shown in Figures 5 and 6, in the stacked structure, along the thickness direction of the semiconductor substrate 11, the second doped semiconductor portion 16 can be disposed on the side of the first doped semiconductor portion 15 away from the semiconductor substrate 11. In this case, of the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, the one closer to the semiconductor substrate 11 is the first doped semiconductor portion 15, and the one farther away from the semiconductor substrate 11 is the second doped semiconductor portion 16. Alternatively, as shown in Figure 7, the first doped semiconductor portion 15 can also be disposed on the side of the second doped semiconductor portion 16 away from the semiconductor substrate 11. In this case, of the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, the one closer to the semiconductor substrate 11 is the second doped semiconductor portion 16, and the one farther away from the semiconductor substrate 11 is the first doped semiconductor portion 15.

[0086] In a broader sense, the extension direction of the first doped semiconductor portion and the second doped semiconductor portion in the third region is defined as the first direction. This first direction can be any direction parallel to the first surface. Optionally, as shown in Figures 8 and 9, the first direction can be parallel to the arrangement direction of the first region 12 and the second region 13, or the first direction can intersect with the arrangement direction of the first region 12 and the second region 13. In addition, the extension direction of the first doped semiconductor portion 15 in the third region 14 (i.e., the first direction corresponding to the first doped semiconductor portion 15) can be the same as or different from the extension direction of the second doped semiconductor portion 16 in the third region 14 (i.e., the first direction corresponding to the second doped semiconductor portion 16).

[0087] Additionally, as shown in Figures 8 and 9, the third region 14 with the stacked structure may be disposed only between a portion of the first region 12 and a portion of the second region 13; in this case, only a portion of the edge regions of the first doped semiconductor portion 15 and the second doped semiconductor portion 16 that are close to each other are overlapped along the thickness direction of the semiconductor substrate 11; and the first surface also has a fourth region, which is disposed between the first and second regions and does not overlap with the third region. Optionally, the fourth region may only have the first doped semiconductor portion, or only the second doped semiconductor portion, or only have a physical spacer such as an insulating trench or a non-conductive structure such as a chemical film layer made of intrinsic semiconductor material or insulating material, or it may have one of the first doped semiconductor portion and the second doped semiconductor portion and a non-conductive structure. Alternatively, as shown in Figure 10, the third region 14 with the stacked structure may be disposed between the entire region of the first region 12 and the entire region of the second region 13; in this case, along the extension direction of the third region 14, the edge regions of the first doped semiconductor portion 15 and the second doped semiconductor portion 16 that are close to each other are overlapped along the thickness direction of the semiconductor substrate 11.

[0088] It is worth noting that, as shown in Figures 8 to 10, the greater the extension length of the stacked structure formed by the first doped semiconductor portion 15 and the second doped semiconductor portion 16 between the first region 12 and the second region 13, the larger the proportion of the reverse leakage region formed by the electrical connection of the first doped semiconductor portion 15 and the second doped semiconductor portion 16 between the first region 12 and the second region 13 may be, which is more conducive to reducing the reverse breakdown voltage of the back contact battery. In this case, when the back contact battery provided in this embodiment is installed in an environment with few obstructions such as bird droppings, leaves, or dust, the extension length of the stacked structure can be set within a relatively small range to reduce the proportion of the reverse leakage region on the first side, thereby further reducing the leakage loss of the back contact battery in the forward voltage region and ensuring that the back contact battery has high operating efficiency. However, when the back contact battery provided in this embodiment is installed in an environment with many obstructions such as bird droppings, leaves, or dust, the extension length of the stacked structure can be set within a relatively large range to increase the proportion of the reverse leakage region on the first side, thereby reducing the reverse breakdown voltage of the back contact battery and ensuring that the back contact battery has a low risk of hot spots. Therefore, the length of the stacked structure along the third region 14 can be set according to different environmental requirements, thereby improving the applicability of the back contact battery provided in this application embodiment under different practical application scenarios.

[0089] Regarding the width of the stacked structure, exemplarily, along the arrangement direction of the first and second regions, the width of the stacked structure can be greater than or equal to 10 μm and less than or equal to 300 μm. For example, the width of the stacked structure can be 10 μm, 50 μm, 60 μm, 80 μm, 100 μm, 120 μm, 140 μm, 150 μm, 180 μm, 200 μm, 240 μm, 280 μm, or 300 μm, etc. In this case, when the width of the stacked structure is within the above range, and when the back contact battery provided in this application embodiment is installed in an installation environment with few obstructions such as bird droppings, leaves, or dust, the width of the stacked structure can be set within a relatively small range to reduce the proportion of the reverse leakage area on the first side, thereby further reducing the leakage loss of the back contact battery in the positive voltage region and ensuring that the back contact battery has high working efficiency. When the back contact battery provided in this embodiment is installed in an environment with many obstructions such as bird droppings, leaves, or dust, the width of the stacked structure can be set within a relatively large range to increase the proportion of the reverse leakage area on the first side. This helps to reduce the reverse breakdown voltage of the back contact battery and ensures that the back contact battery has a low risk of hot spots. Therefore, the width of the stacked structure can be set according to different environmental requirements, improving the applicability of the back contact battery provided in this embodiment in different practical application scenarios. Furthermore, a width within the aforementioned range can prevent the difficulty of etching the part of the stacked structure, including the first doped semiconductor portion and the second doped semiconductor portion, that is furthest from the semiconductor substrate due to a smaller width. Of course, the width of the stacked structure can also be set to other suitable values, such as less than 10 μm or greater than 300 μm, depending on actual needs; no specific limitation is made here.

[0090] Regarding the morphology of the first doped semiconductor portion and the second doped semiconductor portion in the stacked structure, as shown in Figures 4 to 7, both the first doped semiconductor portion 15 and the second doped semiconductor portion 16 are flat doped semiconductor portions in the stacked structure. Based on this, the first doped semiconductor portion 15, defined in the third region 14, has a connection end and a termination end. The portion of the first doped semiconductor portion 15 located in the first region 12 is its main body. The connection end of the first doped semiconductor portion 15 corresponding to the portion in the third region 14 is connected to the portion of the first doped semiconductor portion 15 located in the first region 12. The termination end of the first doped semiconductor portion 15 refers to the edge where it partially terminates in the stacked structure. Similarly, the second doped semiconductor portion 16, defined in the third region 14, has a connection end and a termination end. The portion of the second doped semiconductor portion 16 located in the second region 13 is its main body. The connection end of the second doped semiconductor portion 16 corresponding to the portion in the third region 14 is connected to the portion of the second doped semiconductor portion 16 located in the second region 13. The termination end of the second doped semiconductor portion 16 refers to the edge where it partially terminates in the stacked structure. In the above-described case, in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the one furthest from the semiconductor substrate 11 is substantially parallel to the first surface. For example, when the first doped semiconductor portion 15 is furthest from the semiconductor substrate 11 in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the first doped semiconductor portion 15 may be parallel to the first surface; or, when the second doped semiconductor portion 16 is furthest from the semiconductor substrate 11 in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the second doped semiconductor portion 16 may be parallel to the first surface.

[0091] Alternatively, as shown in Figure 2, in the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, a portion of the portion farther from the semiconductor substrate protrudes in a direction away from the first surface. Furthermore, the first doped semiconductor portion and the second doped semiconductor portion are physically insulated at the protruding portion farther from the semiconductor substrate. For example, when the first doped semiconductor portion is the one farther from the semiconductor substrate in the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, a portion of the first doped semiconductor portion can protrude in a direction away from the first surface. As another example, when the second doped semiconductor portion is the one farther from the semiconductor substrate in the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, a portion of the second doped semiconductor portion can protrude in a direction away from the first surface. In this case, by providing the protrusion, the spacing between the first doped semiconductor portion and the second doped semiconductor portion in the protruding region along the thickness direction of the semiconductor substrate can be further increased, enhancing the insulation effect of the first doped semiconductor portion and the second doped semiconductor portion in the protruding region, and further reducing leakage current loss when the back contact battery is installed in an environment with less dust or other obstructions. Furthermore, a raised section can be formed to create a central gap, which separates the electrical connections, thereby creating a dispersed reverse leakage area on one side of the first surface. This disperses the heat generation area, further improving the burn-out resistance of the back contact battery and effectively enhancing its safety performance. When both a portion of the second doped semiconductor section and a portion of the first doped semiconductor section in the stacked structure are raised in a direction away from the first surface, the specific arrangement can be adjusted as needed to obtain an appropriately sized electrical connection area and a suitable distribution of electrical connections. Moreover, when a portion of the second doped semiconductor section or the first doped semiconductor section in the stacked structure that is furthest from the semiconductor substrate is raised in a direction away from the first surface, it increases the contact area between the portion furthest from the semiconductor substrate and the surface passivation layer, reduces surface defects in the portion furthest from the semiconductor substrate, and improves the operating efficiency of the back contact battery.

[0092] In the stacked structure including a first doped semiconductor portion and a second doped semiconductor portion, a portion of the one closer to the semiconductor substrate may also bulge in a direction away from the first surface. For example, when the one closer to the semiconductor substrate is the first doped semiconductor portion in the stacked structure, a portion of the first doped semiconductor portion may also bulge in a direction away from the first surface. Similarly, when the one closer to the semiconductor substrate is the second doped semiconductor portion in the stacked structure, a portion of the second doped semiconductor portion may also bulge in a direction away from the first surface. In this case, the area and distribution of the electrical connection between the first and second doped semiconductor portions can be adjusted. Optionally, when a portion of the second doped semiconductor portion and the first doped semiconductor portion in the stacked structure bulges in a direction away from the first surface, the portion closer to the semiconductor substrate has an uneven surface morphology, which is beneficial for increasing the contact area between the first and second doped semiconductor portions in the stacked structure, and for increasing reverse leakage current, thereby further reducing the reverse breakdown voltage and hot spot risk when the back contact battery is installed in an environment with many obstructions such as dust or bird droppings. Therefore, it can be seen that the applicability of the back contact battery provided in this application can be improved in different application scenarios by adjusting the morphology of the first doped semiconductor part and the second doped semiconductor part according to the requirements of the back contact battery in different installation environments.

[0093] Optionally, regarding the location of the protrusion, when a portion of the first doped semiconductor portion in the stacked structure protrudes in a direction away from the first surface, the protruding region can be disposed within each portion of the first doped semiconductor portion in the stacked structure along the first direction (i.e., the extension direction of the first doped semiconductor portion in the third region). When a portion of the second doped semiconductor portion in the stacked structure protrudes in a direction away from the first surface, the protruding region can be disposed within each portion of the second doped semiconductor portion in the stacked structure along the first direction (i.e., the extension direction of the second doped semiconductor portion in the third region).

[0094] Optionally, when a portion of the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure bulges in a direction away from the first surface, the distribution density of the bulging region at the terminating end of the portion away from the semiconductor substrate can be greater than the distribution density of the bulging region at the opposite end of the portion away from the semiconductor substrate. In this case, taking the portion of the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure that is closer to the semiconductor substrate as the first doped semiconductor portion as an example, the bulging region can be formed by the second doped semiconductor portion being affected by etching processes such as high-temperature laser etching or wet etching during the selective etching of the entire layer of the second doped semiconductor portion. Therefore, when the distribution density of the bulge in at least a portion of the terminating end of the portion away from the semiconductor substrate is greater than the distribution density of the bulge at the opposite end, the influence of etching processes such as high-temperature laser etching or wet etching on the area with a smaller bulging distribution density can be reduced, ensuring a higher yield for the back contact battery.

[0095] As for the specific shape of the raised area, it can be determined based on the actual manufacturing process, and no specific limitation is made here.

[0096] For example, the region in the first doped semiconductor portion and / or the second doped semiconductor portion that protrudes in the direction away from the first surface may be a bulge-like shape with a high center and low edges; or, the region in the first doped semiconductor portion and / or the second doped semiconductor portion that protrudes in the direction away from the first surface may also be tunnel-like. In this case, the region in the first doped semiconductor portion and / or the second doped semiconductor portion that protrudes in the direction away from the first surface has at least two examples.

[0097] In the case where the raised region is a bulge shape with a high center and low edges, when the bulge shape and the first and second doped semiconductor portions of the stacked structure are electrically connected to the semiconductor substrate, the raised region increases the contact area between the upper and lower doped semiconductor portions. This results in a higher area ratio of the reverse leakage region on the first side, which helps to reduce the reverse breakdown voltage of the back contact battery in installation environments with many obstructions such as dust or bird droppings. When the bulge shape is formed through a gap or dielectric layer, insulation is achieved in the middle of the bulge shape, while insulation is achieved at the lower edges and the portion of the first and second doped semiconductor portions of the stacked structure closest to the semiconductor substrate... Electrical connections are formed by dispersing the original integral electrical connections to the periphery of the bulge, thus dispersing the reverse leakage area and the heat generation area, further improving the back contact battery's resistance to burn-out and effectively enhancing its safety performance. When the bulge structure is a bulge-shaped protrusion formed by a central gap or dielectric layer, and a dielectric layer is also provided at the lower periphery and between the first doped semiconductor part and the second doped semiconductor part of the stacked structure near the semiconductor substrate, electrical isolation is achieved in both the center and the periphery of the bulge structure. The bulge strengthens the local electrical isolation effect, preventing electrical isolation failure caused by breakdown, insulation film quality issues, or other reasons, thus ensuring the electrical isolation effect.

[0098] Furthermore, when the raised region is tunnel-shaped, and the tunnel-shaped morphology and the stacked structure include an electrical connection between the first doped semiconductor portion and the second doped semiconductor portion closest to the semiconductor substrate, the raised region increases the contact area of ​​the upper and lower doped semiconductor portions. This results in a higher area ratio of the reverse leakage region on the first side, which helps to reduce the reverse breakdown voltage of the back contact battery in installation environments with many obstructions such as dust or bird droppings. When the tunnel-shaped morphology is a tunnel-shaped bulge formed through a space gap or dielectric layer, i.e., insulation is achieved at the middle position of the tunnel-shaped morphology, and electrical connections are formed at the lower sides of the tunnel with the portion of the stacked structure including the first doped semiconductor portion and the second doped semiconductor portion closest to the semiconductor substrate. By dispersing the original integral electrical connection to both sides of the tunnel to form electrical connections, the reverse leakage area is dispersed, and the heat generation area is dispersed, further improving the burn-out resistance of the back contact battery and effectively enhancing its safety performance. When the tunnel-like morphology is a tunnel-like bulge formed by a central gap or dielectric layer, and a dielectric layer is also provided at the lower sides of the tunnel and between the first and second doped semiconductor parts of the stacked structure near the semiconductor substrate, electrical isolation is achieved at both the center and sides of the tunnel-like morphology. The bulge strengthens the local electrical isolation effect, preventing electrical isolation failure due to breakdown, insulation film quality issues, or other reasons, thus ensuring the electrical isolation effect. Based on this, bulge morphologies that meet the corresponding requirements can be set according to different actual application scenarios, or they can be combined with different film layers to improve the applicability of the back contact battery anti-heat spot structure provided in this application to different application scenarios. Optionally, the size and distribution density of the bulge area can be determined according to the requirements of the reverse breakdown voltage and operating efficiency of the back contact battery in the actual application scenario, and are not specifically limited here.

[0099] Furthermore, in the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, at least a portion of the termination end of the one furthest from the semiconductor substrate can be either substantially parallel to the first surface or raised in a direction away from the first surface. As shown in FIG3, in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the one furthest from the semiconductor substrate 11 can also be raised in a direction away from the first surface. For example, when the first doped semiconductor portion 15 is furthest from the semiconductor substrate 11 in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the first doped semiconductor portion 15 can be raised in a direction away from the first surface; or, when the second doped semiconductor portion 16 is furthest from the semiconductor substrate 11 in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the second doped semiconductor portion 16 can be raised in a direction away from the first surface. In this case, the area that flips up in the direction away from the first surface at the termination end of the one away from the semiconductor substrate 11 cannot be electrically connected to the one close to the semiconductor substrate 11 at this point. This can further reduce the proportion of the reverse leakage area in the stacked structure. Moreover, the physical insulation formed by the flipping up of the termination end is more reliable than the insulation achieved by the insulating film layer. This allows the back contact battery to have lower leakage loss in the positive voltage region. Furthermore, by setting the distribution of the area that flips up in the direction away from the first surface at the termination end of the one away from the semiconductor substrate 11, the distribution of the reverse leakage area on the first surface side can be made more uniform. This further prevents the back contact battery from burning out due to local heat concentration and further improves the burn-out resistance of the back contact battery.

[0100] In this application embodiment, the morphology and angle of at least a portion of the termination end of the component away from the semiconductor substrate being turned up in the direction away from the first surface are not specifically limited, as long as they can be applied to the back contact battery provided in this application embodiment. Optionally, at least a portion of the termination end of the component away from the semiconductor substrate may be linear and turned up in the direction away from the first surface; or it may be curved, such as an arc, and turned up in the direction away from the first surface; or it may be irregular in shape and turned up in the direction away from the first surface.

[0101] As can be seen from the above, when the morphology of the termination end of the one farther from the semiconductor substrate in the first doped semiconductor part and the second doped semiconductor part in the stacked structure is different, the proportion of the reverse leakage region between the first region and the second region, as well as the distribution of different reverse leakage regions between the first region and the second region, are different. Therefore, the morphology of the termination end of the one farther from the semiconductor substrate can be determined according to the requirements of the reverse breakdown voltage and working efficiency of the back contact battery in the actual application scenario, as well as the actual manufacturing process.

[0102] Regarding the connection state of at least a portion of the termination end of the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure with the portion closer to the semiconductor substrate, as shown in Figures 1 and 7, in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the portion farther from the semiconductor substrate 11 is connected to the portion closer to the semiconductor substrate 11. Optionally, when the portion farther from the semiconductor substrate 11 in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure is the first doped semiconductor portion 15, at least a portion of the termination end of the first doped semiconductor portion 15 can be connected to the second doped semiconductor portion 16; or, when the portion farther from the semiconductor substrate 11 in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure is the second doped semiconductor portion 16, at least a portion of the termination end of the second doped semiconductor portion 16 can be connected to the first doped semiconductor portion 15. The aforementioned "connection" can be a direct contact between at least a portion of the termination end of the component away from the semiconductor substrate 11 and the component closer to the semiconductor substrate 11, or it can be a connection between at least a portion of the termination end of the component away from the semiconductor substrate 11 and the component closer to the semiconductor substrate 11 via a first interface passivation layer 20 or a second interface passivation layer 21. In this case, at least a portion of the termination end of the component away from the semiconductor substrate 11 can be connected to the component closer to the semiconductor substrate 11 to form a reverse leakage region, which helps to reduce the reverse breakdown voltage of the back junction contact battery. The local connection can disperse the distribution of the reverse leakage region on one side of the first surface, preventing the back contact battery from burning out due to uneven distribution of the reverse leakage region causing local heat concentration. The dispersed arrangement of the reverse leakage region can disperse the heat generation area, further improving the back contact battery's resistance to burnout and effectively improving the safety performance of the back contact battery.

[0103] Alternatively, as shown in FIG11, in the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, at least a portion of the termination end of the portion farther from the semiconductor substrate 11 is electrically isolated from the portion closer to the semiconductor substrate 11. Optionally, the at least portion of the termination end of the portion farther from the semiconductor substrate 11 and the portion closer to the semiconductor substrate 11 can be electrically isolated using any insulating material such as the space gap 17. In this case, another example of the connection method between the at least portion of the termination end of the portion farther from the semiconductor substrate 11 and the portion closer to the semiconductor substrate 11 is provided. Based on this, when the back contact battery provided in this embodiment is installed in an environment with few obstructions such as bird droppings, leaves, or dust, at least a portion of the termination end of the portion farther from the semiconductor substrate 11 can be electrically isolated from the portion closer to the semiconductor substrate 11 to reduce the proportion of the reverse leakage area on the first side, thereby further reducing the leakage loss of the back contact battery in the positive voltage region and ensuring that the back contact battery has high operating efficiency. When the back contact battery provided in this embodiment is installed in an environment with many obstructions such as bird droppings, leaves, or dust, at least a portion of the termination end of the battery located away from the semiconductor substrate 11 can be connected to the battery located closer to the semiconductor substrate 11. This increases the proportion of the reverse leakage area on the first side, thereby reducing the reverse breakdown voltage of the back contact battery and ensuring a lower risk of hot spots. Therefore, the connection state between at least a portion of the termination end of the battery located away from the semiconductor substrate 11 and the battery located closer to the semiconductor substrate 11 can be configured according to different environmental requirements, improving the applicability of the back contact battery provided in this embodiment in different practical application scenarios.

[0104] As one possible implementation, as shown in Figure 12, the back contact battery further includes a dielectric layer 18, which is disposed between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure. In this case, the dielectric layer 18 can achieve physical structural separation. The dielectric layer 18 is a functional layer with electrical insulating or semi-insulating properties. Therefore, by disposing the dielectric layer 18 between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, a portion of the area between them can be separated, reducing leakage loss of the back contact battery in the forward voltage region. This allows the back contact battery to have higher operating efficiency while preventing the reduction of structural reliability caused by setting a large area of ​​intermediate space gap 17 between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure to reduce leakage loss, thereby improving the yield of the back contact battery.

[0105] This application does not specifically limit the material and thickness of the dielectric layer, as long as it can be applied to the back contact battery provided in this application. For example, the dielectric layer can be at least one of silicon oxide, silicon nitride, intrinsic amorphous silicon, intrinsic polycrystalline silicon, intrinsic monocrystalline silicon, doped phosphosilicate glass, doped borosilicate glass, alumina, aluminum nitride, phosphorus nitride, titanium nitride, and silicon carbide.

[0106] Additionally, as shown in Figures 13 and 14, in the stacked structure, the dielectric layer 18 can be disposed in each region between the first doped semiconductor portion 15 and the second doped semiconductor portion 16; or, as shown in Figure 15, the dielectric layer 18 can be disposed only in the region between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 where no intermediate space gap 17 is provided, that is, the dielectric layer 18 is disconnected in the region where an intermediate space gap 17 is provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16.

[0107] As shown in Figure 13, in the stacked structure, the thickness of the region of the dielectric layer 18 where the intermediate space gap 17 is provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 can be equal to the thickness of the region of the dielectric layer 18 where the intermediate space gap 17 is not provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16; or, as shown in Figure 14, the thickness of the dielectric layer 18 in the region where the intermediate space gap 17 is provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 can be less than the thickness of the dielectric layer 18 in the region where the intermediate space gap 17 is not provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16. In this case, it can be understood that both the intermediate space gap 17 and the dielectric layer 18 can separate the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, thereby reducing forward leakage current loss. Therefore, when the thickness of the region of the dielectric layer 18 between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 in the stacked structure is less than the thickness of the region of the dielectric layer 18 without the space gap 17, it is not necessary to provide a dielectric layer 18 with a larger thickness in each region in order to separate a portion of the first doped semiconductor portion 15 and a portion of the second doped semiconductor portion 16 in the stacked structure. This helps to reduce the amount of consumables used in the dielectric layer 18. In addition, in the actual manufacturing process, taking the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure, which is closer to the semiconductor substrate 11, as an example, after forming a whole layer of the second doped semiconductor portion 16 on the corresponding region of the semiconductor substrate 11 and the first doped semiconductor portion 15, the second doped semiconductor portion 16 needs to be selectively etched. The etchant used in the selective etching may flow into the space gap 17 between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 included in the stacked structure and affect the dielectric layer 18. In this case, when the thickness of the region of the dielectric layer 18 in the stacked structure where the intermediate space gap 17 is provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 is less than the thickness of the region of the dielectric layer 18 in the region where the intermediate space gap 17 is not provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16, it is not necessary to strictly control the type of etchant or etching time and other conditions in order to separate the part of the first doped semiconductor portion 15 and the part of the second doped semiconductor portion 16 in the stacked structure so as not to affect the dielectric layer 18, which helps to reduce the difficulty of the process.

[0108] Secondly, in the stacked structure, when the region where the dielectric layer has a space gap between the first doped semiconductor portion and the second doped semiconductor portion is broken, the thickness of each region of the dielectric layer near the space gap can be the same. Alternatively, as shown in FIG. 15, the thickness of the dielectric layer 18 near the space gap 17 can also gradually decrease along the direction near the space gap 17. The application principle of the beneficial effect in this case is similar to the application principle of the beneficial effect described above in the stacked structure where the thickness of the region of the dielectric layer 18 where the space gap 17 is provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 is less than the thickness of the region of the dielectric layer 18 where the space gap 17 is not provided between the first doped semiconductor portion 15 and the second doped semiconductor portion 16, and will not be repeated here. Optionally, the way in which the thickness of the dielectric layer 18 near the space gap 17 gradually decreases along the direction near the space gap 17 can be a linear decrease or a curved decrease, and the specific decreasing trend can be determined according to the actual manufacturing process.

[0109] In addition, when the back contact battery also includes a dielectric layer, in the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, at least a portion of the termination end of the portion farther from the semiconductor substrate can be connected to the portion closer to the semiconductor substrate, or can be electrically isolated through a space gap, or can be electrically isolated through the dielectric layer.

[0110] Furthermore, it is understandable that since the dielectric layer is a non-conductive film, placing it between the first and second doped semiconductor portions in the stacked structure reduces the proportion of the reverse leakage region between the first and second regions, thus affecting the reverse breakdown voltage and operating efficiency of the back contact battery. Therefore, the area ratio of the dielectric layer in the stacked structure can be determined based on the requirements for the reverse breakdown voltage and operating efficiency of the back contact battery in the actual application scenario; no specific limitation is made here.

[0111] For example, the projected area of ​​the stacked structure on one side of the first surface is defined as S1, and the projected area of ​​the dielectric layer on one side of the first surface is defined as S2. The ratio of S2 to S1 can be greater than or equal to 0.5 and less than or equal to 1. In this case, the reverse breakdown voltage and operating efficiency of the back contact battery can be controlled by adjusting the area ratio of the dielectric layer between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, thereby improving the applicability of the back contact battery provided in this application embodiment in different application scenarios.

[0112] Regarding the space gap, in terms of distribution, the space gap can be distributed in any region between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure. Of the first and second doped semiconductor portions included in the stacked structure, the one furthest from the semiconductor substrate can have a connection end and a termination end. The connection end of the one furthest from the semiconductor substrate is connected to its own main body portion. Furthermore, the space gap can be distributed in any region between the first and second doped semiconductor portions included in the stacked structure, along the direction from the termination end toward the center of the one furthest from the semiconductor substrate.

[0113] Along the direction from the terminating end toward the center of the one farther from the semiconductor substrate, a single stacked structure has a continuously distributed second distribution area and a first distribution area. Assuming that the one of the single stacked structure farther from the semiconductor substrate is projected onto a first surface, the direction along the terminating end toward the center of the one farther from the semiconductor substrate refers to the direction from the second distribution area closer to the edge of the projection (which is the projection of the terminating end) toward the first distribution area closer to the center.

[0114] In some embodiments, the distribution density of the space gap in each region between the first doped semiconductor portion and the second doped semiconductor portion of the stacked structure can be the same along the direction from the termination end toward the middle of the semiconductor substrate. In other words, the distribution density of the space gap in the portion of the stacked structure corresponding to the second distribution region can be equal to the distribution density of the space gap in the portion of the stacked structure corresponding to the first distribution region.

[0115] In other embodiments, the distribution density of the space gaps in the portion of the stacked structure corresponding to the second distribution region is greater than the distribution density of the space gaps in the portion of the stacked structure corresponding to the first distribution region, along the direction from the termination end toward the middle of the portion farther from the semiconductor substrate. In this case, during actual manufacturing, taking the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, which is closer to the semiconductor substrate, as an example, at least a portion of the space gaps are formed directly after the portion of the second doped semiconductor portion near the termination end bulges due to high-temperature laser etching during selective etching of the entire layer of the second doped semiconductor portion, or by the etching of a portion of the dielectric layer below the portion of the second doped semiconductor portion near the termination end by an etchant. Furthermore, in the continuously distributed first and second distribution regions of the stacked structure, the second distribution region is closer to the termination end of the portion farther from the semiconductor substrate. In the above scenario, when the distribution density of the space gaps in the portion of the stacked structure corresponding to the second distribution area (i.e., the portion closer to the termination end of the one farther from the semiconductor substrate) is greater than the distribution density of the space gaps in the portion of the stacked structure corresponding to the first distribution area (i.e., the portion farther from the termination end of the one farther from the semiconductor substrate), the difficulty of setting a large number of space gaps in the region of the stacked structure far from the edge of the laser etching operation range or far from the etchant-accessible operation range can be reduced. Simultaneously, it eliminates the need to form a large number of space gaps in the portion of the stacked structure corresponding to the first distribution area and separately process that region using methods such as laser irradiation, thus reducing process difficulty and improving the yield of the back contact battery.

[0116] As for the specific values ​​of the distribution density of the space gap in the first distribution area and the distribution density in the second distribution area, as well as the width of the first distribution area and the second distribution area along the direction from the termination end of the one away from the semiconductor substrate to the middle of the one away from the semiconductor substrate, they can be determined according to the requirements of the reverse breakdown voltage and working efficiency of the back contact battery in the actual application scenario, as well as the actual manufacturing process, and are not specifically limited here.

[0117] For example, the width of the first distribution region is smaller than the width of the second distribution region along the direction from the termination end toward the center of the semiconductor substrate. In this case, it is beneficial to reduce the operation time for forming the space gap, prevent the operation of forming the space gap (such as laser etching or wet etching) from affecting other structures included in the back contact cell, and ensure that the back contact cell has a high yield. Alternatively, the width of the first distribution region may also be equal to the width of the second distribution region along the direction from the termination end toward the center of the semiconductor substrate.

[0118] For example, the ratio of the width of the first distribution region to the width of the second distribution region along the direction from the termination end toward the center of the one away from the semiconductor substrate can be less than or equal to 1:2. For example, the ratio of the width of the first distribution region to the width of the second distribution region along the direction from the termination end toward the center of the one away from the semiconductor substrate can be 1:10, 1:8, 1:6, 1:5, 1:4, 1:3, or 1:2, etc.

[0119] As one possible implementation, as shown in FIG16, the back contact battery may further include a surface passivation layer 19. This surface passivation layer 19 covers the side of the first doped semiconductor portion 15 in the first region 12 and the second doped semiconductor portion 16 in the second region 13 that faces away from the semiconductor substrate 11, and fills the space between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 in the stacked structure. Furthermore, at least a portion of the space gap 17 is surrounded by the surface passivation layer 19. In this case, the surface passivation layer 19 can not only cover the side of the first doped semiconductor portion 15 in the first region 12 and the second doped semiconductor portion 16 in the second region 13 that faces away from the semiconductor substrate 11, but also fill the space between the first doped semiconductor portion 15 and the second doped semiconductor portion 16 in the stacked structure, increasing the passivation area of ​​the surface passivation layer 19, further reducing surface defects on the first side, and improving the operating efficiency of the back contact battery.

[0120] This application does not specifically limit the material and thickness of the surface passivation layer, as long as it can be applied to the back contact battery provided in this application.

[0121] Secondly, embodiments of this application provide a method for manufacturing a back contact battery. Optionally, the method for manufacturing the back contact battery includes the following steps:

[0122] A semiconductor substrate is provided. The semiconductor substrate has a first surface and a second surface opposite to each other. The first surface has a first region and a second region spaced apart, and a third region located between the first region and the second region. The material and conductivity type of the semiconductor substrate, as well as the distribution of the first region, the second region and the third region on the first surface, can be referred to the preceding text and will not be repeated here.

[0123] Next, a first doped semiconductor portion is formed within or above the first and third regions. The formation location and material of the first doped semiconductor portion on one side of the first surface can be referred to the previous text, and will not be repeated here.

[0124] For example, forming a first doped semiconductor portion disposed within or above the first and third regions may include: forming a first doped semiconductor portion disposed entirely on one side of the first surface; next, forming a dielectric layer on the portion of the first doped semiconductor portion corresponding to the first and third regions; and next, removing the portion of the first doped semiconductor portion corresponding to the second region.

[0125] In the actual manufacturing process, when the first doped semiconductor portion is formed in the first and third regions, processes such as diffusion or ion implantation can be used to form a monolithic first doped semiconductor portion on one side of the first surface. When the first doped semiconductor portion is formed on the first and third regions, processes such as chemical vapor deposition can be used to form a monolithic intrinsic semiconductor layer on the first surface. Then, processes such as diffusion or ion implantation are used to dope the intrinsic semiconductor layer to form the first doped semiconductor portion. Next, processes such as deposition and laser etching can be used to form a dielectric layer on the portions of the first doped semiconductor portion corresponding to the first and third regions. Alternatively, if the material of the first doped semiconductor portion includes silicon and the first doped semiconductor portion is formed using a diffusion process, a dielectric layer is also formed on the side of the first doped semiconductor portion away from the semiconductor substrate after its formation. In this case, processes such as laser irradiation can be used to heat-treat at least the portion of the dielectric layer corresponding to the second region, allowing the unheat-treated portion of the dielectric layer to serve as a mask. After forming the dielectric layer, processes such as wet etching can be used, and under the protection of the dielectric layer, at least the portion of the first doped semiconductor portion corresponding to the second region can be removed. It should be noted that when the portion of the first doped semiconductor part corresponding to the third region is only disposed between a portion of the first region and a portion of the second region, the portion of the first doped semiconductor part corresponding to the fourth region also needs to be removed.

[0126] It should be noted that when the back contact battery also includes a first interface passivation layer, the first interface passivation layer can be formed entirely using processes such as chemical vapor deposition or thermal oxidation before forming the first doped semiconductor portion. Then, after forming the first doped semiconductor portion entirely on the first interface passivation layer, both the first interface passivation layer and the first doped semiconductor portion can be selectively etched under the protection of the same dielectric layer. Alternatively, the selective etching of the first interface passivation layer can be performed before forming the first doped semiconductor portion.

[0127] Next, a second doped semiconductor portion is formed on the second and third regions. The second doped semiconductor portion has an opposite conductivity type to the first doped semiconductor portion. In the third region, the first and second doped semiconductor portions are stacked along the thickness direction of the semiconductor substrate to form a stacked structure. In the stacked structure, a space gap exists between the first and second doped semiconductor portions.

[0128] The material, conductivity type, and distribution of the second doped semiconductor can be found in the previous text and will not be repeated here.

[0129] For example, forming a second doped semiconductor portion disposed on a second region and a third region may include the steps of: forming a second doped semiconductor portion integrally disposed on at least the second region and the first doped semiconductor portion; and forming a mask material layer on the side of the second doped semiconductor portion facing away from the semiconductor substrate. Next, a laser irradiation process is used to process at least a portion of the mask material layer corresponding to the first region, so that the unprocessed portion of the mask material layer forms an etching mask layer. Next, under the masking action of the etching mask layer, the portion of the second doped semiconductor portion at least corresponding to the first region and the portion of the dielectric layer at least corresponding to the first region are removed; and at least a portion of the dielectric layer located between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure is etched to form at least a space gap in the portion.

[0130] In the actual manufacturing process, processes such as chemical vapor deposition can be used to form an intrinsic semiconductor layer, at least in the second region and on the first doped semiconductor portion, as a single layer. Then, processes such as diffusion or ion implantation are used to dope the intrinsic semiconductor layer to form the second doped semiconductor portion. If the material of the second doped semiconductor portion includes silicon and a diffusion process is used to form it, a mask material layer made of doped silicon glass can be formed simultaneously on the side of the second doped semiconductor portion facing away from the semiconductor substrate. If the material of the mask material layer is not doped silicon glass, a deposition process is required to form a mask material layer on the side of the second doped semiconductor portion facing away from the semiconductor substrate after the second doped semiconductor portion is formed. Next, a laser irradiation process is used to process at least the portion of the mask material layer corresponding to the first region to form an etching mask layer. When the second doped semiconductor portion is only located in a portion of the region between the first and second regions, the portion of the mask material layer corresponding to the fourth region also needs to be processed; when the second doped semiconductor portion is located in the entire region between the first and second regions, only the portion of the mask material layer corresponding to the first region needs to be processed. Next, under the masking effect of the etching mask layer, wet etching and other processes are used to remove at least the portion of the second doped semiconductor portion corresponding to the first region and at least the portion of the dielectric layer corresponding to the first region; and at least the portion of the dielectric layer located between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure is etched to form at least a space gap in the middle portion.

[0131] It should be noted that the preceding description of the back contact battery manufacturing process uses the example of forming the first doped semiconductor portion first, followed by the second doped semiconductor portion, as an example. This does not mean that the formation order of the first doped semiconductor portion must necessarily be before the second doped semiconductor portion. When both the first and second doped semiconductor portions are formed on the semiconductor substrate, the manufacturing method provided in this application does not specifically limit the formation order of the first and second doped semiconductor portions. The first doped semiconductor portion can be formed first, followed by the second doped semiconductor portion; or, the second doped semiconductor portion can be formed first, followed by the first doped semiconductor portion. The formation order of the first and second doped semiconductor portions can be determined based on their positional relationship in the stacked structure.

[0132] Furthermore, during the selective etching of the first doped semiconductor portion, each region of the dielectric layer acting as a mask on the side facing away from the semiconductor substrate can have a flat surface morphology. Alternatively, at least a portion of the dielectric layer on the side facing away from the semiconductor substrate may have an uneven surface morphology. In this case, taking the first doped semiconductor portion as the one closest to the semiconductor substrate among the first and second doped semiconductor portions included in the stacked structure as an example, by providing a dielectric layer with an uneven surface morphology, when selectively etching the entire layer of the second doped semiconductor portion, the etchant etches the uneven portions of the dielectric layer to form a gap between the first and second doped semiconductor portions in the stacked structure. Alternatively, when depositing the entire layer of the second doped semiconductor portion, the deposition gas may have a poor coating effect on the uneven surface morphology of the dielectric layer, thus forming a gap. This provides another example for the formation of gaps, improving the applicability of the embodiments of this application in different application scenarios and improving the yield of the manufactured back contact battery.

[0133] Optionally, when at least a portion of the dielectric layer on the side facing away from the semiconductor substrate has an uneven surface morphology, the uneven morphology and distribution location of the dielectric layer can be determined in conjunction with the distribution of the interstitial gaps, and no specific limitation is made here.

[0134] Then, a surface passivation layer can be formed on one side of the first surface using processes such as chemical vapor deposition. This surface passivation layer is disposed on the first doped semiconductor portion and the second doped semiconductor portion, and fills the space between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure. At least a portion of the space gaps are surrounded by the surface passivation layer. Information such as the material of this surface passivation layer can be found above and will not be repeated here.

[0135] The beneficial effects of the second aspect and its various implementations in the embodiments of this application can be found by referring to the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0136] Thirdly, embodiments of this application provide a photovoltaic module, which includes a cell string and an encapsulation layer. The cell string is formed by connecting back-contact cells provided in the first aspect and its various implementations. The encapsulation layer is used to cover the surface of the cell string.

[0137] The beneficial effects of the third aspect and its various implementations in the embodiments of this application can be referred to the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0138] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0139] The embodiments of this application have been described above. However, these embodiments are merely for clarity and are not intended to limit the scope of this application. The scope of this application is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this application, and all such substitutions and modifications should fall within the scope of this application.

Claims

1. A back-contact battery, wherein, include: A semiconductor substrate having opposing first and second surfaces; The first surface has a first region and a second region distributed at intervals, and a third region located between the first region and the second region; A first doped semiconductor portion is disposed within or on the first region and the third region; A second doped semiconductor portion is disposed on the second region and the third region; The second doped semiconductor portion and the first doped semiconductor portion have opposite conductivity types; in the third region, the first doped semiconductor portion and the second doped semiconductor portion are stacked along the thickness direction of the semiconductor substrate to form a stacked structure. In the stacked structure, there is a space gap between the first doped semiconductor portion and the second doped semiconductor portion.

2. The back contact battery according to claim 1, wherein, In the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, at least a portion of the terminating end of the one that is far from the semiconductor substrate is flipped up in a direction away from the first surface.

3. The back contact battery according to claim 1, wherein, In the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, a portion of the one that is away from the semiconductor substrate bulges in a direction away from the first surface; in the bulging region of the one that is away from the semiconductor substrate, the first doped semiconductor portion and the second doped semiconductor portion are physically insulated.

4. The back contact battery according to claim 3, wherein, The regions in the first doped semiconductor portion and / or the second doped semiconductor portion that bulge outward from the first surface are either high in the middle and low around the edges, or tunnel-shaped.

5. The back contact battery according to claim 1, wherein, In the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, at least a portion of the termination end of the portion farther from the semiconductor substrate is connected to the portion closer to the semiconductor substrate.

6. The back contact battery according to claim 1, wherein, The back contact battery further includes a dielectric layer disposed between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure.

7. The back contact battery according to claim 6, wherein, In the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, at least a portion of the termination end of the portion farther from the semiconductor substrate is electrically isolated from the portion closer to the semiconductor substrate by the dielectric layer and / or the space gap.

8. The back contact battery according to claim 6, wherein, In the stacked structure, the thickness of the dielectric layer in the region where the intermediate space gap is provided between the first doped semiconductor portion and the second doped semiconductor portion is less than the thickness of the dielectric layer in the region where the intermediate space gap is not provided between the first doped semiconductor portion and the second doped semiconductor portion; And / or, in the stacked structure, the dielectric layer is interrupted in the region where the intermediate space gap is provided between the first doped semiconductor portion and the second doped semiconductor portion, and the thickness of the dielectric layer near the end of the intermediate space gap gradually decreases in the direction close to the intermediate space gap.

9. The back contact battery according to any one of claims 1 to 8, wherein, Of the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure, the one farther away from the semiconductor substrate has a connection end and a termination end, and the connection end of the one farther away from the semiconductor substrate is connected to its own main body portion; Along the direction from the termination end toward the middle of the one remote from the semiconductor substrate, each of the stacked structures has a continuously distributed second distribution region and a first distribution region; The distribution density of the intermediate space gap in the portion of the stacked structure corresponding to the second distribution area is greater than the distribution density of the intermediate space gap in the portion of the stacked structure corresponding to the first distribution area.

10. The back contact battery according to claim 9, wherein, Along the direction from the termination end toward the middle of the one farther from the semiconductor substrate, the width of the first distribution region is smaller than the width of the second distribution region.

11. The back contact battery according to any one of claims 1 to 8, wherein, The back contact battery further includes a surface passivation layer; the surface passivation layer covers the first doped semiconductor portion in the first region and the second doped semiconductor portion in the second region on the side opposite to the semiconductor substrate, and fills the space between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure; At least a portion of the space gap is surrounded by the surface passivation layer.

12. The back contact battery according to any one of claims 1 to 8, wherein, The back contact battery further includes a first interface passivation layer; the first interface passivation layer is disposed at least between the semiconductor substrate and the first doped semiconductor portion; And / or, the back contact battery further includes a second interface passivation layer, the second interface passivation layer being disposed at least between the second doped semiconductor portion and the semiconductor substrate.

13. A method for manufacturing a back contact battery, wherein, include: Provide a semiconductor substrate; The semiconductor substrate has a first side and a second side opposite to each other; The first surface has a first region and a second region distributed at intervals, and a third region located between the first region and the second region; A first doped semiconductor portion is formed within or above the first region and the third region; A second doped semiconductor portion is formed on the second region and the third region; wherein the second doped semiconductor portion and the first doped semiconductor portion have opposite conductivity types; in the third region, the first doped semiconductor portion and the second doped semiconductor portion are stacked along the thickness direction of the semiconductor substrate to form a stacked structure; In the stacked structure, there is a space gap between the first doped semiconductor portion and the second doped semiconductor portion.

14. The method for manufacturing a back contact battery according to claim 13, wherein, The formation of the first doped semiconductor portion disposed within or above the first region and the third region includes: A first doped semiconductor portion is formed, which is disposed entirely on one side of the first surface; A dielectric layer is formed on the portion of the first doped semiconductor corresponding to the first region and the third region; Remove the portion of the first doped semiconductor portion corresponding to the second region.

15. The method for manufacturing a back contact battery according to claim 14, wherein, At least a portion of the dielectric layer on the side opposite to the semiconductor substrate has an uneven surface morphology.

16. The method for manufacturing a back contact battery according to claim 14 or 15, wherein, The second doped semiconductor portion formed on the second region and the third region includes: A second doped semiconductor portion is formed integrally on at least the second region and the first doped semiconductor portion; and a mask material layer is formed on the side of the second doped semiconductor portion away from the semiconductor substrate; A laser irradiation process is used to process at least a portion of the mask material layer corresponding to the first region, so that the unprocessed portion of the mask material layer forms an etched mask layer; Under the masking action of the etching mask layer, at least a portion of the second doped semiconductor portion corresponding to the first region and at least a portion of the dielectric layer corresponding to the first region are removed; and at least a portion of the dielectric layer located between the first doped semiconductor portion and the second doped semiconductor portion included in the stacked structure is etched to form at least a portion of the intermediate space gap.

17. A photovoltaic module, wherein, include: A battery string and a packaging layer, wherein the battery string is formed by connecting back-contact batteries as described in any one of claims 1 to 12; The encapsulation layer is used to cover the surface of the battery string.

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