Back-contact cell, manufacturing method therefor, and photovoltaic module

Abstract

The present application relates to the field of photovoltaics, and discloses a back-contact cell and a photovoltaic module, aiming to reduce hot spot risks in back-contact cells while effectively controlling leakage loss in the back-contact cell by means of a portion of a dielectric layer where no leakage channel is provided. The back-contact cell comprises: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a dielectric layer. The first doped semiconductor layer is disposed on a first region and a third region. The second doped semiconductor layer is disposed on a second region and the third region. The first doped semiconductor layer and the second doped semiconductor layer have opposite doping types. In the third region, the first doped semiconductor layer and the second doped semiconductor layer are arranged in an overlapping manner in the thickness direction of the semiconductor substrate, so as to form a stacked structure. The dielectric layer is disposed at least between the first doped semiconductor layer and the second doped semiconductor layer. A leakage channel is provided in the dielectric layer.

Description

A back contact battery and its manufacturing method, and a photovoltaic module

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202410918523.8, filed on July 10, 2024, entitled “A Back Contact Battery and a Photovoltaic Module”, and Chinese Patent Application No. 202410918519.1, filed on July 10, 2024, entitled “A Back Contact Battery and its Manufacturing Method, and a Photovoltaic Module”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of photovoltaic technology, and in particular to a back contact battery and its manufacturing method, and a photovoltaic module. Background Technology

[0004] A back-contact solar cell is a solar cell in which there are no electrodes on the light-facing side of the cell, and both the positive and negative electrodes are located on the back-facing side of the cell. This reduces the shading of the cells by the electrodes, increases the short-circuit current of the cells, and improves the energy conversion efficiency of the cells.

[0005] From the perspective of the back contact cell, the two doped semiconductor layers with opposite doping types in the back contact cell need to be spaced apart to suppress forward leakage and ensure high photoelectric conversion efficiency in the forward voltage region. However, from the perspective of the photovoltaic module, when the two doped semiconductor layers with opposite doping types in the back contact cell are spaced apart, the resistance between them is high, resulting in a higher reverse breakdown voltage and a higher risk of hot spots. In this situation, existing solar cells mitigate the hot spot risk to some extent by locally electrically connecting the two doped semiconductor layers with opposite doping types.

[0006] However, existing back-contact batteries with lower hot spot risk do not perform well. Summary of the Invention

[0007] The purpose of this application is to provide a back contact battery and its manufacturing method, as well as a photovoltaic module, so as to directly or indirectly connect a portion of the first doped semiconductor layer and a portion of the second doped semiconductor layer with opposite doping types in the stacked structure by means of a leakage channel disposed in the dielectric layer. This makes the back contact battery have a lower risk of hot spots, while the portion of the dielectric layer without leakage channels can effectively reduce the direct transport and recombination of charge carriers collected by the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure, thereby effectively controlling the leakage loss of the back contact battery and enabling the back contact battery to have good working performance.

[0008] To achieve the above objectives, in a first aspect, this application provides a back-contact battery comprising: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a dielectric layer. The semiconductor substrate has opposing first and second surfaces. The first surface includes a first region and a second region spaced apart, and a third region located between the first and second regions. The first doped semiconductor layer is disposed on the first and third regions. The second doped semiconductor layer is disposed on the second and third regions. The doping types of the first and second doped semiconductor layers are opposite. On the third region, the first and second doped semiconductor layers are overlapped along the thickness direction of the semiconductor substrate to form a stacked structure. The dielectric layer is disposed at least between the first and second doped semiconductor layers. At least one leakage channel is provided within the dielectric layer.

[0009] In the back contact battery provided in this application, in the third region, a first doped semiconductor layer and a second doped semiconductor layer with opposite doping types can be stacked along the thickness direction of the semiconductor substrate to form a stacked structure. Furthermore, the back contact battery also includes a dielectric layer disposed at least between the first doped semiconductor layer and the second doped semiconductor layer. The dielectric layer enables physical separation of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure. At least one leakage channel is provided within the dielectric layer, allowing partial areas of the first doped semiconductor layer and partial areas of the second doped semiconductor layer in the stacked structure to be electrically connected directly or indirectly via this leakage channel. Because the first doped semiconductor layer and the second doped semiconductor layer have opposite doping types, a junction with a low reverse breakdown voltage can be formed between the first doped semiconductor layer and the second doped semiconductor layer by creating localized leakage points. This facilitates higher burn-out resistance when the back contact battery is shielded and reduces the risk of hot spots on the back contact battery.

[0010] Optionally, the thickness of the portion of the dielectric layer where the leakage channel is not provided is greater than or equal to 13 nm.

[0011] The dielectric layer has a thickness of 13 nm or more to provide electrical insulation or semi-insulation. Therefore, the portion of the dielectric layer without leakage channels can electrically isolate certain regions of the first and second doped semiconductor layers in the stacked structure. This effectively reduces the direct transport and recombination of carriers collected by the first and second doped semiconductor layers, thereby effectively controlling the leakage loss of the back contact battery and ensuring good performance. Thus, the back contact battery provided in this application can effectively control leakage loss in the forward voltage region by utilizing the insulation or semi-insulation characteristics of the portion of the dielectric layer without leakage channels. Furthermore, the leakage is controllable through leakage channels within the dielectric layer, reducing the risk of hot spots while achieving adjustable leakage and electrical isolation. This facilitates a balance between the reverse breakdown voltage and operating efficiency of the back contact battery. It is understandable that due to the existence of leakage channels, the thickness of the dielectric layer near the leakage channels may be smaller than 13nm. This is due to limitations of existing fabrication processes or other reasons, which makes it impossible for the dielectric layer in this application to reach an ideal state locally. This should also be considered as being included within the scope of protection of this application.

[0012] As one possible implementation, the first doped semiconductor layer and the second doped semiconductor layer are connected through a dielectric layer. In this case, when the leakage channel does not penetrate the dielectric layer, the connection can be indirect through the dielectric layer. When the leakage channel penetrates the dielectric layer, the first doped semiconductor layer and the second doped semiconductor layer can also be directly connected. In the presence of a leakage channel, a portion corresponding to the leakage channel (which has electrical conductivity) is used to form a reverse leakage region, which helps to reduce the reverse breakdown voltage of the back contact battery and improve the burn-out resistance of the back contact battery.

[0013] As one possible implementation, the thickness of the portion of the dielectric layer containing the leakage channel is less than or equal to 7 nm. By keeping the thickness of the dielectric layer at the leakage channel below 7 nm, leakage is achieved at the leakage channel, giving the back contact battery resistance to hot spots. Furthermore, by controlling the thickness of the dielectric layer at the leakage channel, the degree of leakage between the first and second doped semiconductor layers can be adjusted, achieving controllable leakage magnitude. This enables controllable leakage and electrical isolation, facilitating a balance between the reverse breakdown voltage and operating efficiency of the back contact battery.

[0014] As one possible implementation, the dielectric layer is interrupted at the leakage channel. The isolation effect of the dielectric layer between the portions of the first and second doped semiconductor layers corresponding to the leakage channel is eliminated, reducing the on-resistance of these portions. Simultaneously, this also helps to reduce the obstruction of the portion of the dielectric layer corresponding to the leakage channel from the doped element on the side furthest from the semiconductor substrate to the opposite side of the dielectric layer during the formation of the stacked structure comprising the first and second doped semiconductor layers. This increases the contact area of ​​the direct or indirect electrical connection region between the first and second doped semiconductor layers, thereby reducing the reverse breakdown voltage of the back contact battery and further improving its resistance to burn-out in installation environments with abundant dust and other obstructions.

[0015] In practice, the two types of leakage current channels (i.e., leakage current channels that do not penetrate the dielectric layer and leakage current channels that penetrate the dielectric layer) can be set at different parts of the dielectric layer and used in combination to achieve the effect of optimizing the leakage current configuration.

[0016] As one possible implementation, the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer has an irregular morphology.

[0017] Compared to the flat and regular morphology of the mating surface at the connection region, when the mating surface at the connection region has an irregular morphology, the mating surface has undulating features, which is beneficial to increasing the contact area of ​​the first doped semiconductor layer and the second doped semiconductor layer at the connection region, that is, to increasing the junction area of ​​the mating junction, and thus to further reduce the reverse breakdown voltage of the back contact battery and reduce the hot spot risk of the back contact battery.

[0018] As one possible implementation, the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer forms an angle of less than 90° with the first surface of the semiconductor substrate.

[0019] In a stacked structure comprising a first doped semiconductor layer and a second doped semiconductor layer, where the thickness of the layer closer to the semiconductor substrate is fixed, compared to a mating surface of the connection region between the first and second doped semiconductor layers being perpendicular to the first surface, when the mating surface of the connection region forms an angle of less than 90° with the first surface, the mating surface is inclined relative to the first surface. This allows for a larger contact area in the connection region between the first and second doped semiconductor layers, further increasing the junction area of ​​the mating junction. This, in turn, helps to further reduce the reverse breakdown voltage of the back contact battery and reduce the risk of hot spots. Furthermore, when the mating surface of the connection region is inclined relative to the first surface, it also allows the layer furthest from the semiconductor substrate in the stacked structure to better cover the layer closest to the semiconductor substrate, preventing defects such as voids from forming in the connection region of the layer furthest from the semiconductor substrate, thus improving the yield of the back contact battery.

[0020] As one possible implementation, the back contact battery also includes a third doped semiconductor portion located between the first doped semiconductor layer and the second doped semiconductor layer, the third doped semiconductor portion being connected to the first doped semiconductor layer and the second doped semiconductor layer respectively.

[0021] As one possible implementation, the material of the third doped semiconductor portion includes at least one doping element. The doping type of the third doped semiconductor portion is the same as that of one of the first doped semiconductor layer and the second doped semiconductor layer, and the doping concentration of the doping element in the third doped semiconductor portion is less than the doping concentration of the doping element in the first doped semiconductor layer or the second doped semiconductor layer that has the same doping type as the third doped semiconductor portion.

[0022] Taking the example where the doping type of the third doped semiconductor section is the same as that of the second doped semiconductor layer: when the doping concentration of the doped element in the third doped semiconductor section is less than that in the second doped semiconductor layer, a high-low junction with a doping concentration gradient can be formed between the third doped semiconductor section and the second doped semiconductor layer along the direction of the first doped semiconductor layer close to the second doped semiconductor layer. Under the action of the built-in electric field of the high-low junction, it is beneficial to the transmission and dispersion of leakage current, which can further reduce the reverse breakdown voltage of the back contact battery and improve the burn-out resistance of the back contact battery.

[0023] As one possible implementation, a dielectric layer is disposed between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer through the dielectric layer having a leakage current channel. In this case, the dielectric layer can adjust the electrical conduction efficiency between the third doped semiconductor section and at least one of the first and second doped semiconductor layers. For example, insulation or semi-insulation can be achieved by the area of ​​the dielectric layer without leakage channels, or the electrical conduction efficiency can be controlled by the thickness of the dielectric layer. Furthermore, leakage channels can be set in the dielectric layer to make it easier for local current to conduct. The number and size of the leakage channels set in the dielectric layer can be adjusted to regulate the contact area and carrier transport efficiency of the connection area between at least one end of the third doped semiconductor section and the first (or second) doped semiconductor layer. This is beneficial to regulate the leakage of the reverse leakage area on the side of the first and second doped semiconductor layers in the stacked structure, thereby facilitating the balance between the reverse breakdown voltage and operating efficiency of the back contact battery, achieving both hot spot prevention and ensuring minimal or no battery efficiency loss.

[0024] As one possible implementation, a dielectric layer is provided between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer through the dielectric layer provided with a leakage current channel. In this case, the portion of the third doped semiconductor portion near the dielectric layer is doped with at least one group IIIA doping element and at least one group VA doping element, that is, the portion of the third doped semiconductor portion near the dielectric layer is doped with both P-type and N-type doping elements.

[0025] With other factors remaining constant, compared to the portion of the third doped semiconductor near the dielectric layer being doped with only a group IIIA or group VA dopant, when the portion of the third doped semiconductor near the dielectric layer is doped with both group IIIA and group VA dopant, the doping types of P-type and N-type dopant will recombine in the third doped semiconductor, thus weakening its conductivity. Therefore, by adjusting the doping concentration of the other group IIIA or group VA dopant in the dielectric layer, the electrical conductivity can be controlled, thereby facilitating a balance between the reverse breakdown voltage and operating efficiency of the back contact battery.

[0026] As one possible implementation, the mating surface of the connection region between the third doped semiconductor layer and the first doped semiconductor layer, and / or the mating surface of the connection region between the third doped semiconductor layer and the second doped semiconductor layer, has an irregular morphology. The application principle of the beneficial effects in this case can be referenced to the application principle of the beneficial effects of the irregular morphology of the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer described above, and will not be repeated here.

[0027] As one possible implementation, the mating surface of the connection region between the third doped semiconductor layer and the first doped semiconductor layer, and / or the mating surface of the connection region between the third doped semiconductor layer and the second doped semiconductor layer, forms an angle of less than 90° with the first surface of the semiconductor substrate. The beneficial effect in this case can be understood by referring to the previously described principle regarding the beneficial effect of the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer forming an angle of less than 90° with the first surface of the semiconductor substrate, and will not be repeated here.

[0028] As one possible implementation, the size of the grains in the third doped semiconductor section is smaller than the size of the grains in at least one of the first and second doped semiconductor layers included in the stacked structure. It is understood that, in reality, even grain sizes within the same region are inconsistent, and it cannot be guaranteed that every grain will satisfy the aforementioned relationship. Therefore, when the size of most grains in the third doped semiconductor section is smaller than the size of the grains in at least one of the first and second doped semiconductor layers included in the stacked structure, it can be considered that the size of the grains in the third doped semiconductor section is smaller than the size of the grains in at least one of the first and second doped semiconductor layers included in the stacked structure.

[0029] With the above technical solution, the smaller the grains in the doped semiconductor layer, the more interfaces there are between the grains, resulting in a higher resistance at the grain interfaces. Therefore, the grain size in the third doped semiconductor section is smaller than the grain size of at least one of the first and second doped semiconductor layers in the stacked structure. In this case, the resistance of the third doped semiconductor section is greater than the resistance of at least one of the first and second doped semiconductor layers in the stacked structure, which helps to enhance the regulation of carrier transport between the first and second doped semiconductor layers through the third doped semiconductor section. Therefore, placing the smaller-grained third doped semiconductor section between the first and second doped semiconductor layers in the stacked structure can limit carrier exchange on both sides, reduce leakage current, prevent back-contact battery efficiency loss, consume some leakage current, and allow some leakage current to pass through, thus achieving the function of preventing hot spots.

[0030] As one possible implementation, the average size of the grains in the third doped semiconductor section is smaller than the average size of the grains in at least one of the first and second doped semiconductor layers included in the stacked structure. The application principle of the beneficial effect in this case can be referenced from the application principle of the beneficial effect of the grain size in the third doped semiconductor section being smaller than the grain size in at least one of the first and second doped semiconductor layers included in the stacked structure, as described above, and will not be repeated here.

[0031] As one possible implementation, the crystallinity of the third doped semiconductor portion is less than the crystallinity of at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure. The application principle of the beneficial effect in this case can be referred to the application principle of the beneficial effect of the grain size in the third doped semiconductor portion being less than the grain size of at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, as described above, and will not be repeated here.

[0032] As one possible implementation, in the stacked structure comprising a first doped semiconductor layer and a second doped semiconductor layer, if the one closer to the semiconductor substrate is the first doped semiconductor layer, the surface of the third region is higher than the surface of the second region in the direction from the second surface to the first surface; the dielectric layer further extends at least between the sidewall where the third region transitions to the second region and the second doped semiconductor layer. Alternatively, in the stacked structure comprising a first doped semiconductor layer and a second doped semiconductor layer, if the one closer to the semiconductor substrate is the second doped semiconductor layer, the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface; the dielectric layer further extends at least between the sidewall where the third region transitions to the first region and the first doped semiconductor layer.

[0033] In the stacked structure, where the first doped semiconductor layer and the second doped semiconductor layer are located closer to the semiconductor substrate, and the surface of the third region is higher than the surface of the second region along the direction from the second surface to the first surface, the second doped semiconductor layer extends from the surface of the second region and through the sidewall transitioning from the third region to the second region to the portion of the first doped semiconductor layer corresponding to the third region. Based on this, when the dielectric layer extends at least between the sidewall transitioning from the third region to the second region and the second doped semiconductor layer, the portion of the dielectric layer extending to the sidewall transitioning from the third region to the second region ensures sufficient coverage of the dissimilar doped interface region. This ensures that the leakage loss between the first and second doped semiconductor layers in the stacked structure is effectively controlled even with minimal dust or other obstructions in the mounting environment, further facilitating a balance between the reverse breakdown voltage and operating efficiency of the back contact battery. Furthermore, the portion of the dielectric layer extending at least to the sidewall transitioning from the third region to the second region passivates the portion of the semiconductor substrate corresponding to the junction of the second and third regions, further improving the operating performance of the back contact battery. In addition, in the case where the second doped semiconductor layer is closer to the semiconductor substrate than the first doped semiconductor layer in the stacked structure, the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface; the beneficial effects of the dielectric layer extending at least to the sidewall of the third region transitioning to the first region and the first doped semiconductor layer can be referred to above, and will not be repeated here.

[0034] As one possible implementation, the size of the leakage channel is greater than or equal to 12 nm, and / or the size of the leakage channel is less than or equal to the thickness of the first doped semiconductor layer and the second doped semiconductor layer of the stacked structure that is closer to the semiconductor substrate.

[0035] When the size of the leakage channel is greater than or equal to 12nm, it can prevent the reduction in the reverse breakdown voltage of the back contact battery from being too small due to the small size of the leakage channel, thus ensuring that the back contact battery has a low risk of hot spots. Furthermore, when the size of the leakage channel is less than or equal to the thickness of the one of the first and second doped semiconductor layers closest to the semiconductor substrate in the stacked structure, it can prevent the entire area of ​​the sidewall of the first and second doped semiconductor layers furthest from the semiconductor substrate from being exposed through the leakage channel. This facilitates control of the connection area between the first and second doped semiconductor layers in the stacked structure, ensuring that the back contact battery has low leakage loss in the forward voltage region.

[0036] As one possible implementation, a dielectric layer is disposed between a portion of the first doped semiconductor layer and the first region included in the first surface, and at least one leakage channel is disposed within the portion of the dielectric layer corresponding to the first region. And / or, a dielectric layer is disposed between a portion of the second doped semiconductor layer and the second region included in the first surface, and at least one leakage channel is disposed within the portion of the dielectric layer corresponding to the second region. The presence of dielectric layers between the portion of the first doped semiconductor layer and the first region, and / or between the portion of the second doped semiconductor layer and the second region, allows for passivation of the first region and / or the second region, while simultaneously enabling the collection of charge carriers within the semiconductor substrate through the leakage channels within the dielectric layer, thereby achieving charge carrier regulation and optimizing battery performance.

[0037] As one possible implementation, the straight-line distance between different leakage channels disposed in the portion of the dielectric layer between the first doped semiconductor layer and the second doped semiconductor layer is L1; the straight-line distance between different leakage channels disposed in the portion of the dielectric layer between the first doped semiconductor layer and the first region, or in the portion between the second doped semiconductor layer and the second region, is L2, where L1 > L2. And / or, the size of the leakage channel disposed in the portion of the dielectric layer between the first doped semiconductor layer and the second doped semiconductor layer is A; the size of the leakage channel disposed in the portion of the dielectric layer between the first doped semiconductor layer and the first surface, or in the portion between the second doped semiconductor layer and the first surface, is B, where A > B.

[0038] When the back contact battery is in the forward voltage region, the portions of the first doped semiconductor layer corresponding to the first region and the portions of the second doped semiconductor layer corresponding to the second region need to collect and export the carriers of the corresponding conductivity type generated after the semiconductor substrate absorbs photons to form a photocurrent. Therefore, the carrier transport capability of the portions of the first doped semiconductor layer corresponding to the first region and the portions of the second doped semiconductor layer corresponding to the second region affects the operating efficiency of the back contact battery. When the back contact battery is blocked, a reverse leakage region is formed at the connection between the first and second doped semiconductor layers in the third region, which facilitates the export of leakage current and reduces the risk of hot spots. In the above situation, when the linear distance L1 between the different leakage channels located in the portion of the dielectric layer between the first and second doped semiconductor layers is larger, it is beneficial to make the density of local leakage points between the first and second doped semiconductor layers sparser. On the one hand, this facilitates control of the leakage current, resulting in higher operating efficiency of the back contact battery. On the other hand, it helps to disperse the leakage current and heat points more widely, preventing burn-out problems due to local heat concentration and further improving the burn-out resistance of the back contact battery. When the linear distance L2 of the different leakage channels disposed within the portion of the dielectric layer between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, is smaller, more channels for carrier transport can be disposed between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region. This improves the carrier collection capability of the first or second doped semiconductor layer, reduces carrier recombination losses, and further improves the operating efficiency of the back contact battery. Furthermore, the beneficial effect of a leakage channel size A disposed within the portion of the dielectric layer between the first and second doped semiconductor layers being larger than the leakage channel size B disposed within the portion of the dielectric layer between the first doped semiconductor layer and the first surface, or between the second doped semiconductor layer and the first surface, can be referred to the preceding text and will not be repeated here.

[0039] As one possible implementation, the back contact battery also includes a first electrode and a second electrode, wherein the first electrode is electrically connected to a first doped semiconductor layer, and the second electrode is electrically connected to the second doped semiconductor layer.

[0040] As one possible implementation, the stacked structure includes a first doped semiconductor layer and a second doped semiconductor layer. The layer closer to the semiconductor substrate has a top surface away from the semiconductor substrate, a bottom surface close to the semiconductor substrate, and a side surface connecting the bottom and top surfaces. The layer farther from the semiconductor substrate covers a portion of the top surface and a portion of the side surface of the layer closer to the semiconductor substrate. The dielectric layer has a first dielectric portion and a second dielectric portion. The first dielectric portion is disposed between the top surface of the layer farther from the semiconductor substrate and the top surface of the layer closer to the semiconductor substrate. The second dielectric portion is disposed between the side surface of the layer farther from the semiconductor substrate and the side surface of the layer closer to the semiconductor substrate.

[0041] The dielectric layer can regulate the leakage current between the first and second doped semiconductor layers in the stacked structure not only along the thickness direction of the semiconductor substrate, but also along a direction parallel to the first surface, ensuring that the reverse breakdown voltage and leakage loss of the back contact battery meet the operating requirements. Furthermore, when the first dielectric portion is disposed between the top surface of the one furthest from the semiconductor substrate and the one closest to the semiconductor substrate, and the second dielectric portion is disposed between the side surface of the one furthest from the semiconductor substrate and the one closest to the semiconductor substrate, the extension directions of the first and second dielectric portions have a non-zero angle. By adjusting the size of this angle, the spacing between the second dielectric portion and adjacent structures can be controlled, thereby controlling the extension range of the first and second doped semiconductor layers in the stacked structure from the one furthest from the semiconductor substrate to the one closest to the semiconductor substrate via the leakage channel. This, in turn, controls the docking area of ​​the connection region between the first and second doped semiconductor layers, facilitating a balance between the operating efficiency and reverse breakdown voltage of the back contact battery.

[0042] As one possible implementation, at least one leakage current channel is located within the first dielectric section; and / or, at least one leakage current channel is located within the second dielectric section; and / or, at least one leakage current channel is located between the first dielectric section and the second dielectric section.

[0043] The location of the leakage current channel within the dielectric layer can be implemented in various ways, which helps to improve the applicability of the back contact battery provided in this application in different application scenarios. It also eliminates the need to strictly control manufacturing precision or add extra operation steps in order to form a leakage current channel at a fixed location, thereby reducing the manufacturing difficulty of the back contact battery and simplifying the manufacturing process.

[0044] As one possible implementation, the dielectric layer can be made of an insulating material, or it can include both insulating and semiconductor materials. The dielectric layer can be a purely insulating material, or it can include both insulating and semiconductor materials. This approach improves the applicability of the back-contact battery in different application scenarios while also reducing the difficulty of manufacturing the dielectric layer.

[0045] As one possible implementation, the dielectric layer may be made of oxygen and / or silicon.

[0046] With the above technical solution, there are many types of insulating materials containing oxygen, such as silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, or hafnium dioxide. Therefore, when the dielectric layer material includes oxygen, the applicability of the back contact battery provided in this application can be improved in different application scenarios. Furthermore, insulating materials containing oxygen typically have a high dielectric constant, resulting in high insulating or semi-insulating properties in the dielectric layer. This helps to further reduce the direct transport and recombination of charge carriers collected by the first and second doped semiconductor layers in the stacked structure, ensuring high photoelectric conversion efficiency of the back contact battery. Additionally, when the dielectric layer material contains silicon, the compatibility between the dielectric layer and the first and second doped semiconductor layers, which are semiconductor materials, can be improved, further enhancing the working performance of the back contact battery.

[0047] As one possible implementation, when the dielectric layer comprises both insulating and semiconductor materials, the type of semiconductor material within the dielectric layer is the same as the type of semiconductor material within the first doped semiconductor layer and the second doped semiconductor layer of the stacked structure that is closest to the semiconductor substrate.

[0048] With the above technical solution, along the thickness direction of the semiconductor substrate, the dielectric layer covers at least one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is closest to the semiconductor substrate. Based on this, in the actual manufacturing process, when the type of semiconductor material in the dielectric layer is the same as the type of semiconductor material in the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is closest to the semiconductor substrate, when selectively etching the entire first doped semiconductor layer or second doped semiconductor layer under the masking effect of the insulating material included in the dielectric layer, the etchant does not completely remove the portion of the first doped semiconductor layer or second doped semiconductor layer closest to the insulating material. At this time, the etching time corresponding to the etchant is relatively short, which can reduce the impact of the etchant on the dielectric layer, ensure that the size of the leakage channel opened in the dielectric layer is not too large, further improve the degree of control of leakage loss by the dielectric layer, and further improve the working efficiency of the back contact battery.

[0049] Optionally, the portion of the dielectric layer disposed between the first doped semiconductor layer and the second doped semiconductor layer along the thickness direction of the semiconductor substrate is a first dielectric portion. At least one leakage channel is provided within the first dielectric portion in the dielectric layer. In the third region, and along the direction from the first region to the second region, the width of the first dielectric portion is greater than or equal to the width of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is furthest from the semiconductor substrate.

[0050] The back contact battery includes a dielectric layer comprising a first dielectric portion disposed between a first doped semiconductor layer and a second doped semiconductor layer along the thickness direction of the semiconductor substrate. By providing a first dielectric portion with a width greater than or equal to the width of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is furthest from the semiconductor substrate, the electrical transport between the first doped semiconductor layer and the second doped semiconductor layer in the stacked region can be regulated. At least one leakage channel is provided within this first dielectric portion, allowing partial areas of the first doped semiconductor layer and partial areas of the second doped semiconductor layer in the stacked structure to be electrically connected directly or indirectly via this leakage channel. Because the first doped semiconductor layer and the second doped semiconductor layer have opposite doping types, a junction with a low reverse breakdown voltage can be formed between the first doped semiconductor layer and the second doped semiconductor layer by creating localized leakage points. This improves the back contact battery's resistance to burn-out when it is shielded and reduces the risk of hot spots. Furthermore, a leakage channel is provided within the first dielectric portion of the dielectric layer. Since the surface morphology of the first doped semiconductor layer and the second doped semiconductor layer in the stacked region is approximately parallel to the first surface, this surface morphology is simpler than the side surface morphology of the first doped semiconductor layer and the second doped semiconductor layer. Therefore, the leakage channel is provided within the first dielectric portion without being limited by the complexity of the structure. Only the corresponding leakage channel pattern or the setting position needs to be adjusted, without considering other factors. For example, when using etching to prepare the leakage channel, it may be necessary to adjust the etching angle in addition to conventional etching to reduce the difficulty of opening the leakage channel in the dielectric layer through processes such as laser etching. This reduces the manufacturing difficulty of the back contact battery and improves the compatibility of the back contact battery provided in this application with conventional back contact battery manufacturing processes, which is beneficial to improving the manufacturing method of the back contact battery.

[0051] In addition, the dielectric layer can achieve physical separation. Functional layers with electrical insulation or semi-insulation properties can be selected to control the electrical transmission between the first doped semiconductor layer and the second doped semiconductor layer in the stacked region. Therefore, the part of the dielectric layer without leakage channels can electrically isolate part of the first doped semiconductor layer and part of the second doped semiconductor layer in the stacked structure, effectively reducing the direct transport and recombination of carriers collected by the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure. This effectively controls the leakage loss of the back contact battery, giving the back contact battery good working performance. Therefore, the back contact battery provided in this application reduces the risk of hot spots by utilizing the leakage channels provided in the dielectric layer. At the same time, it can effectively control the leakage loss of the back contact battery in the forward voltage region by utilizing the insulation characteristics of the part of the dielectric layer where no leakage channels are provided. Furthermore, compared to using an etching process to create leakage channels on the side surface of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is closer to the semiconductor substrate, it is more difficult and precise to create leakage channels only in the first dielectric portion between the first doped semiconductor layer and the second doped semiconductor layer along the thickness direction of the semiconductor substrate. This makes it easier to achieve precise control of leakage and insulation, which is beneficial for adjusting the reverse breakdown voltage and operating efficiency of the back contact battery to achieve a balance.

[0052] As one possible implementation, in a single stacked structure, leakage channels are continuously distributed along the extension direction of the stacked structure. In this case, it is advantageous to increase the docking area of ​​the electrical connection region between the first doped semiconductor layer and the second doped semiconductor layer through the leakage channels, thereby increasing the area ratio of the reverse leakage region on the first side and further improving the burn-out resistance of the back contact battery.

[0053] As one possible implementation, a plurality of leakage channels are provided in the first dielectric section of a single stacked structure at intervals. In this case, compared with a continuous distribution of leakage channels, the intervals between adjacent leakage channels in the first dielectric section have an insulating or semi-insulating effect, which can electrically isolate the first doped semiconductor layer and the second doped semiconductor layer with opposite conductivity types. Therefore, compared with a continuous distribution of leakage channels, when a plurality of leakage channels are provided in the first dielectric section of a single stacked structure at intervals, it is beneficial to reduce the docking area of ​​the electrical connection region between the first doped semiconductor layer and the second doped semiconductor layer through the leakage channels, thereby reducing the area ratio of the reverse leakage region on the first surface and further improving the working performance of the back contact battery.

[0054] As one possible implementation, the total size of the leakage current channel is greater than or equal to 50 μm and less than or equal to 200 μm.

[0055] When the back contact battery provided in this application is installed in an environment with few obstructions, the total size of the leakage channel can be set within a smaller range to reduce the proportion of the reverse leakage area between the first and second regions. This helps to further reduce the leakage loss of the back contact battery in the forward voltage region, ensuring that the back contact battery has high operating efficiency. Conversely, when installed in an environment with many obstructions, the total size of the leakage channel can be set within a larger range to increase the proportion of the reverse leakage area between the first and second regions. This helps to reduce the reverse breakdown voltage of the back contact battery, ensuring that the back contact battery has a lower risk of hot spots. However, an excessively large total size of the leakage channel can easily lead to localized overheating, affecting the hot spot prevention effect, especially when there is only one leakage channel. Therefore, controlling the total size of the leakage channel within the aforementioned range helps to improve the hot spot resistance of the back contact battery. Thus, the total size of the leakage channel can be set according to different environmental requirements, improving the applicability of the back contact battery provided in this application in different practical application scenarios.

[0056] As one possible implementation, in the case where multiple leakage channels are spaced apart within the first dielectric portion of a single stacked structure, the size of at least one leakage channel is greater than or equal to 5 μm and less than or equal to 80 μm, thereby improving the applicability of the back contact battery provided in this application under different practical application scenarios. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the total size of the leakage channels being greater than or equal to 50 μm and less than or equal to 200 μm as described above, and will not be repeated here. In addition, reducing the size of a single leakage channel can avoid single-point overheating and enhance the risk resistance of the back contact battery; the multi-point setting can ensure timely and effective dispersion of leakage current, ensuring that the back contact battery has a low risk of hot spots.

[0057] As one possible implementation, when multiple leakage channels are provided in the first dielectric section, the distance between two adjacent leakage channels is greater than or equal to 1 μm and less than or equal to 200 μm.

[0058] With a fixed leakage channel size, the distance between the geometric centers of two adjacent leakage channels is inversely proportional to the distribution density of the leakage channels within the first dielectric section; the distance between two adjacent leakage channels is also inversely proportional to the distribution density of the leakage channels within the first dielectric section. The distribution density of the leakage channels within the first dielectric section is approximately proportional to the leakage loss of the back contact battery in the forward voltage region and inversely proportional to the reverse breakdown voltage of the back contact battery. Therefore, when the back contact battery provided in this application is installed in an environment with minimal obstructions such as bird droppings, leaves, or dust, the distance between the geometric centers of two adjacent leakage channels or the distance between two adjacent leakage channels can be set to a larger range to reduce the proportion of the reverse leakage region between the first and second regions. This further helps to reduce the leakage loss of the back contact battery in the forward voltage region, ensuring that the back contact battery has high operating efficiency. When the back contact battery provided in this application is installed in an environment with many obstructions such as bird droppings, leaves, or dust, the geometric center distance or spacing between two adjacent leakage channels can be set within a smaller range. This increases the proportion of the reverse leakage area between the first and second regions, thereby reducing the reverse breakdown voltage of the back contact battery and ensuring a lower risk of hot spots. Furthermore, controlling the geometric center distance or spacing between two adjacent leakage channels can also control the spacing between two adjacent heat-generating points. By adjusting the spacing, the heat-generating points are dispersed, avoiding overlap and preventing localized overheating. Therefore, the geometric center distance or spacing between two adjacent leakage channels can be set according to different environmental requirements, improving the applicability of the back contact battery provided in this application in various practical application scenarios.

[0059] As one possible implementation, when multiple leakage channels are provided in the first dielectric section, the spacing between any two adjacent leakage channels is equal.

[0060] When the spacing between any two adjacent leakage channels is equal, the spacing between adjacent leakage points between the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure is equal. This facilitates the uniform distribution of the reverse leakage region in the third region, thereby helping to disperse the heat generation area and prevent the back contact battery from burning out due to local heat concentration. This further improves the back contact battery's resistance to burning out and effectively enhances its safety performance.

[0061] As one possible implementation, the minimum distance between the leakage current channel and the edge of the first dielectric part is greater than or equal to 5 μm and less than or equal to 50 μm.

[0062] Specifying a minimum spacing range can prevent damage to the portion of the first doped semiconductor layer in the first region near the third region and / or the portion of the second doped semiconductor layer in the second region near the third region during the fabrication of the leakage channel due to the leakage channel being too close to the edge of the first dielectric portion. This would affect carrier collection and thus battery efficiency. It can also prevent a low distribution density of the leakage channel in the first dielectric portion due to a large minimum spacing, ensuring that the reverse leakage region has a certain proportion in the third region and that the back contact battery has a low risk of hot spots.

[0063] As one possible implementation, in the third region, and along the direction from the first region to the second region, the width of the first dielectric portion is greater than or equal to 10 μm and less than or equal to 200 μm.

[0064] With a fixed distribution density of leakage channels within the first dielectric section, the width of the first dielectric section is proportional to the proportion of the reverse leakage region on the first side. Based on this, the width of the first dielectric section can be set according to different environmental requirements, resulting in a lower risk of hot spots in installation environments with abundant dust or other obstructions, or lower leakage loss in installation environments with less dust or other obstructions, thus improving the applicability of the back contact battery provided in this application in different practical application scenarios. Furthermore, a width within the aforementioned range for the first dielectric section can prevent difficulties in selectively etching the dielectric material due to a smaller width, thereby reducing the manufacturing difficulty of the back contact battery.

[0065] As one possible implementation, the back contact battery further includes a first electrode and a second electrode, the first electrode being electrically connected to a first doped semiconductor layer; the second electrode being electrically connected to the second doped semiconductor layer; and the minimum distance between at least one of the first electrode and the leakage channel disposed in the first dielectric portion is greater than or equal to 30 μm and less than or equal to 300 μm.

[0066] At least one of the first electrode and the second electrode needs to be kept at a certain distance from the adjacent leakage channel to avoid the first electrode and the second electrode coming into contact with the leakage area and causing a short circuit, thereby affecting the working efficiency of the back contact battery.

[0067] As one possible implementation, the first dielectric portion extends through at least one leakage channel. In this case, the isolation effect of the dielectric layer between the portions of the first and second doped semiconductor layers corresponding to the leakage channel is eliminated, reducing the on-resistance of the corresponding leakage channel portions. Simultaneously, when forming a stacked structure including the first and second doped semiconductor layers, it also reduces the obstruction of the portion of the dielectric layer corresponding to the leakage channel from the dopant in the semiconductor substrate to the opposite side of the dielectric layer through the leakage channel. This facilitates increasing the docking area of ​​the direct or indirect electrical connection region between the first and second doped semiconductor layers, thereby reducing the reverse breakdown voltage of the back contact battery and further improving the burn-out resistance of the back contact battery in installation environments with abundant dust and other obstructions.

[0068] As one possible implementation, the thickness of the portion of the first dielectric part corresponding to at least one leakage channel is H1, and the thickness of the portion of the first dielectric part not corresponding to a leakage channel is H2, wherein the ratio of H1 to H2 is greater than 0 and less than or equal to 0.5.

[0069] In practical applications, by removing a portion of the thickness of the first dielectric layer corresponding to the leakage channel, the degree of obstruction to the diffusion of dopants from the side of the dielectric layer away from the semiconductor substrate through the leakage channel to the opposite side of the dielectric layer can be reduced. This reduces the risk of hot spots in the back contact battery. At the same time, the remaining thickness of the first dielectric layer at the leakage channel can control the diffusion range of the dopants, thereby controlling the docking area of ​​the direct or indirect electrical connection region between the first and second doped semiconductor layers. Ultimately, this regulates the reverse breakdown voltage and leakage loss of the back contact battery, improving the applicability of the back contact battery provided in this application in different application scenarios.

[0070] As one possible implementation, the density of the portion of the first dielectric layer corresponding to the leakage channel is lower than the density of the rest of the layer. In this case, another example of how the first dielectric layer can be positioned at the leakage channel is provided. Here, the lower density of the portion of the first dielectric layer corresponding to the leakage channel results in lower compactness, thereby reducing the degree to which the portion of the dielectric layer corresponding to the leakage channel hinders the diffusion of dopants from the semiconductor substrate to the opposite side of the dielectric layer through the leakage channel, thus reducing the risk of hot spots in the back contact battery.

[0071] As one possible implementation, in the stacked structure including a first doped semiconductor layer and a second doped semiconductor layer, if the one closer to the semiconductor substrate is the first doped semiconductor layer, at least a portion of the first region and the third region constitute a rectangular region; or, in the stacked structure including a first doped semiconductor layer and a second doped semiconductor layer, if the one closer to the semiconductor substrate is the second doped semiconductor layer, at least a portion of the second region and the third region constitute a rectangular region.

[0072] Each rectangular region has at least two first sides extending in a first direction. Each rectangular region has at least two second sides extending in a second direction; the first direction is parallel to the direction of the long side of the rectangular region, and the second direction is parallel to the direction of the short side of the rectangular region; in each rectangular region, at least the first side and the adjacent second side form the vertex of the rectangular region.

[0073] As one possible implementation, in a single rectangular area having at least two first sides extending in a first direction, a single rectangular area having at least two second sides extending in a second direction, and in a single rectangular area, at least one first side and an adjacent second side forming the apex of the rectangular area, the leakage current path includes at least one first leakage current path disposed at at least one first side of the rectangular area along the first direction; and / or, the leakage current path includes at least one second leakage current path disposed at at least one second side of the rectangular area along the second direction.

[0074] As one possible implementation, in a single rectangular area having at least two first sides extending in a first direction, a single rectangular area having at least two second sides extending in a second direction, and in a single rectangular area where at least the first side and the adjacent second side form the apex of the rectangular area, the leakage current path includes at least one third leakage current path, the third leakage current path being disposed at at least one apex of the rectangular area.

[0075] With the above technical solution, the location of the leakage channel in the rectangular area has at least three optional examples, which helps to improve the applicability of the back contact battery provided in this application in different application scenarios. It also eliminates the need to strictly control manufacturing precision or add extra operation steps in order to form a leakage channel in a fixed position, which helps to reduce the manufacturing difficulty of the back contact battery and simplify the manufacturing process of the back contact battery.

[0076] As one possible implementation, when the leakage current channel includes at least one first leakage current channel, at least one second leakage current channel, and at least one third leakage current channel, the cross-sectional area of ​​the third leakage current channel in the direction parallel to the first surface is greater than the cross-sectional area of ​​the first leakage current channel and / or the second leakage current channel in the direction parallel to the first surface.

[0077] Compared to the distances between the long side and the electrode of the rectangular region, and the distances between the short side and the electrode of the rectangular region, the distance between the apex of the rectangular region and the electrode is larger. In this case, a third leakage channel with a larger cross-sectional area along the direction parallel to the first surface can be provided. In other words, the cross-sectional area of ​​the third leakage channel along the direction parallel to the first surface can be larger than the cross-sectional areas of the first leakage channel and / or the second leakage channel along the direction parallel to the first surface. Under these circumstances, a leakage channel with a larger cross-sectional area can be provided on a stacked structure with a larger width. While ensuring that the back-contact battery has a low reverse breakdown voltage, it is not necessary to provide a first leakage channel and / or a second leakage channel with a larger cross-sectional area at the spacing position to increase the proportion of the reverse leakage area on the first surface side. This reduces the manufacturing difficulty and helps improve the yield of the back-contact battery.

[0078] As one possible implementation, the third region is set between the regions of the first region and the regions of the second region.

[0079] Compared to the third region being located between only a portion of the first region and only a portion of the second region, the stacked structure located in the third region has a longer extension length, which is beneficial for increasing the range of the leakage channel in the stacked structure and for increasing the docking area of ​​the first doped semiconductor layer and the second doped semiconductor layer electrically connected through the leakage channel. This increases the area ratio of the reverse leakage region on the first side and further improves the burn-out resistance of the back contact battery.

[0080] As one possible implementation, the first surface also includes a fourth region located between the first and second regions. A third region is disposed between only a portion of the first and second regions, and the fourth and third regions do not overlap. Compared to the third region being disposed between all regions of the first and second regions, the stacked structure disposed in the third region has a shorter extension length, which helps to reduce the range of leakage channels in the stacked structure and the docking area of ​​the electrical connection region between the first and second doped semiconductor layers through the leakage channels. This reduces the area ratio of the reverse leakage region on the first surface, further improving the working performance of the back contact battery.

[0081] As one possible implementation, the dielectric layer further includes a second dielectric portion disposed between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface. In this case, the presence of the second dielectric portion can separate the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface, further reducing leakage losses between the first doped semiconductor layer and the second doped semiconductor layer, and improving the operating efficiency of the back contact battery in installation environments with fewer obstructions such as dust or bird droppings.

[0082] As one possible implementation, the back contact cell further includes a first interface passivation layer. The first interface passivation layer is disposed at least between the first doped semiconductor layer and the semiconductor substrate. The passivated contact structure composed of the first interface passivation layer and the first doped semiconductor layer has excellent interface passivation effect and can achieve selective collection of charge carriers, at least reducing the carrier recombination rate in the first region of the first surface, further improving the photoelectric conversion efficiency of the back contact cell.

[0083] As one possible implementation, the back contact battery also includes a second interface passivation layer. The second interface passivation layer is disposed at least between the second doped semiconductor layer and the semiconductor substrate. The passivated contact structure, consisting of the second interface passivation layer and the portion of the second doped semiconductor layer located in the second region, enables selective collection of charge carriers and reduces the carrier recombination rate in the second region of the first surface.

[0084] As one possible implementation, in the case where the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure are located away from the semiconductor substrate and are the first doped semiconductor layer, the width of the first interface passivation layer in the third region and along the direction from the first region to the second region is smaller than the width of the first doped semiconductor layer; or, in the case where the second doped semiconductor layer is located away from the semiconductor substrate and in the case of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, the width of the second interface passivation layer in the third region and along the direction from the first region to the second region is smaller than the width of the second doped semiconductor layer.

[0085] When the width of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is far from the semiconductor substrate is smaller than the width of its corresponding interface passivation layer, it is advantageous that in the third region, there is no longer a corresponding interface passivation layer between the portions of the leakage channels of the first doped semiconductor layer and the second doped semiconductor layer, thereby reducing the on-resistance between them and further reducing the reverse breakdown voltage of the back contact battery.

[0086] Secondly, this application provides a photovoltaic module including a cell string and an encapsulation layer. The cell string is composed of multiple back-contact cells connected together as provided in the first aspect and its various implementations. The encapsulation layer is used to cover the surface of the cell string.

[0087] The beneficial effects of the second aspect and its various implementations in this application can be found in the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0088] Thirdly, this application provides a method for manufacturing a back contact battery, the method comprising: first, providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface. The first surface includes a first region and a second region spaced apart, and a third region located between the first region and the second region. Next, forming a first doped semiconductor layer disposed on the first region and the third region. Next, forming a dielectric layer disposed at least on a portion of the first doped semiconductor layer corresponding to the third region. Next, forming a second doped semiconductor layer disposed on the second region and the third region. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. On the third region, the first doped semiconductor layer and the second doped semiconductor layer are overlapped along the thickness direction of the semiconductor substrate to form a stacked structure. At least one leakage channel is provided within the dielectric layer.

[0089] As one possible implementation, the portion of the dielectric layer disposed between the first doped semiconductor layer and the second doped semiconductor layer along the thickness direction of the semiconductor substrate is a first dielectric portion. At least one leakage channel is provided within the first dielectric portion in the dielectric layer. On the third region, and along the direction from the first region to the second region, the width of the first dielectric portion is greater than or equal to the width of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is furthest from the semiconductor substrate.

[0090] As one possible solution, a leakage current channel is created within the first dielectric section using laser etching.

[0091] The beneficial effects of the third aspect and its various implementations in this application can be found in the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here. Attached Figure Description

[0092] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0093] Figure 1 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0094] Figure 2 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0095] Figure 3 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0096] Figure 4 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0097] Figure 5 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0098] Figure 6 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0099] Figure 7 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0100] Figure 8 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first embodiment of this application;

[0101] Figure 9 is a top view of the back contact battery provided in the embodiment of this application on one side of the first doped semiconductor layer and the second doped semiconductor layer;

[0102] Figure 10 is a top view of the back contact battery provided in the embodiment of this application on one side of the first doped semiconductor layer and the second doped semiconductor layer;

[0103] Figure 11 is a top view of the back contact battery provided in the first embodiment of this application on one side of the first doped semiconductor layer and the second doped semiconductor layer;

[0104] Figure 12 is a top view of the back contact battery provided in the first embodiment of this application on one side of the first doped semiconductor layer and the second doped semiconductor layer;

[0105] Figure 13 is a top view of the back contact battery provided in the first group of embodiments of this application on one side of the first doped semiconductor layer and the second doped semiconductor layer;

[0106] Figure 14 is a SEM image of the back contact battery at the stacked structure provided in the first embodiment of this application;

[0107] Figure 15 is a second SEM image of the back contact battery in the stacked structure provided in the first embodiment of this application (the approximate location of the dielectric layer is outlined by dashed lines in the figure);

[0108] Figure 16 is a SEM image of the back contact battery at the stacked structure provided in the first embodiment of this application;

[0109] Figure 17 is a longitudinal cross-sectional view of the first structure of the back contact battery provided in the second group of embodiments of this application;

[0110] Figure 18 is a longitudinal cross-sectional view of a second structure of a back contact battery provided in the second group of embodiments of this application;

[0111] Figure 19 is a longitudinal cross-sectional schematic diagram of the third structure of the back contact battery provided in the second group of embodiments of this application;

[0112] Figure 20 is a longitudinal cross-sectional view of the fourth structure of the back contact battery provided in the second group of embodiments of this application;

[0113] Figure 21 is a longitudinal cross-sectional view of the fifth structure of the back contact battery provided in the second group of embodiments of this application;

[0114] Figure 22 is a longitudinal cross-sectional view of the sixth structure of the back contact battery provided in the second group of embodiments of this application;

[0115] Figure 23 is a longitudinal cross-sectional view of the seventh structure of the back contact battery provided in the second set of embodiments of this application;

[0116] Figure 24 is a longitudinal cross-sectional view of the eighth structure of the back contact battery provided in the second group of embodiments of this application;

[0117] Figure 25 is a longitudinal cross-sectional view of the ninth structure of the back contact battery provided in the second set of embodiments of this application;

[0118] Figure 26 is a longitudinal cross-sectional view of the tenth structure of the back contact battery provided in the second group of embodiments of this application;

[0119] Figure 27 is a schematic diagram showing the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0120] Figure 28 is a schematic diagram of the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0121] Figure 29 is a schematic diagram showing the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0122] Figure 30 is a schematic diagram of the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0123] Figure 31 is a schematic diagram showing the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0124] Figure 32 is a schematic diagram of the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0125] Figure 33 is a schematic diagram showing the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0126] Figure 34 is a schematic diagram of the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application;

[0127] Figure 35 is a schematic diagram showing the possible distribution of leakage current channels in a local area on one side of the first surface of the back contact battery provided in the second embodiment of this application.

[0128] Reference numerals: 11 is a semiconductor substrate, 12 is a first doped semiconductor layer, 13 is a second doped semiconductor layer, 14 is a dielectric layer, 15 is a leakage channel, 16 is a first region, 17 is a second region, 18 is a third region, 19 is a first dielectric portion, 20 is a second dielectric portion, 21 is a first interface passivation layer, 22 is a second interface passivation layer, 23 is a third doped semiconductor portion, 220 is a finger region, 221 is a connection region, 222 is a first leakage channel, 223 is a second leakage channel, and 224 is a third leakage channel. Detailed Implementation

[0129] The embodiments of this application will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of this application. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of this application.

[0130] The accompanying drawings show various structural schematic diagrams according to embodiments of this application. These drawings are not drawn to scale, and some details have been enlarged and may have been omitted for clarity. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0131] In the context of this application, when a layer / element is referred to as being "on top of" another layer / element, the layer / element can be directly on top of the other layer / element, or there can be an intermediate layer / element between them. Furthermore, if a layer / element is "on top of" another layer / element in one orientation, then when the orientation is reversed, the layer / element can be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0132] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0133] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0134] A back-contact solar cell is a solar cell in which there are no electrodes on the light-facing side of the cell, and both the positive and negative electrodes are located on the back-facing side of the cell. This reduces the shading of the cells by the electrodes, increases the short-circuit current of the cells, and improves the energy conversion efficiency of the cells.

[0135] From the perspective of the back contact cell, the two doped semiconductor layers with opposite doping types in the back contact cell need to be spaced apart to suppress forward leakage and ensure high photoelectric conversion efficiency in the forward voltage region. However, from the perspective of the photovoltaic module, when the two doped semiconductor layers with opposite doping types in the back contact cell are spaced apart, the resistance between them is high, resulting in a higher reverse breakdown voltage and a higher risk of hot spots. In this situation, existing solar cells use a method of locally electrically connecting the two doped semiconductor layers with opposite doping types to reduce the risk of hot spots to some extent.

[0136] In back-contact batteries with a lower risk of hot spots, there are electrical contacts at each part where the two doped semiconductor layers with opposite doping types overlap along the thickness direction of the semiconductor substrate. This can lead to a larger leakage current in the forward voltage region of the back-contact battery, resulting in lower operating efficiency and poor performance.

[0137] To address the aforementioned technical problems, in a first aspect, embodiments of this application provide a back-contact battery. As shown in Figures 1 and 17, the back-contact battery provided in this application includes: a semiconductor substrate 11, a first doped semiconductor layer 12, a second doped semiconductor layer 13, and a dielectric layer 14. The semiconductor substrate 11 has opposing first and second surfaces. The first surface includes a first region 16 and a second region 17 spaced apart, and a third region 18 located between the first region 16 and the second region 17. The first doped semiconductor layer 12 is disposed on the first region 16 and the third region 18. The second doped semiconductor layer 13 is disposed on the second region 17 and the third region 18. The doping types of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are opposite. On the third region 18, the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are overlapped along the thickness direction of the semiconductor substrate 11 to form a stacked structure. The dielectric layer 14 is disposed at least between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. At least one leakage channel 15 is disposed within the dielectric layer 14.

[0138] As shown in Figure 1, in the back contact battery provided in this embodiment, in the third region 18, a first doped semiconductor layer 12 and a second doped semiconductor layer 13 with opposite conductivity types (and also opposite doping types) can be stacked along the thickness direction of the semiconductor substrate 11 to form a stacked structure. Furthermore, the back contact battery also includes a dielectric layer 14 at least disposed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. At least one leakage channel 15 is disposed within this dielectric layer 14, allowing partial areas of the first doped semiconductor layer 12 and partial areas of the second doped semiconductor layer 13 in the stacked structure to be electrically connected via this leakage channel 15. Because the first doped semiconductor layer 12 and the second doped semiconductor layer 13 have opposite doping types, a junction with a low reverse breakdown voltage can be formed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 by creating local leakage points. This facilitates higher burn-out resistance when the back contact battery is shielded, reducing the risk of hot spots on the back contact battery.

[0139] The first group of back contact batteries of the first aspect of this application will be described below with reference to Figures 1 to 16.

[0140] In this set of embodiments, as shown in FIG1, optionally, in the back contact battery provided in this application embodiment, the thickness of the dielectric layer 14 is greater than or equal to 13nm.

[0141] The dielectric layer 14 enables physical separation of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure, and the thickness of the dielectric layer 14 is greater than or equal to 13 nm, thus providing it with certain electrical insulation or semi-insulation properties. Therefore, the portion of the dielectric layer 14 without the leakage channel 15 can achieve electrical isolation between a portion of the first doped semiconductor layer 12 and a portion of the second doped semiconductor layer 13 in the stacked structure, effectively reducing the direct transport and recombination of charge carriers collected by the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure. This effectively controls the leakage loss of the back contact battery, resulting in good operating performance. Therefore, the back contact battery provided in this embodiment can effectively control the leakage loss in the forward voltage region through the insulation or semi-insulation characteristics of the portion of the dielectric layer 14 without the leakage channel 15. Simultaneously, the leakage channel 15 within the dielectric layer 14 reduces the risk of hot spots in the back contact battery, achieving adjustable leakage and electrical isolation, which facilitates balancing the reverse breakdown voltage and operating efficiency of the back contact battery.

[0142] In practical applications, the embodiments of this application do not specifically limit the structure and materials of the semiconductor substrate, as long as they can be applied to the back contact battery provided in the embodiments of this application.

[0143] The semiconductor substrate can be a semiconductor substrate without any structure formed thereon. Alternatively, the semiconductor substrate can also be a semiconductor substrate with some structure formed thereon; in this case, the structure formed on the semiconductor substrate can be set according to actual needs, and is not specifically limited here. For example, the semiconductor substrate may include a semiconductor substrate and a passivation antireflection layer disposed on the side of the semiconductor substrate opposite to the first doped semiconductor layer and the second doped semiconductor layer, so as to passivate the side of the semiconductor substrate opposite to the first doped semiconductor layer and the second doped semiconductor layer, reduce the carrier recombination rate on that side, and facilitate more light to be refracted into the semiconductor substrate through that side, further improving the working efficiency of the back contact battery. The material of the semiconductor substrate may include any semiconductor material such as silicon, germanium silicon, germanium, or gallium arsenide. The material of the passivation antireflection layer may include silicon oxide, silicon nitride, or aluminum oxide.

[0144] Furthermore, the first surface of the semiconductor substrate corresponds to the back-lighting surface of the back contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing surface of the back contact battery. The distribution of the first, second, and third regions of the semiconductor substrate on the first surface can be determined based on the distribution of the first and second doped semiconductor layers on the first surface. Since the first doped semiconductor layer of the back contact battery is disposed on the first and third regions, the distribution range of the first and third regions on the first surface can be determined according to the distribution requirements of the first doped semiconductor layer in the actual application scenario. Since a portion of the second doped semiconductor layer of the back contact battery is disposed on the second region of the first surface, the distribution range of the second region on the first surface can be determined according to the distribution requirements of the second doped semiconductor layer on the semiconductor substrate in the actual application scenario.

[0145] It is understandable that the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region. One of the first and second regions corresponds to the P-region, and the other corresponds to the N-region, while the third region corresponds to the PN stacking region.

[0146] As for the morphology of the first and second regions in the first surface, it can be determined based on the morphology of the electrode structure of the back contact battery and the actual application scenario. For example, the first and second regions can be distributed in alternating stripe patterns or in alternating interdigitated patterns.

[0147] Furthermore, as mentioned above, the first doped semiconductor layer and the second doped semiconductor layer are disposed on the first surface of the semiconductor substrate. Specifically, as shown in FIG1, when the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure are closer to the semiconductor substrate 11 and are the first doped semiconductor layer 12, the surface of the second region 17 can be flush with the surface of the third region 18. As shown in FIG2, when the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure are closer to the semiconductor substrate 11 and are the second doped semiconductor layer 13, the surface of the first region 16 can be flush with the surface of the third region 18.

[0148] Alternatively, as shown in Figure 3, in the stacked structure including the first doped semiconductor layer 12 and the second doped semiconductor layer 13, if the one closer to the semiconductor substrate 11 is the first doped semiconductor layer 12, the surface of the third region 18 in the direction from the second surface to the first surface may also be higher than the surface of the second region 17. As shown in Figure 4, in the stacked structure including the first doped semiconductor layer 12 and the second doped semiconductor layer 13, if the one closer to the semiconductor substrate 11 is the second doped semiconductor layer 13, the surface of the third region 18 in the direction from the second surface to the first surface may also be higher than the surface of the first region 16. This arrangement ensures that after the portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 that is formed first is selectively etched away from the region where the other layer contacts the semiconductor substrate 11, no residue remains in that region, preventing short circuits.

[0149] Regarding the first and second doped semiconductor layers, in terms of doping type, the first doped semiconductor layer can be N-type, in which case the second doped semiconductor layer is P-type; alternatively, the first doped semiconductor layer can also be P-type, in which case the second doped semiconductor layer is N-type. This application does not specifically limit the doping type of the first and second doped semiconductor layers, as long as their doping types are opposite.

[0150] In terms of materials, the materials of the first doped semiconductor layer and / or the second doped semiconductor layer can include any semiconductor material such as silicon, silicon germanium, or germanium. In terms of the arrangement of matter, the crystal phase of the first doped semiconductor layer and / or the second doped semiconductor layer can be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline.

[0151] Regarding the stacking method, as shown in Figures 1 and 3, in the stacked structure, the first doped semiconductor layer 12 can be disposed between the second doped semiconductor layer 13 and the semiconductor substrate 11; in this case, the first doped semiconductor layer 12 is closer to the semiconductor substrate 11 than the second doped semiconductor layer 13. Alternatively, as shown in Figures 2 and 4, in the stacked structure, the second doped semiconductor layer 13 can also be disposed between the first doped semiconductor layer 12 and the semiconductor substrate 11; in this case, the second doped semiconductor layer 13 is closer to the semiconductor substrate 11 than the first doped semiconductor layer 12.

[0152] In terms of location, as shown in Figures 1 to 4, at least a portion of the first doped semiconductor layer 12 can be directly formed on the semiconductor substrate 11. Alternatively, as shown in Figures 5 and 6, the back contact battery includes a first interface passivation layer 21. Specifically, when the stacked structure includes a first doped semiconductor layer 12 and a second doped semiconductor layer 13, with the first doped semiconductor layer 12 being closer to the semiconductor substrate 11, the first interface passivation layer 21 is disposed between the first doped semiconductor layer 12 and the semiconductor substrate 11; when the stacked structure includes a first doped semiconductor layer 12 and a second doped semiconductor layer 13, with the second doped semiconductor layer 13 being closer to the semiconductor substrate 11, the first interface passivation layer 21 is disposed between the first doped semiconductor layer 12 and the semiconductor substrate 11, and extends between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. The material and thickness of the first interface passivation layer 21 can be set according to the material of the first doped semiconductor layer 12 and actual needs, and are not specifically limited here. For example, when the first doped semiconductor layer is a doped polysilicon layer, the first interface passivation layer is a tunneling passivation layer. For example, when the first doped semiconductor layer is a doped amorphous silicon layer, the first interface passivation layer is an intrinsic amorphous silicon layer.

[0153] Regarding the second doped semiconductor layer, as shown in Figures 1 to 6, at least a portion of the second doped semiconductor layer 13 can be directly formed on the semiconductor substrate 11. Alternatively, as shown in Figures 7 and 8, the back contact cell includes a second interface passivation layer 22. Specifically, when the stacked structure includes a first doped semiconductor layer 12 and a second doped semiconductor layer 13, with the first doped semiconductor layer 12 being closer to the semiconductor substrate 11, the second interface passivation layer 22 is disposed between the second doped semiconductor layer 13 and the semiconductor substrate 11, and extends between the second doped semiconductor layer 13 and the first doped semiconductor layer 12; and when the stacked structure includes a first doped semiconductor layer 12 and a second doped semiconductor layer 13, with the second doped semiconductor layer 13 being closer to the semiconductor substrate 11, the second interface passivation layer 22 is disposed between the second doped semiconductor layer 13 and the semiconductor substrate 11. The material and thickness of the second interface passivation layer 22 can be set according to the material of the second doped semiconductor layer 13 and actual needs, and are not specifically limited here. For example, when the second doped semiconductor layer is a doped polysilicon layer, the second interface passivation layer is a tunneling passivation layer. For example, when the second doped semiconductor layer is a doped amorphous silicon layer, the second interface passivation layer is an intrinsic amorphous silicon layer.

[0154] In terms of the setting range, as shown in Figure 9, a third region with a stacked structure (as shown in the grid area in the figure) can be set between the entire area of ​​the first region and the entire area of ​​the second region. In this case, along the extension direction of the third region, that is, along the extension direction of the stacked structure, the edge areas of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 that are close to each other are all overlapped along the thickness direction of the semiconductor substrate 11 (as shown in the grid area in the figure). The extension direction of the stacked structure can be determined according to the specific shape of the first region 16 and the second region 17. For example, when the first region 16 and the second region 17 are distributed in a strip-like interval, the extension direction of the stacked structure is parallel to the extension direction of the first region 16 or the second region 17; as another example, when the first region 16 and the second region 17 are distributed in an interdigitated interval, when the stacked structure is set between the two finger-like regions, the extension direction of the stacked structure is parallel to the extension direction of the finger-like regions, and when the stacked structure is set between the finger-like regions and the connecting regions, the extension direction of the stacked structure is parallel to the extension direction of the connecting regions. Alternatively, as shown in Figures 10 to 12, the third region with the stacked structure may be disposed only between a portion of the first region and a portion of the second region; in this case, only a portion of the edge regions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 that are close to each other may overlap along the thickness direction of the semiconductor substrate 11; and the first surface may also have a fourth region, which is disposed between the first region and the second region and does not overlap with the third region. In this case, only a portion of the edge regions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 that are close to each other may overlap along the thickness direction of the semiconductor substrate 11; as shown in Figures 10 to 13, the fourth region may only have the first doped semiconductor layer 12, or only the second doped semiconductor layer 13, or only physical spacing such as insulating trenches or non-conductive structures such as chemical films made of intrinsic semiconductor materials or insulating materials, or one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 and the aforementioned non-conductive structures. The principle for determining the extension direction of the stacked structure in this case is the same as the principle for determining the extension direction of the stacked structure when the third region 18 with the stacked structure is located between the regions of the first region 16 and the regions of the second region 17, as described above, and will not be repeated here.

[0155] Furthermore, in practical applications, the connection methods between the first doped semiconductor layer and the second doped semiconductor layer can be divided into at least the following two types:

[0156] The first method involves connecting the first and second doped semiconductor layers via a dielectric layer with a leakage channel. As shown in Figures 1 to 5, the connection can be a direct connection between the first doped semiconductor layer 12 and the second doped semiconductor layer 13; or, as shown in Figures 6, 7, and 16, an indirect connection can be formed by the portion of the dielectric layer corresponding to the leakage channel (which has electrical conductivity) without the leakage channel penetrating the dielectric layer, thus creating a reverse leakage region. This helps reduce the reverse breakdown voltage of the back contact battery and improves its resistance to burn-out. Furthermore, the connection area at the leakage channel 15 is approximately equal to the cross-sectional area of ​​the leakage channel 15. This relatively small connection area further reduces the direct transport and recombination of carriers collected by the first and second doped semiconductor layers 12 and 13 in the stacked structure, effectively controlling the leakage loss of the back contact battery and resulting in higher operating efficiency.

[0157] In the first scenario, as shown in Figures 1 to 7, the mating surface of the connection region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 can have a relatively regular morphology, such as a plane or a curved surface. Alternatively, the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer can also have an irregular morphology. It is understood that compared to a flat and regular mating surface at the connection region, when the mating surface at the connection region has an irregular morphology, the mating surface has undulating characteristics, which is beneficial for increasing the contact area between the first doped semiconductor layer and the second doped semiconductor layer at the connection region, that is, for increasing the junction area of ​​the mating junction, and thus for further reducing the reverse breakdown voltage of the back contact battery and reducing the risk of hot spots on the back contact battery.

[0158] In addition, in the first case, the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer can be disposed only along a direction perpendicular to the first surface between the first and second doped semiconductor layers. Alternatively, the mating surface of the connection region between the first and second doped semiconductor layers can also form an angle of less than 90° with the first surface of the semiconductor substrate. For example, the mating surface forms an angle of 0°, 10°, 20°, 30°, 40°, 50°, 60°, 70°, or 80° with the first surface. In the stacked structure including the first and second doped semiconductor layers, when the thickness of the one closest to the semiconductor substrate is fixed, compared to the mating surface of the connection region between the first and second doped semiconductor layers being perpendicular to the first surface, when the mating surface of the connection region forms an angle of less than 90° with the first surface, the mating surface is inclined relative to the first surface. This facilitates a larger contact area in the connection region between the first and second doped semiconductor layers, which can further increase the junction area of ​​the mating junction, thereby further reducing the reverse breakdown voltage of the back contact battery and reducing the hot spot risk of the back contact battery. In addition, when the mating surface of the connection area is tilted relative to the first surface, it is also beneficial for the one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure to better cover the one of the semiconductor substrate, which is farther away from the semiconductor substrate, to prevent the one of the semiconductor substrate from generating defects such as holes at the connection area, thereby improving the yield of the back contact battery.

[0159] The second type: As shown in Figures 14 to 16, the back contact battery may further include a third doped semiconductor section 23 located between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, wherein the third doped semiconductor section 23 is connected to both the first doped semiconductor layer 12 and the second doped semiconductor layer 13. In other words, the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are connected through the third doped semiconductor section 23.

[0160] In the case where the back contact battery also includes a third doped semiconductor portion, as shown in Figures 14 to 16, a dielectric layer 14 is disposed between at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 and the third doped semiconductor portion 23, and at least one end of the third doped semiconductor portion 23 is connected to the first doped semiconductor layer 12 or the second doped semiconductor layer 13 through the dielectric layer 14 having a leakage channel 15. The aforementioned connection can be a direct connection between at least one end of the third doped semiconductor portion 23 and the first doped semiconductor layer 12 or the second doped semiconductor layer 13; or, as shown in Figures 6 and 7, an indirect connection can be made through a portion of the dielectric layer 14 corresponding to the leakage channel (this portion has electrical conductivity) when the leakage channel does not penetrate the dielectric layer 14. Based on this, the dielectric layer 14 can adjust the electrical conduction efficiency between the third doped semiconductor section 23 and at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13. For example, insulation or semi-insulation can be achieved by the area of ​​the dielectric layer 14 without leakage channels 15, or the electrical conduction efficiency can be controlled by the thickness of the dielectric layer 14. Furthermore, leakage channels 15 can be provided in the dielectric layer 14 to make local current easier to conduct. The number and size of the leakage channels 15 provided in the dielectric layer 14 can also be adjusted, and the contact area and carrier transport efficiency of the connection area between at least one end of the third doped semiconductor section 23 and the first doped semiconductor layer 12 (or the second doped semiconductor layer 13) can be controlled by adjusting the thickness of the portion of the dielectric layer 14 corresponding to the leakage channels 15. This facilitates the control of leakage in the reverse leakage area on the side of the stacked structure including the first doped semiconductor layer 12 and the second doped semiconductor layer 13, thereby facilitating the balance between the reverse breakdown voltage and operating efficiency of the back contact battery, achieving both hot spot prevention and ensuring minimal or no battery efficiency loss.

[0161] In the first and second doped semiconductor layers, a dielectric layer may be provided only between the first and third doped semiconductor layers. In this case, the third doped semiconductor layer can be connected to the first doped semiconductor layer through a leakage channel provided within the dielectric layer, and the third doped semiconductor layer can be connected to the second doped semiconductor layer without a leakage channel. Alternatively, as shown in Figures 14 to 16, a dielectric layer 14 may be provided only between the second doped semiconductor layer 13 and the third doped semiconductor layer 23. In this case, the third doped semiconductor layer 23 can be connected to the second doped semiconductor layer 13 through a leakage channel 15 provided within the dielectric layer 14, and the third doped semiconductor layer 23 can be connected to the first doped semiconductor layer 12 without a leakage channel 15. Alternatively, a dielectric layer may be provided between the first and second doped semiconductor layers and the third doped semiconductor layer respectively. In this case, the third doped semiconductor layer needs to be connected to the first and second doped semiconductor layers respectively through a leakage channel provided within the dielectric layer.

[0162] Regarding the doping type of the third doped semiconductor section, it can be determined based on the relative positional relationship between the third doped semiconductor section and the dielectric layer. The doping type of the third doped semiconductor section can be the same as the doping type of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure, where no dielectric layer is disposed between them and the third doped semiconductor section, thereby reducing the manufacturing difficulty of the third doped semiconductor section. For example, as shown in Figures 14 to 16, only the dielectric layer 14 is disposed between the second doped semiconductor layer 13 and the third doped semiconductor section 23; in this case, the doping type of the third doped semiconductor section 23 can be the same as the doping type of the first doped semiconductor layer 12.

[0163] For example, the material of the third doped semiconductor portion may include at least one doping element. Simultaneously, the doping type of the third doped semiconductor portion is the same as the doping type of one of the first doped semiconductor layer and the second doped semiconductor layer, and the doping concentration of the doping element in the third doped semiconductor portion may be less than the doping concentration of the doping element in the first doped semiconductor layer or the second doped semiconductor layer that has the same doping type as the third doped semiconductor portion. Taking the example that the doping type of the third doped semiconductor portion is the same as the doping type of the second doped semiconductor layer: when the doping concentration of the doping element in the third doped semiconductor portion is less than the doping concentration of the doping element in the second doped semiconductor layer, a high-low junction with a doping concentration gradient can be formed between the third doped semiconductor portion and the second doped semiconductor layer along the direction from the first doped semiconductor layer to the second doped semiconductor layer. Under the built-in electric field of this high-low junction, the transmission and dispersion of leakage current are facilitated, which can further reduce the reverse breakdown voltage of the back contact battery and improve the burn-out resistance of the back contact battery.

[0164] It should be noted that in practical applications, when the doping type of the third doped semiconductor layer is the same as that of either the first or second doped semiconductor layer, the doping concentration of the doped element in the third doped semiconductor layer can also be equal to the doping concentration of the doped element in the first or second doped semiconductor layer that has the same doping type as the third doped semiconductor layer. Furthermore, which doping type the third doped semiconductor layer specifically matches in the first or second doped semiconductor layer can be determined based on the location of the dielectric layer and the actual application scenario; no specific limitation is made here.

[0165] For example, if the doping type of the third doped semiconductor layer is the same as that of one of the first and second doped semiconductor layers, optionally, the doping type of the third doped semiconductor layer may be opposite to the doping type of the first and second doped semiconductor layers in the stacked structure that are closer to the semiconductor substrate, and the third doped semiconductor layer and the one farther from the semiconductor substrate are connected by a dielectric layer with a leakage channel. For example, if the first doped semiconductor layer is closer to the semiconductor substrate in the stacked structure, the third doped semiconductor layer has the opposite doping type to the first doped semiconductor layer, and the third doped semiconductor layer and the second doped semiconductor layer are connected by a dielectric layer with a leakage channel. As another example, if the second doped semiconductor layer is closer to the semiconductor substrate in the stacked structure, the third doped semiconductor layer has the opposite doping type to the second doped semiconductor layer, and the third doped semiconductor layer and the first doped semiconductor layer are connected by a dielectric layer with a leakage channel. As shown in Figures 1 to 7, and Figures 14 and 15, compared to the first doped semiconductor layer 12 and the second doped semiconductor layer 13 being connected through a dielectric layer 14 with a leakage channel 15, the connection area between the third doped semiconductor portion 23, which has the opposite conductivity type, and the one closest to the semiconductor substrate 11 is larger (greater than the channel cross-sectional area of ​​the leakage channel 15). Therefore, in this case, the risk of hot spots on the back contact battery can be further reduced, and the burn-out resistance of the back contact battery can be improved. Secondly, it is understood that the portion of the dielectric layer 14 without a leakage channel 15 can effectively suppress the formation range of the third doped semiconductor portion 23 and / or help reduce the doping concentration of the doping element in the third doped semiconductor portion 23, thereby affecting the connection area between the third doped semiconductor portion 23 and the one closest to the semiconductor substrate 11, and achieving effective control of leakage loss.

[0166] For example, when the doping type of the third doped semiconductor layer is the same as that of one of the first and second doped semiconductor layers, the doping type of the third doped semiconductor layer can also be opposite to the doping type of the first and second doped semiconductor layers in the stacked structure that are furthest from the semiconductor substrate, and the third doped semiconductor layer and the one closest to the semiconductor substrate are connected by a dielectric layer with a leakage channel. For example, when the first doped semiconductor layer is closer to the semiconductor substrate than the first doped semiconductor layer in the stacked structure, the third doped semiconductor layer and the second doped semiconductor layer have opposite doping types, and the third doped semiconductor layer and the first doped semiconductor layer are connected by a dielectric layer with a leakage channel. Another example: when the second doped semiconductor layer is closer to the semiconductor substrate than the first doped semiconductor layer in the stacked structure, the third doped semiconductor layer and the first doped semiconductor layer have opposite doping types, and the third doped semiconductor layer and the second doped semiconductor layer are connected by a dielectric layer with a leakage channel. In this case, it is also beneficial to increase the proportion of the reverse leakage region, further reducing the burn-out resistance of the back contact battery.

[0167] Secondly, the embodiments of this application do not specifically limit the type and concentration of doping elements in the third doped semiconductor section. The type and concentration of doping elements in each part of the third doped semiconductor section can be the same; in this case, each part of the third doped semiconductor section is doped with only group IIIA doping elements or group VA doping elements. Specifically, each part of the third doped semiconductor section may be doped with only one type of group IIIA doping element or one type of group VA doping element; or it may be doped with multiple types of group IIIA doping elements or multiple types of group VA doping elements.

[0168] Alternatively, if a dielectric layer is provided between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer through the dielectric layer provided with a leakage current channel, the portion of the third doped semiconductor portion near the dielectric layer may also have two doping elements, namely, P-type and N-type doping elements. Understandably, assuming other factors remain constant, when the portion of the third doped semiconductor near the dielectric layer contains only one group IIIA or group VA dopant, compared to when the portion contains both group IIIA and group VA dopant, the doping types of the P-type and N-type dopants are opposite. This causes recombination of the two doping types after the third doped semiconductor, which originally only contained one group IIIA or group VA dopant, is added. This weakens its conductivity. The conductivity can then be controlled by adjusting the doping concentration of the other group IIIA or group VA dopant within the dielectric layer, thus facilitating a balance between the reverse breakdown voltage and operating efficiency of the back-contact battery. The portion of the third doped semiconductor near the dielectric layer can contain one or more group IIIA dopant elements, and also one or more group VA dopant elements. Furthermore, the specific doping type of the third doped semiconductor can be determined based on the positional relationship between the first, second, and third doped semiconductor layers and the dielectric layer. When there is no dielectric layer between the first doped semiconductor layer and the third doped semiconductor layer, and a dielectric layer is provided between the second doped semiconductor layer and the third doped semiconductor layer, the doping type of the third doped semiconductor layer is the same as the doping type of the first doped semiconductor layer. Conversely, when there is no dielectric layer between the second doped semiconductor layer and the third doped semiconductor layer, and a dielectric layer is provided between the first doped semiconductor layer and the third doped semiconductor layer, the doping type of the third doped semiconductor layer is the same as the doping type of the second doped semiconductor layer.

[0169] In the second case, the mating surfaces of the connection regions between the third doped semiconductor portion and the first doped semiconductor layer, and / or the mating surfaces of the connection regions between the third doped semiconductor portion and the second doped semiconductor layer, may be disposed only between the first and second doped semiconductor layers along a direction perpendicular to the first surface. Alternatively, as shown in Figures 14 to 16, the mating surfaces of the connection regions between the third doped semiconductor portion 23 and the first doped semiconductor layer 12, and / or the mating surfaces of the connection regions between the third doped semiconductor portion 23 and the second doped semiconductor layer 13, may form an angle of less than 90° with the first surface of the semiconductor substrate 11. For example, the mating surfaces may form angles of 0°, 10°, 20°, 30°, 40°, 50°, 60°, 70°, or 80° with the first surface. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the mating surfaces of the connection regions between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 forming an angle of less than 90° with the first surface of the semiconductor substrate 11, as described above, and will not be repeated here.

[0170] In terms of grain size, the grain size in the third doped semiconductor layer can be equal to the grain size in the first and second doped semiconductor layers. Alternatively, as shown in FIG16, the grain size in the third doped semiconductor layer 23 can also be smaller than the grain size of at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In other words, the grain size in the third doped semiconductor layer 23 can also be smaller than the grain size in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is closer to the semiconductor substrate; and / or, the grain size in the third doped semiconductor layer 23 can also be smaller than the grain size in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is farther away from the semiconductor substrate. It is understood that the smaller the grains in the doped semiconductor layer, the more interfaces there are between the grains in the doped semiconductor layer, and therefore the larger the resistance of the grain interface. Based on this, the size of the grains in the third doped semiconductor section 23 is smaller than the size of at least one of the grains in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In this case, the resistance of the third doped semiconductor section 23 is greater than the resistance of at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure, which helps to enhance the regulation of carrier transport between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure through the third doped semiconductor section 23. Therefore, placing the smaller-sized third doped semiconductor section 23 between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure can limit carrier exchange on both sides, reduce leakage current, prevent cell efficiency loss, consume some leakage current, and allow some leakage current to pass through, thus achieving the function of preventing hot spots.

[0171] Alternatively, as shown in FIG16, the average size of the grains in the third doped semiconductor portion 23 may also be smaller than the average size of the grains in at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In other words, the average size of the grains in the third doped semiconductor portion 23 may also be smaller than the average size of the grains in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that are closer to the semiconductor substrate; and / or, the average size of some grains in the third doped semiconductor portion 23 may also be smaller than the average size of the grains in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that are farther from the semiconductor substrate. The crystallinity of these three factors can be evaluated from the grain size, and the crystallinity of the third doped semiconductor portion 23 may also be smaller than the crystallinity of at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In other words, the crystallinity of the third doped semiconductor portion 23 can be less than the crystallinity of the one closer to the semiconductor substrate in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure; and / or, the crystallinity of the third doped semiconductor portion 23 can be less than the crystallinity of the one farther from the semiconductor substrate in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. The application principle of the beneficial effects in these cases can be referred to the application principle of the beneficial effects of the grain size in the third doped semiconductor portion being smaller than the grain size of at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, as described above, and will not be repeated here.

[0172] Regarding the dielectric layer, in terms of thickness, the thickness of the dielectric layer in this embodiment can be any thickness greater than or equal to 13nm, and no specific limitation is made here.

[0173] For example, the thickness of the dielectric layer can be less than or equal to 150 nm. For instance, the thickness of the dielectric layer can be 13 nm, 14 nm, 14.5 nm, 15 nm, 16 nm, 17 nm, 18 nm, 20 nm, 30 nm, 50 nm, 60 nm, 80 nm, 100 nm, 120 nm, or 150 nm. This prevents excessive material consumption in manufacturing the dielectric layer due to its thickness, thus helping to control the manufacturing cost of the back contact battery. Furthermore, since the thickness of the dielectric layer may also affect the length of the leakage channel, and the length of the leakage channel is proportional to the transmission resistance of the leakage current, this also prevents excessively long leakage channels caused by a thick dielectric layer, which could lead to excessive heat generation at the leakage channel when the back contact battery is blocked, ensuring that the back contact battery has high resistance to burn-out.

[0174] Additionally, as shown in Figures 14 and 15, the dielectric layer 14 can be interrupted at the leakage channel 15. In this case, the thickness of the portion of the dielectric layer 14 with the leakage channel 15 is 0, and the leakage channel 15 penetrates the dielectric layer 14. Alternatively, as shown in Figure 16, the thickness of the portion of the dielectric layer 14 with the leakage channel 15 can also be greater than 0. In this case, the thickness of the portion of the dielectric layer 14 with the leakage channel 15 will affect the diffusion of doped elements from the first doped semiconductor layer 12 to the second doped semiconductor layer 13, which is farther from the semiconductor substrate, when manufacturing the stacked structure. This will affect the extension range of the doped elements after crossing the leakage channel, and thus affect the proportion of the reverse leakage region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. Based on this, the thickness of the portion of the dielectric layer with the leakage channel can be determined according to the requirements of the reverse breakdown voltage and leakage loss of the back contact battery in the actual application scenario, without specific limitations here.

[0175] For example, as shown in FIG16, the thickness of the portion of the dielectric layer 14 in which the leakage channel 15 is provided can be less than or equal to 7 nm. For example, the thickness of the portion of the dielectric layer 14 in which the leakage channel 15 is provided can be 0, 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, or 7 nm, etc. By keeping the thickness of the portion of the dielectric layer 14 in which the leakage channel 15 is provided relatively small, and controlling the thickness of the dielectric layer 14 at the leakage channel 15 to below 7 nm, leakage at the leakage channel is achieved, giving the back contact battery anti-hot spot capability. Furthermore, by controlling the thickness of the portion of the dielectric layer 14 in the leakage channel 15, the degree of leakage between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 is adjusted, achieving adjustable leakage magnitude. This enables adjustable leakage and electrical isolation, facilitating the balance between the reverse breakdown voltage and operating efficiency of the back contact battery. Secondly, the thickness of the dielectric layer 14 affects its electrical transmission performance. Especially for dielectric layers 14 made of the same material, the thinner the layer, the better the electrical transmission performance, enabling electrical connection; the thicker the layer, the worse the electrical transmission performance, but the better the insulation, enabling electrical isolation. When the thickness of the dielectric layer 14 at the leakage channel is less than or equal to 7 nm, an effective electrical connection can be achieved.

[0176] From the perspective of film structure, the dielectric layer can be a single-layer structure or a multi-layer structure. For example, the dielectric layer can be a single-layer structure consisting only of a doped silicon glass layer or an etching mask layer (such as a silicon nitride layer). Another example is a stack of at least one of a doped silicon glass layer and an etching mask layer, corresponding to a portion of a third region of a first or second interface passivation layer. Yet another example is a stack of at least one of a doped silicon glass layer and an etching mask layer, combined with a doped semiconductor material.

[0177] From a materials perspective, the dielectric layer can be made of only insulating materials, or it can include both insulating and semiconductor materials. This configuration improves the applicability of the back contact battery in different application scenarios while reducing the difficulty of manufacturing the dielectric layer. Specifically, this application does not limit the types of insulating and semiconductor materials, or their distribution within the dielectric layer when it includes both, as long as they are applicable to the back contact battery provided in this application.

[0178] For example, the material of the dielectric layer may include oxygen and / or silicon. There are many types of insulating materials containing oxygen, such as silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, or hafnium dioxide. Therefore, when the dielectric layer material includes oxygen, the applicability of the back contact battery provided in this application embodiment can be improved in different application scenarios. In addition, insulating materials containing oxygen typically have a high dielectric constant, resulting in high insulating or semi-insulating properties of the dielectric layer. This helps to further reduce the direct transport and recombination of charge carriers collected by the first and second doped semiconductor layers in the stacked structure, ensuring high photoelectric conversion efficiency of the back contact battery. Furthermore, when the dielectric layer material contains silicon (which may be a silicon-containing semiconductor material such as silicon or silicon germanium, or a silicon-containing insulating material such as silicon oxide, silicon nitride, or silicon oxynitride), the compatibility between the dielectric layer and the first and second doped semiconductor layers, which are semiconductor materials, can be improved, further enhancing the working performance of the back contact battery.

[0179] For example, when the dielectric layer comprises both an insulating material and a semiconductor material, the type of semiconductor material within the dielectric layer can be the same as the type of semiconductor material in the first doped semiconductor layer and the second doped semiconductor layer of the stacked structure that is closest to the semiconductor substrate. When the first doped semiconductor layer and the second doped semiconductor layer of the stacked structure that is closest to the semiconductor substrate are both first doped semiconductor layers, the type of semiconductor material within the dielectric layer can be the same as the type of semiconductor material in the first doped semiconductor layer. Alternatively, when the first doped semiconductor layer and the second doped semiconductor layer of the stacked structure that is closest to the semiconductor substrate are both second doped semiconductor layers, the type of semiconductor material within the dielectric layer can be the same as the type of semiconductor material in the second doped semiconductor layer. As shown in Figures 14 and 15, along the thickness direction of the semiconductor substrate 11, the dielectric layer 14 at least covers the first doped semiconductor layer 12 and the second doped semiconductor layer 13 of the stacked structure that is closest to the semiconductor substrate 11. Based on this, in the actual manufacturing process, when the type of semiconductor material in the dielectric layer 14 is the same as the type of semiconductor material in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 near the semiconductor substrate 11 in the stacked structure, when the entire first doped semiconductor layer 12 or the second doped semiconductor layer 13 is selectively etched under the masking effect of the insulating material included in the dielectric layer 14, the etchant does not completely remove the part of the first doped semiconductor layer 12 or the second doped semiconductor layer 13 near the insulating material. At this time, the etching time corresponding to the etchant is relatively short, which can reduce the influence of the etchant on the dielectric layer 14, ensure that the size of the leakage channel 15 opened in the dielectric layer 14 is not too large, further improve the degree of control of leakage loss by the dielectric layer 14, and further improve the working efficiency of the back contact battery.

[0180] It should be noted that when the dielectric layer material includes both insulating and semiconductor materials, the type of semiconductor material within the dielectric layer may differ from the type of semiconductor material in the first and second doped semiconductor layers of the stacked structure that are closest to the semiconductor substrate. In actual manufacturing, the semiconductor material included in the dielectric layer can be formed on the first and second doped semiconductor layers of the stacked structure that are closest to the semiconductor substrate, according to actual requirements, before forming the insulating material included in the dielectric layer.

[0181] In practical applications, the materials for the dielectric layer can include silicon oxide, silicon nitride, intrinsic / doped amorphous silicon, intrinsic / doped polycrystalline silicon, intrinsic / doped monocrystalline silicon, doped phosphorus / borosilicate glass, alumina, aluminum nitride, phosphorus nitride, titanium nitride, or silicon carbide. One or more of these materials can be selected depending on the specific application. The dielectric layer at the leakage channel location can be made of the same material as the dielectric layers at other locations; for example, electrical connection and isolation at different locations can be achieved by adjusting the thickness of the same material. This method simplifies the fabrication process and eliminates matching barriers between film layers. Alternatively, the dielectric layer at the leakage channel location can be made of different materials than the dielectric layers at other locations. For instance, a conductive dielectric layer can be used at the leakage channel location, while insulating or semi-insulating dielectric layers can be used at other locations. This combination of film layers ensures that different areas do not interfere with each other.

[0182] In terms of the formation range, the dielectric layer may be disposed only along the thickness direction of the semiconductor substrate between the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure. Alternatively, as shown in Figures 1 to 7, the dielectric layer 14 may be disposed along the thickness direction of the semiconductor substrate 11 between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure, and disposed in a direction parallel to the first surface between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure. Alternatively, as shown in Figures 13 and 14, the dielectric layer 14 is not only disposed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure, but also partially disposed on the semiconductor substrate 11. In this case, if the first doped semiconductor layer 12 is closer to the semiconductor substrate 11 than the second doped semiconductor layer 13 in the stacked structure, the dielectric layer 14 is also disposed between the second doped semiconductor layer 13 and the semiconductor substrate 11, and at least a portion of the dielectric layer 14 is in contact with the semiconductor substrate 11. Alternatively, if the second doped semiconductor layer 13 is closer to the semiconductor substrate 11 than the first doped semiconductor layer 12 in the stacked structure, the dielectric layer 14 is also disposed between the first doped semiconductor layer 12 and the semiconductor substrate 11, and at least a portion of the dielectric layer 14 is in contact with the semiconductor substrate 11. The dielectric layer 14 can passivate a portion of the semiconductor substrate 11, reducing the carrier recombination rate on the side of the semiconductor substrate 11 where the dielectric layer 14 is formed, thereby improving the operating performance of the back contact battery.

[0183] As described above, in the stacked structure comprising a first doped semiconductor layer and a second doped semiconductor layer, where the one closest to the semiconductor substrate is the first doped semiconductor layer, when the surface of the third region is higher than the surface of the second region in the direction from the second surface to the first surface, the dielectric layer may extend at least to the space between the sidewall where the third region transitions to the second region and the second doped semiconductor layer. Alternatively, the dielectric layer may extend only to the space between the sidewall where the third region transitions to the second region and the second doped semiconductor layer, or it may extend to both the sidewall where the third region transitions to the second region and a portion of the second region and the second doped semiconductor layer.

[0184] In the stacked structure comprising a first doped semiconductor layer and a second doped semiconductor layer, where the one closer to the semiconductor substrate is the second doped semiconductor layer, when the surface of the third region is higher than the surface of the first region along the direction from the second surface to the first surface, the dielectric layer may extend at least to the space between the sidewall where the third region transitions to the first region and the first doped semiconductor layer. Alternatively, the dielectric layer may extend only to the space between the sidewall where the third region transitions to the first region and the first doped semiconductor layer, or it may extend to both the sidewall where the third region transitions to the first region and a portion of the first region and the first doped semiconductor layer.

[0185] In the stacked structure, where the first doped semiconductor layer and the second doped semiconductor layer are located closer to the semiconductor substrate, and the surface of the third region is higher than the surface of the second region along the direction from the second surface to the first surface, the second doped semiconductor layer extends from the surface of the second region, through the sidewall transitioning from the third region to the second region, to the portion of the first doped semiconductor layer corresponding to the third region. Based on this, when the dielectric layer extends at least between the sidewall transitioning from the third region to the second region and the second doped semiconductor layer, the portion of the dielectric layer extending to the sidewall transitioning from the third region to the second region ensures sufficient coverage of the dissimilar doped junction area. This ensures that the back contact battery, with minimal dust or other obstructions in its mounting environment, effectively controls the leakage loss between the first and second doped semiconductor layers in the stacked structure, further facilitating a balance between the reverse breakdown voltage and operating efficiency of the back contact battery. Furthermore, the portion of the dielectric layer extending at least to the sidewall transitioning from the third region to the second region passivates the portion of the semiconductor substrate corresponding to the junction of the second and third regions, further improving the operating performance of the back contact battery. In addition, in the case where the second doped semiconductor layer is closer to the semiconductor substrate than the first doped semiconductor layer in the stacked structure, the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface; the beneficial effects of the dielectric layer extending at least to the sidewall of the third region transitioning to the first region and the first doped semiconductor layer can be referred to above, and will not be repeated here.

[0186] In practical applications, when a dielectric layer is disposed between the first doped semiconductor layer and the second doped semiconductor layer along both the thickness direction of the semiconductor substrate and the direction parallel to the first surface, the average thickness of the portion of the dielectric layer disposed between the first and second doped semiconductor layers along the thickness direction of the semiconductor substrate can be equal to the average thickness of the portion disposed between the first and second doped semiconductor layers along the direction parallel to the first surface; or, the average thickness of the portion of the dielectric layer disposed between the first and second doped semiconductor layers along the thickness direction of the semiconductor substrate can be greater than the average thickness of the portion disposed between the first and second doped semiconductor layers along the direction parallel to the first surface, to prevent high leakage current loss between the first and second doped semiconductor layers along the thickness direction of the semiconductor substrate due to a large overlap width of the stacked structure (relative to the thickness of the first and second doped semiconductor layers closer to the semiconductor substrate included in the stacked structure), thus ensuring high operating efficiency of the back contact battery.

[0187] Secondly, when the dielectric layer is disposed between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface, and also between the first doped semiconductor layer and / or the second doped semiconductor layer and the semiconductor substrate, the average thickness of the portion of the dielectric layer disposed between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface can be equal to the average thickness of the portion of itself disposed between the first doped semiconductor layer and / or the second doped semiconductor layer and the semiconductor substrate; or, the average thickness of the portion of the dielectric layer disposed between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface can also be less than the average thickness of the portion of itself disposed between the first doped semiconductor layer and / or the second doped semiconductor layer and the semiconductor substrate, so as to ensure that there is a certain amount of leakage current between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface, and to ensure that the back contact battery has a low risk of hot spots.

[0188] Additionally, as shown in Figures 14 to 16, in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 defining the stacked structure, the one closer to the semiconductor substrate 11 has a top surface away from the semiconductor substrate 11, a bottom surface close to the semiconductor substrate 11, and a side surface connecting the bottom surface and the top surface. The other one away from the semiconductor substrate 11 covers a portion of the top surface and a portion of the side surface of the one closer to the semiconductor substrate 11. The dielectric layer 14 has a first dielectric portion 19 and a second dielectric portion 20. The first dielectric portion 19 is disposed between the top surface of the one away from the semiconductor substrate 11 and the one close to the semiconductor substrate 11. Exemplarily, the first dielectric portion 19 is disposed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 along the thickness direction of the semiconductor substrate 11. The second dielectric portion 20 is disposed between the side surface of the one away from the semiconductor substrate 11 and the one close to the semiconductor substrate 11. Exemplarily, the second dielectric portion 20 is disposed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in a direction parallel to the first surface. The dielectric layer 14 can not only regulate the leakage current between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure along the thickness direction of the semiconductor substrate 11, but also regulate the leakage current between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure along the direction parallel to the first surface, so as to ensure that the reverse breakdown voltage and leakage loss of the back contact battery can meet the working requirements. Furthermore, when the first dielectric portion 19 is disposed between the top surface of the one furthest from the semiconductor substrate 11 and the one closest to the semiconductor substrate 11, and the second dielectric portion 20 is disposed between the side surface of the one furthest from the semiconductor substrate 11 and the one closest to the semiconductor substrate 11, the extension directions of the first dielectric portion 19 and the second dielectric portion 20 have a non-zero angle. The spacing between the second dielectric portion 20 and adjacent structures can be adjusted by changing this angle, thereby controlling the extension range of the third doped semiconductor portion 23 through the leakage channel 15 to the side closest to the semiconductor substrate 11. This, in turn, controls the docking area between the third doped semiconductor portion 23 and the first doped semiconductor layer 12 (or the second doped semiconductor layer 13), facilitating a balance between the working efficiency and reverse breakdown voltage of the back contact battery. In the above scenario, the angle between the first dielectric portion 19 and the second dielectric portion 20 can be determined based on the side surface morphology of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure, the requirements for the working efficiency and reverse breakdown voltage of the back contact battery, and the actual manufacturing process.

[0189] Furthermore, the morphology, size, and distribution of the leakage channels within the dielectric layer can be randomly set. Secondly, as mentioned earlier, the first and second doped semiconductor layers in the stacked structure can achieve local electrical connectivity via the leakage channels within the dielectric layer, thereby reducing the reverse breakdown voltage of the back contact battery. It can be seen that the size and distribution of the leakage channels within the dielectric layer affect the distribution and docking area of ​​the connection region between the first and second doped semiconductor layers, thus affecting the leakage loss and reverse breakdown voltage of the back contact battery. Based on this, the size and distribution of the leakage channels can be determined according to the requirements for the working efficiency and hot spot risk of the back contact battery in the actual application scenario, as well as the actual manufacturing process; no specific limitations are made here. It should be noted that the specific meaning of the leakage channel size can be determined based on the specific morphology of the leakage channel; no specific limitations are made here. Generally, the size of the leakage channel refers to the cross-sectional dimension perpendicular to the direction from the first to the second doped semiconductor layer. For example, when the cross-sectional shape of the leakage channel is circular, the size of the leakage channel can be the radius or diameter of the circle.

[0190] For example, the size of the leakage channel can be greater than or equal to 12 nm, and / or the size of the leakage channel can be less than or equal to the thickness of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is closer to the semiconductor substrate. For example, the size of the leakage channel can be 12 nm, 15 nm, 18 nm, 20 nm, 30 nm, 50 nm, 60 nm, or 80 nm, etc. When the size of the leakage channel is greater than or equal to 12 nm, it can prevent the reduction in the reverse breakdown voltage of the back contact battery from being too small due to the small size of the leakage channel, ensuring that the back contact battery has a low risk of hot spots. In addition, when the size of the leakage channel is less than or equal to the thickness of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is closer to the semiconductor substrate, it can prevent the entire area of ​​the sidewall of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is away from the one closer to the semiconductor substrate from being exposed to the outside through the leakage channel, which is beneficial to controlling the junction area of ​​the docking junction between the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure, ensuring that the back contact battery has a low leakage loss in the forward voltage region.

[0191] For example, as shown in Figures 1 to 7, at least one leakage channel 15 may be located within the first dielectric portion 19; and / or, at least one leakage channel 15 may also be located within the second dielectric portion 20; and / or, at least one leakage channel 15 may also be located between the first dielectric portion 19 and the second dielectric portion 20. The location of the leakage channel 15 within the dielectric layer 14 has various possible implementation schemes, which is beneficial to improving the applicability of the back contact battery provided in this application embodiment under different application scenarios. Furthermore, it eliminates the need for strict control of manufacturing precision or additional operational steps to form the leakage channel 15 at a fixed position, thereby reducing the manufacturing difficulty of the back contact battery and simplifying the manufacturing process. In certain scenarios, the combined use of the first dielectric section 19, the second dielectric section 20, the leakage channel 15, and the third doped semiconductor section 23 has a better effect. The leakage channel 15 can be preferentially disposed on the dielectric layer between the third doped semiconductor section 23 and the first doped semiconductor layer 12 or the second doped semiconductor layer 13. In this way, the transmission of charge carriers in the leakage region can be further controlled by the third doped semiconductor section 23, and the leakage current transmission capability can be increased or decreased as needed.

[0192] Optionally, in the third region, the distribution density of leakage current channels within the second dielectric portion is greater than the partial density of leakage current channels within other portions of the dielectric layer.

[0193] As one possible implementation, a dielectric layer 14 is disposed between a portion of the first doped semiconductor layer 12 and the first region 16 included on the first surface, and at least one leakage channel 15 is disposed within the portion of the dielectric layer 14 corresponding to the first region 16. And / or, a dielectric layer 14 is disposed between a portion of the second doped semiconductor layer 13 and the second region 17 included on the first surface, and at least one leakage channel 15 is disposed within the portion of the dielectric layer 14 corresponding to the second region 17. While the first region 16 and / or the second region 17 can be passivated by the dielectric layer 14, both regions can collect charge carriers within the semiconductor substrate 11 through the leakage channel 15 disposed within the dielectric layer 14, thereby achieving charge carrier regulation and optimizing battery performance.

[0194] Wherein, when a dielectric layer is disposed between a portion of the first doped semiconductor layer and the first region included in the first surface and / or a dielectric layer is disposed between a portion of the second doped semiconductor layer and the second region included in the first surface, the size of the leakage channel disposed in the portion of the dielectric layer corresponding to the first region and / or the second region, the straight-line distance between different leakage channels, and the setting range of the dielectric layer in the first region and the second region can be set according to actual needs, and no specific limitation is made here.

[0195] For example, the straight-line distance between different leakage channels disposed within the portion of the dielectric layer located between the first doped semiconductor layer and the second doped semiconductor layer is defined as L1; and the straight-line distance between different leakage channels disposed within the portion of the dielectric layer located between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, is defined as L2, where L1 > L2. It is understood that when the back contact battery is in the forward voltage region, the portion of the first doped semiconductor layer corresponding to the first region and the portion of the second doped semiconductor layer corresponding to the second region need to collect and export carriers of the corresponding conductivity type generated after the semiconductor substrate absorbs photons to form a photocurrent. Based on this, the carrier transport capability of the portion of the first doped semiconductor layer corresponding to the first region and the portion of the second doped semiconductor layer corresponding to the second region affects the operating efficiency of the back contact battery. When the back contact battery is blocked, a reverse leakage region is formed at the connection between the first doped semiconductor layer and the second doped semiconductor layer in the third region, which facilitates the export of leakage current and reduces the risk of hot spots. When the linear distance L1 between different leakage channels within the portion of the dielectric layer located between the first and second doped semiconductor layers is larger, it facilitates a sparser density of local leakage points between the first and second doped semiconductor layers. This allows for better control of the leakage current, resulting in higher efficiency for the back contact battery. Furthermore, it helps to disperse the leakage current and heat sources, preventing burn-out due to localized heat concentration and further improving the back contact battery's burn-out resistance. When the linear distance L2 between different leakage channels within the portion of the dielectric layer located between the first and first doped semiconductor layers and the first region, or between the second and second doped semiconductor layers and the second region, is smaller, more channels for carrier transport can be provided between these layers. This improves the carrier collection capacity of the first or second doped semiconductor layers, reduces carrier recombination losses, and further enhances the efficiency of the back contact battery.

[0196] For example, the size of the leakage channel disposed in the portion of the dielectric layer between the first doped semiconductor layer and the second doped semiconductor layer is defined as A; the size of the leakage channel disposed in the portion of the dielectric layer between the first doped semiconductor layer and the first surface, or in the portion between the second doped semiconductor layer and the first surface, is defined as B, where A > B. The beneficial effect in this case can be referred to the beneficial effect of L1 being greater than L2 described above, and will not be repeated here.

[0197] Of course, L2 can also be equal to or greater than L1, and / or A can also be equal to or less than B, to improve the passivation effect of the dielectric layer in part of the first region and / or part of the second region.

[0198] Additionally, the back-contact battery may also include a first electrode and a second electrode, with the first electrode electrically connected to a first doped semiconductor layer. The second electrode is also electrically connected to the second doped semiconductor layer. When the stacked structure includes a first doped semiconductor layer and a second doped semiconductor layer, with the one closer to the semiconductor substrate being the first doped semiconductor layer, the distance between the dielectric layer and the second electrode can be less than or equal to 400 μm. Conversely, when the stacked structure includes a first doped semiconductor layer and a second doped semiconductor layer, with the one closer to the semiconductor substrate being the second doped semiconductor layer, the distance between the dielectric layer and the first electrode can also be less than or equal to 400 μm. This reduces the impact of the presence of the dielectric layer on the collection of charge carriers by the first and second doped semiconductor layers, ensuring that both layers have strong charge carrier collection capabilities.

[0199] Optionally, embodiments of this application also provide a method for manufacturing a back contact battery, which may include the following steps:

[0200] First, a semiconductor substrate is provided. The semiconductor substrate has a first surface and a second surface opposite to each other. The first surface has a first region and a second region spaced apart, and a third region located between the first region and the second region.

[0201] Then, a first doped semiconductor layer can be formed on the first surface of the semiconductor substrate using processes such as chemical vapor deposition. If the material of the first doped semiconductor layer includes silicon and a diffusion process is used to achieve the doping treatment, a doped silicon glass layer is formed on the side of the first doped semiconductor layer facing away from the semiconductor substrate. Then, a laser irradiation process is used to process the portion of the doped silicon glass layer corresponding to the second region (or a portion corresponding to a local area of ​​the first region and a portion of the second region, or a portion corresponding to the second and third regions; or a portion corresponding to the second, third, and fourth regions; or a local area of ​​the first region, a portion of the second and third regions; or a local area of ​​the first region, a portion of the second, third, and fourth regions), so that the doped silicon glass layer in the corresponding region forms a leakage channel. The doped silicon glass layer in the un-laser-irradiated areas is retained as a mask layer. Next, under the masking effect of the mask layer, a wet chemical etching process is used to selectively remove the first doped semiconductor layer in the areas not covered by the mask layer. After etching, the remaining portion of the doped silicon glass layer in the laser-irradiated area extends to the side of the first doped semiconductor layer, and even covers the portion of the semiconductor substrate corresponding to the boundary between the first and third regions, as well as the portion of the doped silicon glass layer corresponding to the boundary between the third and second regions. The location where the doped silicon glass layer breaks off forms a leakage current path. Based on this, after wet chemical etching, the remaining portion of the doped silicon glass layer forms a dielectric layer.

[0202] Next, a second doped semiconductor layer can be formed integrally on the second region of the semiconductor substrate and the first doped semiconductor layer using processes such as chemical vapor deposition. Then, an etching process is used to selectively remove the portion of the second doped semiconductor layer covering the first region of the first doped semiconductor layer (or the portion of the second doped semiconductor layer covering the first region of the first doped semiconductor layer and the portion covering the fourth region).

[0203] In the case of manufacturing the back contact battery provided in the embodiments of this application using the above method, the distribution and size of the leakage current channel in the dielectric layer can be adjusted by controlling the laser irradiation position, the size of the laser spot, the energy of the laser, and the arrangement of the laser spot.

[0204] In other embodiments, the dielectric layer can be prepared by atomic layer deposition, plasma chemical vapor deposition, or low-pressure chemical vapor deposition to form a single-layer film or a composite film of two or more layers. For example, it can be a doped silicon glass layer with a leakage channel formed by laser irradiation (preparation method described above), with a silicon oxide layer superimposed on its surface away from the silicon substrate. The silicon oxide layer can be prepared by low-pressure chemical vapor deposition, thus forming a silicon oxide layer on the leakage channel. The dielectric layer is a stack of the doped silicon glass layer and the silicon oxide layer, and a dielectric layer that enables electrical connection exists at the leakage channel.

[0205] In other embodiments, the leakage channel can be obtained by chemical etching. For example, a mask can be used to cover the area outside the preset area of ​​the leakage channel, and then chemical etching is performed to obtain a thinned area or a partially broken area of ​​the film layer, thereby obtaining the leakage channel.

[0206] The back contact battery of the second group of the first aspect of this application will be described below with reference to Figures 17 to 35.

[0207] As shown in Figure 17, optionally, in the back contact battery provided in this embodiment, the portion of the dielectric layer 14 disposed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 along the thickness direction of the semiconductor substrate 11 is the first dielectric portion 19. In other words, along the thickness direction of the semiconductor substrate 11, the arrangement of the first doped semiconductor layer 12, the second doped semiconductor layer 13, and the first dielectric portion 19 is: first doped semiconductor layer 12, first dielectric portion 19, second doped semiconductor layer 13. In the dielectric layer 14, at least one leakage channel 15 is provided within the first dielectric portion 19. On the third region 18, and along the direction from the first region 16 to the second region 17, the width of the first dielectric portion 19 is greater than or equal to the width of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure that is furthest from the semiconductor substrate 11.

[0208] The back contact battery includes a dielectric layer 14 comprising a first dielectric portion 19 disposed between a first doped semiconductor layer 12 and a second doped semiconductor layer 13 along the thickness direction of the semiconductor substrate 11. By providing a first dielectric portion 19 with a width greater than or equal to the width of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure that is furthest from the semiconductor substrate 11, electrical transport between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked region can be regulated. At least one leakage channel 15 is provided within this first dielectric portion 19, allowing a portion of the first doped semiconductor layer 12 and a portion of the second doped semiconductor layer 13 in the stacked structure to be electrically connected directly or indirectly via this leakage channel 15. Furthermore, a leakage channel 15 is provided within the first dielectric portion 19 of the dielectric layer 14. Since the surface morphology of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked region is approximately parallel to the first surface, this surface morphology is simpler than the side surface morphology of the first doped semiconductor layer 12 and the second doped semiconductor layer 13. Therefore, providing a leakage channel 15 within the first dielectric portion 19 is not limited by structural complexity; only the pattern or position of the leakage channel 15 needs adjustment, without considering other factors. If etching is used to prepare the leakage channel 15, the etching angle may need to be adjusted compared to conventional etching to reduce the difficulty of creating the leakage channel 15 within the dielectric layer 14 using processes such as laser etching. This reduces the manufacturing difficulty of the back contact battery and improves the compatibility of the back contact battery provided in this embodiment with conventional back contact battery manufacturing processes, thus improving the manufacturing method of the back contact battery. In addition, the dielectric layer 14 can achieve physical separation. A functional layer with electrical insulation or semi-insulation properties can be selected to control the electrical transmission between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked region. Therefore, the part of the dielectric layer 14 without leakage channel 15 can electrically isolate part of the first doped semiconductor layer 12 and part of the second doped semiconductor layer 13 in the stacked structure, effectively reducing the direct transport and recombination of charge carriers collected by the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure, thereby effectively controlling the leakage loss of the back contact battery and enabling the back contact battery to have good working performance.Therefore, in the back contact battery provided in this application embodiment, the leakage channel 15 provided in the dielectric layer 14 reduces the risk of hot spots in the back contact battery. At the same time, the insulation characteristics of the part of the dielectric layer 14 without the leakage channel 15 can effectively control the leakage loss of the back contact battery in the forward voltage region. Furthermore, compared with using an etching process to open the leakage channel 15 on the side surface of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure near the semiconductor substrate 11, it is more difficult and precise to open the leakage channel 15 only in the first dielectric portion 19 between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 along the thickness direction of the semiconductor substrate 11. This makes it easier to achieve precise control of leakage and insulation, and facilitates the adjustment of the reverse breakdown voltage and working efficiency of the back contact battery to achieve a balance.

[0209] As described in the first set of embodiments of the first aspect, in practical applications, the embodiments of this application do not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate can be a silicon substrate. Alternatively, the semiconductor substrate can also be a substrate made of any semiconductor material, such as a germanium-silicon substrate, a germanium substrate, or a gallium arsenide substrate.

[0210] Similarly, the distribution of the first region, the second region, and the third region on the first surface, the morphology of the first region and the second region on the first surface, the doping type, materials, arrangement of substances, stacking method of the first doped semiconductor layer and the second doped semiconductor layer, the location of the first doped semiconductor layer, the material and thickness of the first interface passivation layer, the location of the second doped semiconductor layer, the material and thickness of the second interface passivation layer, and the range of the third region are as described in the first set of embodiments of the first aspect, and will not be repeated here.

[0211] Similarly, the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region; one of the first and second regions corresponds to the P region, and the other corresponds to the N region, while the third region corresponds to the PN overlapping region.

[0212] For example, as shown in FIG27, the first region 16 and the second region 17 can be distributed in an alternating stripe pattern. Both the first region 16 and the second region 17 can include multiple finger-shaped regions 220, and the finger-shaped regions 220 included in the first region 16 and the second region 17 extend along a first direction and are spaced apart along a second direction. The first direction is different from the second direction. The first direction and the second direction can be any two directions parallel to the first surface and different from each other. Optionally, the first direction and the second direction are orthogonal.

[0213] For example, as shown in FIG28, the first region 16 and the second region 17 can also be distributed in an interdigitated pattern. Both the first region 16 and the second region 17 include multiple finger-shaped areas 220 and at least one connecting area 221. The finger-shaped areas 220 in the first region 16 and the finger-shaped areas 220 in the second region 17 extend along a first direction and are distributed at intervals along a second direction. The connecting area 221 in the first region 16 is connected to the finger-shaped areas 220 in the first region 16, and the connecting area 221 in the second region 17 is connected to the finger-shaped areas 220 in the second region 17. The first direction is different from the second direction. The first direction and the second direction can be any two directions parallel to the first surface and different from each other. Optionally, the first direction and the second direction are orthogonal.

[0214] Additionally, as shown in Figures 27 and 28, the finger-shaped regions included in the first region 16 and the second region 17 can be regular rectangular regions. Alternatively, the first and second regions can also include irregular rectangular regions. For example, as shown in Figures 29 and 30, in a stacked structure including a first doped semiconductor layer and a second doped semiconductor layer, where the one closer to the semiconductor substrate is the first doped semiconductor layer, at least a portion of the first region 16 and the third region 18 can form a rectangular region. In this case, at least a portion of the first region 16 is a rectangular region minus the portion containing the third region 18, i.e., "a missing rectangular region exists." Alternatively, in a stacked structure including a first doped semiconductor layer and a second doped semiconductor layer, where the one closer to the semiconductor substrate is the second doped semiconductor layer, at least a portion of the second region 17 and the third region 18 can form a rectangular region. In this case, at least a portion of the second region 17 is a rectangular region minus the portion containing the third region 18, i.e., "a missing rectangular region exists."

[0215] Optionally, in the third region, and along the direction from the first region to the second region, the width of the interface passivation layer corresponding to the one farther from the semiconductor substrate in the stacked structure, of the first doped semiconductor layer and the second doped semiconductor layer, can be equal to the width corresponding to the one farther from the semiconductor substrate. For example, as shown in FIG20, when the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure are the one farther from the semiconductor substrate 11, the width of the first interface passivation layer 21 in the third region 18, and along the direction from the first region 16 to the second region 17, can be equal to the width of the first doped semiconductor layer 12. As another example, as shown in FIG22, when the second doped semiconductor layer 13 in the stacked structure are the one farther from the semiconductor substrate 11, the width of the second interface passivation layer 22 in the third region 18, and along the direction from the first region 16 to the second region 17, can be equal to the width of the second doped semiconductor layer 13.

[0216] Alternatively, in the third region, and along the direction from the first region to the second region, the width of the interface passivation layer corresponding to the one furthest from the semiconductor substrate in the stacked structure, of the first doped semiconductor layer and the second doped semiconductor layer, can also be smaller than the width corresponding to the one furthest from the semiconductor substrate. For example, as shown in FIG23, when the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure are furthest from the semiconductor substrate 11, the width of the first interface passivation layer 21 in the third region 18, and along the direction from the first region 16 to the second region 17, is smaller than the width of the first doped semiconductor layer 12. As another example, as shown in FIG24, when the second doped semiconductor layer 13 in the stacked structure are furthest from the semiconductor substrate 11, the width of the second interface passivation layer 22 in the third region 18, and along the direction from the first region 16 to the second region 17, is smaller than the width of the second doped semiconductor layer 13. In the third region 18, there is no longer a corresponding interface passivation layer between the portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 corresponding to the leakage channel 15, which reduces the on-resistance between the two and helps to further reduce the reverse breakdown voltage of the back contact battery.

[0217] In the third region, and along the direction from the first region to the second region, the width of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is farther away from the semiconductor substrate will affect the proportion of the reverse leakage region in the third region, thereby affecting the reverse breakdown voltage and leakage loss of the back contact battery. Therefore, the one that is farther away from the semiconductor substrate can be determined according to the actual application scenario, as long as the width of the first dielectric portion is greater than or equal to the width of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is farther away from the semiconductor substrate.

[0218] For example, in the third region, and along the direction from the first region to the second region, the width of the first doped semiconductor layer and the second doped semiconductor layer of the stacked structure that is furthest from the semiconductor substrate can be greater than or equal to 5 μm and less than or equal to 200 μm. For example, the width of the one furthest from the semiconductor substrate can be 5 μm, 10 μm, 30 μm, 50 μm, 80 μm, 100 μm, 150 μm, 180 μm, or 200 μm, etc.

[0219] From a material perspective, the dielectric layer can be made of at least one insulating material and / or an intrinsic semiconductor material, as long as it provides insulating or semi-insulating properties. For example, the dielectric layer material can include at least one of silicon oxide, silicon nitride, intrinsic amorphous silicon, intrinsic polycrystalline silicon, intrinsic monocrystalline silicon, doped phosphorus glass, doped borosilicate glass, alumina, aluminum nitride, phosphorus nitride, titanium nitride, and silicon carbide.

[0220] In terms of the formation range, the specific range of the dielectric layer between the first doped semiconductor layer and the second doped semiconductor layer can be determined according to the materials of the first doped semiconductor layer and the second doped semiconductor layer, as well as the actual application scenario. As long as the dielectric layer includes the first dielectric portion disposed between the first doped semiconductor layer and the second doped semiconductor layer along the thickness direction of the semiconductor substrate.

[0221] For example, as shown in FIG17, the dielectric layer 14 may only include the first dielectric portion 19, that is, the dielectric layer 14 may only be disposed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 along the thickness direction of the semiconductor substrate 11. For example, when the back contact battery provided in the embodiments of this application is a hybrid back contact battery or a heterojunction back contact battery, the dielectric layer may only include the first dielectric portion; wherein, a hybrid back contact battery refers to a back contact battery in which the N region and P region correspond to a tunneling passivation contact structure and a heterojunction contact structure, respectively. As another example, when the back contact battery provided in the embodiments of this application is a back contact battery incorporating a tunneling passivation contact structure, the dielectric layer may only include the first dielectric portion; in this case, the first doped semiconductor layer and the second doped semiconductor layer may be electrically connected in a direction parallel to the first surface to improve the back contact battery's resistance to burn-out in installation environments with many obstructions such as dust.

[0222] For example, as shown in FIG25, the dielectric layer 14 may further include a second dielectric portion 20 disposed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in a direction parallel to the first surface. In other words, the arrangement of the first doped semiconductor layer 12, the second doped semiconductor layer 13, and the second dielectric portion 20 in a direction parallel to the first surface is: first doped semiconductor layer 12, second dielectric portion 20, second doped semiconductor layer 13. For example, when the back contact battery provided in this embodiment is a back contact battery with a tunneling passivation contact structure, the dielectric layer may include a first dielectric portion and a second dielectric portion. The presence of the second dielectric portion can separate the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface, further reducing leakage loss between the first doped semiconductor layer and the second doped semiconductor layer, and improving the working efficiency of the back contact battery in an installation environment with fewer obstructions such as dust or bird droppings. Of course, when the back contact battery in this embodiment is of other types, the dielectric layer may also include a second dielectric portion. Optionally, in the back contact battery provided in this application embodiment, when the third region with a stacked structure is disposed between the regions of the first region and the regions of the second region, the back contact battery further includes a second dielectric portion to further reduce leakage loss between the first doped semiconductor layer and the second doped semiconductor layer, thereby further improving the working performance of the back contact battery. Because when the third region with a stacked structure is disposed between the regions of the first region and the regions of the second region, a third region with a stacked structure is disposed at each position between the first region and the second region. At this time, the stacked structure extends relatively long. Although the first dielectric portion can adjust the leakage region on the top surface of the doped semiconductor layer near the semiconductor substrate in the stacked structure to achieve localized leakage, if both the doped semiconductor layer near the semiconductor substrate and the side surface are leakage regions in the stacked structure, it will lead to high leakage loss. Therefore, the second dielectric portion is introduced to control side leakage and optimize battery performance.

[0223] As can be seen from the above, the range of dielectric layer settings can be determined based on the materials of the first and second doped semiconductor layers in the actual application scenario, as well as the requirements of the reverse breakdown voltage and leakage loss of the back contact battery in the actual application scenario. No specific limitation is made here.

[0224] Regarding the width of the first dielectric portion, it is understood that when the distribution density of the leakage channel within the first dielectric portion is a fixed value, the width of the first dielectric portion is proportional to the proportion of the reverse leakage region on the first side. Based on this, the width of the first dielectric portion can be set according to different environmental requirements, as long as the width of the first dielectric portion is greater than or equal to the width of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is furthest from the semiconductor substrate.

[0225] For example, in the third region, and along the direction from the first region to the second region, the width of the first dielectric portion can be greater than or equal to 10 μm and less than or equal to 200 μm. For instance, in the third region, and along the direction from the first region to the second region, the width of the first dielectric portion can be 10 μm, 30 μm, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, or 200 μm, etc. As mentioned above, the width of the first dielectric portion can be set according to different environmental requirements, so that the back contact battery has a lower risk of hot spots in installation environments with many obstructions such as dust, or a lower leakage loss in installation environments with fewer obstructions such as dust, thereby improving the applicability of the back contact battery provided in this application embodiment in different practical application scenarios. Furthermore, having the width of the first dielectric portion within the above range can also prevent the difficulty of selectively etching the dielectric material due to a small width of the first dielectric portion, thus reducing the manufacturing difficulty of the back contact battery.

[0226] For example, the back contact battery may further include a first electrode (not shown) and a second electrode (not shown), the first electrode being electrically connected to a first doped semiconductor layer; the second electrode being electrically connected to the second doped semiconductor layer. At least one of the first electrode and the second electrode has a minimum distance between itself and a leakage channel disposed within the first dielectric portion that is greater than or equal to 30 μm and less than or equal to 300 μm. For example, the minimum distance can be 30 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 220 μm, 250 μm, 260 μm, 280 μm, 290 μm, or 300 μm, etc. At least one of the first electrode and the second electrode needs to maintain a certain distance from its adjacent leakage channel to avoid short circuits caused by electrode contact with the leakage area, thereby affecting the battery efficiency. On the one hand, in practical applications, the equipment used to manufacture the first and second electrodes often has certain processing errors, resulting in a deviation between the target formation range and the actual formation range of the first and second electrodes. On the other hand, the fabrication of leakage channels can cause a certain degree of film damage, affecting the generation and collection of charge carriers. If one of the first and second electrodes forms an electrical connection at this point, it will affect the collection of charge carriers, thereby affecting the battery efficiency. Therefore, a predetermined distance needs to be maintained.

[0227] As for the arrangement of the leakage current path within the first dielectric section, it can be divided into at least the following three types:

[0228] The first method, as shown in Figure 25, involves the first dielectric portion 19 penetrating (i.e., interrupted) at at least one leakage channel 15. Between the portions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 corresponding to the leakage channel 15, the isolation effect of the dielectric layer 14 is no longer present, reducing the on-resistance of the portions corresponding to the leakage channel 15. Simultaneously, it also reduces the obstruction of the portion of the dielectric layer 14 corresponding to the leakage channel 15 from the dopant in the portion away from the semiconductor substrate 11 to the opposite side of the dielectric layer 14 when forming a stacked structure including the first doped semiconductor layer 12 and the second doped semiconductor layer 13. This increases the contact area of ​​the direct or indirect electrical connection region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, thereby reducing the reverse breakdown voltage of the back contact battery and further improving the back contact battery's resistance to burn-out in installation environments with abundant dust and other obstructions.

[0229] The second method, as shown in Figure 26, involves a portion of the first dielectric layer 19 corresponding to at least one leakage channel 15 with a thickness less than the thickness of the rest of the portion. In practical applications, removing a portion of the thickness of the first dielectric layer 19 corresponding to the leakage channel 15 can reduce the obstruction of the portion of the dielectric layer 14 corresponding to the leakage channel 15 from the dopant on the side away from the semiconductor substrate 11, allowing it to diffuse through the leakage channel 15 to the opposite side of the dielectric layer 14. This reduces the risk of hot spots in the back contact battery and allows the remaining thickness of the first dielectric layer 19 at the leakage channel 15 to control the dopant diffusion range. This, in turn, controls the docking area of ​​the direct or indirect electrical connection region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, ultimately regulating the reverse breakdown voltage and leakage loss of the back contact battery and improving the applicability of the back contact battery provided in this embodiment under different application scenarios.

[0230] In this second scenario, the thickness of the portion of the first dielectric layer corresponding to at least one leakage channel is defined as H1, and the thickness of the portion of the first dielectric layer not corresponding to a leakage channel is defined as H2. The range of the ratio of H1 to H2 can be determined based on the reverse breakdown voltage and leakage loss of the back contact battery in the actual application scenario, and is not specifically limited here. For example, the ratio between H1 and H2 can be greater than 0 and less than or equal to 0.5. This prevents the remaining thickness of the first dielectric layer at the leakage channel from being too large due to a large ratio of H1 to H2, which would result in a high resistance for the first doped semiconductor layer and the second doped semiconductor layer to achieve electrical connection through the leakage channel. This helps reduce the transmitted heat power at the leakage channel when the back contact battery is blocked, thereby reducing the risk of hot spots on the back contact battery.

[0231] The third approach involves a first dielectric layer with a lower density corresponding to the leakage channel compared to the rest of the dielectric layer. This provides another example of how the first dielectric layer can be positioned at the leakage channel. In this case, the lower density of the portion of the first dielectric layer corresponding to the leakage channel results in lower compactness. This reduces the obstruction to the diffusion of dopants from the semiconductor substrate to the opposite side of the dielectric layer via the leakage channel, thereby reducing the risk of hot spots on the back contact battery. The density of the portion of the first dielectric layer corresponding to the leakage channel, as well as the density of the rest of the dielectric layer, can be determined based on the requirements for reverse breakdown voltage and leakage loss of the back contact battery in the actual application scenario; no specific limitations are imposed here.

[0232] Regarding the leakage channels within the first dielectric section, their number and size affect the proportion of the reverse leakage region in the third region, thus influencing the reverse breakdown voltage and leakage loss of the back contact battery. Therefore, the number and size of the leakage channels within the first dielectric section can be determined based on the actual application scenario, and no specific limitations are made here. The first dielectric section may contain only one leakage channel or multiple leakage channels. Furthermore, the specific meaning of the leakage channel's size can be determined based on its specific morphology, and no specific limitations are made here. Generally, the size of the leakage channel refers to the cross-sectional dimension perpendicular to the direction from the first doped semiconductor layer to the second doped semiconductor layer. For example, when the cross-sectional shape of the leakage channel is circular, the size can be the radius or diameter of the circle. Similarly, when the cross-sectional shape of the leakage channel is square, the size can be the side length of the square. Moreover, besides circles and squares, the cross-sectional shape of the leakage channel can also be elliptical, triangular, rhomboid, trapezoidal, parallelogram, or rectangular, etc.

[0233] For example, the total size of the leakage channel can be greater than or equal to 50 μm and less than or equal to 200 μm. For instance, the total size of the leakage channel can be 50 μm, 60 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, or 200 μm, etc. (It should be noted that when only one leakage channel is formed in the first dielectric portion, the total size of the leakage channel is the size of a single leakage channel. When multiple leakage channels are formed in the first dielectric portion, the total size of the leakage channel is the sum of the sizes of the multiple leakage channels.) When the back contact battery provided in this embodiment is installed in an environment with few obstructions such as bird droppings, leaves, or dust, the total size of the leakage channel can be set to a smaller range to reduce the proportion of the reverse leakage area between the first and second areas, thereby further reducing the leakage loss of the back contact battery in the positive voltage region and ensuring that the back contact battery has high operating efficiency. When the back contact battery provided in this embodiment is installed in an environment with many obstructions such as bird droppings, leaves, or dust, the total size of the leakage channel can be set within a larger range to increase the proportion of the reverse leakage area between the first and second regions. This helps to reduce the reverse breakdown voltage of the back contact battery and ensures that the back contact battery has a lower risk of hot spots. However, an excessively large total size of the leakage channel can easily lead to localized overheating and affect the hot spot prevention effect, especially when there is only one leakage channel. Therefore, controlling the total size of the leakage channel within the above-mentioned range helps to improve the hot spot resistance of the back contact battery. Thus, the total size of the leakage channel can be set according to different environmental requirements, improving the applicability of the back contact battery provided in this embodiment in different practical application scenarios. The size of a single leakage channel refers to the distance between two points on the edge of the leakage channel along a certain direction; usually, the largest dimension is chosen. The total size of the leakage channel is the sum of the sizes of the leakage channels obtained along the same direction.

[0234] For example, when multiple leakage channels are provided within the first dielectric portion, the size of at least one leakage channel is greater than or equal to 5 μm and less than or equal to 80 μm. For instance, when multiple leakage channels are provided within the first dielectric portion, the size of at least one leakage channel can be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, or 80 μm, etc. This improves the applicability of the back contact battery provided in this application embodiment under different practical application scenarios. The application principle of the beneficial effects in this case can refer to the application principle of the beneficial effects described above when the total size of the leakage channels is greater than or equal to 50 μm and less than or equal to 200 μm, and will not be repeated here. Furthermore, reducing the size of a single leakage channel can avoid single-point overheating and enhance the risk resistance of the back contact battery; multiple points can ensure timely and effective dispersion of leakage current, ensuring that the back contact battery has a lower risk of hot spots.

[0235] In addition, when multiple leakage channels are provided in the first dielectric section, the distribution of different leakage channels will affect the distribution density of the reverse leakage area in the third region and the degree of dispersion of the reverse leakage area in the third region, thereby affecting the burn-proof capability and working efficiency of the back contact battery. Therefore, the distribution of different leakage channels can be determined according to the requirements of the back contact battery in the actual application scenario. No specific limitation is made here.

[0236] For example, when multiple leakage channels are provided within the first dielectric section, the spacing between two adjacent leakage channels can be greater than or equal to 1 μm and less than or equal to 200 μm. For instance, the spacing between two adjacent leakage channels can be 1 μm, 5 μm, 10 μm, 20 μm, 50 μm, 80 μm, 100 μm, 150 μm, or 200 μm, etc. The spacing between two adjacent leakage channels is the distance between the edges of the two adjacent leakage channels that are close to each other; typically, the shortest distance is selected as the spacing. It is understood that, with a fixed size of the leakage channels, the distance between the geometric centers of two adjacent leakage channels is inversely proportional to the distribution density of the leakage channels within the first dielectric section; the spacing between two adjacent leakage channels is also inversely proportional to the distribution density of the leakage channels within the first dielectric section. The distribution density of the leakage channels within the first dielectric section is approximately proportional to the leakage loss of the back contact battery in the forward voltage region and inversely proportional to the reverse breakdown voltage of the back contact battery. Based on this, when the back contact battery provided in this embodiment is installed in an environment with few obstructions such as bird droppings, leaves, or dust, the geometric center distance between two adjacent leakage channels or the distance between two adjacent leakage channels can be set to a larger range to reduce the proportion of the reverse leakage area between the first and second areas. This helps to further reduce the leakage loss of the back contact battery in the forward voltage region and ensures that the back contact battery has high operating efficiency. Conversely, when the back contact battery provided in this embodiment is installed in an environment with many obstructions such as bird droppings, leaves, or dust, the geometric center distance between two adjacent leakage channels or the distance between two adjacent leakage channels can be set to a smaller range to increase the proportion of the reverse leakage area between the first and second areas. This helps to reduce the reverse breakdown voltage of the back contact battery and ensures that the back contact battery has a lower risk of hot spots. In addition, controlling the distance between the geometric centers of two adjacent leakage channels or the distance between two adjacent leakage channels can also control the distance between two adjacent heat-generating points. By adjusting the distance, the heat-generating points are dispersed, avoiding overlap and preventing local overheating. Therefore, the geometric center distance or the spacing between two adjacent leakage channels can be set according to different environmental requirements, thereby improving the applicability of the back contact battery provided in this application embodiment in different practical application scenarios.

[0237] Secondly, when multiple leakage channels are provided within the first dielectric section, the spacing between any two adjacent leakage channels can be equal or unequal. When the spacing between any two adjacent leakage channels is equal, the spacing between adjacent leakage points between the first and second doped semiconductor layers in the stacked structure is also equal. This facilitates a uniform distribution of the reverse leakage region in the third region, thereby promoting the dispersion of the heat-generating area and preventing the back contact battery from burning out due to localized heat concentration. This further improves the back contact battery's resistance to burnout and effectively enhances its safety performance.

[0238] For example, the minimum distance between the leakage channel and the edge of the first dielectric portion can be greater than or equal to 5 μm and less than or equal to 50 μm. For instance, the minimum distance between the leakage channel and the edge of the first dielectric portion can be 5 μm, 10 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, or 50 μm, etc. In actual manufacturing, etching processes such as laser etching or wet etching can be used to set the leakage channel within the first dielectric portion. Therefore, specifying the minimum distance range can prevent damage to the portion of the first doped semiconductor layer near the third region and / or the portion of the second doped semiconductor layer near the third region during the leakage channel fabrication process due to the leakage channel being too close to the edge of the first dielectric portion, thus affecting carrier collection and consequently battery efficiency. It can also prevent a low distribution density of the leakage channel within the first dielectric portion due to a large minimum distance, ensuring that the reverse leakage region has a certain proportion in the third region and guaranteeing a low risk of hot spots in the back contact battery. Furthermore, in the actual manufacturing process, the minimum distance between the leakage channel and the edge of the first dielectric portion is within the aforementioned range. This prevents the etching process from easily affecting other structures near the edge of the first dielectric portion due to a small minimum distance. For example, when using laser etching to form the leakage channel, it prevents the high-temperature laser from damaging the portion of the first doped semiconductor layer in the first region near the third region and / or the portion of the second doped semiconductor layer in the second region near the third region. This ensures that the first doped semiconductor layer in the first region and the second doped semiconductor layer in the second region have high carrier collection capabilities, further improving the working performance of the back contact battery. Additionally, it prevents a low distribution density of the leakage channel within the first dielectric portion due to a large minimum distance, ensuring that the reverse leakage region has a certain proportion in the third region and guaranteeing a low risk of hot spots for the back contact battery.

[0239] As for the specific distribution of leakage current channels between the first and second regions, it can be determined based on the shape of the first and second regions and the actual application scenario; no specific limitations are made here.

[0240] As shown in Figures 33 and 34, in a single stacked structure, the leakage channels 15 are continuously distributed along the extension direction of the stacked structure. This facilitates increasing the contact area of ​​the electrical connection region between the first doped semiconductor layer and the second doped semiconductor layer through the leakage channels 15, thereby increasing the area ratio of the reverse leakage region on the first side and further improving the burn-out resistance of the back contact battery. Furthermore, when the leakage channels 15 are continuously distributed along the extension direction of the stacked structure in a single stacked structure, the size of the leakage channel 15 refers to its width along the direction from the first region 16 to the second region 17. For example, when the first region 16 and the second region 17 are arranged in a strip-like interval, the size of the leakage channel 15 is the width of the leakage channel 15 along the distribution direction of the different finger-like regions 220. As another example, when the first region 16 and the second region 17 are arranged in an interdigitated interval, the size of the leakage channel 15 is the width of the leakage channel 15 along the direction from the first region 16 to the second region 17. Exemplarily, the size of the leakage channel can be greater than or equal to 50 μm and less than or equal to 200 μm. For example, the size of the leakage current channel can be 50μm, 60μm, 70μm, 80μm, 100μm, 120μm, 150μm or 200μm, etc.

[0241] Alternatively, as shown in Figures 31, 32, and 35, multiple leakage channels 15 can be spaced apart within the first dielectric section of a single stacked structure. Compared to a continuous distribution of leakage channels 15, the portion of the first dielectric section at the intervals between adjacent leakage channels 15 has an insulating or semi-insulating effect, electrically isolating the first doped semiconductor layer and the second doped semiconductor layer with opposite conductivity types. Therefore, compared to a continuous distribution of leakage channels, when multiple leakage channels are spaced apart within the first dielectric section of a single stacked structure, it is beneficial to reduce the contact area of ​​the electrical connection region between the first doped semiconductor layer and the second doped semiconductor layer through the leakage channels 15, thereby reducing the area ratio of the reverse leakage region on the first surface and further improving the working performance of the back contact battery. In addition, this arrangement also helps to disperse the leakage current and heat points more effectively, preventing burn-out problems due to local heat concentration and further improving the burn-out resistance of the back contact battery. The spacing direction of the different leakage channels 15 within the first dielectric section of a single stacked structure can be set according to actual needs and is not specifically limited here. For example, the spacing of different leakage channels 15 provided in the first dielectric section of a single stacked structure can be parallel to the extension direction of the stacked structure, parallel to the direction from the first region 16 to the second region 17, or parallel to the diagonal direction of the third region 18, etc.

[0242] For example, as shown in FIG27, when the first region 16 and the second region 17 are distributed in alternating stripes, the orthographic projection of the leakage channel 15 on the first surface is located between the finger-shaped area 220 included in the first region 16 and the adjacent finger-shaped area 220 included in the second region 17.

[0243] For example, when the first and second regions are interdigitated, as shown in FIG28, the leakage path may include at least one first leakage path 222, the orthographic projection of the first leakage path 222 on the first surface being located between the finger-shaped areas 220 included in the first region 16 and the adjacent finger-shaped areas 220 included in the second region 17. And / or, as shown in FIG28, the leakage path may also include at least one second leakage path 223, the orthographic projection of the second leakage path 223 on the first surface being located between the connection area 221 included in one of the first regions 16 and the finger-shaped areas 220 included in the other. And / or, as shown in FIG28, the leakage path may further include at least one third leakage path 224; along the extension direction of the diagonal of the finger-shaped areas 220, the orthographic projection of the third leakage path 224 on the first surface being located between the apex corner of the finger-shaped areas 220 included in one of the first regions 16 and the second region 17 and the other. When the first region 16 and the second region 17 are interdigitated, the location of the leakage channel between the first region 16 and the second region 17 has at least three of the above-mentioned optional examples. This is beneficial to improving the applicability of the back contact battery provided in this application embodiment in different application scenarios. Furthermore, it eliminates the need for strict control of manufacturing precision or additional operational steps to form a leakage channel at a fixed location, thus reducing the manufacturing difficulty of the back contact battery and simplifying the manufacturing process. (It should be noted that, in order to illustrate the possible distribution of the leakage channel on one side of the first surface using a limited number of figures, Figures 27 and 28 both show multiple possible distribution positions of the leakage channel in the same figure. This does not mean that in actual application, the leakage channel will necessarily be set in multiple possible distribution positions shown in the figure simultaneously.)

[0244] In the case where the first and second regions are interdigitated, when the leakage channel includes at least one first leakage channel, because the length of the finger-shaped area is greater than its width along the first direction, the range of the first leakage channel positioned between the finger-shaped areas included in the first region and the adjacent finger-shaped areas included in the second region along the first direction is relatively large. Furthermore, the distance between the short side and apex of the finger-shaped area included in one of the first and second regions and the connection area included in the other is relatively small, making it easier to manufacture conductive material at the second and third leakage channels. Compared to the distance between the lengths of two adjacent finger-shaped areas, and the distance between the finger-shaped area and the adjacent connection area spaced apart from itself, the distance between the apex of the finger-shaped area included in one of the first and second regions in the diagonal extension direction and the other is relatively large. The width between the apex of the finger-shaped area included in one of the first and second regions and the other in the stacked structure is also relatively large, allowing for the provision of a third leakage channel with a larger cross-sectional area along the direction parallel to the first surface. In other words, the cross-sectional area of ​​the third leakage channel along the direction parallel to the first surface can be larger than the cross-sectional areas of the first leakage channel and / or the second leakage channel along the direction parallel to the first surface. A larger leakage channel can be set on a wider stacked structure. While ensuring the back-contact battery has a low reverse breakdown voltage, it is not necessary to set a larger first leakage channel and / or second leakage channel at the spacing to increase the proportion of the reverse leakage region on the first surface side. This reduces manufacturing complexity and improves the yield of the back-contact battery.

[0245] Of course, the cross-sectional area of ​​the third leakage channel along the direction parallel to the first surface can also be less than or equal to the cross-sectional area of ​​the first leakage channel and / or the second leakage channel along the direction parallel to the first surface.

[0246] For example, as shown in Figures 29 and 30, as described above, in the stacked structure including a first doped semiconductor layer and a second doped semiconductor layer, where the one closer to the semiconductor substrate is the first doped semiconductor layer, at least a portion of the first region 16 and the third region 18 constitute a rectangular region; or, in the stacked structure including a first doped semiconductor layer and a second doped semiconductor layer, where the one closer to the semiconductor substrate is the second doped semiconductor layer, at least a portion of the second region 17 and the third region 18 constitute a rectangular region. Each rectangular region has at least two first sides extending in a first direction (i.e., the long side of the rectangular region). Each rectangular region has at least two second sides extending in a second direction (i.e., the short side of the rectangular region); the first direction is parallel to the direction of extension of the long side of the rectangular region, and the second direction is parallel to the direction of extension of the short side of the rectangular region. Furthermore, in each rectangular region, at least the first side and the adjacent second side form the apex of the rectangular region. (Whereinafter, when the rectangular region is a regular rectangular region with a right angle at its apex, the apex of the rectangular region is formed by connecting only the first side and the adjacent second side of a single rectangular region; while when the rectangular region is a rectangular region with a chamfer, the apex of the rectangular region is formed by connecting the first side, the adjacent second side, and the adjacent chamfer side of a single rectangular region.) It is understood that a stacked structure is provided at the third region 18, and a first dielectric portion having a leakage path is provided between the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure. Based on this, when at least a portion of the first region 16 and the third region 18 constitute a rectangular region, the leakage path is provided within the range of the rectangular region corresponding to the third region 18. Alternatively, when at least a portion of the second region 17 and the third region 18 constitute a rectangular region, the leakage path is provided within the range of the rectangular region corresponding to the third region 18.

[0247] In the above case, the leakage current path may include at least one first leakage current path 222, which is disposed at at least one first side of the rectangular area along a first direction; and / or, the leakage current path may also include at least one second leakage current path 223, which is disposed at at least one second side of the rectangular area along a second direction.

[0248] Secondly, the leakage current path may also include at least one third leakage current path 224, which is disposed at at least one apex corner of the rectangular area.

[0249] Therefore, the location of the leakage channel in the rectangular area has at least three possible examples, which helps to improve the applicability of the back contact battery provided in this application embodiment in different application scenarios. It also eliminates the need to strictly control manufacturing precision or add extra operation steps in order to form a leakage channel in a fixed position, which helps to reduce the manufacturing difficulty of the back contact battery and simplify the manufacturing process of the back contact battery.

[0250] The leakage current path may include at least one of the first, second, and third leakage current paths, or any two, or all three. The specific location of the leakage current path can be determined based on the distribution of the first, second, and third regions. (It should be noted that, in order to illustrate the possible distribution of the leakage current path on one side of the first surface using a limited number of attached figures, Figures 29 and 30 show multiple possible distribution locations of the leakage current path in the same attached figure. This does not mean that in actual application, the leakage current path will necessarily be set in multiple possible distribution locations shown in the figure simultaneously.)

[0251] The following example illustrates the concept of a rectangular area formed by at least a portion of the first region and the third region:

[0252] For example, as shown in Figure 29, when the rectangular area formed by the entire area of ​​the first region 16 and the third region 18 is distributed in a strip-like alternating pattern with a portion of the second region 17, the leakage current channel may include at least one first leakage current channel 222, and / or, at least one leakage current channel may include at least one third leakage current channel 224.

[0253] For example, as shown in Figure 30, when the rectangular area formed by a portion of the first region 16 and the third region 18, the remaining area of ​​the first region 16, and a portion of the second region 17 are distributed in an alternating, interdigitated pattern, the leakage current channel may include at least one first leakage current channel 222, and / or, the leakage current channel may include at least one second leakage current channel 223, and / or, the leakage current channel may also include at least one third leakage current channel 224.

[0254] It is worth noting that, as shown in Figures 29 and 30, when the leakage path includes at least one first leakage path 222, since the length of the rectangular area is greater than its width along the first direction, the range for the first leakage path 222 at the long side of the rectangular area is relatively large. Furthermore, it is easier to fabricate conductive material at the short side and apex of the rectangular area at the second leakage path 223 and the third leakage path 224. Secondly, compared to the distance between the long side and the electrode, and the distance between the short side and the electrode, the distance between the apex of the rectangular area and the electrode is larger. In this case, a third leakage path 224 with a larger cross-sectional area along the direction parallel to the first surface can be provided. In other words, the cross-sectional area of ​​the third leakage path 224 along the direction parallel to the first surface can be larger than the cross-sectional areas of the first leakage path 222 and / or the second leakage path 223 along the direction parallel to the first surface. In this way, a large-section leakage channel can be set on a wide stacked structure. While ensuring that the back-contact battery has a low reverse breakdown voltage, it is not necessary to set a large-section first leakage channel 222 and / or second leakage channel 223 at the spacing position in order to increase the proportion of the reverse leakage area on the first side. This reduces the process difficulty and helps to improve the yield of the back-contact battery.

[0255] Of course, the cross-sectional area of ​​the third leakage channel along the direction parallel to the first surface can also be less than or equal to the cross-sectional area of ​​the first leakage channel and / or the second leakage channel along the direction parallel to the first surface.

[0256] Additionally, it should be noted that, as mentioned earlier, when at least a portion of one of the first and second regions forms a rectangular area with the third region, as shown in Figure 33, the third region 18 can be located between all regions of the first region 16 and all regions of the second region 17, in which case the first region 16 and the second region 17 are distributed in a strip-like interval. Alternatively, the third region 18 can also be located between only a portion of the first region 16 and only a portion of the second region 17, in which case the distribution of the first region 16 and the second region 17 can be set according to actual needs; for example, the first and second regions can be distributed in a strip-like interval or in an interdigitated interval.

[0257] Optionally, embodiments of this application provide a method for manufacturing a back contact battery. The method for manufacturing the back contact battery includes the following steps:

[0258] First, a semiconductor substrate is provided. The semiconductor substrate has a first surface and a second surface. The first surface includes a first region and a second region spaced apart, and a third region located between the first region and the second region. The material and conductivity type of the semiconductor substrate, as well as the distribution of the first region, the second region, and the third region on the first surface, can be referred to the preceding text and will not be repeated here.

[0259] Next, a first doped semiconductor layer is formed on the first region and the third region.

[0260] For example, an intrinsic semiconductor layer can be formed entirely on one side of the first surface using processes such as chemical vapor deposition. Then, a doping process such as diffusion or ion implantation can be used to dope the intrinsic semiconductor layer to form a first doped semiconductor layer. It should be noted that when the material of the first doped semiconductor layer includes silicon and a diffusion process is used to form the first doped semiconductor layer, a doped silicon glass layer is also formed on the side of the first doped semiconductor layer facing away from the semiconductor substrate after its formation. Furthermore, in actual manufacturing processes, in other cases, if the doped silicon glass layer is not formed after the formation of the first doped semiconductor layer, a mask layer needs to be formed on the side of the first doped semiconductor layer facing away from the semiconductor substrate using processes such as chemical vapor deposition. Then, selective etching of the doped silicon glass layer or mask layer can be performed using processes such as laser etching to remove portions of the doped silicon glass layer or mask layer located in the second region (or portions corresponding to a local area of ​​the first region and a portion of the second region, or portions corresponding to the second and third regions; or portions corresponding to the second, third, and fourth regions; or portions corresponding to a local area of ​​the first region, a portion of the second and third regions; or portions corresponding to a local area of ​​the first region, a portion of the second, third, and fourth regions). Next, under the protection of the doped silicon glass layer or mask layer, the first doped semiconductor layer covering the region of the undoped silicon glass layer or mask layer is removed.

[0261] It should be noted that if the dielectric layer does not include a doped silicon glass layer or a mask layer, the doped silicon glass layer or mask layer must be removed before forming the second doped semiconductor layer.

[0262] Furthermore, if the manufactured back contact battery also includes a first interface passivation layer, the first interface passivation layer needs to be formed on one side of the first surface before forming the first doped semiconductor layer. Then, after forming the entire first doped semiconductor layer on the first interface passivation layer, selective etching of the first interface passivation layer and the first doped semiconductor layer can be achieved based on the same doped silicon glass layer or mask layer. Alternatively, the first interface passivation layer can be selectively etched separately using a corresponding mask before forming the first doped semiconductor layer.

[0263] Next, a dielectric layer is formed on at least a portion of the third region corresponding to the first doped semiconductor layer.

[0264] For example, when the dielectric layer is formed by a doped silicon glass layer or a mask layer, a process with etching effect, such as laser etching or wet etching, can be used to create a leakage channel within the first dielectric portion. However, if the dielectric layer includes not only a doped silicon glass layer or mask layer but also other dielectric film layers, or if the dielectric layer does not include a doped silicon glass layer or mask layer, a process such as chemical vapor deposition is required to form a continuous dielectric layer on the first doped semiconductor layer and the second region. Then, an etching process such as laser etching is used to remove the portion of the dielectric layer that does not correspond to the third region, while simultaneously creating a leakage channel within the first dielectric portion included in the dielectric layer.

[0265] Next, a second doped semiconductor layer is formed on the second and third regions. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. In the third region, the first and second doped semiconductor layers are overlapped along the thickness direction of the semiconductor substrate to form a stacked structure. A dielectric layer is disposed along the thickness direction of the semiconductor substrate between the first and second doped semiconductor layers, forming a first dielectric portion. At least one leakage channel is provided within the first dielectric portion of the dielectric layer. In the third region, and along the direction from the first region to the second region, the width of the first dielectric portion is greater than or equal to the width of the first and second doped semiconductor layers in the stacked structure that are furthest from the semiconductor substrate.

[0266] For example, a process such as chemical vapor deposition (CVD) can be used to form an intrinsic semiconductor layer integrally disposed on at least the first doped semiconductor layer and the second region. Then, a doping process such as diffusion or ion implantation can be used to dope the intrinsic semiconductor layer to form a second doped semiconductor layer. Next, a mask layer needs to be formed on the side of the second doped semiconductor layer away from the semiconductor substrate using a process such as CVD (if a doped silicon glass layer is formed on the side of the second doped semiconductor layer away from the semiconductor substrate after its formation, and the doped silicon glass layer can be used as the mask layer, then there is no need to form an additional mask layer using CVD). Then, a process such as laser etching can be used to selectively etch the mask layer to remove the portion of the mask layer located in the first region (or the portion of the second doped semiconductor layer covering the first doped semiconductor layer corresponding to the first region and the portion covering the fourth region). Next, under the protection of the mask layer, at least the portion of the second doped semiconductor layer corresponding to the first region is removed (if the second doped semiconductor layer is not formed on the fourth region, then the portion of the second doped semiconductor layer corresponding to the fourth region also needs to be removed). Finally, processes such as wet etching can be used to remove the mask layer.

[0267] It should be noted that if the manufactured back contact battery also includes a second interface passivation layer, a second interface passivation layer that is integrally formed in the first doped semiconductor layer and the second region needs to be formed before forming the second doped semiconductor layer. Then, after forming the integrally formed second doped semiconductor layer on the second interface passivation layer, selective etching of the second interface passivation layer and the second doped semiconductor layer can be achieved using the same mask layer. Alternatively, the second interface passivation layer can be selectively etched separately using a corresponding mask before forming the second doped semiconductor layer.

[0268] Secondly, embodiments of this application provide a photovoltaic module, which includes a battery string and an encapsulation layer. The battery string is formed by connecting multiple back-contact batteries as provided in the first aspect and its various implementations. The encapsulation layer is used to cover the surface of the battery string.

[0269] The beneficial effects of the second aspect and its various implementations in the embodiments of this application can be found by referring to the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0270] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0271] The embodiments of this application have been described above. However, these embodiments are merely for clarity and are not intended to limit the scope of this application. The scope of this application is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this application, and all such substitutions and modifications should fall within the scope of this application. Unless there are technical obstacles or contradictions, the various technical features disclosed in this application can be freely combined to form other embodiments, and all such other embodiments are within the protection scope of this application.

Claims

1. A back-contact battery, wherein, include: A semiconductor substrate having opposing first and second surfaces; The first surface includes a first region and a second region that are spaced apart, and a third region located between the first region and the second region; A first doped semiconductor layer is disposed on the first region and the third region; A second doped semiconductor layer is disposed on the second region and the third region; wherein the doping types of the first doped semiconductor layer and the second doped semiconductor layer are opposite; on the third region, the first doped semiconductor layer and the second doped semiconductor layer are overlapped along the thickness direction of the semiconductor substrate to form a stacked structure; A dielectric layer is disposed at least between the first doped semiconductor layer and the second doped semiconductor layer; at least one leakage current channel is disposed within the dielectric layer.

2. The back contact battery according to claim 1, wherein, The thickness of the portion of the dielectric layer without the leakage channel is greater than or equal to 13 nm.

3. The back contact battery according to claim 2, wherein, The dielectric layer is interrupted at the leakage current channel; Alternatively, the thickness of the portion of the dielectric layer in which the leakage channel is located is less than or equal to 7 nm.

4. The back contact battery according to claim 1, wherein, The first doped semiconductor layer and the second doped semiconductor layer are connected through the dielectric layer.

5. The back contact battery according to claim 2, wherein, The back contact battery further includes a third doped semiconductor portion located between the first doped semiconductor layer and the second doped semiconductor layer, the third doped semiconductor portion being connected to the first doped semiconductor layer and the second doped semiconductor layer respectively.

6. The back contact battery according to claim 5, wherein, The material of the third doped semiconductor portion includes at least one doping element; the doping type of the third doped semiconductor portion is the same as the doping type of one of the first doped semiconductor layer and the second doped semiconductor layer, and the doping concentration of the doping element in the third doped semiconductor portion is less than the doping concentration of the doping element in one of the first doped semiconductor layer and the second doped semiconductor layer that has the same doping type as the third doped semiconductor portion.

7. The back contact battery according to claim 5, wherein, The dielectric layer is disposed between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer through the dielectric layer having the leakage current channel.

8. The back contact battery according to claim 7, wherein, The portion of the third doped semiconductor near the dielectric layer is doped with at least one group IIIA doping element and at least one group VA doping element.

9. The back contact battery according to claim 5, wherein, The mating surface of the connection region between the third doped semiconductor portion and the first doped semiconductor layer and / or the mating surface of the connection region between the third doped semiconductor portion and the second doped semiconductor layer forms an angle of less than 90° with the first surface of the semiconductor substrate.

10. The back contact battery according to claim 5, wherein, The size of the grains in the third doped semiconductor section is smaller than the size of the grains in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure.

11. The back contact battery according to claim 1, wherein, In the stacked structure, where the first doped semiconductor layer and the second doped semiconductor layer are closer to the semiconductor substrate and the first doped semiconductor layer is the first doped semiconductor layer, the surface of the third region is higher than the surface of the second region in the direction from the second surface to the first surface. The dielectric layer further extends at least between the sidewall of the third region transitioning to the second region and the second doped semiconductor layer; Alternatively, if the stacked structure includes a first doped semiconductor layer and a second doped semiconductor layer, and the one closer to the semiconductor substrate is the second doped semiconductor layer, then the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface. The dielectric layer also extends at least between the sidewall of the third region transitioning to the first region and the first doped semiconductor layer.

12. The back contact battery according to claim 1, wherein, The size of the leakage channel is greater than or equal to 12 nm.

13. The back contact battery according to claim 1, wherein, A dielectric layer is disposed between a portion of the first doped semiconductor layer and the first region included in the first surface, and at least one leakage channel is disposed in the portion of the dielectric layer corresponding to the first region. And / or, a dielectric layer is disposed between a portion of the second doped semiconductor layer and the second region included in the first surface, and at least one leakage channel is disposed in the portion of the dielectric layer corresponding to the second region.

14. The back contact battery according to any one of claims 1 to 13, wherein, The stacked structure includes a first doped semiconductor layer and a second doped semiconductor layer, wherein the one closer to the semiconductor substrate has a top surface away from the semiconductor substrate, a bottom surface close to the semiconductor substrate, and a side surface connecting the bottom surface and the top surface, and the other one away from the semiconductor substrate covers a portion of the top surface and a portion of the side surface of the one closer to the semiconductor substrate. The dielectric layer has a first dielectric portion and a second dielectric portion; The first dielectric portion is disposed between the top surface of the semiconductor substrate and the surface of the semiconductor substrate that is far from the semiconductor substrate; the second dielectric portion is disposed between the side surface of the semiconductor substrate and the surface of the semiconductor substrate that is far from the semiconductor substrate.

15. The back contact battery according to claim 14, wherein, At least one of the leakage current channels is located within the first dielectric portion; and / or, At least one of the leakage current channels is located within the second dielectric portion; and / or, At least one of the leakage current channels is located between the first dielectric portion and the second dielectric portion.

16. The back contact battery according to claim 1, wherein, The portion of the dielectric layer disposed between the first doped semiconductor layer and the second doped semiconductor layer along the thickness direction of the semiconductor substrate is the first dielectric portion; In the dielectric layer, at least one leakage channel is provided in the first dielectric portion; in the third region, and along the direction from the first region to the second region, the width of the first dielectric portion is greater than or equal to the width of the first doped semiconductor layer and the second doped semiconductor layer of the stacked structure that is farther away from the semiconductor substrate.

17. The back contact battery according to claim 16, wherein, In a single stacked structure, the leakage current channels are continuously distributed along the extending direction of the stacked structure; Alternatively, a plurality of leakage current channels are provided in the first dielectric portion of a single stacked structure at intervals.

18. The back contact battery according to claim 16, wherein, The first dielectric portion penetrates at least one of the leakage channels; Alternatively, the thickness of the portion of the first dielectric part corresponding to at least one of the leakage channels is H1, and the thickness of the portion of the first dielectric part not corresponding to the leakage channels is H2, wherein the ratio of H1 to H2 is greater than 0 and less than or equal to 0.

5.

19. The back contact battery according to any one of claims 1 to 18, wherein, The back contact battery further includes a first electrode and a second electrode, wherein the first electrode is electrically connected to the first doped semiconductor layer, and the second electrode is electrically connected to the second doped semiconductor layer.

20. A photovoltaic module, wherein, The photovoltaic module includes: A battery string, wherein the battery string is formed by connecting a plurality of back-contact batteries as described in any one of claims 1 to 19; And an encapsulation layer for covering the surface of the battery string.

21. A method for manufacturing a back contact battery, wherein, include: Provide a semiconductor substrate; The semiconductor substrate has a first surface and a second surface; the first surface includes a first region and a second region spaced apart, and a third region located between the first region and the second region; A first doped semiconductor layer is formed on the first region and the third region; A dielectric layer is formed at least on a portion of the first doped semiconductor layer corresponding to the third region; A second doped semiconductor layer is formed on the second region and the third region; wherein the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types; on the third region, the first doped semiconductor layer and the second doped semiconductor layer are overlapped along the thickness direction of the semiconductor substrate to form a stacked structure; wherein at least one leakage channel is provided in the dielectric layer.

22. The method for manufacturing a back contact battery according to claim 21, wherein, The portion of the dielectric layer disposed between the first doped semiconductor layer and the second doped semiconductor layer along the thickness direction of the semiconductor substrate is the first dielectric portion; In the dielectric layer, at least one leakage current channel is provided within the first dielectric portion; In the third region, and along the direction from the first region to the second region, the width of the first dielectric portion is greater than or equal to the width of the one of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is farther from the semiconductor substrate.

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