Memory expansion method, device, system, computer program product, and storage medium

Abstract

Embodiments of the present disclosure provide a memory expansion method, a device, a system, a computer program product, and a storage medium. A target device in a communication system can present itself as a memory device, and is connected to a plurality of servers according to an interconnection protocol supporting memory semantics, such that each server identifies the target device as an external memory device; and each server also hosts some of its own memory resources to the target device. On this basis, the target device can receive a memory expansion request sent by any server, select from among the hosted memory resources a target memory resource meeting a memory expansion requirement, and can also construct an access path for supporting the server to access the target memory resource according to the memory semantics. Accordingly, on the basis of the target device, servers can borrow memories from each other according to the memory semantics, thereby effectively improving the compatibility with various types of servers.

Description

A method, apparatus, system, computer program product, and storage medium for memory expansion. Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a memory expansion method, device, system, computer program product, and storage medium. Background Technology

[0002] With the continuous development of technologies such as cloud computing and edge computing, servers in Internet Data Centers (IDCs) often need to expand their memory to ensure computing performance.

[0003] Currently, the common method for expanding server memory is to access the memory of other servers using the Remote Direct Memory Access (RDMA) protocol. This method relies on the RDMA protocol; however, because RDMA is bus-free, it does not support memory semantics, resulting in insufficient server compatibility and making it unsuitable for expanding memory on bare-metal servers. Summary of the Invention

[0004] This disclosure provides a memory expansion method, apparatus, system, computer program product, and storage medium to support memory borrowing between servers according to memory semantics.

[0005] This disclosure provides a memory expansion method applicable to a target device in a communication system. The target device presents itself as a memory device and connects to multiple servers in the communication system according to an interconnection protocol supporting memory semantics. A portion of the memory resources owned by the multiple servers are hosted by the target device. The method includes:

[0006] After receiving a memory expansion request from the first server, determine the memory expansion requirements of the first server, where the first server is any one of the plurality of servers;

[0007] Select target memory resources that meet the memory expansion requirements from the managed memory resources;

[0008] An access path is constructed to support the first server in accessing the target memory resource according to memory semantics, so as to allocate the target memory resource as extended memory for the first server.

[0009] This disclosure also provides a memory expansion method applicable to any one of multiple servers in a communication system. The communication system further includes a target device, which presents itself as a memory device and connects to the multiple servers according to an interconnection protocol supporting memory semantics. A portion of the memory resources owned by the multiple servers are hosted by the target device. The method includes:

[0010] Establish a connection with the target device;

[0011] Using the target device as an external memory device, a memory expansion request is sent to the target device, the memory expansion request containing the memory expansion requirement;

[0012] Extended memory is obtained through the access path established by the target device;

[0013] Wherein, the extended memory is the target memory resource selected by the target device from the managed memory resources that meets the memory extension requirements; the access path is used to support the server to access the target memory resource according to memory semantics.

[0014] This disclosure also provides a communication system including a target device and multiple servers. The target device presents itself as a memory device and is connected to the multiple servers in the communication system respectively. Some of the memory resources owned by the multiple servers are hosted by the target device. The target device and the multiple servers cooperate with each other to execute the aforementioned method to support memory expansion of any of the multiple servers through the hosted memory resources.

[0015] This disclosure also provides an apparatus including a memory, a processor, and a communication component, wherein the apparatus presents itself as a memory device and is connected to multiple servers in a communication system, and some memory resources owned by the multiple servers are hosted by the target apparatus.

[0016] The memory is used to store one or more computer instructions;

[0017] The processor is coupled to the memory and the communication component and is used to execute one or more computer instructions for performing the aforementioned memory expansion method applicable to the target device.

[0018] This disclosure also provides a server, including a memory, a processor, and a communication component. The server is connected to a target device in a communication system. The target device presents itself as a memory device and is connected to multiple servers in the communication system. Some of the memory resources owned by the multiple servers are hosted by the target device.

[0019] The memory is used to store one or more computer instructions;

[0020] The processor is coupled to the memory and the communication component and is used to execute one or more computer instructions for performing the aforementioned memory expansion method applicable to servers.

[0021] This disclosure also provides a computer-readable storage medium for storing a computer program, which, when executed by one or more processors, causes the one or more processors to perform the aforementioned memory expansion method.

[0022] This disclosure also provides a computer program product, including a computer program that, when executed by one or more processors, causes the one or more processors to perform the aforementioned memory expansion method.

[0023] In this embodiment of the disclosure, a target device in a communication system can present itself as a memory device and connect to multiple servers according to an interconnection protocol that supports memory semantics, so that each server recognizes the target device as an external memory device; each server also entrusts a portion of its own memory resources to the target device. Based on this, the target device can receive a memory expansion request from any server and select a target memory resource that meets the memory expansion requirements from its managed memory resources. Furthermore, it can construct an access path to the target memory resource that supports servers accessing it according to memory semantics. Thus, the target device can provide an access path to support memory sharing between servers; for the servers, they can access the memory resources of other servers as if they were accessing local memory through the access path provided by the target device, according to memory semantics. Therefore, based on the target device, it is possible to support memory sharing between servers according to memory semantics, effectively improving compatibility with various types of servers. Attached Figure Description

[0024] The accompanying drawings, which are included to provide a further understanding of this disclosure and form part of this disclosure, illustrate exemplary embodiments of the present disclosure and are used to explain the disclosure, but do not constitute an undue limitation of the disclosure. In the drawings:

[0025] Figure 1 is a schematic diagram of the structure of a communication system provided in an exemplary embodiment of the present disclosure;

[0026] Figure 2a is a logical diagram of a memory expansion scheme provided by an exemplary embodiment of the present disclosure in an exemplary application scenario;

[0027] Figure 2b is a logical diagram of a memory expansion scheme provided by an exemplary embodiment of the present disclosure in another exemplary application scenario;

[0028] Figure 3 is a flowchart illustrating a memory expansion method provided in another exemplary embodiment of this disclosure;

[0029] Figure 4 is a flowchart illustrating another memory expansion method provided in another exemplary embodiment of this disclosure;

[0030] Figure 5 is a schematic diagram of the structure of a target device provided in yet another exemplary embodiment of this disclosure;

[0031] Figure 6 is a schematic diagram of the structure of a server provided in another exemplary embodiment of this disclosure. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this disclosure clearer, the technical solutions of this disclosure will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0033] Before proceeding with a detailed description of the technical solutions provided in the various embodiments of this disclosure, the following is a brief explanation of several technical concepts involved in this disclosure.

[0034] Memory expansion can be understood as a technique to increase the amount of available memory resources on a computer.

[0035] Remote Direct Memory Access (RDMA) is a memory access technology that allows a computer to directly access the memory of another computer without requiring processing by the Central Processing Unit (CPU). RDMA can quickly move data from one computer to the memory of another without affecting the operating system.

[0036] Memory semantics, also known as CPU memory semantics, focuses on how the CPU interacts with memory and how this interaction affects the execution order of instructions, data visibility, and consistency in a program. These semantics define a set of rules that the CPU follows when performing read and write operations, ensuring the correct execution of programs in a multi-threaded, multi-core processor environment.

[0037] In cloud computing and edge computing scenarios, servers within a data center (IDC) frequently require memory expansion to ensure computing performance. However, memory utilization within an IDC is uneven, with some servers exhibiting low utilization. Therefore, servers can share memory to achieve this expansion. As described in the background section, the Remote Memory Access Protocol (RDMA) is currently commonly used to support memory sharing between servers; that is, any server can remotely access the memory of other servers via RDMA.

[0038] During their research, the inventors discovered that the RDMA protocol primarily focuses on direct memory access in network communication, without the need for intervention from the operating system kernel and CPU. Based on this design principle, RDMA is bus-free and therefore does not support memory semantics. Furthermore, using RDMA requires code refactoring of the server's network communication and data transmission code, and also necessitates the server being equipped with a network card that supports RDMA. This severely limits the applicability of RDMA; in many technical scenarios, it cannot be used to enable servers to share memory.

[0039] Therefore, this embodiment proposes a memory expansion method to enable servers to borrow memory from each other according to memory semantics, thereby adapting to various technical scenarios, especially bare metal servers and other technical scenarios that cannot support the RDMA protocol.

[0040] The technical solutions provided by the embodiments of this disclosure are described in detail below with reference to the accompanying drawings.

[0041] Figure 1 is a schematic diagram of the structure of a communication system provided in an exemplary embodiment of this disclosure. As shown in Figure 1, the communication system includes a target device and multiple servers.

[0042] The target device in this embodiment may include a network device or a memory device that supports connecting multiple servers. The network device can refer to a dedicated hardware device used to connect multiple servers to form a communication network. The network device in this embodiment may include, but is not limited to, smart network interface cards (NICs), switches, or smart gateways. The memory device that supports connecting multiple servers can refer to a memory device capable of connecting multiple servers and providing them with shared memory resources, such as a CXL memory device under the Compute Express Link (CXL) protocol. This embodiment does not limit the product implementation form of the target device.

[0043] This embodiment proposes using network devices already deployed in the communication system or memory devices that support connecting multiple servers as the target devices. Based on this, the target devices already deployed in the communication system can be modified to enable them to execute the memory expansion scheme provided in this embodiment. For example, if a smart network interface card (NIC) is already deployed in the communication system (such as an IDC), the NIC can be modified to serve as the target device and execute the memory expansion scheme provided in this embodiment. Similarly, if a CXL switch (referred to as a CXL Switch) and CXL memory boxes are already deployed in the communication system, the CXL Switch can be modified to serve as the target device and execute the memory expansion scheme provided in this embodiment. Thus, this embodiment does not require adding new hardware devices to the communication system; instead, it enables servers to borrow memory according to memory semantics within the communication system without increasing the complexity of the communication system deployment.

[0044] Of course, this is only a preferred option. Without considering the complexity of system deployment, the target device provided in this embodiment can also be added to the communication system, and this is not limited here.

[0045] Referring to Figure 1, the target device in this embodiment can connect to multiple servers in the communication system according to an interconnect protocol that supports memory semantics. In practical applications, the target device can be connected to the server's motherboard via cables or slots to access the server's bus. Here, the physical connection method between the target device and multiple servers is not limited. An interconnect protocol supporting memory semantics is agreed upon between the target device and the servers based on the bus protocol.

[0046] In this embodiment, the target device can present itself as a memory device. Based on this, after the target device connects to the server according to an interconnect protocol that supports memory semantics, the target device can be recognized by the server as an external memory device, and the server can access the extended memory allocated to the target device according to memory semantics. Continuing from the above, in this embodiment where the target device is a network device, the target device originally does not possess the functionality of a memory device. Therefore, this embodiment proposes that the target device can simulate itself as a memory device, so that the server recognizes the target device as an external memory device.

[0047] In this embodiment, the external memory device refers to a memory device connected to the server bus. This type of memory device is independent of the server's main memory (i.e., the memory modules installed on the motherboard). The server can access the external memory device via the bus. Essentially, the external memory device is a bus device. Besides adhering to the bus protocol, the external memory device and the server also agree on an interconnection protocol for memory access. The server can access the memory resources of the external memory device according to the interconnection protocol agreed upon with the external memory device. Continuing from the previous point, if the target device needs to simulate itself as a memory device, it can create the protocol interface required by the interconnection protocol that supports memory semantics to simulate itself as an external memory device. Thus, after the target device in this embodiment connects to the server, the server performs a device discovery operation to discover the target device in this embodiment, and the target device can be recognized by the server as an external memory device.

[0048] In this embodiment, the interconnection protocol between the target device and the server is not limited, as long as it supports memory semantics. For example, the CXL protocol can be used between the target device and the server in this embodiment. The CXL protocol is an open interconnection protocol designed to optimize data interaction between the CPU and accelerators (such as GPUs, FPGAs, AI processors, etc.) and external memory devices by providing a high-speed, low-latency interconnection solution. The CXL protocol defines three types of devices, among which the third type (often referred to as a CXL Type 3 device) refers to a dedicated storage device that can communicate directly with the processor in the server and can use the CXL protocol to achieve low-latency, high-throughput data transmission, providing additional memory resources for the server. Based on this, continuing from the previous point, if the target device needs to simulate itself as a memory device, it can simulate itself as the third type of device in the CXL protocol, namely a CXL Type 3 device.

[0049] Of course, this is just an example. In addition to the CXL protocol, other interconnect protocols that can support memory semantics, whether proposed now or in the future, may also be used in this embodiment. No further examples will be given here.

[0050] During their research, the inventors discovered that after a server recognizes that it has an external memory device, it can send a memory expansion request to the external memory device if memory expansion is needed. Since the target device in this embodiment has been recognized by the server as an external memory device, the server can send a memory expansion request to the target device in this embodiment. Thus, in this embodiment, memory expansion requests issued by the various servers connected to the target device can be routed to the target device.

[0051] In this embodiment, the memory hosting mechanism refers to each server connected to the target device entrusting a portion of its memory resources to the target device. Hosting here can be understood as entrusting the target device with the management and use of the corresponding memory resources.

[0052] The server's own memory resources may include the server's main memory and external memory devices (of course, these external memory devices are those that actually provide additional memory resources to the server, not including the target device in this embodiment). As mentioned earlier, some servers have insufficient memory utilization, resulting in some idle memory resources. To address this, in this embodiment, the server can entrust a portion of its own memory resources to the target device and provide the target device with a description of the entrusted memory resources; the target device can record the memory resource description information to accept the entrustment. This memory resource description information may include the memory access address range corresponding to the idle memory resources to be entrusted in the server's own memory address space, as well as the length of the idle memory to be entrusted. This memory resource description information provides the implementation basis for the target device in this embodiment to manage and use the entrusted memory resources.

[0053] Considering that the memory expansion schemes for any server connected to the target device in the communication system are similar in this embodiment, for ease of description, the first server will be used as an example to describe the memory expansion scheme in detail below. It should be understood that the first server can be any server connected to the target device in the communication system.

[0054] Referring to Figure 1, in this embodiment, after establishing a connection with the target device, the first server can identify the target device as an external memory device. Based on this, when memory expansion is needed, the first server can send a memory expansion request to the target device, which may carry the memory expansion requirement. In this embodiment, the memory expansion requirement may include the required memory length, etc., and is not limited thereto.

[0055] It should be understood that the first server has already identified the target device in this embodiment as an external memory device. Therefore, the first server can initiate a memory expansion request according to the interconnection protocol agreed upon when establishing a connection with the target device. For example, if the interconnection protocol agreed upon between the first server and the target device is the aforementioned CXL protocol, the first server can send a memory expansion request to the target device (which also has a CXL Type 3 interface) through the native CXL.io sub-protocol interface in the CXL protocol. Of course, in this embodiment, a custom software interface can also be designed in the first server to send a memory expansion request to the target device, as long as it can ensure that the target device recognizes the memory expansion request (that is, it can trigger the target device to execute the memory expansion logic in this embodiment). The implementation method of sending the memory expansion request in the first server is not limited here.

[0056] For the target device, the memory expansion logic after receiving the memory expansion request from the first server may include:

[0057] The memory expansion request is parsed to determine the memory expansion requirements of the first server;

[0058] Select target memory resources that meet the memory expansion requirements from the managed memory resources;

[0059] Construct an access path to support the first server in accessing the target memory resource according to memory semantics, so as to allocate the target memory resource as extended memory of the first server.

[0060] It is worth emphasizing that in this embodiment, the memory expansion logic implemented by the target device includes control plane logic and data plane logic. The control plane logic can be executed by the management and control component, while the data plane logic can be executed by the switching component. The management and control component can cooperate with the switching component to complete the memory expansion scheme proposed in this embodiment. The switching component can be deployed within the target device, and the smart network interface card (NIC) can implement the switching component using software, hardware, or a combination of both. Preferably, the switching component can be implemented using hardware such as Application Specific Integrated Circuit (ASIC) chips, Field-Programmable Gate Arrays (FPGAs), Programmable Array Logic (PALs), General Array Logic (GALs), or Complex Programmable Logic Devices (CPLDs). This approach can better improve memory access efficiency during the memory access phase after memory expansion.

[0061] In this embodiment, the management and control component can also be deployed within the target device, which effectively ensures the efficiency of memory expansion. Of course, in this embodiment, the management and control component can also be deployed independently outside the target device as a remote component. For example, in an edge computing scenario, the target device is located in an IDC (which can be understood as an edge cluster), while the management and control component can be deployed within a management and control center (which can be understood as a central cluster). In this embodiment, the deployment location of the management and control component is not limited. When the management and control component is deployed as a remote component of the target device, the switching component in the target device can communicate remotely with the management and control component, and the switching component can use the management and control results generated by the management and control component as needed.

[0062] For example, if the management component is deployed as a remote component of the target device, then for the logical step of "selecting a target memory resource that meets the memory expansion requirements from the managed memory resources" in the above memory expansion logic, the management component can communicate remotely with the switching component: the switching component can submit the memory expansion requirements to the management component; after selecting the target memory resource, the management component can feed back the selection result (i.e., as the management result) to the switching component. It should be understood that this is merely an example; this embodiment does not limit the rules for dividing the control plane logic and data plane logic in the memory expansion logic. The control plane logic and data plane logic only need to cooperate to implement the memory expansion logic in this embodiment. Here, the division and interaction examples of control plane logic and data plane logic are not provided for other logical steps. The following text will not distinguish between the management component and the switching component, but will instead describe the memory expansion logic from the overall perspective of the target device.

[0063] In this embodiment, the server connected to the target device can host some of its memory resources to the target device. During the research process, the inventors discovered that the target device typically also possesses processor and memory resources; therefore, they proposed that the target device can also lend out some of its own memory resources. For example, the target device can also mark some of its own memory resources as hosted memory resources. Thus, in this embodiment, the hosted memory resources can include memory resources hosted by the server connected to the target device, and can also include some memory resources provided by the target device itself. That is, the source device corresponding to the hosted memory resources can include the server connected to the target device, and can also include the target device itself. In this embodiment, the source device refers to the device where the memory resources are located. In this embodiment, the target memory resources selected by the target device for the first server may be distributed across one or more servers, or they may be distributed across the target device itself. Based on the memory resource description information recorded by the target device for the hosted memory resources mentioned above, the target device can accurately determine which server(s) the selected target memory resources are distributed across. In this embodiment, the memory resource description information can be used as a reference basis for selecting target memory resources. In addition, this embodiment does not limit the selection strategy used when selecting target memory resources for the target device, as long as the selected target memory resources meet the memory expansion requirements of the first server. No example of the selection strategy is given here.

[0064] Referring to the memory expansion logic described above, after selecting the target memory resource, the target device can construct an access path to support the first server in accessing the target memory resource according to memory semantics. In this embodiment, one end of the access path can be connected to the bus of the first server, and the other end can be connected to the target memory resource. It should be understood that in this embodiment, there is already a physical channel (cable, etc.) between the target device, the first server, and the source device where the target memory resource is located; therefore, the access path here can be understood as a logical channel.

[0065] It should be understood that in this embodiment, the target device has been identified by the first server as an external memory device, and an interconnection protocol supporting memory semantics has been agreed upon with the first server, making the target device and the first server interconnectable. The target memory resource has been hosted on the target device, and as mentioned above, the target device can manage and use the target memory resource, making the target device and the target memory resource interconnectable as well. Based on this, in this embodiment, the target device can construct the aforementioned access path based on its connectivity with the first server and its connectivity with the target memory resource. The implementation method for constructing the access path will be detailed in later embodiments and will not be exemplified here.

[0066] Based on this, in this embodiment, the first server can obtain extended memory—that is, the aforementioned target memory resource—through the access path constructed by the target device. Since the first server has identified the target device as an external memory device, it can issue a memory access request for extended memory to the target device according to memory semantics. Without the first server's awareness, the target device can access the target memory resource on its behalf based on the access path. Thus, from the first server's perspective, this achieves the goal of enabling the first server to borrow memory resources from other servers according to memory semantics.

[0067] In summary, in this embodiment, the target device in the communication system can present itself as a memory device and connect to multiple servers according to an interconnection protocol that supports memory semantics, so that each server recognizes the target device as an external memory device; each server also entrusts a portion of its own memory resources to the target device. Based on this, the target device can receive memory expansion requests from any server and select target memory resources that meet the memory expansion requirements from the managed memory resources. Moreover, it can construct an access path to support servers accessing target memory resources according to memory semantics. In this way, the target device can provide an access path to support memory sharing between servers; for the servers, they can access the memory resources of other servers as if they were accessing local memory through the access path provided by the target device, according to memory semantics. Accordingly, based on the target device, it is possible to support memory sharing between servers according to memory semantics, effectively improving compatibility with various types of servers.

[0068] In the above or following embodiments, the target device can establish an access path using various implementation methods. In a preferred implementation:

[0069] The target device can allocate a range of device memory addresses for the target memory resources within its own device address space;

[0070] The device memory address range is used as the response result to the memory expansion request to establish a first logical channel for supporting the first server to access the device memory address range;

[0071] Establish a second logical channel, which is used to connect the device memory address range and the memory access address range corresponding to the target memory resource in the memory address space of its source device.

[0072] Using the device memory address as an intermediary, the first logical channel and the second logical channel are connected to construct an access path;

[0073] The source device may include one or more other servers besides the first server, and may also include the target device.

[0074] As mentioned earlier, the target device has connectivity with the first server and with the target memory resource. In this implementation, based on these two connectivity aspects, the access path is divided into two logical channels: based on the connectivity with the first server, the target device can construct the aforementioned first logical channel; based on the connectivity with the target memory resource, the target device can construct the aforementioned second logical channel.

[0075] More importantly, this implementation proposes to introduce the device memory address range of the target memory resource as a transit point to connect the first logical channel and the second logical channel, thereby constructing an access path.

[0076] This involves two address spaces: the device address space and the source device's memory address space. According to the bus protocol, bus devices have their own independent address space, called the device address space. Therefore, the target device, as a bus device, also possesses a device address space. The source device's memory address space can be understood as the address space that the server or target device sets for its own memory. The address space that the server or target device can access via the bus is its own memory address space.

[0077] Preferably, the target device can provide a unified device address space to the multiple servers it connects to. That is, the target device can uniformly address all managed memory resources in the same device address space, and the multiple servers connected to the target device all access this device address space. Of course, the target device can also provide mutually isolated device address spaces to different servers it connects to; this is not limited here, and it does not affect the implementation of the memory expansion scheme in this embodiment.

[0078] Regarding the first logical channel:

[0079] In one exemplary scheme: the target device may receive the memory access address range allocated by the first server in its own memory address space for the device memory address range after recognizing the response result; and construct the address translation relationship between the memory access address range allocated by the first server for the device memory address range and the device memory address range as a first logical channel.

[0080] As mentioned earlier, the target device has been identified by the first server as an external memory device. Based on this, after the target device provides the previously allocated device memory address range as a response to the first server, the first server will recognize the received device memory address range as the address of the extended memory provided by the external memory device. This allows the first server to allocate a memory access address range for the device memory address range within its own memory address space after recognizing the device memory address range, and can then feed back the allocated memory access address range to the external memory device (i.e., the target device). In this way, the first server can access the extended memory (in this embodiment, specifically the target memory resource) according to memory semantics, just like accessing local memory resources. After obtaining the memory access address range allocated by the first server for the aforementioned device memory address range, the target device can construct an address translation relationship between this memory access address range and the device memory address range. This address translation relationship can serve as the first logical channel. This address translation relationship can be, for example, an address offset.

[0081] It should be understood that the above is only one exemplary scheme for constructing the first logical channel. The target device can also use other exemplary schemes to construct the first logical channel. For example, the aforementioned address translation relationship can also be a complete mapping relationship between the memory access address range and the device memory address range, etc. Further exemplary schemes will not be described here.

[0082] Regarding the second logical channel:

[0083] In the first exemplary scheme: the target device can establish an address mapping relationship between "the device memory address range corresponding to the target memory resource" and "the memory access address range corresponding to the target memory resource in the memory address space of the source device" as a second logical channel.

[0084] In this first exemplary scheme, the target device can independently complete the construction of the second logical channel without the source device being aware of the target memory resource.

[0085] In the second exemplary scheme: the target device can perform a conversion operation on any device memory address within the device memory address range according to a preset conversion rule, and then use the converted address corresponding to the device memory address as the virtual access address corresponding to the memory resource pointed to by the device memory address; the virtual access address is provided to the source device where the memory resource is located to trigger the source device to establish a mapping relationship between the virtual access address and the memory access address corresponding to the memory resource in the memory address space of the source device; based on the virtual access address, the mapping relationship established between the device memory address and the source device can be connected to construct a sub-channel from the device memory address to the memory access address for the memory resource; for other device memory addresses within the device memory address range, sub-channels are respectively constructed between the memory access addresses corresponding to the memory resources they point to, to generate a second logical channel.

[0086] Considering that the target memory resource may be distributed across one or more source devices, this second exemplary scheme describes the implementation from the perspective of a single device memory address within the device memory address range corresponding to the target memory resource. It should be understood that each device memory address within this device memory address range can be processed according to this implementation scheme, thereby connecting the "device memory address range corresponding to the target memory resource" with the "memory access address range corresponding to the target memory resource in the memory address space of the source device" to obtain the second logical channel.

[0087] In this second exemplary scheme, the target device can cooperate with the source device where the target memory resource is located to complete the construction of the second logical channel.

[0088] The second exemplary solution proposes setting up a virtual access address layer between the target device and the source device where the target memory resource resides. By introducing a virtual access address, the target device no longer needs to construct the address mapping relationship mentioned in the first exemplary solution, but only needs to allocate a virtual access address for the target memory resource, which can effectively reduce the software and hardware complexity on the target device.

[0089] Referring to the preceding text, in this second exemplary scheme, the method by which the target device allocates a virtual access address for the target memory resource is as follows: A simple translation operation is performed on the device memory address according to a preset translation rule; the translated address corresponding to the device memory address is then used as the virtual access address corresponding to the memory resource pointed to by the device memory address. The preset translation rule can be flexibly designed as needed. A preferred preset translation rule could be:

[0090] The target address bits, indicated by the preset translation rules, are read from the device memory address and used as the translated address corresponding to the device memory address. In other words, a portion of the address bits in the device memory address is directly used to construct the translated address, which serves as the virtual access address. This direct reading method can allocate virtual access addresses very efficiently.

[0091] To support this preferred preset translation rule, when allocating device memory address ranges for the target memory resource, an addressing rule corresponding to the preset translation rule can be used. An exemplary addressing rule could be: for any memory segment contained in the target memory resource, each device memory address written by the target device for that memory segment includes the aforementioned target address bits, and also includes address bits used to identify the source device where the memory segment is located.

[0092] For example, if there are 16 source devices providing managed memory resources and each source device has 1TB of address space, the target device's address space will be 16TB. In this case, the addressing rules can set the device memory address to 44 address bits. If the preset translation rule indicates that address bits [39, 0] are used as the target address, then, in accordance with the preset translation rule, the addressing rules can set address bits [39, 0] as the address bits for the virtual access address. The addressing rules can also set address bits [43:40] to carry the source device's identification information. Thus, from the addressing result of any memory segment contained in the target memory resource, address bits [43:40] of each device memory address are consistent, representing the identification information of the source device where the memory segment is located; while address bits [39, 0] of each device memory address are different. Preferably, in order to ensure the continuity of the virtual access addresses allocated to the memory segment, the target address bits in each device memory address can be addressed consecutively during the process of addressing the memory segment. In this way, after reading the target address bits from each device memory address corresponding to the memory segment, the obtained virtual access addresses will be consecutive.

[0093] Of course, the above-described preset conversion rules are preferred. In this second exemplary embodiment, other preset conversion rules can also be used. For example, an address offset can be set in the preset conversion rules. The target device can perform address offset calculation on the device memory address to obtain the converted address corresponding to the device memory address, which is then used as the virtual access address. Moreover, different address offsets can be set in the preset conversion rules for different source devices. When allocating virtual access addresses, the target device can use the corresponding address offset to calculate based on the source device where the memory resource is located. Further examples of preset conversion rules will not be provided here.

[0094] At this point, the target device can allocate a virtual access address for the target memory resource and distribute it to the source device where the target memory resource is located.

[0095] In the source device where the target memory resource is located, its installed memory management component can be responsible for establishing the aforementioned mapping relationship (i.e., the mapping relationship between the virtual access address and the corresponding memory access address of the memory resource in the memory address space of the source device) to support the construction of the second logical channel. The memory management component in the source device where the target memory resource is located can be software, hardware, or a combination of both. For example, the memory management component in the source device where the target memory resource is located may include an Input / Output Memory Management Unit (IOMMU) or a System Memory Management Unit (SMMU), and may also include an RDMA network card if necessary.

[0096] Thus, in this second exemplary scheme, the target device can cooperate with the memory management component in the source device where the target memory resource is located, and by introducing a virtual access address, connect the "device memory address range corresponding to the target memory resource" with the "memory access address range corresponding to the target memory resource in the memory address space of the source device" to construct a second logical channel.

[0097] In summary, this embodiment proposes dividing the access path into a first logical channel and a second logical channel. The target device can construct the first logical channel based on its connectivity with the first server, and the second logical channel based on its connectivity with the target memory resource. A device memory address range is introduced as a bridge to connect the first and second logical channels, thereby establishing an access path. Furthermore, the construction of the second logical channel can be completed independently by the target device, or it can be completed collaboratively by the target device and the source device containing the target memory resource, thereby reducing the hardware and software complexity of the target device and improving memory expansion efficiency.

[0098] In the above or below embodiments, after the target memory resources are allocated to the first server as extended memory, the processor of the first server can initiate a first memory access request according to memory semantics. The target device can determine the target memory segment that the first memory access request needs to access in the target memory resources based on the access path constructed for the first server. According to the access requirements corresponding to the first memory access request, a second memory access request is initiated to the source device where the target memory segment is located, so as to access the target memory segment in place of the first server.

[0099] Following the device memory address range introduced in the previous embodiments, here, the target device can determine the target device memory address to be accessed by the first memory access request based on the aforementioned first logical channel; and determine the memory segment pointed to by the target device memory address as the target memory segment. In practical applications, the first server can carry the target memory access address and the length of memory to be accessed in the first memory access request. The target memory access address is an address within the memory access address range allocated by the first server for extended memory. For the target device, after receiving the first memory access request initiated by the first server, it can calculate the starting device memory address corresponding to the target memory access address in the first memory access request in the device address space of the target device based on the address translation relationship in the first logical channel (the address translation relationship between "the memory access address range allocated by the first server for the target memory resource's device memory address range" and "the device memory address range of the target memory resource"). Then, it adds the memory length in the first memory access request to this starting device memory address to obtain a device memory address segment, which serves as the aforementioned target device memory address, thereby hitting the target memory segment. It should be understood that the number of target memory segments here can be one or more, and if there are multiple target memory segments, the multiple target memory segments can be distributed across multiple source devices.

[0100] After determining the target device's memory address, the target device can be responsible for initiating a second memory access request to the target memory segment pointed to by the target device's memory address on behalf of the first server. Depending on the different exemplary schemes used to construct the second logical channel, there may be differences in the processing logic when the target device initiates the second memory access request.

[0101] Following the first exemplary scheme provided above for constructing the second logical channel: the target device can determine the source device where the target memory segment pointed to by the target device's memory address is located, and the memory access address mapped to the target device's memory address, based on the second logical channel; according to the access requirements of the first memory access request, the target device sends a second memory access request carrying the memory access address to the source device to access the target memory segment instead of the first server.

[0102] This section elaborates on a special case (i.e., the source device is the target device). In this embodiment, the second memory access request can be issued by the "switching component" deployed in the target device mentioned above. Since the target device is the source device, the second memory access request can reach the target device's own processor, which can then respond to the request. The second memory access request is also handled similarly in the memory access logic described below as part of the second exemplary scheme provided for constructing the second logic.

[0103] Here, the target device can initiate a second memory access request according to protocols such as CXL.io / PCIe or RDMA. The access protocol followed by the target device when initiating the second memory access request is not limited here. It is worth noting that, based on this first exemplary scheme, the target device can directly carry the memory access address of the target memory segment in the source device's memory address space in the second memory access request, thereby accessing the target memory segment. This memory access address is typically the host physical address (HPA).

[0104] For example, if the target device initiates a second memory access request (i.e., a DMA request) using the DMA method according to the CXL.io / PCIe protocol, the memory access address can be used as the DMA address in the DMA request, and the target device can directly access the target memory segment.

[0105] The access requests here may include read / write directions and the dataset to be written. If the first memory access request is a write request, the target device can initiate a write request to the source device based on the memory access address determined for the target memory segment, thus writing the dataset to be written into the target memory segment instead of the first server. If the first memory access request is a read request, the target device can initiate a read request to the source device based on the memory access address to read the required target data from the target memory segment; and can provide the target data to the first server in response to the first memory access request.

[0106] Following the second exemplary scheme provided above for constructing the second logical channel: the target device can perform a conversion operation on the target device memory address according to a preset conversion rule to obtain the virtual access address corresponding to the target memory segment pointed to by the target device memory address in the source device; according to the access requirements of the first memory access request, it sends a second memory access request carrying the virtual access address to the source device. For the source device, after receiving the second memory access request, it can convert the virtual access address into a memory access address according to the mapping relationship already constructed for the target memory segment, and respond to the second memory access request according to the converted memory access address.

[0107] According to the preferred preset conversion rule provided in the second exemplary scheme, the target device can read the target address bit from the target device memory address as the virtual access address corresponding to the target memory segment in the source device.

[0108] Here, the target device can initiate a second memory access request according to protocols such as CXL.io / PCIe or RDMA. The access protocol followed by the target device when initiating the second memory access request is not limited here. It is worth noting that, based on this second exemplary scheme, the target device can carry the virtual access address corresponding to the target memory segment in the second memory access request, while the source device is responsible for converting this virtual access address into a memory access address in the source device's memory address space. Afterwards, the source device can access the target memory segment via the bus through this converted memory access address.

[0109] For example, if the target device initiates a second memory access request (i.e., a DMA request) using DMA according to the CXL.io / PCIe protocol, this virtual access address can be used as the DMA address in the DMA request. Combined with the IOMMU in the source device, the target device can access the target memory segment. In this case, the virtual access address is an I / O Virtual Address (IOVA).

[0110] For another example, if the target device initiates a second memory access request (i.e., an RDMA request) according to the RDMA protocol, the virtual access address can actually be used as the RDMA address in the RDMA request. In the source device, the virtual access address can first undergo address translation through the RDMA network card, and then undergo another address translation through the IOMMU. Finally, the virtual access address will also be converted into a memory access address. After that, the source device can access the target memory segment through the bus according to this memory access address to respond to the second memory access request.

[0111] The access requests here may include read / write directions and the dataset to be written. If the first memory access request is a write request, the target device can initiate a write request to the source device based on the virtual access address determined for the target memory segment, thus writing the dataset to be written into the target memory segment instead of the first server. If the first memory access request is a read request, the target device can initiate a read request to the source device based on the virtual access address to read the required target data from the target memory segment; and can provide the target data to the first server in response to the first memory access request.

[0112] Alternatively, the target device can borrow memory from managed memory resources. In this case, the target device's processor can initiate a memory expansion request. The target device's switching and control components can allocate target memory resources and establish an access path for the target device's processor according to the memory expansion logic provided in this embodiment. After the memory expansion is completed, the target device's processor can initiate a memory access request. The target device's switching component can then support the target device's processor in accessing the target memory resources according to memory semantics based on the access path. Further details are omitted here.

[0113] In summary, in this embodiment, after the target memory resources are allocated to the first server as extended memory, the first server can borrow the target memory resources through the target device. Since the target device has been identified as an external memory device by the first server, and the target device and the first server follow an interconnection protocol that supports memory semantics, the first server can initiate a memory access request for the extended memory according to memory semantics. The target device can then respond to the memory access request on behalf of the first server without the first server's awareness, thereby achieving the technical effect that the first server can borrow memory resources from other servers according to memory semantics.

[0114] In the above or following embodiments, each server connected to the target device may host a portion of its own memory on the target device. The following description uses the first server as an example to illustrate the hosting scheme in detail. It should be understood that each server connected to the target device in the communication system can choose whether to host memory resources as needed; this embodiment does not require all servers connected to the target device to host memory resources.

[0115] In this embodiment, the first server can select idle memory resources to be managed from its own memory resources. The first server can send a memory management request to the target device in this embodiment, and carry the memory resource description information corresponding to the idle memory resource in the memory management request. For the target device, after receiving the memory management request, it can record this memory resource description information to mark the idle memory resources managed by the first server as managed memory resources.

[0116] In one optional hosting scheme, the memory resource description information may include the memory access address corresponding to the memory resource in the memory address space of its host server. This provides a basis for the target device to centrally schedule the hosted memory resources. In this optional hosting scheme, when the target device receives a memory expansion request, it can autonomously select the target memory resource. The target device can also autonomously manage the allocation status of the hosted memory resources. For example, after allocating the target memory resource as extended memory for the first server, the target device can add an allocation marker to the memory access address range corresponding to the target memory resource recorded in its own records to characterize the allocation status of the target memory resource.

[0117] In another optional hosting scheme, the memory resource description information may not need to include the memory access address corresponding to the memory resource in the memory address space of its host server, but can instead include attribute information such as memory length. In this optional hosting scheme, the server itself can be responsible for scheduling the hosted memory resources and synchronizing the scheduling results to the target device. Based on this, after receiving a memory expansion request, the target device can first select a target server that meets the memory expansion requirements based on the memory length and other attribute information in the memory resource description information, and then send a hosted resource usage request to the selected target server to trigger the target server to select a memory resource that meets the memory expansion requirements from its hosted memory resources as the target memory resource. That is, the target server is responsible for selecting the target memory resource from its own hosted memory resources, rather than the target device. In this optional hosting scheme, the server also manages the allocation status of its own hosted memory resources, instead of the target device actively managing them. Based on this, after allocating the target memory resource as extended memory of the first server, the target device can trigger the server where the target memory resource is located to update the allocation status information of its managed memory resources; the target device can receive the allocation status information submitted by each server, and this allocation status information can be used as a reference in the aforementioned selection of the target server in this optional hosting scheme.

[0118] In addition, in this embodiment, after the first server entrusts the idle memory resources to the target device, it can mark the entrusted idle memory resources as being in an entrusted state. Based on the marked entrusted state, the first server will prohibit its own processor from using the entrusted idle memory resources. This can effectively ensure the success rate of memory expansion.

[0119] In this embodiment, the release of memory resource management can also be supported. Taking the first server as an example again, if the first server needs to release the management of idle memory resources that have been managed, it can send a release request to the target device. The release request can carry the length of memory to be released. In response to the release request, the target device can select memory resources that match the specified length from the memory resources managed by the first server; mark the selected memory resources as released; and return the memory access address corresponding to the selected memory resources in the first server's memory address space to the first server, thus responding to the release request.

[0120] In other words, the target device can determine which part of the memory resources the first server can unmanage, which is more conducive to the accurate scheduling of the managed memory resources.

[0121] Of course, in this embodiment, the first server can also decide independently which memory resources need to be unmanaged. The first server can include information such as the memory access address corresponding to the memory resource to be unmanaged in the first server's memory address space in the unmanaged request. The target device can then mark the corresponding memory resource as unmanaged according to the memory access address indicated in the unmanaged request. No limitation is placed on the decision-maker during unmanaged processing.

[0122] In summary, in this embodiment, each server connected to the target device in the communication system can flexibly manage and unmanage memory resources according to its own memory resource usage. For the target device, it can make full use of the idle memory resources on the servers in the communication system, flexibly allocating idle memory resources to servers in the communication system with insufficient memory, thus realizing memory borrowing between servers in the communication system according to memory semantics.

[0123] Figure 2a is a logical schematic diagram of a memory expansion scheme provided by an exemplary embodiment of this disclosure in an exemplary application scenario. Referring to Figure 2a, in this exemplary application scenario, the target device uses a smart network interface card (NIC), which connects to multiple servers simultaneously and interconnects with the servers using the CXL protocol. In this exemplary application scenario, the smart NIC can emulate itself as a CXL Type 3 device to provide CXL.mem and CXL.io protocol interfaces. CXL.mem and CXL.io are two sub-protocols provided by the CXL protocol. The CXL.io protocol is used for initialization, linking, device discovery and enumeration, and register access, etc.; the CXL.mem protocol allows the server to access external memory devices according to memory semantics. Based on this, referring to Figure 2a, server 1 is taken as an example.

[0124] Memory expansion phase:

[0125] 1) Each server performs device discovery according to CXL.io to identify the smart network card as a CXL Type 3 device.

[0126] 2) Each server informs the smart network interface card (NIC) of the contiguous free memory segments it wishes to host. The smart NIC stores descriptions of the contiguous free memory segments that each server wishes to host. Before being unhosted, each server will not access the free memory segments it has already hosted on the smart NIC.

[0127] 3) Server 1 requests additional memory from the smart network card, with a length of N bytes.

[0128] 4) The smart network card selects a suitable memory segment from the managed free memory segments. Assume that the target memory segment on server 2 is selected, and the memory access address segment corresponding to the target memory segment in the memory address space of server 2 is [S2address, S2address+N-1].

[0129] 5) The smart network interface card (NIC) can allocate a consecutive N-byte device memory address segment [S1dpa, S1dpa+N-1] for the target memory segment within its own address space (i.e., device address space), and establish an address mapping relationship between [S1dpa, S1dpa+N-1] and [S2address, S2address+N-1]. The smart NIC can write this address mapping relationship into an address mapping table for use in constructing the access path in 8).

[0130] 6) The smart network card marks the address range [S2address, S2address+N-1] as having been assigned to server 1.

[0131] 7) The smart network interface card (NIC) provides the address range [S1dpa, S1dpa+N-1] as the address for extended memory to server 1, so that server 1 can recognize the address range [S1dpa, S1dpa+N-1] as the address for extended memory. Server 1 can allocate a memory access address range [S1address, S1address+N-1] for the address range [S1dpa, S1dpa+N-1] in its own memory address space and feed it back to the smart NIC.

[0132] 8) The smart network card can construct an address translation relationship (e.g., address offset) between [S1address, S1address+N-1] and [S1dpa, S1dpa+N-1]. Based on this address translation relationship and the address mapping relationship in 5), an access path that supports server 1 to the target memory segment according to memory semantics can be constructed: [S1address, S1address+N-1] → [S1dpa, S1dpa+N-1] → [S2address, S2address+N-1].

[0133] In this way, the smart network interface card (NIC) can present itself as a CXL type 3 device to servers requiring memory expansion, and can establish access paths for memory interaction between different servers. This allows multiple servers connected to the smart NIC to share memory with each other, improving the memory utilization of servers in the communication system without deploying additional hardware. Simultaneously, the server undergoing memory expansion can access remote memory resources using native memory semantics, providing excellent compatibility for servers needing increased memory. Referring to Figure 2a, the smart NIC can allocate a target memory segment as extended memory for server 1 without server 2's awareness, and server 1 can access the extended memory according to memory semantics.

[0134] The access phase to extended memory:

[0135] 9) The CPU of server 1 can initiate memory access requests (read / write) to the address range [S1address, S1address+N-1] via the bus. Taking the access to address S1address as an example, server 1 can send a CXL.mem request message to the CXL.mem interface of the smart network card according to CXL.mem. This process supports memory semantics.

[0136] 10) After receiving the CXL.mem request message, the smart network card can extract information such as the requested address S1address, memory length, read / write direction (e.g., whether it is a read request or a write request) and the dataset to be written [S1data1, S1data2, etc.].

[0137] 11) The smart network card calculates the address offset of S1address according to the address offset in 8), and then obtains the device memory address corresponding to S1address in the address segment [S1dpa, S1dpa+N-1], which is S1dpa.

[0138] 12) The smart network card uses the address mapping table built in 5) to find that the address mapped by S1dpa is S2address in the address range [S2address, S2address+N-1] of server 2.

[0139] 13) If the CXL.mem request message received in 9) is a read request, the smart network card can send a DMA read request with a starting address of S2address and a length of length to server 2 according to the CXL.io / PCIe protocol, so as to read the dataset [S2data1…S2dataN] back from the address S2address of server 2; if the CXL.mem request message received in 9) is a write request, the smart network card can send a DMA write request with a starting address of S2address and carrying the dataset [S1data1…S1dataN] to server 2 according to the CXL.io / PCIe protocol, so as to write the dataset [S1data1…S2dataN] to the address S2address of server 2.

[0140] 14) The smart network card returns a CXL.mem response message to server 1 according to the CXL.mem protocol. If 13) is a DMA read request, the smart network card will carry the read dataset [S2data1...S2dataN] in the CXL.mem response message to feed back to server 1.

[0141] In this way, based on the access path established in the memory expansion phase, during the memory access phase, the smart network card can hit the memory segment that server 1 needs to access and translate the memory access address of the memory segment on the source device. Based on the translated memory access address, the smart network card can efficiently complete the access to the memory segment on behalf of server 1.

[0142] Figure 2b is a logical schematic diagram of the memory expansion scheme provided by an exemplary embodiment of this disclosure in another exemplary application scenario. Referring to Figure 2b, in this exemplary application scenario, the target device uses a smart network interface card (NIC), which is simultaneously connected to the buses of multiple servers and interconnected with the servers using the CXL protocol. In this exemplary application scenario, the smart NIC can emulate itself as a CXL Type 3 device to provide CXL.mem and CXL.io protocol interfaces. Based on this, referring to Figure 2b, server 1 is taken as an example.

[0143] Memory expansion phase:

[0144] 1) Each server performs device discovery according to CXL.io to identify the smart network card as a CXL Type 3 device.

[0145] 2) Each server informs the smart network interface card (NIC) of the contiguous free memory segments it wishes to host. The smart NIC stores descriptions of the contiguous free memory segments that each server wishes to host. Before being unhosted, each server will not access the free memory segments it has already hosted on the smart NIC.

[0146] 3) Server 1 requests additional memory from the smart network card, with a length of N bytes.

[0147] 4) The smart network card selects a suitable memory segment from the managed free memory segments. Assume that the target memory segment on server 2 is selected, and the memory access address segment corresponding to the target memory segment in the memory address space of server 2 is [S2address, S2address+N-1].

[0148] 5) The smart network interface card (NIC) can allocate a consecutive N-byte device memory address segment [S1dpa, S1dpa+N-1] for the target memory segment within its own addressing space (i.e., device address space). For example, assuming 16 source devices provide managed resources and each source device has a 1TB addressing space, the target device's device address space will be 16TB. The addressing rule used here can be: the device memory address has 44 address bits; the [43:40]th address bit is used as the device address bit to record the server's identification information, and the [39:0]th address bit is used as the target address bit for continuous addressing. After addressing is completed, the smart NIC can read the target address bit from each device memory address segment in the device memory address segment [S1dpa, S1dpa+N-1], and use it as the virtual access address (IOVA) corresponding to each device memory address. Based on this, the virtual access address range [S2iova, S2iova+N-1] allocated for the target memory segment can be obtained. The smart network card can inform server 2 of the virtual access address range [S2iova, S2iova+N-1] allocated for the target memory segment. The IOMMU in server 2 can configure the mapping relationship between [S2iova, S2iova+N-1] and [S2address, S2address+N-1].

[0149] 6) The smart network card marks the address range [S2address, S2address+N-1] as having been assigned to server 1.

[0150] 7) The smart network interface card (NIC) provides the address range [S1dpa, S1dpa+N-1] as the address for extended memory to server 1, so that server 1 can recognize the address range [S1dpa, S1dpa+N-1] as the address for extended memory. Server 1 can allocate a memory access address range [S1address, S1address+N-1] for the address range [S1dpa, S1dpa+N-1] in its own memory address space and feed it back to the smart NIC.

[0151] 8) The smart network interface card (NIC) can construct an address translation relationship (e.g., address offset) between [S1address, S1address+N-1] and [S1dpa, S1dpa+N-1]. Based on this address translation relationship and the virtual access address segment in 5) and the mapping relationship established by the IOMMU in server 2, an access path supporting server 1 according to the memory semantic target memory segment is constructed: [S1address, S1address+N-1]→[S1dpa, S1dpa+N-1]→[S2iova, S2iova+N-1]→[S2address, S2address+N-1].

[0152] In this way, the smart network interface card (NIC) can present itself as a CXL type 3 device to servers that need memory expansion, and can establish access paths for memory interaction between different servers. This allows multiple servers connected to the smart NIC to share memory, improving the memory utilization of servers in the communication system without deploying additional hardware. Simultaneously, the server expanding its memory can use native memory semantics to access remote memory resources, providing excellent compatibility for servers requiring increased memory. Referring to Figure 2b, the smart NIC can cooperate with server 2 to establish an access path for server 1 to access the target memory segment, thereby allocating the target memory segment as extended memory for server 1, which can then access the extended memory according to memory semantics.

[0153] Access phase to extended memory:

[0154] 9) The CPU of server 1 can initiate a memory access request (read / write) for the address range [S1address, S1address+N-1] via the bus. Taking an access request to address S1address as an example, server 1 can send a CXL.mem request message to the CXL.mem interface of the smart network card according to CXL.mem. This process supports memory semantics.

[0155] 10) After receiving the CXL.mem request message, the smart network card can extract information such as the requested address S1address, memory length, read / write direction (e.g., whether it is a read request or a write request) and the dataset to be written [S1data1…S1dataN].

[0156] 11) The smart network card calculates the address offset of S1address according to the address offset in 8), and then obtains the device memory address corresponding to S1address in the address segment [S1dpa, S1dpa+N-1], which is S1dpa.

[0157] 12) The smart network card reads the device address bits from S1dpa to determine the target server, which is server 2 in this example; the smart network card also reads the target address bits from S1dpa to obtain the virtual access address S2iova.

[0158] 13) If the CXL.mem request message received in 9) is a read request, the smart network interface card (NIC) can send a DMA read request to server 2 with a starting address of S2iova and a length of length, according to the CXL.io / PCIe protocol. The IOMMU in server 2 can convert S2iova into address S2address in the address segment [S2address, S2address+N-1] based on the mapping relationship established in 5). Server 2 can then read the dataset [S2data1…S2dataN] of length length starting from address S2address and return it to the smart NIC; if the CXL.mem request message received in 9) is a read request, the smart network interface card (NIC) can send a DMA read request to server 2 with a starting address of S2iova and a length of length, according to the CXL.io / PCIe protocol. The IOMMU in server 2 can convert S2iova into address S2address in the address segment [S2address, S2address+N-1], according to the mapping relationship established in 5). Server 2 can then read the dataset [S2data1…S2dataN] of length length starting from address S2address and return it to the smart NIC. If the received CXL.mem request message is a write request, the smart network card can send a DMA write request to server 2 with a starting address of S2iova and carrying the dataset [S1data1…S1dataN] according to the CXL.io / PCIe protocol. The IOMMU in server 2 can convert S2iova into address S2address in the address segment [S2address, S2address+N-1] according to the mapping relationship established in 5). Server 2 can start writing the dataset [S1data1…S1dataN] from address S2address. After completing the write, it can return a write completion notification to the smart network card.

[0159] 14) The smart network card can return a CXL.mem response message to server 1 according to the CXL.mem protocol. If 13) is a DMA read request, the smart network card will carry the read dataset [S2data1...S2dataN] in the CXL.mem response message to feed back to server 1.

[0160] This approach proposes a unique addressing rule and introduces virtual access addresses, which allows one segment of the access path to be established on the source device that provides extended memory. This effectively reduces the hardware and software complexity of the smart network card and thus improves the efficiency of memory expansion and memory access.

[0161] Figure 3 is a flowchart illustrating a memory expansion method provided in another exemplary embodiment of this disclosure. This method can be executed by a processing device, which can be implemented as software, hardware, or a combination of both, and can be integrated into a target device. The target device presents itself as a memory device and connects to multiple servers in a communication system according to an interconnect protocol supporting memory semantics. A portion of the memory resources owned by the multiple servers are hosted on the target device. Referring to Figure 3, the method includes:

[0162] Step 300: After receiving the memory expansion request from the first server, determine the memory expansion requirements of the first server, wherein the first server is any one of the plurality of servers;

[0163] Step 301: Select the target memory resource that meets the memory expansion requirements from the managed memory resources;

[0164] Step 302: Construct an access path to support the first server in accessing the target memory resource according to memory semantics, so as to allocate the target memory resource as extended memory of the first server.

[0165] In some alternative embodiments, constructing an access path to support the first server in accessing the target memory resource according to memory semantics includes:

[0166] In the device address space of the target device itself, allocate a range of device memory addresses for the target memory resources;

[0167] The device memory address range is used as a response to the memory expansion request to establish a first logical channel for supporting the first server to access the device memory address range.

[0168] A second logical channel is established, which is used to connect the memory address range of the device and the memory access address range corresponding to the target memory resource in the memory address space of its source device.

[0169] Using the device memory address as an intermediary, the first logical channel and the second logical channel are connected to obtain the access path.

[0170] In some alternative embodiments, establishing a second logical channel includes:

[0171] Establish an address mapping relationship between the device memory address range and the corresponding memory access address range of the target memory resource in the memory address space of the source device, and use it as the second logical channel.

[0172] In some alternative embodiments, the method further includes:

[0173] Receive the first memory access request initiated by the first server according to memory semantics;

[0174] Based on the first logical channel, determine the target device memory address that the first memory access request needs to access;

[0175] Based on the second logical channel, the source device where the target memory segment pointed to by the target device memory address is located is determined, as well as the memory access address mapped to the target device memory address;

[0176] According to the access requirements of the first memory access request, a second memory access request carrying the memory access address is sent to the source device.

[0177] In some optional embodiments, according to the access requirements of the first memory access request, a second memory access request carrying the memory access address is sent to the source device, including:

[0178] If the first memory access request is a write request, then based on the memory access address, a write request is initiated to the source device to write the dataset to be written to the target memory segment instead of the first server.

[0179] If the first memory access request is a read request, then based on the memory access address, a read request is initiated to the source device to read the required target data from the target memory segment; and the target data is provided to the first server.

[0180] In some alternative embodiments, establishing a second logical channel includes:

[0181] After performing a conversion operation on any device memory address within the range of the device memory address according to the preset conversion rules, the converted address corresponding to the device memory address is used as the virtual access address corresponding to the memory resource pointed to by the device memory address;

[0182] The virtual access address is provided to the source device where the memory resource is located, so as to trigger the source device to establish a mapping relationship between the virtual access address and the memory access address corresponding to the memory resource in the memory address space of the source device;

[0183] Based on the virtual access address, the mapping relationship established between the device memory address and the source device is connected to construct a sub-channel from the device memory address to the memory access address;

[0184] For other device memory addresses within the device memory address range, sub-channels are constructed between the memory access addresses corresponding to the memory resources they point to, in order to generate the second logical channel.

[0185] In some alternative embodiments, the server establishes the mapping relationship using its own memory management components, which include an input / output memory management unit, a system memory management unit, and / or a remote direct memory access chip.

[0186] In some optional embodiments, a translation operation is performed on any device memory address within the device memory address range according to a preset translation rule, including:

[0187] Read the target address bit indicated in the preset conversion rule from the device memory address, and use it as the converted address corresponding to the device memory address.

[0188] In some alternative embodiments, for any memory segment in the target memory resource, the device memory address written by the target device for the memory segment includes the target address bit and also includes an address bit for identifying the source device where the memory segment is located.

[0189] In some optional embodiments, a translation operation is performed on any device memory address within the device memory address range according to a preset translation rule, including:

[0190] According to the address offset set in the preset conversion rule, the address offset is calculated on the device memory address to obtain the converted address corresponding to the device memory address.

[0191] In some alternative embodiments, the method further includes:

[0192] Receive the first memory access request initiated by the first server according to memory semantics;

[0193] Based on the first logical channel, determine the target device memory address that the first memory access request needs to access;

[0194] The target device memory address is converted according to the preset conversion rule to obtain the virtual access address of the target memory segment pointed to by the target device memory address in the source device.

[0195] According to the access requirements of the first memory access request, a second memory access request carrying the virtual access address is sent to the source device to trigger the source device to convert the virtual access address into a memory access address according to the mapping relationship and respond to the second memory access request according to the converted memory access address.

[0196] In some optional embodiments, according to the access requirements of the first memory access request, a second memory access request carrying the virtual access address is sent to the source device, including:

[0197] If the first memory access request is a write request, then a write request is initiated to the source device based on the virtual access address;

[0198] If the first memory access request is a read request, then based on the virtual access address, a read request is initiated to the source device to read the required target data from the target memory segment; and the target data is provided to the first server.

[0199] In some optional embodiments, the device memory address range is used as a response to the memory expansion request to establish a first logical channel for supporting the first server to access the device memory address range, including:

[0200] Receive the memory access address range allocated by the first server in its own memory address space for the device memory address range after recognizing the response result;

[0201] Construct an address translation relationship between the memory access address range allocated by the first server to the device memory address range and the device memory address range, as the first logical channel.

[0202] In some alternative embodiments, the interconnection protocol includes a compute fast link protocol, the target device presents itself as a compute fast link memory device, the first server initiates the first memory access request in accordance with the compute fast link protocol, and the target device initiates the second memory access request in accordance with the compute fast link protocol, a direct memory access protocol, or a remote direct memory access protocol.

[0203] In some alternative embodiments, the method further includes:

[0204] Receive the memory hosting request sent by the first server;

[0205] Obtain the memory resource description information corresponding to the memory resource to be managed from the memory management request;

[0206] Record the obtained memory resource description information to mark the unmanaged memory resource as a managed memory resource.

[0207] In some alternative embodiments, selecting target memory resources that meet the memory expansion requirements from the managed memory resources includes:

[0208] If the memory resource description information recorded for the managed memory resource contains the memory access address corresponding to the memory resource in the memory address space of the source device, then the memory resource pointed to by the memory access address that meets the memory expansion requirements is selected from the range of memory access addresses corresponding to the managed memory resource as the target memory resource.

[0209] If the memory resource description information recorded for the managed memory resource does not contain the corresponding memory access address in the memory address space of the source device, then a managed resource usage request is sent to the selected target source device based on the memory expansion requirement, so as to trigger the target source device to select a memory resource that meets the memory expansion requirement from its managed memory resources as the target memory resource.

[0210] In some alternative embodiments, the method further includes:

[0211] If the memory resource description information recorded for the managed memory resource contains the corresponding memory access address in the memory address space of the source device, then after allocating the target memory resource as extended memory of the first server, an allocated marker is added to the memory access address range corresponding to the target memory resource to characterize the allocation status of the target memory resource.

[0212] If the memory resource description information recorded for the managed memory resource does not include the corresponding memory access address in the memory address space of the source device, then after allocating the target memory resource as extended memory for the first server, the source device where the target memory resource is located is triggered to update the allocation status information of its managed memory resources; and the allocation status information submitted by the multiple servers is received.

[0213] In some alternative embodiments, the method further includes:

[0214] Receive a demand request from the first server, wherein the demand request indicates the length of memory to be demanded;

[0215] Select memory resources that meet the specified memory length from the memory resources already hosted by the first server;

[0216] The selected memory resources are marked as demanded, and the memory access address corresponding to the selected memory resources in the memory address space of the first server is returned to the first server in response to the demand request.

[0217] It is worth noting that the technical details of the above embodiments of the memory expansion method can be found in the description of the target device in the foregoing system embodiments. To save space, they will not be repeated here, but this should not cause any loss of the scope of protection of this disclosure.

[0218] Figure 4 is a flowchart illustrating another exemplary embodiment of the present disclosure of a memory expansion method. This method can be executed by a processing device, which can be implemented as software, hardware, or a combination of software and hardware. The processing device can be integrated into any server included in a communication system. The communication system also includes a target device, which presents itself as a memory device and connects to the plurality of servers according to an interconnection protocol supporting memory semantics. A portion of the memory resources on the plurality of servers are hosted by the target device. The method includes:

[0219] Step 400: Establish a connection with the target device;

[0220] Step 401: Using the target device as an external memory device, send a memory expansion request to the target device, the memory expansion request containing memory expansion requirements;

[0221] Step 402: Obtain extended memory through the access path constructed by the target device;

[0222] Wherein, the extended memory is the target memory resource selected by the target device from the managed memory resources that meets the memory extension requirements; the access path is used to support the server to access the target memory resource according to memory semantics.

[0223] In an optional embodiment, the method may further include:

[0224] If the server needs to host memory resources, it shall select idle memory resources to be hosted from its own memory resources.

[0225] A memory hosting request is sent to the target device. The memory hosting request carries memory resource description information corresponding to the idle resource, so as to host the idle memory resource to the target device.

[0226] In an optional embodiment, the method may further include:

[0227] After the idle memory resources are hosted by the target device, the idle memory resources are marked as hosted.

[0228] Based on the marked managed state, the processor itself is prohibited from using the idle memory resources.

[0229] In an optional embodiment, the method may further include:

[0230] If it is necessary to unmanage the idle memory resources, a demandation request is sent to the target device, the demandation request indicating the length of memory to be unmanaged;

[0231] After the target device selects a memory resource that meets the specified memory length from the memory resources already managed by the first server, the system returns the memory access address corresponding to the memory resource in the memory address space of the first server, thereby releasing the management of the idle memory resource.

[0232] In an optional embodiment, the method may further include:

[0233] If, during the process of constructing the access path, the target device receives a virtual access address provided by the target device for any memory segment already hosted by the first server, then a mapping relationship is established between the virtual access address and the memory access address corresponding to the memory segment in the memory address space of the first server, so as to support the target device in constructing the access path.

[0234] It is worth noting that the technical details of the above embodiments of the memory expansion method can be found in the relevant descriptions of the server in the foregoing system embodiments. To save space, they will not be repeated here, but this should not cause any loss of the scope of protection of this disclosure.

[0235] It should be noted that some processes described in the above embodiments and accompanying drawings include multiple operations appearing in a specific order. However, it should be clearly understood that these operations may not be executed in the order they appear in this document, or they may be executed in parallel. The operation numbers, such as 301, 302, etc., are merely used to distinguish different operations and do not represent any execution order. Furthermore, these processes may include more or fewer operations, and these operations may be executed sequentially or in parallel. It should also be noted that the descriptions such as "first" and "second" in this document are used to distinguish different servers, memory access requests, etc., and do not represent a sequential order, nor do they limit "first" and "second" to different types.

[0236] Figure 5 is a schematic diagram of the structure of a device provided in another exemplary embodiment of this disclosure. The device simulates itself as a memory device and connects to the bus of multiple servers in a communication system, with the multiple servers entrusting a portion of their memory resources to the device. As shown in Figure 5, the device may include: a memory 50, a processor 51, and a communication component 52.

[0237] The processor 51, coupled to the memory 50 and the communication component 52, is used to execute a computer program in the memory 50 for executing the memory extension logic pointed to by the target device in the aforementioned system embodiment.

[0238] Furthermore, as shown in Figure 5, the device also includes other components such as a power supply component 53. Figure 5 only schematically shows some of the components and does not imply that the device includes only the components shown in Figure 5.

[0239] It is worth noting that the technical details of the above-mentioned embodiments of the device can be referred to the relevant descriptions of the target device in the foregoing system embodiments. To save space, they will not be repeated here, but this should not cause any loss of the scope of protection of this disclosure.

[0240] Figure 6 is a schematic diagram of a server structure provided in another exemplary embodiment of this disclosure. The server can be any one of multiple servers included in a communication system. The communication system also includes a target device, which simulates itself as a memory device and connects to the multiple servers according to an interconnection protocol supporting memory semantics. A portion of the memory resources owned by the multiple servers are hosted by the target device. As shown in Figure 6, the server may include: a memory 60, a processor 61, and a communication component 62.

[0241] The processor 61, coupled to the memory 60 and the communication component 62, is used to execute a computer program in the memory 60 for performing the memory expansion logic executed by the server in the aforementioned system embodiments.

[0242] It is worth noting that the technical details of the above-mentioned server embodiments can be found in the relevant descriptions of the server in the foregoing system embodiments. To save space, they will not be repeated here, but this should not cause any loss of the scope of protection of this disclosure.

[0243] Furthermore, as shown in Figure 6, the server also includes other components such as a power supply component 63. Figure 6 only schematically shows some of the components and does not imply that the server includes only the components shown in Figure 6.

[0244] Accordingly, this disclosure also provides a computer-readable storage medium storing a computer program, which, when executed, can implement the steps in the above method embodiments.

[0245] Accordingly, this disclosure also provides a computer program product, which, when executed, can implement the steps in the above method embodiments.

[0246] The memory shown in Figures 5 and 6 above is used to store computer programs and can be configured to store various other data to support operation on the computing platform. Examples of this data include instructions for any application or method operating on the computing platform, contact data, phone book data, messages, pictures, videos, etc. The memory can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0247] The communication components in Figures 5 and 6 above are configured to facilitate wired or wireless communication between the device containing the communication component and other devices. The device containing the communication component can access wireless networks based on communication standards, such as WiFi, 2G, 3G, 4G / LTE, 5G, or combinations thereof. In one exemplary embodiment, the communication component receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component further includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID), Infrared Data Association (IrDA), Ultra-Wideband (UWB), Bluetooth (BT), and other technologies.

[0248] The power supply components shown in Figures 5 and 6 above provide power to various components of the device in which the power supply components are located. The power supply components may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the device in which the power supply components are located.

[0249] Those skilled in the art will understand that embodiments of this disclosure can be provided as methods, systems, or computer program products. Therefore, this disclosure can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this disclosure can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0250] This disclosure is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more flowchart illustrations and / or one or more block diagrams.

[0251] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0252] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

[0253] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0254] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation portals are provided for users to choose to authorize or refuse.

[0255] The above description is merely an embodiment of this disclosure and is not intended to limit the scope of this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A memory expansion method, applicable to a target device in a communication system, wherein the target device presents itself as a memory device and connects to multiple servers in the communication system according to an interconnection protocol supporting memory semantics, wherein a portion of the memory resources owned by the multiple servers are hosted by the target device, the method comprising: After receiving a memory expansion request from the first server, determine the memory expansion requirements of the first server, where the first server is any one of the plurality of servers; Select target memory resources that meet the memory expansion requirements from the managed memory resources; An access path is constructed to support the first server in accessing the target memory resource according to memory semantics, so as to allocate the target memory resource as extended memory for the first server.

2. The method according to claim 1, wherein, Constructing an access path to support the first server in accessing the target memory resource according to memory semantics includes: In the device address space of the target device itself, allocate a range of device memory addresses for the target memory resources; The device memory address range is used as a response to the memory expansion request to establish a first logical channel for supporting the first server to access the device memory address range. A second logical channel is established, which is used to connect the memory address range of the device and the memory access address range corresponding to the target memory resource in the memory address space of its source device. Using the device memory address as an intermediary, the first logical channel and the second logical channel are connected to obtain the access path; The source device includes one or more servers, and / or the target device.

3. The method according to claim 2, wherein, Establish a second logical channel, including: Establish an address mapping relationship between the device memory address range and the corresponding memory access address range of the target memory resource in the memory address space of the source device, and use it as the second logical channel.

4. The method according to claim 3, wherein, Also includes: Receive the first memory access request initiated by the first server according to memory semantics; Based on the first logical channel, determine the target device memory address that the first memory access request needs to access; Based on the second logical channel, the source device where the target memory segment pointed to by the target device memory address is located is determined, as well as the memory access address mapped to the target device memory address; According to the access requirements of the first memory access request, a second memory access request carrying the memory access address is sent to the source device.

5. The method according to claim 4, wherein, According to the access requirements of the first memory access request, a second memory access request carrying the memory access address is sent to the source device, including: If the first memory access request is a write request, then based on the memory access address, a write request is initiated to the source device to write the dataset to be written to the target memory segment instead of the first server. If the first memory access request is a read request, then based on the memory access address, a read request is initiated to the source device to read the required target data from the target memory segment; and the target data is provided to the first server.

6. The method according to claim 2, wherein, Establish a second logical channel, including: After performing a conversion operation on any device memory address within the range of the device memory address according to the preset conversion rules, the converted address corresponding to the device memory address is used as the virtual access address corresponding to the memory resource pointed to by the device memory address; The virtual access address is provided to the source device where the memory resource is located, so as to trigger the source device to establish a mapping relationship between the virtual access address and the memory access address corresponding to the memory resource in the memory address space of the source device; Based on the virtual access address, the mapping relationship established between the device memory address and the source device is connected to construct a sub-channel from the device memory address to the memory access address; For other device memory addresses within the device memory address range, sub-channels are constructed between the memory access addresses corresponding to the memory resources they point to, in order to generate the second logical channel.

7. The method according to claim 6, wherein, The server establishes the mapping relationship using its own memory management components, which include an input / output memory management unit, a system memory management unit, and / or a remote direct memory access chip.

8. The method according to claim 6, wherein, Perform a translation operation on any device memory address within the device memory address range according to a preset translation rule, including: Read the target address bit indicated in the preset conversion rule from the device memory address, and use it as the converted address corresponding to the device memory address.

9. The method according to claim 8, wherein, For any memory segment in the target memory resource, the device memory address written by the target device for the memory segment includes the target address bit, and also includes the address bit used to identify the source device where the memory segment is located.

10. The method according to claim 6, wherein, Also includes: Receive the first memory access request initiated by the first server according to memory semantics; Based on the first logical channel, determine the target device memory address that the first memory access request needs to access; The target device memory address is converted according to the preset conversion rule to obtain the virtual access address of the target memory segment pointed to by the target device memory address in the source device. According to the access requirements of the first memory access request, a second memory access request carrying the virtual access address is sent to the source device to trigger the source device to convert the virtual access address into a memory access address according to the mapping relationship and respond to the second memory access request according to the converted memory access address.

11. The method according to claim 10, wherein, According to the access requirements of the first memory access request, a second memory access request carrying the virtual access address is sent to the source device, including: If the first memory access request is a write request, then a write request is initiated to the source device based on the virtual access address; If the first memory access request is a read request, then based on the virtual access address, a read request is initiated to the source device to read the required target data from the target memory segment; and the target data is provided to the first server.

12. The method according to claim 2, wherein, Using the device memory address range as a response to the memory expansion request to establish a first logical channel for supporting the first server to access the device memory address range, including: Receive the memory access address range allocated by the first server in its own memory address space for the device memory address range after recognizing the response result; Construct an address translation relationship between the memory access address range allocated by the first server to the device memory address range and the device memory address range, as the first logical channel.

13. The method according to any one of claim 4 or 10, wherein, The interconnection protocol includes a compute fast link protocol, the target device presents itself as a compute fast link memory device, the first server initiates the first memory access request in accordance with the compute fast link protocol, and the target device initiates the second memory access request in accordance with the compute fast link protocol, direct memory access protocol, or remote direct memory access protocol.

14. The method according to claim 1, wherein, Also includes: Receive the memory hosting request sent by the first server; Obtain the memory resource description information corresponding to the memory resource to be managed from the memory management request; Record the obtained memory resource description information to mark the unmanaged memory resource as a managed memory resource.

15. The method according to claim 14, wherein, From the managed memory resources, select target memory resources that meet the memory expansion requirements, including: If the memory resource description information recorded for the managed memory resource contains the memory access address corresponding to the memory resource in the memory address space of the source device, then the memory resource pointed to by the memory access address that meets the memory expansion requirements is selected from the range of memory access addresses corresponding to the managed memory resource as the target memory resource. If the memory resource description information recorded for the managed memory resource does not contain the memory access address corresponding to the memory resource in the memory address space of the source device, then a managed resource usage request is sent to the selected target source device based on the memory expansion requirement, so as to trigger the target source device to select a memory resource that meets the memory expansion requirement from its managed memory resources as the target memory resource.

16. The method according to any one of claim 14 or 15, wherein, Also includes: If the memory resource description information recorded for the managed memory resource contains the memory access address corresponding to the memory resource in the memory address space of the source device, then after allocating the target memory resource as the extended memory of the first server, an allocated marker is added to the memory access address range corresponding to the target memory resource to characterize the allocation status of the target memory resource. If the memory resource description information recorded for the managed memory resource does not contain the memory access address corresponding to the memory resource in the memory address space of the source device, then after allocating the target memory resource as extended memory of the first server, the source device where the target memory resource is located is triggered to update the allocation status information of its managed memory resources; and the allocation status information submitted by the multiple servers is received.

17. The method of claim 14, wherein, Also includes: Receive a demand request from the first server, wherein the demand request indicates the length of memory to be demanded; Select memory resources that meet the specified memory length from the memory resources already hosted by the first server; The selected memory resources are marked as demanded, and the memory access address corresponding to the selected memory resources in the memory address space of the first server is returned to the first server in response to the demand request.

18. A memory expansion method applicable to any one of multiple servers in a communication system, the communication system further comprising a target device, the target device being presented as a memory device and connected to the multiple servers according to an interconnection protocol supporting memory semantics, wherein a portion of the memory resources owned by the multiple servers are hosted on the target device, the method comprising: Establish a connection with the target device; Using the target device as an external memory device, a memory expansion request is sent to the target device, the memory expansion request containing the memory expansion requirement; Extended memory is obtained through the access path established by the target device; Wherein, the extended memory is the target memory resource selected by the target device from the managed memory resources that meets the memory extension requirements; the access path is used to support the server to access the target memory resource according to memory semantics.

19. The method according to claim 18, wherein, Also includes: If the server needs to host memory resources, it shall select idle memory resources to be hosted from its own memory resources. A memory hosting request is sent to the target device. The memory hosting request carries memory resource description information corresponding to the idle resource, so as to host the idle memory resource to the target device.

20. The method according to claim 19, wherein, Also includes: After the idle memory resources are hosted by the target device, the idle memory resources are marked as hosted. Based on the marked managed state, the processor itself is prohibited from using the idle memory resources.

21. The method according to claim 19, wherein, Also includes: If it is necessary to unmanage the idle memory resources, a demandation request is sent to the target device, the demandation request indicating the length of memory to be unmanaged; After the target device selects a memory resource that meets the specified memory length from the memory resources already managed by the first server, it returns the memory access address corresponding to the memory resource, thereby releasing the management of the idle memory resource.

22. The method according to claim 18, wherein, Also includes: If, during the process of constructing the access path, the target device receives a virtual access address provided by the target device for any memory segment already hosted by the server, a mapping relationship is established between the virtual access address and the memory access address corresponding to the memory segment in the memory address space of the server, so as to support the target device in constructing the access path.

23. A communication system comprising a target device and a plurality of servers, the target device presenting itself as a memory device and being connected to the plurality of servers in the communication system respectively, the plurality of servers hosting a portion of their memory resources to the target device, the target device being configured to perform the method of any one of claims 1-17 to support memory expansion of any one of the plurality of servers using the hosted memory resources.

24. An apparatus comprising a memory, a processor, and a communication component, the apparatus presenting itself as a memory device and connected to a plurality of servers in a communication system, wherein a portion of the memory resources owned by the plurality of servers are hosted by the target device; The memory is used to store one or more computer instructions; The processor is coupled to the memory and the communication component and is used to execute one or more computer instructions for performing the memory expansion method according to any one of claims 1-17.

25. A server comprising a memory, a processor, and a communication component, the server being connected to a target device in a communication system, the target device presenting itself as a memory device and being connected to multiple servers in the communication system, wherein a portion of the memory resources on the multiple servers are hosted by the target device; The memory is used to store one or more computer instructions; The processor is coupled to the memory and the communication component and is used to execute one or more computer instructions for performing the memory expansion method according to any one of claims 18-22.

26. A computer-readable storage medium for storing a computer program, which, when executed by one or more processors, causes the one or more processors to perform the memory expansion method according to any one of claims 1-17 or 18-22.

27. A computer program product comprising a computer program that, when executed by one or more processors, causes the one or more processors to perform the memory expansion method according to any one of claims 1-17 or 18-22.

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