A photon counting frontend with linearized active feedback

Abstract

A frontend circuit for a photo counting component is provided. The frontend circuit includes a shaper circuit comprising: a signal amplifier coupled to an input and an output, and a feedback capacitor coupled in parallel to the signal amplifier; and an active feedback circuit coupled in parallel to the signal amplifier and the feedback capacitor, wherein the active feedback circuit comprises a common gate amplifier.

Description

[0001] A PHOTON COUNTING FRONTEND WITH LINEARIZED ACTIVE FEEDBACK

[0002] Description

[0003] This disclosure generally relates to photon counting components .

[0004] Various applications use photon counting components requiring low noise intensity measurements and possibly also spectral information . This includes medical imaging, spectroscopy, security scanners .

[0005] In such a photon counting component the temperature must be stabili zed within a few degrees in order to guarantee consistent characteristics of the sensor material . In order to control thermal heating accurately with low-cost air cooling systems it is crucial to minimi ze the power consumption of the frontend .

[0006] It is an obj ective of the invention to provide a frontend circuit providing improved temperature stabili zation .

[0007] In one aspect , a frontend circuit for a photon counting component is provided . The frontend circuit includes a shaper circuit including : a signal ampli fier coupled to an input and an output , and a feedback capacitor coupled in parallel to the signal ampli fier ; and an active feedback circuit coupled in parallel to the signal ampli fier and the feedback capacitor, wherein the active feedback circuit comprises a common gate amp 1 i f i e r .

[0008] I llustratively, the active feedback circuit may use a buf fered down scaler coupled with a common gate ampli fier . I llustratively, the down scaler and buf fer enable the common gate type active feedback . Thus , a simpli fied active feedback is provided having any one of improved stability, less process spread, higher speed and consumes less area . As this circuit is part of a photon counting system it can be used in any application that requires low noise intensity measurements and possibly also spectral information . This includes medical imaging, spectroscopy, security scanners , etc .

[0009] In the drawings , like reference characters generally refer to the same parts throughout the di f ferent views . The drawings are not necessarily to scale , emphasis instead generally being placed upon illustrating the principles of the invention . In the following description, various aspects of the invention are described with reference to the following drawings , in which :

[0010] FIG . l shows a circuit diagram of a photon counting component ;

[0011] FIG . 2 shows a circuit diagram of a single stage photon counting frontend;

[0012] FIG . 3 shows a circuit diagram of a two stage photon counting frontend for buf fering large input capacitance ;

[0013] FIG . 4 shows a circuit diagram of an operational transconductance ampli fier circuit with a single input transistor operational transconductance ampli fier ;

[0014] FIG . 5 shows a circuit diagram of a shaper with active feedback;

[0015] FIG . 6 shows a circuit diagram of an embodiment of a common gate type active feedback circuit ;

[0016] FIG . 7 shows a circuit diagram of a shaper introducing a shaper output level shi ft ; FIG . 8 shows a circuit diagram of an active feedback with an input down scaler ;

[0017] FIG . 9 shows a circuit diagram of an active feedback with a buf fered down scaler ;

[0018] FIG . 10 shows a circuit diagram of an active feedback with a buf fered down scaler and replica biasing; and

[0019] FIG . 11 shows a circuit diagram of two stage photon counting frontend with active feedback .

[0020] The following detailed description refers to the accompanying drawings that show, by way of illustration, speci fic details and aspects in which the disclosure may be practiced . One or more aspects are described in suf ficient detail to enable those skilled in the art to practice the disclosure . Other aspects may be utili zed and structural , logical , and electrical changes may be made without departing from the scope of the disclosure . The various aspects described herein are not necessarily mutually exclusive , as some aspects can be combined with one or more other aspects to form new aspects . Various aspects are described in connection with methods and various aspects are described in connection with devices . However, it may be understood that aspects described in connection with methods may similarly apply to the devices , and vice versa . Throughout the drawings , it should be noted that like reference numbers are used to depict the same or similar elements , features , and structures . Throughout the drawings , it should be noted that proportions are not necessary to scale and that the si ze of features may be emphasi zed for ease of illustration .

[0021] I llustratively, an active feedback circuit is provided having a simple circuit layout and that does not introduce second order poles that could cause instability and process spread in the FWHM . As a result , higher speed with lower spread and lower area is achieved . In addition, the active feedback circuit reduces the swing applied to the active feedback circuit , thus reducing nonlinearity at high energies

[0022] FIG . l illustrates a circuit diagram of a single photon counting component 10 including a photodetector 2 , a frontend circuit 5 , a discriminator 7 having a plurality of comparators 8 , and a plurality of counter 9 wherein one of the counter 9 is coupled to one of the comparators 8 respectively . The comparators 8 are configured with di f ferent thresholds , and thus allow to determine the voltage amplitude of a received voltage signal . All counters 9 having a threshold of their preceding comparator exceeded register a count by the pulse amplitude . This can be converted into a single count and the corresponding energy bin by a post processing . Thus , the photodetector 2 generates a pulse signal 3 corresponding to incident photons 1 . The frontend 5 converts the pulse signal 3 into a voltage pulse signal 6 .

[0023] The counter 9 counting a photon corresponds to the comparator 8 corresponding to the voltage amplitude of the voltage pulse 8 corresponding to the detected photon .

[0024] The pulse length, e . g . full width hal f maximum ( FWHM) , of a pulse of the voltage pulse signal 6 corresponds to a number of detected photons at the same time or within an overlapping time window . The amplitude of the pulse of the voltage pulse signal 6 corresponds to the energy of the detected photon . Ideally, pulses of photons do not overlap in time allowing single photon detection . Thus , the energy determined using a comparator 8 - counter 9 pair allows to determine the energy of detected photons .

[0025] Thus , in a photon counting component 10 single photon events 1 are detected and counted in order to obtain intensity and spectral information, and photon energy can also be extracted because photons are detected individually . Detection of single photons can be enabled by a sensor material of the photodetector 2 , e . g . typically CdTe or CdZnTe for X-ray conversion, which converts photon quants 1 into current pulses 3 . These current pulses 3 are converted to voltage pulses 6 by a shaper circuit 12 within the ( CMOS ) frontend circuit 6 . In the shaper circuit , the height of the output voltage peak 6 is proportional to the photon energy, thus containing spectral information . Digiti zation of the spectral information, e . g . output pulse height , can be performed using the discriminator 7 . The discriminator 7 includes several comparators 8 with di f ferent thresholds . The discriminator outputs are individually counted by the counter 9 to obtain the spectral distribution .

[0026] In such a photon counting component 10 the temperature is to be stabili zed within a few degrees in order to guarantee consistent characteristics of the sensor material . In order to control thermal heating accurately with low-cost air cooling systems it is crucial to minimi ze the power consumption of the frontend .

[0027] The disclosed active feedback topology allows a power ef ficient single input transistor stage circuit layout . Alternatively, or in addition, the disclosed active feedback topology allows minimi zing speed and linearity degradation by the active feedback path .

[0028] Low power photon counting frontends often use single input transistor operational transconductance ampli fier ( OTA) to reduce power consumption . This topology may use active feedback to decouple input and output common mode .

[0029] Active feedback topologies of comparative examples are complex, add 2nd order poles that introduce process spread, reduce speed and are power and area consuming .

[0030] Power consumption in the photon counting receiver is to a large degree dictated by the power of the OTAs in the frontend . Any one of a medical imaging device , spectroscopy device , or a security scanner may include a photo counting component . The photo counting component 10 may include a photo detector 2 configured to receive photons and to provide an output signal to an output , and a frontend circuit 5 as described in detail below . The input of the frontend circuit 5 may be coupled to the output of the photo detector . A plurality of analog-to- digital converters 8 , ADC, may be coupled to the output of the frontend circuit 5 . A plurality of counters 9 may be coupled to one ADC of the plurality of ADCs respectively .

[0031] FIG . 2 illustrates a single stage photon counting frontend . A typical frontend consists of a current to voltage ampli fier ( shaper ) 200 consisting of an OTA 206 with capacitive feedback 204 and resistive feedback 202 .

[0032] FIG . 3 illustrates a two stage photon counting frontend 300 for buf fering large input capacitance 214 . The two stage topology is often employed in systems with high input capacitance 214 . The two stage topology 300 includes a current buf fer ( CSA) 310 in front of the shaper ampli fier 200 . An RC circuit including a resistance 302 and capacitance 304 in parallel may be switched in series between the CSA 310 and the shaper ampli fier 200 . The CSA 310 isolates the shaper ampli fier 200 from the large input capacitance 214 and maintains the speed of the shaper ampli fier 200 .

[0033] One way of minimi zing the power of the OTA 206 is to switch from di f ferential input stages as illustrated in FIG . 3 to a single transistor input stage illustrated in FIG . 4 . The single transistor input stage may of fer a power improvement of factor 4 . FIG . 4 illustrates an OTA circuit layout 400 with the single input transistor 416 OTA 412 .

[0034] However, in such an input stage the input common-mode ( CM) is equal to the gate source voltage of the input device and thus highly temperature dependent . Using resistive feedback 202 would force the frontend output Vout to be equal to its input and therefore temperature dependent as well. This may be undesirable because it would cause temperature drift of the count rate characteristics in a single photon counting component (FIG.l) . In order to decouple the frontend input and output an active feedback (AFB) circuit 500 may be used which implements the feedback resistor by an OTA 502. FIG.5 illustrates the shaper 500 with the active feedback 502. The shaper 500 with active feedback 502 allows the input and output CM to be optimized independently.

[0035] The common gate type active feedback circuit provides a very simple active feedback circuit by using a single transistor 602 as feedback that comprises a common gate amplifier. FIG.6 illustrates the common gate type active feedback circuit 604 (also denoted as shaper or shaper circuit) . This circuit 600 may be used in applications where the input for the shaper 206 is lower than the output of the shaper 206. However, this circuit may not be ideal in applications for the single input transistor OTA circuit (see FIG.4) where the input of the shaper 412 is simply the gate source voltage of the input device .

[0036] Differential stages as illustrated in FIG.6 may add area and complexity as well as add 2nd order poles due to mirroring paths within the OTA. These poles may degrade stability or require complex pole-zero compensation schemes.

[0037] In other words, as illustrated in FIG.6, the frontend circuit 5 (see FIG.l) may include a shaper circuit 600. The shaper circuit 600 may include a signal amplifier 206 coupled to an input 208 and an output 210, and a feedback capacitor 204 coupled in parallel to the signal amplifier 206; and an active feedback circuit 604 coupled in parallel to the signal amplifier 206 and the feedback capacitor 204. The active feedback circuit 604 may include a common gate amplifier 602.

[0038] Thus, the active feedback circuit 604 may include a transistor having a source terminal coupled to the output 210, a drain terminal coupled to the input 208 and a current source 608, and a gate terminal configured as a common gate (Vbias) •

[0039] The input signal for the signal amplifier 206 may be lower than the output signal of the signal amplifier 206.

[0040] The signal amplifier 206 may be an operational transconductance amplifier, OTA (see FIG.11) . The OTA may include a first terminal coupled to the input 208 and a second terminal coupled to the output 210.

[0041] Alternatively, the signal amplifier 206 may be a differential stage. The signal amplifier 206 may include a first terminal coupled to the input and a second terminal coupled to a voltage reference Vref. The output provided by the signal amplifier 206 may correspond to a voltage difference between the first terminal and the second terminal.

[0042] The output of the shaper CM or baseline may be set as high as possible for maximum output swing. FIG.7 illustrates a shaper output level shift 700. Level shifting the shaper output Vout before applying to the active feedback transistor 602 may limit the output swing by a resistance 702 and a level shifting current source Is. This may effectively set the baseline to a lower value.

[0043] Thus, the active feedback circuit 604 further may include an output level shifter 710 preceding the common gate amplifier 602.

[0044] In other words, as illustrated in FIG.7 for the differential stage 206, the signal amplifier 206 may include a first terminal coupled to the input 208 and a second terminal coupled to a voltage reference Vref. The output provided by the signal amplifier 206 corresponds to a voltage difference between the first terminal and the second terminal. The output level shifter 710 may include a resistor 702 and a level shifting current source 708. The source terminal of the transistor may be coupled to a node between the resistor 702 and the level shifting current source 708.

[0045] Alternatively, the active feedback circuit 800 may include a down scaler 802 that scales down the baseline along with the swing at the active feedback transistor 602. FIG.8 illustrates an active feedback with an input down scaler. The input down scaler may include a resistor divider 804, 806 preceding the active feedback 602.

[0046] That is, the active feedback circuit 604 further may include a down scaler 802 preceding the common gate amplifier 602. The down scaler 802 may include a resistor divider preceding the common gate amplifier 602. For example, for a differential stage 206, the signal amplifier 206 may include a first terminal coupled to the input and a second terminal coupled to a voltage reference. The output provided by the signal amplifier 206 corresponds to a voltage difference between the first terminal and the second terminal. The down scaler 802 may include a first resistor 806 and a second resistor 804, wherein the source terminal of the transistor may be coupled to a node between the first resistor 806 and the second resistor 804.

[0047] The resistors 804, 806 may be small to make the corresponding pole negligible. Thus, the input down scaler may load the high output impedance shaper OTA 206 considerably.

[0048] In another embodiment, a buffer 902, 904 may isolate the resistor divider 804, 806 from the shaper OTA 206. FIG.9 illustrates an active feedback with buffered down scaler.

[0049] The buffer 902, 904 may include a transistor 902 having a gate coupled to the output of the signal amplifier 206, and a source coupled to the output 210 and a current source 904 may be configured to isolate the resistor divider 804, 806 from the common gate amplifier 602. The buffer 902, 904 may also remove a capacitance from routing and a discriminator from the shaper 206 which enhances its speed. Another benefit of downscaling at the active feedback transistor 602 is that it becomes more linear, making the overall shaper frequency response more consistent over the whole energy range.

[0050] In order to set the common gate transistor gate bias Vbias in a way that the desired shaper baseline is reached a replica circuit 1010 may be provided as shown in FIG. 10. Thus, FIG.10 illustrates an active feedback with a buffered down scaler and replica biasing.

[0051] Here, the common gate transistor (Mafb) 602 is replicated (Mafb repiica) , e.g. scaled in size and bias current. The gate voltage Vbiasof the common gate transistor 602 may be set in a feedback loop such that the source is equal to a desired reference voltage Vreb2 •

[0052] In other words, the common gate amplifier 602 may be a first common gate amplifier 602, and the active feedback circuit 604 further may include replica circuit 1010 including a second common gate amplifier 1002 matching to the first common gate amplifier 602, wherein the gate terminal of the first common gate amplifier 602 may be coupled to the gate terminal of the second common gate amplifier 1002. The replica circuit may be configured to replicate a voltage, e.g. a source-gate-voltage.

[0053] The source terminal of the second common gate amplifier 1002 may be coupled to a first current source and the drain terminal of the second common gate amplifier 1002 may be coupled to a second current source.

[0054] The second common gate amplifier 602 matches the first common gate amplifier 602 in any one of size and bias current.

[0055] The replica circuit 1010 may be configured to set the common gate voltage of the first common gate amplifier 602 in a feedback loop such that the source voltage at the source terminal of the first common gate amplifier 602 may be equal to a desired reference voltage Vref2 of a differential stage 1008 of the replica circuit 1010.

[0056] FIG.11 illustrates a two stage photon counting frontend 1100 with active feedback 900 using single input transistor OTAs 400.

[0057] The frontend 5 may further include a current buffer 400 (CSA) including an input coupled to an input of the frontend circuit 5; and an output, and wherein the output of the CSA may be coupled to the input 208 of the shaper circuit 600.

[0058] A resistor 302-capacitance 304 (RC) circuit may be coupled between the output of the CSA and the input 208 of the frontend circuit 5

[0059] Note, that FIG.11 illustrated that the signal amplifier may be single input OTA instead of a differential stage as discussed above. Thus, different implementations of the signal amplifier may be combined with the embodiments of the shaper circuit describes above.

[0060] In the following some examples are described, which relate to what is described herein and shown in the figures.

[0061] Example 1 is a frontend circuit for a photo counting component. The frontend circuit includes a shaper circuit. The shaper circuit includes a signal amplifier coupled to an input and an output, and a feedback capacitor coupled in parallel to the signal amplifier; and an active feedback circuit coupled in parallel to the signal amplifier and the feedback capacitor. The active feedback circuit includes a common gate amplifier.

[0062] In Example 2, the subject matter of Example 1 can optionally include that the active feedback circuit includes a transistor having source terminal coupled to the output, a drain terminal coupled to the input and a gate terminal configured as a common gate .

[0063] In Example 3, the subject matter of Example 1 or 2 can optionally include that the input signal for the signal amplifier is lower than the output signal of the signal amp 1 i f i e r .

[0064] In Example 4, the subject matter of any one of Examples 1 to 3 can optionally include that the signal amplifier is an single input operational transconductance amplifier, OTA.

[0065] In Example 5, the subject matter of Example 4 can optionally include that the OTA includes a first terminal coupled to the input and a second terminal coupled to the output.

[0066] In Example 6, the subject matter of any one of Examples 1 to 3 can optionally include that the signal amplifier is a differential stage.

[0067] In Example 7, the subject matter of Example 6 can optionally include that the signal amplifier includes a first terminal coupled to the input and a second terminal coupled to a voltage reference, and wherein the output provided by the signal amplifier corresponds to a voltage difference between the first terminal and the second terminal.

[0068] In Example 8, the subject matter of any one of Examples 1 to 3 can optionally include that the active feedback circuit further includes an output level shifter preceding the common gate amplifier.

[0069] In Example 9, the subject matter of Example 8 can optionally include that the output level shifter includes a resistor and a level shifting current source, wherein a source terminal of the common gate amplifier is coupled to a node between the resistor and the level shifting current source. In Example 10 , the subj ect matter of any one of Examples 1 to 3 can optionally include that the active feedback circuit further includes a down scaler preceding the common gate amp 1 i f i e r .

[0070] In Example 11 , the subj ect matter of Example 10 can optionally include that the down scaler includes a resistor divider preceding the common gate ampli fier .

[0071] In Example 12 , the subj ect matter of Example 11 can optionally include that the resistor divider includes a first resistor and a second resistor, wherein a source terminal of the common gate ampli fier is coupled to a node between the first resistor and the second resistor .

[0072] In Example 13 , the subj ect matter of any one of Examples 11 to

[0073] 12 can optionally further include a buf fer configured to isolate the resistor divider from the common gate ampli fier .

[0074] In Example 14 , the subj ect matter of any one of Examples 1 to

[0075] 13 can optionally include that the common gate ampli fier is a first common gate ampli fier, and the active feedback circuit further includes replica circuit including a second common gate ampli fier matching to the first common gate ampli fier, wherein a gate terminal of the first common gate ampli fier is coupled to the gate terminal of the second common gate amp 1 i f i e r .

[0076] In Example 15 , the subj ect matter of Example 14 can optionally include that the replica circuit is configured to replicate a voltage

[0077] In Example 16 , the subj ect matter of any one of Examples 14 to 15 can optionally include that the source terminal of the second common gate ampli fier is coupled to a first current source and the drain terminal of the second common gate ampli fier is coupled to a second current source . In Example 17 , the subj ect matter of any one of Examples 14 to

[0078] 16 can optionally include that the second common gate ampli fier matches the first common gate ampli fier in any one of si ze and bias current .

[0079] In Example 18 , the subj ect matter of any one of Examples 14 to

[0080] 17 can optionally include that the replica circuit is configured to set the common gate voltage of the first common gate ampli fier in a feedback loop such that the source voltage at the source terminal of the first common gate ampli fier is equal to a desired reference voltage of a di f ferential stage of the replica circuit .

[0081] In Example 19 , the subj ect matter of any one of Examples 1 to

[0082] 18 can optionally further include a current buf fer, CSA, including an input coupled to an input of the frontend circuit ; and an output , and wherein the output of the CSA is coupled to the input of the shaper circuit .

[0083] In Example 20 , the subj ect matter of Example 19 can optionally include that further including a resistor-capacitance circuit coupled between the output of the CSA and the input of the frontend circuit

[0084] Example 21 is a photo counting component , including a photo detector configured to receive photons and a provide and output signal to an output , and a frontend circuit according to any one of Examples 1 to 20 wherein the input of the frontend circuit is coupled to the output of the photo detector .

[0085] In Example 22 , the subj ect matter of any one of Examples 1 to 3 can optionally further include a plurality o f analog-to- digital converters , ADC, coupled to the output of the frontend circuit .

[0086] In Example 23 , the subj ect matter of any one of Examples 1 to 3 can optionally further include a plurality of counters coupled to an ADC of the plurality of ADCs respectively . Example 24 is a medical imaging device, including a photo counting component of any one of Examples 21 to 23.

[0087] Example 25 is a spectroscopy device, including a photo counting component of any one of Examples 21 to 23.

[0088] Example 26 is a security scanner, including a photo counting component of any one of Examples 21 to 23.

[0089] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any example or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other examples or designs .

[0090] The words "plurality" and "multiple" in the description or the claims expressly refer to a quantity greater than one. The terms "group (of) ", "set [of] ", "collection (of) ", "series (of)", "sequence (of)", "grouping (of)", etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state "plurality" or "multiple" likewise refers to a quantity equal to or greater than one .

[0091] The term "connected" can be understood in the sense of a (e.g. mechanical, optical and / or electrical) , e.g. direct or indirect, connection and / or interaction. For example, several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain) .

[0092] While the above descriptions and connected figures may depict optical device components as separate elements, skilled persons will appreciate the various possibilities to combine or integrate discrete optical functions into a single element. Such may include combining two or more components from a single component . Conversely, skilled persons will recogni ze the possibility to separate a single element into two or more discrete elements , such as splitting a single component into two or more separate component .

[0093] It is appreciated that implementations of methods detailed herein are exemplary in nature , and are thus understood as capable of being implemented in a corresponding device . Likewise , it is appreciated that implementations of devices detailed herein are understood as capable of being implemented as a corresponding method . It is thus understood that a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method .

[0094] All acronyms defined in the above description additionally hold in all claims included herein .

[0095] While the disclosure has been particularly shown and described with reference to speci fic embodiments , it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims . The scope of the disclosure is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced .

[0096] Reference Numeral List

[0097] Vref, Vref2 reference Voltage

[0098] Cfb feedback capacitor

[0099] Rfb feedback resistor

[0100] 1 photons

[0101] 2 photon detector

[0102] 3 detector signal

[0103] 5 frontend

[0104] 6 output signal of frontend

[0105] 7 discriminator

[0106] 8 comparator

[0107] 9 counter

[0108] 10 photon counting component

[0109] 204 , Cfb feedback capacitor

[0110] 200 shaper circuit

[0111] 202 , Rfb feedback resistor

[0112] Clnof fset storage capacitor

[0113] 208 input

[0114] 210 output

[0115] 310 current buf fer

[0116] 302 , 702 , 804 , 806 resistor

[0117] 304 capacitor

[0118] 412 OTA

[0119] 416 single input

[0120] 502 active feedback

[0121] 600 frontend circuit

[0122] 602 common gate ampli fier

[0123] 604 shaper

[0124] 608 , 708 , 904 current source

[0125] 710 output level shi fter

[0126] 802 down scaler

[0127] 902 transistor

[0128] 1002 common gate ampli fier

[0129] 1008 di f ferential stage

[0130] 1010 replica circuit

Claims

CLAIMS1. A frontend circuit for a photo counting component, the frontend circuit comprising a shaper circuit comprising: a signal amplifier coupled to an input and an output, and a feedback capacitor coupled in parallel to the signal amplifier; and an active feedback circuit coupled in parallel to the signal amplifier and the feedback capacitor, wherein the active feedback circuit comprises a common gate amp 1 i f i e r .

2. The frontend circuit of claim 1, wherein the signal amplifier is a single input operational transconductance amplifier, OTA.

3. The frontend circuit of claim 1, wherein the signal amplifier is a differential stage, wherein the signal amplifier comprises a first terminal coupled to the input and a second terminal coupled to a voltage reference, and wherein the output provided by the signal amplifier corresponds to a voltage difference between the first terminal and the second terminal.

4. The frontend circuit of any one of claims 1 to 3, the active feedback circuit further comprising an output level shifter preceding the common gate amplifier; and wherein the output level shifter comprises a resistor and a level shifting current source, wherein a source terminal of the common gate amplifier is coupled to a node between the resistor and the level shifting current source.

5. The frontend circuit of any one of claims 1 to 3, the active feedback circuit further comprising a down scaler preceding the common gate amplifier, wherein the down scaler comprises a resistor divider preceding the common gate amplifier.

6. The frontend circuit of claim 5 , wherein the resistor divider comprises a first resistor and a second resistor, wherein a source terminal of the common gate ampli fier is coupled to a node between the first resistor and the second resistor .7 . The frontend circuit of claims 5 or 6 , further comprising a buf fer configured to isolate an output of the shaper circuit from the resistor divider .8 . The frontend circuit of any one claims 1 to 7 , wherein the common gate ampli fier is a first common gate ampli fier, and the active feedback circuit further comprises a replica circuit comprising a second common gate ampli fier matching to the first common gate ampli fier, wherein the gate terminal of the first common gate ampli fier is coupled to the gate terminal of the second common gate ampli fier .

9. The frontend circuit of claim 8 , wherein the replica circuit is configured to replicate a voltage , wherein the replica circuit is configured to set the common gate voltage of the first common gate ampli fier in a feedback loop such that the source voltage at the source terminal of the first common gate ampli fier is equal to a desired reference voltage .10 . The frontend circuit of claim 9 , wherein the source terminal of the second common gate ampli fier is coupled to a first current source and the drain terminal of the second common gate ampli fier is coupled to a second current source .11 . The frontend circuit of any one of claims 8 to 10 , wherein the second common gate ampli fier matches the first common gate ampli fier in any one of si ze and bias current .

12. The frontend circuit of any one of claims 1 to 11, further comprising a current buffer, CSA, comprising an input coupled to an input of the frontend circuit; and an output, and wherein the output of the CSA is coupled to the input of the shaper circuit.

13. The frontend circuit of claim 11, further comprising a resistor-capacitance circuit coupled between the output of the CSA and the input of the frontend circuit.

14. A photo counting component, comprising a photo detector configured to receive photons and a provide and output signal to an output, and a frontend circuit according to any one of claims 1 to 12; wherein the input of the frontend circuit is coupled to the output of the photo detector.

15. The photo counting component of claim 14, further comprising a plurality of analog-to-digi tai converters, ADC, coupled to the output of the frontend circuit; and a plurality of counters coupled to one ADC of the plurality of ADCs respectively.

16. A medical imaging device, comprising a photo counting component of any one of claims 14 or 15.

17. A spectroscopy device, comprising a photo counting component of any one of claims 14 or 15.

18. A security scanner, comprising a photo counting component of any one of claims 14 or 15.

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