Display device, electronic apparatus, method for manufacturing display device, and method for manufacturing electronic apparatus
The flexible display device with polyimide and tungsten oxide release layers addresses the need for larger display areas and smaller non-display regions, enhancing the size and weight reduction of electronic devices by ensuring reliable wiring arrangements.
Patent Information
- Application Number
- PCT/IB2025/056819
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-12
- Filing Date
- 2025-07-07
- Publication Date
- 2026-01-15
AI Technical Summary
There is a demand for display devices with larger display areas and smaller non-display, peripheral, or bezel areas to reduce the size and weight of electronic devices, while ensuring reliable wiring arrangement and manufacturing methods.
A flexible display device with distinct regions for display and folding, utilizing polyimide and tungsten oxide release layers, and insulating films for seamless manufacturing, including elements like pixel regions and connection terminals.
The solution enables display devices with wide display areas and narrow non-display, peripheral, or bezel areas, facilitating smaller and lighter electronic devices with reliable wiring arrangements.
Smart Images

Figure IB2025056819_15012026_PF_FP_ABST
Abstract
Description
Display device, electronic device, display device manufacturing method, and electronic device manufacturing method
[0001] One aspect of the present invention relates to a display device and a method for manufacturing the display device.
[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, an operating method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. Therefore, specific examples of the technical field of one embodiment of the present invention disclosed in this specification include semiconductor devices, display devices (including liquid crystal display devices), light-emitting devices, power storage devices, imaging devices, memory devices, signal processing devices, sensors, input devices (e.g., touch sensors), output devices, input / output devices (e.g., touch panels), processing devices (including processors), electronic devices, systems, operation methods thereof, manufacturing methods thereof, and inspection methods thereof.
[0003] In recent years, various display devices have been developed. For example, display devices in which transistors and display elements are formed on a glass substrate have been developed. Alternatively, flexible display devices have been developed. For example, display devices in which transistors and display elements are arranged on a flexible supporting substrate have been developed. Flexible display devices can be bent (see Patent Document 1 and Patent Document 2).
[0004] JP 2017-219844 A JP 2017-98020 A
[0005] Takashi Koida, "High Mobility Transparent Conductive Film," National Institute of Advanced Industrial Science and Technology, AIST Photovoltaic Power Generation Research Results Report 2019, Internet <URL: https: / / unit.aist.go.jp / rpd-envene / PV / ja / results / 2019 / oral / T13.pdf>
[0006] Electronic devices such as smartphones, notebook personal computers, tablet computers, televisions, and monitors are typically equipped with display devices. In such cases, it is preferable for the display area of the display device to be large. If the display area is large, it is possible to display larger or more characters and images in the display area. This makes it easier for users of the electronic device to view the characters and images displayed in the display area. For these reasons, there is a demand for display devices to have a larger display area.
[0007] On the other hand, from another perspective, widening the display area of a display device can be considered to mean narrowing the non-display area of the display device. Alternatively, the non-display area of a display device can be considered to be the area surrounding the display area. Therefore, widening the display area can be considered to mean narrowing the peripheral area. Alternatively, the non-display area of a display device can be considered to be the bezel area (frame area). Therefore, widening the display area can be considered to mean narrowing the bezel area (frame area). Furthermore, if the non-display area, peripheral area, or bezel area of a display device is narrowed, the size of an electronic device incorporating the display device can be reduced accordingly. If the size of an electronic device is reduced, the weight of the electronic device can be reduced. If an electronic device is smaller or lighter, it becomes easier for users of the electronic device to hold it. For these reasons, there is a demand for narrowing the non-display area, peripheral area, or bezel area of a display device. Alternatively, there is a demand for reducing the size of the electronic device. Alternatively, there is a demand for reducing the weight of the electronic device.
[0008] In view of the above, an object of one embodiment of the present invention is to provide a display device with a large display area and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a display device with a small non-display area and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a display device with a small peripheral area and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a display device with a small bezel area and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a highly reliable display device and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a display device in which wirings or the like can be smoothly arranged and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide an electronic device including the display device and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide an electronic device with a small size. Another object of one embodiment of the present invention is to provide an electronic device with a light weight. Another object of one embodiment of the present invention is to provide a novel display device, a novel electronic device, or a manufacturing method thereof.
[0009] Note that the problem of one embodiment of the present invention is not limited to the above problem. The above problem does not preclude the existence of other problems. Note that other problems refer to problems not mentioned in this section. Problems not mentioned in this section can be derived by a person skilled in the art from the description in the specification, drawings, and the like, and can be appropriately extracted from these descriptions. Note that it is sufficient for one embodiment of the present invention to solve at least one of the above problem and other problems. Note that one embodiment of the present invention does not need to solve all of the above problem and other problems.
[0010] One embodiment of the present invention is a flexible display device having a first region and a second region, where the first region has a region where display can be performed, the second region has a region where the display device can be folded, and the second region has a region where no peeling layer is provided.
[0011] Another embodiment of the present invention is an electronic device including the above display device and a housing.
[0012] Alternatively, one aspect of the present invention is a method for manufacturing a display device having a first step and a second step, the second step being a step that comes after the first step, the first step having a step of peeling off a bent portion from a substrate, and the second step having a step of removing at least a portion of a peeling layer at the bent portion.
[0013] Another embodiment of the present invention is a method for manufacturing an electronic device. The electronic device includes a display device and a housing, and the display device is manufactured using any of the above-described methods for manufacturing a display device.
[0014] Alternatively, one embodiment of the present invention is a display device that has a first region and a second region, in which the first region has a part of a display panel, a first support substrate, and a first peeling layer, the second region has another part of the display panel, a second support substrate, and a second peeling layer, and the second region has a first part and a second part, in which the first part has a bendable region and does not have the second peeling layer, and the second part has the second support substrate and the second peeling layer.
[0015] In the above structure, at least one of the first release layer and the second release layer preferably contains polyimide.
[0016] In the above structure, at least one of the first release layer and the second release layer preferably contains tungsten or tungsten oxide.
[0017] In the above-described configuration, it is preferable that one or more of the first release layer and the second release layer have a first polyimide layer, a second polyimide layer, and an insulating film made of an inorganic material located between the first polyimide layer and the second polyimide layer.
[0018] In the above structure, it is preferable that a residue be present between the first peeling layer and the first support substrate, and the residue contain silicon.
[0019] In the above configuration, it is preferable that the display panel has an element portion and a connection terminal portion, the element portion has a pixel region, and the connection terminal portion has one or more selected from a protection circuit, an output switching circuit, an inspection circuit, a source driver circuit, and a gate driver circuit.
[0020] According to one embodiment of the present invention, a display device having a wide display area and a manufacturing method thereof can be provided. Alternatively, according to one embodiment of the present invention, a display device having a narrow non-display area and a manufacturing method thereof can be provided. Alternatively, according to one embodiment of the present invention, a display device having a narrow peripheral area and a manufacturing method thereof can be provided. Alternatively, according to one embodiment of the present invention, a display device having a narrow bezel area and a manufacturing method thereof can be provided. Alternatively, according to one embodiment of the present invention, a highly reliable display device and a manufacturing method thereof can be provided. Alternatively, according to one embodiment of the present invention, a display device in which wiring or the like can be smoothly arranged and a manufacturing method thereof can be provided. Alternatively, according to one embodiment of the present invention, an electronic device including the display device and a manufacturing method thereof can be provided. Alternatively, according to one embodiment of the present invention, an electronic device having a small size can be provided. Alternatively, according to one embodiment of the present invention, an electronic device having a light weight can be provided. Alternatively, according to one embodiment of the present invention, a novel display device, a novel electronic device, or a manufacturing method thereof can be provided.
[0021] Note that the effects of one embodiment of the present invention are not limited to the above-described effect. The above-described effect does not preclude the existence of other effects. Note that the other effects refer to effects not mentioned in this section. Effects not mentioned in this section can be derived by a person skilled in the art from the description in the specification, drawings, and the like, and can be appropriately extracted from these descriptions. Note that it is sufficient for one embodiment of the present invention to have at least one of the above-described effect and other effects. Therefore, one embodiment of the present invention may not have the above-described effect in some cases. Note that one embodiment of the present invention does not necessarily have all of the above-described effect and other effects.
[0022] FIG. 1 is an example of a plan view of a display device. FIG. 2 is an example of a plan view of a display device. FIG. 3 is an example of a plan view of a display device. FIG. 4 is an example of a plan view of a display device. FIG. 5 is an example of a plan view of a display device. FIG. 6 is an example of a plan view of a display device. FIG. 7 is an example of a plan view of a display device. FIG. 8 is an example of a plan view of a display device. FIG. 9 is an example of a plan view of a display device. FIG. 10 is an example of a plan view of a display device. FIGS. 11A, 11B, 11C, 11D, and 11E are examples of cross-sectional views of display devices. FIGS. 12A and 12B are examples of cross-sectional views of display devices. FIGS. 13A and 13B are examples of cross-sectional views of display devices. FIGS. 14A and 14B are examples of cross-sectional views of display devices. FIGS. 15A, 15B, and 15C are examples of cross-sectional views of display devices. 16A, 16B, 16C, 16D, 16E, 16F, and 16G are examples of cross-sectional views in a manufacturing method of a display device. 17A, 17B, 17C, and 17D are examples of plan views in a manufacturing method of a display device. 18A and 18B are examples of plan views in a manufacturing method of a display device. 19A, 19B, 19C, and 19D are examples of plan views in a manufacturing method of a display device. 20A, 20B, 20C, and 20D are examples of plan views in a manufacturing method of a display device. 21A, 21B, 21C, 21D, 21E, and 21F are examples of cross-sectional views in a manufacturing method of a display device. 22A, 22B, 22C, 22D, and 22E are examples of cross-sectional views in a manufacturing method of a display device. 23A, 23B, and 23C are examples of plan views in a manufacturing method of a display device. FIGS. 24A and 24B are examples of plan views in a manufacturing method of a display device. FIGS. 25A, 25B, 25C, and 25D are examples of plan views in a manufacturing method of a display device. FIGS. 26A, 26B, 26C, and 26D are examples of plan views in a manufacturing method of a display device. FIG. 27 is an example of a cross-sectional view of a display device. FIG. 28 is an example of a cross-sectional view of a display device. FIG. 29 is an example of a cross-sectional view of a display device. FIG. 30 is an example of a cross-sectional view of a display device. FIG. 31 is an example of a cross-sectional view of a display device. FIG. 32 is an example of a cross-sectional view of a display device.FIG. 33 is an example of a cross-sectional view of a display device. FIG. 34 is an example of a cross-sectional view of a display device. FIG. 35 is an example of a cross-sectional view of a display device. FIG. 36 is an example of a cross-sectional view of a display device. FIG. 37 is an example of a cross-sectional view of a display device. FIG. 38 is an example of a cross-sectional view of a display device. FIG. 39 is an example of a cross-sectional view of a display device. FIG. 40 is an example of a cross-sectional view of a display device. FIG. 41 is an example of a cross-sectional view of a display device. FIG. 42 is an example of a cross-sectional view of a display device. FIG. 43 is an example of a cross-sectional view of a display device. FIG. 44 is an example of a cross-sectional view of a display device. FIG. 45 is an example of a cross-sectional view of a display device. FIG. 46 is an example of a cross-sectional view of a display device. FIG. 47 is an example of a cross-sectional view of a display device. FIG. 48 is an example of a cross-sectional view of a display device. FIG. 49 is an example of a cross-sectional view of a display device. FIG. 50 is an example of a cross-sectional view of a display device. FIG. 51 is an example of a cross-sectional view of a display device. FIG. 52 is an example of a cross-sectional view of a display device. FIG. 53 is an example of a cross-sectional view of a display device. FIG. 54 is an example of a cross-sectional view of a display device. FIG. 55 is an example of a cross-sectional view of a display device. FIG. 56 is an example of a cross-sectional view of a display device. FIGS. 57A and 57B are examples of cross-sectional views of a display device. FIG. 58 is an example of a cross-sectional view of a display device. FIG. 59 is an example of a cross-sectional view of a display device. FIG. 60 is an example of a cross-sectional view of a display device. FIG. 61 is an example of a cross-sectional view of a display device. FIG. 62 is an example of a cross-sectional view of a display device. FIG. 63 is an example of a cross-sectional view of a display device. FIG. 64 is an example of a cross-sectional view of a display device. FIG. 65 is an example of a cross-sectional view of a display device. FIG. 66 is an example of a cross-sectional view of a display device. FIG. 67 is an example of a cross-sectional view of a display device. FIGS. 68A, 68B, 68C, 68D, 68E, 68F, 68G, 68H, and 68I are diagrams showing examples of electronic devices. 69A and 69B are diagrams illustrating the carrier concentration dependence of Hall mobility, and Fig. 69C is a cross-sectional view illustrating an indium oxide film.
[0023] In this specification and the like, a semiconductor device refers, for example, to a device that utilizes semiconductor characteristics. Alternatively, a semiconductor device refers, for example, to a circuit including a semiconductor element (e.g., a transistor, a diode, or a photodiode), or a device having such a circuit. Alternatively, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. An example of a semiconductor device is an integrated circuit. Another example of a semiconductor device is a chip including an integrated circuit. Another example of a semiconductor device is an electronic component in which a chip is housed in a package. Alternatively, for example, a memory device, a display device, a light-emitting device, a lighting device, and an electronic device may themselves be a semiconductor device, or may include a semiconductor device.
[0024] In this specification, ordinal numbers such as "first," "second," and "third" are used, for example, to avoid confusion between components. Therefore, ordinal numbers do not limit the number of components. Nor do ordinal numbers limit the order of components. For example, a component referred to as "first" in one embodiment of this specification may be referred to as "second" in another embodiment or in the claims. For example, a component referred to as "first" in one embodiment of this specification may be omitted in another embodiment or in the claims. Even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims to avoid confusion between components. Even if a term has an ordinal number in this specification, a different ordinal number may be added in the claims. Even if a term has an ordinal number in this specification, the ordinal number may be omitted in the claims.
[0025] In this specification and the like, a structure in which at least light-emitting layers are separately fabricated in light-emitting elements (also referred to as light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. The SBS structure allows the materials and configuration to be optimized for each light-emitting element. This increases the degree of freedom in selecting materials and configurations. As a result, it becomes easier to improve brightness and reliability.
[0026] In this specification and the like, a light-emitting element, for example, has a light-emitting layer between a pair of electrodes. In this specification and the like, a light-emitting element, for example, has an EL layer between a pair of electrodes. The EL layer may have an inorganic EL layer or an organic EL layer. The EL layer has at least a light-emitting layer. Here, examples of layers (also referred to as functional layers) included in the EL layer include a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), and a carrier block layer (hole block layer and electron block layer). The carrier injection layer, the carrier transport layer, and the carrier block layer may not be clearly distinguishable from each other depending on their cross-sectional shapes, characteristics, etc. In addition, one layer may have two or three functions of the carrier injection layer, the carrier transport layer, and the carrier block layer. In addition, the light-emitting element may include a quantum dot (QDOT) material.
[0027] In this specification and the like, a light-receiving element (also referred to as a light-receiving device) has, as an example, an active layer that functions as at least a photoelectric conversion layer between a pair of electrodes.
[0028] In this specification, a tapered shape refers to, for example, a shape in which at least a portion of the side surface of a structure is inclined relative to the substrate surface or the surface on which the structure is to be formed. For example, it is preferable to have a region in which the angle (also referred to as the taper angle) between the inclined side surface and the substrate surface or the surface on which the structure is to be formed is less than 90 degrees. Note that the side surface of the structure, the substrate surface, and the surface on which the structure is to be formed do not necessarily have to be completely flat, and may be approximately planar with a slight curvature or approximately planar with a slight unevenness.
[0029] In this specification, when the side surface of a layer has a tapered shape, the outermost portion of the side surface of the layer is referred to as the edge of the layer. For example, when the bottom surface edge of the layer is located outside the top surface edge, the bottom surface edge of the layer is simply referred to as the edge.
[0030] In this specification, terms indicating position, such as "above" and "below," may be used for convenience in describing the positional relationship between components with reference to the drawings. Alternatively, the positional relationship between components may change as appropriate depending on the direction in which each configuration is depicted. Therefore, these terms or positional relationships are not limited to those described in the specification, but may be rephrased appropriately depending on the situation. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing by 180 degrees.
[0031] Note that the terms "above" and "below" do not limit the positional relationship between components to being directly above or directly below and in direct contact with each other. For example, in the expression "electrode B on insulating layer A," electrode B may be formed on insulating layer A in direct contact with the insulating layer A. However, one embodiment of the present invention is not limited to this. For example, in the expression "electrode B on insulating layer A," electrode B does not need to be formed on insulating layer A in direct contact with the insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B. Similarly, in the expression "electrode B above insulating layer A," electrode B may be formed on insulating layer A in direct contact with the insulating layer A. However, one embodiment of the present invention is not limited to this. For example, in the expression "electrode B above insulating layer A," electrode B does not need to be formed on insulating layer A in direct contact with the insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B. Similarly, in the expression "electrode B below insulating layer A," electrode B may be formed below insulating layer A in direct contact with the insulating layer A. However, one embodiment of the present invention is not limited to this. For example, the expression "electrode B below insulating layer A" does not require that electrode B be formed directly below insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B.
[0032] In this specification, terms such as "overlap" do not limit the state of the stacking order of components, etc. For example, the expression "electrode B overlapping insulating layer A" does not limit the state in which electrode B is formed on insulating layer A, but does not exclude the state in which electrode B is formed under insulating layer A or the state in which electrode B is formed on the right (or left) side of insulating layer A, etc.
[0033] In this specification and drawings, the components of the present invention may be classified by function and shown as independent elements. However, because it is difficult to separate the components by function, a single element may be involved in multiple functions. Alternatively, because it is difficult to separate the components by function, a single function may be involved across multiple elements. Therefore, the elements shown in this specification and drawings are not limited to the descriptions therein and may be rephrased appropriately depending on the situation.
[0034] In this specification, terms such as "row" and "column" may be used to describe components arranged in a matrix and their positional relationships. Alternatively, the positional relationships between components may change as appropriate depending on the direction in which each component is depicted. Therefore, these terms or positional relationships are not limited to those described in the specification, but may be rephrased appropriately depending on the situation. For example, the expression "row direction" may be rephrased as "column direction" by rotating the orientation of the drawing by 90 degrees.
[0035] In this specification and the like, the terms "film" and "layer" may be interchangeable in some cases or depending on the situation. For example, the term "conductive layer" may be interchangeable with the term "conductive film." Or, for example, the term "insulating film" may be interchangeable with the term "insulating layer." Or, in some cases or depending on the situation, the terms "film" and "layer" may not be used and may be interchangeable with other terms. For example, the terms "conductive layer" or "conductive film" may be interchangeable with the term "conductor." Or, for example, the terms "insulating layer" or "insulating film" may be interchangeable with the term "insulator."
[0036] It should be noted that the terms "electrode," "wiring," and "terminal" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" or "wiring" include cases where multiple "electrodes" or "wirings" are integrally formed. Alternatively, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes cases where one or more selected from "electrode," "wiring," and "terminal" are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal," and a "terminal" can be part of a "wiring" or "electrode." Alternatively, the terms "electrode," "wiring," or "terminal" may be replaced with the term "region" in some cases.
[0037] In this specification and the like, terms such as "wiring," "signal line," and "power line" may be interchangeable depending on the circumstances. For example, the term "wiring" may be changed to the term "signal line." Or, for example, the term "wiring" may be changed to a term such as "power line." Or, vice versa, terms such as "signal line" or "power line" may be changed to the term "wiring." A term such as "power line" may be changed to the term "signal line." Or, vice versa, a term such as "signal line" may be changed to the term "power line." Or, the term "potential" applied to a wiring may be changed to the term "signal" depending on the circumstances. Or, vice versa, the term "signal" may be changed to the term "potential."
[0038] In this specification and the like, terms such as "potential," "voltage," and "potential difference" may be interchangeable in some cases or depending on the situation. For example, the term "potential" may be changed to the term "voltage." Or, for example, the term "voltage" may be changed to a term such as "potential difference." Or, the term "voltage" applied to a wiring may be changed to the term "signal" in some cases or depending on the situation. Or, vice versa, the term "signal" may be changed to the term "voltage."
[0039] In this specification and the like, a high power supply potential VDD (hereinafter also simply referred to as "VDD") may refer to a power supply potential that is higher than a low power supply potential VSS, for example. A low power supply potential VSS (hereinafter also simply referred to as "VSS") may refer to a power supply potential that is lower than a high power supply potential VDD, for example. Note that a ground potential GND (hereinafter also simply referred to as "GND") may also be used as VDD or VSS. For example, when VDD is GND, VSS may be a lower potential than GND, and when VSS is GND, VDD may be a higher potential than GND.
[0040] Furthermore, in this specification and the like, the terms "high-level potential" and "low-level potential" do not mean specific potentials. For example, when two wirings are both described as "functioning as wirings that supply a high-level potential," the high-level potentials provided by both wirings do not have to be equal to each other. Similarly, when two wirings are both described as "functioning as wirings that supply a low-level potential," the low-level potentials provided by both wirings do not have to be equal to each other.
[0041] In this specification, the "on state" of a transistor may refer, for example, to a state in which the source and drain of the transistor are in a conductive state (a state in which current can flow) or a state in which current can flow between the source and drain of the transistor. On the other hand, the "off state" of a transistor may refer, for example, to a state in which the source and drain of the transistor are in a non-conductive state (a state in which the flow of current can be considered to be blocked). Alternatively, the "off state" of a transistor may refer, for example, to a state in which no current flows between the source and drain of the transistor even when the potential of the source and the potential of the drain are different.
[0042] In this specification, for example, the term "on-state current" may refer to a current that flows between a source and a drain when a transistor is on. The term "off-state current" may refer to a current that flows between a source and a drain when a transistor is off.
[0043] In this specification and the like, for example, the potential H is a potential that turns on an n-channel field effect transistor (also referred to as an "n-type transistor"). Alternatively, for example, the potential H is a potential that turns off a p-channel field effect transistor (also referred to as a "p-type transistor"). Alternatively, for example, the potential L is a potential that turns off an n-type transistor. Alternatively, for example, the potential L is a potential that turns on a p-type transistor. Thus, for example, the potential H is a potential higher than the potential L. For example, the potential H may be equal to VDD. For example, the potential L may be equal to VSS. Alternatively, for example, the potential L may be equal to GND. Note that the transistor described in this specification is, for example, an enhancement-type (normally-off) n-type transistor. However, one embodiment of the present invention is not limited thereto.
[0044] In drawings, for example, to clearly indicate the potential of a wiring, an electrode, or the like, an "H" indicating a potential H or an "L" indicating a potential L may be added next to the wiring, the electrode, or the like. Alternatively, for example, a wiring, an electrode, or the like in which a potential change occurs may be surrounded by "H" or "L." Alternatively, for example, when a transistor is in an off state, an "x" symbol may be added next to the transistor. Alternatively, for example, an arrow indicating the direction of current flow may be added next to the wiring, the circuit element, or the like.
[0045] In this specification, when referring to counting values and measurement values, terms such as "identical," "same," "equal," or "uniform" (including synonyms thereof) are used, this includes an error of plus or minus 10%, for example.
[0046] In addition, in drawings and the like relating to this specification, arrows indicating the X direction, Y direction, and Z direction may be used. In this specification and the like, the "X direction" refers, for example, to a direction along the X axis, and the forward direction and the reverse direction may not be distinguished. The same applies to the "Y direction" and the "Z direction." In addition, the X direction, Y direction, and Z direction, for example, are directions that intersect with each other. More specifically, the X direction, Y direction, and Z direction, for example, are directions that are perpendicular to each other. In this specification and the like, one of the X direction, Y direction, and Z direction may be referred to, for example, as the "first direction" or "first direction." In addition, the other may be referred to, for example, as the "second direction" or "second direction." In addition, the remaining one may be referred to, for example, as the "third direction" or "third direction."
[0047] In this specification, etc., "capacitance" refers to, for example, a configuration in which two electrodes face each other via an insulator (dielectric). In this specification, etc., "capacitance element" refers to, for example, the above-mentioned "capacitance." Alternatively, in this specification, etc., "capacitance element" may refer to, for example, a configuration in which two electrodes face each other via an insulator. Alternatively, in this specification, etc., "capacitance element" may refer to, for example, a configuration in which two wires face each other via an insulator. Alternatively, in this specification, etc., "capacitance element" may refer to, for example, a configuration in which two wires are arranged via an insulator. Furthermore, in this specification, for example, one electrode of a capacitance element may be referred to as a "first terminal of the capacitance element," and the other electrode may be referred to as a "second terminal of the capacitance element."
[0048] In addition, in this specification, a "switch" refers to, for example, a switch having multiple terminals and a function of switching (selecting) between a conductive state and a non-conductive state between the terminals. For example, when a switch has two terminals and both terminals are conductive or allow current to flow between them, the switch is said to be in an "on state." When both terminals are non-conductive or allow current to flow despite a potential difference between the two terminals, the switch is said to be in an "off state." Note that switching between a conductive state or a non-conductive state, or maintaining one of a conductive state or a non-conductive state, may be referred to as "controlling the conductive state." Note that in this specification, for example, when a switch has two terminals, one terminal may be referred to as a "first terminal of the switch" and the other terminal as a "second terminal of the switch." Note that in this specification, when a switch has a terminal that controls the on state or the off state, the terminal may be referred to as a control terminal. In this specification, for example, when a switch has a terminal that controls an on state or an off state, the terminal may be called a gate. In this specification, for example, when a switch has two terminals and a control terminal, one terminal may be called a "first terminal of the switch," the other terminal may be called a "second terminal of the switch," and the control terminal may be called a "control terminal of the switch."
[0049] In other words, a switch, for example, refers to a device that has a function of controlling a conduction state. Alternatively, a switch, for example, refers to a device that has a function of selecting and switching a path through which a current flows. Therefore, a switch may have two or more terminals through which a current flows, in addition to a control terminal. Note that examples of switches include electrical switches and mechanical switches. In other words, a switch is not limited to a specific configuration as long as it can control a current.
[0050] Examples of switches that can be used include electrical switches and mechanical switches. Examples of electrical switches include transistors (e.g., bipolar transistors, MOS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, diode-connected transistors, etc.), and logic circuits that combine these. When a transistor is used as a switch, the "conductive state" of the transistor refers, for example, to a state in which the source and drain of the transistor are considered to be short-circuited. The "non-conductive state" of the transistor refers, for example, to a state in which the source and drain of the transistor are considered to be electrically disconnected. When a transistor is operated simply as a switch, for example, the polarity (conductivity type) of the transistor is not particularly limited.
[0051] An example of a mechanical switch is a switch that uses MEMS (microelectromechanical systems) technology. The switch has an electrode that can be mechanically moved, and the movement of the electrode selects a conductive state or a non-conductive state.
[0052] In this specification, "connection" includes, for example, "electrical connection."
[0053] When the term "electrical connection" is used to define the connection relationship between circuit elements as an object, it includes, for example, "direct connection" and "indirect connection." For example, "A and B are directly connected" refers to a connection between A and B without the intervention of a circuit element (e.g., a transistor or a switch; wiring is not considered a circuit element). On the other hand, for example, "A and B are indirectly connected" refers to a connection between A and B via one or more circuit elements. Note that A, B, and C, which will be described later, represent objects such as elements, circuits, wiring, electrodes, terminals, semiconductor layers, and conductive layers.
[0054] Here, when "A and B are indirectly connected," it refers to the following connection relationship, for example. That is, assuming that a circuit is operating, if there is a time during the operation of the circuit when electrical signal transmission or potential interaction occurs between A and B, such a circuit can be defined as an entity, and "A and B are indirectly connected." Note that even if there is a time when electrical signal transmission or potential interaction does not occur between A and B, if there is a time during the operation of the circuit when electrical signal transmission or potential interaction occurs between A and B, it can be defined as "A and B are indirectly connected." Note that "A and B are indirectly connected" is a definition of the connection relationship between circuit elements as an entity. Therefore, for example, even when a power supply voltage is not supplied to a circuit and the circuit is not operating, the circuit can be defined as an entity, and "A and B are indirectly connected" (however, for example, this is limited to the case where electrical signal transmission or potential interaction occurs between A and B during the operation of the circuit when a power supply voltage is supplied to the circuit and the circuit is operating).
[0055] Specific examples of "indirect connection" are given below. First, an example of "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors. Another example of "A and B are indirectly connected" is when A and B are connected via one or more switches. When "A and B are indirectly connected," assuming that the circuit is operating, it is assumed that there is at least one time when one transistor between A and B is in an on state, a conductive state, or a state in which current can flow. Note that "A and B are indirectly connected" also includes cases where there is a time when one transistor between A and B is in an off state or a non-conductive state. When "A and B are indirectly connected," if multiple transistors are connected between A and B, it is assumed that there is at least one time when each of the multiple transistors between A and B is in an on state, a conductive state, or a state in which current can flow, assuming that the circuit is operating. In other words, when "A and B are indirectly connected," it is not necessary for all of the multiple transistors to be in an on state, a conductive state, or a state in which current can flow simultaneously. Therefore, when "A and B are indirectly connected," it also includes cases where the multiple transistors between A and B are in an off state or a non-conductive state at the same time or at different times. As another example, when A and C are connected via the source and drain of transistor TrP and B and C are connected via the source and drain of transistor TrQ, it can be defined as "A and C are indirectly connected," "B and C are indirectly connected," or "A and B are indirectly connected." However, as will be described later, when a constant potential V is supplied to C from a power supply, GND, or the like, it can be said that "A and C are indirectly connected" or "B and C are indirectly connected," but it cannot be said that "A and B are indirectly connected."
[0056] While we have provided examples of cases where an "indirect connection" can and cannot be established, we will now provide another example of a case where an "indirect connection" cannot be established. Even if an electrical signal exchange or potential interaction occurs between A and B during the operation of the circuit, there are exceptional cases where it cannot be said that "A and B are indirectly connected." An example of such an exceptional case is when A and B are connected via an insulator. In other words, when A and B are connected via an insulator, it cannot be said that "A and B are indirectly connected." A specific example of a case where A and B are connected via an insulator is when a capacitive element is connected between A and B. Another example of a case where A and B are connected via an insulator is when a gate insulating film of a transistor is interposed between A and B. In this case, it cannot be said that "A (the gate of the transistor) and B (the source or drain of the transistor) are indirectly connected."
[0057] Another example of a case in which it cannot be said that "A and B are indirectly connected" is when there is no timing when an electrical signal is exchanged or when potential interaction occurs between A and B. For example, a path from A to B may have multiple transistors connected via their sources and drains, and a constant potential V is supplied to a node between the transistors from a power supply, GND, or the like. In this case, it cannot be said that "A and B are indirectly connected," but it is possible to say that "A and V are indirectly connected" or "B and V are indirectly connected." Note that if A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, and a constant potential V is supplied to C from a power supply, GND, or the like, it cannot be said that "A and B are indirectly connected," but it is possible to say that "A and C are indirectly connected" or "B and C are indirectly connected."
[0058] Although an example of "indirect connection" has been given above, as an example, the definition of "indirect connection" is included in the definition of "electrical connection," so if "A and B are indirectly connected," it can also be said that "A and B are electrically connected."
[0059] Next, specific examples of "direct connection" are shown. An example of "A and B are directly connected" is when A and B are connected without any circuit element between them. Note that when A and B are connected to a power supply that supplies a constant potential V or to GND without any circuit element between them, it can be said that "A and B are directly connected," "A and V are directly connected," or "B and V are directly connected." Note that even when A (or B) is connected to a constant potential V via the source and drain of a transistor, it can still be said that "A and B are directly connected." Note that because A and V or B and V are connected via the source and drain of a transistor, they cannot be said to be directly connected, and it can be said that "A and V are indirectly connected" or "B and V are indirectly connected."
[0060] Although an example of "direct connection" has been given above, as an example, the definition of "direct connection" is included in the definition of "electrical connection," so when "A and B are directly connected," it can also be said that "A and B are electrically connected."
[0061] Note that one embodiment of the present invention includes a configuration in which at least one of a gate, a source, and a drain of one or more transistors is not connected to anything or is connected to any node. Another embodiment of the present invention includes a configuration in which nothing is input to one or more wirings or a configuration in which any signal or voltage is input to the wirings.
[0062] In this specification, the term "source" may refer to, for example, a source region, a source electrode, or a source wiring. The source region may refer to, for example, a region of a semiconductor layer having a resistivity equal to or lower than a certain value. The source electrode may refer to, for example, a conductive layer including a portion connected to the source region. The source wiring may refer to, for example, a conductive layer for connecting the source electrode of at least one transistor to another electrode or another wiring. Alternatively, the source wiring may be, for example, the same conductive layer as the source electrode of at least one transistor. The source wiring may also be called, for example, a source signal line, a video line, or a bit line.
[0063] In this specification, the term "drain" may refer to, for example, a drain region, a drain electrode, or a drain wiring. The drain region may refer to, for example, a region of a semiconductor layer whose resistivity is equal to or lower than a certain value. The drain electrode may refer to, for example, a conductive layer including a portion connected to the drain region. The drain wiring may refer to, for example, a conductive layer for connecting the drain electrode of a transistor to another electrode or another wiring. Alternatively, the drain wiring may be, for example, the same conductive layer as the drain electrode of at least one transistor.
[0064] Note that in this specification and the like, the term "gate" may refer to, for example, a gate electrode or a gate wiring. For example, the gate electrode refers to an electrode that overlaps with a semiconductor layer of a transistor and has a function of controlling the resistance value between the source and drain of the transistor depending on a supplied voltage. For example, the gate wiring refers to a conductive layer for connecting the gate electrode of a transistor to another electrode or another wiring. Alternatively, for example, the gate wiring may be the same conductive layer as the gate electrode of the transistor.
[0065] Note that in this specification and the like, one of the source or the drain of a transistor may be referred to as a "first terminal of the transistor," and the other of the source or the drain of the transistor may be referred to as a "second terminal of the transistor," for example.
[0066] Depending on the structure of a transistor, a back gate may be included in addition to a gate, a source, or a drain. In this case, in this specification, one of the gate or the back gate of the transistor may be referred to as a first gate, and the other of the gate or the back gate of the transistor may be referred to as a second gate. Furthermore, for the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, when a transistor has three or more gates, in this specification, the respective gates may be referred to as a first gate, a second gate, a third gate, etc.
[0067] For example, in this specification, a transistor having a multi-gate structure with two or more gate electrodes can be used as an example of a transistor. With a multi-gate structure, the channel formation regions are connected in series, resulting in a structure similar to that of multiple transistors connected in series. Therefore, the multi-gate structure can reduce the off-state current and improve the transistor's breakdown voltage (reliability). Alternatively, the multi-gate structure can provide voltage-current characteristics with a flat slope, such that the current between the drain and source does not change significantly even when the voltage between the drain and source changes when operating in the saturation region. For example, using voltage-current characteristics with a flat slope can realize an ideal current source circuit, an active load with a very high resistance, and the like. As a result, a differential circuit or a current mirror circuit with excellent characteristics can be realized. Note that a multi-gate transistor may be considered a single transistor even if it has multiple gate electrodes and channels.
[0068] Note that even when a single circuit element is shown on a circuit diagram, the circuit element may actually include multiple circuit elements. For example, when a circuit diagram shows one resistor, this includes two or more resistors connected directly in series. Furthermore, two or more resistors connected directly in series can be represented as a single resistor. For example, when a circuit diagram shows one capacitance element, this includes two or more capacitance elements connected directly in parallel. Furthermore, two or more capacitance elements connected directly in parallel can be represented as a single capacitance element. For example, when a circuit diagram shows one transistor, this includes two or more transistors connected directly in series with their sources and drains connected, and their gates connected directly. Furthermore, when two or more transistors connected directly in series with their sources and drains connected, and their gates connected directly, this can be represented as a single transistor. For example, when a circuit diagram shows one transistor, this includes two or more transistors connected directly with their first terminals connected directly to each other, their second terminals connected directly to each other, and their gates connected directly to each other. Furthermore, a configuration in which the first terminals of two or more transistors are directly connected to each other, the second terminals of each transistor are directly connected to each other, and the gates of each transistor are directly connected to each other can be represented as a single transistor.
[0069] Note that in this specification and the like, timing charts may be used to explain an operation method of a semiconductor device. The timing charts used in this specification and the like illustrate ideal operation examples, and the periods, magnitudes, and timings of signals (e.g., potentials or currents) described in the timing charts are not limited to these unless otherwise specified. The timing charts described in this specification and the like may change the magnitudes and timings of signals (e.g., potentials or currents) input to each wiring (including a node) in the timing chart, depending on the circumstances. For example, even if two periods are shown at equal intervals in a timing chart, the lengths of the two periods may be different. Alternatively, for example, even if one period is shown as long and the other as short, the lengths of the two periods may be equal, or one period may be short and the other may be long. Furthermore, to clearly illustrate the timing chart, for example, two or more overlapping signals may be intentionally shifted.
[0070] In this specification and the like, for example, a metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into, for example, oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors or simply as OSs), and the like. For example, when a metal oxide is contained in a channel formation region of a transistor, the metal oxide may be referred to as an oxide semiconductor. In other words, when a metal oxide can form a channel formation region of a transistor having at least one of an amplifying function, a rectifying function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor, for example. Furthermore, when an OS transistor is referred to as an OS transistor, it can be rephrased as a transistor including a metal oxide or an oxide semiconductor, for example.
[0071] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. For example, nitrogen-containing metal oxides may be referred to as metal oxynitrides.
[0072] In this specification and the like, the term "impurities" in a semiconductor refers to, for example, elements other than the main component constituting the semiconductor layer. For example, an element with a concentration of less than 0.1 atomic % is an impurity. The presence of impurities may cause one or more of the following: an increase in the defect level density of the semiconductor, a decrease in carrier mobility, and a decrease in crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main component, particularly, for example, hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen.
[0073] In this specification, "parallel" refers, for example, to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, an example of an angle of -5° or more and 5° or less is also included. Furthermore, "substantially parallel" or "roughly parallel" refers, for example, to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" refers, for example, to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, an example of an angle of 85° or more and 95° or less is also included. Furthermore, "substantially perpendicular" or "approximately perpendicular" refers, for example, to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.
[0074] In this specification and the like, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form one aspect of the present invention. Alternatively, when multiple configuration examples are shown in one embodiment, the configuration examples can be appropriately combined with each other.
[0075] Note that the content (or even a part of the content) described in one embodiment can be applied to, combined with, or substituted for at least one of another content (or even a part of the content) described in that embodiment and one or more other content (or even a part of the content) described in another embodiment. Note that the content described in an embodiment refers to the content described in each embodiment using various figures or the content described using text in the specification.
[0076] Furthermore, a figure (or even a part thereof) described in one embodiment can be combined with another part of that figure, another figure (or even a part thereof) described in that embodiment, and at least one figure (or even a part thereof) described in one or more other embodiments to form even more figures.
[0077] The embodiments described in this specification are explained with reference to the drawings. However, the embodiments can be implemented in many different ways, and those skilled in the art will readily understand that various changes in form and details can be made without departing from the spirit and scope of the invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments. Note that in the configuration of the invention of the embodiments, the same reference numerals are used in different drawings for the same parts or parts having similar functions, and repeated description thereof may be omitted. Alternatively, when referring to similar functions, the same hatch pattern may be used and no particular reference numeral may be assigned. Furthermore, in perspective views, etc., the illustration of some components may be omitted to ensure clarity of the drawings.
[0078] In this specification, when the same reference numeral is used for multiple elements, and particularly when it is necessary to distinguish between them, an identification symbol such as "_1", "[n]", "[m, n]" may be added to the reference numeral. Note that in drawings, when an identification symbol such as "_1", "[n]", "[m, n]" is added to a reference numeral, the identification symbol may not be added if it is not necessary to distinguish between them in this specification.
[0079] In addition, in the drawings of this specification, the size, layer thickness, or region may be exaggerated for clarity. Therefore, it is not necessarily limited to the scale. Note that the drawings are schematic illustrations of ideal examples, and are not limited to the shapes, values, etc. shown in the drawings.
[0080] Embodiment 1 In this embodiment, a display device according to one embodiment of the present invention will be described. For example, the display device according to one embodiment of the present invention can have flexibility.
[0081] FIG. 1 illustrates an example of a plan view of a display panel 101 according to one embodiment of the present invention. The display panel 101 includes, for example, a pixel region 102 and a connection portion 105. The pixel region 102 includes, for example, a plurality of pixels. In the pixel region 102, characters or images can be displayed using the plurality of pixels. The pixel includes, for example, a display element and a pixel circuit. The display element includes, for example, a light-emitting element, an organic EL element, an LED chip, a liquid crystal element, or the like. The pixel circuit includes, for example, a transistor. The connection portion 105 has, for example, a function of connecting the display panel 101 to an external circuit. The connection portion 105 has, for example, a function of connecting the display panel 101 to a flexible printed circuit (FPC). Examples of the external circuit include a source driver circuit, a controller circuit, a control circuit, an image processing circuit, a touch sensor control circuit, a CPU, or a GPU. The connection unit 105 can connect the above-mentioned external circuit or FPC to the display panel 101 using an anisotropic conductive film (ACF), conductive paste, conductive particles, tape automated bonding (TAB), chip on film (COF), chip on glass (COG), wire bonding, Cu-Cu connection, hybrid bonding, through silicon via (TSV), solder, or the like. A signal or voltage is transmitted from the above-mentioned external circuit or FPC to the pixel region 102 or the like via the connection unit 105. As a result, in the pixel region 102, characters or images can be displayed using a plurality of pixels.
[0082] Note that the display panel 101 can be divided into, for example, multiple regions or multiple parts. For example, as shown in FIG. 1 , the display panel 101 can be divided into a display portion 108, a folding portion 109, and a terminal portion 110. However, one embodiment of the present invention is not limited to this. For example, the display panel 101 may have other regions. Alternatively, the display panel 101 does not need to have at least one of these regions. Note that at least two of the display portion 108, the folding portion 109, and the terminal portion 110 may have overlapping regions. Therefore, for example, there may be a region where part of the display portion 108 and part of the folding portion 109 overlap. Alternatively, the display panel 101 may have a region that does not belong to any of the display portion 108, the folding portion 109, and the terminal portion 110.
[0083] 1, the display panel 101 has a wide region and a narrow region, the display unit 108 is provided in the wide region, and the bending portion 109 and the terminal portion 110 are provided in the narrow region. Therefore, compared with the width of the display unit 108, the width of the bending portion 109 and the width of the terminal portion 110 are narrower.
[0084] The display unit 108 has, for example, a pixel region 102. The region around the pixel region 102 may be called, for example, a peripheral region, a bezel, or a frame region. In part of the peripheral region, bezel, or frame region, for example, dummy pixels, a gate driver circuit, a source driver circuit, a protection circuit, a DeMUX (demultiplexer) (output switching) circuit, routing wiring, a sealing portion, a contact portion with the cathode of the light-emitting element, or a margin region for cutting the substrate is provided.
[0085] The terminal portion 110 includes, for example, a connection portion 105 .
[0086] Note that, for example, the display panel 101 may be bent at a bending portion 109 with the edge portion 104 as a boundary. In that case, for example, the terminal portion 110 is disposed on the back side of the display portion 108. Note that although the display panel 101 may be bent at the bending portion 109, one embodiment of the present invention is not limited thereto. For example, the display panel 101 does not have to be bent. Alternatively, for example, the display panel 101 may be bent in a region other than the bending portion 109.
[0087] Note that when the display panel 101 is folded, the display panel 101 may be folded at an angle of 180 degrees or an angle close to 180 degrees, for example. In that case, the terminal portion 110 is disposed on the back side of the display portion 108. However, one embodiment of the present invention is not limited to this. For example, when the display panel 101 is folded, the display panel 101 may be folded at any angle, for example, at an angle of 90 degrees or an angle close to 90 degrees. Alternatively, when the display panel 101 is folded at multiple positions, the folding angles may be different for each position.
[0088] When a portion of the display panel 101 is bent, it may be fixed in the bent state so as not to move. Alternatively, when a portion of the display panel 101 is bent, it may be folded once and then returned to a flat state. Alternatively, when a portion of the display panel 101 is bent, the angle at which it is bent may be changed as appropriate.
[0089] When the display panel 101 is bent at multiple locations, it may be fixed so as not to move while remaining in the bent state. Alternatively, when the display panel 101 is bent at multiple locations, at least one of the multiple locations may be fixed so as not to move. Alternatively, when the display panel 101 is bent at multiple locations, at least one of the multiple locations may be folded once and then returned to a flat state. Alternatively, when the display panel 101 is bent at multiple locations, at least one of the multiple locations may be folded once and then the folding angle may be changed.
[0090] In this way, for example, when the display panel 101 is folded at the folding portion 109 with the edge portion 104 as a boundary, the terminal portion 110 is disposed on the rear side of the display portion 108, for example. As a result, the size of the display panel 101 can be reduced. Therefore, for example, it is possible to provide a display device with a wide display area, a display device with a narrow non-display area, a display device with a narrow peripheral area, a display device with a narrow bezel area, an electronic device having such a display panel 101, a small electronic device, or a light-weight electronic device.
[0091] 1 shows an example in which the folding portion 109 is provided in a region of the display panel 101 whose horizontal width is narrower than that of the pixel region 102. By providing the folding portion 109 in the narrow region, the region in which the display panel 101 can be folded becomes smaller, thereby reducing defects caused by folding. As a result, the reliability of the display panel 101 can be improved.
[0092] Note that cross-sectional views corresponding to the cross-sectional portions 103 and 111 shown in FIG. 1 and the like will be described in a later embodiment.
[0093] FIG. 2 shows an example of the display panel 101 of FIG. 1 including a circuit 106. For example, the circuit 106 may be disposed closer to the pixel region 102 than the edge 104. In the example shown in FIG. 2, the circuit 106 is disposed between the edge 104 and the pixel region 102. Alternatively, the circuit 106 may be disposed in the display portion 108, for example. By disposing the circuit 106 in this manner, the circuit 106 can be disposed closer to the pixel region 102. Therefore, wiring connecting the circuit 106 and the pixel region 102 can be smoothly connected. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened.
[0094] Note that the circuit 106 may have at least one function of a protection circuit, an output switching circuit (DeMUX), an inspection circuit, a source driver circuit, or a gate driver circuit, for example.
[0095] Note that the circuit 106, elements included in the circuit 106, or wirings included in the circuit 106 can be manufactured simultaneously with the pixel region 102, for example. As a result, manufacturing costs can be reduced. Note that by using a transistor including an oxide semiconductor, such as indium oxide, in a channel formation region for the circuit 106, the circuit can operate at high speed.
[0096] FIG. 3 shows an example of the display panel 101 of FIG. 1 having a circuit 107. For example, the circuit 107 may be arranged closer to the connection portion 105 than to the edge portion 104. Alternatively, for example, the circuit 107 may be arranged in the terminal portion 110. By arranging the circuit 107 in this manner, when the display panel 101 is folded at the folding portion 109, the circuit 107 can be arranged on the back side of the display portion 108. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. In the example shown in FIG. 3, the circuit 107 is arranged in the terminal portion 110 and between the edge portion 104 and the connection portion 105.
[0097] Note that the circuit 107 may include at least one of the circuits described in the description of the circuit 106 .
[0098] 4 shows an example of the display panel 101 of FIG. 1 having a circuit 106 and a circuit 107. By arranging the circuit 106 in this manner, it is possible to arrange the circuit 106 near the pixel region 102. Furthermore, when the display panel 101 is folded at the folding portion 109, it is possible to arrange the circuit 107 on the back side of the display portion 108. As a result, it is possible to narrow the peripheral region, bezel, or frame region, or to widen the pixel region 102.
[0099] 4, the circuits 106 and 107 preferably have different functions, for example. For example, the output switching circuit (DeMUX) is preferably arranged closer to the pixel region 102 to facilitate a smoother wiring layout. Therefore, for example, the output switching circuit (DeMUX) is preferably included in the circuit 106. On the other hand, the source driver circuit may require a larger layout area, so it is preferably included in the circuit 107. Alternatively, the protection circuit is preferably arranged closer to the connection portion 105 to more easily prevent static electricity. Therefore, for example, the protection circuit is preferably included in the circuit 107. However, one embodiment of the present invention is not limited thereto.
[0100] Note that, for example, the circuit 106 or the circuit 107 is preferably configured using transistors (for example, LTPS transistors) of the same type as at least one of the transistors (for example, LTPS transistors) used in the pixel region 102. Similarly, for example, the transistors (for example, OS transistors) used in the circuit 106 are preferably formed simultaneously with at least one of the transistors (for example, OS transistors) used in the pixel region 102. When multiple types of transistors (for example, LTPS transistors and OS transistors) are used in the pixel region 102, the circuit 106 or the circuit 107 may be configured using any one or two of the multiple types of transistors. In this way, by using the same type of transistor as the pixel region 102 or transistors formed simultaneously in the circuit 106 or the circuit 107, the process can be simplified and the manufacturing cost can be reduced. Here, an LTPS transistor refers to a transistor having LTPS (low temperature polysilicon) in a channel formation region, and an OS transistor refers to a transistor having OS (oxide semiconductor) in a channel formation region, for example.
[0101] 1 to 4, the bent portion 109 is provided in a region where the width of the display panel 101 is narrower than that of the pixel region 102. However, one embodiment of the present invention is not limited to this.
[0102] FIG. 5 shows an example in which the area of the bending portion 109 in FIG. 2 has been changed. In FIG. 5, the circuit 106 is disposed within the bending portion 109. Therefore, the circuit elements in the circuit 106 are bent. This may result in a slight decrease in the reliability of the circuit elements. However, this configuration makes it possible to narrow the peripheral area, bezel, or frame area. Alternatively, it makes it possible to widen the pixel area 102. Alternatively, FIG. 5 shows an example in which the bending portion 109 is provided in a wide area of the display panel 101. As a result, it makes it possible to narrow the peripheral area, bezel, or frame area. Alternatively, it makes it possible to widen the pixel area 102.
[0103] 6 shows an example in which the circuit 106 in FIG. 5 is disposed in the terminal portion 110. In this case, the circuit 106 is not provided in the bent portion 109, and therefore the reliability of the circuit elements in the circuit 106 can be improved. Furthermore, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened.
[0104] 7 shows an example in which the circuit 106 is disposed in the bent portion 109 and the circuit 107 is disposed in the terminal portion 110. In this case, the reliability of the circuit elements in the circuit 107 can be improved, and the peripheral area, bezel, or frame area can be narrowed, or the pixel area 102 can be widened.
[0105] 8, 9, and 10 show examples in which the width of the bent portion 109 and the width of the terminal portion 110 are not narrower than the width of the pixel region 102. By doing so, the width of the connection portion 105 can be increased. This allows for smooth layout of the terminals. As a result, it is possible to reduce breaks or shorts between terminals. Furthermore, it allows for smooth layout of the circuit 106 or the circuit 107. As a result, it is possible to narrow the peripheral region, bezel, or frame region. Alternatively, it is possible to widen the pixel region 102.
[0106] As shown in FIGS. 8 , 9 , and 10 , the circuit 106 or the circuit 107 is disposed in a location other than the bent portion 109. Therefore, as described in the description of FIGS. 1 to 7 , various effects can be achieved, such as narrowing the peripheral region, bezel, or frame region. Alternatively, the pixel region 102 can be widened. However, one embodiment of the present invention is not limited to this. For example, in FIG. 8 or FIG. 10 , the circuit 106 may be disposed in the bent portion 109. In this case, the reliability of the circuit elements may be slightly reduced. However, such a configuration allows narrowing the peripheral region, bezel, or frame region. Alternatively, the pixel region 102 can be widened.
[0107] Note that this embodiment has described an example of a display panel. However, one embodiment of the present invention is not limited to this. For example, the present invention may be applied to devices other than displays. For example, the present invention may be applied to a memory, a CPU, an AI chip, and the like.
[0108] Note that this embodiment mode can be appropriately combined with the same or other embodiment modes described in this specification. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes.
[0109] Embodiment Mode 2 In this embodiment mode, an example of a cross-sectional structure of the display device described in the above embodiment mode will be described.
[0110] 11A to 11E show examples of cross-sectional views at cross-sectional portion 103 or cross-sectional portion 111 when display panel 101 described in Embodiment 1 is folded at folding portion 109. Note that the left end of display panel 101 shown in FIGS. 11A to 11E corresponds to, for example, the upper end of display panel 101 in the plan view shown in Embodiment 1. For the sake of explanation, FIG. 11A shows one end P and the other end Q of display panel 101. End P corresponds to, for example, the upper end of display panel 101 in the plan view shown in Embodiment 1, and end Q corresponds to, for example, the lower end of display panel 101 in the plan view shown in Embodiment 1. Furthermore, end P and end Q are omitted in other figures.
[0111] Note that, in the same display panel 101, the cross-sectional portion 103 and the cross-sectional portion 111 shown in FIGS. 1 to 10 preferably have the same cross-sectional structure, for example. However, one embodiment of the present invention is not limited thereto. For example, in the same display panel 101, the cross-sectional portion 103 and the cross-sectional portion 111 may have different cross-sectional structures. That is, in the display panel 101, for example, it is desirable that all cross-sectional portions have the same cross-sectional structure. However, one embodiment of the present invention is not limited thereto. Regions having different cross-sectional structures may be provided depending on the region of the display panel 101.
[0112] FIG. 11A shows an example of a cross-sectional view of the cross-sectional portion 103 or the cross-sectional portion 111 when the display panel 101 in FIGS. 1 to 10 is folded at 180 degrees. The display panel 101 includes, for example, a display panel 201, a support substrate 202, a peeling layer 204, a support substrate 203, and a peeling layer 205. Here, the edge 104 coincides with the edge of the support substrate 202, for example. For example, the display panel 201 is folded at an angle of 180 degrees toward the rear surface of the display panel 201, with the vicinity of the edge 104 of the support substrate 202 as the boundary. Characters or images can be displayed on the front surface of the display panel 201 using multiple pixels. By folding the display panel 201 backward in this manner, the peripheral area, bezel, or frame area can be narrowed. Alternatively, since the display panel 201 is folded in this manner, the pixel region 102 can be made wider.
[0113] For example, the display panel 201 preferably has flexibility. When the display panel 201 has flexibility, the display device of one embodiment of the present invention can have a flexible structure. However, one embodiment of the present invention is not limited thereto. For example, the display panel 201 does not have to have flexibility.
[0114] As will be described in a later embodiment, as an example, when peeling a display panel 201 formed on a substrate from the substrate, the peeling can be made easier by providing a peeling layer 204 between the substrate and the display panel 201.
[0115] In the example shown in FIG. 11A , the display panel 201 has a region where no peeling layer is provided in the folded region, the bending portion 109, or the region near the bending portion 109. Alternatively, in FIG. 11A , the display panel 201 has a region where the peeling layer has been removed in the folded region, the bending portion 109, or the region near the bending portion 109. In other words, the peeling layer is not provided in all or most of the folded region, the bending portion 109, or the region near the bending portion 109, so the thickness of the bending portion can be reduced. Since the peeling layer is not provided, the thickness of the bending portion is reduced, and as a result, the radius of curvature when the display panel 201 is folded can be reduced. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened.
[0116] Alternatively, since no peeling layer is provided in the region where the display panel 201 is bent, the bending portion 109, or the region near the bending portion 109, for example, the bending portion is less susceptible to stress. Therefore, defects such as cracks, film peeling, or disconnections are less likely to occur in the bending portion. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. Alternatively, the reliability of the display panel 101 can be improved.
[0117] In the example shown in FIG. 11A , the display panel 201 has a region where no support substrate is provided in the bent region, the bending portion 109, or the region near the bending portion 109. Alternatively, in the example shown in FIG. 11A , the display panel 201 has a region where the support substrate is removed in the bent region, the bending portion 109, or the region near the bending portion 109. That is, the support substrate is not provided in the entire region or in most regions of the bent region, the bending portion 109, or the region near the bending portion 109, so the thickness of the bent portion can be reduced. Since the support substrate is not provided in this manner, the thickness of the bent portion is reduced, and as a result, the radius of curvature when the display panel 201 is bent can be reduced. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened.
[0118] Alternatively, since a support substrate is not provided in the region where the display panel 201 is bent, the bending portion 109, or the region near the bending portion 109, for example, the bending portion is less susceptible to stress. Therefore, defects such as cracks, film peeling, or disconnections are less likely to occur in the bending portion. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. Alternatively, the reliability of the display panel 101 can be improved.
[0119] As shown in FIG. 11A, for example, the region where the support substrate 202 or the peeling layer 204 is disposed can be said to be mainly the region of the display unit 108.
[0120] As shown in FIG. 11A, for example, the region where the support substrate 203 or the release layer 205 is disposed can be said to be mainly the region of the terminal portion 110.
[0121] For example, the display panel 101 does not have to include all of the display panel 201, the support substrate 202, the peeling layer 204, the support substrate 203, and the peeling layer 205. Alternatively, for example, the display panel 101 may include a substrate or layer other than the display panel 201, the support substrate 202, the peeling layer 204, the support substrate 203, and the peeling layer 205.
[0122] Note that, for example, the supporting substrate 202 preferably has a region in contact with the peeling layer 204. However, one embodiment of the present invention is not limited thereto. For example, another layer may be provided therebetween. Similarly, for example, the supporting substrate 203 preferably has a region in contact with the peeling layer 205. However, one embodiment of the present invention is not limited thereto. For example, another layer may be provided therebetween.
[0123] Note that, for example, the peeling layer 204 preferably has a region in contact with the display panel 201. However, one embodiment of the present invention is not limited thereto, and for example, another layer may be provided therebetween. Similarly, for example, the peeling layer 205 preferably has a region in contact with the display panel 201. However, one embodiment of the present invention is not limited thereto, and for example, another layer may be provided therebetween.
[0124] Note that the supporting substrate may be considered to have an adhesive layer, for example. For example, the supporting substrate may have an adhesive layer on the front surface of the supporting substrate or on a surface of the supporting substrate closer to the peeling layer. For example, the supporting substrate can be attached to the peeling layer or the display panel using this adhesive layer. That is, the adhesive layer can be considered to be part of the supporting substrate. However, one embodiment of the present invention is not limited thereto. The adhesive layer may not be part of the supporting substrate, and the supporting substrate may not have an adhesive layer. For example, the adhesive layer may be considered to be provided separately from the supporting substrate. Alternatively, the supporting substrate may be made of adhesive material. That is, which component includes which component is determined appropriately depending on the content of the definition. Therefore, for example, an adhesive layer may be provided between the supporting substrate 202 and the peeling layer 204. In this case, the supporting substrate 202 has a region in contact with the adhesive layer, for example. Alternatively, the peeling layer 204 has a region in contact with the adhesive layer. Similarly, for example, an adhesive layer may be provided between the support substrate 203 and the peeling layer 205. In that case, for example, the support substrate 203 has a region in contact with the adhesive layer. Alternatively, the peeling layer 205 has a region in contact with the adhesive layer. Alternatively, the support substrate 202 may have an adhesive layer. Similarly, the support substrate 203 may have an adhesive layer.
[0125] The material of the support substrate may include, for example, a resin. Alternatively, the support substrate may include, for example, plastic, acrylic resin, epoxy resin, or urethane. Alternatively, the support substrate may include, for example, rubber or sponge. Alternatively, the support substrate may include, for example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), or polytetrafluoroethylene (PTFE). Alternatively, the support substrate may include, for example, polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride. Alternatively, the support substrate may include, for example, polyamide, polyimide, aramid, epoxy resin, inorganic vapor deposition film, or paper. Alternatively, the support substrate may include, for example, glass, silicon, metal, aluminum foil, or copper thin film.
[0126] The display panel 201 includes, for example, a circuit, a driver circuit, an IC chip, a pixel circuit, a transistor, wiring, a display element, a light-emitting element, a liquid crystal element, a capacitor element, a sensor element, an insulating film, or a conductive film.
[0127] Note that the display panel can be considered to have a support substrate and a peeling layer. In other words, the support substrate and the peeling layer can be considered to be parts of the display panel. However, one embodiment of the present invention is not limited thereto, and the support substrate and the peeling layer can be considered not to be parts of the display panel, and the display panel can be considered not to have a support substrate and a peeling layer. In other words, whether a component is included in another component can be determined appropriately depending on the content of the definition.
[0128] 11A illustrates a case where an end of the peeling layer 204 protrudes more than an end of the supporting substrate 202 (or where the peeling layer 204 has a region that does not overlap with the supporting substrate 202). That is, as an example, an end of the peeling layer 204 protrudes more than the end 104. Similarly, an end of the peeling layer 205 protrudes more than an end of the supporting substrate 203 (or where the peeling layer 205 has a region that does not overlap with the supporting substrate 203). In this way, the peeling layer 204 or the peeling layer 205 protrudes more than the supporting substrate 202 or the supporting substrate 203. When the display panel 201 is bent, the peeling layer functions as a buffer material, reducing bending pressure and making it possible to reduce pressure on the display panel 201. As a result, the reliability of the display panel 201 can be improved. However, one embodiment of the present invention is not limited to this.
[0129] As a configuration partially different from that shown in FIG. 11A , FIG. 11B shows a case where the edge of the release layer 204 is generally aligned with the edge of the support substrate 202. Similarly, FIG. 11B shows a case where the edge of the release layer 205 is generally aligned with the edge of the support substrate 203. By aligning the edges of the release layer 204 or 205 in this manner and reducing the area of the release layer, the peripheral area, bezel, or frame area can be narrowed. Alternatively, the pixel area 102 can be widened. Alternatively, by etching a portion of the release layer using the support substrates 202 and 203 as masks, the edges of the release layer 204 and 205 become aligned with the support substrates 202 and 203. In this manner, when etching a portion of the release layer, using the support substrates 202 and 203 as masks can simplify the manufacturing process.
[0130] As another configuration partially different from that shown in FIG. 11A , FIG. 11C shows a case in which the edge of the peeling layer 204 is recessed from the edge of the support substrate 202 (or the support substrate 202 has a region that does not overlap with the peeling layer 204). That is, the edge of the peeling layer 204 is recessed from the edge 104. Similarly, the edge of the peeling layer 205 is recessed from the edge of the support substrate 203 (or the support substrate 203 has a region that does not overlap with the peeling layer 205). Therefore, a portion of the support substrate 202 and a portion of the support substrate 203 have a region that contacts a portion of the display panel 201. In this way, by reducing the region of the peeling layer 204 or the peeling layer 205, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. Alternatively, before the supporting substrate 202 and the supporting substrate 203 are attached to the peeling layer 204, the peeling layer 205, or the display panel 201, part of the peeling layer can be etched. Therefore, the manufacturing process can be simplified.
[0131] 11A to 11C show an example of a configuration in which a peeling layer is not provided in the entire region of the bending portion 109 or in part of the region of the bending portion 109. Alternatively, FIGS. 11A to 11C show an example of a configuration in which a peeling layer is provided in the entire region of the display portion 108 or in part of the region of the display portion 108. Alternatively, FIGS. 11A to 11C show an example of a configuration in which a peeling layer is provided in the entire region of the terminal portion 110 or in part of the region of the terminal portion 110. As a result of using such a configuration, the radius of curvature when the display panel 201 is bent can be reduced. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. However, one embodiment of the present invention is not limited thereto. For example, the peeling layer may not be provided in the entire region of the display portion 108. Alternatively, the peeling layer may not be provided in the entire region of the terminal portion 110.
[0132] As an example of such a case, as a configuration partially different from that of FIG. 11A , FIG. 11D shows an example in which a peeling layer is not provided in the entire region of the display portion 108 and the entire region of the terminal portion 110. In FIG. 11D , as an example, the supporting substrate 202 preferably has a region in contact with the display panel 201. However, one embodiment of the present invention is not limited to this. For example, another layer may be provided therebetween. Similarly, as an example, the supporting substrate 203 preferably has a region in contact with the display panel 201. However, one embodiment of the present invention is not limited to this. For example, another layer may be provided therebetween.
[0133] Note that the supporting substrate may be considered to have an adhesive layer, for example. However, one embodiment of the present invention is not limited thereto. The adhesive layer may not be a part of the supporting substrate, and the supporting substrate may not have an adhesive layer. For example, the adhesive layer may be considered to be provided separately from the supporting substrate. Therefore, for example, an adhesive layer may be provided between the supporting substrate 202 and the display panel 201. In that case, for example, the supporting substrate 202 has a region in contact with the adhesive layer. Alternatively, the display panel 201 has a region in contact with the adhesive layer. Similarly, for example, an adhesive layer may be provided between the supporting substrate 203 and the display panel 201. In that case, for example, the supporting substrate 203 has a region in contact with the display panel 201. Alternatively, the supporting substrate 202 may have an adhesive layer. Similarly, the supporting substrate 203 may have an adhesive layer.
[0134] As a configuration partially different from that of FIG. 11A , FIG. 11E shows an example in which another layer is provided between the support substrate and the release layer. FIG. 11E shows, as an example, a case in which residue 206 remains between the support substrate 202 and the release layer 204 or between the support substrate 203 and the release layer 205. For example, the residue 206 does not remain over the entire surface, but remains locally or partially. For example, this residue 206 is used to facilitate peeling when peeling the display panel 201 or the like from the glass substrate. Note that some of the residue 206 may remain not only on the display panel 201 or the like but also on the glass substrate.
[0135] Note that the residue 206 includes, for example, silicon. Alternatively, the residue 206 includes, for example, amorphous silicon. Alternatively, the residue 206 includes, for example, polycrystalline silicon. For example, when peeling the display panel 201 or the like from the glass substrate, a laser is irradiated. At that time, silicon or the like expands, making it easier to peel the display panel 201 or the like from the glass substrate. The residue 206 can be thought of as remains of expanded silicon or the like that remain on the display panel 201 side.
[0136] 11A to 11E have described exemplary configurations of the release layer and the support substrate, but it is possible to combine portions of the configuration examples shown in FIGS. 11A to 11E with each other. For example, the protruding state of the release layer 204 in FIG. 11A may be combined with the retracted state of the release layer 205 in FIG. 11C. Alternatively, the protruding state of the release layer 204 in FIG. 11A may be combined with the state in FIG. 11D in which the release layer 205 is not provided. In this way, various configurations can be combined using the configurations shown in FIGS. 11A to 11E.
[0137] 11A to 11E show cross-sectional structures in which the display panel 201 is bent at the bending portion 109 by 180 degrees. However, one embodiment of the present invention is not limited to this. The angle at which the display panel 201 is bent is not limited to 180 degrees and may be any angle, such as 90 degrees or 190 degrees. Note that the angle at which the display panel 201 is bent may not be fixed and may be changeable as appropriate.
[0138] 11A to 11E show cross-sectional structures in which the display panel 201 is bent at only one position; however, one embodiment of the present invention is not limited to this. The display panel 201 may be bent at multiple positions. Alternatively, the display panel 201 may be bent at a position other than the bent portion 109.
[0139] As an example of such a case, FIGS. 12 to 14 show an example in which the display panel 201 is bent at multiple locations.
[0140] 12A shows an example in which not only the folding portion 109 in FIG. 11A but also the display unit 108 is folded at an angle of 90 degrees toward the display surface side. The folding angle of the display unit 108 is not limited to 90 degrees and may be any angle, such as 30 degrees or 180 degrees. Alternatively, the display unit 108 may be folded toward the back surface side instead of the display surface side as shown in FIG. 12A . In this case, the folding angle may also be various, such as 30 degrees or 180 degrees. The folding angle of the display unit 108 may not be fixed, but may be changeable as needed.
[0141] Note that in FIG. 12A , as an example, a support substrate 202 is provided in a portion where the display portion 108 is bent. However, one embodiment of the present invention is not limited to this. For example, as a configuration partially different from FIG. 12A , FIG. 12B illustrates an example in which a support substrate is not provided in a portion where the display portion 108 is bent. Therefore, the support substrate 202 is divided into the support substrate 202 and the support substrate 207. By not providing a support substrate in the portion where the display portion 108 is bent, the display portion 108 can be easily bent. Furthermore, even when the bending angle is frequently changed, defects in the display panel 201 are less likely to occur, and the reliability of the display panel 201 can be improved. Furthermore, by not providing a support substrate, the thickness of the bending portion is reduced, and therefore the radius of curvature when the display panel 201 is bent can be reduced. Furthermore, by not providing a support substrate in the portion where the display portion 108 is bent, stress is less likely to be applied to the bending portion, for example. Therefore, defects such as cracks, peeling, or disconnections are less likely to occur at the bending portion. Also, even if the bending angle is frequently changed, defects are less likely to occur in the display panel 201, and the reliability of the display panel 201 can be improved.
[0142] 12A and 12B show an example in which no peeling layer is provided in the bent portion 109. However, one embodiment of the present invention is not limited to this. For example, as shown in FIG. 13A , a structure in which a peeling layer 204 is provided in the bent portion 109 may also be used. With such a structure, it is not necessary to remove the peeling layer, and therefore the manufacturing process can be simplified.
[0143] Note that FIG. 12B illustrates an example in which the peeling layer 204 is provided in a portion where the display portion 108 is bent. However, one embodiment of the present invention is not limited thereto. For example, as shown in FIG. 13B , a structure in which a peeling layer is not provided in a portion where the display portion 108 is bent may be adopted. Therefore, the peeling layer 204 is divided into the peeling layer 204 and the peeling layer 208. By not providing a peeling layer in the portion where the display portion 108 is bent, the display portion 108 can be easily bent. Furthermore, since a peeling layer is not provided in the portion where the display portion 108 is bent, stress is less likely to be applied to the bent portion, for example. Therefore, defects such as cracks, peeling, or disconnection are less likely to occur in the bent portion. Furthermore, defects in the display panel 201 are less likely to occur even when the bending angle is frequently changed, and the reliability of the display panel 201 can be improved.
[0144] 12 and 13 show an example in which the display portion 108 is also bent in FIG. 11A . However, one embodiment of the present invention is not limited to this. The present invention can be similarly applied not only to FIG. 11A but also to FIGS. 11B to 11E , or to a diagram formed by combining parts of FIGS. 11A to 11E . For example, FIG. 14A shows a case in which FIG. 12A is applied to FIG. 11D . Similarly, FIG. 14B shows a case in which FIG. 12B is applied to FIG. 11D .
[0145] In this way, by not providing a support substrate, the display panel 201 can be easily bent. Furthermore, even when the bending angle is frequently changed, defects are less likely to occur in the display panel 201, thereby improving the reliability of the display panel 201. Furthermore, by not providing a support substrate, the thickness of the bending portion is reduced, thereby making it possible to reduce the radius of curvature when the display panel 201 is bent. Furthermore, since a support substrate is not provided, for example, the bending portion is less likely to be subjected to stress. Therefore, defects such as cracks, film peeling, or wire breakage are less likely to occur. Furthermore, even when the bending angle is frequently changed, defects are less likely to occur in the display panel 201, thereby improving the reliability of the display panel 201.
[0146] 11 to 14 show examples in which a peeling layer or a supporting substrate is not provided in the bent portion 109 or the bent portion of the display portion 108. However, one embodiment of the present invention is not limited to this. For example, a peeling layer or a supporting substrate may not be provided in a region other than the bent portion 109 or the bent portion of the display portion 108.
[0147] As an example, the case where a support substrate is not provided in a part of the display portion 108 in FIG. 11A is shown below. In FIG. 15A , as an example, the opening region 209 has a region where the support substrate 202 is not provided. Here, the display portion 108 is, for example, a region where the support substrate 202 or the peeling layer 204 is provided. In FIG. 15A and FIGS. 15B and 15C described later, the display portion 108 may be provided in a region overlapping with the opening region 209. However, one embodiment of the present invention is not limited thereto. As an example, the display portion 108 does not need to be provided in a region overlapping with the opening region 209.
[0148] 15B, the opening region 209 has a region where the support substrate 202 is not provided and a region where the peeling layer 204 is not provided. Similarly, Fig. 15C shows an example of the case where the display unit 108 has a region where the support substrate 202 is not provided in Fig. 11D. In Fig. 15C, as an example, the opening region 209 has a region where the support substrate 202 is not provided.
[0149] The sensor 211 may be disposed on the back side of the display unit 108. As an example, FIG. 15B or FIG. 15C shows an example in which the sensor 211 is disposed on the back side of the display unit 108. As an example, the sensor 211 is disposed at a position corresponding to the opening region 209. Therefore, as an example, when viewed from above, the sensor 211 and the opening region 209 overlap each other. A signal or the like is input to the sensor 211 via the opening region 209. In FIG. 15B or FIG. 15C, the release layer 204 or the support substrate 202 is not provided, so the signal input to the sensor 211 is less likely to attenuate. As a result of this configuration, the sensor 211 can more easily read signals.
[0150] As an example, if the sensor 211 is an image sensor having a function of reading an image, an image signal (such as light) is input to the sensor 211 through the opening region 209. As a result, the sensor 211 can read an image. In this case, since the peeling layer 204 or the support substrate 202 is not provided, the image signal (light) is less likely to attenuate. As a result, the sensor 211 can read a clearer image.
[0151] As another example, if the sensor 211 is a sensor that reads a fingerprint, a fingerprint signal (light, charge, ultrasonic waves, etc.) is input to the sensor 211 through the opening region 209. As a result, the sensor 211 can read the fingerprint. In this case, because the release layer 204 or the support substrate 202 is not provided, the fingerprint signal (light, charge, ultrasonic waves, etc.) is less likely to attenuate. As a result, the sensor 211 can read a clearer fingerprint.
[0152] 15A to 15C , an example in which the opening region 209 is provided is shown in FIG. 11A and FIG. 11D . Alternatively, an example in which the sensor 211 is disposed on the back side of the display portion 108 is shown in FIG. 15B or FIG. 15C . However, one embodiment of the present invention is not limited to these. For example, a plurality of opening regions may be provided. Alternatively, for example, a plurality of sensors may be provided.
[0153] 15A to 15C , examples in which the opening region 209 is provided are shown in FIGS. 11A and 11D . Also, examples in which the sensor 211 is provided on the back side of the display unit 108 are shown in FIGS. 15B and 15C . However, one embodiment of the present invention is not limited to these examples. The opening region 209 or the sensor 211 can be similarly applied not only to FIGS. 15A to 15C but also to FIGS. 11 to 15 , or to diagrams formed by combining parts of FIGS. 11 to 15 .
[0154] Note that this embodiment mode can be appropriately combined with the same or other embodiment modes described in this specification. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes.
[0155] Third Embodiment In this embodiment, an example of a method for manufacturing the display device described in the above embodiment will be described.
[0156] First, FIG. 16A shows, as an example, a case where a release layer 204 is formed on a glass substrate 301 and then a display panel 201 is formed on the release layer 204 .
[0157] 16A , the peeling layer 204 is provided over the glass substrate 301. However, one embodiment of the present invention is not limited to this. For example, before the peeling layer 204 is formed, another layer may be formed over the glass substrate 301. As an example, the layer that becomes the source of the residue 206 shown in FIG. 11E may be formed between the glass substrate 301 and the peeling layer 204. For example, this layer that becomes the source of the residue 206 is used to make it easier to peel the display panel 201, etc., when peeling the display panel 201, etc., from the glass substrate. Therefore, it can also be said that the layer that becomes the source of the residue 206 functions as a peeling layer.
[0158] 16A shows an example in which a glass substrate is used, but one embodiment of the present invention is not limited to this. Instead of a glass substrate, for example, a quartz substrate, a resin substrate, an aluminum foil substrate, a semiconductor substrate, or a metal substrate may be used.
[0159] 16B shows an example in which a peeling substrate 302 is attached to the upper surface of the display panel 201 as a step following that of Fig. 16A. Note that the peeling substrate 302 is ultimately removed, as an example. Therefore, the peeling substrate 302 does not necessarily have to be attached to the display panel 201. However, by attaching the peeling substrate 302 to the display panel 201, the work of peeling the display panel 201 from the glass substrate 301 can be made easier in the subsequent step.
[0160] Note that, for example, the peeling substrate 302 may be considered to have an adhesive layer. For example, the peeling substrate 302 may have an adhesive layer on a surface of the peeling substrate 302 that is closer to the display panel 201. For example, the peeling substrate 302 can be attached to the display panel 201 using this adhesive layer. In other words, the adhesive layer can be considered to be a part of the peeling substrate 302. However, one embodiment of the present invention is not limited thereto. For example, the adhesive layer may not be a part of the peeling substrate 302, and the peeling substrate 302 may not have an adhesive layer. For example, the adhesive layer may be considered to be provided separately from the peeling substrate 302. Alternatively, the peeling substrate 302 may have adhesiveness as its substrate material. In other words, which member includes which member can be determined appropriately depending on the content of the definition. Therefore, for example, another layer may be provided between the peeling substrate 302 and the display panel 201. For example, an adhesive layer may be provided between the peeling substrate 302 and the display panel 201 .
[0161] The material of the peeling substrate 302 may include, for example, a resin. Alternatively, the peeling substrate 302 may include plastic, acrylic resin, epoxy resin, or urethane. Alternatively, the peeling substrate 302 may include rubber or sponge. Alternatively, the peeling substrate 302 may include glass, silicon, metal, aluminum foil, or a copper thin film.
[0162] 16C shows an example in which the glass substrate 301 is peeled off from the display panel 201 or the like, as the next step after Fig. 16B . When peeling the display panel 201 or the like from the glass substrate 301, the display panel 201 can be peeled off from the glass substrate 301 by using the peeling layer 204. As an example, peeling occurs at the interface between the peeling layer 204 and the glass substrate 301. Alternatively, during peeling, the peeling layer 204 may be torn, with a portion of the peeling layer 204 remaining on the glass substrate 301 and the remaining portion of the peeling layer 204 remaining on the display panel 201 or the like.
[0163] When peeling the display panel 201 from the glass substrate 301, the peeling can be facilitated by irradiating the vicinity of the peeling layer 204 or the vicinity of the interface between the peeling layer 204 and the glass substrate 301 with laser light or water.
[0164] If a layer that is the source of the residue 206 is provided between the peeling layer 204 and the glass substrate 301, the residue 206 may remain on the display panel 201 or the like after peeling, as shown in FIG. 11E . This residue 206 is thought to have remained when laser light or the like is applied to peel the display panel 201 or the like from the glass substrate 301. In other words, when laser light or the like is applied, the layer (silicon or the like) that is the source of the residue 206 expands. This allows the display panel 201 or the like to be peeled off from the glass substrate 301. During this peeling, the expanded layer (silicon or the like) that is the source of the residue 206 may remain as residue 206 on the display panel 201 side. Similarly, the expanded layer (silicon or the like) that is the source of the residue 206 may remain as another residue on the glass substrate 301 side.
[0165] The release layer 204 may include various materials. Alternatively, the release layer 204 may be configured with a single layer or film, or may be configured with multiple layers or films. For example, the release layer 204 may include a resin material such as polyimide. Alternatively, the release layer 204 may include tungsten (W) or tungsten oxide (WxOy). Alternatively, the release layer 204 may include a first polyimide layer, a second polyimide layer, and an insulating film made of an inorganic material, and the insulating film made of an inorganic material may be provided between the first polyimide layer and the second polyimide layer. For example, the insulating film made of an inorganic material may include a silicon oxide film or a silicon nitride film.
[0166] 16D shows an example of a case where a part of the peeling layer 204 is removed from the bent portion 109 or the region near the bent portion 109, as a step following Fig. 16C. As a result of removing a part of the peeling layer 204, for example, the peeling layer 204 is separated into the peeling layer 204 in the display portion 108 and the peeling layer 205 in the terminal portion 110.
[0167] 16D , when the peeling layer 204 is removed, only the bending portion 109 or a region near the bending portion 109 is removed; however, one embodiment of the present invention is not limited to this. For example, as shown in FIG. 16E , the entire peeling layer 204 may be removed. Alternatively, as shown in FIG. 15B , the peeling layer 204 may be removed in the opening region 209. Alternatively, as shown in FIG. 13B , the peeling layer 204 may be removed in the portion where the display portion 108 is to be folded.
[0168] 16D and 16E , the peeling layer 204 may be removed while the peeling substrate 302 remains in place; however, one embodiment of the present invention is not limited to this. For example, as shown in FIGS. 16F and 16G , the peeling substrate 302 may be peeled off from the display panel 201 or the like before removing the peeling layer 204. Alternatively, as shown in FIGS. 16F and 16G , the peeling substrate 302 may be peeled off from the display panel 201 or the like after removing the peeling layer 204. Alternatively, at these stages, the peeling substrate 302 may not yet be peeled off from the display panel 201 or the like.
[0169] 16A and 16B show cross-sectional views at each stage of the manufacturing process. Therefore, examples of plan views as viewed from the peeling layer 204 side (as viewed from the back side of the display panel 201) at the manufacturing process stage of FIG. 16D or FIG. 16F are shown below.
[0170] 1 to 4 and the cross-sectional view is that of Fig. 16D or 16F, as viewed from the side of peeling layer 204 (as viewed from the back side of display panel 201). As shown in Fig. 17A, peeling layer 204 is removed only at bending portion 109 or in the region near bending portion 109.
[0171] 17B shows a plan view of the display panel 201 viewed from the peeling layer 204 side (viewed from the back side of the display panel 201) in the cases of FIGS. 5 to 7 and in the case where the cross-sectional view is that of FIG. 16D or 16F. As shown in FIG. 17B, the peeling layer 204 is removed only at the bent portion 109 or in the area near the bent portion 109.
[0172] 8 to 10 and the cross-sectional view is that of Fig. 16D or 16F, when viewed from the side of peeling layer 204 (when viewed from the back side of display panel 201). As shown in Fig. 17C, peeling layer 204 is removed only at bending portion 109 or in the region near bending portion 109.
[0173] 17A to 17C , the peeling layer 204 is removed from the entire bent portion 109 or the region around the bent portion 109. However, one embodiment of the present invention is not limited to this. For example, the peeling layer 204 may be removed only partially from the bent portion 109 or the region around the bent portion 109.
[0174] 17A , an example is shown in which there are regions where the peeling layer 204 has been removed and regions where the peeling layer 204 has not been removed at the bent portion 109 or the region near the bent portion 109. In this case, the cross-sectional view of the cross-sectional portion 103 in the region where the peeling layer 204 has been removed differs from the cross-sectional view of the cross-sectional portion 111 in the region where the peeling layer 204 has not been removed.
[0175] 17A to 17D , the region where the peeling layer 204 is removed is the bent portion 109 or a region in the vicinity of the bent portion 109. However, one embodiment of the present invention is not limited to this. The peeling layer 204 may be removed in another region.
[0176] As an example, as shown in FIG. 13B, the peeling layer 204 may be removed in the area where the display unit 108 is to be folded.
[0177] Fig. 18A shows an example in which the peeling layer 204 is removed from the portion where the display unit 108 is to be folded in the case of Fig. 17A. Similarly, Fig. 18B shows an example in which the peeling layer 204 is removed from the portion where the display unit 108 is to be folded in the case of Fig. 17C.
[0178] Alternatively, as an example, the release layer 204 may be removed in the opening region 209 as shown in FIG. 15B.
[0179] Fig. 19A shows an example of the case of Fig. 17A in which the release layer 204 has been removed in the opening region 209. Similarly, Fig. 19B shows an example of the case of Fig. 17C in which the release layer 204 has been removed in the opening region 209.
[0180] Furthermore, Fig. 19C shows a combination of Fig. 18A and Fig. 19A. Similarly, Fig. 19D shows a combination of Fig. 18B and Fig. 19B.
[0181] Note that, as an example, one opening region 209 may be provided. However, one embodiment of the present invention is not limited to this. As an example, a plurality of opening regions may be provided. For example, the opening region 209 may be used as a region for reading an image, and the opening region 210 may be used as a region for reading a fingerprint. In this case, as an example, the peeling layer 204 may be removed from the plurality of opening regions.
[0182] Fig. 20A shows an example of the case of Fig. 19A in which the release layer 204 has been removed in the opening region 210. Similarly, Fig. 20B shows an example of the case of Fig. 19B in which the release layer 204 has been removed in the opening region 210. Similarly, Fig. 20C shows an example of the case of Fig. 19C in which the release layer 204 has been removed in the opening region 210. Similarly, Fig. 20D shows an example of the case of Fig. 19D in which the release layer 204 has been removed in the opening region 210.
[0183] 17A to 20D show an example in which the outer shape of the display panel 201 and the outer shape of the peeling layer are a rectangle with rounded corners or a rectangle with sharp corners, and the display panel 201 and the peeling layer are separated into individual display panels. However, one embodiment of the present invention is not limited to this. For example, at this stage of the manufacturing process, the outer shape may not be cut, and multiple display panels may remain connected. That is, the display panels may be separated into individual display panels in a later process. Alternatively, even if the display panels are separated into individual display panels, the outer shape may not be a final shape, and the outer shape may be determined by cutting the display panel 201 and the peeling layer in a later process.
[0184] Next, we will return to the description of the manufacturing process using cross-sectional views.
[0185] 21 shows an example of a step of attaching a support substrate as a step subsequent to the step shown in Fig. 16 . Note that Fig. 21 shows an example in which a support substrate 202 and a support substrate 203 are attached. However, one embodiment of the present invention is not limited to this. For example, the support substrate may be attached once, and then part of the support substrate may be removed to separate the support substrate into the support substrate 202 and the support substrate 203.
[0186] Note that the supporting substrate may be provided by bonding. However, one embodiment of the present invention is not limited to this. For example, the supporting substrate may be provided by applying a resin and then curing the resin. In this case, the supporting substrate 202 and the supporting substrate 203 may be separated by removing a part of the resin before curing the resin.
[0187] FIG. 21A shows an example in which a support substrate 202 and a support substrate 203 are attached to a release layer 204 as a step subsequent to that shown in FIG. 16C.
[0188] 21B shows an example in which a support substrate 202 and a support substrate 203 are attached to a peeling layer 204 and a peeling layer 205, respectively, as a step subsequent to that in Fig. 16D. Note that Fig. 21B can also be said to be an example in which a part of the peeling layer 204 is removed to separate the peeling layer 204 into the peeling layer 204 and the peeling layer 205, as a step subsequent to that in Fig. 21A.
[0189] In this way, when the support substrates 202 and 203 are attached and then separated into the peeling layer 204 and the peeling layer 205, for example, the support substrates 202 and 203 can be used as a mask, so that the peeling layer can be removed in an appropriate region.
[0190] FIG. 21C shows an example in which a support substrate 202 and a support substrate 203 are attached to a display panel 201 as a step subsequent to FIG. 16E.
[0191] Fig. 21D shows an example in which the peeling substrate 302 is peeled off from the display panel 201, etc., as a step subsequent to Fig. 21A. Alternatively, it can be said that Fig. 21D is an example in which the peeling substrate 302 is peeled off from the display panel 201, etc., as shown in Fig. 16C, and then, as a step subsequent thereto, the support substrate 202 and the support substrate 203 are attached to the peeling layer 204.
[0192] 21E shows an example in which the peeling substrate 302 is peeled from the display panel 201 or the like as a step subsequent to Fig. 21B. Alternatively, Fig. 21E can be said to be an example in which the support substrates 202 and 203 are attached to the peeling layers 204 and 205 as a step subsequent to Fig. 16F. Alternatively, Fig. 21E can be said to be an example in which the peeling layer 204 is separated into the peeling layer 204 and the peeling layer 205 by removing a part of the peeling layer 204 as a step subsequent to Fig. 21D.
[0193] In this way, when the support substrates 202 and 203 are attached and then separated into the peeling layer 204 and the peeling layer 205, for example, the support substrates 202 and 203 can be used as a mask, so that the peeling layer can be removed in an appropriate region.
[0194] Fig. 21F shows an example in which the peeling substrate 302 is peeled off from the display panel 201, etc., as a step subsequent to Fig. 21C. Alternatively, it can be said that Fig. 21F is an example in which the support substrate 202 and the support substrate 203 are attached to the display panel 201 as a step subsequent to Fig. 16C.
[0195] 11C , when the support substrate 202 and the support substrate 203 are attached to the peeling layer 204 and the peeling layer 205, the end of the peeling layer 204 may be recessed from the end of the support substrate 202. Similarly, the end of the peeling layer 205 may be recessed from the end of the support substrate 203.
[0196] Fig. 22A shows an example in which the edge of the release layer is recessed from the edge of the support substrate in Fig. 21B. Similarly, Fig. 22B shows an example in which the edge of the release layer is recessed from the edge of the support substrate in Fig. 21E.
[0197] 11A , for example, an end of the peeling layer 204 may protrude more than an end of the support substrate 202. Similarly, an end of the peeling layer 205 may protrude more than an end of the support substrate 203.
[0198] Fig. 22C shows an example in which the edge of the release layer protrudes more than the edge of the support substrate in the case of Fig. 21B. Similarly, Fig. 22D shows an example in which the edge of the release layer protrudes more than the edge of the support substrate in the case of Fig. 21E.
[0199] Note that, as an example, the bent portion 109 may be considered to be a region between the edges of the support substrate as shown in FIGS. 21E , 22B , and 22D . However, one embodiment of the present invention is not limited thereto. For example, as shown in FIG. 22E , a region inside the edges of the support substrate may be considered to be the bent portion 109. Note that, as shown in FIGS. 21E , 22B , and 22E , the peeling layer may be removed in the bent portion 109. However, one embodiment of the present invention is not limited thereto. As an example, as shown in FIG. 22D , it may be considered that a portion of the peeling layer is provided in the bent portion 109. Alternatively, as shown in FIG. 17D , the peeling layer 204 may be provided in the bent portion 109 in the cross-sectional portion 111.
[0200] 21 and 22 show cross-sectional views at a stage in the manufacturing process where a support substrate is provided. Therefore, plan views of the manufacturing process as viewed from the support substrate side (as viewed from the back side of the display panel 201) at the stages in the manufacturing process shown in FIGS. 21 and 22 are shown below. Note that the peeling layer is omitted because it may be in various states.
[0201] 23A shows a plan view of the display panel 201 as viewed from the support substrate side (as viewed from the back side of the display panel 201) in the cases of FIGS. 1 to 4. As shown in FIG. 23A, the support substrate is not provided only at the bent portion 109 or in the area near the bent portion 109.
[0202] 5 to 7 is a plan view of the display panel 201 viewed from the support substrate side (viewed from the back side of the display panel 201). As shown in Fig. 23B, the support substrate is not provided only at the bent portion 109 or in the area around the bent portion 109.
[0203] 8 to 10 is a plan view of the display panel 201 viewed from the support substrate side (viewed from the back side of the display panel 201). As shown in Fig. 23C, the support substrate is not provided only at the bent portion 109 or in the area near the bent portion 109.
[0204] 23A to 23C , the region where the support substrate is not provided is the bent portion 109 or a region in the vicinity of the bent portion 109. However, one embodiment of the present invention is not limited to this. For example, there may be another region where the support substrate is not provided.
[0205] As an example, as shown in FIGS. 12B, 13A, 13B, and 14B, a support substrate may not be provided in the portion where the display unit 108 is bent.
[0206] Fig. 24A shows an example of the case of Fig. 23A where no support substrate is provided in the portion where the display unit 108 is bent. Similarly, Fig. 24B shows an example of the case of Fig. 23C where no support substrate is provided in the portion where the display unit 108 is bent.
[0207] Alternatively, as an example, a support substrate may not be provided in the opening region 209 as shown in FIG.
[0208] Fig. 25A shows an example of the case of Fig. 23A where no support substrate is provided in the opening region 209. Similarly, Fig. 25B shows an example of the case of Fig. 23C where no support substrate is provided in the opening region 209.
[0209] Furthermore, Fig. 25C shows a combination of Fig. 24A and Fig. 25A. Similarly, Fig. 25D shows a combination of Fig. 24B and Fig. 25B.
[0210] It is to be noted that a plurality of opening regions 209 may be provided, rather than just one. For example, opening region 209 may be used as a region for reading an image, and opening region 210 may be used as a region for reading a fingerprint. As an example, a support substrate may not be provided in the plurality of opening regions.
[0211] Fig. 26A shows an example of the case of Fig. 25A in which a support substrate is not provided in the opening region 210. Similarly, Fig. 26B shows an example of the case of Fig. 25B in which a support substrate is not provided in the opening region 210. Similarly, Fig. 26C shows an example of the case of Fig. 25C in which a support substrate is not provided in the opening region 210. Similarly, Fig. 26D shows an example of the case of Fig. 25D in which a support substrate is not provided in the opening region 210.
[0212] 23A to 26D show an example in which the outer shape of the display panel 201 and the outer shape of the support substrate are rectangular with rounded corners or rectangular with sharp corners, and the display panel 201 and the support substrate are separated into individual display panels. However, one embodiment of the present invention is not limited to this. For example, at this stage of the manufacturing process, the outer shape may not be cut, and multiple display panels may remain connected. Alternatively, even if the display panel 201 and the support substrate are separated into individual display panels, the outer shape may not be the final shape, and the outer shape may be determined by cutting the display panel 201 and the support substrate in a later process.
[0213] Note that this embodiment mode can be appropriately combined with the same or other embodiment modes described in this specification. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes.
[0214] Embodiment Mode 4 In this embodiment mode, a detailed example will be described using enlarged cross-sectional views of the bent portion 109 in FIGS. 11 to 15 and specific examples.
[0215] Fig. 27 shows an example of an enlarged cross-sectional view of the bent portion 109 in Fig. 11A. Note that Fig. 27 shows an example of an enlarged view in the case of Fig. 11A, but it can also be applied in the same way as Fig. 27 to other drawings in Fig. 11 to Fig. 15, or to drawings in which Fig. 11 to Fig. 15 are combined.
[0216] 28 illustrates an example of a specific configuration of the display panel 201 in FIG. 27 . For example, the display panel 201 includes an element portion 404, a connection terminal portion 405, a conductive layer 401, an insulating layer 402, and an insulating layer 403. However, one embodiment of the present invention is not limited thereto. For example, the display panel 201 does not need to include some of these components. Alternatively, for example, the display panel 201 may include components other than these components.
[0217] The element portion 404 includes, for example, the pixel region 102. Alternatively, the element portion 404 includes, for example, the circuit 106. Alternatively, the element portion 404 includes, for example, a plurality of pixels. Alternatively, the element portion 404 includes, for example, a display element and a pixel circuit. Alternatively, the element portion 404 includes, for example, a gate driver circuit, a DeMUX (output switching) circuit, a protection circuit, or a source driver circuit. Alternatively, the element portion 404 includes, for example, a light-emitting element, an organic EL element, an LED chip, a liquid crystal element, a sensor element, a transistor, a capacitor, a wiring, an electrode, a conductive film, or an insulating film.
[0218] The connection terminal portion 405 includes, for example, the connection portion 105. Alternatively, the connection terminal portion 405 includes, for example, a wiring, an electrode, a conductive film, or an insulating film. Alternatively, the connection terminal portion 405 includes, for example, an anisotropic conductive film (ACF), a conductive paste, conductive particles, tape automated bonding (TAB), chip on film (COF), chip on glass (COG), wire bonding, Cu-Cu connection, hybrid bonding, through silicon via (TSV), solder, or flexible printed circuits (FPC).
[0219] Note that the connection terminal portion 405 may include, for example, the circuit 106. Alternatively, the connection terminal portion 405 may include, for example, the circuit 107. Alternatively, the connection terminal portion 405 may include, for example, a protection circuit, an output switching circuit (DeMUX), an inspection circuit, or a source driver circuit.
[0220] For example, the connection terminal portion 405 can be manufactured simultaneously with the pixel region 102. Alternatively, for example, the protection circuit, the output switching circuit (DeMUX), the inspection circuit, or the source driver circuit can be manufactured simultaneously with the pixel region 102. As a result, the manufacturing cost can be reduced. For the source driver circuit, by using a transistor having an oxide semiconductor, for example, indium oxide, in the channel, the circuit can be operated at high speed.
[0221] Note that, for example, the connection terminal portion 405 may be considered to include an external circuit. However, one embodiment of the present invention is not limited thereto. For example, the connection terminal portion 405 may be considered not to include an external circuit. That is, whether a component includes another component is determined appropriately depending on the content of the definition. Note that examples of the external circuit include flexible printed circuits (FPCs), source driver circuits, controller circuits, control circuits, image processing circuits, touch sensor control circuits, memory circuits, cache circuits, DRAMs, SRAMs, MRAMs, CPUs, or GPUs. Examples of the external circuit include an IC chip using a single crystal silicon substrate, an IC chip using an SOI substrate, or an IC chip using a glass substrate.
[0222] 28 , the region to the right of the end 104 or the region in the vicinity thereof can be considered, for example, to be the bent portion 109. Alternatively, the portion where the conductive layer 401 is actually bent can be considered, for example, to be the bent portion 109. Alternatively, the portion where the insulating layer 402 is actually bent can be considered, for example, to be the bent portion 109. Alternatively, the portion where the insulating layer 403 is actually bent can be considered, for example, to be the bent portion 109.
[0223] In the bent portion 109, for example, a conductive layer 401, an insulating layer 402, and an insulating layer 403 are provided.
[0224] Alternatively, as an example, a support substrate is not provided in the bent portion 109 or in a partial region of the bent portion 109. Alternatively, as an example, a release layer is not provided in the bent portion 109 or in a partial region of the bent portion 109.
[0225] Note that, for example, the conductive layer 401 has a region in contact with the insulating layer 402. However, one embodiment of the present invention is not limited thereto. For example, another layer may be provided between the conductive layer 401 and the insulating layer 402.
[0226] Note that, for example, the conductive layer 401 has a region in contact with the insulating layer 403. However, one embodiment of the present invention is not limited thereto. For example, another layer may be provided between the conductive layer 401 and the insulating layer 403.
[0227] For example, the insulating layer 403 has a region in contact with the peeling layer 204. However, one embodiment of the present invention is not limited thereto.
[0228] For example, the insulating layer 403 has a region in contact with the peeling layer 205. However, one embodiment of the present invention is not limited thereto.
[0229] Note that the conductive layer 401, the insulating layer 402, and the insulating layer 403 are provided, for example, also in the display portion 108 or the terminal portion 110. That is, the conductive layer 401, the insulating layer 402, and the insulating layer 403 are provided, for example, not only in the folded portion 109 but also in the display portion 108 or the terminal portion 110. Therefore, a signal, a voltage, a current, or the like can be transmitted from the terminal portion 110 to the display portion 108 using the conductive layer 401.
[0230] Alternatively, the conductive layer 401, the insulating layer 402, and the insulating layer 403 are provided, for example, also in the element portion 404 or the connection terminal portion 405. That is, the conductive layer 401, the insulating layer 402, and the insulating layer 403 are provided, for example, not only in the bent portion 109 but also in the element portion 404 or the connection terminal portion 405. Therefore, a signal, a voltage, a current, or the like can be transmitted from the connection terminal portion 405 to the element portion 404 using the conductive layer 401.
[0231] Note that the conductive layer 401, the insulating layer 402, and the insulating layer 403 are preferably manufactured simultaneously with the manufacturing of the element portion 404 or the connection terminal portion 405. In that case, the conductive layer 401, the insulating layer 402, and the insulating layer 403 can have some function in the element portion 404. Alternatively, the conductive layer 401, the insulating layer 402, and the insulating layer 403 can have some function in the connection terminal portion 405. This can reduce manufacturing costs. However, one embodiment of the present invention is not limited to this.
[0232] 28 shows an example of a configuration in which insulating layers 402 and 403 are provided above and below a conductive layer 401 in the bending portion 109. In other words, due to the layered structure of the insulating layer 403, the conductive layer 401, and the insulating layer 402, the total film thickness in the bending portion 109 is very thin. Therefore, when the display panel 201 is bent at the bending portion 109, the radius of curvature can be made very small. Furthermore, because the bending portion 109 is thin, for example, stress is less likely to be applied to the bending portion. Therefore, defects such as cracks, film peeling, or disconnections are less likely to occur at the bending portion. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. Alternatively, the reliability of the display panel 101 can be improved.
[0233] The material of the conductive layer 401 can include, for example, various metal materials. Examples of the material of the conductive layer 401 include aluminum (Al), molybdenum (Mo), titanium (Ti), copper (Cu), silver (Ag), ruthenium (Ru), iron (Fe), nickel (Ni), and zinc (Zn). For example, the conductive layer 401 may be an alloy containing multiple elements. The conductive layer 401 may be a single-layer film or a multilayer film. For example, a structure in which a film containing a metal is sandwiched between films containing a metal oxide or a metal nitride may be used.
[0234] The insulating layer 402 can include various insulating materials, for example. Alternatively, the insulating layer 402 may include an inorganic material, for example. Alternatively, the insulating layer 402 may include silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, aluminum oxide, or aluminum nitride, for example. Alternatively, the insulating layer 402 may include an organic material, for example. Alternatively, the insulating layer 402 may include plastic, acrylic resin, epoxy resin, or urethane, for example. Alternatively, the insulating layer 402 may include rubber or sponge, for example. Alternatively, the insulating layer 402 may include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), or polytetrafluoroethylene (PTFE), for example. Alternatively, the insulating layer 402 may include polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride, for example. Alternatively, the insulating layer 402 may include, for example, polyamide, polyimide, aramid, epoxy resin, inorganic vapor deposition film, or paper.
[0235] The insulating layer 402 may be a single-layer film or a multi-layer film.
[0236] The insulating layer 403 may contain at least one of the materials described in the description of the insulating layer 402 .
[0237] Note that the insulating layer 402 and the insulating layer 403 may be made of the same material. However, one embodiment of the present invention is not limited to this. For example, the insulating layer 402 and the insulating layer 403 may be made of different materials. For example, the insulating layer 402 may include an organic material, and the insulating layer 403 may include an inorganic material. Alternatively, the number of layers of the insulating layer 402 and the insulating layer 403 may be the same. However, one embodiment of the present invention is not limited to this. For example, the number of layers of the insulating layer 402 and the insulating layer 403 may be different. For example, the number of layers of the insulating layer 402 may be smaller than that of the insulating layer 403.
[0238] 28 , the insulating layer 402 is provided outside the conductive layer 401; however, one embodiment of the present invention is not limited thereto. For example, as shown in FIG. 29 , a protective layer 406 may be provided outside the insulating layer 402. Alternatively, as an example, the insulating layer 402 may have a region in contact with the protective layer 406. Note that, as an example, another layer may be provided between the insulating layer 402 and the protective layer 406. By providing the protective layer 406, for example, damage to the film due to external contact or the like can be reduced. For example, the protective layer 406 may be formed or applied after the display panel 201 is bent at the bending portion 109. As a result, the film thickness at the bending portion 109 is thin, which makes bending easier. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 406 may be formed or applied immediately before the display panel 201 is bent at the bending portion 109.
[0239] Note that the protective layer 406 may be provided only in the bent portion 109 or in the periphery of the bent portion 109. That is, for example, the protective layer 406 does not have to be provided in the pixel region 102. Alternatively, for example, the protective layer 406 does not have to be provided in the element portion 404. Alternatively, for example, the protective layer 406 does not have to be provided in the connection terminal portion 405. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 406 may be provided in another region.
[0240] Note that the protective layer 406 may include at least one of the materials described in the description of the insulating layer 402. Note that the protective layer 406 may be a single-layer film or a multilayer film.
[0241] Although the insulating layer 403 is provided inside the conductive layer 401 in FIG. 28 , one embodiment of the present invention is not limited thereto. For example, as shown in FIG. 30 , a protective layer 408 may be provided inside the insulating layer 403. Alternatively, the insulating layer 403 may have a region in contact with the protective layer 408. Note that, for example, another layer may be provided between the insulating layer 403 and the protective layer 408. By providing the protective layer 408, for example, damage to the film due to external contact or the like can be reduced. For example, the protective layer 408 may be formed or applied after the display panel 201 is bent at the bending portion 109. As a result, the film thickness at the bending portion 109 is thin, making it easier to bend. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 408 may be formed or applied just before the display panel 201 is bent at the bending portion 109.
[0242] Note that the protective layer 408 may be provided only in the bent portion 109. That is, for example, the protective layer 408 does not have to be provided in the pixel region 102. Alternatively, for example, the protective layer 408 does not have to be provided in the element portion 404. Alternatively, for example, the protective layer 408 does not have to be provided in the connection terminal portion 405. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 408 may be provided in another region.
[0243] Note that the protective layer 408 may include at least one of the materials described in the description of the insulating layer 402. Note that the protective layer 408 may be a single-layer film or a multilayer film.
[0244] 29 and 30 may be combined as shown in Fig. 31. That is, in Fig. 31, a protective layer 406 and a protective layer 408 are provided.
[0245] Note that the protective layer 408 and the protective layer 406 may have the same material. For example, the protective layer 406 and the protective layer 408 may have the same organic material. However, one embodiment of the present invention is not limited to this. For example, the protective layer 408 and the protective layer 406 may have different materials. For example, the protective layer 406 may have an organic material, and the protective layer 408 may have an inorganic material. Alternatively, the number of layers of the protective layer 408 and the protective layer 406 may be the same. However, one embodiment of the present invention is not limited to this. For example, the number of layers of the protective layer 408 and the protective layer 406 may be different. For example, the number of layers of the protective layer 408 may be smaller than the number of layers of the protective layer 406.
[0246] 29 to 31 , for example, the protective layer 406 is provided so as not to be in contact with the element portion 404. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 406 may be provided so as to be in contact with the element portion 404. By providing the protective layer 406 so as to be in contact with the element portion 404, adhesion can be improved.
[0247] 29 to 31 , for example, the protective layer 406 is provided so as not to be in contact with the connection terminal portion 405. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 406 may be provided so as to be in contact with the connection terminal portion 405. By providing the protective layer 406 so as to be in contact with the connection terminal portion 405, adhesion can be improved.
[0248] 29 to 31 , for example, the protective layer 408 is provided so as not to be in contact with the peeling layer 204. However, one embodiment of the present invention is not limited to this. For example, the protective layer 408 may be provided so as to be in contact with the peeling layer 204. By providing the protective layer 408 so as to be in contact with the peeling layer 204, adhesion can be increased.
[0249] 29 to 31 , for example, the protective layer 408 is provided so as not to be in contact with the supporting substrate 202. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 408 may be provided so as to be in contact with the supporting substrate 202. By providing the protective layer 408 so as to be in contact with the supporting substrate 202, adhesion can be increased.
[0250] 29 to 31 , for example, the protective layer 408 is provided so as not to be in contact with the peeling layer 205. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 408 may be provided so as to be in contact with the peeling layer 205. By providing the protective layer 408 so as to be in contact with the peeling layer 205, adhesion can be increased.
[0251] 29 to 31 , for example, the protective layer 408 is provided so as not to be in contact with the supporting substrate 203. However, one embodiment of the present invention is not limited thereto. For example, the protective layer 408 may be provided so as to be in contact with the supporting substrate 203. By providing the protective layer 408 so as to be in contact with the supporting substrate 203, adhesion can be increased.
[0252] 32 shows an example in which the protective layer 406 and the protective layer 408 are provided so as to be in contact with the element portion 404, the connection terminal portion 405, the peeling layer, and the supporting substrate. By providing the protective layer 406 and the protective layer 408 so as to be in contact with the element portion 404, the connection terminal portion 405, the peeling layer, and the supporting substrate, adhesion can be increased. However, one embodiment of the present invention is not limited to this. For example, the protective layer 406 or the protective layer 408 does not have to be in contact with any of the element portion 404, the connection terminal portion 405, the peeling layer, and the supporting substrate.
[0253] 28 , an insulating layer 402 is provided outside the conductive layer 401. However, one embodiment of the present invention is not limited thereto. As an example, FIG. 33 illustrates a case where the insulating layer 402 is not provided outside the conductive layer 401 in FIG. 28 . Since the insulating layer 402 is not provided, the thickness of the bent portion is reduced. Therefore, the radius of curvature when the display panel 201 is bent can be reduced. Furthermore, since the insulating layer 402 is not provided, for example, the conductive layer 401 is less likely to receive stress at the bent portion. Therefore, defects such as cracks, peeling, or disconnection are less likely to occur in the conductive layer 401. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. Alternatively, the reliability of the display panel 101 can be improved.
[0254] 33, a protective layer 406 may be provided similarly to FIG. 29. An example in which the protective layer 406 is provided outside the conductive layer 401 is shown in FIG. 34. Alternatively, as one example, the conductive layer 401 has a region in contact with the protective layer 406. By providing the protective layer 406, for example, it is possible to reduce damage to the film due to external contact or the like.
[0255] 33, a protective layer 408 may be provided similarly to FIG. 30. An example in which the protective layer 408 is provided inside the insulating layer 403 is shown in FIG. 35. By providing the protective layer 408, for example, it is possible to reduce damage to the film due to external contact or the like.
[0256] As shown in Fig. 36, a configuration may be adopted which combines Fig. 35 and Fig. 34. That is, Fig. 36 has protective layers 406 and 408, similar to Fig. 31.
[0257] 28 , an insulating layer 403 is provided inside the conductive layer 401. However, one embodiment of the present invention is not limited thereto. As an example, FIG. 37 illustrates a case where the insulating layer 403 is not provided inside the conductive layer 401 in FIG. 28 . Since the insulating layer 403 is not provided, the thickness of the bending portion is reduced, and as a result, the radius of curvature when the display panel 201 is bent can be reduced. Furthermore, since the insulating layer 403 is not provided, for example, the conductive layer 401 is less likely to receive stress at the bending portion. Therefore, defects such as cracks, film peeling, or disconnection are less likely to occur in the conductive layer 401. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened. Alternatively, the reliability of the display panel 101 can be improved.
[0258] 37, a protective layer 406 may be provided similarly to FIG. 29. An example in which the protective layer 406 is provided on the outer side of the insulating layer 402 is shown in FIG. 38. Alternatively, as one example, the insulating layer 402 has a region in contact with the protective layer 406. By providing the protective layer 406, for example, it is possible to reduce damage to the film due to external contact or the like.
[0259] 37, a protective layer 408 may be provided similarly to FIG. 30. An example in which the protective layer 408 is provided inside the conductive layer 401 is shown in FIG. 39. Alternatively, the conductive layer 401 has a region in contact with the protective layer 408. By providing the protective layer 408, for example, it is possible to reduce damage to the film due to external contact or the like.
[0260] As shown in Fig. 40, a configuration may be adopted which combines Fig. 38 and Fig. 39. That is, Fig. 40 has protective layers 406 and 408, similar to Fig. 31.
[0261] 28 , an insulating layer 403 is provided inside the conductive layer 401, and an insulating layer 402 is provided outside the conductive layer 401. However, one embodiment of the present invention is not limited to this. As an example, FIG. 41 illustrates a case where the insulating layer 403 is not provided inside the conductive layer 401, and the insulating layer 402 is not provided outside the conductive layer 401 in FIG. 28 . Since the insulating layers 402 and 403 are not provided, the thickness of the bending portion is reduced, and as a result, the radius of curvature when the display panel 201 is bent can be reduced. Furthermore, since the insulating layers 402 and 403 are not provided, for example, the conductive layer 401 is less likely to receive stress at the bending portion. Therefore, defects such as cracks, peeling, or disconnection are less likely to occur in the conductive layer 401. As a result, the peripheral region, bezel, or frame region can be narrowed. Alternatively, the pixel region 102 can be widened, or the reliability of the display panel 101 can be increased.
[0262] 41, a protective layer 406 may be provided similarly to FIG. 29. An example in which the protective layer 406 is provided outside the conductive layer 401 is shown in FIG. 42. Alternatively, the conductive layer 401 has a region in contact with the protective layer 406. By providing the protective layer 406, for example, it is possible to reduce damage to the film due to external contact or the like.
[0263] 41, a protective layer 408 may be provided similarly to FIG. 30. An example in which the protective layer 408 is provided inside the conductive layer 401 is shown in FIG. 43. Alternatively, the conductive layer 401 has a region in contact with the protective layer 408. By providing the protective layer 408, for example, it is possible to reduce damage to the film due to external contact or the like.
[0264] As shown in Fig. 44, a configuration may be adopted which combines Fig. 42 and Fig. 43. That is, Fig. 44 has protective layers 406 and 408, similar to Fig. 31.
[0265] 37 , an insulating layer 402 is provided outside the conductive layer 401. However, one embodiment of the present invention is not limited to this. For example, another layer may be provided between the conductive layer 401 and the insulating layer 402. Alternatively, for example, a space may be provided between the conductive layer 401 and the insulating layer 402, and an air layer 407 may be provided therebetween.
[0266] 33 , an insulating layer 403 is provided inside the conductive layer 401. However, one embodiment of the present invention is not limited to this. For example, another layer may be provided between the conductive layer 401 and the insulating layer 403. Alternatively, for example, a space may be provided between the conductive layer 401 and the insulating layer 403, so that an air layer is provided.
[0267] As an example, Fig. 45 shows a configuration in which a space is opened between the conductive layer 401 and the insulating layer 402 in the case of Fig. 37, and an air layer 407 is provided between the conductive layer 401 and the insulating layer 402. Note that, similar to Fig. 45, a configuration in which a space is opened between the conductive layer 401 and the insulating layer 403 in the case of Fig. 33 may also be used, and a configuration in which a space is opened between the conductive layer 401 and the insulating layer 402 and between the conductive layer 401 and the insulating layer 403 in the case of Fig. 28 may also be used, and a configuration in which a space is opened between the conductive layer 401 and the insulating layer 402 and between the conductive layer 401 and the insulating layer 403 in the case of Fig. 45.
[0268] In this way, the provision of the air layer reduces the thickness of the bending portion, thereby making it possible to reduce the radius of curvature when bending the display panel 201. Alternatively, the provision of the air layer reduces the stress on the conductive layer 401, for example, at the bending portion. Therefore, defects such as cracks, peeling, or disconnections are less likely to occur in the conductive layer 401. As a result of the above, it is possible to narrow the peripheral region, bezel, or frame region. Alternatively, it is possible to widen the pixel region 102. Alternatively, it is possible to improve the reliability of the display panel 101.
[0269] As an example of a method for manufacturing the air layer 407, the following method can be used. For example, first, a film (insulating film, conductive film, or semiconductor film) corresponding to the air layer 407 is formed as a sacrificial layer on the conductive layer 401. Then, the insulating layer 402 is formed. Then, wet etching is performed using an etching solution that etches only the sacrificial layer. As a result, the sacrificial layer is removed from the portion corresponding to the air layer 407, and the air layer 407 can be formed. In this way, when forming an air layer, it can be manufactured appropriately by using a sacrificial layer.
[0270] If an air layer is provided between the conductive layer 401 and the insulating layer, the conductive layer 401 may come into contact with the insulating layer when the display panel 201 is folded. As an example, Fig. 46 shows a case where the conductive layer 401 and the insulating layer 402 are in contact with each other as shown in Fig. 45. As shown in Fig. 46, at least a part of the air layer 407 may substantially disappear.
[0271] 45, even when an air layer is provided between the conductive layer 401 and the insulating layer, a protective layer 406 may be provided as in Fig. 29. Fig. 47 shows an example in which the protective layer 406 is provided on the outside of the insulating layer 402. By providing the protective layer 406, for example, it is possible to reduce damage to the film due to external contact or the like.
[0272] 45, a protective layer 408 may be provided similarly to FIG. 30. An example in which the protective layer 408 is provided inside the conductive layer 401 is shown in FIG. By providing the protective layer 408, for example, it is possible to reduce damage to the film due to external contact or the like.
[0273] As shown in Fig. 49, a configuration may be adopted which combines Fig. 47 and Fig. 48. That is, Fig. 49 has protective layers 406 and 408 in the same manner as Fig. 31.
[0274] 45 , an air layer 407 is provided between the conductive layer 401 and the insulating layer 402. However, one embodiment of the present invention is not limited to this. For example, another layer may be provided in part of the air layer 407. As an example, FIG. 50 shows a case where an insulating layer 409 is provided in part of the air layer 407 in the region where the supporting substrate 202 is provided, and an insulating layer 410 is provided in part of the air layer 407 in the region where the supporting substrate 203 is provided.
[0275] 50, a protective layer 406 may be provided similarly to Fig. 29. An example in which the protective layer 406 is provided on the outside of the insulating layer 402 is shown in Fig. 51. By providing the protective layer 406, for example, it is possible to reduce damage to the film due to external contact or the like.
[0276] 50, a protective layer 408 may be provided similarly to Fig. 30. An example in which the protective layer 408 is provided inside the conductive layer 401 is shown in Fig. 52. By providing the protective layer 408, for example, it is possible to reduce damage to the film due to external contact or the like.
[0277] As shown in Fig. 53, a configuration may be adopted in which Fig. 51 and Fig. 52 are combined. That is, Fig. 53 has protective layers 406 and 408, similar to Fig. 31.
[0278] 27 to 53 show cases where the protective layer 406 or the protective layer 408 is not provided. However, one embodiment of the present invention is not limited to this. For example, either one of the protective layer 406 or the protective layer 408 or both of them may be provided. In this case, a new drawing may be constructed using multiple drawings from FIGS. 27 to 53.
[0279] In the case where the protective layer 406 or the protective layer 408 is provided, for example, the protective layer 406 or the protective layer 408 may have a region in contact with at least one of the element portion 404, the connection terminal portion 405, the peeling layer, or the support substrate, as in Fig. 32. In that case, a new drawing may be constructed using a plurality of drawings from Figs.
[0280] 27 to 53 show cases where no air layer is provided. However, one embodiment of the present invention is not limited to this. For example, an air layer may be provided at any layer or between any layers. Alternatively, the air layer may be provided at multiple locations, not just one. In these cases, a new drawing may be constructed using multiple drawings from FIGS. 27 to 53.
[0281] 27 to 53 show the case where the conductive layer 401 is included. However, one embodiment of the present invention is not limited to this. For example, the conductive layer 401 does not have to be included. Alternatively, for example, another conductive layer may be included instead of the conductive layer 401. Alternatively, for example, another conductive layer may be included in addition to the conductive layer 401. In such cases, a new drawing may be constructed using multiple drawings in FIGS. 27 to 53.
[0282] 27 to 53 show the case where the insulating layer 402 is included. However, one embodiment of the present invention is not limited to this. For example, the insulating layer 402 does not have to be included. Alternatively, for example, another insulating layer may be included instead of the insulating layer 402. Alternatively, for example, another insulating layer may be included in addition to the insulating layer 402. In such cases, a new drawing may be constructed using multiple drawings in FIGS. 27 to 53.
[0283] 27 to 53 show the case where the insulating layer 403 is included. However, one embodiment of the present invention is not limited to this. For example, the insulating layer 403 does not have to be included. Alternatively, for example, another insulating layer may be included instead of the insulating layer 403. Alternatively, for example, another insulating layer may be included in addition to the insulating layer 403. In such cases, a new drawing may be constructed using multiple drawings in FIGS. 27 to 53.
[0284] 27 to 53 show cases where the insulating layer 409 and the insulating layer 410 are not included. However, one embodiment of the present invention is not limited to this. For example, either one of the insulating layer 409 and the insulating layer 410 or both of them may be included. In such cases, a new drawing may be constructed using multiple drawings in FIGS. 27 to 53.
[0285] As described above, the support substrate 202 or the support substrate 203 may be considered to have an adhesive layer, for example. Alternatively, the adhesive layer may not be part of the support substrate, and the support substrate may not have an adhesive layer. Alternatively, the support substrate may have adhesiveness as a material of the substrate. Therefore, FIG. 54 shows an example in which the support substrate 202 in FIG. 28 has a support substrate 503 and an adhesive layer 501, and the support substrate 203 has a support substrate 504 and an adhesive layer 502.
[0286] 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 15
[0287] As an example, an example in which Fig. 54 is combined with Fig. 32 is shown in Fig. 55. Similarly, Figs. 27 to 53 can also be combined with Fig. 54.
[0288] 27 to 55 do not specify whether or not something is provided between the supporting substrate 203 and the supporting substrate 202. However, one embodiment of the present invention is not limited thereto. For example, something may be provided between the supporting substrate 203 and the supporting substrate 202. For example, a substrate may be provided between the supporting substrate 203 and the supporting substrate 202. For example, the substrate may have a heat dissipation function. Alternatively, for example, the substrate may have a function of fixing surrounding objects. Alternatively, for example, the substrate may have a function of fixing the supporting substrate 203 and the supporting substrate 202. As an example, FIG. 56 shows a case where a substrate 505 is provided between the supporting substrate 503 and the supporting substrate 504 in FIG. 54.
[0289] Note that, for example, the substrate 505 may be considered to have an adhesive layer. Alternatively, the adhesive layer may not be a part of the substrate 505, and the substrate 505 may not have an adhesive layer. Alternatively, the substrate 505 may be made of a material that has adhesiveness.
[0290] Note that, for example, the substrate 505 may be in contact with the supporting substrate 503. Alternatively, for example, the substrate 505 may be bonded to the supporting substrate 503. Alternatively, for example, an adhesive layer may be provided between the substrate 505 and the supporting substrate 503, and the substrate 505 may be bonded to the supporting substrate 503.
[0291] For example, the substrate 505 may be in contact with the supporting substrate 504. Alternatively, for example, the substrate 505 may be bonded to the supporting substrate 504. Alternatively, for example, an adhesive layer may be provided between the substrate 505 and the supporting substrate 504, and the substrate 505 may be bonded to the supporting substrate 504.
[0292] 27 to 55, similarly to the case of Fig. 56, a substrate 505 can be provided between the support substrate 503 and the support substrate 504, or between the support substrate 203 and the support substrate 202. Furthermore, in that case, a new drawing may be constructed using multiple drawings from Fig. 27 to 56, similarly to the case of Fig. 56.
[0293] 56 shows an example in which the substrate 505 is provided between the supporting substrate 503 and the supporting substrate 504. However, one embodiment of the present invention is not limited to this. For example, something other than the substrate 505 may be provided between the supporting substrate 503 and the supporting substrate 504. For example, an adhesive layer 506 may be provided between the supporting substrate 503 and the supporting substrate 504. For example, FIG. 57A shows an example in which the adhesive layer 506 is provided between the supporting substrate 503 and the supporting substrate 504. For example, the supporting substrate 503 is bonded to the supporting substrate 504 using the adhesive layer 506.
[0294] 27 to 56, similarly to the case of Fig. 57A, an adhesive layer 506 can be provided between the support substrate 503 and the support substrate 504, or between the support substrate 203 and the support substrate 202. Furthermore, in that case, similarly to the case of Fig. 57A, a new drawing may be constructed using multiple drawings from Fig. 27 to 57A.
[0295] 27 to 57A show an example in which a peeling layer is not provided in most of the bending portion 109. Alternatively, in FIGS. 27 to 57A , an example in which the peeling layer is separated into the peeling layer 204 and the peeling layer 205 is shown. However, one embodiment of the present invention is not limited to this. For example, a peeling layer may be provided in most of the bending portion 109. For example, a peeling layer may be provided over the entire display panel 201. For example, the peeling layer may remain connected as the peeling layer 204 in most of the bending portion 109.
[0296] As an example, Fig. 57B shows an example in which the release layer in Fig. 57A remains connected as release layer 204. Alternatively, Fig. 57B shows an example in which release layer 204 is provided in most of bent portion 109 in Fig. 57A.
[0297] 27 to 56, the peeling layer 204 can be left connected as is, as in the case of Fig. 57B. Alternatively, the peeling layer 204 can be provided in most of the bent portion 109, as in the case of Fig. 57B. Furthermore, in this case, a new drawing can be constructed using multiple drawings from Fig. 27 to 57B, as in the case of Fig. 57B.
[0298] 27 to 57B show examples of enlarged views of FIG. 11A. However, one embodiment of the present invention is not limited thereto. For example, new drawings can be created as enlarged views of other drawings of FIG. 11 to FIG. 15, similarly to the cases of FIG. 27 to 57B.
[0299] As an example, FIG. 58 shows a case where FIG. 11D, FIG. 14A, FIG. 14B, or FIG. 15C is applied to FIG. 27.
[0300] Similarly, as an example, FIG. 59 shows a case where FIG. 11D, FIG. 14A, FIG. 14B, or FIG. 15C is applied to FIG. 28.
[0301] Similarly, as an example, FIG. 60 shows a case where FIG. 11D, FIG. 14A, FIG. 14B, or FIG. 15C is applied to FIG. 32.
[0302] Similarly, as an example, FIG. 61 shows a case where FIG. 11D, FIG. 14A, FIG. 14B, or FIG. 15C is applied to FIG. 54.
[0303] Similarly, as an example, FIG. 62 shows a case where FIG. 11D, FIG. 14A, FIG. 14B, or FIG. 15C is applied to FIG. 55.
[0304] Similarly, as an example, FIG. 63 shows a case where FIG. 11D, FIG. 14A, FIG. 14B, or FIG. 15C is applied to FIG. 57A.
[0305] Note that this embodiment mode can be appropriately combined with the same or other embodiment modes described in this specification. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes.
[0306] Embodiment Mode 5 In this embodiment mode, a detailed example of the element portion 404 and the connection terminal portion 405 will be described.
[0307] 64 shows an example in which the element portion 404 in FIG. 57A is enlarged and described in detail. The element portion 404 includes, for example, insulating layers 601, 603, 605, 607, 609, 611, and 613. Alternatively, the element portion 404 includes, for example, a semiconductor layer 602. Alternatively, the element portion 404 includes, for example, conductive layers 604, 606, 608, 610, 612, and 615. Alternatively, the element portion 404 includes, for example, a light-emitting layer 614.
[0308] Here, the insulating layer 601 may function as a base film, for example, or as a film that blocks impurities, for example.
[0309] Here, the insulating layer 603 may function as a gate insulating film, for example, or as a dielectric film in a capacitor element, for example.
[0310] Here, the insulating layer 605 may function as a dielectric film in a capacitor element, for example.
[0311] Here, the insulating layer 607 may function as an interlayer film, for example.
[0312] Here, the insulating layer 609 may have a function as a dielectric film in a capacitor element, for example.
[0313] Here, the insulating layer 611 may function as a planarizing film, for example.
[0314] Here, the insulating layer 613 may have a function as a bank, for example.
[0315] Here, the semiconductor layer 602 may function as a channel of a transistor, for example. Alternatively, the semiconductor layer 602 may function as a wiring, for example. Alternatively, the semiconductor layer 602 may function as an impurity region, for example. Alternatively, the semiconductor layer 602 may function as a source region, for example. Alternatively, the semiconductor layer 602 may function as a drain region, for example. Here, the semiconductor layer 602 may function as an electrode in a capacitor, for example.
[0316] Here, the conductive layer 604 may function as a gate electrode, for example. Alternatively, the conductive layer 604 may function as a gate wiring, for example. Alternatively, the conductive layer 604 may function as an electrode in a capacitor, for example. Alternatively, the conductive layer 604 may function as a capacitor line, for example. Alternatively, the conductive layer 604 may function as a power supply line, for example.
[0317] Here, the conductive layer 606 may function as a gate electrode, for example. Alternatively, the conductive layer 606 may function as a gate wiring, for example. Alternatively, the conductive layer 606 may function as an electrode in a capacitor, for example. Alternatively, the conductive layer 606 may function as a capacitor line, for example. Alternatively, the conductive layer 606 may function as a power supply line, for example.
[0318] Here, the conductive layer 608 may function as a source electrode, for example. Alternatively, the conductive layer 608 may function as a drain electrode, for example. Alternatively, the conductive layer 608 may function as a source wiring, for example. Alternatively, the conductive layer 608 may function as a drain wiring, for example. Alternatively, the conductive layer 608 may function as an electrode in a capacitor, for example. Alternatively, the conductive layer 608 may function as a capacitor line, for example. Alternatively, the conductive layer 608 may function as a power supply line, for example. Alternatively, the conductive layer 608 may function as an initialization line, for example.
[0319] Here, the conductive layer 610 may function as a source electrode, for example. Alternatively, the conductive layer 610 may function as a drain electrode, for example. Alternatively, the conductive layer 610 may function as a gate electrode, for example. Alternatively, the conductive layer 610 may function as a source wiring, for example. Alternatively, the conductive layer 610 may function as a drain wiring, for example. Alternatively, the conductive layer 610 may function as an electrode in a capacitor, for example. Alternatively, the conductive layer 610 may function as a capacitor line, for example. Alternatively, the conductive layer 610 may function as a power supply line, for example. Alternatively, the conductive layer 610 may function as an initialization line, for example.
[0320] Here, the conductive layer 612 may function as a pixel electrode, for example. Alternatively, the conductive layer 612 may function as an anode, for example. Alternatively, the conductive layer 612 may function as an initialization line, for example. Alternatively, the conductive layer 612 may function as a cathode auxiliary wiring, for example.
[0321] Here, the conductive layer 615 may function as a counter electrode, for example, or as a cathode, for example.
[0322] For example, the semiconductor layer 602 is in contact with the conductive layer 608 through a contact hole. For example, the conductive layer 608 is in contact with the conductive layer 612 through a contact hole.
[0323] Here, for example, the insulating layer 403 may be the same film as at least one of the insulating layer 601, the insulating layer 603, the insulating layer 605, the insulating layer 607, the insulating layer 609, the insulating layer 611, and the insulating layer 613. Alternatively, for example, the insulating layer 403 may be a part of at least one of the insulating layer 601, the insulating layer 603, the insulating layer 605, the insulating layer 607, the insulating layer 609, the insulating layer 611, and the insulating layer 613. Alternatively, for example, the insulating layer 403 may be a film that is deposited and etched simultaneously with at least one of the insulating layer 601, the insulating layer 603, the insulating layer 605, the insulating layer 607, the insulating layer 609, the insulating layer 611, and the insulating layer 613. Alternatively, for example, the insulating layer 403 may be formed as a separate island from at least one of the insulating layers 601, 603, 605, 607, 609, 611, and 613. Alternatively, for example, the insulating layer 403 may be formed simultaneously with at least one of the insulating layers 601, 603, 605, 607, 609, 611, and 613. Such a structure can reduce manufacturing costs, for example. Alternatively, it can simplify process steps, for example. However, one embodiment of the present invention is not limited thereto. For example, insulating layer 403 may be a film different from any of insulating layer 601 , insulating layer 603 , insulating layer 605 , insulating layer 607 , insulating layer 609 , insulating layer 611 , and insulating layer 613 .
[0324] Here, for example, the insulating layer 402 may be the same film as at least one of the insulating layer 601, the insulating layer 603, the insulating layer 605, the insulating layer 607, the insulating layer 609, the insulating layer 611, and the insulating layer 613. Alternatively, for example, the insulating layer 402 may be a part of at least one of the insulating layer 601, the insulating layer 603, the insulating layer 605, the insulating layer 607, the insulating layer 609, the insulating layer 611, and the insulating layer 613. Alternatively, for example, the insulating layer 402 may be a film that is deposited and etched simultaneously with at least one of the insulating layer 601, the insulating layer 603, the insulating layer 605, the insulating layer 607, the insulating layer 609, the insulating layer 611, and the insulating layer 613. Alternatively, for example, the insulating layer 402 may be formed as a separate island from at least one of the insulating layers 601, 603, 605, 607, 609, 611, and 613. Alternatively, for example, the insulating layer 402 may be formed simultaneously with at least one of the insulating layers 601, 603, 605, 607, 609, 611, and 613. Such a structure can reduce manufacturing costs, for example. Alternatively, it can simplify process steps, for example. However, one embodiment of the present invention is not limited thereto. For example, insulating layer 402 may be a film different from any of insulating layer 601 , insulating layer 603 , insulating layer 605 , insulating layer 607 , insulating layer 609 , insulating layer 611 , and insulating layer 613 .
[0325] Here, for example, the conductive layer 401 may be the same film as at least one of the conductive layer 604, the conductive layer 606, the conductive layer 608, the conductive layer 610, the conductive layer 612, and the conductive layer 615. Alternatively, for example, the conductive layer 401 may be a part of at least one of the conductive layer 604, the conductive layer 606, the conductive layer 608, the conductive layer 610, the conductive layer 612, and the conductive layer 615. Alternatively, for example, the conductive layer 401 may be a film that is deposited and etched simultaneously with at least one of the conductive layer 604, the conductive layer 606, the conductive layer 608, the conductive layer 610, the conductive layer 612, and the conductive layer 615. Alternatively, for example, the conductive layer 401 may be a film formed from the same starting film as at least one of the conductive layers 604, 606, 608, 610, 612, and 615, and then formed into a separate island. Alternatively, for example, the conductive layer 401 may be a film formed simultaneously with at least one of the conductive layers 604, 606, 608, 610, 612, and 615. By using such a structure, for example, manufacturing costs can be reduced. Or, for example, process steps can be simplified. However, one embodiment of the present invention is not limited thereto. For example, the conductive layer 401 may be a film different from any of the conductive layers 604, 606, 608, 610, 612, and 615.
[0326] As an example, the conductive layer 401 may be a film manufactured simultaneously with the conductive layer 610, the insulating layer 403 may be the same film as the insulating layer 609, and the insulating layer 402 may be the same film as the insulating layer 611. Alternatively, as an example, the conductive layer 401 may be a film manufactured simultaneously with the conductive layer 608, the insulating layer 403 may be the same film as the insulating layer 607, and the insulating layer 402 may be the same film as the insulating layer 609.
[0327] Note that the element portion 404 includes, for example, insulating layers 601, 603, 605, 607, 609, 611, and 613. However, one embodiment of the present invention is not limited thereto. For example, the element portion 404 does not necessarily include some of these insulating layers. Alternatively, for example, the element portion 404 may additionally include another insulating layer.
[0328] Note that the element portion 404 includes, for example, a conductive layer 604, a conductive layer 606, a conductive layer 608, a conductive layer 610, a conductive layer 612, and a conductive layer 615. However, one embodiment of the present invention is not limited to this. For example, the element portion 404 does not necessarily include some of these conductive layers. Alternatively, for example, the element portion 404 may additionally include another conductive layer.
[0329] Note that the element portion 404 includes, for example, a semiconductor layer 602. However, one embodiment of the present invention is not limited thereto. For example, the element portion 404 does not necessarily include a semiconductor layer. Alternatively, the element portion 404 may additionally include another semiconductor layer. For example, the element portion 404 may include an oxide semiconductor layer and a low-temperature polysilicon layer.
[0330] Note that the element portion 404 includes a light-emitting layer 614, for example. However, one embodiment of the present invention is not limited thereto. For example, the element portion 404 does not necessarily include a light-emitting layer. Alternatively, for example, the element portion 404 may additionally include another light-emitting layer.
[0331] As an example, FIG. 65 shows a case where some of the conductive layers and some of the insulating layers in FIG. 64 are not present.
[0332] 66 shows an example in which the connection terminal portion 405 in FIG. 57A is enlarged and described in detail. The connection terminal portion 405 has, as an example, conductive particles 701. Alternatively, the connection terminal portion 405 has, as an example, an FPC 702.
[0333] The conductive layer 401, insulating layer 402, and insulating layer 403 in the bent portion 109 are arranged, for example, to extend to the connection terminal portion 405. The conductive particles 701 are in contact with the conductive layer 401 in an area where the insulating layer 402 is not provided. Furthermore, the conductive particles 701 are in contact with the FPC 702. A signal, voltage, or current is supplied to the conductive layer 401 from an external circuit via the FPC 702.
[0334] For example, a plurality of conductive layers are provided as the plurality of wirings. The plurality of wirings (the plurality of conductive layers) are connected to a plurality of terminals of an external circuit. Alternatively, the plurality of wirings (the plurality of conductive layers) are connected to a plurality of terminals of the FPC 702.
[0335] Next, Fig. 67 shows another example in which connection terminal portion 405 in Fig. 57A is enlarged and described in detail. Connection terminal portion 405 has, as an example, conductive particles 701. Alternatively, connection terminal portion 405 has, as an example, an IC chip 703.
[0336] For example, the conductive particles 701 are in contact with an IC chip 703. For example, a signal, voltage, or current is supplied to the conductive layer 401 via the IC chip 703.
[0337] Note that this embodiment mode can be appropriately combined with the same or other embodiment modes described in this specification. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes.
[0338] Embodiment 6 In this embodiment, examples of a display device, a material, a layer, an element, and the like according to one embodiment of the present invention will be described.
[0339] The substrate may be, for example, a semiconductor substrate (e.g., a single-crystal substrate made of silicon or germanium). In addition to semiconductor substrates, other substrates may include, for example, SOI (Silicon-On-Insulator) substrates, glass substrates, quartz substrates, plastic substrates, sapphire glass substrates, metal substrates, stainless steel substrates, substrates having stainless steel foil, tungsten substrates, substrates having tungsten foil, flexible substrates, laminated films, and paper or base films containing fibrous materials. Examples of glass substrates include barium borosilicate glass, aluminoborosilicate glass, and soda-lime glass. Examples of flexible substrates, laminated films, and base films include plastics such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Another example is a synthetic resin such as an acrylic resin. Other examples include polypropylene, polyester, polyvinyl fluoride, and polyvinyl chloride. Other examples include polyamide, polyimide, aramid, epoxy resin, inorganic vapor deposition film, and paper. If the manufacturing process of the display device includes heat treatment, it is preferable to use a material with high heat resistance for the substrate.
[0340] The insulating layer may be formed using, for example, one or more materials selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, and aluminum nitride.
[0341] In this specification and elsewhere, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.
[0342] The conductive layer may be, for example, a conductive layer that functions as a pixel electrode or a reflective electrode. The conductive layer that functions as a reflective electrode may be, for example, a conductor with high reflectivity to visible light, such as silver, aluminum, or an alloy film of silver (Ag), palladium (Pd), and copper (Cu) (Ag-Pd-Cu (APC) film). The conductive layer may also be, for example, a laminated film of aluminum sandwiched between a pair of titanium films (a laminated film of Ti, Al, and Ti in this order), or a laminated film of silver sandwiched between a pair of indium tin oxide films (a laminated film of ITO, Ag, and ITO in this order).
[0343] The insulating layer can be suitably made of an organic material. For example, the insulating layer can be made of an acrylic resin, a polyimide resin, an epoxy resin, a polyamide resin, a polyimideamide resin, a siloxane resin, a benzocyclobutene resin, a phenolic resin, or a precursor of these resins. Alternatively, the insulating layer can be made of a photosensitive resin. Examples of the photosensitive resin include positive-type materials and negative-type materials.
[0344] The insulating layer is not limited to the above. For example, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, or precursors of these resins may be applied to the insulating layer. Organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral (PVB), polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin may be applied to the insulating layer. For example, a photoresist may be used as a photosensitive resin for the insulating layer. Examples of photosensitive resins include positive-type materials and negative-type materials.
[0345] The adhesive layer can be made of various curable adhesives, such as ultraviolet-curable photocurable adhesives, reactive curable adhesives, thermosetting adhesives, or anaerobic adhesives. Examples of such adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component resins may also be used. An adhesive sheet may also be used.
[0346] <<Constituent Materials of Transistor>> Next, constituent materials that can be used for the transistor will be described.
[0347] [Metal Oxide (Oxide Semiconductor)] The metal oxide including the channel formation region of the transistor preferably includes a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor). For example, the metal oxide that serves as the channel formation region of the metal oxide preferably has a band gap of 2 eV or more, preferably 2.5 eV or more.
[0348] The metal oxide may be an oxide containing indium, and it is preferable to use indium oxide as the metal oxide.
[0349] The metal oxide may be an oxide containing one or more elements selected from In, Sn, Zn, Ga, Al, and Ti. In these oxides, the content of one or more elements selected from In, Sn, Zn, Ga, Al, and Ti is preferably 1 atomic % or more, for example.
[0350] The metal oxide preferably contains at least indium or zinc. It is particularly preferable that it contains indium and zinc. In addition to these, it is also preferable that it contains element M. As element M, one or more selected from aluminum, gallium, yttrium, tin, copper, vanadium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, and antimony can be used. In particular, element M is preferably one or more of aluminum, gallium, yttrium, and tin. It is even more preferable that element M contains one or both of gallium and tin.
[0351] Furthermore, the metal oxide preferably has a stacked structure of multiple oxide layers with different atomic ratios of each metal atom. For example, when the metal oxide contains at least indium (In) and an element M, the ratio of the number of atoms of the element M contained in the metal oxide to the number of atoms of all elements constituting the metal oxide in the stacked layers can be different from each other. Furthermore, the atomic ratio of the element M contained in the metal oxide to In can be different from each other.
[0352] In addition, when the metal oxides to be stacked contain a common element other than oxygen (as a main component), a mixed layer with a low density of defect states can be formed. For example, the metal oxide can be In—Ga—Zn oxide (indium-gallium-zinc oxide), In—Ga—Zn oxide, Ga—Zn oxide, indium oxide, or gallium oxide.
[0353] Specifically, the metal oxide may have a composition of In:Ga:Zn=1:3:4 (atomic ratio) or thereabout, a composition of 1:3:2 (atomic ratio) or thereabout, a composition of 1:1:0.5 (atomic ratio) or thereabout, or a composition of 1:1:2 (atomic ratio) or thereabout. Furthermore, the metal oxide may have a composition of In:Ga:Zn=1:1:1 (atomic ratio) or thereabout, a composition of In:Ga:Zn=1:1:1.2 (atomic ratio) or thereabout, a composition of 4:2:3 (atomic ratio) or thereabout, or a composition of 3:1:2 (atomic ratio) or thereabout.
[0354] The metal oxide may also contain a trace amount of element M. For example, the metal oxide may have a composition of In:M:Zn=4:0.1:1 (atomic ratio) or a composition thereabout, In:M:Zn=2:0.1:1 (atomic ratio) or a composition thereabout, or In:M:Zn=1:0.1:1 (atomic ratio) or a composition thereabout.
[0355] Hereinafter, an indium oxide film that can be used as the oxide semiconductor layer of one embodiment of the present invention will be described.
[0356] In this specification and the like, indium oxide having at least a crystalline portion or a crystalline region in a film is referred to as crystalline indium oxide (crystal IO) or crystalline indium oxide (crystalline IO). Examples of crystalline IO or crystalline IO include single-crystalline indium oxide, polycrystalline indium oxide, and microcrystalline indium oxide.
[0357] Indium oxide is a semiconductor material having physical properties that are completely different from those of oxide semiconductors such as In—Ga—Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.
[0358] The carrier concentration dependence of the Hall mobility of indium oxide, silicon, and IGZO will be explained. Figure 69A shows the carrier concentration dependence of the Hall mobility of silicon (Si) and indium oxide (InO X ) and FIG. 69B is a schematic diagram showing the carrier concentration dependence of the hole mobility for IGZO.
[0359] First, IGZO tends to exhibit higher hole mobility as the carrier concentration increases, as shown by the arrows in Figure 69B. On the other hand, indium oxide tends to exhibit higher hole mobility as the carrier concentration decreases, as shown by the arrows in Figure 69A (see Non-Patent Document 1). This trend is similar to that of silicon; the lower the dopant (impurity) concentration in the material, the less impurity scattering there is and the higher the hole mobility. In other words, the higher the purity and intrinsic indium oxide, the higher the hole mobility. From these results, it can be said that indium oxide, unlike IGZO, is a material with physical properties similar to those of silicon. Note that the characteristics of indium oxide shown in Figure 69A are assumed to be single crystal. Therefore, when indium oxide is non-single crystal (e.g., polycrystalline), the characteristics may differ from those shown in Figure 69A.
[0360] 69A, the range R1 of low carrier concentration has extremely high hole mobility, and therefore can be said to be a range of carrier concentration suitable for, for example, a channel formation region of a transistor. For example, in the case of indium oxide, the range R1 is a range where the carrier concentration value is 1×10 15 cm −3 The range includes, for example, 1×10 14 cm −3 That's it, 1 x 10 18 cm −3 By sufficiently reducing the carrier concentration, the Hall mobility value can be increased to 270 cm 2 It is expected that the resistance can be increased to about / (V·s).
[0361] In addition, in indium oxide, the region where the carrier concentration is in the range R1 may contain an element that lowers the carrier concentration. Examples of elements that lower the carrier concentration include magnesium, calcium, zinc, cadmium, and copper. By substituting these elements for indium, the carrier concentration can be lowered. Examples of elements that lower the carrier concentration include nitrogen, phosphorus, arsenic, and antimony. For example, by substituting nitrogen, phosphorus, arsenic, or antimony for oxygen, the carrier concentration can be lowered.
[0362] On the other hand, the range R2 with a high carrier concentration has a low electrical resistance, and can be said to be a range of carrier concentrations suitable for, for example, the source and drain regions of a transistor, a resistor, or a transparent conductive film. 20 cm −3 The range includes, for example, 1×10 19 cm −3 That's it, 1 x 10 22 cm −3 By increasing the carrier concentration sufficiently, the resistivity can be reduced to 1×10 −4 It is expected that the resistivity can be reduced to Ω·cm or less.
[0363] In addition, in indium oxide, the region where the carrier concentration is in the range R2 may contain an element that increases the carrier concentration. For example, it is preferable that the indium oxide contains an element that is common to the source electrode and drain electrode of the transistor. Examples of elements that increase the carrier concentration include titanium, zirconium, hafnium, tantalum, tungsten, molybdenum, tin, silicon, and boron. In particular, it is more preferable to use an element whose oxide has conductive or semiconducting properties. Note that, as a method for supplying an element that increases the carrier concentration, a method of forming a film containing the element and diffusing it, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment can be used. Note that, unless otherwise specified in this specification, the presence or absence of mass separation is not limited. For example, in this specification, a method of supplying ions after mass separation is referred to as an ion implantation method, and a method of supplying ions without mass separation is referred to as an ion doping method.
[0364] In this way, indium oxide uses a region with a low carrier concentration as the channel formation region of a transistor, and a region with a high carrier concentration as the source and drain regions of the transistor. In other words, indium oxide can be said to be an oxide capable of valence electron control. Note that IGZO may experience strain in the source and drain regions due to stress from electrodes in contact with the IGZO, resulting in the formation of n-type regions. On the other hand, unlike IGZO, indium oxide is capable of valence electron control, and therefore does not require strain to be formed in the film as with IGZO. Less strain in the film is expected to improve reliability. For example, by separately creating a region with a carrier concentration in the range R1 shown in FIG. 69A and a region with a carrier concentration in the range R2 in the indium oxide film, a so-called n-i-n junction (a junction between an n-type region, an i-type region, and an n-type region) can be created. Note that valence electron control in transistors using silicon is generally known. On the other hand, valence electron control in transistors using indium oxide is a novel technical concept that would not normally be conceived.
[0365] By using the above technical concept, the transistor having indium oxide in this specification and the like has two or more, preferably three or more, more preferably four or more, and most preferably five of the following characteristics (1) to (5): (1) high on-current (in other words, high mobility); (2) low off-current; (3) normally-off operation; (4) high reliability; and (5) high cutoff frequency (fT). For example, the transistor having indium oxide in this specification and the like has high mobility, low off-current, and is normally-off operation. The transistor has high mobility and is different from a normally-on transistor.
[0366] Note that a semiconductor being i-type can be rephrased as having the same Fermi level (Ef) and intrinsic Fermi level (Ei) (Ef = Ei). As shown in FIG. 69B, in IGZO, the lower the carrier concentration, the smaller the hole mobility. Therefore, when Ef = Ei is finally achieved, the carriers disappear (in other words, the physical properties become similar to those of an insulator), and the transistor may no longer function. On the other hand, in indium oxide, as shown in FIG. 69A, the lower the carrier concentration, the higher the hole mobility. When Ef = Ei is finally achieved, the hole mobility is maximized. In other words, a transistor containing indium oxide can achieve high field-effect mobility by setting Ef = Ei. Note that a transistor containing indium oxide is likely to be normally-off due to its low carrier concentration. Therefore, a transistor containing indium oxide can be normally-off and achieve high field-effect mobility.
[0367] Note that normally-off refers to a state in which no current flows through a transistor when no potential is applied to the gate or when the gate-source voltage is 0 V. Furthermore, normally-off can be evaluated by the threshold voltage (Vth) or shift value (Vsh) of the transistor. Unless otherwise specified, Vth is calculated by a constant current method. More specifically, Vth refers to a state in which the value of drain current (Id) × channel length (L) ÷ channel width (W) in the Id-Vg characteristics of a transistor is 1 nA (1 × 10 −9 A). Vsh is the gate voltage (Vg) when the drain current (Id) in the Id-Vg characteristic of the transistor is expressed logarithmically and the tangent of the maximum slope is Id = 1 pA (1 × 10 −12 The gate voltage (Vg) is the intersection point between the line of Id = 1 pA and the line extrapolated from two points where the slope of Id is maximum when Id is expressed logarithmically in the Id-Vg characteristics of the transistor. For example, if either or both of Vth and Vsh are zero or a positive value, the transistor can be considered to be normally-off.
[0368] In addition, in a transistor containing indium oxide, in order to make the semiconductor i-type, that is, to achieve Ef = Ei, the film structure in contact with the indium oxide film is important. For example, in a transistor containing indium oxide, a film structure in which a silicon oxide film in contact with the indium oxide film, a hafnium oxide film, and a silicon nitride film are stacked is exemplified. By using this film structure, a semiconductor device with high reliability and Ef = Ei can be obtained.
[0369] In the above film configuration, a film containing oxygen, such as a silicon oxynitride film, a silicon nitride oxide film, an aluminum oxide film, or a gallium oxide film, can be used instead of the silicon oxide film. Also, in the above film configuration, a silicon nitride oxide film, a silicon oxynitride film, or the like can be used instead of the silicon nitride film. The hafnium oxide film, which is located closer to the indium oxide film than the silicon nitride film, functions as a gettering site for hydrogen.
[0370] The above film configuration can also be considered as a stacked structure of a film (e.g., a silicon oxide film) capable of supplying oxygen to the indium oxide film from the indium oxide film side, a film (e.g., a hafnium oxide film) capable of gettering hydrogen, and a film (e.g., a silicon nitride film) that suppresses the penetration of oxygen and hydrogen. With this configuration, oxygen vacancies in the indium oxide film are filled with oxygen in the silicon oxide film. Hydrogen in the indium oxide film is captured by the hafnium oxide film by heat treatment or the like. Furthermore, the provision of the silicon nitride film results in a film configuration that reduces the penetration of oxygen and hydrogen from the outside. That is, with the above film configuration, the indium oxide film can be made closer to i-type. Therefore, a transistor having the above-described indium oxide film has high field-effect mobility and high reliability.
[0371] Next, an indium oxide film applied to a transistor will be described. The indium oxide film preferably has crystallinity (i.e., has crystal grains). Examples of films having crystal grains include single-crystal films, polycrystalline films, and amorphous films containing crystal grains (also called microcrystalline films). In particular, the indium oxide film is preferably a polycrystalline film, and more preferably a single-crystal film. A single-crystal film does not have grain boundaries. Impurities (typically, insulating impurities, insulating oxides, etc.) that hinder carrier flow tend to segregate at grain boundaries. The use of a single-crystal film can suppress carrier scattering at grain boundaries, thereby realizing a transistor exhibiting high field-effect mobility. Furthermore, the use of a single-crystal film has the excellent effect of suppressing variations in transistor characteristics due to the grain boundaries.
[0372] Furthermore, polycrystalline films are preferable because they can reduce carrier scattering and exhibit high field-effect mobility compared to microcrystalline or amorphous films. When using a polycrystalline film, it is preferable to use a film with as large a crystal grain size as possible and with few crystal grain boundaries. Note that in a transistor using an indium oxide polycrystalline film, if there is no crystal grain boundary in the channel formation region or no crystal grain boundary is observed, the channel formation region is located within a single crystal region included in the polycrystalline film, and therefore the transistor can be considered to be using single-crystal indium oxide.
[0373] The crystallinity of indium oxide can be analyzed by, for example, X-ray diffraction (XRD), transmission electron microscope (TEM), or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.
[0374] In this specification and the like, a semiconductor layer in which no crystal grain boundary is observed in the channel formation region, a semiconductor layer in which the channel formation region is included in one crystal grain, or a semiconductor layer in which the crystal axis direction is the same in at least two regions in the channel formation region can be called a single crystal film. Also, a semiconductor layer in which, in the channel formation region, within one crystal grain, the direction of another crystal axis continuously changes around a certain crystal axis or a certain crystal orientation as the axis of rotation can be called a single crystal film.
[0375] The channel formation region refers to a region of the semiconductor layer that overlaps (or faces) the gate electrode via the gate insulating layer, and is located between the region in contact with the source electrode and the region in contact with the drain electrode. The current path in the channel formation region is the shortest distance between the source electrode and the drain electrode. Therefore, the crystal grains, crystal grain boundaries, crystal axes, crystal orientation, etc. in the channel formation region can be confirmed by observing a cross section including the semiconductor layer, the source electrode, and the drain electrode.
[0376] The indium oxide film in the channel formation region preferably has a lower impurity concentration. Impurities in the indium oxide film in the channel formation region can be a scattering source of carriers, which can lead to a decrease in field-effect mobility. These impurities can also hinder the crystal growth of the indium oxide film. Examples of impurities in the indium oxide film include boron and silicon. The indium oxide film preferably contains these impurities at concentrations of 0.1% or less, and more preferably 0.01% (100 ppm) or less. Carbon, hydrogen, and other elements may be contained in the film-forming gas or precursor during film formation, and may remain in the indium oxide film in greater amounts than the above-mentioned impurities.
[0377] The indium oxide film in the channel formation region may contain an element that can become the same trivalent cation as indium, as long as the crystal maintains a cubic crystal structure (bixbyite type). Examples of such an element include Group 13 elements of the periodic table, such as gallium and aluminum, and Group 3 elements of the periodic table. These elements exist mainly as trivalent cations in oxides, and therefore the carrier concentration of indium oxide can be maintained low.
[0378] In addition, the indium oxide film in this specification and the like has a high film density. 2 O 3 The film densities of the films are shown in Table 1.
[0379]
[0380] As shown in Table 1, the film density of the indium oxide film was evaluated at six levels, Sample 1 to Sample 6. In Table 1, Condition 1 is the condition of the base of the indium oxide film, Samples 1 to 3 are glass, Sample 4 is a SiOx film formed by sputtering, and Samples 5 and 6 are yttria-stabilized zirconia (YSZ). Condition 2 is the film formation condition of the indium oxide film, Samples 1 to 3 are film formation by sputtering (SP), and Samples 4 to 6 are film formation by ALD. Condition 3 is a heat treatment condition after the formation of the indium oxide film, where Sample 1, Sample 4, and Sample 5 are as-depo (no heat treatment (as-depo)), Sample 2 is baked at 350°C in a CDA atmosphere, Sample 3 is baked at 650°C in a CDA atmosphere, and Sample 6 is baked at 250°C in a vacuum atmosphere.
[0381] In Table 1, CDA stands for clean dry air. It is preferable that the atmosphere used in the heat treatment (condition 3) after the formation of the indium oxide film contains as little hydrogen, water, and the like as possible. It is preferable to use a high-purity gas with a dew point of −60° C. or lower, preferably −100° C. or lower, as the atmosphere.
[0382] As shown in Table 1, the indium oxide film tends to have a higher film density when subjected to heat treatment compared to when not subjected to heat treatment (Sample 1, Sample 4, or Sample 5). This is because the heat treatment removes impurity elements (e.g., carbon, nitrogen, hydrogen, argon, etc.) from the film, thereby increasing the purity of the indium oxide film. Furthermore, as shown in Samples 5 and 6, the indium oxide film on YSZ has a film density of 7.00 g / cm. 3 The theoretical film density of an indium oxide film is 7.18 g / cm 3 In this specification, the range of the film density of the indium oxide film is 6.70 g / cm 3 7.18g / cm or more 3 Preferably, it is 6.90 g / cm or less. 3 7.18g / cm or more 3 More preferably, it is 7.00 g / cm or less. 3 7.18g / cm or more 3 The following is the result.
[0383] The film density can be evaluated by, for example, Rutherford backscattering spectroscopy (RBS) or X-ray reflectometry (XRR). Differences in film density can sometimes be evaluated by cross-sectional transmission electron microscope (TEM) images. In TEM observation, a high film density results in a dense (dark) transmission electron (TE) image, whereas a low film density results in a faint (bright) transmission electron (TE) image.
[0384] By using such an indium oxide film in a transistor, the field effect mobility of the transistor can be increased to 50 cm 2 / (V·s) or more, preferably 100 cm 2 / (V·s) or more, more preferably 150 cm 2 / (V·s) or more, more preferably 200 cm 2 / (V·s) or more, more preferably 250 cm 2 / (V·s) or more.
[0385] One of the features of an indium oxide film is that it has higher oxygen permeability (diffusibility) than an IGZO film. As shown in FIG. 69C, an indium oxide film (InO X Oxygen (O) diffusing into the indium oxide film passes through the indium oxide film and becomes oxygen molecules (O 2 ) and is released as water molecules (H 2 O) may be released in the film. O In the case where an indium oxide film is present, oxygen atoms diffuse to compensate for the oxygen vacancies. Since oxygen diffuses easily in the indium oxide film, it can be said that oxygen vacancies are more easily compensated for in the indium oxide film than in the IGZO film.
[0386] As described above, an indium oxide film can more easily reduce oxygen vacancies in the film than an IGZO film. Therefore, by using such an indium oxide film in a transistor, a transistor exhibiting extremely high reliability can be realized.
[0387] Furthermore, as shown in FIG. 69C, the indium oxide film diffuses hydrogen. Hydrogen that diffuses into the indium oxide film from the outside passes through the indium oxide film and becomes hydrogen molecules (H 2 ) or reacts with oxygen contained in the membrane and is released as water molecules.
[0388] A transistor using an indium oxide film is an accumulation-type transistor that uses electrons as majority carriers. Assuming that the carrier relaxation time is constant, the smaller the effective mass of the electrons (carriers), the higher the electron mobility. In other words, by using indium oxide, which has a small effective mass of electrons, for a transistor, the on-state current or field-effect mobility of the transistor can be increased.
[0389] Table 2 shows the results of single crystal indium oxide (here, In 2 O 3) and single-crystal silicon (Si). As shown in Table 2, indium oxide is characterized by a small effective mass of electrons and a large effective mass of holes. Indium oxide also has the characteristic that the effective mass of electrons is almost independent of the crystal orientation. Therefore, by using crystalline indium oxide in a transistor, a transistor with high field-effect mobility and high frequency characteristics (also called f characteristics) can be realized. Furthermore, since the effective mass of holes is large, a transistor with extremely small off-current can be realized. For example, by applying an indium oxide film to a vertical transistor, the off-current per 1 μm of channel width can be reduced to 1 fA (1×10) in an environment of 125° C. −15 A) or less, or 1aA (1 x 10 −18 A) or less, and under room temperature (25°C) conditions, −18 A) or less, or 1zA (1 x 10 −21 Furthermore, as shown in Table 2, indium oxide has a smaller effective mass of electrons and a larger effective mass of holes than silicon, and therefore may be able to realize a transistor with higher field-effect mobility and lower off-state current than a Si transistor.
[0390]
[0391] It is preferable to provide a seed layer so as to be in contact with at least a portion of the crystalline indium oxide film. The seed layer is preferably made of a material containing crystals with a small difference in lattice constant (also called lattice mismatch) with indium oxide. This can improve the crystallinity of the indium oxide film. Note that a substrate (e.g., a single-crystal substrate) may be used as one of the layers in contact with at least a portion of the crystalline indium oxide film.
[0392] One method for evaluating the degree of lattice mismatch is to use the value of the lattice mismatch shown below. The lattice mismatch Δa [%] of the crystals of the formed film (here, the indium oxide film) with respect to the crystals of the seed layer is expressed as Δa = ((L 1 -L 2 ) / L 2 ) × 100, where L1 is the length or lattice constant of the unit lattice vector of the crystal of the formed film, and L 2 is the length of the unit cell vector or the lattice constant of the crystal of the seed layer.
[0393] The smaller the absolute value of the lattice mismatch Δa between the seed layer and the indium oxide film, the more preferable, and it is most preferably 0. For example, Δa can be set to −5% or more and 5% or less, preferably −4% or more and 4% or less, more preferably −3% or more and 3% or less, and even more preferably −2% or more and 2% or less.
[0394] Here, the indium oxide crystal has a cubic crystal structure (bixbyite type). For example, the crystal of yttria-stabilized zirconia (YSZ) can have a cubic crystal structure (fluorite type). The lattice mismatch of the indium oxide crystal with the cubic YSZ crystal is in the range of −2% to 2%, and a single crystal film of indium oxide can be epitaxially grown on the YSZ substrate.
[0395] It should be noted that the crystal structure of the seed layer and the crystal structure of the indium oxide film may not necessarily have the same crystal system or crystal orientation. For example, a film having crystals of a hexagonal or trigonal structure can be used under indium oxide having crystals of a cubic structure. For example, by setting the crystal orientation of the surface of the seed layer to
[001] and the crystal orientation of the underside of the indium oxide film to
[111] , the requirements related to the crystal orientation necessary for epitaxial growth can be satisfied. Examples of hexagonal or trigonal crystals include wurtzite structure, YbFe 2 O 4 Type structure, Yb 2 Fe 3 O 7 YbFeFe alloys have the following structures: 2 O 4 Type structure or Yb 2 Fe 3 O 7An example of a crystal having a crystalline structure is IGZO. It should be noted that a single crystal film of indium oxide can be formed not only on a YSZ substrate but also on an insulating film. On the other hand, it is difficult to form a single crystal film of silicon on an insulating film. Silicon crystals have a diamond structure. As such, indium oxide and silicon have similar properties in terms of single crystal. However, when comparing indium oxide and silicon in terms of whether they can be formed as single crystals on an insulating film, they have different properties.
[0396] Note that a semiconductor material applicable to a semiconductor layer included in a transistor of one embodiment of the present invention is not limited to an oxide semiconductor. For example, a semiconductor containing an element or a compound semiconductor can be used. Examples of semiconductors containing an element include silicon (including single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon) and germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. Examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may contain impurities as dopants.
[0397] Alternatively, the semiconductor layer included in the transistor of one embodiment of the present invention may include a layered material that functions as a semiconductor. A layered material is a general term for a group of materials having a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via bonds weaker than covalent bonds or ionic bonds, such as van der Waals bonds. A layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity for a channel formation region, a transistor with high on-state current can be provided.
[0398] Examples of the layered material include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen (an element belonging to Group 16). Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specific examples of transition metal chalcogenides that can be used as semiconductor layers of transistors include molybdenum sulfide (typically MoS 2 ), molybdenum selenide (typically MoSe 2 ), molybdenum telluride (typically MoTe 2 ), tungsten sulfide (typically WS 2 ), tungsten selenide (typically WSe 2 ), tungsten tellurium (typically WTe 2 ), hafnium sulfide (typically HfS 2 ), hafnium selenide (typically HfSe 2 ), zirconium sulfide (typically ZrS 2 ), zirconium selenide (typically ZrSe 2 ) etc.
[0399] The crystallinity of a semiconductor material used for a semiconductor layer of a transistor according to one embodiment of the present invention is not particularly limited, and any of an amorphous semiconductor, a single-crystal semiconductor, and a semiconductor having crystallinity other than a single crystal (a polycrystalline semiconductor, a microcrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.
[0400] [Conductive Layer] The conductive layer preferably uses, for example, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, or an alloy containing two or more of the above metal elements. The conductor preferably uses, for example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel. Tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, and an oxide containing lanthanum and nickel are also preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. The conductor may be a semiconductor with high electrical conductivity, such as polycrystalline silicon containing an impurity element (such as phosphorus), or a silicide (such as nickel silicide).
[0401] A plurality of conductive layers formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing oxygen. A stacked structure may also be formed by combining the above-described material containing a metal element and a conductive material containing nitrogen. A stacked structure may also be formed by combining the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.
[0402] The conductor functioning as a source electrode or a drain electrode preferably uses a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, or an alloy containing two or more of the above metal elements. For example, the conductive layer preferably uses tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel. Furthermore, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, and an oxide containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen.
[0403] The metal oxide may be, for example, a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium. In particular, it is preferable to use, as the metal oxide, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate), which is an insulator containing an oxide of either or both of aluminum and hafnium.
[0404] Note that this embodiment mode can be appropriately combined with the same or other embodiment modes described in this specification. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes. For example, the configurations, structures, methods, and the like described in this embodiment mode can be appropriately combined and used with the configurations, structures, methods, and the like described in the other embodiment modes.
[0405] In this embodiment, electronic devices including a display device manufactured using one embodiment of the present invention will be described. Note that the electronic devices exemplified in this embodiment include the display device of one embodiment of the present invention in a display portion. Therefore, the electronic devices have high resolution.
[0406] One embodiment of the present invention includes a display device and one or more selected from an antenna, a battery, a housing, a camera, a speaker, a microphone, a touch sensor, and an operation button.
[0407] Furthermore, the electronic device of one embodiment of the present invention may include a secondary battery, and it is preferable that the secondary battery can be charged using contactless power transmission.
[0408] Examples of secondary batteries include lithium ion secondary batteries (e.g., lithium polymer batteries (lithium ion polymer batteries) using a gel electrolyte), nickel-metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, and silver-zinc batteries.
[0409] The electronic device of one embodiment of the present invention may include an antenna. By receiving a signal through the antenna, images, information, and the like can be displayed on a display portion. When the electronic device includes an antenna and a secondary battery, the antenna may be used for contactless power transmission.
[0410] The display portion of the electronic device according to one embodiment of the present invention can display images with a resolution of, for example, full high definition, 4K2K, 8K4K, 16K8K, or higher.
[0411] Examples of electronic devices include electronic devices with relatively large screens such as television devices, notebook personal computers, monitor devices, digital signage, pachinko machines, and game machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound playback devices.
[0412] An electronic device to which one embodiment of the present invention is applied can be incorporated along a flat or curved surface of an interior or exterior wall of a building such as a house or a building, or along a flat or curved surface of an interior or exterior of an automobile or the like.
[0413] 68A is a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 has a housing 5510 and a display unit 5511. The display unit 5511 is provided with a touch panel and the housing 5510 is provided with buttons as input interfaces.
[0414] 68B is a diagram showing the appearance of an information terminal 5900, which is an example of a wearable terminal. The information terminal 5900 includes a housing 5901, a display portion 5902, operation buttons 5903, a crown 5904, and a band 5905.
[0415] 68C also illustrates a notebook information terminal 5300. The notebook information terminal 5300 illustrated in Fig. 68C includes, for example, a housing 5330a including a display unit 5331 and a housing 5330b including a keyboard unit 5350.
[0416] 68A to 68C are taken as examples of electronic devices, but the present invention can also be applied to information terminals other than smartphones, wearable terminals, and notebook information terminals. Examples of information terminals other than smartphones, wearable terminals, and notebook information terminals include PDAs (Personal Digital Assistants), desktop information terminals, and workstations.
[0417] 68D is a diagram showing the appearance of a camera 8000 with a viewfinder 8100 attached. The camera 8000 has a housing 8001, a display unit 8002, operation buttons 8003, and a shutter button 8004. A detachable lens 8006 is attached to the camera 8000. The viewfinder 8100 has a housing 8101, a display unit 8102, and a button 8103.
[0418] Note that the camera 8000 may have the lens 8006 and the housing integrated together.
[0419] The camera 8000 can capture an image by pressing a shutter button 8004 or touching a display portion 8002 that functions as a touch panel.
[0420] The housing 8001 has a mount with electrodes, and in addition to the finder 8100, for example, a strobe device can be connected.
[0421] The housing 8101 is attached to the camera 8000 by a mount that engages with the mount of the camera 8000. The viewfinder 8100 can display an image received from the camera 8000 on a display portion 8102.
[0422] The button 8103 functions as a power button.
[0423] In the camera 8000, the display device of one embodiment of the present invention can be applied to a display portion 8002 and a display portion 8102 of a finder 8100. Note that the camera 8000 may have a built-in finder.
[0424] 68E is a diagram showing the appearance of a portable game machine 5200, which is an example of a game machine. The portable game machine 5200 has a housing 5201, a display portion 5202, and buttons 5203.
[0425] Furthermore, the images of the portable game console 5200 can be output by a display device provided in a television device, a display for a personal computer, a game display, or a head-mounted display.
[0426] A low-power consumption portable game console 5200 can be realized by applying the display device described in the above embodiment to the portable game console 5200. In addition, the low power consumption can reduce heat generation from a circuit, thereby reducing the influence of heat on the circuit itself, peripheral circuits, and modules.
[0427] 68E illustrates a portable game machine as an example of a game machine, but the electronic device of one embodiment of the present invention is not limited to this. Examples of the electronic device of one embodiment of the present invention include a stationary game machine, an arcade game machine installed in an entertainment facility (e.g., an arcade game center or an amusement park), and a pitching machine for batting practice installed in a sports facility.
[0428] 68F is a perspective view of a television set. The television set 9000 includes a housing 9002, a display unit 9001, speakers 9003, operation keys 9005 (including a power switch or an operation switch), connection terminals 9006, and a sensor 9007 (for example, a sensor having a function of measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light (including infrared rays), liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, or odor; or a sensor having a function of detecting odor or light (including infrared rays)). The display device of one embodiment of the present invention can be included in the television set. The television set can include a display unit 9001 having a screen size of, for example, 50 inches or more or 100 inches or more.
[0429] A low-power television set 9000 can be realized by applying the display device described in the above embodiment to the television set 9000. Furthermore, low power consumption can reduce heat generation from a circuit, thereby reducing the influence of heat generation on the circuit itself, peripheral circuits, and modules.
[0430] [Mobile Body] The display device according to one embodiment of the present invention can also be applied to the vicinity of the driver's seat of an automobile, which is a mobile body.
[0431] Fig. 68G is a diagram showing the area around the windshield in the interior of a car, illustrating display panels 5701, 5702, and 5703 attached to the dashboard, as well as display panel 5704 attached to a pillar.
[0432] The display panels 5701 to 5703 can provide various information by displaying navigation information, a speedometer, a tachometer, mileage, a fuel gauge, gear status, and air conditioning settings. The display items and layouts displayed on the display panels can be changed as needed to suit the user's preferences, improving the design. The display panels 5701 to 5703 can also be used as lighting devices.
[0433] The display panel 5704 can complement the view blocked by the pillar (blind spot) by displaying an image from an imaging means provided on the vehicle body. That is, by displaying an image from an imaging means provided on the outside of the vehicle, blind spots can be complemented and safety can be improved. Furthermore, by displaying an image that complements the invisible part, safety can be confirmed more naturally and without discomfort. The display panel 5704 can also be used as a lighting device.
[0434] The display device of one embodiment of the present invention can be applied to the display panels 5701 to 5704, for example.
[0435] Although an automobile is described above as an example of a moving object, the moving object is not limited to an automobile. For example, examples of the moving object include a train, a monorail, a ship, and an aircraft (e.g., a helicopter, an unmanned aerial vehicle (drone), an airplane, and a rocket), and the display device of one embodiment of the present invention can be applied to these moving objects.
[0436] [Digital Signage] Fig. 68H illustrates an example of a digital signage that can be attached to a wall. Fig. 68H illustrates a state in which a digital signage 6200 is attached to a wall 6201. A display device of one embodiment of the present invention can be applied to, for example, a display portion of the digital signage 6200. The digital signage 6200 may be provided with an interface such as a touch panel.
[0437] Although the above description shows an example of an electronic device that can be mounted on a wall as an example of an electronic signboard, the type of electronic signboard is not limited to this. For example, electronic signboards can be mounted on a pole, placed on a stand on the ground, or installed on the roof or side wall of a building.
[0438] 68I is a diagram showing the appearance of an electronic device 8300 which is a head-mounted display. The electronic device 8300 includes a housing 8301, a display portion 8302, a band-shaped fixture 8304, a fixture 8304 a to be attached to the head, and a pair of lenses 8305.
[0439] Also, although not shown in FIG. 68I, the electronic device 8300 may be provided with an interface such as an operation button or a power button.
[0440] A user can view the display on the display portion 8302 through the lens 8305. Note that it is preferable to curve the display portion 8302 because the user can feel a high sense of presence. In addition, by viewing different images displayed in different regions of the display portion 8302 through the lens 8305, three-dimensional display using parallax can be performed. Note that the configuration is not limited to one display portion 8302, and two display portions 8302 may be provided, with one display portion being arranged for each eye of the user.
[0441] Note that, for example, a display device with extremely high definition is preferably used for the display portion 8302. By using a display device with high definition for the display portion 8302, even if an image is enlarged using the lens 8305, pixels are not visible to a user, and more realistic images can be displayed.
[0442] Furthermore, the head-mounted display, which is an electronic device of one embodiment of the present invention, may have a configuration of an electronic device that is a glasses-type head-mounted display, instead of the electronic device 8300 that is a goggle-type head-mounted display as shown in Figure 68I.
[0443] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification. For example, the configuration, structure, method, and the like described in this embodiment mode can be appropriately combined with the configuration, structure, method, and the like described in other embodiment modes.
[0444] 101: display panel, 102: pixel region, 103: cross section, 104: end, 105: connection portion, 106: circuit, 107: circuit, 108: display portion, 109: bent portion, 110: terminal portion, 111: cross section, 201: display panel, 202: support substrate, 203: support substrate, 204: peeling layer, 205: peeling layer, 206: residue, 207: support substrate, 208: peeling layer, 209: opening region, 210: opening region, 211: sensor, 301: glass substrate, 302: peeling substrate, 401: conductive layer, 402: insulating layer, 403: insulating layer, 404: element portion, 405: connection terminal portion, 406: protective layer, 407: air layer, 408: protective layer, 409: insulating layer, 410: insulating layer, 501: adhesive layer, 502: adhesive layer, 503: support substrate, 504: support substrate, 505: substrate, 506: adhesive layer, 601: insulating layer, 602: semiconductor layer, 603: insulating layer, 604: conductive layer, 605: insulating layer, 606: conductive layer, 607: insulating layer, 608: conductive layer, 609: insulating layer, 610: conductive layer, 611: insulating layer, 612: conductive layer, 613: insulating layer, 614: light-emitting layer, 615: conductive layer, 701: conductive particles, 702: FPC, 703: IC chip, 5200: portable game console, 5201: housing, 5202: display unit, 5203: buttons, 5300: notebook information terminal, 5330a: housing, 5330b: housing, 5331: display unit, 5350: keyboard unit, 5500: information terminal, 5510: housing, 5511: display unit, 5701: display panel, 5702: display panel, 5703: display panel, 5704: display panel, 5900: information terminal, 5901: housing, 5902: display unit, 5903: operation buttons, 5904: crown, 5905: band, 6200 : Digital signboard, 6201: Wall, 8000: Camera, 8001: Housing, 8002: Display unit, 8003: Operation buttons, 8004: Shutter button, 8006: Lens, 8100: Viewfinder, 8101: Housing, 8102: Display unit, 8103: Button, 8300: Electronic device, 8301: Housing, 8302: Display unit, 8304: Fixture, 8304a: Fixture, 8305: Lens, 9000: Television device, 9001: Display unit, 9002: Housing, 9003: Speaker, 9005: Operation keys, 9006: Connection terminal, 9007: Sensor
Claims
A flexible display device, having a first region and a second region; the first area has an area that can be displayed; the second region has a region where the display device can be folded, The second region is a region that does not have a release layer. The display device according to claim 1 ; The housing and An electronic device having: A method for manufacturing a display device, comprising a first step and a second step, the second step is a step subsequent to the first step, the first step includes a step of peeling the folded portion from the substrate, The second step includes removing at least a part of the release layer in the bent portion. A method for manufacturing an electronic device, comprising: The electronic device includes a display device and a housing, The method for manufacturing an electronic device, wherein the display device is manufactured using the method for manufacturing a display device according to claim 3 . having a first region and a second region; the first region includes a portion of a display panel, a first support substrate, and a first release layer; the second region includes another part of the display panel, a second support substrate, and a second release layer; the second region has a first portion and a second portion; the first portion has a foldable region and does not have the second release layer; The second portion includes the second support substrate and the second release layer. In claim 5, The display device, wherein one or more of the first release layer and the second release layer comprises polyimide. In claim 5, A display device in which one or more of the first release layer and the second release layer include tungsten or tungsten oxide. In claim 5, At least one of the first release layer and the second release layer has a first polyimide layer, a second polyimide layer, and an insulating film made of an inorganic material located between the first polyimide layer and the second polyimide layer. In claim 5, a residue is present between the first release layer and the first support substrate; The display device, wherein the residue comprises silicon. In claim 5, the display panel has an element portion and a connection terminal portion, the element portion has a pixel region, The display device, wherein the connection terminal section has one or more selected from a protection circuit, an output switching circuit, an inspection circuit, a source driver circuit, and a gate driver circuit.
Citation Information
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