Power converter

The proposed power converter topology with magnetically coupled inductors and series-connected capacitors effectively reduces ripple and noise, enhancing efficiency and THD performance without increasing costs.

WO2026013600A1PCT designated stage Publication Date: 2026-01-15DCBEL INC +1
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Patent Information

Application Number
PCT/IB2025/056970
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-10
Filing Date
2025-07-09
Publication Date
2026-01-15

AI Technical Summary

Technical Problem

Existing bidirectional power converters face challenges in reducing heat dissipation and ripple fluctuations while maintaining power conversion efficiency, particularly due to the lack of magnetic coupling between inductors.

Method used

A power converter topology is introduced where a pair of inductors are magnetically coupled, with a midpoint connection to the AC neutral, and series-connected capacitors split the DC voltage, reducing ripple and noise without affecting efficiency.

Benefits of technology

This configuration achieves a significant reduction in total harmonic distortion (THD) from about 7% to 1% at both AC and DC sides, maintaining efficiency above 97% with magnetic coupling levels between 0% to 90%, and eliminates the need for expensive EMI filters.

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Abstract

With a coupled pair of inductors brought between front end and back end power switches, and with the DC voltage split using a pair of series connected capacitors and the midpoint being connected to the AC neutral, power conversion can be achieved with reduced ripple and / or total harmonic distortion. The two pairs of series connected back end switches are connected between AC neutral and a respective DC terminal with the midpoint between each pair of back end switches being connected to one of the coupled pair of inductors. A switch controller is operative to receive an input defining a direction of power conversion from AC to DC or DC to AC and a level of power conversion or a target output voltage of power conversion to generate gate signals for the power switches accordingly.
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Description

POWER CONVERTER

[0001] This patent application claims priority of US provisional patent application 63 / 669,491 filed July 10, 2024.Technical Field

[0002] The present patent application concerns power AC to DC conversion.Background

[0003] Bidirectional power converters able to convert DC power to AC power in an inverter mode and able to convert AC power to DC power in an active rectifier mode are well known in the art. It is desirable to have a converter circuit that reduces heat dissipation of the power switches, capacitors and inductors, while reducing the ripple or fluctuations in the converted power.Summary

[0004] In the proposed solution, a power converter is provided in which the inductor is brought between front end and back end power switches and the inductor is a pair of inductors. The DC voltage is split using a pair of series connected capacitors with the midpoint being connected to the AC neutral. The two pairs of series connected back end switches are connected between AC neutral and a respective DC terminal with the midpoint between each pair of back end switches being connected to one of the coupled pair of inductors.

[0005] Such a topology of power converter is disclosed in PCT publication WO2022 / 171947 to offer a reduced voltage at power switches, however, magnetic coupling between the pair of inductors is absent. Applicant has found that magnetic coupling between the pair of inductors can offer an improvement in the ripple or noise generated by the power converter during power conversion without interfering with the power conversion efficiency or functionality of the power converter.Brief Description of the Drawings

[0006] The invention will be better understood by way of the following detailed description of embodiments of the invention with reference to the appended drawings, in which:

[0007] Figure 1 is a schematic diagram of a power converter topology according to the prior art;

[0008] Figure 2 is a schematic diagram of a power converter topology according to a first embodiment;

[0009] Figure 3A is a plot obtained by simulation of the circuit of Figure 2 showing total harmonic distortion (THD) at the AC side of the power converter operated in an inverter mode as a function of magnetic coupling between the pair of inductors for given operating conditions showing a reduction in THD from about 7% to about 1% with increasing magnetic coupling;

[0010] Figure 3B is a plot obtained by simulation of the circuit of Figure 2 showing total harmonic distortion at the DC side of the power converter operated in rectifier mode as a function of magnetic coupling between the pair of inductors for given operating conditions showing a reduction in THD from about 5.5% to about 1% with increasing magnetic coupling;

[0011] Figure 3C is a plot obtained by simulation of the circuit of Figure 2 showing power conversion efficiency of the power converter operated in an inverter mode as a function of magnetic coupling between the pair of inductors for given operating conditions showing that efficiency is not affected by magnetic coupling;

[0012] Figure 3D is a plot obtained by simulation of the circuit of Figure 2 showing power conversion efficiency of the power converter operated in a rectifier mode as a function of magnetic coupling between the pair of inductors for given operating conditions showing that efficiency is minimally affected by magnetic coupling;

[0013] Figure 4 is a schematic diagram of a power converter controller for the power converter topology of Figure 2 according to an embodiment;

[0014] Figure 5 A is a table of power switch patterns according to an embodiment;

[0015] Figure 5B is a waveform diagram of two triangular wave carrier signals and three different sinusoidal reference signals schematically illustrating how the reference signal amplitude affects the direction of power conversion from AC to DC or DC to AC;

[0016] Figure 6A illustrates the comparison between the reference signal and the two carrier signals when the reference is positive and relatively high, showing also the SI and S3 states and the switch pattern resulting from Figure 5 A;

[0017] Figure 6B illustrates the comparison between the reference signal and the two carrier signals when the reference is positive and lower than in Figure 6A, showing also the SI and S3 states and how the resulting switch pattern changes due to the lower reference signal than in Figure 6A;

[0018] Figure 6C illustrates the comparison between the reference signal and the two carrier signals when the reference is negative and relatively high (in the negative), showing also the SIand S3 states and the switch pattern resulting from Figure 5A;

[0019] Figure 7 is a flow chart illustrating step in determining the generation of the switch gate signals according to one embodiment;

[0020] Figure 8 is a schematic diagram of a power converter controller for the power converter topology of Figure 2 according to another embodiment; and

[0021] Figure 9 is a schematic diagram of a power converter controller for the power converter topology of Figure 2 according to a further embodiment in which switch gate signals are generated from a processor.Detailed Description

[0022] Figure 1 shows Figure 4 from PCT patent application publication WO2022 / 171947 published 18 August 2022 with the reference numerals removed so as to avoid confusion with the reference numerals used in the drawings of the present application. As described therein, the power converter topology represents an improvement in the circuitry for power conversion, for example in the number and the voltages handled by the power switches.

[0023] Figure 2 shows a topology of a power converter 10 in which a phase of AC power is connected between a front end node and a neutral node. The front end node is connected between power switches SI and S2. The other side of switches SI and S2 are connected to separate but magnetically-coupled inductors II and 12 and to a capacitor Cl. As can be seen, an inductor at the AC side, such as inductor 13 shown in Figure 1, is not shown although such an inductor may be present as part of any filter circuit on the AC side.

[0024] As will be described in more detail below, the magnetic coupling of the same polarity between II and 12 can be from about 50% to more than 95%. Inductor II on its other side is connected to a midpoint between power switches S3 and S4, while 12 on its other side is connected to a midpoint between power switches S5 and S6. Power switch S3 is connected to one DC terminal and capacitor C2, and power switch S6 is connected to the other DC terminal and capacitor C3, while S4 and S5 both connect to the neutral node and the midpoint between C2 and C3 that are connected in series between the DC terminals. In this configuration, SI and S2 can be considered front end switches, and S3 to S6 back end switches.

[0025] While variations to the topology of Figure 2 are possible by adding additional components, the core components illustrated in Figure 2 will remain.

[0026] While it is common for such a power converter to include a DC to DC conversion stageto buck or to boost the ultimate DC voltage on the DC input or output side, in some embodiments, the circuit of Figure 2 can be used without including a DC to DC stage.

[0027] While Figure 2 illustrates a single-phase converter 10, it will be appreciated that two or three phases can be provided by replicating the circuit module as shown for each phase. Capacitors C2 and C3 can be shared by the circuit modules or each circuit module can have its own capacitors.

[0028] Figures 3A through 3D show plots obtained from a simulation using LTspice® 24.0.12 of the circuit of Figure 2. In the simulation, ideal switches and diodes were used to simplify the result analysis, however, non-zero resistances were added to conductors (20 mQ as reference). Open loop control was used to minimize other effects, and the only control variable was Vref sinewave amplitude. The value of Cl was chosen as 110 pF and the value of C2 and C3 was chosen as 5 mF. Il and 12 were chosen to have inductances of 0.5 mH. In the simulation, a single phase (60 Hz) of 120 Vrms was generated in inverter mode from a DC source of about 450 V with a peak current of 100 A. In rectifier mode, 120 Vrms was converted to about 450 Vdc.

[0029] As shown in Figure 3 A, THD at the AC side in inverter mode would be about 7% if 11 and 12 were not magnetically coupled at all. The decrease in simulated THD drops almost linearly to about 1% as 99% magnetic coupling is reached. As can be seen, at about 50% of magnetic coupling, THD is reduced by about 50%. In the simulation, this would be a THD of about 3.2%. It will be appreciated that a magnetically coupled pair of inductors is more costly to produce than a pair of separate inductors and that production cost can increase with the degree of magnetic coupling. Thus, the most desirable level of magnetic coupling may depend on the tolerance for THD on the AC side and / or the cost (in terms of loss of energy conversion efficiency and in material cost) of using appropriate filters on the AC side. For example, if the goal is to keep THD on the AC input / output to be less than 3%, magnetic coupling of about 50%, for example 53% in the simulation, can be sufficient. In this way, an EMI filter is not required. A modest level of magnetic coupling from about 50% to about 75% of magnetic coupling can be achieved inexpensively using pairs of separately wound inductors wrapped on a common core (toroid, straight rod, U-shape or D-shaped rod) or on separate cores that are connected together after wrapping. Levels of magnetic coupling above 80% typically involve special wrapping techniques that are more expensive. Even at a level of magnetic coupling as low as 40%, it can be seen that a significant reduction in THD is achieved without requiring special wrapping techniques, and forexample butt coupling of cores of two separately wound inductors can achieve magnetic coupling levels of at least 40%.

[0030] As shown in Figure 3B, THD at the DC side in rectifier mode would be about 5.5% if Il and 12 were not magnetically coupled at all. The decrease in simulated THD drops almost linearly to about 1% as 90% magnetic coupling is reached. In Figure 3C, the energy efficiency of the converter circuit is shown to be essentially invariable as magnetic coupling between II and 12 is increased from 0% to 90% magnetic coupling. The efficiency in inverter mode for the simulated converter is around 97.75%. In the rectifier mode, as shown in Figure 3D, the energy efficiency of the simulated power converter is between 97.80% and 97.85%, and is essentially invariable as magnetic coupling between II and 12 is increased from 0% to 90% magnetic coupling.

[0031] Figure 4 schematically illustrate an embodiment of a power converter controller 12 that can be used to control the switch states for power switches SI through S6 in the embodiment of Figure 2. In Figure 4, the converter 10 is schematically illustrated as comprising only the switches SI through S6 for simplicity of illustration. In this embodiment, a reference signal generator controller 14 determines the phase and amplitude of a reference signal. Since the reference signal when compared to carrier signals is used to determine power switch states, it is responsible for defining the behavior of the power converter. The reference controller thus uses an input defining the power level or voltage to be generated, an AC phase measurement and one or more measurement values of voltage and / or current in the circuit. The values of the phase and amplitude of the reference signal are output from the controller 14 to the reference signal generator 16 to generate the desired reference signal.

[0032] In the embodiment of Figure 4, two carrier generators 20 and 22 are used to generate carrier signals (e.g., triangular waves) of the same frequency that are 180 out of phase with respect to each other. The phase difference and the frequency of the carrier generators 20 and 22 may be fixed by design, or they may be initialized by the reference controller 14. While the reference signal is typically 50 Hz or 60 Hz to be in phase with the desired AC power, the frequency of the carrier signals defining the switching frequency is typically above 8 kHz to about 30 kHz, although some switches may be efficient for operation at higher frequencies. By having the reference in phase with the AC power, unity power factor can be provided. The first carrier signal is used to modulate the front end switches SI and S2, as illustrated such that when SI is on, S2 is off, and when S2 is on, SI is off. The second carrier signal is used to modulate the back end switches suchthat when S3 and S5 are on, S4 and S6 or off and vice versa. In this embodiment, carrier signal 1 is compared to the reference and the logical state for SI is defined by carrier 1 being less than the reference signal using, for example, comparator logic circuit 24. In this embodiment, carrier signal 2 is compared to the reference and the logical state for S3 and S5 is defined by carrier 2 being less than the reference signal using, for example, comparator logic circuit 26.

[0033] The controller 12 of Figure 4 can be implemented using an FPGA, an ASIC or other dedicated circuitry, or using a processor such as a microcontroller. Given the calculations and decision that may be made by the reference controller 14, it may be implemented using a processor while the remaining components of controller 12 may be implemented using circuitry.

[0034] In one example of a prototype of the power converter made in accordance with the embodiment of Figure 2 using the controller of Figure 4, the values of the components were chosen, and the resulting performance was as follows:Model of power switch for SI and S2: 2 parallel MSC015SMA070B4 or UJ4SC075009K4SModel of power switch for S3 to S6: Power module MSCSM70TAM19CT3AG.Value of Cl: 170uFValue of C2 and C3: 5mFValue of II : 500uHValue of 12: 500uHPercentage of coupling between II and 12: 90%Nominal AC voltage: 120 Vrms, 60 Hz.Frequency of carrier signal: 20 kHzOutput DC voltage range (active rectifier): 500VPower transfer capacity in rectifier mode: 10 kVAEstimated efficiency of conversion in rectifier mode: >95%Level of ripple in DC output: 5% of half the DC bus (example 12.5V on 250 Vdc half bus with DC voltage of 500 V)Nominal DC input in inverter mode: same as rectifier modeNominal power transfer capacity in inverter mode: same as rectifier mode Estimated efficiency of conversion in inverter mode: >95%THD in AC output: 3% in grid-to-vehicle (rectifier) or vehicle-to-grid (inverter mode)

[0035] It will be understood that different logical comparisons of carrier to reference signals to define the states of the switches can be used to arrive at a suitable switch control.

[0036] It will also be understood that the model of carrier signal and reference signal comparison is a suitable analog technique for power switch control, while in a processor-based implementation, switch gate values can be calculated in real-time or they can be pre-determined in a table that is accessed in real-time by the processor to output signals to control switch gates.

[0037] It will be understood that the application of switch gate signals to power switches can make use of deadtime management circuitry or deadtime management in software (see Applicant’s US patent 11,831,235) as required. While schematically illustrated as single devices, power switches can comprise plural electronic switch components in parallel or series as desired. While the power switches can be any conventional power electronic switch, power switches generate negligible heat when in the on state and no heat when in the off state. However, heat is generated when in the transition between the two states. When the switch transition time from on to off or vice versa is a significant source of heat due to a slow transition time, switches of different transition time characteristics can be used in parallel and favorably combined to reduce heat generation due to switching transitions.

[0038] Figure 5A illustrates a table of the switch patterns A through D for the six power switches of the embodiment of Figure 2. In pattern A, AC is positive and power flows through the power converter 10. In pattern B, the power converter is in a ground state, with the ground path being through S5. In pattern C, the power converter is in a ground state, with the ground path being through S4. In pattern D, AC is negative and power flows through the power converter.

[0039] It will be appreciated that the voltage stored by the series connection of C2 and C3 is always the voltage at the DC terminal. When stored energy is released from C2, for example, this causes current to flow into C3. Likewise, the coupled inductors II and 12 have the ability to transfer energy when only one or the other stores energy through changes in current. Capacitor Cl also provides a path for current between the coupled inductors. For this reason, switching between ground states of patterns B and C is important to allow for C2 and C3 to maintain the same voltage and for the release of power transferred through the coupling of the inductors.

[0040] Figure 5B schematically illustrates the carrier signals 1 and 2 with three instances of the reference signal. While the frequency of the carrier signals is actually much higher, for the purposes of illustration, it is shown to be only 7 times greater than the reference frequency. In thecase of the solid line reference signal, the amplitude of the reference is such that the duty cycle of the power flow patterns A and D provides a voltage that matches the balance between the existing DC voltage on the DC side and the existing AC voltage on the AC side of the power converter of Figure 2. The short dashed line reference signal in Figure 5B illustrates switch control for an inverter mode of operation with its reference signal amplitude being greater than the solid line, no power transfer reference signal. The long dashed line reference signal with an amplitude lower than the solid line, no power transfer reference signal will then provide power transfer in an active rectifier mode.

[0041] Figure 6 A illustrates the comparison of the carrier signals to the reference signal when the reference signal is positive and near its peak. This provides longer duty cycles in the power transfer pattern A than in the ground patterns B and C. When the reference signal drops in amplitude, as in Figure 6B, one can see that the duty cycle of the power transfer pattern A is smaller than the ground patterns B and C. In Figure 6C, the reference signal is negative (and near its peak) and thus the power transfer pattern is D with ground patterns C and B being alternatively switched to from pattern D. Note that the duty cycle of power transfer pattern D is greater than that for patterns C and B in Figure 6C, much like it was for the positive reference in Figure 6A.

[0042] Figure 7 illustrates the flow of processing in the reference controller 14 of Figure 4. In a first step, the reference controller 14 determines if AC power is present. This may be done by measurement or by operator input, for example. When AC power is present, the phase is recorded and the voltage of the AC power and the voltage of any DC power present may be measured or otherwise provided to the reference controller to determine what suitable amplitude may represent zero power flow under the current conditions. If the power converter 10 is to operate as an inverter, thus pushing power onto the AC grid power, a higher reference amplitude is determined for the desired level of power transfer from the DC side to the AC side. If the power converter 10 is to operate as an active rectifier, thus taking power from the AC grid power to provide DC power, a lower reference amplitude is determined for the desired level of power transfer from the AC side to the DC side. Alternatively, the reference amplitude desired may be determined by using measured current and / or voltage and invoking a feedback loop in which the amplitude of the reference signal is adjusted until the desired power flow is reached.

[0043] When the power converter 10 is providing AC power from a DC source without grid tie, the phase of the reference may be arbitrary, and the frequency may be fixed (grid frequencymay vary from its nominal frequency of 50 Hz or 60Hz over time). The reference signal amplitude is set according to the desired islanding AC voltage. However, when the output AC voltage can no longer be maintained at the desired level, this means that the AC load exceeds the ability of the power converter to supply AC power from the DC source. In this case, either an alarm may be triggered or an interruption in inverter power may result.

[0044] Once the amplitude and phase of the reference signal has been determined by the reference controller 14, the comparison with the carrier signals and the generation of the switch gate signal can follow in accordance with the above description with reference to Figures 4 and 6 A to 6C.

[0045] In the embodiments of Figures 4 and 6A to 6C, one example of how two carriers are used for comparison with the reference signal to control the switch gates. It will be appreciated that variations are possible. In Figure 8, a more complex controller 12 is illustrated that can provide separate control over S3 / S4 and S5 / S6 by having additional logic 25 for S5 / S6 separate from the logic 26 for only S3 / S4. With this implementation, the carrier 3 can be at a different phase from carrier 2 such that the switching times of S3 / S4 are different from S5 / S6. Having different switching of S3 / S4 from S5 / S6 provides more than the four switch patterns described above that can be used to control the relative energy storage between the upper half-bridge and the lower halfbridge of the back end of converter 10. When switches S5 / S6 are switched at different times from S3 / S4, this interleaves the two back end half bridges and may be used to create different voltage levels.

[0046] Alternatively or additionally, the carrier generators 20,22,21 are shown in the embodiment of Figure 8 to be controlled by the reference controller 14 rather than being fixed.

[0047] In the case of carriers that are fixed in that they are not changed during operation, not only the phase of the carriers can be differently chosen, but the frequency of carrier 1 can be higher or lower than the carriers 2 and 3 (in the embodiment of Figure 4, it is possible to have carrier 1 at a frequency different from carrier 2, as well). Operating switches S 1 / S2 of the front end at a higher frequency causes higher switching losses in the front end, namely S1 / S2 than in the back end, namely S3 / S4 / S5 / S6, and can help the charge / discharge cycling of Cl instead of relying on intrinsic self-balancing. Operating switches S1 / S2 of the front end at a lower frequency causes lower switching losses in the front end than in the back end, and making the charge / discharge cycling of Cl greater while improving the charge / discharge cycling of C2 / C3 instead of relyingon intrinsic self-balancing.

[0048] In the case that the carriers are to be changed during operation, this can be done to the relative carrier phases alone, to the carrier frequencies, or both. For example, it is possible for the reference controller 14 (e.g., as may be updated by a co-processor in an FPGA implementation) to measure neutral current, the voltages at capacitors Cl, C2 and / or C3 and / or the temperature of switches S1 / S2 versus S3 to S6, and respond to an imbalance by changing the phase or frequency of one or more of the carriers accordingly. Switch stress and aging can also be taken into consideration when selecting the phase and / or frequency of the carriers.

[0049] While Figure 4 illustrates that controller 12 controls the switches SI to S6 of a single circuit module 10, when two or three phase AC power conversion is desired, the controller 12 can also be replicated or adapted to provide switch signals with the suitable 120 degree or 180 phase difference for each phase.

[0050] As mentioned above, the power converter controller 12 of Figure 4 can be implemented using fixed or programmable (e.g., FPGA) circuitry and / or using a processor. For clarity, Figure 9 illustrates a processor implementation of controller 12. In this embodiment, the reference controller 14 as described above with reference to Figures 4 and 8 may remain the same with the carrier and reference signal generation being virtualized using simulators 16’ and 20’. While a processor-based comparison of the reference signal with the carrier signals may be done using software (e.g., virtual comparators 24’), given the relatively high frequency of the gate signals, it may be preferred not to operate the simulators 16’ and 20’ and the comparators 24’ in real time for real time output of the resulting gate signal to switches SI to S6. Instead, switch gate values may be stored in memory 27 of the processor or microcontroller (e.g., using peripherals built into a microcontroller), for example a complete cycle of switch gate values. Software 28 executed by the processor may act as a reader to read from memory 27 the switch gate values according to a clock or timer 29 and produce switch gate outputs for SI through S6 on, for example, pins of the microcontroller or processor of the controller 12. While six outputs are illustrated, two or three outputs, as in the embodiments of Figure 4 and 8 may also be produced, and then to use external inverter logic and deadtime management circuitry, for example a peripheral / engine built into the microcontroller, for the purposes of generating all of the switch gate outputs for SI through S6.

[0051] When the reference signal or the carrier signals would be changed as a function of the inputs to controller 14, it is possible to have stored in memory 27 two or more switch gatesequences and for the controller 14 to signal to the switch gate signal output 28 which one of the stored sequences is to be used. Alternatively, the simulators 16’ and 20’ and comparators 24’ may be used to generate a new sequence that once stored in memory 27 can replace the former sequence.

[0052] It will be appreciated in the embodiment of Figure 9 that the reference controller 14 may directly determine the cyclical variation of the duty cycles of the switch patterns without simulating a reference signal, carrier signals and undertaking a comparison to determine the instances of the cycle of switch patterns. In this way, the controller 14 would directly create the table of the switch gate sequence in memory 27 without using software components 16’, 20’ and 24’.

Claims

CLAIMS1. A bidirectional power converter for converting electrical power between AC and DC, the bidirectional power converter comprising: an AC phase terminal; an AC neutral node terminal; a first DC terminal; a second DC terminal; a first front end power switch (SI) having a first side connected to AC phase terminal; a second front end power switch (S2) having a first side connected to AC phase terminal; a front capacitor (Cl) connected on one side to a second side of the first front end power switch (SI) and on another side to a second side of the second front end power switch (S2); a first inductor (II) connected on a first side to the second side of the first front end power switch (Si); a second inductor (12) connected on a first side to the second side of the second front end power switch (S2), the first inductor (II) and the second inductor (12) being magnetically coupled; a first pair of back end power switches (S3) and (S4) connected together in series at a first side that is also connected to a second side of said first inductor (II), a second side of one of said first pair of back end power switches (S4) being connected to the AC neutral node terminal, a second side of another of said first pair of back end power switches (S3) being connected to the first DC terminal; a second pair of back end power switches (S5) and (S6) connected together in series at a first side that is also connected to a second side of said second inductor (12), a second side of one of said second pair of back end power switches (S5) being connected to the AC neutral node terminal, a second side of another of said second pair of back end power switches (S6) being connected to the second DC terminal; a second capacitor (C2) and a third capacitor (C3) connected together in series at a first side that is also connected to the AC neutral node terminal, a second side of the second capacitor connected to the first DC terminal, and a second side of the third capacitor connected to the second DC terminal; and a controller (12) operative to receive an input defining a direction of power conversion from AC to DC or DC to AC and a level of power conversion or a target output voltage of power conversionand to generate gate signals for said power switches (SI) to (S6) accordingly.

2. The bidirectional power converter as defined in claim 1, wherein said controller (12) comprises: a reference controller (14) for receiving said input defining a direction of power conversion from AC to DC or DC to AC and said level of power conversion or said target output voltage of power conversion and for defining a phase and amplitude of a reference signal; a reference generator (16) for generating the reference signal according to said phase and amplitude; at least two carrier signal generators (20,21,22) for generating at least two carrier signals; at least two comparator logic circuits (24,25,26) for comparing the reference to the at least two carrier signals to produce at least some of said gate signals.

3. The bidirectional power converter as defined in claim 1, wherein said controller (12) comprises: a reference controller (14) for receiving said input defining a direction of power conversion from AC to DC or DC to AC and said level of power conversion or said target output voltage of power conversion and for defining a sequence of switch gate states; and a switch gate state sequence memory (27) for storing said sequence of switch gate states; and a switch gate state reader (28) controlled by a timer or clock for outputting at least some of said gate signals.

4. The bidirectional power converter as defined in claim 1, 2 or 3, wherein the first inductor (II) and the second inductor (12) are magnetically coupled with a magnetic coupling at least about 40%.

5. The bidirectional power converter as defined in claim 4, wherein the first inductor (II) and the second inductor (12) are magnetically coupled with a magnetic coupling at least about 50%.

6. The bidirectional power converter as defined in any one of claims 1 to 5, wherein total harmonic distortion at said AC phase terminal is less than about 3.2% when said bidirectional power converter is operated to convert DC power to AC power.

7. The bidirectional power converter as defined in claim 6, wherein and the first inductor (II) and the second inductor (12) are magnetically coupled with a magnetic coupling of between about 50% to about 80%.

8. The bidirectional power converter as defined in any one of claims 1 to 7, wherein said AC phase terminal and said AC neutral node terminal are not connected to an EMI filter.

9. The bidirectional power converter as defined in any one of claims 1 to 8, wherein said AC phase terminal comprises a first phase terminal, a second phase terminal and a third phase terminal, said first front end power switch, said second front end power switch, said front capacitor, said first inductor, said second inductor, first pair of back end power switches and said a second pair of back end power switches form a circuit module for single phase, said bidirectional power converter comprising three said circuit modules, said controller being operative to convert power between three-phase AC to DC.