Power converter

Abstract

This power converter is provided with a first switching element, a second switching element, a third switching element, a fourth switching element, a fifth switching element, and a sixth switching element. In a second output state, the third switching element and the fourth switching element are on, and the first switching element, the second switching element, and the sixth switching element are off. In a third output state, the second switching element, the third switching element, the fifth switching element, and the sixth switching element are on, and the first switching element and the fourth switching element are off. In a sixth output state, the third switching element is on, the first switching element, the second switching element, the fourth switching element, the fifth switching element, and the sixth switching element are off. The third output state transitions to the sixth output state, and the sixth output state transitions to the second output state.

Description

Power Converter

[0001] The present invention relates to a power converter including a three-level inverter.

[0002] In recent years, multilevel inverters have been actively studied to meet the need for higher bus voltages in power converters. For example, Patent Document 1 proposes a multilevel inverter circuit called an ANPC (Active Neutral-Point-Clamped).

[0003] Japanese Patent Application Laid-Open No. 2005-176538

[0004] However, the conventional technology has a problem in that the switching surge voltage of the switching element is large.

[0005] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a power converter capable of reducing the switching surge voltage of a switching element.

[0006] In a power converter according to the present invention, a first capacitor and a second capacitor are connected in series between the positive and negative electrodes of a DC power supply. A neutral point between the positive and negative electrodes is connected to a junction point between the first capacitor and the second capacitor. A first switching element, a second switching element, a third switching element, and a fourth switching element are further connected in series between the positive and negative electrodes of the DC power supply, in this order from the positive electrode side to the negative electrode side. A fifth switching element is connected between the junction point between the first switching element and the second switching element and the junction point between the first capacitor and the second capacitor. A sixth switching element is connected between the junction point between the third switching element and the fourth switching element and the junction point between the first capacitor and the second capacitor. A load is connected to the junction point between the second switching element and the third switching element. A first diode is connected in parallel to the first switching element, passing a current in a direction opposite to a current flowing due to a voltage applied to the first switching element by the DC power supply. A second diode is connected in parallel to the second switching element, and the second diode passes a current in the opposite direction to the current that flows due to the voltage applied to the second switching element by the DC power supply. A third diode is connected in parallel to the third switching element, and the third diode passes a current in the opposite direction to the current that flows due to the voltage applied to the third switching element by the DC power supply. A fourth diode is connected in parallel to the fourth switching element, and the fourth diode passes a current in the opposite direction to the current that flows due to the voltage applied to the fourth switching element by the DC power supply. A fifth diode is connected in parallel to the fifth switching element, and the fifth diode is connected in parallel to the sixth switching element, and the sixth diode passes a current in the opposite direction to the current that flows due to the voltage applied to the sixth switching element by the DC power supply. A first output state is defined as a state in which the first switching element and the second switching element are on, and the third switching element, the fourth switching element, and the fifth switching element are off. A state in which the third switching element and the fourth switching element are on and the first switching element, the second switching element and the sixth switching element are off is defined as a second output state.A state in which the second switching element, the third switching element, the fifth switching element, and the sixth switching element are on and the first switching element and the fourth switching element are off is defined as a third output state. A state in which the second switching element and the sixth switching element are on and the first switching element, the third switching element, the fourth switching element, and the fifth switching element are off is defined as a fourth output state. A state in which the third switching element and the fifth switching element are on and the first switching element, the second switching element, the fourth switching element, the fifth switching element, and the sixth switching element are off is defined as a fifth output state. A state in which the third switching element is on and the first switching element, the second switching element, the fourth switching element, the fifth switching element, and the sixth switching element are off is defined as a sixth output state. A state in which the second switching element is on and the first switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element are off is defined as a seventh output state. The negative cycle is performed one or more times, in which the third output state is transitioned to the sixth output state, the sixth output state is transitioned to the second output state, the second output state is transitioned to the fifth output state, and the fifth output state is transitioned to the third output state, and then the positive cycle is performed one or more times, in which the third output state is transitioned to the seventh output state, the seventh output state is transitioned to the first output state, the first output state is transitioned to the fourth output state, and the fourth output state is transitioned to the third output state, and then the negative cycle is performed.

[0007] According to the present invention, it is possible to provide a power converter capable of reducing surge voltages in switching elements. Further features related to the present invention will become apparent from the description of the present specification and the accompanying drawings. Furthermore, the problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments.

[0008] FIG. 1 is a diagram showing a power converter according to a first embodiment. (a) is a circuit diagram showing the U-phase of FIG. 1 , and (b) is a functional block diagram of a control device for controlling (a). (b) is a state transition diagram showing a control method for a power converter in a reference example. (c) is a time chart showing the control method for a power converter in a reference example. (d) is a diagram showing operation in each state of a negative cycle of the reference example. (e) is a diagram showing a switching surge voltage in the reference example. (a) is a diagram showing the switching surge voltage in the reference example, and (b) is a diagram showing losses in the reference example. (c) is a state transition diagram showing a control method for a power converter in a first embodiment. (d) is a time chart showing the control method for a power converter in a first embodiment. (e) is a diagram showing operation in each state of a negative cycle of the first embodiment. (f) is a diagram showing the switching surge voltage in the first embodiment. (f) is a diagram showing losses in the first embodiment. (f) is a time chart showing a control method for a power converter in a second embodiment. (f) is a state transition diagram showing a control method for a power converter in a second embodiment. (f) is a time chart showing a control method for a power converter in a third embodiment. (g) is a state transition diagram showing a control method for a power converter in a third embodiment. 10. A time chart showing a control method for a power converter in Example 4. A state transition diagram showing a control method for a power converter in Example 4. A time chart showing a control method for a power converter in Example 5. A state transition diagram showing a control method for a power converter in Example 5. A time chart showing a control method for a power converter in Example 6. A state transition diagram showing a control method for a power converter in Example 6. A time chart showing a control method for a power converter in Example 7. A state transition diagram showing a control method for a power converter in Example 7.

[0009] Hereinafter, embodiments will be described with reference to the accompanying drawings. In the accompanying drawings, functionally identical elements are designated by the same numerals. Note that the accompanying drawings show embodiments according to the principles of the present disclosure, but these are for understanding the present disclosure and are not to be used to interpret the present disclosure in a limiting manner. The descriptions in this specification are merely typical examples and are not intended to limit the scope or application of the present disclosure in any way.

[0010] First, a reference example that is useful for understanding this embodiment will be described below with reference to the drawings. In the following, a three-phase inverter power conversion device will be used as an example, but the present invention can also be applied to a single-phase inverter, a polyphase inverter, and a converter.

[0011] FIG. 1 is a diagram showing a power converter 1 constituting a three-phase inverter. The power converter 1 in FIG. 1 is a three-phase 3-level ANPC (Active Neutral-Point-Clamped) inverter (hereinafter simply referred to as an ANPC inverter). As shown in FIG. 1, in the ANPC inverter, DC power supplies Vdc1 and Vdc2 are connected in series. The high potential terminal of DC power supply Vdc1 is positive pole P. The connection point between DC power supplies Vdc1 and Vdc2 is neutral point O. The low potential terminal of DC power supply Vdc2 is negative pole N.

[0012] A first smoothing capacitor C1 and a second smoothing capacitor C2 are connected in series between the positive pole P and the negative pole N of the DC power supplies Vdc1 and Vdc2. A neutral point O between the positive pole P and the negative pole N is connected to a connection point PC between the first capacitor C1 and the second capacitor C2. A plurality of first capacitors C1 and second capacitors C2 may be connected in parallel. The positive pole P, the neutral point O, and the negative pole N are further connected to main circuit portions corresponding to the U phase u, the V phase v, and the W phase w.

[0013] A specific configuration will be described using the U-phase u as a representative example with reference to Figures 1, 2(a), and 2(b). As shown in Figure 2(a), the U-phase u of the power converter 1 includes a first switching element T1, a second switching element T2, a third switching element T3, a fourth switching element T4, a fifth switching element T5, and a sixth switching element T6. The U-phase u of the power converter 1 also includes a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6.

[0014] The first to sixth switching elements T1 to T6 are MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), but are not limited to these. The first to sixth switching elements T1 to T6 may be connected in parallel with the first to sixth diodes D1 to D6. The first to sixth switching elements T1 to T6 may include the first to sixth diodes D1 to D6. The semiconductor switching elements may be, for example, semiconductor switching elements other than MOSFETs, such as IGBTs (Insulated Gate Bipolar Transistors).

[0015] The first diode D1 to the sixth diode D6 may be, for example, a PN junction diode, a Schottky barrier diode, or other diode. The first switching element T1 to the sixth switching element T6 and the first diode D1 to the sixth diode D6 may be made of a material such as Si, SiC, GaN, or GaO. Two or more types of the first switching element T1 to the sixth switching element T6 and the first diode D1 to the sixth diode D6 may also be hybrid-implemented. Note that the first capacitor C1 and the second capacitor C2 are not shown in FIG. 2(a).

[0016] Between the positive pole P and negative pole N of the DC power supplies Vdc1, Vdc2, a first switching element T1, a second switching element T2, a third switching element T3, and a fourth switching element T4 are connected in series in this order from the positive pole P side to the negative pole N side.

[0017] A fifth switching element T5 is connected between a connection point P12 between the first switching element T1 and the second switching element T2 and a connection point PC between the first capacitor C1 and the second capacitor C2. A sixth switching element T6 is connected between a connection point P34 between the third switching element T3 and the fourth switching element T4 and a connection point PC between the first capacitor C1 and the second capacitor C2. A load L is connected to a connection point AC between the second switching element T2 and the third switching element T3.

[0018] A first diode D1 is connected in parallel to the first switching element T1, and the first diode D1 passes a current in the opposite direction to the current caused by the voltage applied to the first switching element T1 by the DC power supplies Vdc1 and Vdc2. A second diode D2 is connected in parallel to the second switching element T2, and the second diode D2 passes a current in the opposite direction to the current caused by the voltage applied to the second switching element T2 by the DC power supplies Vdc1 and Vdc2.

[0019] A third diode D3 is connected in parallel to the third switching element T3, and the third diode D3 passes a current in the opposite direction to the current that flows due to the voltage applied to the third switching element T3 by the DC power supplies Vdc1 and Vdc2. A fourth diode D4 is connected in parallel to the fourth switching element T4, and the fourth diode D4 passes a current in the opposite direction to the current that flows due to the voltage applied to the fourth switching element T4 by the DC power supplies Vdc1 and Vdc2.

[0020] A fifth diode D5 is connected in parallel to the fifth switching element T5, and the fifth diode D5 passes a current in the opposite direction to the current caused by the voltage applied to the fifth switching element T5 by the DC power supplies Vdc1 and Vdc2. A sixth diode D6 is connected in parallel to the sixth switching element T6, and the sixth diode D6 passes a current in the opposite direction to the current caused by the voltage applied to the sixth switching element T6 by the DC power supplies Vdc1 and Vdc2.

[0021] 2B, the switching of the first to sixth switching elements T1 to T6 is controlled by individual gate drivers GD. The switching signals of the individual gate drivers GD are generated by the PWM generator 20 of the control device 10.

[0022] Next, a description will be given of a current supply method for the power converter 1, which is an ANPC inverter of the reference example. The circuit configuration of the power converter 1 of the reference example is the same as that of the power converter 1 of Example 1, which will be described later, and which is shown in Figures 1, 2(a) and 2(b).

[0023] Normally, DC power supplies Vdc1 and Vdc2 have a voltage of VDC / 2, which is half the bus voltage. Furthermore, the neutral point O is considered to be a voltage neutral point with a potential of 0. In this case, the potential of the positive electrode P becomes +VDC / 2, and the potential of the negative electrode N becomes -VDC / 2. The bus voltage between the positive electrode P and the negative electrode N is exactly VDC. In this state, to energize the connection point AC and the positive electrode P, at least the first switching element T1 and the second switching element T2 must be simultaneously turned on. Similarly, to energize the connection point AC and the negative electrode N, at least the third switching element T3 and the fourth switching element T4 must be simultaneously turned on.

[0024] On the other hand, there are two paths for energizing the connection point AC and the neutral point O. That is, as shown in FIG. 5 described later, there is a first path (route R1) formed by simultaneously turning on the second switching element T2 and the fifth switching element T5, and a second path (route R2) formed by simultaneously turning on the third switching element T3 and the sixth switching element T6. For the connection point AC to be energized and the neutral point O, at least one of these two paths must be energized. When the connection point AC is energized with the positive pole P, the neutral point O, and the negative pole N, respectively, the potentials of the connection point AC are +VDC / 2, 0, and -VDC / 2, respectively. In this way, the voltage output level of the connection point AC is three-stage.

[0025] Next, a control method for an ANPC inverter, particularly a control method for a power converter according to a reference example in which current is supplied between the connection point AC and the neutral point O via the two paths described above, will be described with reference to Figures 3 to 5. Figure 3 is a state transition diagram illustrating the control method for a power converter that is an ANPC inverter according to a reference example, and shows the states of the first to sixth switching elements T1 to T6 and the switching elements that are turned on corresponding to the states of the first to sixth switching elements T1 to T6. In the state transition diagrams shown below in Figure 3 and other figures, notations such as "(1)" near a state N indicate the order in which the state N is transitioned to that state.

[0026] Fig. 4 is a time chart showing the control method of the power converter 1 of the reference example, showing the on and off (OFF) states of the first to sixth switching elements T1 to T6 and the voltage Vout at the connection point AC. Fig. 5 is a diagram showing the operation of the reference example in each state of the negative cycle. Fig. 6 is a diagram showing the switching surge voltage in the reference example.

[0027] First, as shown in Fig. 3, the states when the connection point AC is energized with the positive pole P, the neutral point O, and the negative pole N are called state P, state O, and state N, respectively. State P, state O, and state N correspond to time tp, time to, and time tn, respectively, shown in Fig. 4.

[0028] A state in which the first switching element T1 and the second switching element T2 are on and the third switching element T3, the fourth switching element T4, and the fifth switching element T5 are off is defined as a first output state. The sixth switching element T6 may be on or off. The first output state corresponds to state P, and state P continues until time tp.

[0029] A state in which the third switching element T3 and the fourth switching element T4 are on and the first switching element T1, the second switching element T2, and the sixth switching element T6 are off is defined as a second output state. The fifth switching element T5 may be on or off. The second output state corresponds to state N, and state N continues for a time tn.

[0030] A state in which the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on and the first switching element T1 and the fourth switching element T4 are off is defined as a third output state. The third output state corresponds to state O, and state O continues until time t0.

[0031] A state in which the second switching element T2 and the sixth switching element T6 are on and the first switching element T1, the third switching element T3, the fourth switching element T4, and the fifth switching element T5 are off is defined as a fourth output state. The fourth output state corresponds to state PO in FIG. 3. State PO continues until time ty.

[0032] A state in which the third switching element T3 and the fifth switching element T5 are on and the first switching element T1, the second switching element T2, the fourth switching element T4, and the sixth switching element T6 are off is referred to as a fifth output state. The fifth output state corresponds to state NO in FIG. 3. State NO continues until time tx.

[0033] The transition between state P and state O is called a positive cycle, and the transition between state O and state P is called a negative cycle. The operation of the positive cycle is similar to that of the negative cycle, so a description thereof will be omitted. The following description will focus on the transition operation of the negative cycle in the reference example.

[0034] 3 and 4, in state N (second output state, time tn), the third switching element T3, the fourth switching element T4, and the fifth switching element T5 are on, and the voltage at the connection point AC is −VDC / 2. In state O (third output state, time to), the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on, and the output voltage at the connection point AC is 0.

[0035] Here, in state O, the route R1 (the second switching element T2 and the fifth switching element T5) and the route R2 (the third switching element T3 and the sixth switching element T6) are simultaneously energized between the neutral point O and the connection point AC, and an equal current flows through both paths. When transitioning from state O to state N, the state first passes through an intermediate state called state NO (fifth output state, time tx). In state NO (time tx), the third switching element T3 and the fifth switching element T5 are ON.

[0036] In the case of a positive cycle, the transition from state O to state P passes through an intermediate state called state PO (fourth output state, time ty). In state PO (time ty), the second switching element T2 and the sixth switching element T6 are ON.

[0037] 5 and 6 are diagrams showing the occurrence of switching surge voltages in the negative cycle. Fig. 5 and 6 show the transition from state O to state N. Fig. 5 shows the current path when the state transitions. Fig. 6 shows the voltage or current waveforms of the second switching element T2, the fourth switching element T4, the fifth switching element T5, and the sixth switching element T6, with arrows indicating the locations where switching surge voltages occur.

[0038] As shown in Fig. 5, when transitioning from state O to state N, an intermediate state NO is passed through. In states O and NO, current flows from connection point AC to neutral point O, and there are two current paths, routes R1 and R2. As shown in Fig. 6, the currents in the second switching element T2 and the sixth switching element T6 are equal. When transitioning from state NO to state N, the fourth switching element T4 is turned on, the current path switches to a route flowing from connection point AC to negative pole N, and the current Ids in the second switching element T2 and the sixth switching element T6 becomes zero.

[0039] At this time, as shown by the arrows in Fig. 6, a recovery surge voltage (switching surge voltage) is generated in the second switching element T2 and the sixth switching element T6. The recovery surge voltage here refers to an overvoltage caused by excessive charging of the second diode D2 of the second switching element T2 and the sixth diode D6 of the sixth switching element T6 due to the influence of inductance components near the elements when the second diode D2 and the sixth diode D6 of the sixth switching element T6 are passively turned off. Furthermore, if a large amount of charge (large current) remains in the second diode D2 of the second switching element T2 and the sixth diode D6 of the sixth switching element T6 when they are turned off, a surge voltage is likely to be generated.

[0040] 6, it can be seen that the switching surge voltage of the second switching element T2 (the third switching element T3 in the positive cycle) is larger than that of the sixth switching element T6 (the fifth switching element T5 in the positive cycle). As such, in the power converter of the ANPC inverter of the reference example, there is an imbalance in the switching surge voltage between the second switching element T2 and the sixth switching element T6 and between the third switching element T3 and the fifth switching element T5, and a problem occurs in which the second switching element T2 and the third switching element T3, which have larger switching surge voltages, wear out earlier than the fifth switching element T5 and the sixth switching element T6.

[0041] 7A is a diagram showing the switching surge voltages of the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 in the reference example, and FIG. 7B is a diagram showing the losses of the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 in the reference example. First, the difference between the switching surge voltages generated in the second switching element T2 and the sixth switching element T6 will be described.

[0042] Normally, the larger the inductance component of the circuit, the higher the surge voltage generated in the switching element. However, because the inductance components of the paths in which the second switching element T2 and the sixth switching element T6 are located (paths starting from the neutral point O and returning to the negative pole N) are different, a difference occurs in the surge voltages generated in the second switching element T2 and the sixth switching element T6.

[0043] 5, the path in which the sixth switching element T6 is located is the neutral point O, the sixth switching element T6, the fourth switching element T4, and the negative electrode N. On the other hand, the path in which the second switching element T2 is located is the neutral point O, the fifth switching element T5, the second switching element T2, the third switching element T3, the fourth switching element T4, and the negative electrode N, and is longer than the path in which the sixth switching element T6 is located.

[0044] 6 and the graph in FIG. 7A, the switching surge voltage generated in the second switching element T2 is greater than the switching surge voltage generated in the sixth switching element T6. The same is true in the positive cycle, where the surge voltage generated in the third switching element T3 is greater than the switching surge voltage generated in the fifth switching element T5. In summary, the switching voltage surges generated in the second switching element T2 and the third switching element T3 are greater than the switching surge voltages generated in the fifth switching element T5 and the sixth switching element T6.

[0045] Next, the difference in losses occurring in the second switching element T2 and the sixth switching element T6 will be described. The losses occurring in the second switching element T2 and the sixth switching element T6 include conduction loss caused by heat generated while current is flowing and switching loss caused by heat generated during switching. The magnitude of these losses is proportional to the magnitude of the current flowing through the second switching element T2 and the sixth switching element T6.

[0046] A conduction current flows through the fourth switching element T4 in state N, and a conduction current flows through the sixth switching element T6 in state O. In contrast, a conduction current flows through the third switching element T3 in both state O and state N. Therefore, it can be seen that the conduction loss of the third switching element T3 is higher than the conduction losses of the fourth switching element T4 and the sixth switching element T6.

[0047] Furthermore, since the conduction current flows equally through the third switching element T3 and the sixth switching element T6 in state O, the currents flowing through the third switching element T3 and the sixth switching element T6 when they are switched are also equal, and therefore the switching losses occurring in the third switching element T3 and the sixth switching element T6 are approximately the same.

[0048] Therefore, when considering the total loss (conduction loss and switching loss), it can be seen that the loss generated in the third switching element T3 is greater than the loss generated in the sixth switching element T6. The same is true in the positive cycle, when considering the total loss, the loss generated in the second switching element T2 is greater than the loss generated in the fifth switching element T5. In summary, as shown in FIG. 7B, the loss generated in the second switching element T2 and the third switching element T3 is greater than the loss generated in the fifth switching element T5 and the sixth switching element T6.

[0049] 7(a) and 7(b), it can be seen that the second switching element T2 and the third switching element T3 are larger than the fifth switching element T5 and the sixth switching element T6 in both switching surge voltage and loss. In this way, in the ANPC inverter of the reference example, a problem of imbalance in switching surge voltage and loss occurs among the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6.

[0050] <First Embodiment> Hereinafter, a first embodiment will be described with reference to the drawings. FIG. 8 is a state transition diagram illustrating a control method for a power converter in the first embodiment. FIG. 9 is a time chart illustrating a control method for a power converter in the first embodiment. FIG. 10 is a diagram illustrating operation in each state of a negative cycle in the first embodiment. FIG. 11 is a diagram illustrating a switching surge voltage in the first embodiment. In the following description, the negative cycle will be mainly described as in the reference example, and differences from the reference example will be mainly described.

[0051] In this embodiment, as shown in the state transition diagram of Fig. 8, the difference from the state transition diagram of Fig. 3 of the reference example is that state Od, state Pk, and state Pa are added between state O and state P, and state Of, state Oz, and state Nb are added between state O and state N. State Od, state Pk, and state Pa correspond to time td, time tk, and time ta shown in Fig. 8, respectively. State Of, state Oz, and state Nb correspond to time tf, time tz, and time tb shown in Fig. 8, respectively.

[0052] 8, it can be seen that times tf, tz, and tb are added between time to and time tn. During these times, for example, in the negative cycle, the fifth switching element T5 is turned off, and no current flows through the route R1 formed by the second switching element T2 and the fifth switching element T5.

[0053] It can be seen that in the positive cycle, times td, tk, and ta are added between time to and time tp. During these times, for example, times td, tz, and ta in the positive cycle, the sixth switching element T6 is turned off, and no current flows through the route R2 formed by the third switching element T3 and the sixth switching element T6.

[0054] A state in which the third switching element T3 is on and the first switching element T1, the second switching element T2, the fourth switching element T4, the fifth switching element T5, and the sixth switching element T6 are off is defined as a sixth output state. The sixth output state corresponds to state Oz in FIG. 8 , and state Oz continues at time tz.

[0055] A state in which the second switching element T2 is on and the first, third, fourth, fifth, and sixth switching elements T1, T3, T4, T5, and T6 are off is defined as a seventh output state. The seventh output state corresponds to state Pk in FIG. 8 , and state Pk continues until time tk.

[0056] The state in which the second switching element T2, the third switching element T3, and the sixth switching element T6 are on and the first switching element T1, the fourth switching element T4, and the fifth switching element T5 are off is defined as an eighth output state. The eighth output state corresponds to state Of in FIG. 8 , and state Of continues until time tf.

[0057] A state in which the second switching element T2, the third switching element T3, and the fifth switching element T5 are on and the first switching element T1, the fourth switching element T4, and the sixth switching element T6 are off is defined as a ninth output state. The ninth output state corresponds to state Od in FIG. 8 , and state Od continues until time td.

[0058] The power converter 1 of this embodiment performs the following operations using the gate driver GD, which is controlled by a switching signal generated by the PWM generator 20 of the control device 10. As shown in Figures 8 and 9, the power converter 1 transitions from the third output state (State O, time to) to the sixth output state (State Oz, time tz). When the power converter 1 transitions from the third output state to the sixth output state, the power converter 1 transitions from the third output state (State O, time to) to the eighth output state (State Of, time tf), and from the eighth output state (State Of, time tf) to the sixth output state (State Oz, time tz).

[0059] As shown in FIG. 11, the duration of the eighth output state (state Of, time tf) is longer than the time t1 required for the current of the second switching element T2 to become zero when transitioning from the third output state (state O, time to) to the eighth output state (state Of, time tf).

[0060] 8 and 9 , the power converter 1 transitions from the sixth output state (state Oz, time tz) to the second output state (states Nb, N, times tb, tn). When the power converter 1 transitions from the sixth output state to the second output state, in the second output state, the fourth switching element T4 is turned on (state Nb, time tb), and then the fifth switching element T5 is turned on (state N, time tn).

[0061] 11 , when the power converter 1 transitions from the sixth output state (state Oz, time tz) to the second output state (states Nb, N, times tb, tn), the fourth switching element T4 is turned on, and after the current of the sixth switching element T6 becomes zero (state Nb, time tb), the fifth switching element T5 is turned on (state N, time tn). As shown in FIGS. 8 and 9 , the power converter 1 transitions from the second output state (state N, time tn) to the fifth output state (state N, time tx), and from the fifth output state (state N, time tx) to the third output state (state O, time to).

[0062] The power converter 1 executes one or more negative cycles, sequentially transitioning through the third output state, the eighth output state, the sixth output state, the second output state, the fifth output state, and the third output state. In this embodiment, for the sake of convenience, the power converter 1 executes one negative cycle and then executes a positive cycle. However, the number of times the negative cycle and positive cycle are executed can be changed depending on the desired output waveform.

[0063] After executing one or more negative cycles, power converter 1 transitions from the third output state (State O, time to) to the seventh output state (State Pk, time tk). When power converter 1 transitions from the third output state to the seventh output state, power converter 1 transitions from the third output state (State O, time to) to the ninth output state (State Od, time td), and from the ninth output state (State Od, time td) to the seventh output state (State Pk, time tk).

[0064] The duration of the ninth output state (state Od, time td) is longer than the time it takes for the current of the third switching element T3 to become zero when transitioning from the third output state (state O, time to) to the ninth output state (state Od, time td).

[0065] The power converter 1 transitions from the seventh output state (state Pk, time tk) to the first output state (states Pa, P, times ta, tp). When the power converter 1 transitions from the seventh output state to the first output state, in the first output state, the first switching element T1 is turned on (state Pa, time ta), and then the sixth switching element T6 is turned on (state P, time tp).

[0066] When the power converter 1 transitions from the seventh output state (state Pk, time tk) to the first output state (states Pa, P, times ta, tp), the first switching element T1 is turned on, and after the current of the fifth switching element T5 becomes 0 (state Pa, time ta), the sixth switching element T6 is turned on (state P, time tp). The power converter 1 transitions from the first output state (state P, time tp) to the fourth output state (state PO, time ty), and from the fourth output state (state PO, time ty) to the third output state (state O, time to).

[0067] The power converter 1 executes one or more positive cycles in which the power converter 1 sequentially transitions through the third output state, the ninth output state, the seventh output state, the first output state, the fourth output state, and the third output state. The power converter 1 executes one or more positive cycles, and then executes a negative cycle. The power converter 1 alternately executes a predetermined number of negative cycles and positive cycles.

[0068] As shown in Fig. 10, there are two current conduction routes, routes R1 and R2, in state O (third output state, time to). As shown in Fig. 11, the current values ​​flowing through the second switching element T2 and the sixth switching element T6 are equal. In state Of (eighth output state, time tf), the fifth switching element T5 is turned off from state O (third output state, time to), and the second switching element T2, the third switching element T3, and the sixth switching element T6 are turned on, and current flows only through route R2.

[0069] 11, at this time, the current flowing through the second switching element T2 is concentrated in the sixth switching element T6. In the next state Oz (sixth output state, time tz), the second switching element T2 and the sixth switching element T6 are turned off, and only the third switching element T3 is turned on. Because the sixth diode D6 side of the sixth switching element T6 is capable of forward conduction, current can continuously flow only through route R2 from the connection point AC to the neutral point O.

[0070] As shown in Fig. 11 , current continues to flow through the sixth switching element T6. Then, when state Nb (second output state, time tb) is reached, the fourth switching element T4 turns on. At this time, current flows to the negative electrode N via the third switching element T3 and the fourth switching element T4. At this time, as shown by the arrows in Fig. 11 , a recovery surge voltage (switching surge voltage) is generated in the second switching element T2 and the sixth switching element T6.

[0071] When comparing the switching surge voltages of the second switching element T2 and the sixth switching element T6 in the reference example shown by the arrows in FIG. 6 and graphed in FIG. 7(a) with the switching surge voltages of the second switching element T2 and the sixth switching element T6 in Example 1 shown by the arrows in FIG. 11 and graphed in FIG. 12(a), it can be seen that the switching surge voltages of the second switching element T2 and the sixth switching element T6 in Example 1 shown by the arrows in FIG. 11 are significantly reduced.

[0072] 6 and 7A, the switching surge voltage of the second switching element T2 is larger than that of the sixth switching element T6. In contrast, the switching surge voltage of the first embodiment shown in FIGS. 11 and 12A is approximately the same for the second switching element T2 and the sixth switching element T6.

[0073] As described above, in the reference example, the currents flowing through the second switching element T2 and the sixth switching element T6 were equal immediately before the fourth switching element T4 was turned on. However, in the present embodiment, the current is concentrated only in the sixth switching element T6 immediately before the fourth switching element T4 is turned on, and the current through the second switching element T2 becomes zero. This significantly reduces the recovery surge voltage (switching surge voltage) of the second switching element T2.

[0074] In the reference example, the route R1 (the second switching element T2 and the fifth switching element T5) and the route R2 (the third switching element T3 and the sixth switching element T6) form a loop, which becomes one of the sources of resonance during switching. In the present embodiment, this loop is eliminated, the resonance is reduced, and the switching surge voltage of the sixth switching element T6 is also reduced.

[0075] Furthermore, as shown in FIG. 7B, in the reference example, the second switching element T2 and the sixth switching element T6 are recovered with the same current, and therefore the second switching element T2 and the sixth switching element T6 generate switching losses of the same order of magnitude.

[0076] 12B, in this embodiment, the sixth switching element T6 is recovered with a large current, so the switching loss generated in the sixth switching element T6 is greater than the switching loss generated in the second switching element T2. The same is true in the positive cycle, where the switching loss generated in the fifth switching element T5 is greater than the switching loss generated in the third switching element T3. Therefore, in this embodiment, the switching loss generated in the second switching element T2 and the third switching element T3 is smaller than in the reference example.

[0077] In this embodiment, it is preferable that the time tf in the state Of (eighth output state) and the time tz in the state Oz (sixth output state) are shorter than the time to in the state O (third output state), because by setting them in this way, it becomes possible to ignore an increase in the conduction loss of the sixth switching element T6 in the state Of (eighth output state) and the state Oz (sixth output state).

[0078] 12(a) and 12(b) are diagrams comparing the switching surge voltages and losses generated in the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 in this embodiment. The solid line shows the results of this embodiment, and the dashed line shows the results of the reference example.

[0079] 12A, in this embodiment, the second switching element T2 is switched when the current is 0, so the switching surge voltage in the second switching element T2 is reduced to about 1 / 4. On the other hand, the sixth switching element T6 does not have the loop of routes R1 and R2 that becomes a resonance source during switching, so resonance is reduced, and the switching surge voltage in the sixth switching element T6 is also reduced to about 1 / 2.

[0080] The same is true for the positive cycle: the switching surge voltage generated in the third switching element T3 is reduced to about 1 / 4, and the surge voltage generated in the fifth switching element T5 is reduced to about 1 / 2. Therefore, the imbalance in the switching surge voltages between the second switching element T2 (third switching element T3) and the fifth switching element T5 (sixth switching element T6) is corrected and the voltages become approximately the same.

[0081] 12B, the second switching element T2 was switched when the current was 0, so the switching loss in the second switching element T2 was reduced. On the other hand, the sixth switching element T6 was switched at a current larger than that in the reference example, so the switching loss in the sixth switching element T6 increased.

[0082] As described above, by setting the time tf in State Of and the time tz in State Oz to be shorter than the time to in State O, the increase in the conduction loss of the sixth switching element T6 can be ignored, and the total loss is therefore approximately the same as in the reference example. Therefore, when considering the total loss (conduction loss and switching loss), the imbalance in the losses in the second switching element T2 (third switching element T3) and the fifth switching element T5 (sixth switching element T6) is corrected, and the total loss is approximately the same.

[0083] As described above, according to this embodiment, the imbalance of the switching surge voltages and the switching surge voltages in the first to sixth switching elements T1 to T6 is reduced. Furthermore, according to this embodiment, the imbalance of the losses in the first to sixth switching elements T1 to T6 is reduced. As a result, according to this embodiment, it is possible to improve power efficiency and reliability.

[0084] In order to obtain the effect of this embodiment described above, it is essential to go through the sixth output state (state Oz, the third switching element T3 is on) when transitioning from the third output state (state O, the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on) to the second output state (state Nb, the third switching element T3 and the fourth switching element T4 are on).

[0085] Furthermore, during the transition from the third output state (State O) to the second output state (State Nb), it is desirable to turn off the fifth switching element T5 in the eighth output state (State Of) before turning on the fourth switching element T4. Furthermore, it is desirable to turn off the fifth switching element T5 in the eighth output state (State Of) before turning on the second switching element T2.

[0086] Here, "on" and "off" in this specification refer to, for example, "completion of turn-on operation" and "completion of turn-off operation," respectively, and more specifically, "maximization of the main current flowing through the element" and "minimization of the main current flowing through the element," respectively. Furthermore, the start of turn-on (turn-off) refers to the start of the increase (decrease) in the voltage applied to the element. Furthermore, the completion of turn-on (turn-off) refers to the net drain current becoming 100% (0%), respectively.

[0087] In this embodiment, the time tf of the eighth output state (State Of) is longer than the time it takes for the current of the second switching element T2 to become zero when transitioning from the third output state (State O) to the eighth output state (State Of), and the time td of the ninth output state (State Od) is longer than the time it takes for the current of the third switching element T3 to become zero when transitioning from the third output state (State O) to the ninth output state (State Od).

[0088] 11, it takes time t1 from when the fifth switching element T5 starts to turn off (when the gate voltage starts to decrease) until the current of the second switching element T2 actually flows into the sixth switching element T6. If the fourth switching element T4 starts to turn on during this time t1, the charge will remain on the second diode D2 side of the second switching element T2 and recovery will occur, which may prevent a sufficient effect of correcting the imbalance.

[0089] Furthermore, it is desirable that the fifth switching element T5 be turned off before the second switching element T2, because the second diode D2 of the second switching element T2 is turned off without leaving any charge. Also, turning off the fifth switching element T5 before the second switching element T2 has the effect of reducing noise due to the second diode D2 of the second switching element T2.

[0090] In this embodiment, when the sixth output state (state Oz) is changed to the second output state (state Nb, N), in the second output state (state Nb, N), the fourth switching element T4 is turned on (state Nb) and then the fifth switching element T5 is turned on (state N). In addition, when the seventh output state (state Pk) is changed to the first output state (state Pa, P), in the first output state (state Pa, P), the first switching element T1 is turned on (state Pa) and then the sixth switching element T6 is turned on (state P).

[0091] In the second output state (state N), it is not necessary for the fifth switching element T5 to be on, but turning on the fifth switching element T5 determines the potentials of the first switching element T1 and the second switching element T2, thereby stabilizing operation. Similarly, in the first output state (state P), it is not necessary for the sixth switching element T6 to be on, but turning on the sixth switching element T6 determines the potentials of the third switching element T3 and the fourth switching element T4, thereby stabilizing operation.

[0092] In addition, in this embodiment, when transitioning from the sixth output state (state Oz) to the second output state (states Nb, N), the fourth switching element T4 is turned on, and the current through the sixth switching element T6 becomes zero (state Nb), and then the fifth switching element T5 is turned on (state N). Similarly, in this embodiment, when transitioning from the seventh output state (state Pk) to the second output state (states Pa, P), the first switching element T1 is turned on, and the current through the fifth switching element T5 becomes zero (state Pk), and then the sixth switching element T6 is turned on (state P).

[0093] In other words, during the negative cycle, it is desirable that the fifth switching element T5 be turned on later than the fourth switching element T4. This delay time is preferably longer than the time t2 shown in FIG. 11 , which is the time it takes for the current of the sixth switching element T6 to become zero. This makes it possible to reduce the switching surge voltage of the sixth switching element T6. The same applies to the positive cycle; it is desirable that the sixth switching element T6 be turned on later than the first switching element T1, and this delay time is preferably longer than the time it takes for the current of the fifth switching element T5 to become zero. This makes it possible to reduce the switching surge voltage of the fifth switching element T5.

[0094] The times tf, tz, tb, td, tk, and ta may be set by the PWM generator 20 on the control device 10 side shown in Fig. 2. Alternatively, the times tf, tz, tb, td, tk, and ta may be set by adding a time adjustment circuit between the PWM generator 20 and the gate driver GD. Alternatively, the times tf, tz, tb, td, tk, and ta may be set by adding a time adjustment circuit inside the gate driver GD.

[0095] Next, a power converter according to Example 2 will be described. Since the hardware configuration of this Example is similar to that of Example 1, the following mainly describes the differences from Example 1. Since the positive cycle and negative cycle are similar, the negative cycle will be mainly described.

[0096] Fig. 13 is a time chart showing a control method for the power converter 1 in Example 2. Fig. 14 is a state transition diagram showing a control method for the power converter 1 in Example 2. As shown in Figs. 13 and 14 , in this example, the power converter 1 does not transition to the third output state (state O), the eighth output state (state Of), or the ninth output state (state Od).

[0097] The power converter 1 executes one or more negative cycles, transitioning from the sixth output state (state Oz) to the second output state (states Nb, N), from the second output state (state N) to the fifth output state (state NO), and from the fifth output state (state NO) to the sixth output state (state Oz). After executing one or more negative cycles, the power converter 1 executes the following positive cycles, transitioning from the sixth output state (state Oz) to the second output state (state Nb, N), from the second output state (state N) to the fifth output state (state NO), and from the fifth output state (state NO) to the seventh output state (state Pk).

[0098] The power converter 1 executes one or more negative cycles, transitioning from the seventh output state (state Pk) to the first output state (states Pa, P), transitioning from the first output state (state P) to the fourth output state (state PO), and transitioning from the fourth output state (state PO) to the seventh output state (state Pk). After executing one or more negative cycles, the power converter 1 executes a negative cycle after transitioning from the seventh output state (state Pk) to the first output state (states Pa, P), transitioning from the first output state (state P) to the fourth output state (state PO), and transitioning from the fourth output state (state PO) to the sixth output state (state Oz).

[0099] In this embodiment, the third output state (state O, time to) is eliminated during the negative cycle, and the connection point AC is connected to the neutral point O, so the power converter 1 transitions to the fifth output state (state NO, time tx). That is, in this embodiment, the fifth output state (state NO) is used in place of the third output state (state O). Also, in this embodiment, the third output state (state O, time to) is eliminated during the positive cycle, and the connection point AC is connected to the neutral point O, so the power converter 1 transitions to the fourth output state (state PO, time ty). That is, in this embodiment, the fourth output state (state PO) is used in place of the third output state (state O).

[0100] When the power converter 1 transitions from the fifth output state (state NO) to the second output state (state Nb, N), the power converter 1 passes through the sixth output state (state Oz, time tz). In this embodiment, the power converter 1 transitions to the sixth output state (state Oz, the third switching element T3 is on) during the negative cycle when transitioning from the fifth output state (state NO, the third switching element T3 and the fifth switching element T5 are on) to the second output state (state Nb, the third switching element T3 and the fourth switching element T4 are on).

[0101] That is, in this embodiment, the power converter 1 executes an operation in which the fifth switching element T5 is turned off before the fourth switching element T4 is turned on, before the power converter 1 transitions from the fifth output state (state NO) instead of the third output state (state O) to the second output state (state N). Therefore, the charges in the second switching element T2 and the second diode D2 are discharged before the fourth switching element T4 is turned on. Therefore, this embodiment has the effect of reducing the switching surge voltage and the imbalance of the switching surge voltage, similar to the first embodiment.

[0102] Furthermore, in this embodiment, the third output state (state O), the eighth output state (state Of), and the ninth output state (state Od) are omitted from the states to which the power converter 1 transitions, thereby simplifying the control by the control device 10.

[0103] Next, a power converter according to a third embodiment will be described. Since the hardware configuration of this embodiment is similar to that of the first embodiment, differences from the first embodiment will be mainly described below. Since the positive cycle and negative cycle are similar, the negative cycle will be mainly described.

[0104] Fig. 15 is a time chart showing a control method for the power converter 1 in Example 3. Fig. 16 is a state transition diagram showing a control method for the power converter 1 in Example 3. As shown in Figs. 15 and 16 , in this example, the power converter 1 does not transition to the eighth output state (state Of) or the ninth output state (state Od).

[0105] In this embodiment, the power converter 1 executes one or more negative cycles, in which the power converter 1 transitions from the third output state (state O) to the sixth output state (state Oz), from the sixth output state (state Oz) to the second output state (states Nb, N), from the second output state (state N) to the fifth output state (state NO), and from the fifth output state (state NO) to the third output state (state O). After executing one or more negative cycles, the power converter 1 executes the following positive cycle.

[0106] The power converter 1 executes one or more positive cycles, transitioning from the third output state (State O) to the seventh output state (State Pk), from the seventh output state (State Pk) to the first output state (States Pa, P), from the first output state (State P) to the fourth output state (State PO), and from the fourth output state (State PO) to the third output state (State O). After executing one or more positive cycles, the power converter 1 executes the above-mentioned negative cycle.

[0107] That is, in this embodiment, the fifth switching element T5 is turned off simultaneously with the second switching element T2 and the sixth switching element T6. The power converter 1 transitions from the third output state (state O) to the second output state (states Nb, N) via the sixth output state (state Oz, time tz). When the power converter 1 transitions from the third output state (state O, the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on) to the second output state (state Nb, the third switching element T3 and the fourth switching element T4 are on), the power converter 1 transitions to the sixth output state (state Oz, the third switching element T3 is on).

[0108] That is, in this embodiment, the fifth switching element T5 is turned off before the fourth switching element T4 is turned on by the time the power converter 1 transitions from the third output state (state O) to the second output state (state N). As a result, the charges in the second switching element T2 and the second diode D2 are discharged before the fourth switching element T4 is turned on. Therefore, this embodiment has the same effect as the first embodiment in reducing the switching surge voltage and the imbalance of the switching surge voltage.

[0109] Furthermore, in this embodiment, the eighth output state (state Of) and the ninth output state (state Od) are omitted from the states to which the power converter 1 transitions, thereby simplifying the control by the control device 10.

[0110] Next, a power converter according to Example 4 will be described. Since the hardware configuration of this Example is similar to that of Example 1, the following mainly describes the differences from Example 1. Since the positive cycle and negative cycle are similar, the negative cycle will be mainly described.

[0111] Fig. 17 is a time chart showing the control method of the power converter 1 in Example 4. Fig. 18 is a state transition diagram showing the control method of the power converter 1 in Example 4. As shown in Figs. 17 and 18 , in this example, the power converter 1 does not transition to the eighth output state (state Of) or the ninth output state (state Od).

[0112] In this embodiment, when the power converter 1 transitions from the third output state (State O) to the sixth output state (State Oz) in a negative cycle, it transitions from the third output state (State O) to the fifth output state (State NO), and from the fifth output state (State NO) to the sixth output state. In this embodiment, when the power converter 1 transitions from the third output state (State O) to the seventh output state (State Pk) in a positive cycle, it transitions from the third output state (State O) to the fourth output state (State PO), and from the fourth output state (State PO) to the seventh output state (State Pk). The rest is the same as in the third embodiment.

[0113] That is, in this embodiment, the eighth output state (State Of, time tf) does not exist in the negative cycle. When transitioning from the third output state (State O) to the second output state (States Nb, N) and when transitioning from the second output state (State N) to the third output state (State O), the state transitions to the fifth output state (State NO). The fifth switching element T5 turns off in the sixth output state (State Oz) with a delay after the second switching element T2 and the sixth switching element T6, which turn off in the fifth output state (State NO).

[0114] The power converter 1 transitions from the third output state (State O) to the second output state (State Nb) via the fifth output state (State N0, time tx) and the sixth output state (State Oz, time tz). When the power converter 1 transitions from the third output state (State O, the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on) to the second output state (State Nb, the third switching element T3 and the fourth switching element T4 are on), the power converter 1 transitions to the sixth output state (State Oz, the third switching element T3 is on).

[0115] That is, in this embodiment, the fifth switching element T5 is turned off before the fourth switching element T4 is turned on by the time the power converter 1 transitions from the third output state (state O) to the second output state (state N). As a result, the charges in the second switching element T2 and the second diode D2 are discharged before the fourth switching element T4 is turned on. Therefore, this embodiment has the same effect as the first embodiment in reducing the switching surge voltage and the imbalance of the switching surge voltage.

[0116] Furthermore, in this embodiment, the eighth output state (state Of) and the ninth output state (state Od) are omitted from the states to which the power converter 1 transitions, thereby simplifying the control by the control device 10.

[0117] <Example 5> Next, a power converter according to Example 5 will be described. Since the hardware configuration of this Example is similar to that of Example 1, the following mainly describes the differences from Example 1. Since the positive cycle and negative cycle are similar, the negative cycle will be mainly described.

[0118] FIG. 19 is a time chart showing a control method of the power converter 1 in Example 5. FIG. 20 is a state transition diagram showing a control method of the power converter 1 in Example 5. As shown in FIGS. 19 and 20 , in this example, the power converter 1 does not transition to state P in the first output state, but transitions only to state Pa. Also, in this example, the power converter 1 does not transition to state N in the second output state, but transitions only to state Nb. Also, in this example, the power converter 1 does not transition to the fourth output state (state PO) or the fifth output state (state NO).

[0119] In this embodiment, the power converter 1 transitions from the third output state (State O) to the eighth output state (State Of) and from the eighth output state (State Of) to the sixth output state (State Oz) in a negative cycle. The power converter 1 transitions from the sixth output state (State Oz) to the second output state (State Nb) in a negative cycle, from the second output state (State Nb) to the sixth output state (State Oz), and from the sixth output state (State Oz) to the third output state (State O). After executing the above negative cycle one or more times, the power converter 1 executes the following positive cycle.

[0120] In a positive cycle, the power converter 1 transitions from the third output state (State O) to the ninth output state (State Od), and from the ninth output state (State Od) to the seventh output state (State Pk). In a positive cycle, the power converter 1 transitions from the seventh output state (State Pk) to the first output state (State Pa), from the first output state (State Pa) to the seventh output state (State Pk), and from the seventh output state (State Pk) to the third output state (State O). After executing the above positive cycle one or more times, the power converter 1 executes the following negative cycle.

[0121] That is, in this embodiment, in the negative cycle, in the second output state, state N disappears. When transitioning from the third output state (state O) to the second output state (state Nb) and when transitioning from the second output state (state Nb) to the third output state (state O), a transition to the sixth output state (state Oz) occurs.

[0122] When the power converter 1 transitions from the third output state (state O, the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on) to the second output state (state Nb, the third switching element T3 and the fourth switching element T4 are on), it transitions to the eighth output state (state Of, the second switching element T2, the third switching element T3, and the sixth switching element T6 are on) and the sixth output state (state Oz, the third switching element T3 is on).

[0123] That is, in this embodiment, by the time the power converter 1 transitions from the third output state (state O) to the second output state (state Nb), the fifth switching element T5 is turned off before the fourth switching element T4 is turned on. Therefore, the charges in the second switching element T2 and the second diode D2 are discharged before the fourth switching element T4 is turned on. Therefore, this embodiment has the effect of reducing the switching surge voltage and the imbalance of the switching surge voltage, similar to the first embodiment.

[0124] Furthermore, in this embodiment, the first output state, State P, the second output state, State N, the fourth output state (State PO), and the fifth output state (State NO) are omitted from the states to which the power converter 1 transitions, thereby simplifying the control by the control device 10. This embodiment is easy to implement because it only requires changing the on and off timings of the fifth switching element T5 and the sixth switching element T6 compared to the control of the power converter 1 of the reference example shown in Figures 3 and 4, for example.

[0125] In this embodiment, in the third output state (state O), the second switching element T2 and the sixth switching element T6 are turned on, but as in the second embodiment, the power converter 1 does not have to transition to the third output state.

[0126] The eighth output state (State Of) and the ninth output state (State Od) may be omitted. In this case, the power converter 1 executes a negative cycle in which the states sequentially transition to the third output state (State O), the sixth output state (State Oz), the second output state (State Nb), the sixth output state (State Oz), and the third output state (State O). The power converter 1 also executes a positive cycle in which the states sequentially transition to the third output state (State O), the seventh output state (State Pk), the first output state (State Pa), the seventh output state (State Pk), and the third output state (State O).

[0127] Sixth Embodiment Next, a power converter according to a sixth embodiment will be described. Since the hardware configuration of this embodiment is similar to that of the first embodiment, the following description will mainly focus on differences from the first embodiment. Since the positive cycle and negative cycle are similar, the description will mainly focus on the negative cycle.

[0128] Fig. 21 is a time chart showing the control method of the power converter 1 in Example 6. Fig. 22 is a state transition diagram showing the control method of the power converter 1 in Example 6. As shown in Figs. 21 and 22 , in this example, the power converter 1 transitions to the tenth output state and the twelfth output state in the negative cycle, and transitions to the eleventh output state and the thirteenth output state in the positive cycle.

[0129] A state in which the third switching element T3 and the sixth switching element T6 are on and the first switching element T1, the second switching element T2, the fourth switching element T4, and the fifth switching element T5 are off is defined as a tenth output state. The tenth output state corresponds to state Oj in FIG. 22 , and state Oj continues at time tj.

[0130] A state in which the second switching element T2 and the fifth switching element T5 are on and the first switching element T1, the third switching element T3, the fourth switching element T4, and the sixth switching element T6 are off is defined as an eleventh output state. The eleventh output state corresponds to state Oi in FIG. 22 , and state Oi continues at time ti.

[0131] A state in which the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on and the first switching element T1, the second switching element T2, and the fourth switching element T4 are off is defined as a twelfth output state. The twelfth output state corresponds to state Og in FIG. 22 , and state Og continues until time tg.

[0132] A state in which the second switching element T2, the fifth switching element T5, and the sixth switching element T6 are on and the first switching element T1, the third switching element T3, and the fourth switching element T4 are off is defined as a thirteenth output state. The thirteenth output state corresponds to state Oh in FIG. 22 , and state Oh continues until time th.

[0133] When the power converter 1 transitions from the eighth output state (State Of) to the sixth output state (State Oz) in the first embodiment, the power converter 1 transitions from the eighth output state (State Of) to the tenth output state (State Oj, time tj), and transitions from the tenth output state (State Oj, time tj) to the sixth output state (State Oz) in the present embodiment. When the power converter 1 transitions from the ninth output state (State Od) to the seventh output state (State Pk) in the first embodiment, the power converter 1 transitions from the ninth output state (State Od) to the eleventh output state (State Oi, time ti), and transitions from the eleventh output state (State Oi, time ti) to the seventh output state (State Pk) in the present embodiment.

[0134] When the power converter 1 transitions from the fifth output state (State NO) to the third output state (State O) in Example 1, in this example, the power converter 1 transitions from the fifth output state (State NO) to the twelfth output state (State Og, time tg), and from the twelfth output state (State Og, time tg) to the third output state (State O). When the power converter 1 transitions from the fourth output state (State PO) to the third output state (State O) in Example 1, in this example, the power converter 1 transitions from the fourth output state (State PO) to the thirteenth output state (State Oh, time th), and from the thirteenth output state (State Oh, time th) to the third output state (State O).

[0135] That is, in this embodiment, a tenth output state (state Oj, time tj) and a twelfth output state (state Og, time tg) are added in a negative cycle. In Example 6, both the tenth output state (state Oj) and the twelfth output state (state Og) are set, but depending on the situation, only the tenth output state (state Oj) may be set. In this embodiment, an eleventh output state (state Oi, time ti) and a thirteenth output state (state Oh, time th) are added in a positive cycle. In Example 6, both the eleventh output state (state Oi) and the thirteenth output state (state Oh) are set, but depending on the situation, only the eleventh output state (state Oi) may be set.

[0136] When the power converter 1 transitions from the third output state (state O, the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on) to the second output state (state Nb, the third switching element T3 and the fourth switching element T4 are on), the power converter 1 transitions to the eighth output state (state Of, the second switching element T2, the third switching element T3, and the sixth switching element T6 are on), the tenth output state (state Oj, the third switching element T3 and the sixth switching element T6 are on), and the sixth output state (state Oz, the third switching element T3 is on).

[0137] That is, in this embodiment, by the time the power converter 1 transitions from the third output state (state O) to the second output state (state Nb), the fifth switching element T5 is turned off before the fourth switching element T4 is turned on. Therefore, the charges in the second switching element T2 and the second diode D2 are discharged before the fourth switching element T4 is turned on. Therefore, this embodiment has the effect of reducing the switching surge voltage and the imbalance of the switching surge voltage, similar to the first embodiment.

[0138] Furthermore, in this embodiment, when the power converter 1 transitions from the eighth output state (state Of) to the sixth output state (state Oz), it transitions from the eighth output state (state Of) to the tenth output state (state Oj, time tj) in which the second switching element T2 is turned off, and transitions from the tenth output state (state Oj, time tj) to the sixth output state (state Oz) in which the sixth switching element T6 is turned off.

[0139] As a result, the current is concentrated in the sixth switching element T6 first, and the switching loss can be further limited to the sixth switching element T6. Since the loss in the sixth switching element T6 is smaller than those of the second switching element T2 and the third switching element T3 as shown in FIG. 7B, this has the effect of reducing the imbalance in loss.

[0140] Furthermore, in this embodiment, when the power converter 1 transitions from the fifth output state (state NO) to the third output state (state O), it transitions from the fifth output state (state NO) to the twelfth output state (state Og, time tg) in which the sixth switching element T6 is turned on, and transitions from the twelfth output state (state Og, time tg) to the third output state (state O) in which the second switching element T2 is turned on.

[0141] Therefore, the current concentrates in the sixth switching element T6 first, and the switching loss can be further limited to the sixth switching element T6. Therefore, even when the addition of the tenth output state (state Oj) alone is not enough to reduce the loss imbalance, the loss imbalance can be reduced. The same applies to the positive cycle, where the current concentrates in the fifth switching element T5 first, and the switching loss can be further limited to the fifth switching element T5.

[0142] Next, a power converter according to Example 7 will be described. Since the hardware configuration of this Example is similar to that of Examples 1 and 5, the following mainly describes the differences from Example 5. Since the positive cycle and negative cycle are similar, the negative cycle will be mainly described.

[0143] When the power converter 1 transitions from the sixth output state (State Oz) to the third output state (State O) in Example 5, the power converter 1 transitions from the sixth output state (State Oz) to the eighth output state (State Of) and from the eighth output state (State Of) to the third output state (State O). When the power converter 1 transitions from the seventh output state (State Pk) to the third output state (State O) in Example 5, the power converter 1 transitions from the seventh output state (State Pk) to the ninth output state (State Od) and from the ninth output state (State Od) to the third output state (State O).

[0144] When the power converter 1 transitions from the third output state (state O, the second switching element T2, the third switching element T3, the fifth switching element T5, and the sixth switching element T6 are on) to the second output state (state Nb, the third switching element T3 and the fourth switching element T4 are on), it transitions to the eighth output state (state Of, the second switching element T2, the third switching element T3, and the sixth switching element T6 are on) and the sixth output state (state Oz, the third switching element T3 is on).

[0145] That is, in this embodiment, by the time the power converter 1 transitions from the third output state (state O) to the second output state (state Nb), the fifth switching element T5 is turned off before the fourth switching element T4 is turned on. Therefore, the charges in the second switching element T2 and the second diode D2 are discharged before the fourth switching element T4 is turned on. Therefore, this embodiment has the effect of reducing the switching surge voltage and the imbalance of the switching surge voltage, similar to the first embodiment.

[0146] Furthermore, in this embodiment, the first output state, State P, the second output state, State N, the fourth output state (State PO), and the fifth output state (State NO) are omitted from the states to which the power converter 1 transitions, thereby simplifying the control by the control device 10. This embodiment is easy to implement because it only requires changing the on and off timings of the fifth switching element T5 and the sixth switching element T6 compared to the control of the power converter 1 of the reference example shown in Figures 3 and 4, for example.

[0147] In addition, in this embodiment, the on and off timings of the second switching element T2 and the sixth switching element T6 are the same in the negative cycle, and the on and off timings of the third switching element T3 and the fifth switching element T5 are the same in the positive cycle, which simplifies the control by the control device 10.

[0148] In this embodiment, the second switching element T2 and the sixth switching element T6 are turned on in the third output state (state O), but the power converter 1 does not need to transition to the third output state, as in embodiment 2. As in embodiment 5 above, the eighth output state (state Of) and the ninth output state (state Od) may be omitted.

[0149] Although several embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and can be realized in various configurations without departing from the spirit of the present invention. For example, it is easy to imagine a configuration in which the setting methods of Examples 1 to 7 are arbitrarily combined. These modifications are included in the scope of the invention described in the claims and their equivalents.

[0150] 1 Power converter 10 Control device 20 PWM generator GD Gate driver Vdc1, Vdc2 DC power supply P Positive pole N Negative pole O Neutral point C1 First capacitor C2 Second capacitor u U phase v V phase w W phase L Load PC, AC, T12, T34, T56 Connection point T1 First switching element T2 Second switching element T3 Third switching element T4 Fourth switching element T5 Fifth switching element T6 Sixth switching element D1 First diode D2 Second diode D3 Third diode D4 Fourth diode D5 Fifth diode D6 Sixth diode R1, R2 Route

Claims

1. A first capacitor and a second capacitor are connected in series between the positive and negative electrodes of a DC power supply, a neutral point between the positive and negative electrodes is connected to a connection point between the first capacitor and the second capacitor, a first switching element, a second switching element, a third switching element, and a fourth switching element are connected in series between the positive and negative electrodes of the DC power supply in this order from the positive electrode side to the negative electrode side, a fifth switching element is connected between the connection point between the first switching element and the second switching element and the connection point between the first capacitor and the second capacitor, a sixth switching element is connected between the connection point between the third switching element and the fourth switching element and the connection point between the first capacitor and the second capacitor, a load is connected to the connection point between the second switching element and the third switching element, and a first diode is connected in parallel to the first switching element, the first diode passing a current in a direction opposite to a current passing through the first switching element due to a voltage applied to the first switching element by the DC power supply, a second diode connected in parallel to the second switching element, the second diode passing a current in the opposite direction to a current flowing due to the voltage applied to the second switching element by the DC power supply; a third diode connected in parallel to the third switching element, the third diode passing a current in the opposite direction to a current flowing due to the voltage applied to the third switching element by the DC power supply; a fourth diode connected in parallel to the fourth switching element, the fourth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the fourth switching element by the voltage applied to the DC power supply; a fifth diode connected in parallel to the fifth switching element, the fifth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the DC power supply; and a sixth diode connected in parallel to the sixth switching element, the sixth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the DC power supply;a second output state is a state in which the third switching element and the fourth switching element are on and the first switching element, the second switching element and the sixth switching element are off; a third output state is a state in which the second switching element, the third switching element, the fifth switching element and the sixth switching element are on and the first switching element and the fourth switching element are off; a fourth output state is a state in which the second switching element and the sixth switching element are on and the first switching element, the third switching element, the fourth switching element and the fifth switching element are off; a fifth output state is a state in which the third switching element and the fifth switching element are on and the first switching element, the second switching element, the fourth switching element, the fifth switching element and the sixth switching element are off; a sixth output state is a state in which the third switching element is on and the first switching element, the second switching element, the fourth switching element, the fifth switching element and the sixth switching element are off; a seventh output state is a state in which the second switching element is on and the first switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element are off; and a negative cycle of transitioning from the third output state to the sixth output state, transitioning from the sixth output state to the second output state, transitioning from the second output state to the fifth output state, and transitioning from the fifth output state to the third output state is executed one or more times, and then a negative cycle is executed after transitioning from the third output state to the seventh output state, transitioning from the seventh output state to the first output state, transitioning from the first output state to the fourth output state, and transitioning from the fourth output state to the third output state is executed one or more times.

2. The power converter according to claim 1, wherein a state in which the second switching element, the third switching element, and the sixth switching element are on and the first switching element, the fourth switching element, and the fifth switching element are off is an eighth output state; a state in which the second switching element, the third switching element, and the fifth switching element are on and the first switching element, the fourth switching element, and the sixth switching element are off is a ninth output state; when transitioning from the third output state to the sixth output state, a transition occurs from the third output state to the eighth output state, and a transition occurs from the eighth output state to the sixth output state; when transitioning from the third output state to the seventh output state, a transition occurs from the third output state to the ninth output state, and a transition occurs from the ninth output state to the seventh output state.

3. The power converter according to claim 1, characterized in that, when transitioning from the third output state to the sixth output state, the third output state transitions to the fifth output state, and the fifth output state transitions to the sixth output state; and, when transitioning from the third output state to the seventh output state, the third output state transitions to the fourth output state, and the fourth output state transitions to the seventh output state.

4. The power converter according to claim 2, wherein a state in which the third switching element and the sixth switching element are on and the first switching element, the second switching element, the fourth switching element and the fifth switching element are off is defined as a tenth output state; a state in which the second switching element and the fifth switching element are on and the first switching element, the third switching element, the fourth switching element and the sixth switching element are off is defined as an eleventh output state; when transitioning from the eighth output state to the sixth output state, a transition occurs from the eighth output state to the tenth output state; and a transition occurs from the tenth output state to the sixth output state; when transitioning from the ninth output state to the seventh output state, a transition occurs from the ninth output state to the eleventh output state; and a transition occurs from the eleventh output state to the seventh output state.

5. A first capacitor and a second capacitor are connected in series between the positive and negative electrodes of a DC power supply, a neutral point between the positive and negative electrodes is connected to a connection point between the first capacitor and the second capacitor, a first switching element, a second switching element, a third switching element, and a fourth switching element are connected in series between the positive and negative electrodes of the DC power supply in this order from the positive electrode side to the negative electrode side, a fifth switching element is connected between the connection point between the first switching element and the second switching element and the connection point between the first capacitor and the second capacitor, a sixth switching element is connected between the connection point between the third switching element and the fourth switching element and the connection point between the first capacitor and the second capacitor, a load is connected to the connection point between the second switching element and the third switching element, and a first diode is connected in parallel to the first switching element, the first diode passing a current in a direction opposite to a current passing through the first switching element due to a voltage applied to the first switching element by the DC power supply, a second diode connected in parallel to the second switching element, the second diode passing a current in the opposite direction to a current flowing due to the voltage applied to the second switching element by the DC power supply; a third diode connected in parallel to the third switching element, the third diode passing a current in the opposite direction to a current flowing due to the voltage applied to the third switching element by the DC power supply; a fourth diode connected in parallel to the fourth switching element, the fourth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the fourth switching element by the voltage applied to the DC power supply; a fifth diode connected in parallel to the fifth switching element, the fifth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the DC power supply; and a sixth diode connected in parallel to the sixth switching element, the sixth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the DC power supply;a second output state is a state in which the third switching element and the fourth switching element are on and the first switching element, the second switching element and the sixth switching element are off; a third output state is a state in which the second switching element, the third switching element, the fifth switching element and the sixth switching element are on and the first switching element and the fourth switching element are off; a sixth output state is a state in which the third switching element is on and the first switching element, the second switching element, the fourth switching element, the fifth switching element and the sixth switching element are off; a seventh output state is a state in which the second switching element, the third switching element and the sixth switching element are on and the first switching element, the fourth switching element, the fifth switching element and the sixth switching element are off; and an eighth output state is a state in which the second switching element, the third switching element and the sixth switching element are on and the first switching element, the fourth switching element and the fifth switching element are off. a ninth output state is a state in which the second switching element, the third switching element, and the fifth switching element are on and the first switching element, the fourth switching element, and the sixth switching element are off; and a negative cycle of transitioning from the third output state to the eighth output state, transitioning from the eighth output state to the sixth output state, transitioning from the sixth output state to the second output state, transitioning from the second output state to the sixth output state, and transitioning from the sixth output state to the third output state is executed one or more times, and then a negative cycle of transitioning from the third output state to the ninth output state, transitioning from the ninth output state to the seventh output state, transitioning from the seventh output state to the first output state, transitioning from the first output state to the seventh output state, and then executing the negative cycle.

6. The power converter according to claim 5, wherein, when transitioning from the sixth output state to the third output state, a transition occurs from the sixth output state to the eighth output state, and a transition occurs from the eighth output state to the third output state; when transitioning from the seventh output state to the third output state, a transition occurs from the seventh output state to the ninth output state, and a transition occurs from the ninth output state to the third output state.

7. A power converter as described in claim 2, characterized in that the duration of the eighth output state is longer than the time required for the current of the second switching element to reach zero when transitioning from the third output state to the eighth output state, and the duration of the ninth output state is longer than the time required for the current of the third switching element to reach zero when transitioning from the third output state to the ninth output state.

8. The power converter according to claim 2, wherein, when transitioning from the sixth output state to the second output state, in the second output state, the fourth switching element is turned on and then the fifth switching element is turned on; and when transitioning from the seventh output state to the first output state, in the first output state, the first switching element is turned on and then the sixth switching element is turned on.

9. The power converter according to claim 8, wherein, when transitioning from the sixth output state to the second output state, the fourth switching element is turned on, and the fifth switching element is turned on after the current of the sixth switching element becomes zero, and when transitioning from the seventh output state to the first output state, the first switching element is turned on, and the sixth switching element is turned on after the current of the fifth switching element becomes zero.

10. A first capacitor and a second capacitor are connected in series between the positive and negative electrodes of a DC power supply, a neutral point between the positive and negative electrodes is connected to a connection point between the first capacitor and the second capacitor, a first switching element, a second switching element, a third switching element, and a fourth switching element are connected in series between the positive and negative electrodes of the DC power supply in this order from the positive electrode side to the negative electrode side, a fifth switching element is connected between the connection point between the first switching element and the second switching element and the connection point between the first capacitor and the second capacitor, a sixth switching element is connected between the connection point between the third switching element and the fourth switching element and the connection point between the first capacitor and the second capacitor, a load is connected to the connection point between the second switching element and the third switching element, and a first diode is connected in parallel to the first switching element, the first diode passing a current in a direction opposite to a current passing through the first switching element due to a voltage applied to the first switching element by the DC power supply, a second diode connected in parallel to the second switching element, the second diode passing a current in the opposite direction to a current flowing due to the voltage applied to the second switching element by the DC power supply; a third diode connected in parallel to the third switching element, the third diode passing a current in the opposite direction to a current flowing due to the voltage applied to the third switching element by the DC power supply; a fourth diode connected in parallel to the fourth switching element, the fourth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the fourth switching element by the voltage applied to the DC power supply; a fifth diode connected in parallel to the fifth switching element, the fifth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the DC power supply; and a sixth diode connected in parallel to the sixth switching element, the sixth diode passing a current in the opposite direction to a current flowing due to the voltage applied to the DC power supply;a second output state is a state in which the third switching element and the fourth switching element are on and the first switching element, the second switching element and the sixth switching element are off; a fourth output state is a state in which the second switching element and the sixth switching element are on and the first switching element, the third switching element, the fourth switching element and the fifth switching element are off; a fifth output state is a state in which the third switching element and the fifth switching element are on and the first switching element, the second switching element, the fourth switching element and the sixth switching element are off; a sixth output state is a state in which the third switching element is on and the first switching element, the second switching element, the fourth switching element, the fifth switching element and the sixth switching element are off; a seventh output state is a state in which the second switching element is on and the first switching element, the third switching element, the fourth switching element, the fifth switching element and the sixth switching element are off; transitioning from the sixth output state to the second output state; transitioning from the second output state to the fifth output state; a negative cycle of transitioning from the fifth output state to the sixth output state is executed one or more times, a transition from the sixth output state to the second output state, a transition from the second output state to the fifth output state, and a transition from the fifth output state to the seventh output state, and then a transition from the seventh output state to the first output state, and a transition from the first output state to the fourth output state; a positive cycle of transitioning from the fourth output state to the seventh output state is executed one or more times, a transition from the seventh output state to the first output state, a transition from the first output state to the fourth output state, and a transition from the fourth output state to the sixth output state, and then the negative cycle is executed.

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