Imaging element and imaging device

Abstract

[Problem] To make it possible to suppress an increase in the scale of a pixel circuit and add signal charges for each of a plurality of pixels. [Solution] This imaging element comprises: a photoelectric conversion film provided across a plurality of pixels; first pixels, each having a pixel circuit electrically connected to the photoelectric conversion film, among the plurality of pixels; and second pixels, each having a pixel circuit electrically disconnected from the photoelectric conversion film, among the plurality of pixels. The first pixels are disposed so as to be capable of storing the signal charges generated by the second pixels.

Description

Image pickup element and image pickup device

[0001] The present disclosure relates to an imaging element and an imaging device.

[0002] Solid-state imaging devices using a compound semiconductor, such as InGaAs, for the photoelectric conversion film are being developed. Signal charges generated in the photoelectric conversion film are sent to a pixel circuit for each pixel. In such solid-state imaging devices, the signal charges for multiple pixels are summed by an adder circuit (see, for example, Patent Document 1).

[0003] International Publication No. 2018 / 078956

[0004] This requires a pixel circuit for adding the signal charges, which may increase the size of the image sensor.

[0005] The present disclosure provides an imaging element and an imaging device that can suppress an increase in the size of a pixel circuit and can add signal charges for each of a plurality of pixels.

[0006] In order to solve the above problem, according to the present disclosure, there is provided an imaging element including: a photoelectric conversion film provided across a plurality of pixels; a first pixel among the plurality of pixels having a pixel circuit electrically connected to the photoelectric conversion film; and a second pixel among the plurality of pixels having a pixel circuit that is electrically disconnected from the photoelectric conversion film.

[0007] The first pixel may be arranged to be able to store signal charges generated by the second pixel.

[0008] The first pixel may be connected to the pixel circuit via the photoelectric conversion film and a metal portion.

[0009] The front metal portion may be composed of a plurality of bondable electrodes made of at least copper (Cu) or an alloy containing copper (Cu).

[0010] The plurality of second pixels and the first pixel may form a first pixel region of a predetermined range.

[0011] The plurality of pixels may be arranged in a two-dimensional matrix, and the pixel array may have a first region consisting of a plurality of the first pixel regions, and a second region in which the plurality of first pixels are arranged in a two-dimensional matrix.

[0012] The display device may further include a second pixel region in which a plurality of the second pixels and the first pixels are arranged in a predetermined range, and a third region formed between the first region and the second region and consisting of a plurality of the second pixel regions.

[0013] The pixel circuit may have a charge accumulation section capable of accumulating signal charges generated in the photoelectric conversion film and transferred via the metal section, a selection transistor that switches whether to output a pixel signal according to the amount of charge accumulated in the charge accumulation section, and an overflow gate transistor that switches whether to discharge the charge accumulated in the charge accumulation section.

[0014] The first pixel in the first region may output a pixel signal via the selection transistor, and the first pixel in the third region may discharge the charge stored in the charge storage section via the overflow gate transistor.

[0015] The first pixel in the third region may discharge the charge accumulated in the charge accumulation section via the overflow gate transistor without outputting the pixel signal.

[0016] The first pixel in the second region may output a pixel signal via the selection transistor.

[0017] The second region may be configured by dividing it into an upper end side and a lower end side of the first region, and the third region may be configured by dividing it into a region adjacent to the upper end side of the first region and a region adjacent to the lower end side of the first region.

[0018] The first pixels in a predetermined range in the end regions in the column direction and the end regions in the row direction of the second region may discharge the charge accumulated in the charge accumulation section via the overflow gate transistor without outputting the pixel signal.

[0019] The first pixel region may be configured with at least one of pixels arranged in two rows and two columns, three rows and three columns, four rows and four columns, three rows and one column, and two rows and one column.

[0020] The second pixel region may be configured with at least one of pixels arranged in two rows and two columns, three rows and three columns, four rows and four columns, three rows and one column, and two rows and one column.

[0021] The number of the first pixels in the second pixel region may be variable from 1 to the same number as the number of pixels in the second pixel region.

[0022] The pixel circuit of the first pixel may include: a first charge accumulation section connected to the photoelectric conversion film; a second charge accumulation section connected in parallel to the first charge accumulation section; a reset transistor that resets the potential of the second charge accumulation section; a transfer transistor arranged between the first charge accumulation section and the second charge accumulation section; a third charge accumulation section connected in parallel to the first charge accumulation section; and a first changeover switch that is arranged between the first charge accumulation section and the third charge accumulation section and switches whether or not the third charge accumulation section is connected to the photoelectric conversion film, wherein the second charge accumulation section corresponds to the charge accumulation section, the selection transistor switches whether or not to output a pixel signal corresponding to the amount of charge accumulated in the second charge accumulation section, and the overflow gate transistor may discharge the charge accumulated in the third charge accumulation section.

[0023] In the pixel circuit of the first pixel in the second pixel region, during a predetermined period, the first changeover switch may connect the third charge accumulation unit to the photoelectric conversion film, and the transfer transistor and the overflow gate transistor may be in a conductive state.

[0024] The reset transistor, the transfer transistor, and the first changeover switch may be N-channel MOS transistors.

[0025] In order to solve the above-mentioned problems, according to the present disclosure, there is provided an imaging device comprising: an imaging element; and an optical system that guides incident light to the imaging element, wherein the imaging element comprises: a photoelectric conversion film provided across a plurality of pixels; a first pixel among the plurality of pixels, the first pixel having a pixel circuit that is electrically connected to the photoelectric conversion film; and a second pixel among the plurality of pixels, the second pixel having a pixel circuit that is electrically disconnected from the photoelectric conversion film.

[0026] 2 is a diagram showing an example of the configuration of an image sensor 1 according to the present embodiment. FIG. 3 is a diagram showing a more specific example of the configuration of a pixel array section 10P. FIG. 4 is a cross-sectional view taken along line AA in FIG. 2. FIG. 4 is a diagram showing an example of the configuration of a pixel circuit of a summing pixel and a pixel circuit of a non-readout pixel in a pixel area unit. FIG. 5 is a diagram showing an example of the detailed configuration of a pixel circuit of a summing pixel. A time chart showing an example of the operation of a summing pixel. A time chart showing an example of the operation of a non-readout pixel. FIG. 5 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a second embodiment. FIG. 6 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a modification of the second embodiment. FIG. 7 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a modification 2 of the second embodiment. FIG. 8 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a modification 3 of the second embodiment. FIG. 9 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a modification 4 of the second embodiment. FIG. 10 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a modification 5 of the second embodiment. FIG. 11 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a modification 6 of the second embodiment. FIG. 12 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to a modification 7 of the second embodiment. FIG. 10 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to the third embodiment. FIG. 11 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 1 of the third embodiment. FIG. 12 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 2 of the third embodiment. FIG. 13 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 3 of the third embodiment. FIG. 14 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 4 of the third embodiment. FIG. 15 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 5 of the third embodiment. FIG. 16 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 6 of the third embodiment. FIG. 17 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 1 of the fourth embodiment. FIG. 18 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 2 of the fourth embodiment. FIG. 19 is a diagram showing an example of the configuration of a pixel array section of an image sensor according to Modification 3 ... 13 is a block diagram showing an example of the configuration of a pixel array unit of an imaging element according to a first modified example of the sixth embodiment. 14 is a block diagram showing an example of the configuration of a vehicle control system. 15 is a diagram showing an example of the configuration of an outside-vehicle information detection unit and an imaging unit.

[0027] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0028] First Embodiment [Configuration Example] Fig. 1 is a diagram showing a configuration example of an image sensor 1 according to this embodiment. The image sensor 1 is, for example, an infrared image sensor, and is sensitive to light with a wavelength of 800 nm or more. This image sensor 1 includes, for example, a rectangular pixel array section 10P and an extra-pixel area 10B outside the pixel array section 10P. The extra-pixel area 10B includes peripheral circuits for driving the pixel array section 10P.

[0029] The pixel array section 10P of the image sensor 1 includes a plurality of light-receiving unit areas (pixels P) arranged, for example, two-dimensionally. The plurality of pixels P are arranged in a two-dimensional matrix. The peripheral circuit provided in the extra-pixel area 10B includes, for example, a row scanning section 201, a horizontal selection section 203, a column scanning section 204, and a system control section 202. In this embodiment, the light-receiving unit areas may be referred to as pixels.

[0030] FIG. 2 illustrates a more specific configuration example of the pixel array unit 10P. For example, one summing pixel 10k and 15 non-reading pixels 10d are configured within a pixel region 10gr consisting of four vertical pixels and four horizontal pixels. The summing pixel 10k is electrically connected to a pixel circuit and is configured to store signal charge generated by photoelectric conversion in the photoelectric conversion unit 10 (see FIG. 3, described later). In this embodiment, the pixel region 10gr is configured as a 4×4 pixel region, but this is not limited to this. For example, the number of pixels within the pixel region 10gr may be two or more, and may be, for example, 2×2, 3×3, or 5×5 pixels. The layout shape of the pixel region 10gr is also not limited to a square. For example, it may be rectangular, or the pixels may be arranged linearly. Furthermore, the summing pixel 10k may also store signal charge generated in pixel regions outside the pixel region 10gr. In this manner, the multiple non-reading pixels 10d and the summing pixel 10k form a pixel region 10gr of a predetermined range. In this embodiment, an area consisting of n pixels vertically and m pixels horizontally may be expressed as n×m, n×m pixels, n×m pieces, or the like.

[0031] The non-reading pixels 10d are configured to be electrically disconnected from the pixel circuits. Therefore, the non-reading pixels 10d are configured so as not to apply an electric field to the signal charges generated by photoelectric conversion within the pixel area unit. The pixel circuits of the non-reading pixels 10d have the same configuration as the summing pixels 10k. This allows the pixel array section 10P to be manufactured using a normal manufacturing process. Furthermore, the pixel circuits of the non-reading pixels 10d are configured to be driven in the same manner as the pixel circuits of the summing pixels 10k. Details of the summing pixels 10k and the non-reading pixels 10d will be described later using Figures 3 to 5.

[0032] 1 , the row scanning unit 201 is a pixel driving unit that is configured with a shift register, an address decoder, etc., and drives each pixel P of the pixel array unit 10P, for example, row by row. Signals output from each pixel P of a pixel row selected and scanned by the row scanning unit 201 are supplied to the horizontal selection unit 203 through each vertical signal line Lsig. The horizontal selection unit 203 is configured with an amplifier, a horizontal selection switch, etc., provided for each vertical signal line Lsig.

[0033] The column scanning unit 204 is configured with a shift register, an address decoder, etc., and scans and sequentially drives each horizontal selection switch of the horizontal selection unit 203. Through the selective scanning by this column scanning unit 204, signals of each pixel transmitted through each vertical signal line Lsig are output in sequence to a horizontal signal line 205, and input via the horizontal signal line 205 to a signal processing unit (not shown) or the like.

[0034] The system control unit 202 receives externally applied clocks and data instructing the operation mode, and also outputs data such as internal information of the image sensor 1. The system control unit 202 further has a timing generator that generates various timing signals, and performs drive control of the row scanning unit 201, horizontal selection unit 203, column scanning unit 204, etc. based on the various timing signals generated by the timing generator.

[0035] Fig. 3 is a cross-sectional view taken along line AA in Fig. 2. As shown in Fig. 3, the summing pixel 10k is electrically connected to the pixel circuit 20k. On the other hand, the non-reading pixel Pn is electrically not connected to the pixel circuit 20d. For example, in the summing pixel 10k, the photoelectric conversion unit 10 and the pixel circuit 20k are connected via Cu-Cu connection.

[0036] More specifically, the image sensor 1 has a laminated structure including, for example, a semiconductor substrate having a photoelectric conversion unit 10 and a circuit board 20 having pixel circuits 20k and 20d. The photoelectric conversion unit 10 is for photoelectrically converting incident light, such as light with a wavelength in the infrared region, for each pixel P, and includes, in order from the position closest to the circuit board 20, a first Cu electrode 11A, a second Cu electrode 11B, a first semiconductor layer 12, a photoelectric conversion film 13, a second semiconductor layer 14, and a second electrode 15. Note that the first Cu electrode 11A and the second Cu electrode 11B according to this embodiment correspond to metal portions.

[0037] The pixel circuits 20k and 20d provided on the circuit board 20 are readout integrated circuits (ROICs) for reading out signal charges generated in the photoelectric conversion unit 10. As described above, each pixel circuit 20k is connected to the first Cu electrode 11A of the photoelectric conversion unit 10 via the second Cu electrode 11B. The first Cu electrode 11A is provided in the passivation film 16 and the interlayer insulating film 17, and the second Cu electrode 11B is provided in the interlayer insulating film 17. On the other hand, the pixel circuit 20d is electrically disconnected from the photoelectric conversion unit 10 and is unable to read out signal charges.

[0038] The interlayer insulating film 17 is provided in contact with, for example, the circuit board 20. In this way, the photoelectric conversion unit 10 and the circuit board 20 in the summing pixel 10k are bonded by CuCu bonding. Instead of CuCu bonding, the photoelectric conversion unit 10 and the circuit board 20 may be bonded by bump bonding. The interlayer insulating film 17 is made of, for example, an inorganic insulating material. Examples of this inorganic insulating material include silicon nitride (SiN) and aluminum oxide (Al ２ O ３ ), silicon oxide (SiO ２ ) and hafnium oxide (HfO ２ ) etc.

[0039] The passivation film 16 is provided, for example, between the interlayer insulating film 17 and the first semiconductor layer 12. A first Cu electrode 11A is provided in this passivation film 16 for each addition pixel 10k. A portion of the first Cu electrode 11A may be provided in the interlayer insulating film 17. The passivation film 16 is made of, for example, an inorganic insulating material. Examples of this inorganic insulating material include silicon nitride (SiN) and aluminum oxide (Al ２ O ３ ), silicon oxide (SiO ２ ) and hafnium oxide (HfO ２ The passivation film 16 may be made of the same inorganic insulating material as the interlayer insulating film 17 .

[0040] The first Cu electrode 11A is electrically connected to the photoelectric conversion film 13 via the first semiconductor layer 12. The first Cu electrode 11A is an electrode to which a voltage is supplied for reading out signal charges (holes or electrons; for convenience, the following description will assume that the signal charges are holes) generated in the photoelectric conversion film 13, and is provided separately for each summing pixel 10k. One end of the first Cu electrode 11A is in contact with the first semiconductor layer 12, and the first Cu electrode 11A is electrically connected to the photoelectric conversion film 13 via the first semiconductor layer 12. The other end of the first Cu electrode 11A is in contact with the second Cu electrode 11B. Adjacent first Cu electrodes 11A are electrically isolated by a passivation film 16.

[0041] The first Cu electrode 11A and the second Cu electrode 11B are made of, for example, copper (Cu) or an alloy containing copper (Cu). The first semiconductor layer 12 provided between the passivation film 16 and the photoelectric conversion film 13 is, for example, common to all of the summing pixels 10k. This first semiconductor layer 12 serves to electrically isolate adjacent summing pixels 10k. The first semiconductor layer 12 of each summing pixel 10k also includes, for example, a diffusion region 12A. Using a compound semiconductor material with a band gap larger than that of the compound semiconductor material constituting the photoelectric conversion film 13 for the first semiconductor layer 12 can also suppress dark current. For example, n-type InP (indium phosphide) can be used for the first semiconductor layer 12.

[0042] The diffusion regions 12A provided in the first semiconductor layer 12 are spaced apart from one another. The diffusion region 12A is provided for each pixel P, and a first Cu electrode 11A is connected to each diffusion region 12A. The diffusion region 12A is used to read out the signal charges generated in the photoelectric conversion film 13 for each summing pixel 10k, and contains, for example, p-type impurities. Examples of p-type impurities include zinc (Zn). In this way, a pn junction interface is formed between the diffusion region 12A and the first semiconductor layer 12 other than the diffusion region 12A, electrically isolating adjacent summing pixels 10k. The diffusion region 12A is provided, for example, in the thickness direction of the first semiconductor layer 12 and also in a portion of the thickness direction of the photoelectric conversion film 13.

[0043] The photoelectric conversion film 13 provided between the first semiconductor layer 12 and the second semiconductor layer 14 is provided across all of the summing pixels 10k, for example. In other words, the photoelectric conversion film 13 is provided in common to all of the summing pixels 10k. This photoelectric conversion film 13 absorbs light of a predetermined wavelength and generates signal charges, and is made of a compound semiconductor material such as a III-V group semiconductor. Examples of compound semiconductor materials that may be used for the photoelectric conversion film 13 include InGaAs (indium gallium arsenide), InAsSb (indium arsenide antimony), GaAsSb (gallium arsenide antimony), InAs (indium arsenide), InSb (indium antimony), and HgCdTe (mercury cadmium telluride). The photoelectric conversion film 13 may also be made of Ge (germanium). The photoelectric conversion film 13 may also be made of a semiconductor material having a Type II structure. The photoelectric conversion film 13 is configured to perform photoelectric conversion of light having wavelengths ranging from the visible region to the short infrared region, for example.

[0044] The second semiconductor layer 14 is provided, for example, in common to all the summing pixels 10k. This second semiconductor layer 14 is provided between the photoelectric conversion film 13 and the second electrode 15 and is in contact with them. The second semiconductor layer 14 is a region where charges discharged from the second electrode 15 move, and is made of, for example, a compound semiconductor containing n-type impurities. The second semiconductor layer 14 can be made of, for example, n-type indium phosphide (InP).

[0045] The second electrode 15 faces the first Cu electrode 11A, with the second semiconductor layer 14, photoelectric conversion film 13, and first semiconductor layer 12 interposed therebetween. This second electrode 15 is provided on the second semiconductor layer 14 (on the light incident side) so as to be in contact with the second semiconductor layer 14, for example, as a common electrode for each pixel 10k, 10d. The second electrode 15 discharges charges generated in the photoelectric conversion film 13 that are not used as signal charges (cathode). For example, when holes are read out as signal charges from the first Cu electrode 11A, electrons, for example, can be discharged through this second electrode 15. A predetermined potential Vtop, for example, is applied to this second electrode 15. The second electrode 15 is made of a conductive film that is transparent to incident light, such as infrared light. The second electrode 15 may be made of, for example, ITO (Indium Tin Oxide) or ITiO (In2O3-TiO2). The second electrode 15 may also be made of InP (Indium Phosphide).

[0046] Here, the pixel circuit 20k of the summation pixel 10k and the pixel circuit 20d of the non-readout pixel Pn will be described in detail using Figures 4 and 5. Figure 4 is a diagram showing an example configuration of the pixel circuit 20k of the summation pixel 10k and the pixel circuit 20d of the non-readout pixel Pn in the pixel region 10gr. Figure 5 is a diagram showing an example detailed configuration of the pixel circuit 20k of the summation pixel 10k.

[0047] 4 and 5, the photoelectric conversion unit 10 of the summing pixel 10k in the pixel region 10gr is connected to the pixel circuit 20k. On the other hand, the pixel circuit 20d of the non-readout pixel Pn is not electrically connected to the photoelectric conversion unit 10.

[0048] 5 , pixel circuit 20k is an example of a readout circuit that reads out charges from photoelectric conversion unit 10. Specifically, pixel circuit 20k has a first charge accumulation unit (SN1) 21, a transfer transistor (TRG) 22, a second charge accumulation unit (FD1) 23, a reset transistor (RST) 24, an amplification transistor (AMP) 25, a selection transistor (SEL) 26, a changeover switch 27, a third charge accumulation unit 28, and an overflow gate (OFG) transistor 29. Note that pixel circuit 20d has the same configuration as pixel circuit 20k, except that it is not connected to photoelectric conversion unit 10.

[0049] The first charge accumulation unit 21 is composed of a capacitor that temporarily stores the charge photoelectrically converted by the photoelectric conversion unit 10. One end of the first charge accumulation unit 21 is connected to the anode electrode of the photoelectric conversion unit 10 and the source of the transfer transistor 22. The other end of the first charge accumulation unit 21 is grounded. Note that a potential (VDR) lower than Vtop can be applied as the ground potential.

[0050] The drain of the transfer transistor 22 is connected to the second charge accumulation unit 23. That is, the transfer transistor 22 is disposed between the first charge accumulation unit 21 and the second charge accumulation unit 23. The transfer transistor 22 is turned on and off based on a transfer signal input to the gate from the row scanning unit 201. When the transfer transistor 22 is turned on, the charge accumulated in the first charge accumulation unit 21 is transferred to the second charge accumulation unit 23 via the transfer transistor 22.

[0051] The second charge storage unit 23 is a floating diffusion that stores the charge transferred from the first charge storage unit 21. One end of the second charge storage unit 23 is connected to the drain of the transfer transistor, the source of the reset transistor 24, and the gate of the amplification transistor 25. The other end of the second charge storage unit 23 is grounded.

[0052] The drain of the reset transistor 24 is connected to the power supply VDD. The reset transistor 24 is turned on and off based on a reset signal input to its gate from the row scanning unit 201. When the reset transistor 24 is turned on, a reset potential VRST is applied to the second charge storage unit 23. This reset potential VRST sets the potential of the second charge storage unit 23 to its initial state (reset state).

[0053] The amplifying transistor 25 has a gate connected to the second charge accumulation unit 23, a drain connected to the power supply VDD, and a source connected to the drain of the selection transistor 26. The amplifying transistor 25 forms a source follower circuit together with a load MOS (Metal Oxide Semiconductor) serving as a constant current source connected via a vertical signal line Lsig. The amplifying transistor 25 generates a pixel signal according to the amount of charge accumulated in the second charge accumulation unit 23. Note that the second charge accumulation unit 23 according to this embodiment corresponds to the charge accumulation unit.

[0054] The source of the selection transistor 26 is connected to the vertical signal line Lsig. The selection transistor 26 is turned on and off based on a selection signal input to its gate from the row scanning unit 201. When the selection transistor 26 is turned on, the pixel signal generated by the amplification transistor 25 is output to the horizontal selection unit 203 via the vertical signal line Lsig.

[0055] The selector switch 27 corresponds to the first selector switch and is composed of an N-channel MOS transistor. The drain of the selector switch 27 is connected to one end of the first charge accumulation unit 21, and the source is connected to one end of the third charge accumulation unit 28. That is, the selector switch 27 is disposed between the first charge accumulation unit 21 and the third charge accumulation unit 28. The selector switch 27 is turned on and off based on a control signal input to its gate from the row scanning unit 201. When the selector switch 27 is turned on, the charge photoelectrically converted by the photoelectric conversion unit 10 is accumulated in the third charge accumulation unit 28 via the selector switch 27.

[0056] The third charge storage section 28 is configured by a capacitor that temporarily stores the charge photoelectrically converted by the photoelectric conversion section 10. The other end of the third charge storage section 28 is grounded.

[0057] In the pixel 10k configured as described above, the conversion efficiency changes depending on whether the selector switch 27 connects the third charge accumulation unit 28 to the photoelectric conversion unit 10. When the selector switch 27 is turned on, the conversion efficiency decreases. Conversely, when the selector switch 27 is turned off, the conversion efficiency increases.

[0058] The overflow gate transistor 29 is composed of an N-channel MOS transistor. The drain of the overflow gate transistor 29 is connected to the source of the changeover switch 27 and one end of the third charge storage unit 28, and the source is connected to the power supply VDD. The overflow gate transistor 29 is turned on and off based on a discharge signal input to its gate from the row scanning unit 201. In this embodiment, the discharge of charge to the power supply VDD via the overflow gate transistor 29 is sometimes referred to as an overflow drain.

[0059] [Operation Example] Here, an operation example of the image sensor 1 will be described using Fig. 6 and Fig. 7 with reference to Fig. 3. Fig. 6 is a time chart showing an operation example of the summing pixel 10k. Fig. 7 is a time chart showing an operation example of the non-reading pixel 10d. In this embodiment, for example, different row signal lines are connected to the row scanning unit 201 for the summing pixel 10k and the non-reading pixel 10d. This makes it possible to drive the summing pixel 10k and the non-reading pixel 10d in the same row differently.

[0060] 6 , in the summing pixel 10k, first, during the charge accumulation time from time t1 to time t2, the overflow gate (OFG) transistor 29, the reset transistor 24 (RST), the transfer transistor 22 (TRG), and the selection transistor 26 (SEL) are in the off state. Therefore, the charges photoelectrically converted by the photoelectric conversion unit 10 are accumulated in the first charge accumulation unit 21 and the third charge accumulation unit 28.

[0061] At this time, as shown in FIG. 3 , a voltage is supplied to the first Cu electrode 11A of the summing pixel 10k, which collects signal charge generated by photoelectric conversion in the pixel region 10gr. On the other hand, since the first Cu electrode 11A is not connected to the non-reading pixel 10d, the signal charge generated by photoelectric conversion in the non-reading pixel 10d is collected and accumulated in the summing pixel 10k. As can be seen from this, as the number of non-reading pixels 10d in the pixel region 10gr increases, the signal charge accumulated in the summing pixel 10k increases. Therefore, the sensitivity of the summing pixel 10k increases as the number of non-reading pixels 10d in the pixel region 10gr increases. In other words, the summing pixel 10k is arranged so as to be able to accumulate signal charge generated by the non-reading pixels 10d.

[0062] Next, during the period from time t2 to time t3, the transfer transistor 22 switches from the off state to the on state. As a result, the charges accumulated in the first charge accumulation unit 21 and the third charge accumulation unit 28 are transferred to the second charge accumulation unit 23 and amplified as a pixel signal by the amplification transistor 25. Subsequently, when the transfer transistor 22 returns to the off state, the overflow gate (OFG) transistor 29 turns on. As a result, the charges remaining in the third charge accumulation unit 28 are discharged to the power supply VDD via the overflow gate transistor 29. After the overflow gate (OFG) transistor 29 turns on, the selection transistor 26 turns on. As a result, the pixel signal is output to the vertical signal line Lsig.

[0063] Next, during the period from time t3 to time t4, the selection transistor 26 is turned off. Subsequently, the reset transistor 24, the transfer transistor 22, and the selection transistor 26 are simultaneously switched from the off state to the on state. As a result, the charge remaining in the second charge accumulation unit 23 is discharged via the reset transistor 24, and the second charge accumulation unit 23 is reset to its initial state. Thereafter, the above operation is repeated again.

[0064] In a readout operation in which the conversion efficiency is set to (Hi), the selector switch 27 (SNG) is always in the off state regardless of the D phase (Data Phase) or the P phase (Reset Phase). In addition, by adjusting the timing of the pulse of the signal input to the gate of each transistor, the pixel array unit 10P can be driven by a global shutter method in which all of the summation pixels 10k accumulate (expose) charge at the same timing, or by a rolling shutter method in which each summation pixel 10k accumulates charge at a different timing.

[0065] As shown in FIG. 7 , for example, during the period from time t1 to time t2, in the non-read pixel 10d, the overflow gate (OFG) transistor 29, the selector switch 27 (SNG), and the transfer transistor 22 (TRG) are in the on state. As a result, the charges stored in the first charge storage unit 21, the second charge storage unit 23, and the third charge storage unit 28 are discharged to the power supply VDD via the overflow gate transistor 29. Note that, although the overflow drain period is set to the period from time t1 to time t2 in this embodiment, this is not limiting. For example, the period may be set to be shorter than the period from time t1 to time t2, and overflow drain may be performed at a different timing. As the overflow drain period is shortened, power consumption is reduced. Alternatively, the overflow drain period may be set to be longer, or the entire period may be set to be the overflow drain period.

[0066] In this embodiment, the summing pixel 10k and the non-reading pixel 10d are connected to different row signal lines via the row scanning unit 201, but this is not limiting. For example, it is also possible to connect a common row signal line to the summing pixel 10k and the non-reading pixel 10d in the same row. In this case, the pixel value of the non-reading pixel 10d can be generated to be equivalent to that of a so-called light-shielded pixel in a state where no light is received.

[0067] As described above, according to this embodiment, the pixel circuit 20k of the summing pixel 10k is electrically connected to the photoelectric conversion unit 10 provided across the pixel region 10gr composed of a plurality of pixels, while the pixel circuit 20d of the non-reading pixel 10d is electrically disconnected. This makes it possible to accumulate signal charges generated in the region of the non-reading pixel 10d in the pixel circuit 20k of the summing pixel 10k, and to add pixel signals in the region of the non-reading pixel 10d without using an adder circuit.

[0068] Second Embodiment An image sensor 1 according to a second embodiment differs from the image sensor 1 according to the first embodiment in that the pixel function is different for each region defined by a combination of a plurality of row regions A10 to A20 and a plurality of column regions B10 to B14. The differences from the image sensor 1 according to the first embodiment will be described below.

[0069] [Configuration Example] Figure 8 is a diagram showing an example of the configuration of a pixel array section 10P of an image sensor 1 according to the second embodiment. The pixel array section 10P according to the second embodiment has different pixel functions for each region defined by a combination of multiple row regions A10-A20 and multiple column regions B10-B14. A corresponding pixel circuit is configured for each pixel in the pixel array section 10P. The pixel circuit has the same configuration as pixel circuit 20k (see Figure 5). Therefore, the circuit board 20 (see Figure 3) can be manufactured using a normal manufacturing process.

[0070] Each pixel in the row regions A10, A18 to A20 is electrically connected to the photoelectric conversion unit 10 (see FIG. 3). In the row regions A10, A18 to A20, a plurality of pixels are arranged in a two-dimensional matrix. These pixels have the same configuration as the summation pixel 10k. In this way, row region A10 is configured at the upper end of row region A14, and row regions A18 to A20 are configured at the lower end of row region A14.

[0071] On the other hand, the pixels in row region A14 are configured such that, for example, each pixel region unit is four pixels vertically and four pixels horizontally, and includes one summing pixel 10k and fifteen non-reading pixels 10d. As described above, the summing pixel 10k is electrically connected to the pixel circuit. On the other hand, the non-reading pixels 10d are not electrically connected to the pixel circuit.

[0072] The pixels in the row regions A12 and A16 are configured, for example, in a second pixel region of four pixels vertically and four pixels horizontally, with one collecting pixel 10kof and fifteen non-reading pixels 10d. The collecting pixels 10kof are electrically connected to the pixel circuit. On the other hand, the non-reading pixels 10d are electrically disconnected from the pixel circuit. In this embodiment, the second pixel region is configured, for example, with 4×4 second pixel regions, but this is not limited to this. For example, the number of pixels in the second pixel region may be two or more, and may be, for example, 2×2, 3×3, or 5×5 pixels. The layout shape of the second pixel region is also not limited to a square. For example, it may be rectangular, or the pixels may be arranged linearly. Furthermore, the collecting pixels 10kof may also collect signal charges generated in pixel regions outside the second pixel region. The number of collecting pixels 10kof in the second pixel region can be varied depending on the purpose, from one to the number of pixels in the second pixel region. In this way, row regions A12 and A16 are configured between a plurality of row regions A10 and A18 to A20 and row region A14, and are configured of a plurality of second pixel regions.

[0073] [Operation Example] Each pixel in row region A18 (effective line) is driven row by row as shown in Fig. 6. That is, each pixel in row region A18 can capture an image pixel by pixel. Similarly, each pixel in row regions A10, A20 and column region B12 can be driven row by row as shown in Fig. 6, and can capture an image pixel by pixel.

[0074] On the other hand, for each pixel in the row regions A10 and A20 and the column regions B10 and B14 (dummy openings), the driving shown in FIG. 7 is performed for each row. The driving shown in FIG. 7 is sometimes referred to as orb flow drain driving. In other words, each pixel in the row regions A10 and A20 and the column regions B10 and B14 is a so-called dummy pixel. By configuring the dummy pixel regions A10 and A20 and the column regions B10 and B14, charges generated by, for example, stray light are absorbed and leakage to each pixel in the row regions A10 and A20 and the column regions B10 and B14 is suppressed.

[0075] The pixels in row region A14 (effective lines, 4 × 4) are driven in the same manner as in pixel region 10gr (see FIG. 2) according to the first embodiment, which enables 4 × 4 pixel addition processing by driving summation pixel 10k without using an addition circuit.

[0076] In the collecting pixels 10kof in the row regions A12 and A16 (effective lines, 4x4 dummy), the overflow gate (OFG) transistor 29, the selector switch 27 (SNG), and the transfer transistor 22 (TRG) (see FIG. 5 ) are always on, for example. This prevents signal charges generated in the row regions A12 and A16 (effective lines, 4x4 dummy) from accumulating in the pixels of the row region A18 (effective lines). As can be seen from this, configuring the collecting pixels 10kof in the row regions A12 and A16 (effective lines, 4x4 dummy) prevents a decrease in resolution of the pixels of the row region A18 (effective lines) and enables pixel addition in the row region A14 (effective lines, 4x4). Note that the on-state periods of the overflow gate (OFG) transistor 29, the selector switch 27 (SNG), and the transfer transistor 22 (TRG) (see FIG. 5 ) can be set to any period.

[0077] (Modification 1 of Second Embodiment) The image sensor 1 according to Modification 1 of the second embodiment differs from the image sensor 1 according to the second embodiment in that the number of collecting pixels 10kof on the effective pixel side of the plurality of row regions A12 and A16 is increased. The differences from the image sensor 1 according to the second embodiment will be described below.

[0078] 9 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to Modification 1 of the second embodiment. The pixel array unit 10P according to Modification 1 of the second embodiment increases the number of current collecting pixels 10k of on the effective pixel side of a plurality of row regions A12 and A16. This makes it possible to further suppress leakage into row regions A18 (effective lines) and A10 (effective area), thereby suppressing a decrease in the resolution of each pixel in row regions A18 (effective lines) and A10 (effective area).

[0079] (Modification 2 of Second Embodiment) The image sensor 1 according to Modification 2 of the second embodiment differs from the image sensor 1 according to Modification 1 of the second embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 4 × 4) side is reduced. The differences from the image sensor 1 according to Modification 1 of the second embodiment will be described below.

[0080] 10 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 2 of the second embodiment. The pixel array unit 10P according to Modification 1 of the second embodiment has a reduced number of collecting pixels 10k of on the row region A14 (effective lines, 4 × 4). This makes it possible to further increase the sensitivity of the summing pixels 10k in the row region A14 (effective lines, 4 × 4).

[0081] (Variation 3 of Second Embodiment) The image sensor 1 according to Variation 3 of the second embodiment differs from the image sensor 1 according to Variation 2 of the second embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 4 × 4) side is further reduced. The differences from the image sensor 1 according to Variation 2 of the second embodiment will be described below.

[0082] 11 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 3 of the second embodiment. The pixel array unit 10P according to Modification 3 of the second embodiment further reduces the number of collecting pixels 10k of on the row region A14 (effective lines, 4 × 4). This makes it possible to further increase the sensitivity of the summing pixels 10k in the row region A14 (effective lines, 4 × 4).

[0083] (Variation 4 of Second Embodiment) The image sensor 1 according to Variation 4 of the second embodiment differs from the image sensor 1 according to Variation 3 of the second embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 4 × 4) side is increased. The differences from the image sensor 1 according to Variation 3 of the second embodiment will be described below.

[0084] 12 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to Modification 4 of the second embodiment. The pixel array unit 10P according to Modification 4 of the second embodiment has an increased number of collecting pixels 10k of on the row region A14 (effective lines, 4×4) side. This makes it possible to further suppress leakage into row regions A18 (effective lines) and A10 (effective region), and further suppress degradation of the resolution of each pixel in row regions A18 (effective lines) and A10 (effective region).

[0085] (Variation 5 of Second Embodiment) The image sensor 1 according to Variation 5 of the second embodiment differs from the image sensor 1 according to Variation 4 of the second embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 4 × 4) side is reduced. The differences from the image sensor 1 according to Variation 4 of the second embodiment will be described below.

[0086] 13 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to Modification 5 of the second embodiment. The pixel array unit 10P according to Modification 5 of the second embodiment has a reduced number of collecting pixels 10k of on the row region A14 (effective lines, 4 × 4). This makes it possible to further increase the sensitivity of the summing pixels 10k in the row region A14 (effective lines, 4 × 4).

[0087] (Variation 6 of Second Embodiment) The image sensor 1 according to Variation 6 of the second embodiment differs from the image sensor 1 according to Variation 5 of the second embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 4 × 4) side is increased. The differences from the image sensor 1 according to Variation 3 of the second embodiment will be described below.

[0088] 14 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to Modification 6 of the second embodiment. The pixel array unit 10P according to Modification 6 of the second embodiment has an increased number of collecting pixels 10k of on the row region A14 (effective lines, 4×4) side. This makes it possible to further suppress leakage into row regions A18 (effective lines) and A10 (effective region), and further suppress degradation of the resolution of each pixel in row regions A18 (effective lines) and A10 (effective region).

[0089] (Seventh Modification of the Second Embodiment) The image sensor 1 according to the seventh modification of the second embodiment differs from the image sensor 1 according to the second embodiment in that a row region A16A of current collecting pixels 10k of is further configured on the row region A18 (effective line) side. The differences from the image sensor 1 according to the second embodiment will be described below.

[0090] 15 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 7 of the second embodiment. The pixel array unit 10P according to Modification 7 of the second embodiment further configures a row region A16A of current collecting pixels 10k of on the row region A18 (effective line) side. This makes it possible to further suppress leakage into row region A18 (effective lines) while maintaining the sensitivity of row region A14 (effective lines, 4 × 4), thereby suppressing a decrease in the resolution of each pixel in row region A18 (effective lines).

[0091] (Third Embodiment) The image sensor 1 according to the third embodiment differs from the image sensor 1 according to the second embodiment in that the pixel regions of row regions A12, 14, and 16 are configured as 3 × 3 pixel regions. The differences from the image sensor 1 according to the second embodiment will be described below.

[0092] 16 is a diagram showing an example of the configuration of a pixel array section 10P of an image sensor 1 according to the third embodiment. The pixel areas of row areas A12, A14, and A16 are configured as 3×3 pixel areas. This makes it possible to further increase the resolution of row area A14 (effective lines, 3×3).

[0093] (Variation 1 of Third Embodiment) The image sensor 1 according to Variation 1 of the third embodiment differs from the image sensor 1 according to the third embodiment in that the number of collecting pixels 10kof on the effective pixel side of the plurality of row regions A12, A,14, and A16 is increased. The differences from the image sensor 1 according to the third embodiment will be described below.

[0094] 17 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to Modification 1 of the third embodiment. The pixel array unit 10P according to Modification 1 of the third embodiment has an increased number of current collecting pixels 10k of on the effective pixel side of a plurality of row regions A12 and A16. This makes it possible to further suppress leakage into row regions A18 (effective lines) and A10 (effective area), and further suppress degradation of the resolution of each pixel in row regions A18 (effective lines) and A10 (effective area).

[0095] (Modification 2 of Third Embodiment) The image sensor 1 according to Modification 2 of the third embodiment differs from the image sensor 1 according to Modification 1 of the third embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 3 × 3) side is increased. The differences from the image sensor 1 according to Modification 1 of the third embodiment will be described below.

[0096] 18 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 2 of the third embodiment. The pixel array unit 10P according to Modification 2 of the third embodiment has an increased number of collecting pixels 10k of on the row region A14 (effective lines, 4 × 4) side. This makes it possible to further suppress leakage into row regions A18 (effective lines) and A10 (effective region), and further suppress degradation of the resolution of each pixel in row regions A18 (effective lines) and A10 (effective region).

[0097] (Variation 3 of Third Embodiment) The image sensor 1 according to Variation 3 of the third embodiment differs from the image sensor 1 according to Variation 2 of the third embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 3 × 3) side is further reduced. The differences from the image sensor 1 according to Variation 2 of the third embodiment will be described below.

[0098] 19 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 3 of the third embodiment. The pixel array unit 10P according to Modification 3 of the third embodiment further reduces the number of collecting pixels 10k of on the row region A14 (effective lines, 3 × 3). This makes it possible to further increase the sensitivity of the summing pixels 10k in the row region A14 (effective lines, 3 × 3).

[0099] (Variation 4 of Third Embodiment) The image sensor 1 according to Variation 4 of the third embodiment differs from the image sensor 1 according to Variation 3 of the third embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 3 × 3) side is increased. The differences from the image sensor 1 according to Variation 3 of the third embodiment will be described below.

[0100] 20 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to Modification 4 of the third embodiment. The pixel array unit 10P according to Modification 4 of the third embodiment has an increased number of collecting pixels 10k of on the row region A14 (effective lines, 3 × 3) side. This makes it possible to further suppress leakage into row regions A18 (effective lines) and A10 (effective region), thereby further suppressing degradation in the resolution of each pixel in row regions A18 (effective lines) and A10 (effective region).

[0101] (Variation 5 of Third Embodiment) The image sensor 1 according to Variation 5 of the third embodiment differs from the image sensor 1 according to Variation 4 of the third embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 3 × 3) side is reduced. The differences from the image sensor 1 according to Variation 5 of the third embodiment will be described below.

[0102] 21 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 5 of the third embodiment. The pixel array unit 10P according to Modification 5 of the third embodiment has a reduced number of collecting pixels 10k of on the row region A14 (effective lines, 3 × 3). This makes it possible to further increase the sensitivity of the summing pixels 10k in the row region A14 (effective lines, 3 × 3).

[0103] (Variation 6 of Third Embodiment) The image sensor 1 according to Variation 6 of the third embodiment differs from the image sensor 1 according to the third embodiment in that a row region A16A of current collecting pixels 10kof is further configured on the row region A18 (effective line) side. The differences from the image sensor 1 according to the third embodiment will be described below.

[0104] 22 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 6 of the third embodiment. The pixel array unit 10P according to Modification 6 of the third embodiment further configures a row region A16A of current collecting pixels 10k of on the row region A18 (effective line) side. This makes it possible to further suppress leakage into row region A18 (effective lines) while maintaining the sensitivity of row region A14 (effective lines, 3 × 3), thereby further suppressing degradation in resolution of each pixel.

[0105] (Fourth embodiment) The image sensor 1 according to the fourth embodiment differs from the image sensor 1 according to the fourth embodiment in that the pixel regions of row regions A12, 14, and 16 are configured as 2 × 2 pixel regions. The differences from the image sensor 1 according to the fourth embodiment will be described below.

[0106] 23 is a diagram showing an example of the configuration of a pixel array section 10P of an image sensor 1 according to the fourth embodiment. The pixel areas of row areas A12, A14, and A16 are configured as 2×2 pixel areas. This makes it possible to further increase the resolution of row area A14 (effective lines, 2×3).

[0107] (Modification 1 of Fourth Embodiment) The image sensor 1 according to Modification 1 of the fourth embodiment differs from the image sensor 1 according to the fourth embodiment in that the number of collecting pixels 10kof on the effective pixel side of the plurality of row regions A12 is increased. The differences from the image sensor 1 according to the fourth embodiment will be described below.

[0108] 24 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 1 of the fourth embodiment. The pixel array unit 10P according to Modification 1 of the fourth embodiment has an increased number of collecting pixels 10k of on the effective pixel side of a plurality of row regions A12 and A14. This makes it possible to further suppress leakage into row region A10 (effective region) and row region A18 (effective lines), and further suppress degradation of the resolution of each pixel in row region A10 (effective region) and row region A18 (effective lines).

[0109] (Modification 2 of Fourth Embodiment) The image sensor 1 according to Modification 2 of the fourth embodiment differs from the image sensor 1 according to Modification 1 of the fourth embodiment in that the number of collecting pixels 10kof on the row region A14 (effective lines, 2 × 2) side is reduced. The differences from the image sensor 1 according to Modification 1 of the fourth embodiment will be described below.

[0110] 25 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 2 of the fourth embodiment. The pixel array unit 10P according to Modification 2 of the fourth embodiment has a reduced number of collecting pixels 10k of on the row region A14 (effective lines, 2 × 2). This makes it possible to further increase the sensitivity of the summing pixels 10k in the row region A14 (effective lines, 2 × 2).

[0111] (Variation 3 of Fourth Embodiment) The image sensor 1 according to Variation 3 of the fourth embodiment differs from the image sensor 1 according to the fourth embodiment in that a row region A16A of current collecting pixels 10k of is further configured on the row region A18 (effective line) side. The differences from the image sensor 1 according to the fourth embodiment will be described below.

[0112] 26 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 3 of the fourth embodiment. The pixel array unit 10P according to Modification 3 of the fourth embodiment further configures a row region A16A of current collecting pixels 10k of on the row region A18 (effective line) side. This makes it possible to further suppress leakage into the row region A18 (effective line) while maintaining the sensitivity of the summing pixels 10k in the row region A14 (effective line, 2 × 2), and further suppress degradation in the resolution of each pixel in the row region A18 (effective line).

[0113] Fifth Embodiment An image sensor 1 according to a fifth embodiment differs from the image sensor 1 according to the fourth embodiment in that the pixel regions of row regions A12, 14, and 16 are configured as pixel regions of 1 column x 3 rows. The differences from the image sensor 1 according to the fourth embodiment will be described below.

[0114] 27 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to the fifth embodiment. The pixel regions of row regions A12, A14, and A16 are configured as 1 × 3 pixel regions. This makes it possible to further increase the resolution of the summation pixel 10k in row region A14 (effective line, 1 × 3).

[0115] Sixth Embodiment An image sensor 1 according to a sixth embodiment differs from the image sensor 1 according to the fifth embodiment in that the pixel regions of row regions A12, 14, and 16 are configured as pixel regions of 1 column x 2 rows. The differences from the image sensor 1 according to the fifth embodiment will be described below.

[0116] 28 is a diagram showing an example of the configuration of a pixel array unit 10P of an image sensor 1 according to the sixth embodiment. The pixel regions of row regions A12, A14, and A16 are configured as 1×2 pixel regions. This makes it possible to further increase the resolution of the summation pixel 10k in row region A14 (effective line, 1×2).

[0117] (Modification 1 of Sixth Embodiment) The image sensor 1 according to Modification 1 of the sixth embodiment differs from the image sensor 1 according to the sixth embodiment in that a row region A16A of current collecting pixels 10k of is further configured on the row region A18 (effective line) side. The differences from the image sensor 1 according to the fourth embodiment will be described below.

[0118] 29 is a diagram showing an example configuration of a pixel array unit 10P of an image sensor 1 according to Modification 1 of the sixth embodiment. The pixel array unit 10P according to Modification 1 of the sixth embodiment further configures a row region A16A of current collecting pixels 10k of on the row region A18 (effective line) side. This makes it possible to further suppress leakage into row region A18 (effective line) while maintaining the sensitivity of the summing pixels 10k in row region A14 (effective line, 1 × 2), thereby further suppressing degradation in the resolution of each pixel.

[0119] <Application Example 1> The above-described image sensor 1 can be applied to various types of image sensing devices (electronic devices), such as cameras capable of capturing images in the infrared region. Fig. 30 is a diagram showing a schematic configuration of an electronic device 3 (camera). As shown in Fig. 30, the schematic configuration of the electronic device 3 (camera) is shown. This electronic device 3 is, for example, a camera capable of capturing still images or videos, and includes the image sensor 1, an optical system (optical lens) 310, a shutter device 311, a driver 313 that drives the image sensor 1 and the shutter device 311, and a signal processor 312.

[0120] The optical system 310 guides image light (incident light) from a subject to the image sensor 1. This optical system 310 may be composed of multiple optical lenses. The shutter device 311 controls the light irradiation period and light blocking period for the image sensor 1. The drive unit 313 controls the transfer operation of the image sensor 1 and the shutter operation of the shutter device 311. The signal processing unit 312 performs various signal processing on the signal output from the image sensor 1. The video signal Dout after signal processing is stored in a storage medium such as a memory, or is output to a monitor, etc.

[0121] <Application Example 2> The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, a robot, construction machinery, or agricultural machinery (tractor).

[0122] 31 is a block diagram showing a schematic configuration example of a vehicle control system 7000, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied. The vehicle control system 7000 includes a plurality of electronic control units connected via a communication network 7010. In the example shown in FIG. 31 , the vehicle control system 7000 includes a drive system control unit 7100, a body system control unit 7200, a battery control unit 7300, an outside-vehicle information detection unit 7400, an inside-vehicle information detection unit 7500, and an integrated control unit 7600. The communication network 7010 connecting these multiple control units may be an in-vehicle communication network conforming to any standard, such as a Controller Area Network (CAN), a Local Interconnect Network (LIN), a Local Area Network (LAN), or FlexRay (registered trademark).

[0123] Each control unit includes a microcomputer that performs arithmetic processing according to various programs, a memory unit that stores the programs executed by the microcomputer or parameters used in various calculations, and a drive circuit that drives various controlled devices. Each control unit includes a network I / F for communicating with other control units via a communication network 7010, and a communication I / F for communicating with devices or sensors inside and outside the vehicle via wired or wireless communication. Figure 31 illustrates the functional configuration of the integrated control unit 7600, including a microcomputer 7610, a general-purpose communication I / F 7620, a dedicated communication I / F 7630, a positioning unit 7640, a beacon receiving unit 7650, an in-vehicle device I / F 7660, an audio / video output unit 7670, an in-vehicle network I / F 7680, and a memory unit 7690. The other control units also include a microcomputer, a communication I / F, a memory unit, and the like.

[0124] The drivetrain control unit 7100 controls the operation of devices related to the drivetrain of the vehicle according to various programs. For example, the drivetrain control unit 7100 functions as a control device for a drive force generating device for generating drive force for the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating braking force for the vehicle. The drivetrain control unit 7100 may also function as a control device for an ABS (Antilock Brake System) or an ESC (Electronic Stability Control), etc.

[0125] A vehicle state detection unit 7110 is connected to the drivetrain control unit 7100. The vehicle state detection unit 7110 includes at least one of a gyro sensor that detects the angular velocity of the axial rotational motion of the vehicle body, an acceleration sensor that detects the acceleration of the vehicle, or a sensor that detects the amount of operation of the accelerator pedal, the amount of operation of the brake pedal, the steering angle of the steering wheel, the engine rotation speed, the rotation speed of the wheels, etc. The drivetrain control unit 7100 performs arithmetic processing using signals input from the vehicle state detection unit 7110, and controls the internal combustion engine, the drive motor, the electric power steering device, the brake device, etc.

[0126] The body system control unit 7200 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 7200 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 7200. The body system control unit 7200 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0127] The battery control unit 7300 controls the secondary battery 7310, which is the power supply source for the drive motor, in accordance with various programs. For example, information such as battery temperature, battery output voltage, or remaining battery capacity is input to the battery control unit 7300 from a battery device equipped with the secondary battery 7310. The battery control unit 7300 performs arithmetic processing using these signals, and controls the temperature regulation of the secondary battery 7310 or a cooling device or the like equipped in the battery device.

[0128] The outside vehicle information detection unit 7400 detects information outside the vehicle equipped with the vehicle control system 7000. For example, at least one of an imaging unit 7410 and an outside vehicle information detection unit 7420 is connected to the outside vehicle information detection unit 7400. The imaging unit 7410 includes at least one of a ToF (Time Of Flight) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras. The outside vehicle information detection unit 7420 includes at least one of an environmental sensor for detecting the current weather or climate, or a surrounding information detection sensor for detecting other vehicles, obstacles, pedestrians, etc. around the vehicle equipped with the vehicle control system 7000.

[0129] The environmental sensor may be, for example, at least one of a raindrop sensor that detects rain, a fog sensor that detects fog, a sunshine sensor that detects the degree of sunshine, and a snow sensor that detects snowfall. The surrounding information detection sensor may be at least one of an ultrasonic sensor, a radar device, and a LIDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) device. The imaging unit 7410 and the outside vehicle information detection unit 7420 may be provided as independent sensors or devices, or may be provided as a device in which multiple sensors or devices are integrated.

[0130] 32 shows an example of the installation positions of the imaging unit 7410 and the vehicle exterior information detection unit 7420. The imaging units 7910, 7912, 7914, 7916, and 7918 are provided, for example, at least one of the front nose, side mirrors, rear bumper, back door, and upper part of the windshield inside the vehicle cabin of the vehicle 7900. The imaging unit 7910 provided on the front nose and the imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 7900. The imaging units 7912 and 7914 provided on the side mirrors mainly acquire images of the sides of the vehicle 7900. The imaging unit 7916 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 7900. The imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin is mainly used to detect leading vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0131] 32 shows an example of the imaging ranges of the imaging units 7910, 7912, 7914, and 7916. Imaging range a indicates the imaging range of the imaging unit 7910 provided on the front nose, imaging ranges b and c indicate the imaging ranges of the imaging units 7912 and 7914 provided on the side mirrors, respectively, and imaging range d indicates the imaging range of the imaging unit 7916 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 7910, 7912, 7914, and 7916, a bird's-eye view image of the vehicle 7900 viewed from above can be obtained.

[0132] The outside vehicle information detection units 7920, 7922, 7924, 7926, 7928, and 7930 provided on the front, rear, sides, corners, and above the windshield inside the vehicle cabin of the vehicle 7900 may be, for example, ultrasonic sensors or radar devices. The outside vehicle information detection units 7920, 7926, and 7930 provided on the front nose, rear bumper, back door, and above the windshield inside the vehicle cabin of the vehicle 7900 may be, for example, LIDAR devices. These outside vehicle information detection units 7920 to 7930 are mainly used to detect preceding vehicles, pedestrians, obstacles, etc.

[0133] Returning to FIG. 31 , the explanation will be continued. The outside vehicle information detection unit 7400 causes the imaging unit 7410 to capture an image outside the vehicle and receives the captured image data. The outside vehicle information detection unit 7400 also receives detection information from the connected outside vehicle information detection unit 7420. If the outside vehicle information detection unit 7420 is an ultrasonic sensor, a radar device, or a LIDAR device, the outside vehicle information detection unit 7400 emits ultrasonic waves or electromagnetic waves and receives information on the received reflected waves. Based on the received information, the outside vehicle information detection unit 7400 may perform object detection processing or distance detection processing for people, vehicles, obstacles, signs, text on the road, etc. Based on the received information, the outside vehicle information detection unit 7400 may also perform environment recognition processing for recognizing rainfall, fog, road conditions, etc. Based on the received information, the outside vehicle information detection unit 7400 may also calculate the distance to an object outside the vehicle.

[0134] The outside vehicle information detection unit 7400 may also perform image recognition processing or distance detection processing to recognize people, vehicles, obstacles, signs, or characters on the road surface based on the received image data. The outside vehicle information detection unit 7400 may perform processing such as distortion correction or alignment on the received image data, and may also generate an overhead image or a panoramic image by combining image data captured by different image capturing units 7410. The outside vehicle information detection unit 7400 may also perform viewpoint conversion processing using image data captured by different image capturing units 7410.

[0135] The interior information detection unit 7500 detects information inside the vehicle. A driver state detection unit 7510 that detects the driver's state is connected to the interior information detection unit 7500, for example. The driver state detection unit 7510 may include a camera that captures an image of the driver, a biosensor that detects the driver's biometric information, or a microphone that collects sound from within the vehicle cabin. The biosensor is provided, for example, on the seat or steering wheel, and detects the biometric information of a passenger sitting in the seat or the driver gripping the steering wheel. The interior information detection unit 7500 may calculate the driver's level of fatigue or concentration based on the detection information input from the driver state detection unit 7510, or may determine whether the driver is dozing off. The interior information detection unit 7500 may perform processing such as noise canceling on the collected audio signal.

[0136] The integrated control unit 7600 controls the overall operation of the vehicle control system 7000 in accordance with various programs. An input unit 7800 is connected to the integrated control unit 7600. The input unit 7800 is realized by a device that can be operated by a passenger, such as a touch panel, a button, a microphone, a switch, or a lever. Data obtained by voice recognition of voice input through a microphone may be input to the integrated control unit 7600. The input unit 7800 may be, for example, a remote control device using infrared or other radio waves, or an externally connected device such as a mobile phone or a personal digital assistant (PDA) that is compatible with the operation of the vehicle control system 7000. The input unit 7800 may be, for example, a camera, in which case the passenger can input information using gestures. Alternatively, data obtained by detecting the movement of a wearable device worn by the passenger may be input. Furthermore, the input unit 7800 may include, for example, an input control circuit that generates an input signal based on information input by a passenger or the like using the input unit 7800 and outputs the signal to the integrated control unit 7600. The passenger or the like operates the input unit 7800 to input various data to the vehicle control system 7000 and to instruct processing operations.

[0137] The storage unit 7690 may include a ROM (Read Only Memory) that stores various programs executed by the microcomputer, and a RAM (Random Access Memory) that stores various parameters, calculation results, sensor values, etc. The storage unit 7690 may also be realized by a magnetic storage device such as a HDD (Hard Disc Drive), a semiconductor storage device, an optical storage device, a magneto-optical storage device, or the like.

[0138] The general-purpose communication I / F 7620 is a general-purpose communication I / F that mediates communication with various devices present in the external environment 7750. The general-purpose communication I / F 7620 may implement a cellular communication protocol such as GSM (registered trademark) (Global System of Mobile communications), WiMAX (registered trademark), LTE (registered trademark) (Long Term Evolution), or LTE-A (LTE-Advanced), or other wireless communication protocols such as a wireless LAN (also referred to as Wi-Fi (registered trademark)) or Bluetooth (registered trademark). The general-purpose communication I / F 7620 may connect to a device (e.g., an application server or a control server) present on an external network (e.g., the Internet, a cloud network, or an operator-specific network) via, for example, a base station or an access point. In addition, the general-purpose communication I / F 7620 may connect to a terminal located near the vehicle (for example, a terminal of a driver, a pedestrian, or a store, or an MTC (Machine Type Communication) terminal) using, for example, P2P (Peer To Peer) technology.

[0139] The dedicated communication I / F 7630 is a communication I / F that supports a communication protocol designed for use in a vehicle. The dedicated communication I / F 7630 may implement a standard protocol such as WAVE (Wireless Access in Vehicle Environment), which is a combination of IEEE 802.11p at a lower layer and IEEE 1609 at an upper layer, DSRC (Dedicated Short Range Communications), or a cellular communication protocol. The dedicated communication I / F 7630 typically performs V2X communication, which is a concept including one or more of vehicle-to-vehicle communication, vehicle-to-infrastructure communication, vehicle-to-home communication, and vehicle-to-pedestrian communication.

[0140] The positioning unit 7640 performs positioning by receiving, for example, GNSS signals from GNSS (Global Navigation Satellite System) satellites (for example, GPS signals from GPS (Global Positioning System) satellites) and generates position information including the latitude, longitude, and altitude of the vehicle. Note that the positioning unit 7640 may identify the current position by exchanging signals with a wireless access point, or may obtain position information from a terminal such as a mobile phone, PHS, or smartphone that has a positioning function.

[0141] The beacon receiving unit 7650 receives, for example, radio waves or electromagnetic waves transmitted from radio stations or the like installed on the road, and acquires information such as the current location, congestion, road closures, required travel time, etc. The function of the beacon receiving unit 7650 may be included in the dedicated communication I / F 7630 described above.

[0142] The in-vehicle device I / F 7660 is a communication interface that mediates connections between the microcomputer 7610 and various in-vehicle devices 7760 present in the vehicle. The in-vehicle device I / F 7660 may establish wireless connections using wireless communication protocols such as wireless LAN, Bluetooth (registered trademark), NFC (Near Field Communication), or WUSB (Wireless USB). The in-vehicle device I / F 7660 may also establish a wired connection such as USB (Universal Serial Bus), HDMI (registered trademark) (High-Definition Multimedia Interface), or MHL (Mobile High-Definition Link) via a connection terminal (and a cable, if necessary) not shown. The in-vehicle device 7760 may include, for example, at least one of a mobile device or a wearable device owned by a passenger, or an information device carried into or attached to the vehicle. The in-vehicle device 7760 may also include a navigation device that searches for a route to an arbitrary destination. The in-vehicle device I / F 7660 exchanges control signals or data signals with these in-vehicle devices 7760.

[0143] The in-vehicle network I / F 7680 is an interface that mediates communication between the microcomputer 7610 and the communication network 7010. The in-vehicle network I / F 7680 transmits and receives signals in accordance with a predetermined protocol supported by the communication network 7010.

[0144] The microcomputer 7610 of the integrated control unit 7600 controls the vehicle control system 7000 in accordance with various programs based on information acquired via at least one of the general-purpose communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I / F 7660, and the in-vehicle network I / F 7680. For example, the microcomputer 7610 may calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the acquired information inside and outside the vehicle, and output control commands to the drivetrain control unit 7100. For example, the microcomputer 7610 may perform cooperative control aimed at realizing functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the following distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc. In addition, the microcomputer 7610 may perform cooperative control for the purpose of autonomous driving, in which the vehicle travels autonomously without relying on driver operation, by controlling a driving force generating device, a steering mechanism, a braking device, etc. based on information acquired about the vehicle's surroundings.

[0145] The microcomputer 7610 may generate three-dimensional distance information between the vehicle and objects such as surrounding structures and people, and create local map information including information about the vicinity of the vehicle's current location, based on information acquired via at least one of the general-purpose communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I / F 7660, and the in-vehicle network I / F 7680. Furthermore, the microcomputer 7610 may predict dangers, such as a vehicle collision, the approach of a pedestrian, or entry into a closed road, based on the acquired information, and generate a warning signal. The warning signal may be, for example, a signal for generating a warning sound or turning on a warning lamp.

[0146] The audio / video output unit 7670 transmits at least one audio and / or visual output signal to an output device capable of visually or audibly notifying the vehicle occupants or the outside of the vehicle of information. In the example of FIG. 31 , an audio speaker 7710, a display unit 7720, and an instrument panel 7730 are illustrated as examples of the output devices. The display unit 7720 may include, for example, at least one of an on-board display and a head-up display. The display unit 7720 may have an AR (Augmented Reality) display function. The output device may be other devices besides these devices, such as headphones, a wearable device such as an eyeglass-type display worn by the occupant, a projector, or a lamp. When the output device is a display device, the display device visually displays results obtained by various processes performed by the microcomputer 7610 or information received from other control units in various formats, such as text, images, tables, and graphs. Furthermore, when the output device is an audio output device, the audio output device converts an audio signal consisting of reproduced audio data or acoustic data into an analog signal and outputs it audibly.

[0147] In the example shown in FIG. 31 , at least two control units connected via the communication network 7010 may be integrated into a single control unit. Alternatively, each control unit may be composed of multiple control units. Furthermore, the vehicle control system 7000 may include another control unit not shown. In the above description, some or all of the functions performed by one of the control units may be performed by another control unit. In other words, as long as information is transmitted and received via the communication network 7010, predetermined arithmetic processing may be performed by one of the control units. Similarly, a sensor or device connected to one of the control units may be connected to another control unit, and multiple control units may transmit and receive detection information to and from each other via the communication network 7010.

[0148] A computer program for realizing each function of the imaging device 1 according to this embodiment described with reference to FIG. 1 can be implemented in any control unit or the like. A computer-readable recording medium storing such a computer program can also be provided. Examples of the recording medium include a magnetic disk, an optical disk, a magneto-optical disk, and a flash memory. The computer program may also be distributed, for example, via a network without using a recording medium.

[0149] In the vehicle control system 7000 described above, the image sensor 1 according to this embodiment described using Figure Z can be applied to the image capturing unit 7410 of the application example shown in Figure 31. For example, by using the image capturing unit 7410, it becomes possible to add the signal charges of the respective pixels without using an adder circuit.

[0150] The present technology can be configured as follows:

[0151] An imaging element comprising: a photoelectric conversion film provided across a plurality of pixels; a first pixel among the plurality of pixels, the first pixel having a pixel circuit electrically connected to the photoelectric conversion film; and a second pixel among the plurality of pixels, the second pixel having a pixel circuit that is electrically disconnected from the photoelectric conversion film.

[0152] The imaging device according to claim 1 , wherein the first pixel is arranged so as to be able to store signal charges generated by the second pixel.

[0153] The imaging element according to claim 1 , wherein the first pixel is connected to the pixel circuit via the photoelectric conversion film and a metal portion.

[0154] 4. The imaging element according to claim 3, wherein the front metal portion is composed of a plurality of bondable electrodes made of at least copper (Cu) or an alloy containing copper (Cu).

[0155] The imaging device according to claim 4, wherein the plurality of second pixels and the first pixel form a first pixel region of a predetermined range.

[0156] The imaging element according to claim 5, wherein the plurality of pixels are arranged in a two-dimensional matrix, and the imaging element has: a first region consisting of a plurality of the first pixel regions; and a second region in which the plurality of first pixels are arranged in a two-dimensional matrix.

[0157] 7. The imaging element according to claim 6, further comprising: a second pixel region in which a plurality of the second pixels and the first pixels are arranged in a predetermined range; and a third region formed between the first region and the second region and consisting of a plurality of the second pixel regions.

[0158] 8. The imaging element according to claim 7, wherein the pixel circuit comprises: a charge accumulation section capable of accumulating signal charges generated in the photoelectric conversion film and transferred via the metal section; a selection transistor that switches whether to output a pixel signal corresponding to an amount of charge accumulated in the charge accumulation section; and an overflow gate transistor that switches whether to discharge the charge accumulated in the charge accumulation section.

[0159] 9. The imaging element according to claim 8, wherein the first pixel in the first region outputs a pixel signal via the selection transistor, and the first pixel in the third region discharges the charge stored in the charge storage section via the overflow gate transistor.

[0160] 10. The imaging element according to claim 9, wherein the first pixel in the third region does not output the pixel signal, but discharges the charge accumulated in the charge accumulation section via the overflow gate transistor.

[0161] The imaging element according to claim 9 or 10, wherein the first pixel in the second region outputs a pixel signal via the selection transistor.

[0162] The imaging element according to claim 11, wherein the second region is configured by dividing it into an upper end side and a lower end side of the first region, and the third region is configured by dividing it into a region adjacent to the upper end side of the first region and a region adjacent to the lower end side of the first region.

[0163] 13. The imaging element according to claim 12, wherein the first pixels in a predetermined range in an end region in the column direction and an end region in the row direction in the second region do not output the pixel signal, but discharge the charge accumulated in the charge accumulation section via the overflow gate transistor.

[0164] 14. The imaging device according to claim 13, wherein the first pixel region is configured with at least one of pixels arranged in two rows and two columns, three rows and three columns, four rows and four columns, three rows and one column, and two rows and one column.

[0165] 15. The imaging element according to claim 14, wherein the second pixel region is configured with at least any one of pixels arranged in two rows and two columns, three rows and three columns, four rows and four columns, three rows and one column, and two rows and one column.

[0166] 16. The imaging device according to claim 15, wherein the number of the first pixels in the second pixel region is variable from 1 to the same number as the number of pixels in the second pixel region.

[0167] the pixel circuit of the first pixel includes: a first charge accumulation unit connected to the photoelectric conversion film; a second charge accumulation unit connected in parallel to the first charge accumulation unit; a reset transistor that resets a potential of the second charge accumulation unit; a transfer transistor that is arranged between the first charge accumulation unit and the second charge accumulation unit; a third charge accumulation unit connected in parallel to the first charge accumulation unit; and a first changeover switch that is arranged between the first charge accumulation unit and the third charge accumulation unit and that switches whether or not the third charge accumulation unit is connected to the photoelectric conversion film, wherein the second charge accumulation unit corresponds to the charge accumulation unit, the selection transistor switches whether or not to output a pixel signal corresponding to an amount of charge accumulated in the second charge accumulation unit, and the overflow gate transistor discharges the charge accumulated in the third charge accumulation unit.

[0168] 18. The imaging element according to claim 17, wherein, in the pixel circuit of the first pixel in the second pixel region, during a predetermined period, the first changeover switch connects the third charge accumulation unit to the photoelectric conversion film, and the transfer transistor and the overflow gate transistor are in a conductive state.

[0169] The image sensor according to claim 18, wherein the reset transistor, the transfer transistor, and the first changeover switch are N-channel MOS transistors.

[0170] An imaging device comprising: an imaging element; and an optical system that guides incident light to the imaging element, wherein the imaging element comprises: a photoelectric conversion film provided across a plurality of pixels; a first pixel among the plurality of pixels, the first pixel having a pixel circuit that is electrically connected to the photoelectric conversion film; and a second pixel among the plurality of pixels, the second pixel having a pixel circuit that is electrically disconnected from the photoelectric conversion film.

[0171] The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and spirit of the present disclosure, which is derived from the contents defined in the claims and their equivalents.

[0172] 1: imaging element, 3: electronic device (imaging device), 10d: non-readout pixel, 10gr: pixel area unit, 10k: summing pixel, 10kof: current collecting pixel, 11A: first Cu electrode, 11B: second Cu electrode, 20d: pixel circuit, 20k: pixel circuit, 21: first charge accumulation section, 22: transfer transistor, 23: second charge accumulation section, 24: reset transistor, 26: selection transistor, 27: changeover switch, 28: third charge accumulation section 2, 29: overflow gate transistor, 310: optical system, A10 to A20: row areas, B10 to B14: column areas

Claims

1. An imaging element comprising: a photoelectric conversion film provided across a plurality of pixels; a first pixel among the plurality of pixels having a pixel circuit electrically connected to the photoelectric conversion film; and a second pixel among the plurality of pixels having a pixel circuit that is electrically disconnected from the photoelectric conversion film.

2. The imaging device according to claim 1, wherein the first pixel is arranged so as to be able to store the signal charge generated by the second pixel.

3. The imaging element according to claim 1, wherein the first pixel is connected to the pixel circuit via the photoelectric conversion film and a metal portion.

4. The imaging element according to claim 3, wherein the front metal portion is composed of a plurality of bondable electrodes made of at least copper (Cu) or an alloy containing copper (Cu).

5. The imaging device according to claim 4, wherein a plurality of said second pixels and said first pixels form a first pixel region of a predetermined range.

6. The imaging element according to claim 5, wherein the plurality of pixels are arranged in a two-dimensional matrix, and the imaging element has: a first region consisting of a plurality of the first pixel regions; and a second region in which the plurality of first pixels are arranged in a two-dimensional matrix.

7. The imaging element according to claim 6, further comprising a second pixel region in which a plurality of the second pixels and the first pixels are arranged in a predetermined range, and a third region formed between the first region and the second region and consisting of a plurality of the second pixel regions.

8. The image sensor according to claim 7, wherein the pixel circuit comprises: a charge storage section capable of storing signal charge generated in the photoelectric conversion film and transferred via the metal section; a selection transistor that switches whether or not to output a pixel signal according to the amount of charge stored in the charge storage section; and an overflow gate transistor that switches whether or not to discharge the charge stored in the charge storage section.

9. The imaging element according to claim 8, wherein the first pixel in the first region outputs a pixel signal via the selection transistor, and the first pixel in the third region discharges the charge accumulated in the charge accumulation section via the overflow gate transistor.

10. The imaging element according to claim 9, wherein the first pixel in the third region does not output the pixel signal, but discharges the charge accumulated in the charge accumulation section via the overflow gate transistor.

11. The imaging device according to claim 9, wherein the first pixel in the second region outputs a pixel signal via the selection transistor.

12. The imaging element described in claim 11, wherein the second region is configured by dividing it into an upper end side and a lower end side of the first region, and the third region is configured by dividing it into a region adjacent to the upper end side of the first region and a region adjacent to the lower end side of the first region.

13. The imaging element described in claim 12, wherein the first pixels in a predetermined range in the end regions in the column direction and the end regions in the row direction of the second region do not output the pixel signal, but discharge the charge accumulated in the charge accumulation section via the overflow gate transistor.

14. The imaging device according to claim 13, wherein the first pixel region is configured with pixels arranged in at least one of two rows and two columns, three rows and three columns, four rows and four columns, three rows and one column, and two rows and one column.

15. The imaging device according to claim 14, wherein the second pixel region is configured with pixels arranged in at least one of two rows and two columns, three rows and three columns, four rows and four columns, three rows and one column, and two rows and one column.

16. The imaging device according to claim 15, wherein the number of said first pixels in said second pixel region is variable from 1 to the same number as the number of pixels in said second pixel region.

17. The image sensor of claim 8, wherein the pixel circuit of the first pixel comprises: a first charge accumulation section connected to the photoelectric conversion film; a second charge accumulation section connected in parallel to the first charge accumulation section; a reset transistor that resets the potential of the second charge accumulation section; a transfer transistor arranged between the first charge accumulation section and the second charge accumulation section; a third charge accumulation section connected in parallel to the first charge accumulation section; and a first changeover switch that is arranged between the first charge accumulation section and the third charge accumulation section and switches whether or not the third charge accumulation section is connected to the photoelectric conversion film, wherein the second charge accumulation section corresponds to the charge accumulation section, the selection transistor switches whether or not to output a pixel signal corresponding to the amount of charge accumulated in the second charge accumulation section, and the overflow gate transistor discharges the charge accumulated in the third charge accumulation section.

18. The image sensor of claim 17, wherein the pixel circuit of the first pixel in the second pixel region is such that, during a predetermined period, the first changeover switch connects the third charge storage section to the photoelectric conversion film, and the transfer transistor and the overflow gate transistor are in a conductive state.

19. The image sensor according to claim 18, wherein the reset transistor, the transfer transistor, and the first changeover switch are N-channel MOS transistors.

20. An imaging device comprising: an imaging element; and an optical system that guides incident light to the imaging element, wherein the imaging element comprises: a photoelectric conversion film provided across a plurality of pixels; a first pixel among the plurality of pixels having a pixel circuit electrically connected to the photoelectric conversion film; and a second pixel among the plurality of pixels having a pixel circuit that is electrically disconnected from the photoelectric conversion film.

Images