Thin-film solar cell module and method for manufacturing same

Abstract

A solar cell module according to embodiments of the present invention may comprise: a substrate; a solar cell including a first lower conductive layer, a first semiconductor layer, and a first upper conductive layer sequentially stacked upward on the substrate; a plurality of blocking diodes disposed on one side of the solar cell and including a second lower conductive layer, a second semiconductor layer, and a second upper conductive layer, wherein the second lower conductive layer is connected to the first lower conductive layer of the solar cell, and the second semiconductor layer and the second upper conductive layer are sequentially stacked upward on the second lower conductive layer; and diode connection parts which are disposed between neighboring blocking diodes among the plurality of blocking diodes and connect the neighboring blocking diodes. Therefore, according to embodiments of the present invention, the solar cell module may have the blocking diodes embedded therein.

Description

Thin-film solar cell module and manufacturing method thereof

[0001] The present invention relates to a thin-film solar cell module and a method for manufacturing the same, and more particularly, to a thin-film solar cell module that can be manufactured at low cost and effectively prevent reverse current flow, and a method for manufacturing the same.

[0002] A solar module contains solar cells that can generate electricity by receiving sunlight, and multiple solar cells may be provided. Solar cells can only generate electricity when receiving sunlight and do not have a power storage function. Therefore, if the solar module is located opposite the sun (at night) or if it rains, the solar cell cannot generate electricity. Therefore, to prepare for these situations, a battery capable of accumulating electricity is connected to the solar module, and the electricity is stored in the battery. However, if the solar cell is directly connected to the battery, as described above, at night or on rainy days, the solar cell may not generate electricity or its output may be low, leading to discharge from the battery. In other words, a reverse current flow phenomenon (discharge) can occur, causing the battery current to flow to the solar cell.

[0003] To address these issues, standalone devices such as satellites connect blocking diodes to solar cells to prevent reverse current flow. This involves manufacturing the solar cells and blocking diodes separately, then attaching them to the solar cells via soldering. However, these separately manufactured blocking diodes are bulky, increasing the overall size of the solar cell module. Furthermore, the additional process of attaching the blocking diode to the solar cell, such as by soldering, increases manufacturing time.

[0004] Additionally, if a solar module cannot generate power while a large amount of current is stored in the battery, a single blocking diode is insufficient to prevent the battery current from flowing backwards (discharging) to the solar cell. This causes the battery current to flow backwards to the solar cell, causing it to discharge.

[0005] (Prior art document) (Patent document 1) Korean registered patent 10-1351542

[0006] The present invention provides a thin film solar cell module having a blocking diode and a method for manufacturing the same.

[0007] The present invention provides a thin-film solar cell module capable of effectively preventing reverse current flow and a method for manufacturing the same.

[0008] A thin film solar cell module according to an embodiment of the present invention may include a substrate; a solar cell including a first lower conductive layer, a first semiconductor layer, and a first upper conductive layer sequentially stacked in an upward direction on the substrate; a second lower conductive layer connected to the first lower conductive layer of the solar cell, a second semiconductor layer and a second upper conductive layer sequentially stacked in an upward direction on the second lower conductive layer, and a plurality of blocking diodes disposed on one side of the solar cell; and a diode connector disposed between adjacent blocking diodes among the plurality of blocking diodes and connecting the adjacent blocking diodes.

[0009] The above diode connection portion may be connected to the second lower conductive layer of the blocking diode disposed on one side of the diode connection portion, and may be connected to the second upper conductive layer of the blocking diode disposed on the other side of the diode connection portion.

[0010] The diode connection portion may include: a third lower conductive layer connected to the second lower conductive layer of the blocking diode disposed on one side; a third upper conductive layer connected to the second upper conductive layer of the blocking diode disposed on the other side; a third semiconductor layer disposed between the third upper conductive layer and the third lower conductive layer; and a first intermediate pattern formed to penetrate the third semiconductor layer so as to connect the third upper conductive layer and the third lower conductive layer, the first intermediate pattern being formed of a material for the third upper conductive layer.

[0011] The diode connection portion includes a first lower pattern formed of a material for the third semiconductor layer and disposed on the other side of the third lower conductive layer; and a first separation pattern provided between the second semiconductor layer and the second upper conductive layer of the blocking diode and the third semiconductor layer and the third upper conductive layer of the diode connection portion, and disposed on one side of the first intermediate pattern, in an electrical connection portion with an adjacent blocking diode; and the first lower pattern, the second intermediate pattern, and the first separation pattern are arranged in the order of the first lower pattern, the second lower conductive layer of the blocking diode disposed on the other side, and the third lower conductive layer are separated from the second lower conductive layer of the blocking diode disposed on the other side with the first lower pattern interposed therebetween, and the first separation pattern may be formed as an empty space or formed of an insulating material.

[0012] The first to third upper conductive layers are formed of a light-transmitting material that can transmit light, and include a first metal layer formed on top of the first upper conductive layer and having higher electrical conductivity than the first upper conductive layer, and a blocking diode disposed at one end of the plurality of blocking diodes includes a second metal layer formed on the second upper conductive layer and having higher electrical conductivity than the second upper conductive layer, and the plurality of diode connections may include a third metal layer formed on the third upper conductive layer and having higher electrical conductivity than the third upper conductive layer.

[0013] The above second metal layer can be connected to a battery.

[0014] A battery separation pattern is provided between the second semiconductor layer and the second upper conductive layer of the blocking diode adjacent to the solar cell among the plurality of blocking diodes, and the first semiconductor layer and the first upper conductive layer of the solar cell; and the battery separation pattern may be formed as an empty space or formed of an insulating material.

[0015]

[0016] A thin film solar cell module according to an embodiment of the present invention comprises a plurality of solar cells, the plurality of solar cells being arranged in one direction, and a cell connecting portion arranged between neighboring solar cells among the plurality of solar cells, wherein the electrical connecting portion is connected to a first upper conductive layer of a solar cell arranged on one side of the cell connecting portion and may be arranged on the other side of the cell connecting portion.

[0017] Among the plurality of solar cells and the plurality of blocking diodes, in the adjacent solar cells and blocking diodes, a cell separation pattern is provided between the first semiconductor layer and the first upper conductive layer of the solar cells and the second semiconductor layer and the second lower conductive layer of the blocking diode, and the cell separation pattern may be formed as an empty space or formed of an insulating material.

[0018] The above-mentioned battery connecting portion may include: a fourth lower conductive layer connected to the first lower conductive layer of the solar cell disposed on the other side; a fourth semiconductor layer formed on top of the fourth lower conductive layer; a fourth upper conductive layer formed on top of the fourth semiconductor layer and connected to the first upper conductive layer of the solar cell disposed on the one side; and a second intermediate pattern formed to penetrate the fourth semiconductor layer so as to connect the fourth upper conductive layer and the fourth lower conductive layer, and formed of a material for the fourth upper conductive layer.

[0019] The above battery connection portion includes a second lower pattern formed of a material for the fourth semiconductor layer and disposed on one side of the fourth lower conductive layer; and a second separation pattern formed between the first semiconductor layer and the first upper conductive layer of the solar cell and the fourth semiconductor layer and the fourth upper conductive layer of the battery connection portion, and disposed on the other side of the second intermediate pattern, in a battery connection portion with an adjacent solar cell; and the second lower pattern, the second intermediate pattern, and the second separation pattern are arranged in this order from the side of the solar cell disposed on one side of the battery connection portion to the side of the solar cell disposed on the other side of the battery connection portion, and the second separation pattern may be formed of an empty space or may be formed of an insulating material.

[0020]

[0021] An embodiment of the present invention is a method for manufacturing a thin film solar cell module formed on a substrate, the thin film solar cell module including a solar cell, a plurality of blocking diodes each connected to the solar cell and capable of allowing current to flow in one direction, and a diode connector disposed between adjacent blocking diodes among the plurality of blocking diodes and connecting the adjacent blocking diodes, wherein the process of manufacturing the solar cell, the plurality of blocking diodes, and the diode connector may include a scribing etching process.

[0022] A method for manufacturing a thin-film solar cell module according to an embodiment of the present invention comprises the steps of: preparing a substrate; and setting the substrate into a first region and a second region excluding the first region based on one direction; and, in manufacturing the solar cell, the plurality of blocking diodes, and the diode connection, the plurality of blocking diodes and the diode connection may be formed in the first region, and the solar cell may be formed in the second region.

[0023] The process for manufacturing the solar cell, the plurality of blocking diodes, and the diode connector comprises: forming a lower conductive layer on the substrate; etching the lower conductive layer formed in the first region in the thickness direction using a scribing etching process to form a plurality of first lower grooves arranged in one direction in the first region; forming a semiconductor layer capable of converting received sunlight into photoelectric energy on the lower conductive layer, and filling the plurality of first lower grooves with a material for the semiconductor layer to form a plurality of first lower patterns; etching the semiconductor layer formed on one side of the first lower pattern in the thickness direction using a scribing etching process to form a plurality of first intermediate grooves arranged in the one direction in the first region; forming an upper conductive layer on the semiconductor layer, and filling the plurality of first intermediate grooves with a material for the upper conductive layer to form a plurality of first intermediate patterns; And it may include a process of forming a first separation pattern so as to penetrate in the thickness direction the upper conductive layer and semiconductor layer formed on one side of the plurality of first intermediate patterns, and forming a cell separation pattern so as to penetrate in the thickness direction the upper conductive layer and semiconductor layer formed on the other side of the first lower pattern that is arranged closest to the solar cell among the plurality of first lower patterns.

[0024] The process for manufacturing the solar cell, the plurality of blocking diodes, and the diode connector includes, before forming the first separation pattern and the battery separation pattern, forming a metal layer on the upper conductive layer formed in the first region, and forming a metal layer in a portion of the upper conductive layer formed in the second region, wherein, in forming the first separation pattern, the first separation pattern may be formed so as to penetrate the metal layer, the upper conductive layer, and the semiconductor layer formed on one side of the plurality of first middle patterns in the thickness direction, and, in forming the battery separation pattern, the battery separation pattern may be formed so as to penetrate the metal layer, the upper conductive layer, and the semiconductor layer formed on the other side of the first lower pattern that is arranged closest to the solar cell among the plurality of first lower patterns in the thickness direction.

[0025] A method for manufacturing a thin-film solar cell module according to an embodiment of the present invention may include a process of connecting the metal layer formed in the first region to a battery.

[0026] The process for manufacturing the above solar cell may include a process for manufacturing a plurality of the solar cells so as to be arranged in one direction, and the process for manufacturing a plurality of the solar cells may include a process for forming cell connectors connecting adjacent solar cells using a scribing etching process.

[0027] The process of forming a plurality of solar cells and cell connectors using the scribing etching process may include: a process of forming a plurality of second lower grooves arranged in the one direction in the second region by etching the lower conductive layer formed in the second region in the thickness direction using the scribing etching process; a process of forming a plurality of second lower patterns by filling the plurality of second lower grooves with a material for the semiconductor layer when forming the semiconductor layer and the first lower pattern; a process of forming a plurality of second intermediate grooves arranged in the one direction in the second region by etching the semiconductor layer formed on the other side of the second lower pattern in the thickness direction using the scribing etching process; a process of forming a plurality of second intermediate patterns by filling the plurality of second intermediate grooves with a material for the upper conductive layer when forming the upper conductive layer and the first intermediate pattern; and a process of forming a second separation pattern so as to penetrate the plurality of upper conductive layers and semiconductor layers formed on the other side of the plurality of second intermediate patterns in the thickness direction.

[0028] The process of forming the first and second separation patterns and the battery separation pattern may include a process of forming a space by etching the upper conductive layer and the semiconductor layer in the thickness direction using a scribing etching process.

[0029] The process of forming the first and second separation patterns and the battery separation pattern may include a process of filling the empty space with an insulating material.

[0030] According to embodiments of the present invention, a solar cell module can be equipped with a built-in blocking diode. Furthermore, a solar cell module including a blocking diode can be manufactured simply and at low cost. Furthermore, even when a large amount of current is stored in a battery when the solar cell is unable to generate current, the current stored in the battery can be prevented or suppressed from flowing backward to the solar cell.

[0031] FIG. 1 is a plan view conceptually illustrating a solar cell module according to an embodiment of the present invention.

[0032] Figure 2 is a front view illustrating a solar cell module according to an embodiment of the present invention.

[0033] FIG. 3 is a schematic diagram illustrating the flow of current in a solar cell module when sunlight is received by a solar cell module according to an embodiment of the present invention.

[0034] FIG. 4 is a schematic diagram illustrating the flow of current in a solar cell module when sunlight is not received by the solar cell module according to an embodiment of the present invention.

[0035] Figures 5 to 10 are process diagrams sequentially showing a method for manufacturing a solar cell module according to an embodiment of the present invention.

[0036] Hereinafter, embodiments of the present invention will be described in more detail with reference to the attached drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention. To illustrate the embodiments of the present invention, the drawings may be exaggerated, and like reference numerals in the drawings represent like components.

[0037] The present invention relates to a thin-film solar cell module and a method for manufacturing the same, and more particularly, to a thin-film solar cell module with a built-in blocking diode and a method for manufacturing the same. That is, the present invention relates to a thin-film solar cell module in which a solar cell and a blocking diode are formed integrally on a single substrate and a method for manufacturing the same. In other words, the present invention relates to a thin-film solar cell module manufactured by forming a blocking diode together or simultaneously during the process of forming a solar cell and a method for manufacturing the same. In addition, the present invention relates to a thin-film solar cell module that can be manufactured at a low cost and can effectively prevent reverse current flow and a method for manufacturing the same.

[0038] A thin-film solar cell module may be a component of an artificial satellite. That is, a thin-film solar cell module (or thin-film solar cell panel) capable of receiving sunlight and generating electricity is installed on the body of the artificial satellite. The thin-film solar cell module according to an embodiment of the present invention may be applied to the solar cell module of the artificial satellite described above. In addition, the artificial satellite may be a military satellite, for example, a reconnaissance satellite. As another example, the artificial satellite may be a military satellite that is an ultra-small cube satellite.

[0039]

[0040] FIG. 1 is a plan view conceptually illustrating a solar cell module according to an embodiment of the present invention.

[0041] Hereinafter, a thin film solar cell module according to an embodiment of the present invention will be described with reference to FIG. 1. At this time, the thin film solar cell module according to an embodiment of the present invention will be briefly referred to as a “solar cell module.” In addition, hereinafter, the right end of the substrate (10) in the first horizontal direction (X-axis direction) is defined as one end, and the left end is defined as the other end. In addition, one end of the substrate (10) with respect to a reference target is defined as one side, and the other end of the substrate (10) is defined as the other end.

[0042] Referring to FIG. 1, a solar cell module according to an embodiment of the present invention may include a substrate (10), a solar cell (SC) formed on the substrate (10), a plurality of blocking diodes (BD) disposed on one side of the solar cell (SC) and connected to the solar cell (SC), and a connection (hereinafter, diode connection (D-IC)) connected between two blocking diodes (BD) disposed adjacently. Among the plurality of blocking diodes (BD), the blocking diode (BD) located closest to one end of the substrate (10) is connected to the battery (20). In addition, the diode connection (D-IC) is connected to an upper conductive layer of a blocking diode (BD) disposed on the other side and a lower conductive layer of a blocking diode (BD) disposed on one side.

[0043] The solar cell (SC) and the blocking diode (BD) can be connected in series. In addition, the blocking diode (BD) and the diode connection (D-IC) can be connected in series, and the blocking diode (BD) and the diode connection (D-IC) arranged adjacent to each other can be connected in series.

[0044] In addition, the solar cell module may be equipped with a plurality of solar cells (SC). That is, the solar cell module may include a plurality of solar cells (SC). At this time, the plurality of solar cells (SC) may be connected in series with each other. In addition, when the solar cell module includes a plurality of solar cells (SC), the solar cell module may include a connection portion (hereinafter, “cell connection portion”) that is arranged between two adjacent solar cells (SC) and is connected to the lower conductive layer of the solar cells (SC). At this time, the solar cells (SC) and the cell connection portion (SC-IC) may be connected in series.

[0045] Among the plurality of solar cells (SC), the solar cell (SC) located closest to one end of the substrate (10) may be connected to the blocking diode (BD). That is, among the plurality of solar cells (SC), the solar cell (SC) located closest to one end of the substrate (10) and the blocking diode (BD) located closest to the other end of the substrate among the plurality of blocking diodes (BD) may be connected to each other.

[0046] Referring to FIG. 1, a plurality of solar cells (SC) may be arranged, for example, in a first horizontal direction (X-axis direction) and a second horizontal direction (Y-axis direction) intersecting or orthogonal to the first horizontal direction (Y-axis direction). In addition, a cell connector (SC-IC) is arranged between two solar cells (SC) that are arranged adjacently as described above. That is, the solar cells (SC) and the cell connector (SC-IC) may be arranged alternately and arranged in the first horizontal direction (X-axis direction) and the second horizontal direction (Y-axis direction). Here, the first horizontal direction (X-axis direction) may mean a column direction, and the second horizontal direction (Y-axis direction) may mean a row direction.

[0047] Hereinafter, for convenience of explanation, a plurality of solar cells (SC) and a plurality of cell connectors (SC-IC) arranged in a row in the second horizontal direction (Y-axis direction) in the first horizontal direction (X-axis direction) are referred to as one 'cell set (SC) sec ) is defined as '. Using this, to explain Fig. 1 again, the solar cell module is a plurality of cell sets (SC) arranged in the second direction (Y-axis direction). sec ) may be included. And multiple battery sets (SC sec ) can be connected to each of a plurality of blocking diodes (BD), and two blocking diodes (BD) arranged adjacently in the first horizontal direction (X-axis direction) can be connected by a diode connection part (D-IC).

[0048] Each battery set (SC sec) are connected to multiple blocking diodes (BD), each battery set (SC) sec ) and multiple blocking diodes (BD) can be connected in series, i.e., a set of single cells (SC sec ) can be connected in series with the blocking diode (BD) and the diode connection (D-IC), and two adjacent blocking diodes (BD) can be connected in series with the diode connection (D-IC).

[0049] In the above, the solar cell module is described as including solar cells (SC) and cell connectors (SC-IC) arranged in the first and second horizontal directions (X-axis direction and Y-axis direction). However, the present invention is not limited thereto, and the solar cell module may include a plurality of solar cells (SC) arranged in the first horizontal direction (X-axis direction) or the second horizontal direction (Y-axis direction) and a cell connector (SC-IC) arranged between two solar cells (SC) arranged adjacently. In this case, a plurality of cell sets (SC) arranged in the first horizontal direction (X-axis direction) or the second horizontal direction (Y-axis direction) sec ) can be connected to each of a plurality of blocking diodes (BD) and a plurality of diode connectors (D-IC).

[0050] Additionally, the solar cell module may include one solar cell (SC). That is, the solar cell module may include one solar cell (SC), a plurality of blocking diodes (BD) connected to the solar cell (SC), and diode connectors (D-IC) connected to the blocking diodes (BD) arranged adjacent to each other.

[0051]

[0052] Fig. 2 is a front view illustrating a solar cell module according to an embodiment of the present invention. That is, Fig. 2 is a drawing illustrating one of the plurality of cell sets illustrated in Fig. 1, a plurality of blocking diodes connected to the cell set, and a plurality of diode connectors.

[0053] Hereinafter, a solar cell module according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2. Here, a solar cell module comprising multiple solar cells will be described as an example. Furthermore, for convenience of explanation, one of the multiple cell sets illustrated in FIG. 1, as well as multiple blocking diodes and multiple diode connectors connected to the cell set, will be described.

[0054] Referring to FIG. 2, a solar cell module includes a substrate (10), a plurality of solar cells (SC: SC1, SC2, SC3) formed on the substrate (10) and arranged in one direction, a plurality of blocking diodes (BD: BD1, BD2, BD3) arranged on one side of a solar cell (SC) arranged closest to one end of the substrate (10) among the plurality of solar cells (SC: SC1, SC2, SC3), and a diode connection (D-IC: D-IC) connected between two blocking diodes arranged adjacently. 1, D-IC2), a plurality of cell connectors (SC-IC: SC-IC) arranged between two adjacently arranged solar cells (SC: SC1, SC2, SC3) 1, It may include SC-IC2).

[0055] In addition, the solar cell module has a separation pattern (hereinafter referred to as a cell separation pattern (P), which is an empty space arranged between solar cells (SC: SC1, SC2, SC3) and blocking diodes (BD: BD1, BD2, BD3). cell )) may be included.

[0056] The substrate (100) may be, for example, a polyimide (PI) film. Of course, the substrate (100) is not limited to the above-described examples, and various substrates may be applied. For example, the substrate may be at least one of glass, ultra-thin glass (UTG), and space coverglass. Of course, the substrate is not limited to these, and various insulating materials may be used.

[0057] A plurality of solar cells (SC: SC1, SC2, SC3) can be arranged in the first and second horizontal directions (X-axis and Y-axis directions) as shown in FIGS. 1 and 2, for example. Hereinafter, a plurality of cell sets (SC) as described above will be described. sec ) of any one of the battery sets (SC) sec ), the above battery set (SC sec ) connected to a plurality of blocking diodes (BD: BD1, BD2, BD3), diode junction (D-IC: D-IC 1, Explains D-IC2).

[0058] And, multiple battery sets (SC sec ) each includes three solar cells (SC1, SC2, SC3) and two cell connectors (SC-IC). In this case, three solar cells (SC-IC: SC-IC 1, For the SC-IC2), the first solar cell (SC1), the second solar cell (SC2), and the third solar cell (SC3) are named from the other end of the substrate (10) to one end, and the two cell connecting parts (SC-IC: SC-IC 1,For the SC-IC2), the first cell connector (SC-IC1) and the second cell connector (SC-IC2) are named. That is, for the three solar cells (SC), they are named in order from the solar cell furthest from the blocking diode as the first solar cell (SC1), the second solar cell (SC2), and the third solar cell (SC3). In addition, the two cell connectors (SC-IC 1, For SC-IC2), the battery connections (SC-IC) furthest from the blocking diode are named in order as the first battery connection (SC-IC1) and the second battery connection (SC-IC2).

[0059] However, multiple battery sets (SC sec ) each containing three solar cells (SC1, SC2, SC3) is only an example, and multiple sets of cells (SC set ) each may include more than three solar cells or less than three solar cells. In addition, since the cell connectors are arranged between adjacently arranged solar cells, the number of cell connectors may vary depending on the number of solar cells.

[0060] The first to third solar cells (SC1, SC2, SC3) generate current through photoelectric conversion when sunlight is received. Each of these first to third solar cells (SC1, SC2, SC3) may include a first lower conductive layer (210a) formed on a substrate (10), a first semiconductor layer (220a) formed on the first lower conductive layer (210a), and a first upper conductive layer (230a) formed on the first semiconductor layer (220a).

[0061] Here, the first semiconductor layer (220a) may be named as any one of a solar cell layer, a photoelectric conversion layer, or a light absorption layer.

[0062] A first metal layer (M1) may be formed on the upper conductive layer of any one of the first to third solar cells (SC1, SC2, SC3). For example, as illustrated in FIG. 1, the first metal layer (M1) may be formed on the upper first upper conductive layer (230a) of the first solar cell (SC1). At this time, the first metal layer (M1) may be formed on a portion of the first upper conductive layer (230a). That is, the first metal layer (M1) may be formed so as to expose a portion of the first upper conductive layer (230a). The first metal layer (M1) may be formed of a metal material having higher electrical conductivity than the first upper conductive layer (230a) and lower light transmittance than the first upper conductive layer (230a). In addition, the first metal layer (M1) may be connected to a battery.

[0063] Battery connector (SC-IC) 1, SC-IC2) can be placed between two adjacently arranged solar cells, i.e., the cell connector (SC-IC 1, SC-IC2) can connect two solar cells arranged adjacently in series. To explain with a more specific example, the first cell connector (SC-IC1) can be arranged between the first solar cell (SC1) and the second solar cell (SC2), and the second cell connector (SC-IC2) can be arranged between the second solar cell (SC2) and the third solar cell (SC3).

[0064] 1st and 2nd battery connector (SC-IC) 1, Each SC-IC2) comprises a lower conductive layer (210d) formed on a substrate (10), a semiconductor layer (220d) formed on the lower conductive layer (210d), an upper conductive layer (230d) formed on the semiconductor layer (220d), and a lower pattern (P) arranged on one side of the lower conductive layer (210d). b2 ), the semiconductor layer (220d) is formed by penetrating the thickness direction and the intermediate pattern (P) is formed of a material for the upper conductive layer (230d). c2 ), a separation pattern (P), which is a hollow space formed to penetrate the upper conductive layer (230d) and the semiconductor layer (220d) in the thickness direction.d2 ) may be included.

[0065] 1st and 2nd battery connector (SC-IC) 1, The specific configuration of SC-IC2 is described below, including blocking diodes (BD: BD1, BD2, BD3) and diode connections (D-IC: D-IC). 1, After explaining D-IC2), I will explain it again.

[0066] If no power generation occurs from the solar cell or the voltage output is low, discharge may occur from the battery (20). That is, a reverse current flow phenomenon (discharge) from the battery (20) to the solar cell may occur.

[0067] Blocking diodes (BD: BD1, BD2, BD3) prevent or suppress the current of the battery from discharging to the solar cells (SC1, SC2, SC3). A solar cell module may include multiple blocking diodes (BD: BD1, BD2, BD3) and multiple sets of cells (SC sec ) each can be connected to multiple blocking diodes (BD: BD1, BD2, BD3).

[0068] For example, three blocking diodes (BD1, BD2, BD3) can be connected to a solar cell set as shown in FIGS. 1 and 2. Hereinafter, the three blocking diodes (BD1, BD2, BD3) are named as a first blocking diode (BD1), a second blocking diode (BD2), and a third blocking diode (BD3) from the other end of the substrate (10) to one end. That is, the three blocking diodes (BD) are named as a first blocking diode (BD1), a second blocking diode (BD2), and a third blocking diode (BD3) in order from the blocking diode closest to the solar cell.

[0069] Each of the first to third blocking diodes (BD1 to BD3) may include a second lower conductive layer (210b) formed on a substrate (10), a second semiconductor layer (220b) formed on the second lower conductive layer (210b), and a second upper conductive layer (230b) formed on the second semiconductor layer (220b). In addition, each of the first to third blocking diodes (BD1 to BD3) may further include a second metal layer (M2) formed on the third upper conductive layer (230c).

[0070] Among the first to third blocking diodes (BD1 to BD3), the first blocking diode (BD1) positioned closest to the solar cell can be connected to the first lower conductive layer (210a) of the solar cell. That is, the first lower conductive layer (210a) of the third solar cell (SC3) positioned at one end among the first to third solar cells (SC1 to SC3) and the second lower conductive layer (210b) of the first blocking diode (BD1) positioned at the other end among the first to third blocking diodes (BD1 to BD3) can be connected.

[0071] And, between the adjacently arranged solar cells and blocking diodes, a cell separation pattern (P cell ) can be provided. That is, a cell separation pattern (P) is provided between the third solar cell (SC3) and the first blocking diode (BD1). cell ) can be provided.

[0072] Battery separation pattern (P cell ) is a kind of empty space or groove, and may refer to an empty space provided between the third solar cell (SC3) and the first blocking diode (BD1). More specifically, an empty space is provided between the first semiconductor layer (220a) and the first upper conductive layer (230a) of the third solar cell (SC3) and the second semiconductor layer (220b), the second upper conductive layer (230b), and the second metal layer (M2) of the first blocking diode (BD1), and this empty space is referred to as a cell separation pattern (P cell) is defined as. In other words, the battery separation pattern (P cell ) may refer to the upper region of the first and second lower conductive layers (210a, 210b) between the third solar cell (SC3) and the first blocking diode (BD1). In other words, the cell separation pattern (P cell ) may include a lower conductive layer (hereinafter, a connecting conductive layer) connecting the first lower conductive layer (210a) and the second lower conductive layer (210b) and an empty space on the upper side of the connecting conductive layer. The battery separation pattern (P cell ) can be manufactured by a method of scribing the upper conductive layer and semiconductor layer in the thickness direction during the manufacture of a solar cell module.

[0073] The battery separation pattern (P) as described above cell ) are connected to the first lower conductive layer (210a) of the third solar cell (SC3) and the second lower conductive layer (210b) of the first blocking diode (BD1), and the first semiconductor layer (220a) and the first upper conductive layer (230a) of the third solar cell (SC3) and the second semiconductor layer (220b) and the second upper conductive layer (230b) of the first blocking diode (BD1) can be spaced apart or separated.

[0074] Among the plurality of first to third blocking diodes (BD1 to BD3), the third blocking diode (BD3) positioned furthest from the solar cell can be connected to the battery (20). In other words, the third blocking diode (BD3) positioned at one end of the first to third blocking diodes (BD1 to BD3) can be connected to the battery (20).

[0075] The diode connections (D-IC1, D-IC2) can be arranged between two adjacent blocking diodes (BD1, BD2). That is, the diode connections (D-IC1, D-IC2) connect two adjacent blocking diodes (BD1, BD2). That is, the first diode connection (D-IC1) is arranged between the first blocking diode (BD1) and the second blocking diode (BD2), and the second diode connection (D-IC2) is arranged between the second blocking diode (BD2) and the third blocking diode (BD3).

[0076] Each of the first to third diode connections (D-IC1 to D-IC3) is formed on a third lower conductive layer (210c) formed on a substrate (10), a third semiconductor layer (220c) formed on the third lower conductive layer (210c), a third upper conductive layer (230c) formed on the third semiconductor layer (220c), and a first lower pattern (P) formed on the other side of the third lower conductive layer (210c) and made of a material for the third semiconductor layer (220c). b1 ), a first intermediate pattern (P) formed by penetrating the third semiconductor layer (220c) in the thickness direction and formed of a material for the third upper conductive layer (230c) c1 ), the first separation pattern (P), which is an empty space formed to penetrate the third upper conductive layer (230c) and the third semiconductor layer (220c) in the thickness direction d1 ) may be included.

[0077] First sub-pattern (P b1 ) is placed on the other side of the third lower conductive layer (210c). Accordingly, the diode connection (D-IC) 1, The first sub-pattern (P) of D-IC2 b1 ) is the diode connection (D-IC) 1, D-IC2) is placed between the second lower conductive layer (210b) of the blocking diodes (BD1, BD2, BD3) placed adjacent to each other. Accordingly, the diode connection portion (D-IC) placed adjacent to each other 1, The lower conductive layers of the D-IC2) and blocking diodes (BD1, BD2, BD3) are formed on the first lower pattern (Pb1 ) are separated or spaced apart. In other words, adjacently arranged diode connections (D-IC 1, The third lower conductive layer (210c) of the D-IC2 and the second lower conductive layer (210b) of the blocking diodes (BD1, BD2, BD3) are formed by the first lower pattern (P b1 ) can be separated by.

[0078] First intermediate pattern (P c1 ) is formed to penetrate the third semiconductor layer (220c) in the thickness direction (Z-axis direction) as described above. Accordingly, the third semiconductor layer (220c) is formed as the first intermediate pattern (P c1 ) and the first intermediate pattern (P c1 ) can be divided into the other side area.

[0079] First separation pattern (P d1 ) is a kind of empty space or home, and the first intermediate pattern (P c1 ) can be arranged on one side. More specifically, an empty space is provided between the adjacently arranged diode connections (D-IC1, D-IC2) and the blocking diodes (BD1, BD2), and this empty space is called the first separation pattern (P d1 ) is defined as. In other words, the first separation pattern (P d1 ) may refer to the upper region of the second and third lower conductive layers (210b, 210c) between the adjacently arranged diode connections (D-IC1, D-IC2) and the blocking diodes (BD1, BD2). In other words, the first separation pattern (P d1 ) may include a lower conductive layer (hereinafter, a connecting conductive layer) connecting the second lower conductive layer (210b) and the third lower conductive layer (210c) and an empty space on the upper side of the connecting conductive layer. The first separation pattern (P d1 ) can be manufactured by a method of scribing the upper conductive layer and semiconductor layer in the thickness direction during the manufacture of a solar cell module.

[0080] The first separation pattern (P) as described aboved1 ) are connected to the third lower conductive layer (210c) of the diode connection portion (D-IC1, D-IC2) and the second lower conductive layer (210b) of the blocking diode (BD1, BD2), and the third semiconductor layer (220c) and the third upper conductive layer (230c) of the diode connection portion (D-IC1, D-IC2) and the second semiconductor layer (220b) and the second upper conductive layer (230b) of the blocking diode (BD1, BD2) can be spaced apart or separated.

[0081] First sub-pattern (P b1 ), first intermediate pattern (P c1 ) and the first separation pattern (P d1 ) are listed in the first horizontal direction (X-axis direction). At this time, the first lower pattern (P b1 ), first intermediate pattern (P c1 ) and the first separation pattern (P d1 ) has a different position in the first horizontal direction (X-axis direction), and the first lower pattern (P b1 ) on one side of the first intermediate pattern (P c1 ) is placed, and the first intermediate pattern (P c1 ) on one side of the first separation pattern (P d1 ) can be arranged. In other words, the first lower pattern (P) can be arranged from the other end of the substrate (10) to one end. b1 ), first intermediate pattern (P c1 ) and the first separation pattern (P d1 ) are listed in order.

[0082] This first sub-pattern (P b1 ), first intermediate pattern (P c1 ) and the first separation pattern (P d1), the diode connections (D-IC1, D-IC2) are connected to the second upper conductive layer (230b) of the blocking diode (BD1, BD2) arranged on the other side and connected to the second lower conductive layer (210b) of the blocking diode (BD1, BD2) arranged on one side. In addition, the diode connections (D-IC1, D-IC2) may be spaced apart from and not connected to the second lower conductive layer (210b) of the blocking diode (BD1, BD2) arranged on the other side, and may be spaced apart from and not connected to the second upper conductive layer (230b) of the blocking diode (BD1, BD2) arranged on one side.

[0083] To explain more specifically, the first diode connection (D-IC1) placed between the first blocking diode (BD1) and the second blocking diode (BD2) will be described as an example. The third lower conductive layer (210c) of the first diode connection (D-IC1) is connected to the first lower pattern (P b1 ) and the third upper conductive layer (230c), and the third upper conductive layer (230c) is connected to the second upper conductive layer (230b) of the first blocking diode (BD1). In addition, the third lower conductive layer (210c) of the first diode connection portion (D-IC1) is connected to the second lower conductive layer (210b) of the second blocking diode (BD2). In addition, the third lower conductive layer (210c) of the first diode connection portion (D-IC1) and the second lower conductive layer (210b) of the first blocking diode (BD1) are connected to the first lower pattern (P b1 ) are separated or spaced by the first separation pattern (P). In addition, the third upper conductive layer (230c) of the first diode connection (D-IC1) and the second upper conductive layer (230b) of the second blocking diode (BD2) are separated or spaced by the first separation pattern (P d1 ) are separated or spaced apart.

[0084] The connection relationship between the second diode connection (D-IC2) placed between the second blocking diode (BD2) and the third blocking diode (BD3) may be the same as the connection relationship between the first and second blocking diodes (BD1, BD2) and the first diode connection (D-IC1) described above.

[0085] Each of the first and second diode connections (D-IC1, D-IC2) may further include a third metal layer (M3) formed on the third upper conductive layer (230c). In this case, the first separation pattern (P d1 ) is a diode connection part of a blocking diode arranged adjacently, and a first separation pattern (P) is formed between the second semiconductor layer (220b), the second upper conductive layer (230b) and the second metal layer (M2) and the third semiconductor layer (220c), the third upper conductive layer (230c) and the third metal layer (M3) of the diode connection part (D-IC1, D-IC2). d1 ) can be formed.

[0086] Battery connector (SC-IC) 1, SC-IC2) can be placed between two adjacently arranged solar cells, i.e., the cell connector (SC-IC 1, SC-IC2) can connect two solar cells arranged adjacently in series. To explain with a more specific example, the first cell connector (SC-IC1) can be arranged between the first solar cell (SC1) and the second solar cell (SC2), and the second cell connector (SC-IC2) can be arranged between the second solar cell (SC2) and the third solar cell (SC3).

[0087] 1st and 2nd battery connector (SC-IC) 1, Each SC-IC2) comprises a fourth lower conductive layer (210d) formed on a substrate (10), a fourth semiconductor layer (220d) formed on the fourth lower conductive layer (210d), a fourth upper conductive layer (230d) formed on the fourth semiconductor layer (220d), and a second lower pattern (P) arranged on one side of the fourth lower conductive layer (210d). b2), a second intermediate pattern (P) formed by penetrating the fourth semiconductor layer (220d) in the thickness direction and formed of a material for the fourth upper conductive layer (230d) c2 ), a second separation pattern (P), which is an empty space formed to penetrate the fourth upper conductive layer (230d) and the fourth semiconductor layer (220d) in the thickness direction d2 ) may be included.

[0088] Second sub-pattern (P b2 ) is placed on one side of the fourth lower conductive layer (210d). In other words, the second lower pattern (P b2 ) is disposed between the fourth lower conductive layer (210d) of the battery connection portion (SC-IC1, SC-IC2) and the first lower conductive layer (210a) disposed on one side of the battery connection portion (SC-IC1, SC-IC2). Accordingly, the fourth lower conductive layer (210d) of the battery connection portion (SC-IC1, SC-IC2) and the first lower conductive layer (210a) of the solar cells (SC1 to SC3) disposed on one side of the battery connection portion (SC-IC) are disposed on the second lower pattern (P b2 ) can be separated or spaced apart.

[0089] Second intermediate pattern (P c2 ) is formed to penetrate the third semiconductor layer (220d) in the thickness direction (Z-axis direction) as described above. Accordingly, the third semiconductor layer (220d) is formed as a second intermediate pattern (P c2 ) and the second intermediate pattern (P c2 ) can be divided into the other side area.

[0090] Second separation pattern (P d2 ) is a kind of empty space or home, and the second intermediate pattern (P c2 ) can be arranged on the other side. More specifically, an empty space is provided between the adjacently arranged solar cells (SC1 to SC3) and the cell connectors (SC-IC1, SC-IC2), and this empty space is called a second separation pattern (P d2 ) is defined. At this time, the second separation pattern (P d2) may refer to the upper region of the first and fourth lower conductive layers (210a to 210d) between the adjacently arranged solar cells (SC1 to SC3) and the cell connectors (SC-IC1, SC-IC2). In other words, the second separation pattern (P d2 ) may include a lower conductive layer (hereinafter, a connecting conductive layer) connecting the first lower conductive layer (210a) and the fourth lower conductive layer (210d) and an empty space on the upper side of the connecting conductive layer. The second separation pattern (P d2 ) can be manufactured by a method of scribing the upper conductive layer and semiconductor layer in the thickness direction during the manufacture of a solar cell module.

[0091] The second separation pattern (P) as described above d2 ) are connected to the first lower conductive layer (210a) of the solar cells (SC1 to SC3) arranged adjacent to each other and the fourth lower conductive layer (210d) of the cell connection portion (SC-IC1, SC-IC2), and the first semiconductor layer (220a) and the first upper conductive layer (230a) of the solar cells (SC1 to SC3) and the fourth semiconductor layer (220d) and the fourth upper conductive layer (230d) of the cell connection portion (SC-IC) can be spaced apart or separated.

[0092] Second sub-pattern (P b2 ), second intermediate pattern (P c2 ) and the second separation pattern (P d2 ) are listed in the first horizontal direction (X-axis direction). At this time, the second lower pattern (P b2 ), second intermediate pattern (P c2 ) and the second separation pattern (P d2 ) has a different position in the first horizontal direction (X-axis direction), and the second lower pattern (P b2 ) on the other side of the second intermediate pattern (P c2 ) is placed, and the second intermediate pattern (P c2 ) on the other side of the second separation pattern (P d2 ) can be arranged. In other words, the second lower pattern (P) can be arranged from one end of the substrate (10) to the other end. b2), second intermediate pattern (P c2 ) and the second separation pattern (P d2 ) are listed in order.

[0093] This second sub-pattern (P b2 ), second intermediate pattern (P c2 ) and the second separation pattern (P d2 ), the battery connecting portions (SC-IC1, SC-IC2) are connected to the first upper conductive layer (230a) of the solar cells (SC1 to SC3) arranged on one side and connected to the first lower conductive layer (210a) of the solar cells (SC1 to SC3) arranged on the other side. In addition, the battery connecting portions (SC-IC1, SC-IC2) may be spaced apart from and not connected to the first upper conductive layer (230a) of the solar cells (SC1 to SC3) arranged on the other side, and may be spaced apart from and not connected to the first lower conductive layer (210a) of the solar cells (SC1 to SC3) arranged on one side.

[0094] To explain more specifically, the first cell connector (SC-IC1) arranged between the first solar cell (SC1) and the second solar cell (SC2) will be described as an example. The fourth lower conductive layer (210d) of the first cell connector (SC-IC1) is connected to the second lower pattern (P b2 ) and the fourth upper conductive layer (230d), and the fourth upper conductive layer (230d) is connected to the first upper conductive layer (230a) of the second solar cell (SC2). In addition, the fourth lower conductive layer (210d) of the first cell connecting portion (SC-IC1) is connected to the first lower conductive layer (210a) of the first solar cell (SC1). In addition, the fourth lower conductive layer (210d) of the first cell connecting portion (SC-IC1) and the first lower conductive layer (210a) of the second solar cell (SC2) are connected to the second lower pattern (P b2 ) are separated or spaced apart. In addition, the fourth upper conductive layer (230d) of the first cell connection portion (SC-IC1) and the first upper conductive layer (230a) of the first solar cell (SC1) are separated or spaced apart by the second separation pattern (P d2 ) are separated or spaced apart.

[0095] The connection relationship between the second cell connector (SC-IC2) positioned between the second solar cell (SC2) and the third solar cell (SC3) may be the same as the connection relationship between the first and second solar cells (SC1, SC2) and the first cell connector (SC-IC1) described above.

[0096] As explained above, in the diode connection (D-IC), the first lower pattern (P) is formed from the other end of the substrate (10) to one end. b1 ), first intermediate pattern (P c1 ) and the first separation pattern (P d1 ) are listed in order. And, in the battery connection part, the second lower pattern (P) is placed from one end of the substrate (10) to the other end. b2 ), second intermediate pattern (P c2 ) and the second separation pattern (P d2 ) are listed in order. That is, the second lower pattern (P) of the battery connection part (SC-IC1, SC-IC2) b2 ), second intermediate pattern (P c2 ) and the second separation pattern (P d2 ) The first sub-pattern (P) of the diode connection (D-IC1, D-IC2) and the direction listed in order b1 ), first intermediate pattern (P c1 ) and the first separation pattern (P d1 ) The directions listed in order are opposite.

[0097] Each of a plurality of solar cells (SC1 to SC3), a plurality of blocking diodes (BD1, BD2), a plurality of diode connections (D-IC1, D-IC2) and a plurality of battery connections (SC-IC1, SC-IC2) includes a lower conductive layer (210a to 210d), a semiconductor layer (220a to 220d) and an upper conductive layer (230a to 230d). In addition, each of the diode connections (D-IC1, D-IC2) and the battery connections (SC-IC) includes a lower pattern (P b1 ) is formed of a material for a semiconductor layer (220a to 220d), and an intermediate pattern (P c1) is formed of a material for the upper conductive layer (230a to 230d).

[0098] The first to fourth lower conductive layers (210a to 210d) may be formed of a material having electrical conductivity, and may be formed of the same material. For example, the first to fourth lower conductive layers (210a to 210d) may be formed of a metal, and may be formed of molybdenum (Mo), for example. Of course, the first to fourth lower conductive layers (210a to 210d) may be formed of various materials having conductivity. For example, the first to fourth lower conductive layers (210a to 210d) may be formed of a material having light transmittance and electrical conductivity. That is, the first to fourth lower conductive layers (210a to 210d) may be formed of a TCO (Transparent Conductive Oxide), and may be formed of, for example, at least one of ITO (Indium Tin Oxide) and IZO (Indium Zinc Oxide).

[0099] The first to fourth lower conductive layers (210a to 210d) can be formed using at least one of, for example, a sputtering deposition method, a thermal evaporation method, a chemical vapor deposition (CVD) method, an atomic layer deposition (ALD) method, a coating method, a printing method, and an inkjet method. In addition, the coating method can use, for example, a slot-die coating method. Of course, the first to fourth lower conductive layers (210a to 210d) are not limited to the above-described examples, and can be formed using various methods.

[0100] The first to fourth semiconductor layers (220a to 220d) are layers that can absorb sunlight and convert it into electricity, and may have a structure in which multiple layers are stacked. That is, the first to third semiconductor layers (220d) may include a p-type semiconductor layer and an n-type semiconductor layer, and may have a structure in which the p-type semiconductor layer and the n-type semiconductor layer are stacked. At this time, the p-type semiconductor layer may be an upper layer and the n-type semiconductor layer may be a lower layer, or the p-type semiconductor layer may be a lower layer and the n-type semiconductor layer may be an upper layer. As another example, the first to fourth semiconductor layers (220a to 220d) may have a structure in which an i-type semiconductor layer is inserted between a p-type semiconductor layer and an n-type semiconductor layer. At this time, the first to third semiconductor layers (220d) may have a P-di-N stacked structure in which the p-type semiconductor layer is an upper layer and the n-type semiconductor layer is a lower layer, or a NiP stacked structure in which the n-type semiconductor layer is an upper layer and the p-type semiconductor layer is a lower layer.

[0101] The first to fourth semiconductor layers (220a to 220d) may be formed of a CIGS compound, which is a compound containing copper (Cu), indium (In), gallium (Ga), and cerium (Se). The first to fourth semiconductor layers (220a to 220d) are not limited to being formed of a CIGS compound as described above, and may be formed, for example, of a semiconductor layer having a perovskite structure. The first to fourth semiconductor layers (220a to 220d) may be formed using at least one method selected from the group consisting of a thermal evaporation method, a chemical vapor deposition (CVD), an atomic layer deposition (ALD) method, a sputtering deposition method, a coating method, a printing method, and an inkjet method. In addition, a slot-die coating method, for example, may be used as the coating method. Of course, the first to fourth semiconductor layers (220a to 220d) are not limited to the examples described above, and can be formed using various methods. The first to fourth semiconductor layers (220a to 220d) can be formed with the same structure and materials.

[0102] As described above, the first semiconductor layer (220a) of the solar cell (SC: SC1 to SC3) may be named as any one of a solar cell layer, a photoelectric conversion layer, or a light absorption layer.

[0103] And, as described above, the second semiconductor layer (220b) of the blocking diode (BD: BD1 to BD3), the third semiconductor layer (220c) of the diode connection portion (D-IC: DIC1 to D-IC3), and the fourth semiconductor layer (22Od) of the cell connection portion (SC-IC: SC-IC1 to SC-IC3) are formed of the same material as the first semiconductor layer (220a) of the solar cell (SC: SC1 to SC3). Accordingly, the second semiconductor layer (220b) of the blocking diode (BD: BD1 to BD3), the third semiconductor layer (220c) of the diode connection portion (D-IC: DIC1 to D-IC3), and the fourth semiconductor layer (22Od) of the battery connection portion (SC-IC: SC-IC1 to SC-IC3) may each be named as any one of a solar cell layer, a photovoltaic layer, and a light absorption layer. However, the second semiconductor layer (220b) of the blocking diode (BD: BD1 to BD3), the third semiconductor layer (220c) of the diode connection portion (D-IC: DIC1 to D-IC3), and the fourth semiconductor layer (22Od) of the battery connection portion (SC-IC: SC-IC1 to SC-IC3) may be layers that do not function as solar cells due to reasons such as blocking sunlight or an electrical short circuit.

[0104] The first to fourth upper conductive layers (230a to 230d) may be formed of a material that is transparent to sunlight and has electrical conductivity. In addition, the first to fourth upper conductive layers (230a to 230d) may be formed of the same material. For example, the first to fourth upper conductive layers (230a to 230d) may be formed by depositing either ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). Of course, the first to fourth upper conductive layers (230a to 230d) are not limited to the above-described examples and may be formed of various materials that are transparent to sunlight and have electrical conductivity. The first to fourth upper conductive layers (230a to 230d) can be formed using at least one of, for example, a sputtering deposition method, a thermal evaporation method, a chemical vapor deposition (CVD) method, an atomic layer deposition (ALD) method, a coating method, a printing method, and an inkjet method. In addition, the coating method can use, for example, a slot-die coating method. Of course, the first to third lower conductive layers (210a, 210b, 210c) are not limited to the above-described examples, and can be formed using various methods.

[0105]

[0106] FIG. 3 is a schematic diagram illustrating the flow of current in a solar cell module when sunlight is received by the solar cell module according to an embodiment of the present invention. FIG. 4 is a schematic diagram illustrating the flow of current in a solar cell module when sunlight is not received by the solar cell module according to an embodiment of the present invention.

[0107] In Figures 3 and 4, arrows (→, ←, ↑, ↓, etc.) indicate a current flow situation, and the direction of the arrow indicates the direction in which the current flows. In addition, in Figure 4, 'X' indicates that the movement of current is blocked.

[0108] A solar cell module according to an embodiment of the present invention includes a plurality of solar cells (SC1 to SC3), and two adjacently arranged solar cells (SC1 to SC3) are connected in series by cell connectors (SC-IC1, SC-IC2). At this time, the cell connectors (SC-IC1, SC-IC2) are connected from one end of a substrate (10) to the other end of a second lower pattern (P b2 ), second intermediate pattern (P c2 ) and the second separation pattern (P d2 ) are listed in order. Accordingly, the fourth lower conductive layer (210d) and the fourth upper conductive layer (230d) of the adjacently arranged battery connection parts (SC-IC1, SC-IC2) and the first lower conductive layer (210a) of the solar cell can be connected, and the first upper conductive layer (230a) and the fourth upper conductive layer (230d) can be separated. In addition, a plurality of blocking diodes (BD1, BD2) are connected to the solar cells (SC1 to SC3), and diode connection parts (D-IC1, D-IC2) are arranged between the adjacently arranged blocking diodes (BD1, BD2). At this time, the diode connection parts (D-IC1, D-IC2) are arranged from the other end of the substrate (10) to one end of the first lower pattern (P b1 ), first intermediate pattern (P c1 ) and the first separation pattern (P d1 ) are listed in order. Accordingly, the third lower conductive layer (210c) and the third upper conductive layer (230c) of the adjacently arranged diode connections (D-IC1, D-IC2) and the second upper conductive layer (230b) of the blocking diode (BD1, BD2) can be connected, and the third lower conductive layer (210c) of the diode connections (D-IC1, D-IC2) and the second lower conductive layer (210b) of the blocking diode (BD) can be separated or spaced apart.

[0109] Accordingly, when sunlight is received by the solar cell module, the current generated by each solar cell (SC1 to SC3) can be transmitted to the blocking diode (BD1, BD2) through the cell connector (SC-IC1, SC-IC2), and can be transmitted to the battery (20) through the blocking diode (BD1, BD2) and the diode connector (D-IC1, D-IC2). In addition, conversely, when sunlight is not received by the solar cell module and current cannot be generated, the current stored in the battery (20) can be prevented or suppressed from moving to the solar cells (SC1 to SC3).

[0110]

[0111] Hereinafter, the operation of a solar cell module according to an embodiment of the present invention will be described with reference to FIGS. 2 to 4.

[0112] First, referring to FIGS. 2 and 3, when sunlight is incident on a solar cell module, a description will be given. When sunlight is received by the first to third solar cells (SC1 to SC3) of the solar cell module, light is generated in the first to third solar cells (SC1 to SC3). At this time, the plurality of blocking diodes (BD1, BD2) and the plurality of diode connections (D-IC1, D-IC2) are shielded by the second and third metal layers (M2, M3). The current generated in the first to third solar cells (SC1 to SC3) flows in the direction in which the plurality of blocking diodes (BD1, BD2) are arranged. More specifically, the current generated in the first solar cell (SC1) flows through the first lower conductive layer (210a) of the first solar cell (SC1), the fourth lower conductive layer (210d) of the first cell connection (SC-IC1), and the second intermediate pattern (P). c2), the fourth upper conductive layer (230d) and moves to the first upper conductive layer (230a) of the second solar cell (SC2). Thereafter, the current moves to the fourth lower conductive layer (210d) and the second intermediate pattern (P) of the second cell connection (SC-IC2) through the first semiconductor layer (220a) and the first lower conductive layer (210a) of the second solar cell (SC2). c2 ), and moves to the first upper conductive layer (230a) of the third solar cell (SC3) through the fourth upper conductive layer (230d). Next, the current moves to the battery (20) through the first semiconductor layer (220a) and the first upper conductive layer (230a) and the second metal layer (M2) of the third solar cell (SC3). Accordingly, the current is stored in the battery (20).

[0113] Next, referring to FIGS. 2 and 4, we will describe a case where sunlight does not enter the solar cell module. If the satellite or solar cell module is positioned opposite the sun and cannot receive sunlight, photoelectric conversion does not occur in the plurality of solar cells (SC1 to SC3). Consequently, no current is generated in the plurality of solar cells (SC1 to SC3).

[0114] In this case, a discharge may occur in which the current stored in the battery (20) flows toward the solar cell. However, in the embodiment, the reverse current can be prevented or suppressed by connecting blocking diodes (BD1, BD2) to the solar cells (SC1 to SC3). By connecting a plurality of blocking diodes (BD1, BD2) to the solar cells (SC1 to SC3), even if the current stored in the battery (20) is large, the current of the battery (20) can be prevented or suppressed from flowing to the solar cell (SC).

[0115] To explain this in more detail, the current flowing from the battery (20) can move to the second metal layer (M2) and the second upper conductive layer (230b) of the third blocking diode (BD3) located at one end of the substrate (10). However, the current that has moved to the second upper conductive layer (230b) cannot move to the second semiconductor layer (220b) of the third blocking diode (BD3), or the movement can be suppressed. Accordingly, the reverse current phenomenon (discharge) in which the current of the battery (20) flows to the solar cell can be prevented or suppressed.

[0116] If the current stored in the battery (20) is large while the solar cells (SC1 to SC3) cannot generate current, the current may move to the second diode connection (D-IC2) through the second semiconductor layer (220b) of the third blocking diode (BD3). However, even if the current moves to the second diode connection (D-IC2) through the second semiconductor layer (220b) of the third blocking diode (BD3), the current may not move to the second semiconductor layer (220b) of the second blocking diode (BD2), or the movement may be suppressed. In addition, even if some current moves to the first diode connection (D-IC1) through the second semiconductor layer (220b) of the second blocking diode (BD2), the current cannot move to the second semiconductor layer (220b) of the first blocking diode (BD1), or the movement is suppressed.

[0117] In this way, even if a large amount or large current is stored in the battery (20) and the plurality of solar cells (SC1 to SC3) cannot generate current, the movement of current is blocked or suppressed by the plurality of blocking diodes connected by the diode connection. Therefore, even if a large amount or large current is stored in the battery (20), the reverse current in which the current of the battery flows to the solar cells can be effectively prevented or suppressed.

[0118] In the above, the first and second separation patterns (Pd1 , P d2 ), battery separation pattern (P cell ) is formed as an empty space. That is, the first and second separation patterns (P d1 , P d2 ), battery separation pattern (P cell ) is an example of an empty space that is not filled with a separate material or filled with air. However, the first and second separation patterns (P d1 , P d2 ), battery separation pattern (P cell ) can be formed of an insulating material. That is, the first and second separation patterns (P d1 , P d2 ), battery separation pattern (P cell ) can also be formed by filling, depositing, or applying an insulating material into the empty space as described above. The first and second separation patterns (P d1 , P d2 ) is not particularly limited, and various materials having insulating properties can be used.

[0119]

[0120] Figures 5 to 10 are process diagrams sequentially showing a method for manufacturing a solar cell module according to an embodiment of the present invention.

[0121] Hereinafter, a method for manufacturing a solar cell module according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2, and FIGS. 5 to 10. Any content that overlaps with the previously described content will be omitted or briefly described.

[0122] First, a substrate (10) is prepared. For example, a substrate (10) made of polyimide (PI) is prepared. Then, as shown in FIG. 5, a lower conductive layer (210) is formed on the substrate (10). For example, molybdenum (Mo) can be deposited on the substrate (10) to form the lower conductive layer (210).

[0123] Afterwards, a lower conductive layer (210), a semiconductor layer (220), and an upper conductive layer (230) are formed on the substrate (10), and a scribing process is performed to form a plurality of solar cells (SC1 to SC3), a plurality of cell connection portions (SC-IC1, SC-IC2), and a cell separation pattern (P) on the substrate (10). cell ), forming multiple blocking diodes (BD1, BD2) and multiple diode connections (D-IC1, D-IC2).

[0124] Accordingly, the substrate (10) has a battery separation pattern (P cell ), a region (hereinafter, a first region (A1)) in which a plurality of blocking diodes (BD1, BD2) and a plurality of diode connections (D-IC1, D-IC2) are formed, and a region (hereinafter, a second region (A2)) in which a plurality of solar cells (SC1 to SC3) and a plurality of cell connections (SC-IC1, SC-IC2) are formed. In addition, the first and second regions (A1, A2) may be set or determined in advance.

[0125] Next, as shown in Fig. 6, a lower groove (H) is formed that penetrates the lower conductive layer (210) in the thickness direction (Z-axis direction). b :H b1 , H b2 ) is formed. At this time, the lower groove (H b ) is formed to extend in the second horizontal direction (Y-axis direction). That is, the lower groove (H) is formed to extend from one end of the second horizontal direction (Y-axis direction) of the substrate (10) to the other end. b ) is formed. The lower groove (H b ) are provided in multiple pieces, and multiple lower grooves (H b ) can be formed to be listed in the first horizontal direction (X-axis direction). In addition, a plurality of lower grooves (H) are formed in the first region (A1). b )(Hereinafter, the first lower home (H b )) is formed, and a plurality of lower grooves (H) are formed in the second region (A2). b )(Hereinafter, the lower home (H b2 )) are formed. The first and second lower grooves (H b1,H b2 ) can be formed by removing a portion of the lower conductive layer in the thickness direction using a scribing method. For example, the lower conductive layer (210) is etched using a laser scribing method to form the first and second lower grooves (H b1, H b2 ) can be formed. At this time, for example, etching can be performed using a laser of 500 nm to 1100 nm or a laser of 200 nm to less than 500 nm. More specifically, a laser of 532 nm wavelength, a laser of 1064 nm wavelength, or a laser of 266 nm wavelength can be used. The first and second lower grooves (H b1, H b2 ) is not limited to laser scribing. For example, the first and second lower grooves (H b1, H b2 ) can be formed by removing a portion of the lower conductive layer (210) in the thickness direction using a needle scribing method in addition to laser scribing.

[0126] Next, a semiconductor layer (220) is formed on the lower conductive layer (210) as shown in Fig. 7. At this time, for example, the semiconductor layer (220) may be formed using a CIGS compound, which is a compound containing copper (Cu), indium (In), gallium (Ga), and cerium (Se). In addition, the semiconductor layer may be formed in a PN stacked structure in which an n-type semiconductor layer is the upper layer and a p-type semiconductor layer is the lower layer.

[0127] When a semiconductor layer (220) is formed on a lower conductive layer (210), the semiconductor layer material is formed in the first and second lower grooves (H) provided in the lower conductive layer (210). b1, H b2 ) is also filled or introduced into the interior. In this way, the first and second lower grooves (H b1, H b2 ) is formed by filling or introducing a semiconductor layer material into the first and second sub-patterns (P b1 , Pb2 ) is. That is, the first lower groove (H b1 ) is filled or introduced with a semiconductor layer material and deposited as a first sub-pattern (P b1 ) and the second lower home (H b2 ) is filled or introduced with a semiconductor layer material and the deposited layer is a second lower pattern (P b2 ) becomes.

[0128] Here, when a semiconductor layer (220) is formed on the lower conductive layer (210), the material for the semiconductor layer (220) is formed in the first and second lower grooves (H b1, H b2 ) is not a separately performed process. That is, when a semiconductor layer (220) is formed on the lower conductive layer (210), the semiconductor layer material is formed not only on the lower conductive layer (210) but also on the first lower groove (H b1 ) and the second lower groove (H b1 ) is introduced or filled into the first and second sub-patterns (P b1 , P b2 ) is formed.

[0129] Next, as shown in Fig. 8, a middle groove (Hc: H) is formed that penetrates the semiconductor layer (220) in the thickness direction (Z-axis direction). c1 , H c2 ) is formed. At this time, the middle groove (Hc: H c1 , H c2 ) is formed to extend in the second horizontal direction (Y-axis direction). That is, the middle groove (Hc: H) is formed to extend from one end of the second horizontal direction (Y-axis direction) of the substrate (10) to the other end. c1 , H c2 ) is formed. The middle groove (Hc: H c1 , H c2 ), the first and second lower grooves (H b1, H b2 ) and the first horizontal direction (X-axis direction) are formed so that the positions are different.

[0130] Middle groove (Hc: H c1 , Hc2 ) are provided in multiple numbers, and multiple intermediate grooves (Hc: H c1 , H c2 ) can be formed to be listed in the first horizontal direction (X-axis direction). In addition, a plurality of intermediate grooves (Hc: H) are provided in each of the first region (A1) and the second region (A2). c1 , H c2 ) is formed. At this time, the intermediate groove (hereinafter, the first intermediate groove (H) formed in the first region (A1) c1 )) is the first lower groove (H b1 ) is formed to be located on one side of the second region (A2). In addition, the second intermediate groove (hereinafter referred to as the second intermediate groove (H) is formed in the second region (A2). c2 )) is the second lower home (H b ) is formed to be located on the other side.

[0131] First and second intermediate grooves (H c1 , H c2 ) can be formed by removing a portion of the semiconductor layer (220) in the thickness direction using a scribing method. For example, the semiconductor layer (220) is etched using a laser scribing method to form the first and second intermediate grooves (H c1 , H c2 ) can be formed. At this time, for example, etching can be performed using a laser of 500 nm to 1100 nm or a laser of 200 nm to less than 500 nm. More specifically, a laser of 532 nm wavelength, a laser of 1064 nm wavelength, or a laser of 266 nm wavelength can be used. The first and second intermediate grooves (H c1 , H c2 ) is not limited to laser scribing. For example, the first and second intermediate grooves (H c1 , H c2 ) can be formed by removing a portion of the semiconductor layer (220) in the thickness direction using a needle scribing method in addition to laser scribing.

[0132] Next, as shown in Fig. 9, an upper conductive layer (230) is formed on the semiconductor layer (220). At this time, for example, ITO is laminated on the semiconductor layer (220) to form the upper conductive layer (230).

[0133] When the upper conductive layer (230) is formed on the semiconductor layer (220), the material for the upper conductive layer is formed in the plurality of first intermediate grooves (H) provided in the semiconductor layer (220). c1 ) and multiple second intermediate grooves (H c2 ) is also filled or introduced into the interior. In this way, a plurality of first intermediate grooves (H c1 ) is filled or introduced into the first intermediate pattern (P c1 ) and multiple second intermediate grooves (H c2 ) is filled or introduced into the second intermediate pattern (P c2 ) becomes.

[0134] Here, when the upper conductive layer (230) is formed on the semiconductor layer (220), the material for the upper conductive layer (230) is formed in the first intermediate groove (H c1 ) and the second intermediate groove (H c2 ) is not a separately performed process. That is, when the upper conductive layer (230) is formed on the semiconductor layer (220), the material for the upper conductive layer (230) is not only formed on the semiconductor layer (220) but also on the first intermediate groove (H c1 ) and the second intermediate groove (H c2 ) are filled with the first and second intermediate patterns (P c1 ,P c2 ) is formed.

[0135] Afterwards, a metal layer is formed on the upper conductive layer (230) as shown in Fig. 10. At this time, a metal layer is formed in each of the first region (A1) and the second region (A2). More specifically, a metal layer (M) is formed in the entire first region (A1) of the upper conductive layer (230), and a metal layer (M1) is formed in the other edge region of the second region (A2). In forming the metal layer (M) in the first region (A1), a plurality of second intermediate patterns (P) formed in the first region (A1) c2 ) is positioned closest to the other end of the substrate (10) and the second intermediate pattern (P) c2 ) is placed on one side of the second intermediate pattern (P c2 ) and are formed so as to be spaced apart in the first horizontal direction (X-axis direction).

[0136] Next, as shown in Fig. 2, a first separation pattern (P) is formed as an empty space penetrating the metal layer (M), upper conductive layer (230), and semiconductor layer (220) formed in area 1 (A1) in the thickness direction (Z-axis direction). d1 ), battery separation pattern (P cell ) and the second separation pattern (P d2 ) are formed. That is, each first intermediate pattern (P c1 ) is scribed so as to penetrate the metal layer (M), upper conductive layer (230) and semiconductor layer (220) formed on one side of the first separation pattern (P) in the thickness direction (Z-axis direction). d1 ) can be formed. At this time, the first separation pattern (P d1 ) is the second metal layer (M2), and the first separation pattern (P d1 ) is a third metal layer (M3). In addition, a plurality of first lower patterns (P) formed in the first region (A1) b1 ) is the first lower pattern (P) placed most adjacent to the second area (A1). b1 ) is scribed so as to penetrate the metal layer (M), upper conductive layer (230) and semiconductor layer (220) formed on the other side in the thickness direction (Z-axis direction), thereby forming a battery separation pattern (P cell) can be formed. And, the second intermediate pattern (P c2 ) is formed on the other side of the upper conductive layer (230) and the semiconductor layer (220) by scribing so as to penetrate in the thickness direction (Z-axis direction) to form a second separation pattern (P d2 ) can be formed.

[0137] First separation pattern (P d1 ), battery separation pattern (P cell ) and the second separation pattern (P d2 ) can be formed using a scribing method. For example, it can be formed using a laser scribing method or a needle scribing method. When using a laser scribing method, etching can be performed using, for example, a laser having a wavelength of 500 nm to 1100 nm or a laser having a wavelength of 200 nm to less than 500 nm. More specifically, a laser having a wavelength of 532 nm, a laser having a wavelength of 1064 nm, or a laser having a wavelength of 266 nm can be used.

[0138] According to embodiments of the present invention, a solar cell module can be equipped with a blocking diode (BD1, BD2). In addition, a solar cell module including a blocking diode (BD1, BD2) can be manufactured simply and at low cost. In addition, even if a large amount of current is stored in the battery (20) when the solar cells (SC1 to SC3) are unable to generate current, the large current stored in the battery (20) can be prevented or suppressed from flowing back to the solar cell.

[0139] According to embodiments of the present invention, a solar cell module can be equipped with a built-in blocking diode. Furthermore, a solar cell module including a blocking diode can be manufactured simply and at low cost. Furthermore, even when a large amount of current is stored in a battery when the solar cell is unable to generate current, the current stored in the battery can be prevented or suppressed from flowing backward to the solar cell.

Claims

substrate; A solar cell comprising a first lower conductive layer, a first semiconductor layer, and a first upper conductive layer sequentially stacked in an upward direction on the substrate; A plurality of blocking diodes, including a second lower conductive layer connected to the first lower conductive layer of the solar cell, a second semiconductor layer and a second upper conductive layer sequentially stacked in an upward direction on the second lower conductive layer, and arranged on one side of the solar cell; and A thin film solar cell module comprising a diode connector arranged between adjacent blocking diodes among a plurality of said blocking diodes and connecting the adjacent blocking diodes. In claim 1, The above diode connection is, A thin film solar cell module connected to the second lower conductive layer of the blocking diode arranged on one side of the diode connection portion and connected to the second upper conductive layer of the blocking diode arranged on the other side of the diode connection portion. In claim 2, The above diode connection is, A third lower conductive layer connected to the second lower conductive layer of the blocking diode arranged on the above side; A third upper conductive layer connected to the second upper conductive layer of the blocking diode arranged on the other side; A third semiconductor layer disposed between the third upper conductive layer and the third lower conductive layer; and A thin film solar cell module comprising a first intermediate pattern formed to penetrate the third semiconductor layer so as to connect the third upper conductive layer and the third lower conductive layer, and formed of a material for the third upper conductive layer. In claim 3, The above diode connection is, A first lower pattern formed of a material for the third semiconductor layer and disposed on the other side of the third lower conductive layer; and In the electrical connection portion with the neighboring blocking diode, a first separation pattern is provided between the second semiconductor layer and the second upper conductive layer of the blocking diode and the third semiconductor layer and the third upper conductive layer of the diode connection portion, and is arranged on one side of the first intermediate pattern; From the blocking diode side arranged on the other side, the first lower pattern, the second middle pattern, and the first separation pattern are arranged in that order in the direction of the blocking diode arranged on the one side. The second lower conductive layer and the third lower conductive layer of the blocking diode arranged on the other side are separated with the first lower pattern in between, The above first separation pattern is formed as a thin film solar cell module formed of an empty space or an insulating material. In claim 3, The first to third upper conductive layers are formed of a light-transmitting material that can transmit light, A first metal layer formed on top of the first upper conductive layer and having higher electrical conductivity than the first upper conductive layer, The blocking diode disposed at one end of the plurality of blocking diodes includes a second metal layer formed on the second upper conductive layer and having higher electrical conductivity than the second upper conductive layer, A thin film solar cell module comprising a plurality of the diode connections, the third metal layer having higher electrical conductivity than the third upper conductive layer and formed on the third upper conductive layer. In claim 5, A thin film solar cell module in which the second metal layer is connected to a battery. In claim 1, A cell separation pattern provided between the second semiconductor layer and the second upper conductive layer of the blocking diode adjacent to the solar cell among the plurality of blocking diodes and the first semiconductor layer and the first upper conductive layer of the solar cell; The above-mentioned cell separation pattern is formed as a thin film solar cell module formed of an empty space or an insulating material. In any one of claims 1 to 6, comprising a plurality of the above solar cells, wherein the plurality of the above solar cells are arranged in one direction, A plurality of solar cells including a cell connector arranged between adjacent solar cells, A thin film solar cell module in which the electrical connection part is connected to the first upper conductive layer of a solar cell arranged on one side of the battery connection part and is connected to the first lower conductive layer of a solar cell arranged on the other side of the battery connection part. In claim 8, Among the plurality of solar cells and the plurality of blocking diodes, in the adjacent solar cells and blocking diodes, a cell separation pattern is provided between the first semiconductor layer and the first upper conductive layer of the solar cell and the second semiconductor layer and the second lower conductive layer of the blocking diode, The above-mentioned cell separation pattern is formed as a thin film solar cell module formed of an empty space or an insulating material. In claim 8, The above battery connection part is, A fourth lower conductive layer connected to the first lower conductive layer of the solar cell arranged on the other side; A fourth semiconductor layer formed on top of the fourth lower conductive layer; A fourth upper conductive layer formed on the upper portion of the fourth semiconductor layer and connected to the first upper conductive layer of the solar cell disposed on one side; A thin film solar cell module comprising a second intermediate pattern formed to penetrate the fourth semiconductor layer so as to connect the fourth upper conductive layer and the fourth lower conductive layer, and formed of a material for the fourth upper conductive layer. In claim 10, The above battery connection part is, A second lower pattern formed of a material for the fourth semiconductor layer and disposed on one side of the fourth lower conductive layer; and In the neighboring solar cell and the cell connection portion, a second separation pattern is provided between the first semiconductor layer and the first upper conductive layer of the solar cell and the fourth semiconductor layer and the fourth upper conductive layer of the cell connection portion, and is arranged on the other side of the second intermediate pattern; The second lower pattern, the second middle pattern, and the second separation pattern are arranged in the order of the solar cell side arranged on one side of the above-mentioned battery connection portion, toward the solar cell side arranged on the other side of the above-mentioned battery connection portion. The above second separation pattern is formed as a thin film solar cell module formed of an empty space or an insulating material. A method for manufacturing a thin film solar cell module formed on a substrate, the thin film solar cell module comprising: a solar cell; a plurality of blocking diodes, each of which is connected to the solar cell and allows current to flow in one direction; and a diode connector disposed between adjacent blocking diodes among the plurality of blocking diodes and connecting the adjacent blocking diodes. A method for manufacturing a thin film solar cell module, the process of manufacturing the above solar cell, a plurality of blocking diodes, and a diode connector includes a scribing etching process. In claim 12, The process of manufacturing the above solar cell, multiple blocking diodes, and diode connectors is as follows: The process of preparing the substrate; and A process of setting the substrate into a first region and a second region excluding the first region, based on one direction; A method for manufacturing a thin film solar cell module, wherein a plurality of blocking diodes and diode connections are formed in the first region and a solar cell is formed in the second region, in manufacturing the above solar cell, a plurality of blocking diodes, and a diode connection. In claim 13, The process of manufacturing the above solar cell, multiple blocking diodes, and diode connectors is as follows: A process of forming a lower conductive layer on the above substrate; A process of forming a plurality of first lower grooves arranged in one direction in the first region by etching the lower conductive layer formed in the first region in the thickness direction using a scribing etching process; A process of forming a semiconductor layer capable of converting received sunlight into photoelectric energy on the lower conductive layer, and filling a material for the semiconductor layer into a plurality of the first lower grooves to form a plurality of first lower patterns; A process of forming a plurality of first intermediate grooves arranged in the one direction in the first region by etching a semiconductor layer formed on one side of the first lower pattern in the thickness direction using a scribing etching process; A process of forming an upper conductive layer on the semiconductor layer and filling a plurality of first intermediate grooves with a material for the upper conductive layer to form a plurality of first intermediate patterns; and A method for manufacturing a thin film solar cell module, comprising: forming a first separation pattern so as to penetrate, in the thickness direction, an upper conductive layer and a semiconductor layer formed on one side of a plurality of first intermediate patterns; and forming a cell separation pattern so as to penetrate, in the thickness direction, an upper conductive layer and a semiconductor layer formed on the other side of a first lower pattern that is arranged closest to the solar cell among the plurality of first lower patterns. In claim 14, The process of manufacturing the above solar cell, multiple blocking diodes, and diode connectors is as follows: Before forming the first separation pattern and the battery separation pattern, a process of forming a metal layer on the upper conductive layer formed in the first region and forming a metal layer in some regions of the upper conductive layer formed in the second region is included. In forming the first separation pattern, the first separation pattern is formed so as to penetrate the metal layer, upper conductive layer and semiconductor layer formed on one side of the plurality of first intermediate patterns in the thickness direction, A method for manufacturing a thin film solar cell module, wherein the method comprises forming a cell separation pattern so as to penetrate a metal layer, an upper conductive layer, and a semiconductor layer formed on the other side of a first lower pattern that is arranged closest to the solar cell among a plurality of first lower patterns in the thickness direction. In any one of claims 12 to 15, A method for manufacturing a thin film solar cell module, comprising a process of connecting a metal layer formed in the first region to a battery. In claim 15, The process of manufacturing the above solar cell includes a process of manufacturing a plurality of the solar cells so that they are aligned in one direction, A method for manufacturing a thin film solar cell module, the method comprising: forming a cell connector connecting adjacent solar cells using a scribing etching process; In claim 17, The process of forming a plurality of solar cells and cell connectors using the above scribing etching process is as follows: A process of forming a plurality of second lower grooves arranged in one direction in the second region by etching the lower conductive layer formed in the second region in the thickness direction using a scribing etching process; When forming the semiconductor layer and the first lower pattern, a process of filling the semiconductor layer material into the plurality of second lower grooves to form a plurality of second lower patterns; A process of forming a plurality of second intermediate grooves arranged in one direction in the second region by etching a semiconductor layer formed on the other side of the second lower pattern in the thickness direction using a scribing etching process; When forming the upper conductive layer and the first intermediate pattern, a process of filling the material for the upper conductive layer into a plurality of the second intermediate grooves to form a plurality of second intermediate patterns; and A method for manufacturing a thin film solar cell module, comprising: a process of forming a second separation pattern so as to penetrate the upper conductive layer and semiconductor layer formed on the other side of a plurality of the second intermediate patterns in the thickness direction; In claim 18, The process of forming the first and second separation patterns and the battery separation pattern is as follows: A method for manufacturing a thin film solar cell module, comprising a process of forming a void space by etching an upper conductive layer and a semiconductor layer in the thickness direction using a scribing etching process. In claim 19, The process of forming the first and second separation patterns and the battery separation pattern is as follows: A method for manufacturing a thin film solar cell module, comprising a process of filling the above-mentioned empty space with an insulating material.

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