Method for manufacturing ceramic circuit board

Abstract

Disclosed is a method for manufacturing a ceramic circuit board. A method for manufacturing a ceramic circuit board according to an embodiment of the present invention comprises a filler metal layer formation step of forming a filler metal layer on a substrate by physical vapor deposition, wherein the filler metal layer formation step comprises: a physical vapor deposition step of physically vapor-depositing materials from at least two filler metal raw material parts; and a substrate position changing step of changing the relative positions of the substrate with respect to the filler metal raw material parts different from each other in a first direction.

Description

Method for manufacturing ceramic circuit boards

[0001] The present invention relates to semiconductor technology, and more particularly, to a method for manufacturing a ceramic circuit board.

[0002] Power semiconductors, which can operate at high voltages and high currents and are used to convert and control power, are used as core components in various fields such as power supplies, inverters, solar power, artificial intelligence (AI), and mobile devices, and their demand is increasing today.

[0003] Ceramic circuit boards that make up power semiconductors require high insulation, heat dissipation, and heat resistance, and to achieve these, metallizing technology, a type of surface treatment technology, is used on ceramic substrates.

[0004] Metallizing methods include direct plated copper, thick printed copper, direct bonded copper, and vacuum deposition.

[0005] In order to form a metal layer on a ceramic substrate using a plating method, a separate seed layer must be formed on the ceramic substrate to increase reactivity, and it is difficult to control the residual stress of the film formed during the plating process, which limits the thickness of the plating film.

[0006] Fig. 1(a) and Fig. 1(b) are SAT images of a filler metal layer in a conventional ceramic circuit board. Fig. 1(a) and Fig. 1(b) are SAT images of a ceramic circuit board made by dispersing conductive powder in a binder and organic additives, extruding it by printing, and laminating it on a ceramic substrate. It can be confirmed that the filler metal layer of the conventional ceramic circuit board of Fig. 1(a) has a porosity of 39.5% per unit area. It can be confirmed that the filler metal layer of the conventional ceramic circuit board of Fig. 1(b) has a porosity of 2.5% per unit area.

[0007] In the case of the ceramic circuit board according to Korean Patent Publication No. 10-2020-0108393 (publication date: September 18, 2020) shown in FIG. 1(a) and FIG. 1(b), there were problems such as the need for a high-temperature drying process after forming a filler layer by printing, the lamination thickness being thick, and the formation of voids equivalent to the amount of binder volatilized as the binder volatilized, which lowered the substrate yield.

[0008] The need for ceramic circuit boards that are thinner while also having heat dissipation and heat resistance is increasing day by day.

[0009]

[0010] The technical problem to be solved by the present invention relates to a method for manufacturing a ceramic circuit board capable of manufacturing a ceramic circuit board with improved adhesive performance and improved product yield through a thin film.

[0011]

[0012] To solve the above technical problem, the present invention provides a method for manufacturing a ceramic circuit board.

[0013] A method for manufacturing a ceramic circuit board according to one embodiment of the present invention includes a filler layer forming step of forming a filler layer by physical vapor deposition on a substrate, wherein the filler layer forming step may include a physical vapor deposition step of physically vapor depositing a material from at least two or more filler material raw material portions; and a substrate position changing step of changing a relative position of the substrate with respect to at least one of the filler material raw material portions in a first direction.

[0014] In one embodiment, the filler material portion may include a plurality of single metals.

[0015] According to one embodiment, at least one of the filler material portions may have a length greater than the length of the substrate in a second direction orthogonal to the first direction.

[0016] According to one embodiment, in the substrate position changing step, a plurality of the filler material portions are spaced apart in the first direction, and the substrate can be spaced apart from the filler material portions in a third direction orthogonal to the first direction and can translate in the first direction.

[0017] According to one embodiment, in the step of forming the filler layer, the substrate may be formed by performing a translational movement in the first direction multiple times.

[0018] According to one embodiment, in the substrate position changing step, the substrate can translate at different speeds for each unit area in the first direction.

[0019] According to one embodiment, in the step of forming the filler layer, at least two or more of the materials may be physically vapor deposited on the filler layer at different content ratios.

[0020] In one embodiment, the method may further include a brazing step of brazing at 800°C to 900°C for 30 to 120 minutes.

[0021] According to one embodiment, the filler layer may be formed into a single layer of a plurality of elements after the brazing step.

[0022]

[0023] According to an embodiment of the present invention, by forming a filler layer on a ceramic substrate by physical vapor deposition, the adhesion of the contact interface can be increased, and the reliability of the ceramic circuit substrate and the semiconductor module including the same can be improved.

[0024] According to one embodiment of the present invention, there is an advantage in that the porosity of the filler metal layer is significantly reduced by physical vapor deposition and brazing, thereby increasing the density of the filler metal layer.

[0025] According to another embodiment of the present invention, by brazing a filler layer made of two or more materials at low pressure, the mobility between materials with different reactivity can be controlled, thereby manufacturing a ceramic circuit board having different component content ratios and distributions at different locations in the thickness direction of the filler layer, thereby increasing manufacturing efficiency and increasing manufacturing convenience.

[0026] According to another embodiment of the present invention, a filler layer formed by brazing after physical vapor deposition has a layer uniformity, thereby having the advantage of significantly reducing the rate of layer separation.

[0027]

[0028] Figures 1(a) and 1(b) are SAT images of a filler layer in a conventional ceramic circuit board.

[0029] Figure 2 is a flowchart showing a method for manufacturing a ceramic circuit board according to one embodiment of the present invention.

[0030] Figure 3 is a flowchart showing a method for manufacturing a ceramic circuit board according to one embodiment of the present invention.

[0031] Figure 4 is a front view schematically showing a step of forming a filler layer according to one embodiment of the present invention.

[0032] Figure 5 is a plan view schematically showing a step of forming a filler layer according to one embodiment of the present invention.

[0033] Figure 6 is a SAT image of a filler layer according to one embodiment of the present invention.

[0034]

[0035] 10: Ceramic circuit board 11: Change in position of ceramic circuit board

[0036] 100: substrate

[0037] 200: Filler metal layer 201: Porosity

[0038] 202: Gap ratio

[0039] 300: Change in position of ceramic circuit board

[0040] 20: Soldering material section 21a, 21b, 21c: Single metal

[0041]

[0042] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. However, the technical concept of the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided to ensure that the disclosed content is thorough and complete and to sufficiently convey the spirit of the present invention to those skilled in the art.

[0043] In this specification, when a component is referred to as being on another component, it means that it can be formed directly on the other component, or a third component may be interposed between them. In addition, in the drawings, shapes and sizes are exaggerated for the purpose of effectively explaining the technical contents.

[0044] Additionally, although terms such as first, second, and third have been used to describe various components in various embodiments of this specification, these components should not be limited by these terms. These terms are merely used to distinguish one component from another. Thus, what is referred to as a first component in one embodiment may be referred to as a second component in another embodiment. Each embodiment described and illustrated herein also includes its complementary embodiments. Furthermore, the term "and / or" has been used herein to mean including at least one of the components listed before and after.

[0045] In the specification, singular expressions include plural expressions unless the context clearly dictates otherwise. In addition, terms such as "comprise" or "have" are intended to specify the presence of a feature, number, step, component, or combination thereof described in the specification, and should not be construed as excluding the presence or addition of one or more other features, numbers, steps, components, or combinations thereof. In addition, the term "connection" is used in the present specification to mean both indirectly connecting multiple components and directly connecting them.

[0046] In addition, when describing the present invention below, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the gist of the present invention, the detailed description will be omitted.

[0047]

[0048] For convenience of explanation, the first direction refers to the X-axis of the orthogonal coordinate system, the second direction refers to the Z-axis of the orthogonal coordinate system, and the third direction refers to the Y-axis of the orthogonal coordinate system. In this case, the first, second, and third directions are orthogonal to each other.

[0049]

[0050] FIG. 2 is a flowchart showing a method for manufacturing a ceramic circuit board according to an embodiment of the present invention, FIG. 3 is a flowchart showing a method for manufacturing a ceramic circuit board according to an embodiment of the present invention, FIG. 4 is a front view schematically showing a step of forming a filler layer according to an embodiment of the present invention, FIG. 5 is a plan view schematically showing a step of forming a filler layer according to an embodiment of the present invention, and FIG. 6 is a SAT image of a filler layer according to an embodiment of the present invention.

[0051]

[0052] Hereinafter, a method for manufacturing a ceramic circuit board according to one embodiment of the present invention will be described with reference to FIGS. 2 to 5.

[0053]

[0054] Referring to FIGS. 2 to 4, a method for manufacturing a ceramic circuit board includes a filler layer forming step (S10), and may further include a substrate preparation step (S00) and a brazing step (S20).

[0055]

[0056] Referring again to FIG. 2, in the substrate preparation step (S00), a substrate may be prepared within a chamber (not shown). The chamber (not shown) may provide a space in which a ceramic circuit board is manufactured. The interior of the chamber (not shown) may be decompressed to a pressure below atmospheric pressure.

[0057] In the substrate preparation step (S00), the substrate (100) can be supported and provided inside a chamber (not shown).

[0058] The substrate (100) may be made of a material having high thermal conductivity and excellent mechanical properties such as strength and fracture toughness. Preferably, the substrate (100) may be made of a ceramic material having thermal conductivity, insulation, and mechanical strength properties.

[0059] The substrate (100) may be made of alumina (Al2O3), silicon nitride (Si3N4), aluminum nitride (AlN), boron nitride (BN), beryllium oxide (BeO), sapphire, or zirconia-doped alumina (ZTA).

[0060] According to one embodiment, the substrate (100) may be a ceramic substrate.

[0061] According to one embodiment, the thickness of the substrate (100) may be 0.1 mm to 1.0 mm. More preferably, the thickness of the substrate (100) according to one embodiment may be 0.2 mm to 0.8 mm.

[0062]

[0063] Referring again to FIGS. 2 to 4, in the filler layer formation step (S10), a filler layer (200) can be formed on a substrate (100) by physical vapor deposition.

[0064] The filler layer formation step (S10) may include a physical vapor deposition step (S11) and a substrate position change step (S12).

[0065] In the physical vapor deposition step (S11), a material can be physically vapor deposited on the substrate (100) from at least two filler material portions (20). In the physical vapor deposition step (S11), a material can be physically vapor deposited on one or both surfaces of the substrate (100) from at least two filler material portions (20). According to one embodiment, in the physical vapor deposition step (S11), different materials can be sequentially vapor deposited on both surfaces of the substrate (100) simultaneously or at different times. In the physical vapor deposition step (S11), power is applied between the substrate (100) and the filler material portion (20) to cause a glow discharge of an inert gas, thereby mixing the filler material portions (20) of different materials on the substrate (100) to form a filler material layer (200). The filler material portion (20) can be made of different materials. The filler material portion (20) may include an alloy or a plurality of single metals. According to one embodiment, the filler material portion (20) may be an alloy composed of titanium (Ti), silver (Ag), and copper (Cu). According to one embodiment, the filler material portion (20) may be composed of a plurality of single metals in a ternary or quaternary system. The filler material portion (20) may include a plurality of different single metals spaced apart from each other in a first direction. More specifically, the plurality of single metals may include titanium (Ti), silver (Ag), and copper (Cu).

[0066] The filler material unit (20) is a material used as a physical vapor deposition source, and a plurality of raw materials are each connected to a power source and can be driven independently of each other. According to one embodiment, each filler material unit (20) is provided at the top of a chamber (not shown) and is positioned while maintaining a certain distance from the substrate (100).

[0067] The material may be a metal. The material may be an alloy or a single metal as a metal substance for forming a filler layer.

[0068]

[0069] In the physical vapor deposition step (S11), the filler material portion (20) can be physically vapor deposited using a reaction gas including an inert gas. According to one embodiment, the inert gas can include helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe), radon (Rn), and nitrogen (N2). In the physical vapor deposition step (S11), physical vapor deposition can be performed at an operating pressure of about 1 mTorr to 20 mTorr in an inert gas atmosphere. In the physical vapor deposition step (S11), the distance between the filler material portion (20) and the substrate (100) can be 50 mm to 150 mm. In the physical vapor deposition step (S11), physical vapor deposition can be performed until the filler material layer (200) reaches a target thickness.

[0070] In the physical vapor deposition step (S11), the intensity of the power applied to the filler material portion (20) can be arbitrarily controlled. In the physical vapor deposition step (S11), different powers can be applied to different raw materials constituting the filler material portion (20). According to one embodiment, in the physical vapor deposition step (S11), the intensity of the power can be arbitrarily controlled for each different raw material constituting the filler material portion (20).

[0071]

[0072] At least one of the filler material sections (20) may have a length longer than the length of the substrate (100) in the third direction.

[0073]

[0074] In the substrate position change step (S12), the relative position of the substrate (100) with respect to different filler material parts (20) can be changed.

[0075] In the substrate position changing step (S12), the substrate (100) can be spaced apart from the filler material portion (20) in the second direction and can be translated in the first direction. In the substrate position changing step (S12), the substrate (100) can be moved in parallel in the horizontal direction while facing the filler material portion (20). In the substrate position changing step (S12), in the filler material portion (20) including a plurality of raw materials spaced apart in the first direction, the content ratio of the material to be physically vapor deposited on the filler material layer (200) can be controlled to be different by controlling the facing time of the substrate (100) to a specific raw material. In the substrate position changing step (S12), in order to control the facing time of the substrate (100) to the filler material portion (20), particularly to a specific raw material, the position change of the substrate (100) moving in the first direction can be varied.

[0076] According to one embodiment, in the substrate position change step (S12), the substrate (100) can perform translational movement at different speeds for each unit area in the first direction. More specifically, the substrate (100) can be provided on an XY stage (not shown) capable of servo control, and a control unit (not shown) can control the movement speed and position of the XY stage (not shown) to adjust the movement speed of the substrate (100) for each position.

[0077] According to one embodiment, in the substrate position change step (S12), the filler material portion (20) spaced apart in the second direction with respect to the substrate (100) is moved, so that the distance between the substrate (100) and the filler material portion (20) can be arbitrarily adjusted.

[0078]

[0079] In the filler layer formation step (S10), the substrate (100) is moved in translation multiple times in the first direction, and a filler layer (200) can be formed on the substrate (100).

[0080] In the filler metal layer forming step (S10), at least two or more materials may be physically vapor deposited at different content ratios to form the filler metal layer (200). According to one embodiment, the filler metal layer (200) formed in the filler metal layer forming step (S10) may be formed to include a plurality of different materials at an arbitrary content ratio by controlling the position change speed of the substrate (100), varying the power intensity applied to each filler material raw material portion (20), and controlling the facing time between the substrate (100) and the filler material raw material portion (20). The control unit (not shown) may control the position change speed of the substrate (100), control the power intensity applied to each filler material raw material portion (20), and control the facing time between the substrate (100) and the filler material portion (20). According to one embodiment, the filler layer (200) formed in the filler layer forming step (S10) may have a titanium (Ti) content of 1 wt% to 10 wt%, a copper (Cu) content of 19 wt% to 30 wt%, and a silver (Ag) content of 80 wt% to 60 wt%.

[0081]

[0082] In the brazing step (S20), brazing can be performed at an operating pressure of 1 mTorr to 20 mTorr in an inert gas atmosphere. In one embodiment, the inert gas can include helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe), radon (Rn), and nitrogen (N2). In the brazing step (S20), the filler metal layer (200) can be brazed at a process temperature of 800°C to 900°C. In the brazing step (S20), brazing can be performed for a process time of 30 minutes to 120 minutes.

[0083] In the brazing step (S20), the substrate (100) can be heated to the target process temperature using a resistance heating heater or induction heating. In the brazing step (S20), after the brazing process is completed, rapid cooling is performed, and the cooling rate can be controlled to 5°C or less.

[0084] At least two or more materials forming the filler layer (200) may have different migration speeds and different distribution ratios per unit area depending on the reactivity of the materials when grown by physical vapor deposition and then brazed. At least two or more materials forming the filler layer (200) may form different height layers based on the surface of the substrate (100) depending on the different reactivity when grown by physical vapor deposition and then brazed.

[0085] According to one embodiment, the material forming the filler layer (200) may be titanium (Ti), silver (Ag), and copper (Cu). As titanium (Ti), silver (Ag), and copper (Cu) grow into the filler layer (200) by physical vapor deposition and are then brazed, titanium (Ti), silver (Ag), and copper (Cu) have different reactivity levels, and titanium (Ti) forms a lower layer based on the surface of the substrate (100), and may be positioned relatively closer to the substrate (100) than silver (Ag) and copper (Cu).

[0086]

[0087] The filler metal layer (200) may be formed as a single layer after the brazing step (S20). The filler metal layer (200) may be formed as a single layer in which different materials are non-uniformly included. The filler metal layer (200) may have multiple elements irregularly mixed. The filler metal layer (200) may have multiple elements non-uniformly distributed per unit area. The filler metal layer (200) may have different mixing ratios and shapes of the multiple elements per unit area.

[0088]

[0089] The filler metal layer (200) can have a dense grain boundary phase as it goes through the filler metal layer forming step (S10) and the brazing step (S20).

[0090] Referring to FIG. 6, according to one embodiment, in an image of an ultrasonic microscope (scanning acoustic tomography, SAT), the porosity per unit area of ​​the filler metal layer (200) may be 0.1% to 5%. According to one embodiment, the filler metal layer (200) has a content ratio of 1 wt% to 10 wt% of titanium (Ti), 19 wt% to 30 wt% of copper (Cu), and 80 wt% to 60 wt% of silver (Ag), and forms a dense single-layer structure through brazing, thereby implementing a porosity per unit area of ​​0.1% to 5%. Referring again to FIG. 6, according to one embodiment, in an image of an ultrasonic microscope (SAT), the filler metal layer (200) may not include closed pores and open pores. A closed pore may be a cavity forming a closed section within the filler metal layer (200), that is, a pore that is not connected to other pores within the filler metal layer (200) and to which a material such as a fluid exposed to the filler metal layer (200) cannot access. An open pore may be a cavity forming an open section within the filler metal layer (200), that is, a region that is connectable to other pores within the filler metal layer (200) and to which a fluid exposed to the filler metal layer (200) can access. However, since the filler metal layer (200) does not include open pores as well as closed pores, the filler metal layer (200) may have a dense structure to which external materials cannot be exposed. The filler metal layer (200) may not include macro pores and meso pores.

[0091]

[0092] Referring again to FIG. 6, according to one embodiment, in the image of the ultrasound microscope (SAT), the void ratio per unit area of ​​the filler metal layer (200) may be at least 0.1% to 5%. The two or more materials constituting the filler metal layer (200) may have different area occupancies. The two or more materials constituting the filler metal layer (200) may have relatively non-uniform area occupancies.

[0093] One of the materials forming the filler layer (200) may be centered, and the remaining materials may have a shape that surrounds the outer periphery of the material that does not cause shape change.

[0094]

[0095] The thickness of the filler layer (200) may be 1 μm to 50 μm.

[0096]

[0097] While the present invention has been described in detail using preferred embodiments, the scope of the present invention is not limited to the specific embodiments and should be construed in accordance with the appended claims. Furthermore, those skilled in the art will appreciate that numerous modifications and variations are possible without departing from the scope of the present invention.

Claims

1. Includes a filler layer forming step of forming a filler layer by physical vapor deposition on a substrate, The above-mentioned filler layer formation step is: A physical vapor deposition step of physically vapor depositing a material from at least two or more filler material parts; and A method for manufacturing a ceramic circuit board, comprising a substrate position changing step of changing the relative position of the substrate with respect to at least one of the filler material portions in a first direction.

2. In paragraph 1, A method for manufacturing a ceramic circuit board, wherein the above-mentioned filler material portion includes a plurality of single metals.

3. In paragraph 1, A method for manufacturing a ceramic circuit board, wherein at least one of the above-described filler material portions has a length longer than the length of the substrate in a second direction perpendicular to the first direction.

4. In paragraph 1, In the above substrate position change step, A method for manufacturing a ceramic circuit board, wherein a plurality of the above-described filler material portions are spaced apart in the first direction, and the substrate is spaced apart from the above-described filler material portions in a third direction orthogonal to the first direction and is capable of translational movement in the first direction.

5. In paragraph 4, In the above-mentioned filler layer formation step, A method for manufacturing a ceramic circuit board, wherein the substrate is formed by performing translational movement in the first direction multiple times.

6. In paragraph 1, In the above substrate position change step, A method for manufacturing a ceramic circuit board, wherein the substrate is capable of translational movement at different speeds for each unit area in the first direction.

7. In paragraph 1, In the above-mentioned filler layer formation step, A method for manufacturing a ceramic circuit board, wherein at least two or more of the above materials are physically vapor deposited on the filler layer at different content ratios.

8. In paragraph 1, A method for manufacturing a ceramic circuit board, further comprising a brazing step of brazing at 800°C to 900°C for 30 to 120 minutes.

9. In paragraph 8, A method for manufacturing a ceramic circuit board, wherein the above-mentioned filler layer is formed by a plurality of elements forming a single layer after the above-mentioned brazing step.

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