Electronic device including graphic information code
By integrating a graphic information code that can be electrically read by the device's processor, the need for separate readers is eliminated, improving manufacturing efficiency and reducing errors in data recognition.
Patent Information
- Application Number
- PCT/KR2025/010736
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-08-08
- Filing Date
- 2025-07-21
- Publication Date
- 2026-01-29
AI Technical Summary
Existing electronic devices require separate reader devices to recognize graphic information codes during manufacturing, which can lead to human error and inefficiencies in data transfer.
Incorporating a graphic information code on internal components that can be read electrically by the device's processor, eliminating the need for separate readers and reducing human error.
Enables direct data transfer from internal components to the processor, enhancing manufacturing efficiency and reducing errors in data recognition.
Smart Images

Figure KR2025010736_29012026_PF_FP_ABST
Abstract
Description
Electronic device containing graphic information code
[0001] This article relates to electronic devices, for example electronic devices containing graphic information codes.
[0002] Electronic devices such as smartphones may include various hardware / mechanical components, such as displays, printed circuit boards (PCBs), and batteries. These components may be produced by separate manufacturers, factories, or processes, making it necessary to track their production information. To track this production information, each component may include a graphical information code (e.g., a data matrix) that can be visually recognized from the outside. For example, the graphical information code may include data such as the component's SMD, production date, test date, and production location.
[0003] Recognizing the graphic information codes formed on each component during the manufacturing process of an electronic device may require a separate reader device to read the information. The reader device can scan and identify the graphic information codes using an image sensor, and then recognize the data contained in the graphic information codes from the identified image data.
[0004] During the manufacturing process of an electronic device, reading graphic information code data may require the installation of a reader device to decode the graphic information code. Consequently, separate equipment and processes may be required to read the graphic information code, and the data read using the reader device may need to be rewritten to the electronic device. Furthermore, this process of reading and / or writing graphic information codes to an electronic device can be prone to human error.
[0005] An electronic device according to the present disclosure (or specification, invention) includes one or more storage media, a memory for storing instructions, at least one processor including a processing circuit, and an electrical component disposed inside the electronic device, and a graphic information code (300) for visually expressing information related to the electrical component can be formed on the electrical component.
[0006] According to one embodiment, the graphic information code includes a plurality of cells that can be visually represented as a first state or a second state, and a bit mark cell included in the plurality of cells can be formed of a conductive material when in the first state and have a non-conductive characteristic when in the second state.
[0007] According to one embodiment, the instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to apply power to the graphic information code and, based on a voltage value recognized at a given node, recognize a state written to the bit mark cell.
[0008] According to various embodiments of the present document, an electronic device can be provided that uses a specific pattern of graphic information code printed on an internal component of the electronic device to read specific bits of the graphic information code through an electrical signal and transmit them directly to a processor.
[0009] FIG. 1 is a block diagram of an electronic device within a network environment according to various embodiments.
[0010] FIG. 2 is a block diagram of an electronic device according to various embodiments.
[0011] FIG. 3 illustrates a graphic information code arranged on a PCB of an electronic device according to one embodiment.
[0012] Figures 4a, 4b and 4c illustrate graphic information codes according to one embodiment.
[0013] FIG. 5 illustrates a processor and graphic information code arranged on a PCB of an electronic device according to one embodiment.
[0014] FIGS. 6A and 6B illustrate a connection structure of a processor and a graphic information code according to one embodiment.
[0015] FIGS. 7A and 7B illustrate a portion of a graphic information code according to one embodiment.
[0016] FIG. 8 illustrates a method for reading bits of each cell of a graphic information code according to one embodiment.
[0017] FIG. 9 illustrates a circuit structure connected to some cells of a graphic information code according to one embodiment.
[0018] FIG. 10 illustrates an example of displaying data included in a graphic information code according to one embodiment on an electronic device.
[0019] FIG. 11 illustrates a structure for switching a signal transmission path using a graphic information code according to one embodiment.
[0020] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings so that those skilled in the art can easily implement the present disclosure. However, the present disclosure may be implemented in various different forms and is not limited to the embodiments described herein. In connection with the description of the drawings, the same or similar reference numerals may be used for identical or similar components. Furthermore, in the drawings and related descriptions, descriptions of well-known functions and configurations may be omitted for clarity and conciseness.
[0021] FIG. 1 is a block diagram of an electronic device (101) within a network environment (100) according to various embodiments.
[0022] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) via a first network (198) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (104) or a server (108) via a second network (199) (e.g., a long-range wireless communication network). In one embodiment, the electronic device (101) may communicate with the electronic device (104) via the server (108). According to one embodiment, the electronic device (101) may include a processor (120), a memory (130), an input module (150), an audio output module (155), a display module (160), an audio module (170), a sensor module (176), an interface (177), a connection terminal (178), a haptic module (179), a camera module (180), a power management module (188), a battery (189), a communication module (190), a subscriber identification module (196), or an antenna module (197). In some embodiments, the electronic device (101) may omit at least one of these components (e.g., the connection terminal (178)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (176), the camera module (180), or the antenna module (197)) may be integrated into one component (e.g., the display module (160)).
[0023] The processor (120) may, for example, execute software (e.g., a program (140)) to control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) and perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operations, the processor (120) may store commands or data received from other components (e.g., a sensor module (176) or a communication module (190)) in a volatile memory (132), process the commands or data stored in the volatile memory (132), and store result data in a non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or an auxiliary processor (123) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together with the main processor (121). For example, when the electronic device (101) includes the main processor (121) and the auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a given function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as a part thereof.
[0024] The auxiliary processor (123) may control at least a portion of functions or states associated with at least one component (e.g., a display module (160), a sensor module (176), or a communication module (190)) of the electronic device (101), for example, on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (123) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (180) or a communication module (190)). In one embodiment, the auxiliary processor (123) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (108)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.
[0025] The memory (130) can store various data used by at least one component (e.g., processor (120) or sensor module (176)) of the electronic device (101). The data can include, for example, software (e.g., program (140)) and input data or output data for commands related thereto. The memory (130) can include volatile memory (132) or non-volatile memory (134).
[0026] The program (140) may be stored as software in the memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).
[0027] The input module (150) can receive commands or data to be used in a component of the electronic device (101) (e.g., a processor (120)) from an external source (e.g., a user) of the electronic device (101). The input module (150) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).
[0028] The audio output module (155) can output audio signals to the outside of the electronic device (101). The audio output module (155) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.
[0029] The display module (160) can visually provide information to an external party (e.g., a user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.
[0030] The audio module (170) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150), output sound through the sound output module (155), or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (101).
[0031] The sensor module (176) can detect the operating status (e.g., power or temperature) of the electronic device (101) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (176) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.
[0032] The interface (177) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (101) with an external electronic device (e.g., the electronic device (102)). In one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.
[0033] The connection terminal (178) may include a connector through which the electronic device (101) may be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).
[0034] The haptic module (179) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. According to one embodiment, the haptic module (179) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.
[0035] The camera module (180) can capture still images and videos. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.
[0036] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).
[0037] A battery (189) may power at least one component of the electronic device (101). In one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.
[0038] The communication module (190) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may operate independently from the processor (120) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (194) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, the corresponding communication module can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (199) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can verify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (196).
[0039] The wireless communication module (192) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and connection of multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (192) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (192) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), an external electronic device (e.g., the electronic device (104)), or a network system (e.g., the second network (199)). According to one embodiment, the wireless communication module (192) can support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.
[0040] The antenna module (197) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (197) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (198) or the second network (199), may be selected from the plurality of antennas, for example, by the communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device via the at least one selected antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (197).
[0041] According to various embodiments, the antenna module (197) may form a mmWave antenna module. In one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.
[0042] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).
[0043] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) via a server (108) connected to a second network (199). Each of the external electronic devices (102 or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations executed in the electronic device (101) may be executed in one or more of the external electronic devices (102, 104, or 108). For example, when the electronic device (101) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (101) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (101) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In one embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server utilizing machine learning and / or a neural network. According to one embodiment, the external electronic device (104) or the server (108) may be included in the second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.
[0044] FIG. 2 is a block diagram of an electronic device according to various embodiments.
[0045] Referring to FIG. 2, the electronic device (200) may include a processor (210), a memory (220), a graphic information code (300), and a recognition circuit (250). Even if some of the illustrated configurations are omitted or replaced with other configurations, various embodiments of the present document may be implemented. In addition to the illustrated configurations, the electronic device (200) may further include at least some of the configurations and / or functions of the electronic device (101) of FIG. 1. At least some of the configurations of the electronic device (200) may be operatively, electrically, and / or functionally connected to each other.
[0046] According to one embodiment, the memory (220) may temporarily or permanently store various data, including volatile memory and non-volatile memory. The memory (220) may include at least some of the configuration and / or functions of the memory (130) of FIG. 1, and may store the program (140) of FIG. 1.
[0047] According to one embodiment, the memory (220) may store various instructions that may be performed by the processor (210). Such instructions may include control commands such as arithmetic and logical operations, data movement, and / or input / output that may be recognized by the processor (210).
[0048] According to one embodiment, the processor (210) may be configured as one or more processors capable of performing calculations or data processing related to control and / or communication of each component of the electronic device (200). The processor (210) may include at least some of the configurations and / or functions of the processor (120) of FIG. 1. The processor (210) may be operatively, functionally, and / or electrically connected to various electrical components of the electronic device (200), including a memory (220), a graphic information code (300), and a recognition circuit (250).
[0049] According to one embodiment, there is no limitation to the computational and data processing functions that the processor (210) can implement on the electronic device (200), but this document will describe various embodiments for recognizing data recorded in the graphic information code (300). The operations of the processor (210) to be described below can be performed by loading instructions stored in the memory (220). The description in this document that the processor (210) can perform a certain operation can also be interpreted to mean that an instruction (or computer program) that causes the electronic device (200) (or the processor (210)) to perform the corresponding operation is stored in the memory (220) (e.g., non-volatile memory, storage).
[0050] According to one embodiment, the electronic device (200) may include various electrical components. For example, the electronic device (200) may include electrical components such as a printed circuit board (PCB), a flexible printed circuit board (FPCB), a battery, a camera module, a sensor, or various chipsets inside a housing (not shown).
[0051] According to one embodiment, a graphic information code (300) may be formed on at least some of the electrical components included in the electronic device (200). The graphic information code (300) may visually represent specific data in space. The graphic information code (300) may include a plurality of cells that may be expressed in a first state or a second state. For example, a cell in the first state (e.g., bit 1) may be expressed in black, and a cell in the second state (or bit 0) may be expressed in white.
[0052] According to one embodiment, the graphic information code (300) may be a two-dimensional (2D) barcode having a two-dimensional fixed shape (e.g., a square). In this document, the graphic information code (300) is described as being a data matrix, which is one of the 2D barcodes, but is not limited thereto, and the graphic information code (300) may also be implemented as a QR (quick response code), Aztec code, Maxi code, PDF417, or a one-dimensional barcode.
[0053] According to one embodiment, the graphic information code (300) (e.g., data matrix) may include a synchronization pattern and a finder pattern formed in an edge region, and a data pattern formed in an internal region of the synchronization pattern and the finder pattern, in which data is recorded. The specific form of the graphic information code (300) will be described in more detail with reference to FIGS. 3 and 4.
[0054] According to one embodiment, at least some cells of the graphic information code (300) (or data pattern) may be designated as bit mark cells. In this document, a bit mark cell may mean a cell in which the processor (210) can recognize a recorded first state (or bit 1) or second state (or bit 2) by an electrical signal.
[0055] According to one embodiment, a bit mark cell may be formed of a conductive material when in a first state, and may have non-conductive characteristics when in a second state. For example, a bit mark cell set to the first state may include a metal material such as CU, and a bit mark cell set to the second state may be formed of a non-conductive material or may have an empty area of the cell.
[0056] According to one embodiment, the bit mark cell may be electrically connected to the processor (210) through a via. For example, during the PCB manufacturing process, a via may be formed in an area corresponding to the bit mark cell among areas where the graphic information code (300) is to be formed, to connect to a signal layer. In a subsequent process, information related to the PCB may be converted into digital data and formed into the graphic information code (300), and cells to which bits are assigned as 1 may be electrically connected to the processor (210) or the recognition circuit (250) through the via. Additionally, cells to which bits are assigned as 0 may be electrically opened.
[0057] According to one embodiment, the recognition circuit (250) may include a plurality of resistors having different resistance values. Each of the plurality of resistors of the recognition circuit (250) may be connected to a bit mark cell.
[0058] According to one embodiment, among the plurality of resistors of the recognition circuit (250), resistors connected to the bit mark cell in the first state may electrically form a parallel circuit. In addition, among the plurality of resistors of the recognition circuit (250), resistors connected to the bit mark cell in the second state may be electrically open. For example, among R1, R2, R3, and R4, which are respectively connected to four bit mark cells M1, M2, M3, and M4, resistors connected to the bit mark cell made of a conductive material in which the first state is recorded may be connected in parallel with each other.
[0059] According to one embodiment, the recognition circuit (250) may include a ground and a pull-down resistor disposed between the ground and the resistors connected in parallel.
[0060] The structure of bit mark cells and resistors connected thereto will be described in more detail with reference to FIGS. 7 to 9.
[0061] According to one embodiment, the processor (210) may apply power to the graphic information code (300). For example, the processor (210) may apply a predetermined voltage (e.g., 1.8 V) to a finder pattern of the graphic information code (300). The processor (210) may apply power to the graphic information code (300) and perform an operation of recognizing a state recorded in a bit mark cell when a predetermined event occurs. The event may be, for example, turning on the electronic device (200) or replacing an electrical component.
[0062] According to one embodiment, the processor (210) can recognize a state (e.g., a first state or a second state) recorded in a bit mark cell based on a voltage value recognized at a given node while power is applied. For example, the processor (210) can recognize a voltage value at a node between resistors connected in parallel and a pull-down resistor.
[0063] According to one embodiment, the processor (210) can determine whether each of the bit mark cells is in the first state or the second state based on the voltage value recognized at a given node. For example, resistors connected to cells in the first state (or bit 1) among the bit mark cells can form an equivalent resistance, and the voltage value recognized at the given node can depend on the formed equivalent resistance. That is, the voltage value recognized by the processor (210) can vary depending on the combination of states written in each bit mark cell.
[0064] According to one embodiment, the processor (210) can read data recorded in the graphic information code (300) based on the recognized voltage value. For example, the electronic device (200) can map the state (or bit), combination of bits, and / or characters of each bit mark cell corresponding to the voltage value of the corresponding node and store them in the memory (220), and when sensing the voltage value, can read data recorded in the graphic information code (300) using the information stored in the memory (220).
[0065] According to one embodiment, the processor (210) may provide data read from the graphic information code (300) to the user. For example, the processor (210) may provide device information through a display (not shown) on a settings menu, and may read information on electrical components of the electronic device (200) from the graphic information code (300) and provide the information to the user.
[0066] According to one embodiment, the graphic information code (300) may be arranged to overlap the first signal transmission line and the second signal transmission line of the PCB. In this case, the signal transmission paths of the first signal transmission line and the second signal transmission line may be changed through the cells in the first state among the cells of the graphic information code (300). This embodiment will be described in more detail with reference to FIG. 11.
[0067] According to various embodiments of the present document, the electronic device (200) can recognize data of graphic information codes (300) formed on electrical components without a separate recognition device. Accordingly, even when a user performs self-repair, such as replacing a component, outside of the manufacturing process of the electronic device (200), the processor (210) can recognize information on the replaced electrical component.
[0068] FIG. 3 illustrates a graphic information code arranged on a PCB of an electronic device according to one embodiment.
[0069] According to one embodiment, an electronic device (200) (e.g., the electronic device (200) of FIG. 2) may include various electrical components, and at least some of the electrical components may include a graphic information code (300) (e.g., the graphic information code (300) of FIG. 2). Referring to FIG. 3, a printed circuit board (PCB) (300) of the electronic device (200) may include a graphic information code (300). The position, size, and / or shape of the graphic information code (300) are not limited to those illustrated in FIG. 3.
[0070] According to one embodiment, the graphic information code (300) may be formed by printing or etching on the PCB (300). The graphic information code (300) has the advantage of being able to distinguish and define some features in a small area, and thus can be applied to various types of circuit boards.
[0071] According to one embodiment, the graphic information code (300) may be a two-dimensional (2D) barcode having a two-dimensional fixed shape (e.g., a square). In this document, the graphic information code (300) is described as being a data matrix, which is one of the 2D barcodes, but is not limited thereto, and the graphic information code (300) may also be implemented as a QR (quick response code), Aztec code, Maxi code, PDF417, or a one-dimensional barcode.
[0072] According to one embodiment, the graphic information code (300) may include a plurality of cells configured in a two-dimensional matrix form. Each cell may correspond to a specific bit (or state), and for example, if the bit of a specific cell is 0 (or low), it may be represented in white, and if it is 1 (or high), it may be represented in black. Data including letters, numbers, and / or symbols may be converted into white or black cells according to a set rule. Accordingly, when the graphic information code (300) is scanned by a reader device, the bits of each cell can be recognized, and from this, the data recorded in the graphic information code (300) can be recognized.
[0073] According to one embodiment, the graphic information code (300) may have various sizes, and the amount of data that can be recorded may vary depending on the size. Table 1 shows the specifications of the GS1 2D data matrix barcode.
[0074] Sample size Data capacity Numbers Alphanumeric characters / numbers 10 * 106312 * 1210616 * 16241620 * 20443124 * 24725232 * 321249140 * 40288214
[0075] According to one embodiment, various information related to a component to which the graphic information code (300) is attached may be recorded through the graphic information code (300). For example, the graphic information code (300) may record information such as the SMD of the component, production date, test date, and production site information.
[0076] Table 2 shows information of a PCB (300) that can be expressed through a graphic information code (300).
[0077] Category Company Code Year Month Day Lot No. Panel No. Array No. Unit No. Code M8418123456A4 Contents S Electric April 18, 2018 1234 Lot 56 Panel 11 Array Unit No.
[0078] Referring to Table 2 above, various pieces of information can be converted into codes (e.g., M, 8, 4, 18, 1234, 56, A, 4) according to established rules, and the codes can be recorded on a graphic information code (300) according to established rules.
[0079] According to various embodiments, in addition to the PCB (300) illustrated in FIG. 3, graphic information codes (300) including information of electrical components corresponding to at least some of the FPCB (flexible printed circuit board), battery, camera module, sensor, or various chipsets included in the electronic device (200) may be included.
[0080] In one embodiment, the graphic information code (300) may be configured with a conductive pattern. For example, among the cells of the graphic information code (300), cells with bit 1 (or high) may be configured with a conductive material, and cells with bit 0 (or low) may be configured with a non-conductive material or may be empty and thus have non-conductive characteristics. Accordingly, current may flow through cells with bit 1, and cells with bit 0 may be electrically open.
[0081] According to one embodiment, the graphic information code (300) may be electrically connected to a processor. The processor may apply power to the graphic information code (300) and, based on a voltage value recognized at a given node, recognize a state (or bit) recorded in at least some cells (e.g., bit mark cells) of the graphic information code (300).
[0082] Figures 4a, 4b and 4c illustrate graphic information codes according to one embodiment.
[0083] Figures 4a and 4b illustrate an example of a data matrix having a size of 16*16. The graphic information code (300) according to various embodiments of the present document is not limited to the illustrated content, and may be a data matrix of a different size as described in Table 1, or may be a different type of 2D barcode.
[0084] Referring to FIG. 4A, the edge area of the graphic information code (300) (e.g., the graphic information code (300) of FIG. 2) may include a synchronization pattern (320) and a finder pattern (310). For example, two sides that are connected to each other among four sides may be configured with the synchronization pattern (320), and the remaining two sides may be configured with the finder pattern (310). The finder pattern (310) may be used to specify the direction of the graphic information code (300), and the synchronization pattern (320) may be used to recognize the size and number of cells. The synchronization pattern (320) and the finder pattern (310) may also be used to recognize the boundary of the graphic information code (300) when scanning with a reader device.
[0085] All cells of the finder pattern (310) are assigned a value of 1, and the cells of the synchronization pattern (320) can be assigned by alternating 1 and 0. Data can be written to the data pattern (330) including the remaining cells (e.g., 14 * 14) excluding the synchronization pattern (320) and the finder pattern (310).
[0086] Referring to FIG. 4B, the data pattern (330) may be divided into blocks that include cells in which specific bits (e.g., 0 or 1) are recorded. In FIG. 4B, each block (e.g., block (410)) is illustrated as including eight cells, but the number of cells included in a block is not limited thereto. Data to be recorded in the graphic information code (300) may be converted into digital data and recorded in each block. For example, 01100011 may be recorded in block (410) located at the upper left of the data pattern (330).
[0087] Referring to FIG. 4c, at least some of the blocks of the data pattern (330) may be divided into two or more sub-blocks and arranged at positions spaced apart from each other. For example, block 1 (422, 424) including eight cells may include a sub-block (422) including two cells on the left side and a sub-block (424) including six cells on the right side. Accordingly, even if a portion of the data pattern (330) is damaged, the electronic device can read the data recorded in the graphic information code (300). The electronic device can sequentially read the data from the lower left to the upper right when the finder pattern (310) is arranged in an L-shape as shown in FIG. 4c.
[0088] According to one embodiment, data patterns (330) of graphic information codes (300) may be encoded using ASCII codes. The alphabets AZ can be represented in ASCII codes as shown in Table 3 below.
[0089] Character ASCII Binary (ASCII+1) Character ASCII Binary (ASCII+1) A9701100010N11001101111B9801100011O11101110000C9901100100P11201110001D10001100101Q11301110010E10101100110R11401110011F10201100111S11501 110100G10301101000T11601110101H10401101001U11701110110I10501101010V11801110111J10601101 011W11901111000K10701101100X12001111001L10801101101Y12101111010M10901101110Z12201111011
[0090] FIG. 5 illustrates a processor and graphic information code arranged on a PCB of an electronic device according to one embodiment.
[0091] According to one embodiment, the processor (210) may be mounted on a PCB (500). The processor (210) may be electrically connected to components (e.g., memory, GPU, PMIC, communication circuit, camera module, etc.) mounted on the PCB (500) or another PCB.
[0092] According to one embodiment, the processor (210) may be electrically connected to a graphic information code (300) (or 2D barcode) formed on a PCB (500).
[0093] According to one embodiment, the graphic information code (300) may include a plurality of cells in a two-dimensional matrix form. Among the cells of the graphic information code (300), a cell in which a first state (or bit 1) is recorded may include a conductive material, and a cell in which a second state (or bit 0) is recorded may be composed of a non-conductive material or may be empty and thus have non-conductive characteristics.
[0094] According to one embodiment, at least some cells (e.g., bit mark cells) among the cells of the graphic information code (300) may be formed with vias, and may be electrically connected to a signal layer (e.g., CU layer (copper layer)) of the PCB (500) through the vias. The processor (210) and the recognition circuit may be connected to the signal layer, thereby forming an electrical path with the graphic information code (300).
[0095] According to one embodiment, during the manufacturing process of the PCB (500), a via may be formed in an area corresponding to a bit mark cell among areas where a graphic information code (300) is to be formed, to connect to a signal layer. For example, the via may be formed in both cells assigned to a first state (or bit 1) and cells assigned to a second state (or bit 0) among the bit mark cells. In a subsequent process, information related to the PCB (500) may be converted into digital data and formed into the graphic information code (300). For example, a specific character may be converted into digital data and recorded in the graphic information code (300) according to an ASCII code (e.g., Table 3).
[0096] According to one embodiment, cells among the bit mark cells whose bits are assigned as 1 may be electrically connected to the processor (210) or the recognition circuit through a via. Additionally, cells whose bits are assigned as 0 may be electrically opened.
[0097] According to one embodiment, the processor (210) may include at least one pin connected to the graphic information code (300) (or recognition circuit). The processor (210) may supply an electrical signal (e.g., voltage) to a specific cell (e.g., cells of a finder pattern) of the graphic information code (300) through a specific pin, and may identify a bit (e.g., 0 or 1) of each cell of the graphic information code (300) based on the electrical signal (e.g., voltage) recognized through another pin. The processor (210) may identify data encoded in the graphic information code (300) based on the bit of each identified cell.
[0098] According to another embodiment, the processor (210) may include at least one pin directly connected to bit mark cells of the graphic information code (300).
[0099] FIGS. 6A and 6B illustrate a connection structure of a processor and a graphic information code according to one embodiment.
[0100] According to one embodiment, bit mark cells of a graphic information code (300) (e.g., graphic information code (300) of FIG. 2) may be electrically connected to a processor (210) through vias. According to one embodiment, a recognition circuit (250) (e.g., recognition circuit (250) of FIG. 2) may be disposed between the electrical path of the processor (210) (e.g., processor (210) of FIG. 2) and the graphic information code (300), and the recognition circuit (250) may include resistors each connected to the bit mark cells. The resistors may have different resistance values.
[0101] Referring to FIG. 6A, a processor (210) may be mounted on a PCB (500), which is an electrical component disposed inside an electronic device. A graphic information code (300) may be formed in one area of the PCB (500). The graphic information code (300) may be in the form of a two-dimensional matrix and may include cells that visually distinguish between a first state and a second state.
[0102] According to one embodiment, at least some of the cells of the graphic information code (300) may be assigned as bit mark cells. The bit mark cells may be connected to a signal layer (or CU layer) of the PCB (500) through vias, and may be connected to resistors of the recognition circuit (250) through the signal layer, respectively.
[0103] According to one embodiment, the processor (210) may include at least one pin connected to the recognition circuit (250). The processor (210) may sense a voltage of a specific node of the recognition circuit (250) through an electrical path including the pin. In addition, the electronic device may further include at least one pin for applying a voltage to a finder pattern of the graphic information code (300) (e.g., the finder pattern (310) of FIG. 4A).
[0104] According to one embodiment, the processor (210) can determine the state (or bit) of each bit mark cell based on the recognized voltage value. For example, resistors connected to bit mark cells in the first state (or bit 1) among the bit mark cells can form a parallel resistor, and the resistance value of the recognition circuit (250) can be determined accordingly. The processor (210) can recognize the resistance value of the parallel resistor by sensing the voltage value, and can recognize the state of each bit mark cell accordingly.
[0105] According to one embodiment, the processor (210) may include at least one pin each connected to at least one bit mark cell of the graphic information code (300).
[0106] Referring to FIG. 6B, each pin of the processor (210) may be electrically connected to the finder pattern and bit mark cells of the data pattern through the PCB (500). Electrical paths between the processor (210) and each cell may be implemented in a laminated form on the PCB (500). In the embodiment of FIG. 6B, a recognition circuit (250) including resistors (e.g., the recognition circuit (250) of FIG. 6A) may not be placed between the processor (210) and the graphic information code (300).
[0107] According to one embodiment, the processor (210) can recognize the state (or bit) of a bit mark cell based on an electrical signal recognized at each pin.
[0108] FIGS. 7A and 7B illustrate a portion of a graphic information code according to one embodiment.
[0109] Figures 7a and 7b illustrate 4*4 cells located at the upper left of the graphic information code of Figure 4a. In Figures 7a and 7b, the first column is a cell of a finder pattern (310), the first row is a cell of a synchronization pattern (320), and the remaining eight cells (712, 714, 716, 718, 722, 724, 726, 730) may be cells of a data pattern in which any one piece of data (e.g., a character or a number) may be recorded.
[0110] In one embodiment, the graphic information code comprises a plurality of blocks, each of which may contain data. For example, a particular block (700) may contain eight cells, in which case up to eight bits of data may be input through that block (700).
[0111] According to one embodiment, at least some cells in a particular block (700) may be designated as bit mark cells. A bit mark cell may be a cell that is electrically connected to a processor (e.g., processor (210) of FIGS. 2, 5, and 6) through a via, such that the processor can read a written bit. Referring to FIG. 7A, four cells may be designated as bit mark cells, M1 (712), M2 (714), M3 (716), and M4 (718).
[0112] According to one embodiment, bit mark cells may be electrically connected to a signal layer (e.g., a CU layer (copper layer)) of a PCB (e.g., PCB (500) of FIGS. 5 and 6) through vias. Referring to FIG. 7b, vias (752, 754, 756, 758) may be formed in bit mark cells M1 (712), M2 (714), M3 (716), and M4 (718), respectively, and no vias may be formed in the remaining cells. Accordingly, the processor may recognize bits written in bit mark cells M1 (712), M2 (714), M3 (716), and M4 (718) through vias (752, 754, 756, 758).
[0113] According to one embodiment, a bit mark cell may be connected to a recognition circuit through a via. The recognition circuit (e.g., the recognition circuit (250) of FIG. 2 and FIG. 6A) may include a plurality of resistors connected in parallel with each other, and each resistor may have a different resistance value. According to one embodiment, each bit mark cell may be connected to a respective resistor of the recognition circuit. Accordingly, when current is input from the processor, a bit among the bit mark cells may be assigned as 1, and the resistors connected to the bit mark cells made of a conductive material may be electrically connected to each other.
[0114] According to one embodiment, cells (722, 724, 726, 730) other than bit mark cells in block (700) may have fixed states (or bits). The cells (722, 724, 726, 730) may be recognized by the processor in a different way from bit mark cells (e.g., input with a fixed value, recognized based on checking the bits of other cells). A string AZ of ASCII code (e.g., Table 3) is 8-bit data, and the first three bits may start with the same bit (e.g., 011). Referring to FIG. 7A, even if fixed values of 0, 1, and 1 are set to cell 1 (722), cell 2 (724), and cell 3 (726), respectively, the string AZ of ASCII code may be encoded using bit mark cells (712, 714, 716, 718).
[0115] According to one embodiment, the bits of a bit mark cell can be determined based on the character to be input and a predetermined rule. Table 4 shows examples of ASCII codes that can be input with four bit marks.
[0116] C Cellbit Mark Cell Character M1M2M3M4C100CO PS TC1100WC1010Q UC1110YC1111Z10010E10011F10111N
[0117] According to one embodiment, the C cell (730) can have a fixed value of 0 or 1. Unlike the embodiments of FIGS. 7A and 7B, when the C cell (730) is assigned as a bit mark cell, more bits of data can be written in the corresponding block (700).
[0118] According to one embodiment, when cells to which bit 1 composed of a conductive material is assigned in a graphic information code are adjacent to each other, an electrical path can be formed. For example, when bit mark cells M1 (712) and M2 (714) are assigned bit 1, an electrical path can be formed from the finder pattern (310) to cell 3 (726), M1 (712), and M2 (714), and current can flow. In contrast, when M1 (712) is 0, M1 (712) is open, so that current may not flow to cell 3 (726) and M2 (714) with bit 1. When cell C (730) is set to 1, a path can be formed through which current flows to M3 (716) via cell C (730).
[0119] FIG. 8 illustrates a method for reading bits of each cell of a graphic information code according to one embodiment.
[0120] FIG. 8 illustrates a structure for verifying bits written in bit mark cells (712, 714, 716, 718) of FIGS. 7a and 7b.
[0121] In one embodiment, the processor may be powered via the finder pattern (310). For example, the cells of the finder pattern (310) may be configured with a conductive material, assigned bit 1, and electrically connected to the processor such that a voltage applied by the processor may be formed on the finder pattern (310). When an event occurs (e.g., when the electronic device is turned on), the processor may supply a predetermined voltage value (e.g., 1.8 V) to the finder pattern (310).
[0122] According to one embodiment, a bit mark cell may be connected to a recognition circuit (e.g., recognition circuit (250) of FIG. 2) through a via (e.g., vias (752, 754, 756, 758) of FIG. 7B). The recognition circuit may include a plurality of resistors connected in parallel with each other, each resistor having a different resistance value. According to one embodiment, each bit mark cell may be connected to a respective resistor of the recognition circuit.
[0123] Referring to FIG. 8, M1 (712) may be connected to R1 (812), M2 (714) may be connected to R2 (814), M3 (716) may be connected to R3 (816), and M4 (718) may be connected to R4 (818). R1 (812) to R4 (818) may be connected in parallel with each other and may have different resistance values. Among the bit mark cells (712, 714, 716, 718), a cell in which the bit is 1 (or the first state) is made of a conductive material and is electrically connected to a recognition circuit, and a cell in which the bit is 0 (or the second state) has a non-conductive characteristic and may be circuit-opened. For example, when M1 (712) is 1, current can flow to M1 (712) through R1 (812) by the voltage input to the finder pattern (310).
[0124] According to one embodiment, the parallel circuit of R1 (812) to R4 (818) can be connected to a pull-down resistor (Rd) that is connected to ground.
[0125] According to one embodiment, an equivalent resistance of at least one resistor connected to at least one cell whose bit is 1 among the bit mark cells may be formed. For example, when M1 (712) and M2 (714) are 1 and M3 (716) and M4 (718) are 0, an equivalent resistance connected in parallel to each other may be formed. R1 (812) to R4 (818) have different resistances, and the equivalent resistance determined according to the combination of bit mark cells whose bit is 1 may also have different values.
[0126] According to one embodiment, the processor can identify the bit of each bit mark cell based on the resistance value of the recognition circuit. For example, the processor can measure the voltage value (Vmark) of the node (830) between the parallel circuit of R1 (812) to R4 (818) and the pull-down resistor Rd, and identify the bit of the bit mark cells corresponding to Vmark. Since the cells of the bit mark cells whose bit is 0 are circuit-open, and the resistors connected to the cells whose bit is 1 form a parallel circuit, the voltage formed at a specific node (830) of the recognition circuit can depend on the data written in the bit mark cells.
[0127] FIG. 9 illustrates a circuit structure connected to some cells of a graphic information code according to one embodiment.
[0128] According to one embodiment, the graphic information code includes a plurality of bit mark cells, each of which may be connected to resistors of the recognition circuit. Referring to FIG. 9, bit mark cells M1 (712), M2 (714), M3 (716), and M4 (718) may be connected to R1 (812), R2 (814), R3 (816), and R4 (818), respectively.
[0129] According to one embodiment, among the resistors R1 (812), R2 (814), R3 (816), and R4 (818) of the recognition circuit, the resistors connected to the bit mark cell in the first state may be electrically connected in parallel with each other. Among the resistors, the resistor connected to the bit mark cell in the second state may be electrically open.
[0130] According to one embodiment, the recognition circuit may include resistors R1 (812), R2 (814), R3 (816), and R4 (818) connected in parallel, and a pull-down resistor Rd (910) disposed between the ground (920). The processor (210) may apply a specific voltage value (e.g., 1.8 V) to the finder pattern (310) and sense a voltage value of a Vmark node between the parallel resistors and the pull-down resistor.
[0131] According to one embodiment, the processor (210) can determine whether each of the bit mark cells M1 (712), M2 (714), M3 (716), and M4 (718) is in a first state (or bit 1) or a second state (or bit 0) based on the recognized voltage value Vmark. The processor (210) can read data written in the graphic information code based on the recognized voltage value Vmark.
[0132] For example, if the bit of M1 (712) is 1 and the bits of M2 (714), M3 (716) and M4 (718) are 0, R2 (814), R3 (816) and R4 (818) are open, so that a voltage distributed by R1 (812) and Rd can be formed at the Vmark node. This can be expressed by the following mathematical expression 1.
[0133] Vmark1 = (Rd / (R1+Rd))*V ----- (Equation 1)
[0134] In the above mathematical expression 1, R1 (812), R4 (818) and V are constants, so the measured Vmark1 can have a fixed value.
[0135] Also, for example, if the bits of M1 (712) and M2 (714) are 1 and the bits of M3 (716) and M4 (718) are 0, R3 (816) and R4 (818) are open, so the equivalent resistance of the parallel resistors can be R1 (812) / R2 (814). Accordingly, a voltage distributed between the parallel resistors of R1 (812) and R2 (814) and Rd can be formed at the Vmark node. This can be expressed by the following mathematical expression 2.
[0136] Vmark12 = (Rd*(R1+R2)) / (R1*R2+R1*Rd+R2*Rd)*V ----- (Equation 2)
[0137] In the above mathematical expression 2, R1 (812), R2 (814), R4 (818) and V are constants, so the measured Vmark1 can have a fixed value.
[0138] According to one embodiment, since R1 (812), R2 (814), R3 (816), and R4 (818) have different resistance values, the voltage values sensed at the Vmark node may have different values depending on the combination of states (or bits) of each bit mark cell. Accordingly, the processor (210) can recognize the bits written to the bit mark cells M1 (712), M2 (714), M3 (716), and M4 (718) based on the sensed voltage values.
[0139] FIG. 10 illustrates an example of displaying data included in a graphic information code according to one embodiment on an electronic device.
[0140] According to one embodiment, an electronic device (e.g., the electronic device (200) of FIG. 2) may provide device information (1000) of the electronic device on a settings menu. Referring to FIG. 10, the electronic device may provide network information (1010), status information (1020), battery information (1030), hardware information (1040), and / or software information (1050) as the device information (1000).
[0141] According to one embodiment, the electronic device can recognize data of graphic information codes (e.g., graphic information code (300) of FIG. 2) arranged in each component when turned on. Accordingly, even when a component of the electronic device is replaced, the processor can read and utilize the graphic information code of the replaced component.
[0142] According to one embodiment, the electronic device can obtain recorded data by recognizing graphic information codes placed on each component to obtain device information (1000) to be provided via a settings menu. A method for obtaining data recorded in graphic information codes has been described in detail above with reference to FIGS. 7 to 9 .
[0143] According to one embodiment, the electronic device can recognize data of a graphic information code placed on a battery and provide information such as a model name, production date, and production site in battery information (1030).
[0144] According to one embodiment, the electronic device can recognize data of graphic information codes placed on components such as PCBs, FPCBs, and camera modules, and provide information such as the model name, production date, and production site of each component through hardware information (1040).
[0145] FIG. 11 illustrates a structure for switching a signal transmission path using a graphic information code according to one embodiment.
[0146] According to one embodiment, the graphic information code (300) may be placed on a PCB (1100). The PCB (1100) may include a plurality of signal transmission lines that form electrical paths between various mounted electrical components.
[0147] According to one embodiment, the graphic information code (300) may be arranged to overlap the first signal transmission line (1110) and the second signal transmission line (1120). In this case, the signal transmission paths of the first signal transmission line (1110) and the second signal transmission line (1120) may be changed through cells in the first state among the cells of the graphic information code (300).
[0148] Referring to FIG. 11, a first signal transmission line (1110) and a second signal transmission line (1120) are formed on a PCB (1100), and a graphic information code (300) may be arranged to overlap the first signal transmission line (1110) and the second signal transmission line (1120). The graphic information code (300) includes a plurality of cells, and the cells in which the first state (or bit 1) is recorded may be made of a conductive material, and the cells in which the second state (or bit 0) is recorded may have a non-conductive characteristic. Accordingly, cells in the first state (or cells made of a conductive material) adjacent to each other may form an electrical path.
[0149] According to one embodiment, some cells of the data area of the graphic information code (300) may be configured to switch the transmission path of the electrical signal.
[0150] According to one embodiment, an electrical signal transmitted along a first signal transmission line (1110) may be transmitted to a second signal transmission line (1120) via an electrical path formed through cells in a first state on a graphic information code (300). In addition, an electrical signal transmitted along a second signal transmission line (1120) may be transmitted to a first signal transmission line (1110) via an electrical path formed through cells in a first state on a graphic information code (300).
[0151] According to this embodiment, the signal transmission path can be changed by adding a graphic information code (300) without changing the design of the signal transmission line formed on the PCB (1100).
[0152] An electronic device according to various embodiments of the present document includes one or more storage media, a memory for storing instructions, at least one processor including a processing circuit, and an electrical component disposed inside the electronic device, and a graphic information code (300) for visually expressing information related to the electrical component can be formed on the electrical component.
[0153] According to one embodiment, the graphic information code includes a plurality of cells that can be visually represented as a first state or a second state, and a bit mark cell included in the plurality of cells can be formed of a conductive material when in the first state and have a non-conductive characteristic when in the second state.
[0154] According to one embodiment, the instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to apply power to the graphic information code and, based on a voltage value recognized at a given node, recognize a state written to the bit mark cell.
[0155] According to one embodiment, the bit mark cell may be electrically connected to the processor through a via.
[0156] According to one embodiment, the graphic information code includes a plurality of bit mark cells, and the electronic device may further include a recognition circuit including resistors each connected to the bit mark cells and having different resistance values.
[0157] According to one embodiment, among the resistors of the recognition circuit, the resistors connected to the bit mark cell in the first state can be connected in parallel with each other.
[0158] According to one embodiment, among the resistors of the recognition circuit, a resistor connected to the bit mark cell in the second state can be electrically opened.
[0159] According to one embodiment, the recognition circuit further includes a pull-down resistor disposed between ground and the resistors connected in parallel, and the instructions may cause the electronic device to recognize a voltage value of a node between the resistors and the pull-down resistor.
[0160] According to one embodiment, the instructions may cause the electronic device to determine whether each of the bit mark cells is in the first state or the second state based on the recognized voltage value.
[0161] According to one embodiment, the instructions may cause the electronic device to read data written in the graphic information code based at least in part on the recognized voltage value.
[0162] In one embodiment, the instructions may cause the electronic device to apply power to a finder pattern disposed at an edge of the graphic information code.
[0163] In one embodiment, the instructions cause the electronic device to, upon occurrence of a predetermined event, power the graphic information code and recognize a state written to the bit mark cell, wherein the event may include turning on the electronic device.
[0164] According to one embodiment, the processor includes at least one pin, each of which can be connected to at least one bit mark cell of the graphic information code.
[0165] In one embodiment, the electrical component may be a printed circuit board (PCB).
[0166] According to one embodiment, the graphic information code can be formed on the PCB by removing an area of cells corresponding to the second state from a layer of the PCB made of a conductive material.
[0167] According to one embodiment, the graphic information code is arranged to overlap the first signal transmission line and the second signal transmission line of the PCB, and the path of the first signal transmission line and the second signal transmission line can be changed through the cells in the first state of the graphic information code.
[0168] In one embodiment, the electrical component may be a battery.
[0169] According to one embodiment, the graphic information code may be in the form of a two-dimensional matrix.
[0170] According to one embodiment, the graphic information code may be any one of a data matrix and a QR code.
[0171] According to one embodiment, the cell in the first state and the cell in the second state can be visually distinguished.
[0172] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.
[0173] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.
[0174] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).
[0175] Various embodiments of the present document may be implemented as software (e.g., a program (140)) including one or more instructions stored in a storage medium (e.g., an internal memory (136) or an external memory (138)) readable by a machine (e.g., an electronic device (101)). For example, a processor (e.g., a processor (120)) of the machine (e.g., an electronic device (101)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.
[0176] According to one embodiment, the method according to various embodiments disclosed in this document may be provided as included in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.
[0177] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separately arranged in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.
Claims
1. In an electronic device (200), A memory comprising one or more storage media and storing instructions; At least one processor (210) comprising a processing circuit; and It includes an electrical component arranged inside the electronic device, A graphic information code (300) is formed on the electrical component to visually express information related to the electrical component, The above graphic information code includes a plurality of cells that can be visually represented as a first state or a second state, The bit mark cell included in the above plurality of cells is formed of a conductive material in the first state and has a non-conductive characteristic in the second state. The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Power on the above graphic information code, An electronic device that recognizes a state recorded in a bit mark cell based on a voltage value recognized at a given node.
2. In paragraph 1, The above bit mark cell is an electronic device electrically connected to the processor through a via.
3. In paragraph 1, The above graphic information code includes a plurality of bit mark cells, An electronic device further comprising a recognition circuit including resistors each connected to the bit mark cells and having different resistance values.
4. In paragraph 3, An electronic device in which the resistors of the above recognition circuit, among the resistors connected to the bit mark cell in the first state, are connected in parallel with each other.
5. In paragraph 4, An electronic device in which the resistor connected to the bit mark cell, which is the second state, among the resistors of the above recognition circuit is electrically open.
6. In paragraph 4, The above recognition circuit, Further comprising a pull-down resistor placed between the ground and the resistors connected in parallel, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: recognize a voltage value of a node between the resistors and the pull-down resistor.
7. In paragraph 1, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: An electronic device that determines whether each of the bit mark cells is in the first state or the second state based on the recognized voltage value.
8. In paragraph 1, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: An electronic device for reading data recorded in the graphic information code, at least in part based on the recognized voltage value.
9. In paragraph 1, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: An electronic device that applies power to a finder pattern arranged at an edge of the graphic information code.
10. In paragraph 1, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: When a predetermined event occurs, power is supplied to the graphic information code, and the state recorded in the bit mark cell is recognized. The above event comprises an electronic device comprising a turn-on of the electronic device.
11. In paragraph 1, The above processor, Contains at least one pin, An electronic device wherein at least one of the pins is respectively connected to at least one bit mark cell of the graphic information code.
12. In paragraph 1, The above electrical component is an electronic device that is a printed circuit board (PCB).
13. In paragraph 12, An electronic device formed on the PCB by removing an area of cells corresponding to the second state from a layer composed of a conductive material of the PCB, wherein the graphic information code is formed on the PCB.
14. In paragraph 1, The above graphic information code is arranged to overlap the first signal transmission line and the second signal transmission line of the PCB, and An electronic device in which the paths of the first signal transmission line and the second signal transmission line are changed through the cells of the first state of the graphic information code.
15. In paragraph 1, An electronic device in which the cell in the first state and the cell in the second state are visually distinct.
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