Chalcogenide-based switching device, and storage device comprising same

Abstract

The present invention relates to a chalcogenide-based switching device, and a storage device comprising same. The chemical general formula of the chalcogenide is (SxSeyTe100-x-y)100-zMz, wherein M is one or more of Sb, Sn, Si, Ge, Bi, Pb, ln, Ga, As, C, P, and N, and x, y, and z satisfy 0≤x≤100, 0≤y≤100, and 10≤z≤90. The switching device and the storage device of the present invention have extremely low power consumption, a high operation speed, a low leakage current and a high integration density, and can be used for manufacturing high-density and three-dimensional mass memories.

Description

Switching device based on a kind of chalcogenide compound and its storage equipment TECHNICAL FIELD

[0001] The present application belongs to the field of micro-nano electronics, and particularly relates to a switching device based on a kind of chalcogenide compound and its storage equipment. BACKGROUND

[0002] The data throughput increases dramatically in the era of big data and artificial intelligence, and the introduction of a compute express link (CXL) interconnect is needed to address the limitations faced by information storage in terms of bandwidth, latency, and scalability. New storage technologies are urgently needed to fill the gap between the compute system main memory dynamic random access memory (DRAM) and the system storage medium NAND flash in traditional high-performance computing systems based on CXL. Among the numerous new types of memory, self-selecting memory (SSM) is considered an effective solution for CXL storage technology due to its high density, fast operating speed, long service life, and low power consumption. Unlike traditional memory, which requires additional switching units, self-selecting memory allows bidirectional threshold switching (OTS) to perform switching and storage operations simultaneously. Without the need for additional switching, the aspect ratio of self-selecting memory can be further miniaturized to meet the needs of high-density storage, making it a promising new type of storage device. TECHNICAL PROBLEM

[0003] The technical problem to be solved by the present application is to provide a switching device based on a kind of chalcogenide compound and its storage equipment, which has extremely low power consumption, fast operating speed, low leakage current, and a preparation method compatible with CMOS process, and can be used for the manufacture of high-density and three-dimensional mass storage. TECHNICAL SOLUTION

[0004] The present application provides a switching device based on a kind of chalcogenide compound, the chemical formula of which is (S x Se y Te 100-x-y ) 100-z M z , wherein M is one or more of Sb, Sn, Si, Ge, Bi, Pb, In, Ga, As, C, P, N, x, y, z satisfy 0≤x≤100, 0≤y≤100, 10≤z≤90.

[0005] Further, the switching device comprises:

[0006] a lower electrode layer;

[0007] an upper electrode layer;

[0008] a chalcogenide material layer located between the lower electrode layer and the upper electrode layer.

[0009] Further, the thickness of the chalcogenide compound material layer is 5-50 nm.

[0010] Further, the material of the lower electrode layer comprises one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu, Ni.

[0011] Further, the material of the upper electrode layer is one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu, Ni.

[0012] Further, the switching device realizes instantaneous transition from high resistance state to low resistance state under the action of external electric field, and realizes instantaneous transition from low resistance state to high resistance state when the external electric field is removed.

[0013] The application also provides a preparation method of the switching device based on the chalcogenide compound, comprising the following steps:

[0014] S1: forming a lower electrode layer;

[0015] S2: forming a chalcogenide compound material layer on the lower electrode layer, the chemical general formula of the chalcogenide compound is (S x Se y Te 100-x-y ) 100-z M z , wherein M is one or more of Sb, Sn, Si, Ge, Bi, Pb, In, Ga, As, C, P, N, x, y, z satisfy 0≤x≤100, 0≤y≤100, 10≤z≤90;

[0016] S3: forming an upper electrode layer on the chalcogenide compound material layer;

[0017] S4: forming a lead-out electrode on the upper electrode layer.

[0018] Further, the method for forming the chalcogenide compound material layer on the lower electrode layer comprises sputtering method, chemical vapor deposition method, atomic layer deposition method or electron beam evaporation method.

[0019] The application also provides a storage device comprising a storage unit, wherein the storage unit comprises the switching device.

[0020] Further, the on-current is greater than or equal to 10 -7 A, the switching ratio is greater than or equal to 2, the threshold voltage is less than or equal to 10V, the maximum cycle number is greater than or equal to 100 times, and the threshold voltage window after the polarity of the applied voltage is changed is greater than or equal to 0.2V. Advantages

[0021] The switching device of the present application can realize instantaneous conversion from high resistance state to low resistance state under the action of external electric field when the voltage reaches threshold voltage, and can immediately change from low resistance state to high resistance state when the external energy is removed. Meanwhile, the switching device prepared based on the sulfide compound provided by the present application has a threshold voltage required for the first opening obviously higher than the threshold voltage required for subsequent opening after the direction of applied voltage is changed. By changing the voltage direction, the high resistance state and low resistance state information can be read by pulses with unchanged direction and size, and a brand new storage device can be prepared by using this principle. The switching device and storage device prepared based on the sulfide compound have extremely low power consumption, fast operation speed and low leakage current, and the preparation method of the switching unit and storage device of the present application is compatible with CMOS process. The reduction of material leakage current helps the continuous miniaturization of storage processing technology with CMOS technology node, is conducive to the processing of the device, and at the same time improves the yield, performance consistency and reliability of the storage array, greatly helps the manufacturing of high-density and three-dimensional mass storage. BRIEF DESCRIPTION OF DRAWINGS

[0022] Fig. 1 is an IV characteristic curve diagram of the storage device based on the sulfide compound provided in Example 1;

[0023] Fig. 2 is a fatigue characteristic diagram of the storage device based on the sulfide compound provided in Example 1;

[0024] Fig. 3 is an IV characteristic curve diagram of the storage device based on the sulfide compound provided in Example 2;

[0025] Fig. 4 is a fatigue characteristic diagram of the storage device based on the sulfide compound provided in Example 2. BEST MODE FOR CARRYING OUT THE INVENTION

[0026] A kind of sulfide compound provided by the present application is introduced as follows, the chemical general formula of the sulfide compound is (S x Se y Te 100-x-y ) 100-z M z Wherein M is one or more of Sb, Sn, Si, Ge, Bi, Pb, In, Ga, As, C, P, N, x, y, z satisfy 0≤x≤100, 0≤y≤100, 10≤z≤90;

[0027] In the embodiment, the sulfide compound can be a bidirectional threshold switch type switching material.

[0028] In the embodiment, the sulfide compound can realize instantaneous conversion from high resistance state to low resistance state under the action of external electric field, and can realize instantaneous conversion from low resistance state to high resistance state when the external electric field is removed.

[0029] In an embodiment, the on / off current ratio of the chalcogenide compound can be greater than or equal to 2.

[0030] Preferably, the on / off current ratio of the chalcogenide compound can be greater than or equal to 3.

[0031] Preferably, the on / off current ratio of the chalcogenide compound can be greater than or equal to 2 and less than or equal to 10.

[0032] Preferably, the on / off current ratio of the chalcogenide compound can be greater than or equal to 3 and less than or equal to 9.

[0033] In an embodiment, the thickness of the chalcogenide compound is 5 nm to 50 nm.

[0034] In an embodiment, the chalcogenide compound can be synthesized by methods including but not limited to sputtering, chemical vapor deposition, atomic layer deposition, or electron beam evaporation.

[0035] In an embodiment, the chalcogenide compound can be synthesized by using a single target co-sputtering method or an alloy target sputtering method.

[0036] In an embodiment, the chalcogenide compound material can be synthesized by a co-sputtering method using a Bi2Se3 target and a GeSe target.

[0037] Thus, the present application provides a (S x Se y Te 100-x-y ) 100-z M z The chalcogenide compound material can overcome the shortcoming that PCM storage units need additional series switching units, and can exhibit excellent comprehensive performance by adjusting the content of the doping element M.

[0038] The switching unit provided by the present application is described below, and the switching unit comprises:

[0039] a lower electrode layer;

[0040] an upper electrode layer;

[0041] a chalcogenide compound material layer located between the lower electrode layer and the upper electrode layer, and comprising the chalcogenide compound material described above.

[0042] In an embodiment, preferably, the thickness of the chalcogenide compound material layer is 5 nm to 50 nm.

[0043] In an embodiment, preferably, the thickness of the upper electrode layer is 5 nm to 50 nm.

[0044] In an embodiment, preferably, the thickness of the lower electrode layer is 5 nm to 50 nm.

[0045] In embodiments, the material of the upper electrode layer can be one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu, and Ni.

[0046] In embodiments, the material of the lower electrode layer can be one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu, and Ni.

[0047] In embodiments, the turn-on current I on of the switching unit can be greater than or equal to 10 -7 A; the threshold voltage V th of the switching unit can be less than or equal to 10V; the leakage current I off of the switching unit can be less than or equal to 10 -7 A; the maximum number of cycles of the switching unit can be greater than or equal to 10 4 times; and the on-off ratio of the switching unit can be greater than or equal to 2.

[0048] Preferably, the turn-on current I on of the switching unit can be greater than or equal to 10 -6 A; the leakage current I off of the switching unit can be less than or equal to 10 -7 A; the threshold voltage V th of the switching unit can be less than or equal to 5V; the maximum number of cycles of the switching unit can be greater than or equal to 10 5 times; and the on-off ratio of the switching unit can be greater than or equal to 3.

[0049] Preferably, the turn-on current I on of the switching unit can be greater than or equal to 10 -3 A, the on-off ratio of the switching unit can be greater than or equal to 5, and the leakage current I off of the switching unit can be less than or equal to 10 -9 A.

[0050] Preferably, the threshold voltage V th of the switching unit can be 1V, 2V, 3V, 4V, 5V, 6V, 7V, 8V, or 9V.

[0051] Preferably, the on-off ratio of the switching unit can be greater than or equal to 3 and less than or equal to 9.

[0052] Preferably, the on-to-off ratio of the switching unit can be 4, 5, 6, 7, or 8.

[0053] A preparation method of a switching unit based on a chalcogenide compound is provided, which comprises the following steps:

[0054] S1: forming the lower electrode layer;

[0055] S2: forming a chalcogenide material layer on the lower electrode layer, the chemical formula of the chalcogenide being (S x Se y Te 100-x-y ) 100-z M z , wherein M is one or more of Sb, Sn, Si, Ge, Bi, Pb, In, Ga, As, C, P, N, x, y, z satisfying 0≤x≤100, 0≤y≤100, 10≤z≤90;

[0056] S3: forming the upper electrode layer on the material layer;

[0057] S4: forming the lead electrode on the upper electrode layer.

[0058] In embodiments, the shape of the switching unit and the storage device includes but is not limited to a columnar structure or a strip structure with a lower electrode layer / chalcogenide material layer / upper electrode layer. The present application does not limit the shape of the switching unit and the storage device.

[0059] In embodiments, the material of the lower electrode layer can be one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu and Ni; the material of the upper electrode layer can be one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu and Ni.

[0060] In embodiments, preferably, the thickness of the chalcogenide material layer can be 5 nm-50 nm.

[0061] Preferably, the thickness of the chalcogenide material layer can be 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm or 45 nm, etc.

[0062] In embodiments, preferably, the diameter of the lower electrode layer can be 5-200 nm.

[0063] In embodiments, preferably, the diameter of the upper electrode layer can be 5-200 nm.

[0064] In embodiments, the deposition of the chalcogenide material layer film on the surface of the lower electrode layer can include but is not limited to the deposition of the chalcogenide material layer film on the surface of the lower electrode layer by sputtering, chemical vapor deposition, atomic layer deposition or electron beam evaporation.

[0065] Preferably, the sputtering can be a magnetron sputtering.

[0066] In an embodiment, the surface of the lower electrode layer is deposited to form a thin film of the chalcogenide material layer can include: using a single target co-sputtering method or alloy target sputtering method to deposit the thin film of the chalcogenide material layer on the surface of the lower electrode layer.

[0067] In an embodiment, the thin film of the chalcogenide material layer can be deposited by using a Bi2Se3 target, a GeSe target, and a single target co-sputtering method.

[0068] In another embodiment, the thin film of the chalcogenide material layer can be deposited by using an In target, a GeSe target, and a single target co-sputtering method.

[0069] In an embodiment, the method for preparing the upper electrode layer and the lower electrode layer can include, but is not limited to, physical vapor deposition, chemical vapor deposition, electron beam evaporation, molecular beam epitaxy, etc.

[0070] Further, the method for forming the upper electrode layer on the upper surface of the chalcogenide material layer can include, but is not limited to, sputtering, evaporation, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), metal compound vapor deposition (MOCVD), molecular beam epitaxy (MBE), atomic vapor deposition (AVD), or atomic layer deposition (ALD), etc.

[0071] Further, the method for forming the lower electrode layer on the substrate can include, but is not limited to, sputtering, evaporation, CVD, PECVD, LPCVD, MOCVD, MBE, AVD, or ALD, etc.

[0072] The present application also provides a storage device including a storage unit comprising the switching device. Embodiment of the present application

[0073] Embodiment 1

[0074] The present embodiment provides a preparation method of a switching unit and a storage device based on a type of chalcogenide compound, including the following steps:

[0075] S1: Forming the lower electrode layer. The lower electrode layer can be prepared by any one of sputtering, evaporation, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), atomic vapor deposition (AVD), or atomic layer deposition (ALD). In this embodiment, the lower electrode layer is preferably prepared by magnetron sputtering. The material of the lower electrode layer can include any one of W, Pt, Au, Ti, Al, Ag, Cu, and Ni, or an alloy of any two or more of the above-mentioned single metal materials, or a nitride or oxide containing one of the above-mentioned single metal materials. In this embodiment, the material of the lower electrode layer is preferably TiN. The diameter of the TiN lower electrode layer prepared by magnetron sputtering is one of 60 nm, 120 nm, 150 nm, and 200 nm, and the height is 200 nm.

[0076] S2: Depositing a 20-nm-thick chalcogenide material layer on the lower electrode layer by co-sputtering of a Bi2Se3 target and a GeSe target using magnetron sputtering. The chemical formula of the chalcogenide material is Ge 30 Bi 10 Se 60 ;

[0077] S3: Forming the upper electrode layer on the chalcogenide material layer. The upper electrode layer can be prepared by any one of sputtering, evaporation, chemical vapor deposition, plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy, atomic vapor deposition, or atomic layer deposition. The material of the upper electrode layer can include any one of single metal materials W, Pt, Au, Ti, Al, Ag, Cu, and Ni, or an alloy of any two or more of the above-mentioned single metal materials, or a nitride or oxide containing one of the above-mentioned single metal materials.

[0078] S4: preparing a lead-out electrode on the upper electrode layer, as an example, the lead-out electrode can be prepared by any one of sputtering method, evaporation method, chemical vapor deposition method, plasma enhanced chemical vapor deposition method, low pressure chemical vapor deposition method, metal compound vapor deposition method, molecular beam epitaxy method, atomic vapor deposition method or atomic layer deposition method. In this way, the upper and lower electrode layers can be integrated with other elements such as storage cells, drive circuits and peripheral circuits in the storage device through the lead-out electrode, so as to prepare a complete storage device, and the processing method adopted is a conventional semiconductor process.

[0079] As an example, the material of the lead-out electrode can include any one of single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni, or an alloy material composed of any two or more of the above single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni, or a nitride or oxide containing one of the above single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni.

[0080] Preferably, in the embodiment, the lead-out electrode is prepared by a magnetron sputtering method, and the material is Al, and the film thickness of the prepared lead-out electrode is 200 nm.

[0081] The voltage-current curve of the storage device obtained by electrical test is shown in FIG. 1. As shown in FIG. 1, after the polarity of the operating voltage is changed, when the voltage applied on the storage device is less than about 2V, the storage device is in a high resistance state; when the voltage applied on the storage device exceeds the high state threshold voltage (about 3V), the storage device is instantaneously turned on and becomes a low resistance state, and the current passing through the storage device sharply increases to 10 -3 A; when the voltage applied on the storage device is removed, the storage device instantaneously returns to the high resistance state, and the current passing through the storage device sharply decreases. As shown in FIG. 2, the storage device can be stably cycled more than 10 times.

[0082] It should be noted that the sulfide compound material layer can be formed by, but not limited to, a magnetron sputtering method.

[0083] It should be noted that the thickness of the sulfide compound material layer can be set according to actual needs, preferably, the thickness of the material layer can be 5 nm to 50 nm, more preferably, in the embodiment, the thickness of the material layer is 20 nm.

[0084] It should be noted that the upper electrode material can include but is not limited to one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu and Ni. The lower electrode material can include but is not limited to one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu and Ni.

[0085] In this embodiment, the turn-on current I on ≥10 -4 A, the switching ratio of the storage device is greater than or equal to 3, the leakage current I off ≤10 -7 A, the voltage window ΔV th ≤ 0.5V, and the device can be stably cycled more than 10 times.

[0086] Embodiment 2

[0087] The embodiment provides a preparation method of a switching unit and a storage device based on a type of chalcogenide compound, including the following steps:

[0088] S1: Forming the lower electrode layer. Any one of sputtering method, evaporation method, chemical vapor deposition method (CVD), plasma enhanced chemical vapor deposition method (PECVD), low pressure chemical vapor deposition method (LPCVD), metal compound vapor deposition method (MOCVD), molecular beam epitaxy method (MBE), atomic vapor deposition method (AVD) or atomic layer deposition method (ALD) can be used to prepare the lower electrode layer, and the embodiment preferably uses a magnetron sputtering method to prepare the lower electrode layer. The material of the lower electrode layer can include, for example, any one of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or an alloy material composed of any two or more of the above-mentioned single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni, or a nitride or oxide containing one of the above-mentioned single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni. In this embodiment, the material of the lower electrode layer is preferably TiN, and the diameter of the electrode of the TiN lower electrode layer prepared by the magnetron sputtering method is one of 60 nm, 120 nm, 150 nm and 200 nm, and the height is 200 nm.

[0089] S2: Using a magnetron sputtering method, selecting ln target material and GeSe target material for co-sputtering to deposit a chalcogenide material layer film with a thickness of 20 nm on the lower electrode layer, and the chemical general formula of the chalcogenide material is ln 30 Ge 10 Se 60 ;

[0090] S3: Forming the upper electrode layer on the chalcogenide compound material layer. The upper electrode layer can be prepared by any one of sputtering, evaporation, chemical vapor deposition, plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, metal compound vapor deposition (MOCVD), molecular beam epitaxy, atomic vapor deposition or atomic layer deposition. The material of the upper electrode layer can include any one of single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni, or an alloy material composed of any two or more of the above single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni, or a nitride or oxide containing one of the above single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni.

[0091] S4: Preparing a lead-out electrode on the upper electrode layer. The lead-out electrode can be prepared by any one of sputtering, evaporation, chemical vapor deposition, plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, metal compound vapor deposition, molecular beam epitaxy, atomic vapor deposition or atomic layer deposition. In this way, the upper and lower electrode layers can be integrated with other elements such as memory cells, drive circuits and peripheral circuits in the storage device through the lead-out electrode, so that a complete storage device is prepared, and the processing method is a conventional semiconductor process.

[0092] For example, the material of the lead-out electrode can include any one of single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni, or an alloy material composed of any two or more of the above single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni, or a nitride or oxide containing one of the above single metal materials W, Pt, Au, Ti, Al, Ag, Cu and Ni.

[0093] In this embodiment, the lead-out electrode 5 is preferably prepared by magnetron sputtering, and the material is Al. The film thickness of the prepared lead-out electrode is 200 nm.

[0094] The voltage-current curve of the storage device obtained by electrical test is shown in FIG. 3. As shown in FIG. 3, after the polarity of the operating voltage is changed, when the voltage applied on the storage device is less than about 1.5 V, the storage device is in a high resistance state; when the voltage applied on the storage device exceeds the high state threshold voltage (about 2 V), the storage device is instantaneously turned on and becomes a low resistance state, and the current passing through the storage device sharply increases to 10 -3A; when the voltage applied on the storage device is removed, the storage device returns to high resistance state again, and the current through the storage device decreases sharply. As shown in FIG. 4, the storage device can be stably cycled more than 10 times.

[0095] It should be noted that the chalcogenide material layer can be formed by, but not limited to, magnetron sputtering method.

[0096] It should be noted that the thickness of the chalcogenide material layer can be set according to actual needs, preferably, the thickness of the material layer can be 5nm-50nm, more preferably, in the embodiment, the thickness of the material layer is 20nm.

[0097] It should be noted that the upper electrode material can include, but not limited to, one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu and Ni. The lower electrode material can include, but not limited to, one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu and Ni.

[0098] In the embodiment, the turn-on current I on ≥10 -4 A, the on-off ratio of the storage device is greater than or equal to 3, and the leakage current I off ≤10 -7 A, the voltage window ΔV th ≤ 0.5V, and the device can be stably cycled more than 10 times.

[0099] In summary, the chalcogenide compound applied to the storage device in the application is a brand new component. Based on the chalcogenide compound provided in the application, the switching device prepared by the chalcogenide compound can realize instantaneous conversion from high resistance state to low resistance state under the action of external electric field when the voltage reaches threshold voltage; and can immediately change from low resistance state to high resistance state when the external energy is removed. At the same time, based on the chalcogenide compound provided in the application, the threshold voltage required for the first opening after the direction of the applied voltage is changed will be obviously higher than the threshold voltage required for the subsequent opening. By changing the voltage direction, the pulses with unchanged direction and size can read high resistance state and low resistance state information respectively, and a brand new storage device can be prepared by using this principle. The switching device and the storage device prepared based on the chalcogenide compound have low power consumption, fast operation speed, low leakage current and high integration density, and can be used for manufacturing high-density and three-dimensional mass storage.

[0100] The foregoing description has been set forth in terms of specific embodiments of the application. It is to be understood that modifications which do not depart from the scope of the application as set forth in the claims will occur to those skilled in the art upon a reading of the foregoing description. Accordingly, the scope of the application is to be interpreted only as is delineated in the claims.

Claims

1. A switching device based on a class of chalcogenide compounds, characterized in that: The chemical general formula of the chalcogenide compound is (S x Se y Te 100-x-y ) 100-z M z wherein M is one or several of Sb, Sn, Si, Ge, Bi, Pb, In, Ga, As, C, P, N, x, y, z satisfy 0≤x≤100, 0≤y≤100, 10≤z≤90.

2. The switching device of claim 1, wherein: The switching device comprises: a lower electrode layer; an upper electrode layer; a chalcogenide material layer between the lower electrode layer and the upper electrode layer.

3. The switching device of claim 2, wherein: The thickness of the chalcogenide material layer is 5-50 nm.

4. The switching device of claim 2, wherein: The material of the lower electrode layer comprises one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu, and Ni.

5. The switching device of claim 2, wherein: The material of the upper electrode layer comprises one or more of C, Ta, TiN, TaC, TaN, Co, W, Pt, Au, Ti, Al, Ag, Cu, and Ni.

6. The switching device of claim 1, wherein: The switching device realizes instantaneous transition from high resistance state to low resistance state under the action of external electric field, and realizes instantaneous transition from low resistance state to high resistance state when the external electric field is removed.

7. A preparation method of a switching device based on a chalcogenide compound, comprising the following steps: S1: forming a lower electrode layer; S2: forming a chalcogenide material layer on the lower electrode layer, the chalcogenide having a chemical formula of (S x Se y Te 100-x-y ) 100-z M z , wherein M is one or more of Sb, Sn, Si, Ge, Bi, Pb, In, Ga, As, C, P, N, x, y, z satisfy 0≤x≤100, 0≤y≤100, 10≤z≤90; S3: forming an upper electrode layer on the chalcogenide material layer; S4: forming a lead-out electrode on the upper electrode layer.

8. The method of claim 6, wherein: The method for forming the chalcogenide material layer on the lower electrode layer comprises sputtering, chemical vapor deposition, atomic layer deposition, or electron beam evaporation.

9. A storage device, characterized by: The memory unit comprises the switching device according to claim 1.

10. A switching device as claimed in claim 1 or a memory device as claimed in claim 8, characterized in that: Turn-on current greater than or equal to 10 -7 A, a switching ratio greater than or equal to 2, a threshold voltage less than or equal to 10 V, a maximum number of cycles greater than or equal to 100, and a threshold voltage window greater than or equal to 0.2 V after a change in the polarity of an applied voltage.

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