Communication method and apparatus

Abstract

A communication method and apparatus, which relate to the technical field of communications, and can reduce the complexity overheads of a cyclic redundancy check, and improve the efficiency of the cyclic redundancy check. The method comprises: a transmitter device acquiring a first transport block, and outputting one or more first code blocks, wherein the first transport block corresponds to one or more first code blocks; when the first transport block corresponds to one first code block, cyclic redundancy check (CRC) bits in the first code block are determined on the basis of a first CRC polynomial; and when the first transport block corresponds to a plurality of first code blocks, CRC bits in each of the plurality of first code blocks are determined on the basis of the first CRC polynomial.

Description

Communication method and apparatus

[0001] This application claims priority to the Chinese Patent Application No. 202411060720.7, filed on August 2, 2024, and entitled "Communication method and apparatus", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the technical field of communication, and in particular to a communication method and apparatus. BACKGROUND

[0003] In a communication system, a sending device can encapsulate data in a transport block (TB), and block-encode the TB into one or more code blocks (CBs) to implement data transmission. Each CB can include cyclic redundancy check (CRC) bits to implement error detection of the CB. Correspondingly, a receiving device can determine whether the transmission of the CB is correct through cyclic redundancy check. However, the complexity of cyclic redundancy check is high.

[0004] Therefore, how to reduce the complexity overhead of cyclic redundancy check and improve the efficiency of cyclic redundancy check becomes a problem to be solved. SUMMARY

[0005] The present application provides a communication method and apparatus, which can reduce the complexity overhead of cyclic redundancy check and improve the efficiency of cyclic redundancy check.

[0006] In a first aspect, the present application provides a communication method, which can be executed by a sending device. In the absence of special description, the "sending device" in the present application can refer to the sending device itself, a component (for example, a processor, a chip, or a chip system, etc.) in the sending device, or a logic module or software capable of realizing all or part of the functions of the sending device. The method includes: the sending device obtains a first transport block; and outputs one or more first code blocks. The first transport block corresponds to the one or more first code blocks; in the case where the first transport block corresponds to one first code block, the CRC bits in the first code block are determined according to a first CRC polynomial; and in the case where the first transport block corresponds to multiple first code blocks, the CRC bits in each of the multiple first code blocks are determined according to the first CRC polynomial.

[0007] Based on the first aspect, different from the case that the first transport block corresponds to one first code block, the CRC bits in the first code block are determined according to one of the two CRC polynomials, in the present application, no matter whether the first transport block corresponds to one first code block or the first transport block corresponds to multiple first code blocks, the CRC bits in each first code block are determined according to the first CRC polynomial, so that the receiving end device can directly perform cyclic redundancy check on the first code block through the first CRC polynomial, the complexity overhead of the cyclic redundancy check can be reduced, and thus the efficiency of the cyclic redundancy check can be improved.

[0008] In a second aspect, the present application provides a communication method, which can be executed by a receiving end device. In the case of no special description, the "receiving end device" in the present application can refer to the receiving end device itself, a component (for example, a processor, a chip, or a chip system, etc.) in the receiving end device, or a logic module or software capable of realizing all or part of the functions of the receiving end device. The method comprises: receiving, by the receiving end device, to-be-decoded information; determining one or more second code blocks according to the to-be-decoded information; and performing cyclic redundancy check on each of the one or more second code blocks according to the first CRC polynomial. Wherein, the to-be-decoded information corresponds to one or more first code blocks; in the case that the to-be-decoded information corresponds to one first code block, the CRC bits in the first code block are determined according to the first CRC polynomial; and in the case that the to-be-decoded information corresponds to multiple first code blocks, the CRC bits in each of the multiple first code blocks are determined according to the first CRC polynomial.

[0009] Based on the second aspect, different from the case that the first transport block corresponds to one first code block, the CRC bits in the first code block are determined according to one of the two CRC polynomials, in the present application, no matter whether the first transport block corresponds to one first code block or the first transport block corresponds to multiple first code blocks, the CRC bits in each first code block are determined according to the first CRC polynomial, the receiving end device can directly perform cyclic redundancy check on the second code block (the second code block is the first code block after transmission) through the first CRC polynomial, the complexity overhead of the cyclic redundancy check can be reduced, and thus the efficiency of the cyclic redundancy check can be improved.

[0010] It can be understood that the first code block and the second code block correspond to each other one by one.

[0011] In combination of the first aspect and the second aspect, in the case that the first transport block corresponds to multiple first code blocks, the CRC bits in the first transport block are determined according to the second CRC polynomial; or, in the case that the first transport block corresponds to one first code block, the CRC bits in the first transport block are the CRC bits in the first code block; wherein, the first CRC polynomial is different from the second CRC polynomial.

[0012] Based on the possible implementation, in a case that the first transport block corresponds to one first code block, the CRC bits in the first transport block are the CRC bits in the first code block, the CRC bits in the first code block are no longer determined, that is, the CRC bits in the first transport block are determined according to the first CRC polynomial, which is different from that the CRC bits in the first transport block are determined according to one of the two CRC polynomials, in the present application, the CRC bits in the first transport block can be determined according to the first CRC polynomial, which can reduce the complexity overhead of the cyclic redundancy check, thereby improving the efficiency of the cyclic redundancy check.

[0013] In addition, in a case that the first transport block corresponds to a plurality of first code blocks, the CRC bits in the first transport block can be determined first, and then the first transport block is block encoded to obtain a plurality of first code blocks and determine the CRC bits in each first code block, the CRC bits in the first transport block and the CRC bits in the first code block can be determined according to different CRC polynomials, which can improve the accuracy of the cyclic redundancy check, thereby improving the reliability of the communication.

[0014] In combination with the first aspect and the second aspect, in a possible implementation, the length of the first CRC polynomial is equal to the length of the second CRC polynomial; or the length of the first CRC polynomial is less than the length of the second CRC polynomial; wherein the second polynomial is a CRC polynomial used to determine the CRC bits in the first transport block in a case that the first transport block corresponds to a plurality of first code blocks.

[0015] Based on the possible implementation, compared with the case that the length of the first CRC polynomial is less than the length of the second CRC polynomial, the length of the first CRC polynomial is equal to the length of the second CRC polynomial, the number of CRC bits in the first code block can be reduced, thereby the length of the payload in the first code block can be improved, and the effectiveness of the communication can be improved; compared with the case that the length of the first CRC polynomial is equal to the length of the second CRC polynomial, the length of the first CRC polynomial is less than the length of the second CRC polynomial, the accuracy of the cyclic redundancy check can be improved, thereby the reliability of the communication can be improved.

[0016] In combination with the first aspect and the second aspect, in a possible implementation, the length of the first CRC polynomial is 24; or the length of the first CRC polynomial is 16.

[0017] Based on the possible implementation, two feasible schemes are provided for the determination of the first CRC polynomial, in a case that the length of the first CRC polynomial is 16, the length of the CRC bits in the first code block can be reduced, the length of the payload in the first code block can be effectively improved, and the effectiveness of the communication can be improved.

[0018] In a possible implementation, in a case where the length of the first code block is less than or equal to a first preset threshold, the CRC bits in the first code block are part of the CRC bit set; or in a case where the length of the first code block is greater than the first preset threshold, the CRC bits in the first code block are part of the CRC bit set or all the CRC bits in the CRC bit set; wherein the CRC bit set is determined according to the first CRC polynomial and the information bits in the first code block, and the length of the CRC bit set is the same as the length of the first CRC polynomial.

[0019] Based on the possible implementation, part of the CRC bits in the CRC bit set can be selected as the CRC bits in the first code block according to the length of the first code block, the length of the CRC bits in the first code block can be reduced, the length of the payload in the first code block can be effectively improved, and therefore the effectiveness of communication can be improved. In addition, part of the CRC bits or all the CRC bits in the CRC bit set can be selected as the CRC bits in the first code block according to the length of the first code block, and the flexibility and diversity of determining the CRC bits in the first code block can be improved.

[0020] In a possible implementation, the CRC bits in the first code block are the first X CRC bits in the CRC bit set; wherein X is a positive integer less than the length of the CRC bit set.

[0021] In a possible implementation, X is one or more of the following: 6, 7, 8, or 11.

[0022] Based on the above possible implementation, a feasible solution is provided for determining part of the CRC bits in the CRC bit set as the CRC bits in the first code block.

[0023] In a third aspect, an embodiment of the present application provides a communication apparatus, which can be applied to the sending device in the first aspect to implement the functions performed by the sending device. The communication apparatus can be the sending device, a chip or a chip system or a system on chip, etc. The communication apparatus can perform the functions of the sending device by hardware or by corresponding software executed by hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiving module and a processing module. The transceiving module can perform the transceiving operations independently or in cooperation with the processing module. Similarly, the processing module can perform the processing operations independently or in cooperation with the transceiving module. No limitation is imposed.

[0024] Exemplarily, the processing module is configured to obtain a first transport block; wherein the first transport block corresponds to one or more first code blocks; in a case that the first transport block corresponds to one first code block, CRC bits in the first code block are determined according to a first CRC polynomial; in a case that the first transport block corresponds to a plurality of first code blocks, CRC bits in each of the plurality of first code blocks are determined according to the first CRC polynomial; and the transceiver module is configured to output the one or more first code blocks.

[0025] Optionally, the transceiver module and the processing module of the communication apparatus in the third aspect can also perform the corresponding functions in the first aspect or any possible design of the first aspect, and the specific implementation can be referred to the detailed description in the method examples, and the beneficial effects can be referred to the foregoing description.

[0026] In the fourth aspect, the embodiments of the present application provide a communication apparatus, which can be applied to the receiving end device in the second aspect to implement the functions performed by the receiving end device. The communication apparatus can be the receiving end device, a chip or a chip system or a system on chip, etc. The communication apparatus can perform the functions of the receiving end device through hardware, or perform the functions through corresponding software. The hardware or software includes one or more modules corresponding to the functions. For example, a transceiver module and a processing module. The transceiver module can perform the following transceiving operations independently, or in cooperation with the processing module. Similarly, the processing module can perform the following processing operations independently, or in cooperation with the transceiver module.

[0027] Exemplarily, the transceiver module is configured to receive to-be-decoded information; wherein the to-be-decoded information corresponds to one or more first code blocks; in a case that the to-be-decoded information corresponds to one first code block, CRC bits in the first code block are determined according to a first CRC polynomial; in a case that the to-be-decoded information corresponds to a plurality of first code blocks, CRC bits in each of the plurality of first code blocks are determined according to the first CRC polynomial; and the processing module is configured to determine one or more second code blocks according to the to-be-decoded information; and the processing module is further configured to perform a cyclic redundancy check on each of the one or more second code blocks according to the first CRC polynomial.

[0028] Optionally, the transceiver module and the processing module of the communication apparatus in the fourth aspect can also perform the corresponding functions in the second aspect or any possible design of the second aspect, and the specific implementation can be referred to the detailed description in the method examples, and the beneficial effects can be referred to the foregoing description.

[0029] In a fifth aspect, an embodiment of the present application provides a communication apparatus, comprising one or more processors; and the one or more processors are configured to execute computer programs or instructions, and when the one or more processors execute the computer programs or instructions, the communication method according to any one of the first aspect or the second aspect is performed.

[0030] In a possible design, the communication apparatus further comprises one or more memories coupled to the one or more processors, and the one or more memories are configured to store the computer programs or instructions. In a possible implementation, the memory is located outside the communication apparatus. In another possible implementation, the memory is located inside the communication apparatus. In an embodiment of the present application, the processor and the memory can also be integrated into one device, i.e., the processor and the memory can also be integrated together. In a possible implementation, the communication apparatus further comprises a transceiver, and the transceiver is configured to receive information and / or send information.

[0031] In a possible design, the communication apparatus further comprises one or more communication interfaces coupled to the one or more processors, and the one or more communication interfaces are configured to communicate with other modules outside the communication apparatus.

[0032] In a sixth aspect, an embodiment of the present application provides a communication apparatus, comprising an interface circuit and a logic circuit; the interface circuit is configured to input and / or output information; and the logic circuit is configured to perform the communication method according to any one of the first aspect or the second aspect, process and / or generate information according to the information.

[0033] In a seventh aspect, an embodiment of the present application provides a computer readable storage medium, which stores computer programs or instructions, and when the computer programs or instructions are executed on a computer, the communication method according to any one of the first aspect or the second aspect is performed.

[0034] In an eighth aspect, an embodiment of the present application provides a computer program product comprising computer programs or instructions, and when the computer programs or instructions are executed on a computer, the communication method according to any one of the first aspect or the second aspect is performed.

[0035] In a ninth aspect, an embodiment of the present application provides a computer program, and when the computer program is executed on a computer, the communication method according to any one of the first aspect or the second aspect is performed.

[0036] In a tenth aspect, an embodiment of the present application provides a chip, comprising: a processor coupled to a memory, and the memory is configured to store programs or instructions, and when the programs or instructions are executed by the processor, the communication method according to any one of the first aspect or the second aspect is performed.

[0037] The technical effects brought by any one of the third aspect to the tenth aspect can refer to the technical effects brought by any one of the first aspect or the second aspect, which will not be described herein.

[0038] In an eleventh aspect, an embodiment of the present application provides a communication system, which can include a communication device for performing the communication device as described in the first aspect or any possible design of the first aspect, and a communication device for performing the communication device as described in the second aspect or any possible design of the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0039] FIG. 1 is a schematic diagram of a cyclic redundancy check according to an embodiment of the present application;

[0040] FIG. 2 is a schematic diagram of a communication system according to an embodiment of the present application;

[0041] FIG. 3 is a schematic diagram of encoding and decoding of a sending end device and a receiving end device according to an embodiment of the present application;

[0042] FIG. 4 is a schematic diagram of a structure of a communication device according to an embodiment of the present application;

[0043] FIG. 5 is a schematic diagram of a flow of a communication method according to an embodiment of the present application;

[0044] FIG. 6 is a schematic diagram of a cyclic redundancy check according to an embodiment of the present application;

[0045] FIG. 7 is a schematic diagram of a structure of a sending end device according to an embodiment of the present application;

[0046] FIG. 8 is a schematic diagram of a structure of a receiving end device according to an embodiment of the present application;

[0047] FIG. 9 is a schematic diagram of a structure of another communication device according to an embodiment of the present application. DETAILED DESCRIPTION

[0048] Before describing embodiments of the present application, technical terms related to embodiments of the present application are described.

[0049] Cyclic redundancy check (CRC): The cyclic redundancy check is a fast algorithm for generating a short fixed number of check code (or check code) according to data, which is mainly used to detect or check possible errors after data transmission or storage. CRC uses the principle of division and remainder to realize the function of error detection, and has the advantages of clear principle and simple implementation.

[0050] The cyclic redundancy check can be implemented by a polynomial, that is, the fixed-bit check code corresponding to the data can be determined by the CRC polynomial.

[0051] For example, the maximum length of the CRC polynomial in the fourth generation (4G) standard can be 16, and the CRC polynomial with the length of 16 can satisfy the following formula: g CRC16 (D) = [D 16 + D 12 + D 5 + 1].

[0052] For another example, the maximum length of the CRC polynomial in the fifth generation (5G) standard can be 24, and the CRC polynomial with the length of 24 can be g CRC24A (D), g CRC24B (D), or g CRC24C (D). Wherein, g CRC24A (D) can satisfy the following formula: g CRC24A (D) = [D 24 + D 23 + D 18 + D 17 + D 14 + D 11 + D 10 + D 7 + D 6 + D 5 + D 4 + D 3 + D + 1], g CRC24B (D) can satisfy the following formula: g CRC24B (D) = [D 24 + D 23 + D 6 + D 5 + D + 1], g CRC24C (D) can satisfy the following formula: g CRC24C (D) = [D 24 + D 23 + D 21 + D 20 + D 17 + D 15 + D 13 + D 12 + D 8 + D 4 + D 2 + D + 1].

[0053] In one possible implementation, when the sending device and the receiving device transmit data, the sending device can process information bits of length K (e.g., information bits can be represented as: t = {t0, t1, ..., t2}). K-1 Cyclic redundancy check (CRC) encoding is performed to obtain an information bit sequence of length K+L (this information bit sequence includes CRC bits of length L). Further, the transmitting device can encode and modulate the K+L information bit sequence to obtain a symbol sequence and transmit it. The CRC bits can be determined based on the CRC polynomial and the information bits. For example, the transmitting device can append z zeros to the sequence t and divide it by the CRC polynomial to obtain the remainder, which is the CRC bit. Here, z is the length of the CRC polynomial.

[0054] Correspondingly, the receiving device can receive the information to be decoded from the transmitting device (the information to be decoded is a sequence of symbols transmitted through the channel). The receiving device can demodulate and decode the information to be decoded to obtain a recovery value of length K+L (the recovery value may include information bits and CRC bits). Cyclic redundancy check (CRC) can be performed on the recovery value. For example, the receiving device appends z zeros to the recovery value, divides it by the CRC polynomial, and compares the remainder with the CRC bits in the recovery value. If they are the same, the check is successful; if they are different, the check fails.

[0055] Transport block (TB): When transmitting data, the sending device can encapsulate the data within a TB for transmission. Specifically, the sending device can determine the CRC bits corresponding to the data based on a CRC polynomial and encapsulate the data along with the CRC bits within the TB.

[0056] The CRC bits in TB can be called TBCRC.

[0057] Understandably, the transmitting device can determine the TB size (TBS) based on transmission resources and channel conditions. Since the codec module has limitations on TBS, when the TBS exceeds the maximum TBS supported by the codec module, the transmitting device can divide the TB into multiple code blocks (CBs).

[0058] Understandably, to ensure correct independent decoding of each CB, a CRC bit can be added to each CB to achieve cyclic redundancy check. If one or more CBs have check errors, only those CBs or CBs can be retransmitted, improving communication efficiency.

[0059] The CRC bits in CB can be called CBCRC.

[0060] Based on the above description of the cyclic redundancy check and the TB, in the 5G standard, the TB CRC can be determined by two CRC polynomials, and the CB CRC can be determined by one CRC polynomial.

[0061] wherein the polynomial for determining the TB CRC can be g CRC24A (D) = [D 24 + D 23 + D 18 + D 17 + D 14 + D 11 + D 10 + D 7 + D 6 + D 5 + D 4 + D 3 + D + 1] and g CRC16 (D) = [D 16 + D 12 + D 5 + 1].

[0062] For example, when the base graph corresponding to the low-density parity-check code (LDPC) is base graph 1, the sending end device can determine the TB CRC by g CRC24A (D) = [D 24 + D 23 + D 18 + D 17 + D 14 + D 11 + D 10 + D 7 + D 6 + D 5 + D 4 + D 3 + D + 1]. CRC16 (D) = [D 16 + D 12 + D 5 + 1].

[0063] wherein the polynomial for determining the CB CRC can be g CRC24B (D) = [D 24 + D 23 + D 6 + D 5 + D + 1].

[0064] In a possible implementation, the sending end device can encapsulate data in a TB, divide the TB into one or more CBs, encode and output the one or more CBs; correspondingly, the receiving end device can receive the to-be-decoded information from the sending end device, decode the to-be-decoded information to obtain the recovery values of the one or more CBs; further, the receiving end device can perform cyclic redundancy check on the recovery value of each CB in the one or more CBs. When there is a recovery value of a CB, the check result is directly output; when there are recovery values of multiple CBs, the recovery values of the multiple CBs can be integrated to obtain the recovery value of the TB, cyclic redundancy check is continued on the recovery value of the TB, and the check result is output.

[0065] wherein the CRC polynomial 1 is g CRC24B (D) = [D 24 + D 23 + D 6 + D 5 + D + 1], the CRC polynomial 2 is g CRC24A (D) = [D 24 + D 23 + D 18 + D 17 + D 14 + D 11 + D 10 + D 7 + D 6 + D 5 + D 4 + D 3 + D + 1], and the CRC polynomial 3 is g CRC16 (D) = [D 16 + D 12 + D 5 + 1]. As an example, the process of performing cyclic redundancy check on the recovery value of each CB can be shown in FIG. 1. When the number of CBs corresponding to the to-be-decoded information is greater than 1 (which can be shown in the dashed box 1 in FIG. 1), the receiving end device can perform cyclic redundancy check on the recovery value of each CB by using the CRC polynomial 1 and output the check result; further, the receiving end device can integrate the recovery values of the multiple CBs to obtain the recovery value of the TB, perform cyclic redundancy check on the recovery value of the TB, and output the check result; wherein, when performing cyclic redundancy check on the recovery value of the TB, the receiving end device selects one of the CRC polynomial 2 and the CRC polynomial 3 to perform cyclic redundancy check on the recovery value of the TB.

[0066] Or, when the number of CBs corresponding to the to-be-decoded information is 1 (as shown in the dashed box 2 in FIG. 1), the receiving end device needs to select one of the CRC polynomials 2 and 3 to perform cyclic redundancy check on the recovery value of the CB, and output the check result, that is, the check result output by the receiving end device performing cyclic redundancy check on the recovery value of the CB is the final check result.

[0067] It can be understood that when the number of CBs corresponding to the to-be-decoded information is 1, the polynomial used to determine the CRC bits of the CB changes, resulting in that multiple CRC polynomials need to be used to perform cyclic redundancy check in the process of decoding the recovery value of the CB, increasing the hardware overhead and the complexity of the cyclic redundancy check.

[0068] Therefore, how to reduce the complexity of the cyclic redundancy check and improve the efficiency of the cyclic redundancy check has become a problem to be solved.

[0069] The present application provides a communication method, which comprises: a sending end device acquiring a first transport block; and outputting one or more first code blocks. The first transport block corresponds to the one or more first code blocks; in the case where the first transport block corresponds to one first code block, the CRC bits in the first code block are determined according to a first CRC polynomial; and in the case where the first transport block corresponds to multiple first code blocks, the CRC bits in each of the multiple first code blocks are determined according to the first CRC polynomial.

[0070] In the case where the first transport block corresponds to one or more first code blocks, the CRC bits of the first transport block are the CRC bits of the first code block.

[0071] In the embodiments of the present application, unlike the case where the CRC bits in the first code block are determined according to one of the two CRC polynomials in the case where the first transport block corresponds to one first code block, in the present application, the CRC bits in each first code block are determined according to the first CRC polynomial, regardless of whether the first transport block corresponds to one first code block or multiple first code blocks, so that the receiving end device can directly perform cyclic redundancy check on the first code block through the first CRC polynomial, the complexity of the cyclic redundancy check can be reduced, and the efficiency of the cyclic redundancy check can be improved.

[0072] The implementation manners of the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0073] The communication method provided by the embodiments of the present application can be applied to any communication system, which can be a third generation partnership project (3GPP) communication system, for example, a long term evolution (LTE) system, and can also be a 5G mobile communication system, a system of mixed networking of LTE and 5G, a new radio (NR) system, a vehicle to everything (V2X) system of NR, a device-to-device (D2D) communication system, a machine to machine (M2M) communication system, an internet of things (IoT), a narrow band-internet of things (NB-IoT) system, a global system for mobile communications (GSM) system, an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, a code division multiple access (CDMA2000) system, a time division-synchronization code division multiple access (TD-SCDMA) system, an enhanced mobile broadband (eMBB) system, an ultra-reliable and low-latency communication (URLLC) system, an enhanced machine-type communication (eMTC) system, and various types of future communication systems, and can also be a non-terrestrial network (NTN) system (such as a satellite communication system), a non-3GPP communication system, and the like, without limitation.

[0074] The communication method provided by the embodiments of the present application can be applied to various communication scenarios, for example, can be applied to one or more of the following communication scenarios: encoding of a control channel, encoding of a data channel, and the like, without limitation.

[0075] The communication system provided by the embodiments of the present application is described below by taking FIG. 2 as an example.

[0076] FIG. 2 is a schematic diagram of a communication system provided by an embodiment of the present application. As shown in FIG. 2, the communication system can include at least one terminal device and at least one network device.

[0077] In FIG. 2, the terminal device can be located in the beam / cell coverage of the network device, and the network device can provide communication services for the terminal device. For example, the network device can encode downlink data by using channel coding, modulate the data by using constellation modulation, and then transmit the data to the terminal device through the air interface (i.e., the network device is the sending terminal device, and the terminal device is the receiving terminal device); the terminal device can also encode uplink data by using channel coding, modulate the data by using constellation modulation, and then transmit the data to the network device through the air interface (i.e., the terminal device is the sending terminal device, and the network device is the receiving terminal device). It can be understood that when the network device communicates with the network device, or the terminal device communicates with the terminal device, the communication can also be based on channel coding, i.e., the sending terminal device and the receiving terminal device can both be network devices, or both be terminal devices, which is not limited.

[0078] The terminal device in FIG. 2 can be a device with wireless transceiving function or a chip or chip system that can be arranged in the device, and can allow a user to access a network, and is a device for providing voice and / or data connectivity to a user. The terminal device can also be referred to as a user equipment (UE), a subscriber unit, a terminal, a mobile station (MS), or a mobile terminal (MT), etc.

[0079] Exemplarily, the terminal device in FIG. 2 can be a mobile phone, a tablet computer or a computer with wireless transceiver function. The terminal device can also be a user station, a mobile station, a remote station, a remote terminal device, a mobile terminal device, a user terminal device, a wireless communication device, a user agent, a user equipment, a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, a computing device, a processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, a terminal device in Internet of Things, a household appliance, a virtual reality (VR) terminal, an augmented reality (AR) terminal, a wireless terminal in industrial control, a wireless terminal in unmanned driving, a wireless terminal in remote medical treatment, a wireless terminal in smart power grid, a wireless terminal in smart city, a wireless terminal in smart home, a vehicle with vehicle-to-vehicle (V2V) communication capability, a smart connected vehicle, a drone with unmanned aerial vehicle to unmanned aerial vehicle (UAV to UAV, U2U) communication capability, a terminal device in future network or a terminal device in future evolved public land mobile network (PLMN), etc., without limitation.

[0080] The network device in FIG. 2 can be any device deployed in an access network and capable of wireless communication with the terminal device, can also be a chip or chip system that can be provided in the above device, can also be a logic node or a logic module or a software-implemented function, and is mainly responsible for functions such as wireless physical control function, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control and mobility management. Specifically, the network device can be a device supporting wired access or a device supporting wireless access.

[0081] Exemplary network devices can be composed of one or more access network (AN) / radio access network (RAN) nodes. AN / RAN nodes can be various types of base stations such as satellite base stations, continue evolution NodeBs (gNBs), transmission reception points (TRPs), evolved NodeBs (eNBs), radio network controllers (RNCs), NodeBs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home eNBs or home NBs, HNB), macro base stations, micro base stations, pico base stations, femto base stations, relay stations, balloon stations, drone stations, wireless backhaul nodes, base band units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It can be understood that network devices can be ground-based devices or non-ground-based devices (e.g., satellites, drones, high-altitude communication devices, etc.). In addition, in communication systems using different wireless access technologies, the names of network devices with base station functions can be different, which is not limited in the present application.

[0082] In yet another example, network devices can include a BBU and a remote radio unit (RRU). The BBU and RRU can be placed in different locations, for example, the RRU is pulled away and placed in a high traffic area, and the BBU is placed in a central machine room. The BBU and RRU can also be placed in the same machine room. The BBU and RRU can also be different components under one rack.

[0083] In still another example, network devices can also be devices including a centralized unit (CU) node, or including a distributed unit (DU) node, or including a CU node and a DU node. For example, network devices can be divided into a CU and a DU from a logical function perspective, and the functions of part of the protocol layers are controlled by the CU, and the rest or all of the protocol layers are distributed in the DU and controlled by the CU. The CU and the DU can be separately arranged or can be included in the same network element, such as a BBU. Furthermore, the centralized unit CU can also be divided into a control plane (CU-CP) and a user plane (CU-UP).

[0084] In yet another example, the network device can also be a device comprising a radio unit (RU), or a device comprising a CU, a DU and a RU. The RU can be comprised in a radio frequency device or radio frequency unit, e.g., in a RRU, an active antenna unit (AAU) or a remote radio head (RRH).

[0085] It can be appreciated that the CU (or CU-CP and CU-UP), DU or RU can also have different names in different systems, but those skilled in the art can understand their meanings. For example, in an open radio access network (O-RAN) system, the CU can also be referred to as an O-CU (open CU), the DU can also be referred to as an O-DU, the CU-CP can also be referred to as an O-CU-CP, the CU-UP can also be referred to as an O-CU-UP, and the RU can also be referred to as an O-RU. For the convenience of description, the CU, CU-CP, CU-UP, DU and RU are taken as examples for description in this application. Any of the CU (or CU-CP, CU-UP), DU and RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0086] Based on the above description of the terminal device and the network device, optionally, the communication method provided in the embodiments of this application can be implemented by the terminal device or the network device described above, or by components of the terminal device or the network device, etc., such as an application specific integrated circuit (ASIC) deployed in the terminal device or the network device, a field programmable gate array (FPGA), or software (such as program code in a memory), etc., without limitation.

[0087] Optionally, in the embodiments of this application, the sending end device (also referred to as a signal source) and the receiving end device (also referred to as a signal sink) can use the process shown in FIG. 3 for encoding and decoding. The sending end device can be any terminal device or network device in the communication system shown in FIG. 3, and the receiving end device can also be any terminal device or network device in the communication system shown in FIG. 3.

[0088] The sending end device can source encode the bits generated by the sending end device to obtain a source bit stream, channel encode the source bit stream, modulate the source bit stream, and send the modulated symbols to the receiving end device through a noisy channel. When the receiving end device receives the modulated symbols through the noisy channel, the receiving end device can demodulate the modulated symbols, channel decode the demodulated symbols, recover the source bit stream, and source decode the source bit stream to obtain a decoding result.

[0089] In a specific implementation, each of the terminal devices and the network device shown in FIG. 2 can have the component structure shown in FIG. 4, or include the components shown in FIG. 4. FIG. 4 is a component structure diagram of a communication apparatus 400 provided by an embodiment of the present application. The communication apparatus 400 can be a terminal device or a chip or system on chip in the terminal device, or a network device or a chip or system on chip in the network device. As shown in FIG. 4, the communication apparatus 400 includes a processor 401, a transceiver 402, and a communication line 403.

[0090] Further, the communication apparatus 400 can further include a memory 404. The processor 401, the memory 404, and the transceiver 402 can be connected through the communication line 403.

[0091] The processor 401 can be a central processing unit (CPU), a general processor network processor (NP), a digital signal processing (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 401 can also be another device with processing capability, such as a circuit, a device, or a software module, without limitation.

[0092] The transceiver 402 is configured to communicate with other devices or other communication networks. The other communication networks can be an Ethernet network, a radio access network (RAN), a wireless local area network (WLAN), or the like. The transceiver 402 can be a module, a circuit, a transceiver, or any device capable of communication.

[0093] The communication line 403 is configured to transmit information between components included in the communication apparatus 400.

[0094] The memory 404 is configured to store instructions. The instructions can be a computer program.

[0095] The memory 404 can be a read-only memory (ROM) or other type of static storage device that can store static information and / or instructions, or a random access memory (RAM), or other type of dynamic storage device that can store information and / or instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM), or other optical disk storage, a magnetic disk storage or other magnetic storage devices, and the like, without limitation.

[0096] It should be noted that the memory 404 can exist independently of the processor 401, or can be integrated with the processor 401. The memory 404 can be used to store instructions or program codes or some data, and the like. The memory 404 can be located in the communication apparatus 400, or can be located outside the communication apparatus 400, without limitation. The processor 401 is configured to execute the instructions stored in the memory 404, so as to implement the communication method provided by the embodiments described below.

[0097] In an example, the processor 401 can include one or more CPUs, such as the CPU0 and the CPU1 in FIG. 4.

[0098] As an optional implementation, the communication apparatus 400 includes a plurality of processors, for example, in addition to the processor 401 in FIG. 4, the communication apparatus 400 can further include a processor 407.

[0099] As an optional implementation, the communication apparatus 400 further includes an output device 405 and an input device 406. For example, the input device 406 is a keyboard, a mouse, a microphone, a joystick, or the like, and the output device 405 is a display screen, a speaker, or the like.

[0100] It should be noted that the communication apparatus 400 can be a desktop computer, a laptop computer, a network server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device having a similar structure to that in FIG. 4. In addition, the constituent structures shown in FIG. 4 do not constitute a limitation on the communication apparatus, and the communication apparatus can include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0101] In the embodiments of the present application, the chip system can be composed of a chip, or can include a chip and other discrete devices.

[0102] In addition, the actions, terms and the like involved between the embodiments of the present application can be mutually referred to without limitation. The message name or parameter name in the message between the devices in the embodiments of the present application is only an example, and other names can also be used in the specific implementation without limitation.

[0103] The communication method provided by the embodiments of the present application will be described below in combination with the communication system shown in FIG. 2, with reference to the following FIG. 5, wherein the sending end device can be any terminal device or network device in the communication system shown in FIG. 2, and the receiving end device can also be any terminal device or network device in the communication system shown in FIG. 2. The sending end device or the receiving end device described in the following embodiments can have the components shown in FIG. 5.

[0104] FIG. 5 is a flowchart of a communication method provided by an embodiment of the present application, as shown in FIG. 5, the method can include:

[0105] Step 501, the sending end device acquires a first transport block.

[0106] The first transport block corresponds to one or more first code blocks.

[0107] When the sending end device transmits data to the receiving end device, the data can be encapsulated in the first transport block, and further, the sending end device can block encode the first transport block into one or more first code blocks. The first transport block can include information bits and second CRC bits, and the first code block can include information bits and first CRC bits.

[0108] The second CRC bits can be described as CRC bits in the transport block (such as CRC bits in the first transport block or CRC bits in the second transport block), which can also be referred to as TBCRC.

[0109] The first CRC bits can be described as CRC bits in the code block (such as CRC bits in the first code block or CRC bits in the second code block), which can also be referred to as CBCRC.

[0110] It can be understood that in the case where the first transport block corresponds to one first code block, there is no additional first CRC bit, and the second CRC bit can be determined according to the first CRC polynomial; in the case where the first transport block corresponds to multiple first code blocks, the second CRC bit can be determined according to the second CRC polynomial, and each of the multiple first code blocks can include the first CRC bit, which can be determined according to the first CRC polynomial.

[0111] The first CRC polynomial can be predefined, configured by the network device, or determined according to an actual communication scenario or communication condition, and is not limited.

[0112] The case that the first transport block corresponds to one first code block can be understood as that the first transport block is not block encoded, and the first code block is the first transport block, and the CRC bit in the first code block is the CRC bit in the first transport block. The case that the first transport block corresponds to multiple first code blocks can be understood as that the first transport block including the second CRC bit is block encoded to obtain multiple first code blocks, and the multiple first code blocks can be independently transmitted. Regardless of the above cases, the CRC bit in the first code block can be determined according to the first CRC polynomial.

[0113] For example, there are two CRC polynomials (such as CRC polynomial 1 and CRC polynomial 2), CRC polynomial 1 can be understood as the first CRC polynomial, and CRC polynomial 2 is a CRC polynomial different from CRC polynomial 1. In the case that the first transport block corresponds to one first code block, the CRC bit in the first code block (or the CRC bit in the first transport block) can be determined by CRC polynomial 1. In the case that the first transport block corresponds to multiple first code blocks, the CRC bit in the first transport block can be determined by CRC polynomial 2, and the CRC bit in each of the multiple first code blocks can be determined by CRC polynomial 1.

[0114] Optionally, the length of the first CRC polynomial can be 24, or the length of the first CRC polynomial is 16.

[0115] For example, the first CRC polynomial can satisfy the following formula: g CRC24B (D)=[D 24 +D 23 +D 6 +D 5 +D+1]。

[0116] For example, the first CRC polynomial can satisfy the following formula: g CRC16 (D)=[D 16 +D 12 +D 5 +1]。

[0117] The length of the CRC bit in the first code block can be the same as the length of the first CRC polynomial.

[0118] For example, in the case that the length of the first CRC polynomial is 24, the length of the CRC bits in the first code block can be 24; or in the case that the length of the first CRC polynomial is 16, the length of the CRC bits in the first code block can be 16.

[0119] The length of the CRC bits in the first code block can be described as the number of the CRC bits in the first code block. Similarly, the length of the CRC bits in the present application can be described as the number of the CRC bits.

[0120] In a possible embodiment, when determining the CRC bits in the first code block, z1 "0"s can be appended to the information bits in the first code block, and then the remainder obtained by dividing the first CRC polynomial can be the CRC bits in the first code block. For example, taking the first CRC polynomial g(x) = x24+ x23+ x21+ x16+ x12+ x10+ x6+ x3+ x+ 1 as an example, 24 "0"s can be appended to the information bits in the first code block to obtain a first sequence, and then the first sequence is divided by g(x) to obtain a remainder, which is the CRC bits in the first code block. CRC24B (D) = [D 24 +D 23 +D 6 +D 5 +D+1] as an example, 24 "0"s can be appended to the information bits in the first code block to obtain a first sequence, and then the first sequence is divided by g(x) to obtain a remainder, which is the CRC bits in the first code block. 24 +D 23 +D 6 +D 5 +D+1.

[0121] The length of the first CRC polynomial is z1.

[0122] It can be understood that, compared with the first CRC polynomial with the length of 24, in the case that the length of the first CRC polynomial is 16, the length of the CRC bits in the first code block can be reduced, the length of the payload in the first code block can be effectively improved, and the effectiveness of communication can be improved. Compared with the first CRC polynomial with the length of 16, in the case that the length of the first CRC polynomial is 24, the accuracy of the cyclic redundancy check can be improved, and the reliability of communication can be improved.

[0123] Optionally, in the case that the first transport block corresponds to a plurality of first code blocks, the CRC bits in the first transport block can be determined according to a second CRC polynomial; or in the case that the first transport block corresponds to one first code block, the CRC bits in the first transport block can be determined according to the first CRC polynomial.

[0124] The first CRC polynomial is different from the second CRC polynomial.

[0125] It can be understood that, the second CRC polynomial can be predefined, configured by a network device, or determined according to an actual communication scenario or communication condition, which is not limited.

[0126] For example, the second CRC polynomial can satisfy the following formula: g CRC24A (D) = [D 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1].

[0127] In one possible embodiment, when determining the CRC bits in the first transport block, z2 "0"s can be appended to the information bits in the first transport block, and the remainder obtained by dividing the second CRC polynomial is the CRC bits in the first transport block. For example, the second CRC polynomial is g CRC24A (D) = [D 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1], 24 "0"s can be appended to the information bits in the first transport block to obtain a second sequence, and the remainder obtained by dividing the second sequence by the second CRC polynomial is the CRC bits in the first transport block. 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1 is the remainder, which is the CRC bits in the first transport block.

[0128] wherein z2 is the length of the second CRC polynomial.

[0129] It can be understood that, in the case that the first transport block corresponds to one first code block, and different from the case that the CRC bits in the first transport block are determined according to one of the two CRC polynomials, in the present application, the CRC bits in the first transport block can be determined according to the first CRC polynomial, which can reduce the complexity overhead of the cyclic redundancy check, thereby improving the efficiency of the cyclic redundancy check.

[0130] In addition, in the case that the first transport block corresponds to a plurality of first code blocks, and different from the case that the CRC bits in the first transport block are determined according to one of the two CRC polynomials, in the present application, the CRC bits in the first transport block can be determined according to the second CRC polynomial, which can reduce the complexity overhead of the cyclic redundancy check, thereby improving the efficiency of the cyclic redundancy check.

[0131] Step 502, the sending end device outputs one or more first code blocks; correspondingly, the receiving end device receives the to-be-decoded information.

[0132] The sending end device can encode and modulate each of the one or more first code blocks to obtain one or more symbol sequences, and send the symbol sequences to the receiving end device. When transmitted through a channel, the symbol sequences can be affected by noise and other interference. The to-be-decoded information received by the receiving end device is the symbol sequence affected by noise and other interference.

[0133] The to-be-decoded information corresponds to one or more first code blocks.

[0134] The first code block can refer to the description of the first code block described above, and will not be repeated here.

[0135] In the case that the to-be-decoded information corresponds to one first code block, the CRC bits in the first code block are determined according to the first CRC polynomial; in the case that the to-be-decoded information corresponds to a plurality of first code blocks, the CRC bits in each of the plurality of first code blocks are determined according to the first CRC polynomial.

[0136] Step 503, the receiving end device determines one or more second code blocks according to the to-be-decoded information.

[0137] The receiving end device can demodulate and decode the to-be-decoded information to obtain one or more second code blocks.

[0138] It can be understood that, in the case that the to-be-decoded information corresponds to one first code block, the receiving end device can determine one second code block; in the case that the to-be-decoded information corresponds to a plurality of first code blocks, the receiving end device can determine a plurality of second code blocks. The second code block can include information bits and first CRC bits.

[0139] The information bits in the second code block and the CRC bits in the second code block can be recovery values obtained by the receiving end device decoding the to-be-decoded information.

[0140] Optionally, the first code block and the second code block correspond to each other in one-to-one manner.

[0141] For example, when the to-be-decoded information corresponds to three first code blocks (for example, a first code block 1, a first code block 2, and a first code block 3), the receiving end device can demodulate and decode the to-be-decoded information to obtain three second code blocks (for example, a second code block 1, a second code block 2, and a second code block 3). That is, the second code block 1 is a code block obtained by demodulating and decoding the to-be-decoded information corresponding to the first code block 1, the second code block 2 is a code block obtained by demodulating and decoding the to-be-decoded information corresponding to the first code block 2, and the second code block 3 is a code block obtained by demodulating and decoding the to-be-decoded information corresponding to the first code block 3.

[0142] In step 504, the receiving end device performs cyclic redundancy check on each of the one or more second code blocks according to the first CRC polynomial.

[0143] It can be understood that, no matter whether there is one second code block or multiple second code blocks, the receiving end device can perform cyclic redundancy check on each second code block by using the first CRC polynomial.

[0144] For example, as shown in FIG. 6, the receiving end device can perform cyclic redundancy check on each second code block by using the first CRC polynomial. Compared with FIG. 1, the CRC polynomial used for performing cyclic redundancy check on the first code block in FIG. 6 is the first CRC polynomial, which can reduce hardware cost and simplify implementation. In addition, the receiving end device does not need to determine which CRC polynomial to use to perform cyclic redundancy check on the second code block, which can effectively reduce the complexity overhead of cyclic redundancy check.

[0145] In a possible embodiment, when the receiving end device performs cyclic redundancy check on the second code block, the information bits in the second code block can be appended with z1 “0” and then divided by the first CRC polynomial to obtain a remainder. For example, when the first CRC polynomial is g CRC24B (D)=[D 24 +D 23 +D 6 +D 5 +D+1] as an example, 24 “0” can be added after the information bits in the second code block to obtain a third sequence, and the third sequence is divided by D 24 +D 23 +D 6 +D 5+D+1, and the remainder is obtained by dividing the fourth sequence by the second CRC polynomial. The remainder is compared with the CRC bits in the second transport block. If they are the same, the check is successful; if they are different, the check fails.

[0146] Further, in the case that the coded information corresponds to multiple second code blocks, the receiving end device can first perform a cyclic redundancy check on each second code block, and then integrate the multiple second code blocks to obtain a second transport block, and perform a cyclic redundancy check on the second transport block. The second transport block can include information bits and second CRC bits. As shown in FIG. 6, the receiving end device performs a cyclic redundancy check on the second transport block by using a second CRC polynomial. Compared with FIG. 1, the CRC polynomial used to perform a cyclic redundancy check on the first transport block in FIG. 6 is a second CRC polynomial, which can reduce hardware cost and simplify implementation. In addition, the receiving end device does not need to determine which CRC polynomial to use to perform a cyclic redundancy check on the second transport block, which can effectively reduce the complexity overhead of the cyclic redundancy check.

[0147] In a possible embodiment, when the receiving end device performs a cyclic redundancy check on the second transport block, z2 "0"s can be appended to the information bits in the second transport block, and the remainder is obtained by dividing the second transport block by the second CRC polynomial. For example, the second CRC polynomial is g CRC24A (D)=[D 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1, and the remainder is obtained by dividing the fourth sequence by the second CRC polynomial. The remainder is compared with the CRC bits in the second transport block. If they are the same, the check is successful; if they are different, the check fails. 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1, and the remainder is obtained by dividing the fourth sequence by the second CRC polynomial. The remainder is compared with the CRC bits in the second transport block. If they are the same, the check is successful; if they are different, the check fails.

[0148] Based on the communication method shown in FIG. 5, different from the case where the first transport block corresponds to one first code block, the CRC bits in the first code block are determined according to one of the two CRC polynomials, in the present application, no matter whether the first transport block corresponds to one first code block or the first transport block corresponds to multiple first code blocks, the CRC bits in each first code block are determined according to the first CRC polynomial, so that the receiving end device can directly perform cyclic redundancy check on the first code block through the first CRC polynomial, which can reduce the complexity and overhead of the cyclic redundancy check, thereby improving the efficiency of the cyclic redundancy check.

[0149] Based on the communication method shown in FIG. 5, optionally, the length of the first CRC polynomial can be equal to the length of the second CRC polynomial; or the length of the first CRC polynomial can be less than the length of the second CRC polynomial. The present application provides two possible embodiments:

[0150] In one possible embodiment, taking the case where the length of the first CRC polynomial is equal to the length of the second CRC polynomial as an example, the first CRC polynomial can be g CRC24B (D)=[D 24 +D 23 +D 6 +D 5 +D+1],the second CRC polynomial can be g CRC24A (D)=[D 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1],in the case where the first transport block corresponds to one first code block, the CRC bits in the first code block (or the first transport block) can be determined according to the first CRC polynomial, for example, 24 bits of "0" can be added after the information bits in the first code block (or the first transport block) to obtain a first sequence 1, the first sequence 1 is divided by D 24 +D 23 +D 6 +D 5 +D+1, and the remainder obtained is the CRC bits in the first code block (or the CRC bits in the first transport block).

[0151] Or, in the case where the first transport block corresponds to multiple first code blocks, the CRC bits in the first transport block can be determined according to the second CRC polynomial, for example, 24 bits of "0" can be added after the information bits in the first transport block to obtain a second sequence, the second sequence is divided by D24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 The remainder obtained by adding D+1 is the CRC bit in the first transmission block; furthermore, the CRC bit in each of the multiple first code blocks can be determined according to the first CRC polynomial. For example, 24 bits of "0" can be added to the end of the information bits in each first code block to obtain the first sequence 2, and the first sequence 2 divided by D 24 +D 23 +D 6 +D 5 The remainder obtained by adding D and 1 is the CRC bit in the first code block.

[0152] In another possible embodiment, taking the example that the length of the first CRC polynomial is less than the length of the second CRC polynomial, the first CRC polynomial can be g. CRC16 (D)=[D 16 +D 12 +D 5 +1], the second CRC polynomial can be g CRC24A (D)=[D 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1], in the case where the first transmission block corresponds to a first code block, the CRC bits in the first code block (or the first transmission block) can be determined according to the first CRC polynomial. For example, 16 bits of "0" can be added after the information bits in the first code block (or the first transmission block) to obtain the first sequence 1. The first sequence 1 is divided by D 16 +D 12 +D 5 The remainder obtained by adding 1 is the CRC bit in the first code block (or the CRC bit in the first transmission block).

[0153] Or, in the case that the first transport block corresponds to multiple first code blocks, the CRC bits in the first transport block can be determined according to the second CRC polynomial, for example, 24 bits of "0" can be added after the information bits in the first transport block to obtain a second sequence, and the second sequence is divided by D 24 +D 23 +D 18 +D 17 +D 14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1, and the remainder is the CRC bits in the first transport block; further, the CRC bits in each first code block of the multiple first code blocks can be determined according to the first CRC polynomial, for example, 16 bits of "0" can be added after the information bits in each first code block to obtain a first sequence 2, and the first sequence 2 is divided by D 16 +D 12 +D 5 +1, and the remainder is the CRC bits in the first code block.

[0154] Based on the above two possible embodiments, compared with the case that the length of the first CRC polynomial is equal to the length of the second CRC polynomial, in the case that the length of the first CRC polynomial is less than the length of the second CRC polynomial, the number of CRC bits in the first code block can be reduced, so that the length of the payload in the first code block can be improved, and the effectiveness of communication can be improved; compared with the case that the length of the first CRC polynomial is less than the length of the second CRC polynomial, in the case that the length of the first CRC polynomial is equal to the length of the second CRC polynomial, the accuracy of the cyclic redundancy check can be improved, so that the reliability of communication can be improved.

[0155] It can be understood that the first CRC polynomial and the second CRC polynomial in a communication system (which can include a sending end device and a receiving end device) can be fixed, that is, the first CRC polynomial used by the sending end device to determine the CRC bits in the first code block is fixed, and the first CRC polynomial used by the receiving end device to perform cyclic redundancy check on the second code block is fixed; similarly, the second CRC polynomial used by the sending end device to determine the CRC bits in the first transport block is fixed, and the second CRC polynomial used by the receiving end device to perform cyclic redundancy check on the second transport block is fixed.

[0156] In addition, the first CRC polynomial in different communication systems can be different, and the second CRC polynomial in different communication systems can be different.

[0157] Optionally, in a case that the length of the first CRC polynomial is equal to the length of the second CRC polynomial, the length of the first code block can be greater than the second preset threshold; or in a case that the length of the first CRC polynomial is less than the length of the second CRC polynomial, the length of the first code block can be less than or equal to the second preset threshold.

[0158] The second preset threshold can be predefined, or determined according to an actual communication scenario or communication condition, and is not limited.

[0159] For example, the second preset threshold can be 4000.

[0160] It can be understood that the sending end device can determine the length of the first code block according to the length of the first CRC polynomial and the length of the second CRC polynomial.

[0161] In an example, taking the length of the first CRC polynomial as 16 and the length of the second CRC polynomial as 24 as an example, when the sending end device and the receiving end device communicate, the sending end device can make the length of the first code block less than or equal to the second preset threshold. For example, taking the second preset threshold as 4000 as an example, the sending end device can make the length of the first code block less than or equal to 4000.

[0162] In another example, taking the length of the first CRC polynomial as 24 and the length of the second CRC polynomial as 24 as an example, when the sending end device and the receiving end device communicate, the sending end device can make the length of the first code block greater than the second preset threshold. For example, taking the second preset threshold as 4000 as an example, the sending end device can make the length of the first code block greater than 4000.

[0163] Based on the communication method shown in FIG. 5, the application further provides a communication method, which can dynamically determine the CRC bits in the first code block according to the length of the first code block, can reduce the length of the CRC bits in the first code block, can effectively improve the length of the payload in the first code block, and thus can improve the effectiveness of communication.

[0164] Specifically, in a case that the length of the first code block is less than or equal to the first preset threshold, the CRC bits in the first code block are part of the CRC bits in the CRC bit set; or in a case that the length of the first code block is greater than the first preset threshold, the CRC bits in the first code block are part of the CRC bits or all of the CRC bits in the CRC bit set.

[0165] It can be understood that part of the CRC bits or all of the CRC bits in the CRC bit set can be selected as the CRC bits in the first code block according to the length of the first code block, which can improve the flexibility and diversity of determining the CRC bits in the first code block.

[0166] The first preset threshold can be predefined or determined according to an actual communication scenario or a communication condition, and is not limited.

[0167] For example, the first preset threshold can be 1000. When the length of the first code block is less than or equal to 1000, the CRC bits in the first code block are part of the CRC bit set. When the length of the first code block is greater than 1000, the CRC bits in the first code block are all the CRC bits in the CRC bit set.

[0168] The CRC bit set is determined according to the first CRC polynomial and the information bits in the first code block, and the length of the CRC bit set is the same as the length of the first CRC polynomial.

[0169] The length of the CRC bit set can be understood as the number of CRC bits in the CRC bit set.

[0170] For example, when the length of the first CRC polynomial is 16, the length of the CRC bit set (or the number of CRC bits in the CRC bit set) can be 16. When the length of the first CRC polynomial is 24, the length of the CRC bit set (or the number of CRC bits in the CRC bit set) can be 24.

[0171] For example, the first CRC polynomial is g CRC16 (D)=[D 16 +D 12 +D 5 +1] For example, 16 bits of “0” can be added after the information bits in the first code block to obtain a first sequence. The first sequence is divided by D 16 +D 12 +D 5 +1 The remainder obtained is the CRC bit set.

[0172] For example, the remainder is 1010111000110100. The CRC bit set can be {1010111000110100}.

[0173] Optionally, when the length of the first code block is large, the number of CRC bits in the first code block is large. When the length of the first code block is small, the number of CRC bits in the first code block is small.

[0174] Specifically, the length of the code block can be segmented. When the length of the first code block is in different segments, the number of CRC bits in the first code block is different. Similarly, the CRC bits in the first code block are also different.

[0175] For example, assuming that the first segment corresponds to 6 CRC bits in the CRC bit set, the second segment corresponds to 11 CRC bits in the CRC bit set, and the third segment corresponds to all CRC bits in the CRC bit set, in a case where the length of the first code block is located in the first segment (i.e., in a case where the length of the first code block is less than 100), the CRC bits in the first code block can be the 6 CRC bits in the CRC bit set; or in a case where the length of the first code block is located in the second segment (i.e., in a case where the length of the first code block is greater than 100 and less than or equal to 1000), the CRC bits in the first code block can be the 11 CRC bits in the CRC bit set; or in a case where the length of the first code block is located in the third segment (i.e., in a case where the length of the first code block is greater than 1000), the CRC bits in the first code block can be all CRC bits in the CRC bit set.

[0176] Optionally, the CRC bits in the first code block can be the first X CRC bits in the CRC bit set, or the CRC bits in the first code block can be the last X CRC bits in the CRC bit set.

[0177] wherein X is a positive integer less than the length of the CRC bit set, or alternatively, X is a positive integer less than the number of CRC bits in the CRC bit set.

[0178] For example, X is one or more of 6, 7, 8, or 11.

[0179] For example, assuming that the CRC bit set is {1010111000110100}, and the CRC bits in the first code block are the first 6 CRC bits in the CRC bit set, the CRC bits in the first code block can be 101011; or assuming that the CRC bits in the first code block are the last 6 CRC bits in the CRC bit set, the CRC bits in the first code block can be 110100.

[0180] For example, assuming that the CRC bit set is {1010111000110100}, and the CRC bits in the first code block are the first 11 CRC bits in the CRC bit set, the CRC bits in the first code block can be 10101110001; or assuming that the CRC bits in the first code block are the last 11 CRC bits in the CRC bit set, the CRC bits in the first code block can be 11000110100.

[0181] Based on the above description of dynamically determining the CRC bits in the first code block, the length of the CRC bits in the first transport block can be dynamically determined according to the length of the first transport block, and the length of the CRC bits in the first transport block can be reduced, and the length of the payload in the first transport block can be increased.

[0182] The manner of dynamically determining the CRC bits in the first transport block can refer to the above description of the manner of dynamically determining the CRC bits in the first code block, and details are not described herein.

[0183] Based on the above description of dynamically determining the CRC bits in the first code block, several possible embodiments are proposed in the present application;

[0184] In the first possible embodiment, the first CRC polynomial can be g CRC16 (D)=[D 16 +D 12 +D 5 +1],the CRC bit set can include 16 CRC bits, and in the case that the length of the first code block is less than or equal to 100, the CRC bits in the first code block can be the first 6 (or 7, 8) CRC bits in the CRC bit set; in the case that the length of the first code block is greater than 100 and less than or equal to 1000, the CRC bits in the first code block can be the first 11 CRC bits in the CRC bit set; in the case that the length of the first code block is greater than 1000, the CRC bits in the first code block can be the 16 CRC bits in the CRC bit set.

[0185] In the second possible embodiment, the first CRC polynomial can be g CRC24B (D)=[D 24 +D 23 +D 6 +D 5 +D+1],the CRC bit set can include 24 CRC bits, and in the case that the length of the first code block is less than or equal to 100, the CRC bits in the first code block can be the first 6 (or 7, 8) CRC bits in the CRC bit set; in the case that the length of the first code block is greater than 100 and less than or equal to 1000, the CRC bits in the first code block can be the first 11 CRC bits in the CRC bit set; in the case that the length of the first code block is greater than 1000, the CRC bits in the first code block can be the 24 CRC bits in the CRC bit set.

[0186] The various embodiments of the present application can be implemented independently or in combination, without limitation. If not specifically stated and there is no logical conflict, the terms and / or descriptions provided in different embodiments of the present application are consistent and can be mutually referred to. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0187] It can be understood that, in the embodiments of the present application, the execution subject can execute part or all of the steps in the embodiments of the present application, and these steps or operations are only examples, and the embodiments of the present application can also execute other operations or various modifications of the operations. In addition, each step can be executed in a different order as presented in the embodiments of the present application, and it is possible that not all operations in the embodiments of the present application are executed.

[0188] The above mainly introduces the scheme provided by the embodiments of the present application from the perspective of interaction between devices. It can be understood that, in order to realize the above functions, each device comprises a hardware structure and / or a software module corresponding to the execution of each function. Those skilled in the art can easily realize that, in combination with the algorithm steps of each example described in the embodiments disclosed in the present application, the present application can be realized in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0189] The embodiments of the present application can divide the functional modules of each device according to the above method examples. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated module can be realized in the form of hardware or software functional module. The division of modules in the embodiments of the present application is illustrative, and is only a logical functional division. Actual implementation can have another division method.

[0190] In the case of dividing each functional module according to each function, FIG. 7 shows a sending end device 70, which can execute the actions performed by the sending end device in the method shown in FIG. 5. All related contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and the technical effects that can be obtained can be referred to the above method embodiment, which will not be described here again.

[0191] The sending device 70 can include a transceiver module 701 and a processing module 702. For example, the sending device 70 can be a communication device, or a chip or other combination device or component having the functions of the sending device described above. When the sending device 70 is a communication device, the transceiver module 701 can be a transceiver, which can include an antenna and a radio frequency circuit, etc. The processing module 702 can be a processor (or processing circuit), for example, a baseband processor, which can include one or more CPUs. When the sending device 70 is a component having the functions of the sending device described above, the transceiver module 701 can be a radio frequency unit. The processing module 702 can be a processor (or processing circuit), for example, a baseband processor. When the sending device 70 is a chip system, the transceiver module 701 can be an input / output interface of a chip (for example, a baseband chip). The processing module 702 can be a processor (or processing circuit) of the chip system, which can include one or more central processing units. It should be understood that the transceiver module 701 in the embodiments of the present application can be implemented by a transceiver or a transceiver-related circuit component. The processing module 702 can be implemented by a processor or a processor-related circuit component (or processing circuit).

[0192] For example, the transceiver module 701 can be configured to perform all the transceiving operations performed by the sending device in the embodiments shown in FIG. 5, and / or other processes for supporting the technologies described herein. The processing module 702 can be configured to perform all the operations performed by the sending device in the embodiments shown in FIG. 5, except for the transceiving operations, and / or other processes for supporting the technologies described herein.

[0193] FIG. 8 shows a receiving device 80, which can perform the actions performed by the receiving device in the method embodiments described above with reference to FIG. 5. All the related contents of the steps in the method embodiments described above can be referred to the function description of the corresponding functional modules, and the technical effects that can be achieved can be referred to the method embodiments described above, which will not be described here again.

[0194] The receiving end device 80 can include a transceiver module 801 and a processing module 802. For example, the receiving end device 80 can be a communication device, or a chip or other combination device or component applied in the communication device and having the functions of the receiving end device. When the receiving end device 80 is a communication device, the transceiver module 801 can be a transceiver including an antenna and a radio frequency circuit. The processing module 802 can be a processor (or processing circuit), for example, a baseband processor including one or more CPUs. When the receiving end device 80 is a component having the functions of the receiving end device, the transceiver module 801 can be a radio frequency unit. The processing module 802 can be a processor (or processing circuit), for example, a baseband processor. When the receiving end device 80 is a chip system, the transceiver module 801 can be an input / output interface of a chip (for example, a baseband chip). The processing module 802 can be a processor (or processing circuit) of the chip system, including one or more central processing units. The transceiver module 801 in the embodiments of the present application can be implemented by a transceiver or a transceiver-related circuit component. The processing module 802 can be implemented by a processor or a processor-related circuit component (or processing circuit).

[0195] For example, the transceiver module 801 can be configured to perform all the transceiving operations performed by the receiving end device in the embodiments shown in FIG. 5, and / or other processes for supporting the technologies described herein. The processing module 802 can be configured to perform all the operations performed by the receiving end device in the embodiments shown in FIG. 5, except the transceiving operations, and / or other processes for supporting the technologies described herein.

[0196] As another implementation manner, the transceiver module 701 in FIG. 7 can be replaced by a transceiver integrating the functions of the transceiver module 701. The processing module 702 can be replaced by a processor integrating the functions of the processing module 702. Further, the sending end device 70 shown in FIG. 7 can further include a memory. Alternatively, the transceiver module 801 in FIG. 8 can be replaced by a transceiver integrating the functions of the transceiver module 801. The processing module 802 can be replaced by a processor integrating the functions of the processing module 802. Further, the receiving end device 80 shown in FIG. 8 can further include a memory.

[0197] Alternatively, when the processing module 702 is replaced by a processor and the transceiver module 701 is replaced by a transceiver, the sending end device 70 involved in the embodiments of the present application can also be a communication apparatus 90 as shown in FIG. 9. Alternatively, when the processing module 802 is replaced by a processor and the transceiver module 801 is replaced by a transceiver, the receiving end device 80 involved in the embodiments of the present application can also be a communication apparatus 90 as shown in FIG. 9.

[0198] The processor can be a logic circuit 901, and the transceiver can be an interface circuit 902. Further, the communication device 90 shown in FIG. 9 can further include a memory 903.

[0199] The embodiments of the present application further provide a computer program product, which can realize the functions of any of the above-mentioned method embodiments when executed by a computer.

[0200] The embodiments of the present application further provide a computer program, which can realize the functions of any of the above-mentioned method embodiments when executed by a computer.

[0201] The embodiments of the present application further provide a computer readable storage medium. All or part of the processes of the above-mentioned method embodiments can be completed by a computer program instructing related hardware, which can be stored in the above-mentioned computer readable storage medium. When the program is executed, the program can include the processes of the above-mentioned method embodiments. The computer readable storage medium can be an internal storage unit of the terminal (including the data sending terminal and / or the data receiving terminal) of any of the above-mentioned embodiments, such as a hard disk or a memory of the terminal. The computer readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. Further, the computer readable storage medium can include both the internal storage unit and the external storage device of the terminal. The computer readable storage medium is used to store the above-mentioned computer program and other programs and data required by the terminal. The computer readable storage medium can also be used to temporarily store data that has been output or will be output.

[0202] The terms "first" and "second" and the like in the specification of the present application, claims, and drawings are used to distinguish different objects, and are not used to describe a particular order. "First", "second" are only for description purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more features. In the description of the embodiments, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0203] In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, product, or device.

[0204] In the present application, "at least one" means one or more. "Multiple" means two or more. "At least two" means two or three and more. "And / or", used to describe the relationship between the associated objects, means that there can be three relationships. For example, "A and / or B" can mean that there are three cases: only A, only B, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. "When" and "if" both mean that under certain objective circumstances, the corresponding processing will be done, not limited by time, and does not require a judgment action when implemented, nor does it mean that there are other limitations.

[0205] In the embodiments of the present application, the words "exemplary" or "for example" are used to mean serving as an example or illustration. Any embodiment or design presented as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or advantageous than other embodiments or design solutions. Rather, the use of "exemplary" or "for example" is intended to present relevant concepts in a concrete manner, facilitating understanding.

[0206] In the present application, "sending information to (a terminal device)" can be understood as the destination of the information being the terminal device. It can include direct or indirect sending of information to the terminal device. "Receiving information from (a terminal device)" can be understood as the source of the information being the terminal device, and can include direct or indirect receiving of information from the terminal device. The information may be processed as necessary between the source and the destination of the information transmission, such as format change, etc., but the destination can understand the valid information from the source.

[0207] Through the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above division of functional modules is taken as an example for illustration. In actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0208] In several embodiments provided in the present application, the disclosed apparatus and method can be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative. For example, the division of the modules or units is merely logical function division, and there can be another division manner in actual implementation. For example, a plurality of units or components can be combined or integrated into another apparatus, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections can be indirect couplings or communication connections through some interfaces, apparatuses or units, and can be in electrical, mechanical or other forms.

[0209] The units described as separate components can or can not be physically separate, and the components shown as units can be one physical unit or multiple physical units, i.e., can be located in one place or distributed in multiple different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiments.

[0210] In addition, each functional unit in the various embodiments of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0211] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application can be essentially or in whole or in part in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for causing an apparatus (which can be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the method described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a ROM, a RAM, a magnetic disk or an optical disk, and various program code storage media.

Claims

1. A communication method characterized by comprising: The method comprises: obtaining a first transport block; wherein the first transport block corresponds to one or more first code blocks; in the case that the first transport block corresponds to one first code block, cyclic redundancy check (CRC) bits in the first code block are determined according to a first CRC polynomial; in the case that the first transport block corresponds to a plurality of first code blocks, CRC bits in each of the plurality of first code blocks are determined according to the first CRC polynomial; outputting the one or more first code blocks.

2. A communication method characterized by comprising: The method comprises: receiving to-be-decoded information; wherein the to-be-decoded information corresponds to one or more first code blocks; in the case that the to-be-decoded information corresponds to one first code block, cyclic redundancy check (CRC) bits in the first code block are determined according to a first CRC polynomial; in the case that the to-be-decoded information corresponds to a plurality of first code blocks, CRC bits in each of the plurality of first code blocks are determined according to the first CRC polynomial; determining the one or more second code blocks according to the to-be-decoded information; performing cyclic redundancy check on each of the one or more second code blocks according to the first CRC polynomial.

3. The method of claim 1 or 2, wherein, in the case that the first transport block corresponds to a plurality of first code blocks, CRC bits in the first transport block are determined according to a second CRC polynomial; or in the case that the first transport block corresponds to one first code block, the CRC bits in the first transport block are the CRC bits in the first code block; wherein the first CRC polynomial is different from the second CRC polynomial.

4. The method of any one of claims 1-3, wherein, a length of the first CRC polynomial is equal to a length of the second CRC polynomial; or a length of the first CRC polynomial is less than a length of the second CRC polynomial; wherein the second polynomial is a CRC polynomial used to determine the CRC bits in the first transport block in the case that the first transport block corresponds to a plurality of first code blocks.

5. The method of any one of claims 1-4, wherein, a length of the first CRC polynomial is 24; or a length of the first CRC polynomial is 16.

6. The method of any one of claims 1-5, wherein, in the case that a length of a first code block is less than or equal to a first preset threshold, the CRC bits in the first code block are part of a CRC bit set; or in the case that a length of a first code block is greater than a first preset threshold, the CRC bits in the first code block are part of or all of a CRC bit set; wherein the CRC bit set is determined according to the first CRC polynomial and information bits in the first code block, and a length of the CRC bit set is the same as a length of the first CRC polynomial.

7. The method of claim 6, wherein, The CRC bits in the first code block are the first X CRC bits in the set of CRC bits; wherein X is a positive integer less than the length of the set of CRC bits.

8. A communication device, characterized by The communication device comprises a processor; the processor is configured to execute a computer program or instructions, so that the communication method of any one of claims 1, 3-7 is executed, or so that the communication method of any one of claims 2-7 is executed.

9. A communications device, characterized by The communication device comprises an interface circuit and a logic circuit; the interface circuit is configured to input and / or output information; the logic circuit is configured to execute the communication method of any one of claims 1, 3-7, or execute the communication method of any one of claims 2-7, process and / or generate the information according to the information.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions or programs; when the computer instructions or programs are executed on a computer, the communication method of any one of claims 1, 3-7 is executed, or the communication method of any one of claims 2-7 is executed.

11. A computer program product, characterised in that, The computer program product comprises computer instructions; when part or all of the computer instructions are executed on a computer, the communication method of any one of claims 1, 3-7 is executed, or the communication method of any one of claims 2-7 is executed.

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