Data flow control method, electronic device, and program product

Abstract

The present application relates to the technical field of communications, and discloses a data flow control method, an electronic device, and a program product. The data flow control method comprises: determining a first cache requirement for each port for priority flow control (PFC); on the basis of the first cache requirement and a preset allocation policy, allocating headroom cache space for each port; on the basis of the headroom cache space allocated to each port, determining a PFC flow control mode of each port; and by means of the corresponding PFC flow control mode of each port, controlling the flow of each port.

Description

Data flow control methods, electronic devices and software products

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411047079.3, filed on August 1, 2024, entitled "Data Flow Control Method, Electronic Device and Program Product", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application belongs to the field of communication technology, and in particular relates to a data flow control method, electronic device and program product. Background Technology

[0004] In network communication, lossless data transmission is crucial for ensuring the reliability and performance of critical services, especially within data centers and in long-distance communication across data centers. Priority Flow Control (PFC) enables lossless data transmission in the network. PFC prevents packet loss by controlling port traffic, making it particularly suitable for network congestion during long-distance communication. In PFC, the headroom buffer stores packets en route before the PFC flow control frame takes effect, preventing these packets from being dropped during long-distance communication across data centers.

[0005] In various scenarios, to improve the adaptability of PFC mechanisms, the industry has proposed several types of PFC mechanisms, such as speed-adjusting PFC and point-braking PFC. These PFC mechanisms have different requirements for headroom buffer space. If the headroom buffer space allocated to a port cannot meet the headroom buffer space requirements of the PFC mechanism on that port, it will limit the application of PFC mechanisms in long-distance communication and make it difficult to provide optimal lossless flow control and transmission performance. Therefore, how to reasonably allocate the total headroom buffer space to each port and configure appropriate PFC mechanisms for each port, so as to provide optimal lossless flow control and transmission performance with limited headroom buffer space and reduce the limitations of PFC mechanisms in long-distance communication, is a technical problem that needs to be solved by those skilled in the art. Summary of the Invention

[0006] The purpose of this application is to provide a data flow control method, electronic device, and program product that can solve the problem of the limited application of PFC mechanism in long-distance communication.

[0007] In a first aspect, a data flow control method is provided, executed by an electronic device. The method includes: determining the first buffer requirement of each port for priority-based flow control (PFC); allocating header buffer space to each port based on the first buffer requirement and a preset allocation strategy; determining the PFC flow control mode of each port according to the header buffer space allocated to each port; and controlling the flow of each port through the PFC flow control mode corresponding to each port.

[0008] Secondly, a data flow control device is provided, comprising: a determining module for determining the first buffer requirement of each port for priority-based flow control (PFC); an allocation module for allocating header buffer space to each port based on the first buffer requirement and a preset allocation strategy; the determining module is further configured to determine the PFC flow control method of each port according to the header buffer space allocated to each port; and a control module for controlling the flow of each port through the PFC flow control method corresponding to each port.

[0009] Thirdly, embodiments of this application provide an electronic device, including: a memory, a processor, and computer-executable instructions stored in the memory and executable on the processor, wherein the computer-executable instructions, when executed by the processor, implement the steps of performing the method of the first aspect.

[0010] Fourthly, embodiments of this application provide a computer-readable storage medium for storing computer-executable instructions that, when executed by a processor, implement the steps of the method of the first aspect.

[0011] Fifthly, embodiments of this application provide a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions that, when executed by a computer, implement the steps of the method of the first aspect. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 is a flowchart illustrating the data flow control method provided in an exemplary embodiment of this application.

[0014] Figure 2 is a schematic diagram of the structure between the upstream node and the downstream node provided in an exemplary embodiment of this application.

[0015] Figure 3 is a schematic diagram of the transmission structure of the selection results of the header buffer space and PFC mechanism provided by the exemplary embodiment of this application.

[0016] Figure 4 is a schematic diagram of the structure between nodes in an application scenario provided by an exemplary embodiment of this application.

[0017] Figure 5 is a schematic diagram of the structure between nodes in another application scenario provided by an exemplary embodiment of this application.

[0018] Figure 6 is a schematic diagram of the composition of the Layer 2 ISIS protocol in the application scenario provided by the exemplary embodiment of this application.

[0019] Figure 7 is a schematic diagram of the structure of the data flow control device provided in an exemplary embodiment of this application.

[0020] Figure 8 is a schematic diagram of the structure of an electronic device provided in an exemplary embodiment of this application. Detailed Implementation

[0021] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this application.

[0022] The technical solutions provided in this application will be described in detail below with reference to the accompanying drawings and through some embodiments and application scenarios.

[0023] Figure 1 illustrates a flowchart of a data flow control method 100 provided in an embodiment of this application. This method can be executed by an electronic device, such as a terminal device or a server device. In other words, the method can be executed by software or hardware installed on the terminal device or server device. Servers include, but are not limited to, a single server, a server cluster, a cloud server, or a cloud server cluster. As shown in Figure 1, the method may include the following steps.

[0024] Step S101: Determine the first buffer requirement for each port for Priority-Based Flow Control (PFC).

[0025] In one example, the port refers to the ingress port of the downstream node. Priority-based flow control (PFC) is a network technology primarily used to improve the reliability and efficiency of Ethernet in high-performance network environments such as data centers. PFC is part of the IEEE 802.1Qbb standard, allowing the creation of multiple virtual channels in a network and assigning different priority levels to each virtual channel, thus enabling fine-grained flow control and management. PFC allows the creation of up to eight virtual channels on a single physical link, each corresponding to an IEEE 802.1p priority level. When the ingress port of the receiving end detects that traffic of a certain priority exceeds its processing capacity, it can send a PFC frame to suspend the corresponding priority traffic at the sending end. This avoids packet loss. PFC allows traffic on each virtual channel to be suspended and restarted independently without affecting traffic on other channels. Once the receiving end is ready to process traffic again, it sends another PFC frame to notify the sending end to resume transmission. By precisely controlling traffic, PFC can prevent packet loss due to insufficient processing capacity at the receiving end. PFC is fundamental to building lossless networks, which is crucial for applications requiring high reliability. By differentiating traffic based on priority, PFC can optimize the allocation of network resources and ensure that critical services receive sufficient bandwidth.

[0026] Furthermore, after a PFC flow control frame is sent from a downstream node, the headroom buffer is used to store in-transit packets sent before the PFC flow control frame takes effect, at each downstream node's ingress port. The virtual queues for PFC at each downstream node's ingress port can share the ingress port's headroom buffer. The primary buffer requirement is the headroom buffer requirement for each port. Once a port is allocated headroom buffer space, the priority queues for PFC under that port can share that headroom buffer space, ensuring that the maximum headroom buffer space requirement is met and guaranteeing that each port can enable the PFC mechanism.

[0027] For example, as shown in Figure 2, a downstream node B may have multiple upstream nodes (nodes A and C). The ingress ports of the downstream nodes are P1, P2, and P3, respectively. The link length and port bandwidth from each upstream node to the downstream node are different. For example, the link length (link1) between node A and port P1 is 1000km, and the link length (link2) between node C and port P2 is 100km. Therefore, the headroom buffer space required for each ingress port of the downstream node is also different. For example, the maximum headroom buffer space (2BDP) required for port P1 is 125Mbyte, and the maximum headroom buffer space (2BDP) required for port P2 is 12.5Mbyte. In addition, some ports may not be enabled or may be offline (such as port P3), and these ports do not require headroom buffer space. For online ports, the required headroom buffer space for each port can be determined based on the port bandwidth and one-way link latency. When a port is online, the required headroom buffer space for each port is determined based on the port bandwidth and one-way link latency. When a port is offline, no headroom buffer space is allocated to the port.

[0028] Step S103: Allocate header cache space to each port based on the first cache requirement and the preset allocation strategy.

[0029] In one instance, in some embodiments, the preset allocation strategy is to enable PFC mechanism on as many ports as possible or to prioritize enabling PFC mechanism on high-priority ports.

[0030] In one instance, after obtaining the first cache requirement, the header cache space is allocated to each port in ascending order of the first cache requirement from the total header cache space. This method enables PFC mechanism to be enabled on as many ports as possible.

[0031] In some embodiments, header cache space that matches the first cache requirement is allocated to ports with higher priority according to the priority of each port. When the total header cache space is insufficient, the header cache space requirement of ports with higher priority can be guaranteed first, thereby ensuring that the PFC mechanism is enabled for high-priority ports.

[0032] Port priority can be determined based on at least one of the following: service type, port role, and port link length. Service types include, but are not limited to, data delivery services, intelligent computing services, and general services. For example, when setting priorities, data delivery services have a higher priority than intelligent computing services, and intelligent computing services have a higher priority than general services. Port roles include, but are not limited to, gateways and non-gateway services. For example, when setting priorities, gateways can be set to have a higher priority than non-gateway services. Link length refers to the length of the link from the upstream node (sender) to the ingress port of the downstream node. When setting priorities, the port priority can be determined based on the link length between the sender and the port; the longer the link length, the higher the port priority.

[0033] In other embodiments, the preset allocation strategy is to balance port priority and the number of ports with PFC mechanism enabled.

[0034] In one instance, when allocating header buffer space for each port, both port priority and the number of ports with PFC enabled are considered.

[0035] In other embodiments, when both port priority and the number of ports with PFC enabled are considered, allocating header cache space to each port based on the first cache requirement and the preset allocation strategy includes: determining the average header cache space based on the total header cache space and the number of ports; and allocating header cache space to each port according to the first cache requirement, the average header cache space, and the priority.

[0036] In one example, the average header cache space can be the ratio of the total header cache space to the number of ports. If a port is offline (down), no cache space is allocated to it. For ports that are online, if there is a first port whose first cache requirement is less than the average header cache space, the first port is allocated header cache space that matches its first cache requirement. Then, in descending order of priority, the second ports are allocated header cache space that matches their corresponding first cache requirement. The second ports are all the ports other than the first port.

[0037] In one example, the first buffer requirement (BDP) for each port is examined. If a port's BDP is less than the average header buffer space, header buffer space is allocated to that port first. For the remaining ports, header buffer space is allocated to each port in descending order of priority, according to its corresponding BDP. During the allocation process, if the remaining header buffer space is less than the port's first buffer requirement (BDP), that port is skipped, and header buffer space is allocated to the next port. In this way, header buffer space is allocated according to the actual BDP required by each port, which can meet the actual header buffer space requirements of the ports.

[0038] Furthermore, after allocating the header cache space corresponding to the first cache requirement (BDP) to each port, in order to ensure the maximum resource utilization of the header cache space, after allocating the header cache space consistent with the first cache requirement of the second port in descending order of priority, it is determined whether there is any remaining first header cache space. If there is remaining first header cache space, then the first port and the second port are allocated header cache space consistent with the first cache requirement in descending order of priority. If there is still remaining first header cache space, then the remaining first header cache space is allocated to the port with the highest priority.

[0039] In one example, if there is still header cache space remaining, the header cache space for each port's corresponding BDP is allocated to each port in descending order of port priority. During the allocation process, if the remaining header cache space is less than the first cache requirement BDP for a port, it is skipped, and header cache space is allocated to the next port. At this point, each allocable port has been allocated 2BDP of header cache space, which can be the upper limit of the header cache space that can be allocated to each port. If there is still remaining header cache space after the above allocation process, the remaining header cache space is allocated to the port with the highest priority.

[0040] It is worth noting that if the connection status of the port changes, for example, if the connection status of the port changes from offline to online, or from online to offline, the above header cache space allocation process is re-executed to refresh the allocation of the header cache space. This refresh allocation method can effectively ensure the utilization and flexibility of the header cache space.

[0041] Step S105: Determine the PFC flow control method for each port based on the header buffer space allocated to each port.

[0042] In one example, after the header buffer space is allocated, each port determines the enabled PFC mechanism based on the actual allocated header buffer capacity. PFC flow control refers to flow control methods based on PFC, including but not limited to speed-adjusting PFC, spot-braking PFC, and standard PFC. Speed-adjusting PFC requires a header buffer space greater than twice the BDP (Browser Flow Control), and its flow control method is to reduce speed when congested and not reduce speed when not congested. Standard PFC requires a header buffer space of 2BDP, and its flow control method is to stop flow when congested and not reduce speed when not congested. Spot-braking PFC requires a header buffer space of BDP, and its flow control method is to stop flow when congested and actively spot-brake to reduce speed when not congested.

[0043] In other embodiments, determining the PFC flow control method for each port based on the head buffer space allocated to each port includes: determining the second buffer requirement for each port based on the first buffer requirement; and determining the PFC flow control method for the port as the PFC speed control method when the head buffer space allocated to the port is greater than the second buffer requirement. The speed control method is used to indicate that the flow rate of the port's traffic is reduced when the port is congested.

[0044] If the head buffer space allocated to the port is equal to the second buffer requirement, the PFC flow control mode of the port is determined to be the standard PFC control mode, which is used to indicate that the flow of traffic on the port is stopped when the port is congested.

[0045] If the head buffer space allocated to the port is greater than or equal to the first buffer requirement and less than the second buffer requirement, the PFC flow control mode of the port is determined to be the PFC spot braking control mode. The spot braking control mode is used to indicate that the flow of the port is stopped when the port is congested, and the flow of the port is stopped at a predefined interval when the port is not congested.

[0046] In one example, if the first buffer requirement is BDP, then the second buffer requirement can be 2BDP. For point-braking PFC, standard PFC, and speed-down PFC, the capacity requirements for the header buffer space on each port differ. Therefore, the PFC flow control method for each port can be determined by the actual header buffer space allocated to each port, the first buffer requirement, and the second buffer requirement.

[0047] In one instance, if the actual head buffer space allocated to the port has a buffer capacity greater than 2BDP of the port, a speed-adjustable PFC mechanism can be optionally enabled. With the speed-adjustable PFC mechanism, the flow rate of the port traffic is reduced when the port is congested. The reduced flow rate can be calculated based on the amount of head buffer space allocated to the port that exceeds 2BDP, combined with empirical values.

[0048] If the cache capacity of the head cache space allocated to the port is equal to the second cache requirement of 2BDP, then the standard PFC mechanism is enabled. Under the standard PFC mechanism, if the port becomes congested, the traffic on the port will be stopped.

[0049] If the header buffer space allocated to the port is greater than or equal to the first buffer requirement (BDP) and less than the second buffer requirement (2BDP), then the point-stop fare collection (PFC) mechanism is activated. The PFC mechanism instructs the port to pause traffic for a period of time at predefined intervals when the port is not congested, and then resume normal traffic transmission. Conversely, it pauses traffic when the port is congested. The predefined intervals can be set according to actual conditions, and are not limited in this embodiment.

[0050] Furthermore, if the header buffer space allocated to a port is smaller than the port's BDP, the PFC mechanism is not enabled. Thus, by selecting a suitable PFC mechanism for the actual header buffer space allocated to a port, the header buffer space can be used to its maximum potential and adapt to the corresponding PFC mechanism, thereby further ensuring long-distance and lossless data transmission.

[0051] Furthermore, in some embodiments, a threshold Δ can be set, where 2BDP+Δ can serve as the threshold value for enabling the speed-adjustable PFC mechanism. The speed-adjustable PFC mechanism is not enabled when the actual header buffer space allocated to the port does not exceed 2BDP+Δ, and is enabled when the actual header buffer space allocated to the port exceeds 2BDP+Δ. It is worth noting that 2BDP+Δ is also the second buffer requirement.

[0052] Step S107: Control the traffic of each port through the PFC traffic control method corresponding to each port.

[0053] In one example, after determining the PFC mechanism for each port, the traffic of the corresponding port is controlled according to the PFC mechanism.

[0054] Furthermore, as shown in Figure 3, after selecting a PFC mechanism for the corresponding port, the peer node can be notified of the final selected PFC mechanism via a protocol. The controller can also be notified of the allocated header buffer space for the port and the PFC mechanism result via the southbound interface. The priority (pPriority) of each port can be transmitted from the controller to downstream nodes. The protocols include, but are not limited to, Link Layer Discovery Protocol (LLDP), Intermediate System to Intermediate System (ISIS), and Media Redundancy Protocol (MRP). The southbound interface includes, but is not limited to, standard protocols for managing and configuring network devices (Network Configuration Protocol (NETCONF), Simple Network Management Protocol (SNMP), and Border Gateway Protocol (BGP).

[0055] In this embodiment, the first buffer requirement of each port for Priority-Based Flow Control (PFC) is determined. Then, based on the first buffer requirement and a preset allocation strategy, header buffer space is allocated to each port. Finally, the PFC flow control method for each port is determined according to the allocated header buffer space, and the traffic of each port is controlled using the corresponding PFC flow control method. Thus, header buffer space is allocated to each port according to its actual PFC buffer requirement, thereby satisfying the header buffer space requirements of each port. Furthermore, a suitable PFC mechanism is selected based on the allocated header buffer space for the current port. Therefore, the technical solution of this embodiment can allocate reasonable resource space to ports and configure appropriate PFC mechanisms for each port, thereby providing optimal lossless flow control and transmission performance with limited header buffer space resources, reducing the limitations of PFC mechanisms in long-distance communication.

[0056] In other embodiments, determining the first buffer requirement for each port for priority-based flow control (PFC) includes determining the first buffer requirement for the port based on the port bandwidth and one-way link latency.

[0057] In one example, the first buffer requirement of a port can be calculated by multiplying its port bandwidth by its one-way link delay. For instance, the formula BDP can be used to calculate the first buffer requirement of a port, where B represents the port bandwidth, D represents the port's one-way link delay, and P represents multiplying B and P.

[0058] Furthermore, in real-world networks, upstream nodes' outgoing ports often do not send packets at full rate. There may be situations where the actual bandwidth of downstream ports is less than their port rate. If allocation is based on the port's bandwidth, it could lead to wasted headroom buffer resources. Additionally, downstream nodes continue sending packets; completely stopping downstream nodes could also waste headroom buffer space. To address this, this application provides an embodiment that predicts the port's future traffic rate and predicted traffic based on the current port traffic; corrects the port's bandwidth using the traffic rate and predicted traffic to obtain the actual port bandwidth; and determines the port's first buffer requirement based on the actual port bandwidth and the port's one-way link latency.

[0059] In one example, the length of the future time period can be the Round-Trip Time (RTT) or 2RTT, which refers to the time from when the sender starts sending data to when the sender receives an acknowledgment from the receiver. When predicting the traffic rate and traffic volume of the port in the future time period, traffic prediction schemes in related technologies can be used to predict the traffic rate and traffic volume of the future time period. For example, artificial intelligence (AI)-based prediction methods can accurately predict the traffic rate and traffic trend of the future time period, or it can be designed by relevant personnel based on historical parameters and experience. It is worth noting that the length of the future time period can also be other values, which are not limited in this embodiment.

[0060] Furthermore, in other embodiments, correcting the port bandwidth using the flow rate and predicted flow to obtain the actual port bandwidth includes: normalizing the flow rate and predicted flow to obtain the normalized flow rate and normalized predicted flow; and calculating the product of the normalized flow rate, normalized predicted flow, and port bandwidth to obtain the actual port bandwidth.

[0061] In one example, after normalizing the obtained flow rate and predicted flow, two adjustment factors are obtained: the normalized flow rate *a* corresponding to the flow rate and the normalized predicted flow rate *b* corresponding to the predicted flow, where both *a* and *b* are less than or equal to 1. After obtaining *a* and *b*, the actual port bandwidth is obtained by multiplying *a*, *b*, and the port bandwidth *B*, i.e., *Bf* = *a*b*B*, where *Bf* is the actual port bandwidth.

[0062] Furthermore, after obtaining the actual port bandwidth, the first buffer requirement (BfDP) of the port is determined based on the actual port bandwidth and the one-way link latency.

[0063] Correspondingly, the second buffer requirement can be 2BfDP. Additionally, a threshold Δ can be set, where the second buffer requirement is 2BfDP + Δ. The speed-adjusting PFC mechanism is disabled when the actual header buffer space allocated to the port is less than 2BfDP + Δ.

[0064] The following describes the allocation of headroom cache space based on port bandwidth and the selection process of the PFC mechanism provided in this application embodiment, using an application scenario as an example. As shown in Figure 4, assume that path node D->node B is intelligent computing service, node A->node B is data express service, and node C->node B is ordinary service. The controller is configured with priority (pPriority) that intelligent computing service is higher than data express service, and data express service is higher than ordinary service. Assume the total headroom cache space is S = 200M bytes. The first and second cache requirements for each port are calculated according to the method described in the above embodiment.

[0065] Among them, port P1: BDP = 25M bytes, 2BDP = 50M bytes.

[0066] Port P2: BDP = 100M bytes, 2BDP = 200M bytes.

[0067] Port P3: BDP = 20M bytes, 2BDP = 40M bytes.

[0068] Port P4 is offline and no headroom cache space is allocated.

[0069] Calculate the average header buffer space: S divided by the number of ports = 200 / 4 = 50MB, meaning the average header buffer space is 50MB. Assume each port supports standard PFC, point-brake PFC, and speed-adjustable PFC mechanisms.

[0070] The overall headroom cache space allocation process is as follows.

[0071] Since port P4 is down, no cache is allocated.

[0072] For port P1, BDP = 25M bytes < 50M bytes; for port P3, BDP = 20M bytes < 50M bytes. Therefore, allocate 25M bytes and 20M bytes to ports P1 and P3 respectively. At this time, the remaining headroom cache space S = 155M bytes.

[0073] For port P2, 1BDP is allocated according to priority, so P2 is allocated 100M bytes, and the remaining headroom buffer space S = 55M bytes.

[0074] Next, 1BDP buffer is allocated to ports P1, P2, and P3 according to their priority. Port P1 is then allocated 25M, for a total of 50M bytes. The remaining headroom buffer space S = 30M, which is less than the 100M bytes allocated to port P2. Therefore, port P2 is skipped, and 20M is allocated to port P3, leaving 10M of headroom buffer space.

[0075] The remaining 10M of headroom cache space is allocated to the highest priority P1 port, so P1 port is allocated a total of 60M bytes of headroom cache space, P2 port is allocated a total of 100M bytes of headroom cache space, and P3 port is allocated a total of 40M bytes of headroom cache space.

[0076] In addition, the cache can be allocated in ascending order of the first cache requirement from port P1 to port P3, as follows: port P4 is in a down state and no cache is allocated.

[0077] Sort ports P1, P2, and P3 in ascending order of their first cache requirement. First, allocate 25MB of headroom cache space to port P1, then allocate 20MB of headroom cache space to port P3, and finally allocate 100MB of headroom cache space to port P2, leaving 55MB of headroom cache space remaining.

[0078] For ports P1, P2, and P3, allocate 1BDP headroom cache space in ascending order of their primary cache requirements. First, allocate 25MB of headroom cache space to port P1, then allocate 20MB of headroom cache space to port P2. The remaining 10MB of headroom cache space is insufficient to allocate 1BDP for P2, so it is skipped. The remaining 10MB is allocated to the highest priority port P1, for a total of 60MB.

[0079] At this point, the headroom cache space allocation is complete.

[0080] Secondly, a suitable PFC mechanism should be selected based on the headroom cache space allocated to each port.

[0081] If the allocated headroom buffer space for port P1 is slightly larger than 2BDP of port P1, but does not exceed the threshold value of 2BDP+Δ for the speed-adjustable PFC mechanism, then the standard PFC mechanism is enabled for flow control; if the allocated headroom buffer space is slightly larger than 2BDP of port P1, but exceeds the threshold value of 2BDP+Δ for the speed-adjustable PFC mechanism, then the speed-adjustable PFC mechanism is enabled for flow control.

[0082] For port P2, if the allocated headroom buffer space is equal to 1BDP of port P2, then the point brake PFC mechanism is enabled for flow control.

[0083] For port P3, if the allocated headroom buffer space is equal to 2BDP of port P3, then the standard PFC mechanism is enabled for flow control.

[0084] The following describes the allocation of headroom cache space based on port bandwidth and the selection process of PFC mechanism provided in this application embodiment, using another application scenario as an example. As shown in Figure 5, it is assumed that path node D->node B is intelligent computing service, node A->node B is data express service, and node C->node B is ordinary service.

[0085] Assuming that the current traffic flow rate (corresponding to the current flow rate in the figure) for port P1 is 2G, based on the characteristics of intelligent computing services, the traffic model predicts that the actual port bandwidth Bf will be within 4G (considering redundancy) within the next 2 RTT.

[0086] Assuming that the current traffic flow rate (corresponding to the current flow rate in the figure) for port P2 is 30G, based on the characteristics of data express services, the traffic model predicts that the actual port bandwidth within the next 2 RTTs will be within Bf = 40G (considering redundancy).

[0087] Assuming that for port P3, the current traffic flow rate (corresponding to the current flow rate in the figure) is 9G, the traffic model predicts that the actual port bandwidth within the next 2 RTTs will be Bf = 10G.

[0088] Assume the total headroom cache space is S = 200MB. Calculate the first and second cache requirements for each port using the method described in the above embodiment.

[0089] Then calculate port P1: BfDP = 10M bytes, 2BfDP = 20M bytes.

[0090] Port P2: BfDP = 40M bytes, 2BfDP = 80M bytes.

[0091] Port P3: BfDP = 20M bytes, 2BfDP = 40M bytes.

[0092] Calculate the average header buffer space: S divided by the number of ports = 200 / 4 = 50MB, meaning the average header buffer space is 50MB. Assume each port supports standard PFC, point-brake PFC, and speed-adjustable PFC mechanisms.

[0093] The overall process for the headroom cache space is as follows.

[0094] Since the P4 port is down, no headroom cache space will be allocated.

[0095] For port P1, BfDP = 10M bytes < 50M bytes, and for port P3, BfDP = 20M bytes < 50M bytes, then allocate 10M bytes of headroom cache space to port P1 and 20M bytes of headroom cache space to port P3 respectively. At this time, the remaining headroom cache space S = 170M bytes.

[0096] For port P2, 1BDP is allocated according to priority, so port P2 is allocated 40M bytes of headroom buffer space. At this time, the remaining headroom buffer space S = 130M bytes.

[0097] For ports P1, P2, and P3, allocate 1BDP headroom buffer space according to port priority. Then, allocate 10M bytes of headroom buffer space for port P1, 40M bytes for port P2, and 20M bytes for port P3. At this time, the remaining headroom buffer space S = 60M bytes.

[0098] The remaining 60MB of headroom cache space is allocated to port P1, so port P1 is allocated a total of 80MB of headroom cache space, port P2 is allocated a total of 80MB of headroom cache space, and port P3 is allocated a total of 40MB of headroom cache space.

[0099] Secondly, select a suitable PFC mechanism based on the actual headroom cache space allocated to each port.

[0100] If the allocated headroom buffer space for port P1 is much larger than 2BDP of port P1 and exceeds the threshold value of 2BDP+Δ of the speed-adjusting PFC mechanism, then the speed-adjusting PFC mechanism will be enabled for flow control.

[0101] For port P2, if the allocated headroom buffer space is equal to 2BDP of port P2, then the standard PFC mechanism is enabled for flow control.

[0102] For port P3, if the allocated headroom buffer space is equal to 2BDP of port P3, then the standard PFC mechanism is enabled for flow control.

[0103] The following describes the protocol for sending the selection result of the PFC mechanism provided in this application embodiment to the peer node, using another application scenario as an example. As shown in Figure 6, the PFC mechanism selection result can be announced to the peer node using a Layer 2 or Layer 3 protocol. This application embodiment uses the Layer 2 ISIS protocol as an example. In the protocol message types defined by ISIS, the Link State Protocol Data Unit (LSPDU) used to exchange link state information can be used for nodes to announce various information to each other. The LSPDU includes a fixed-size header and a series of data fields (Type-Length-Value, TLV), including Extended IS Reachability TLV (type=22) and Extended IP Reachability TLV (type=135). Each TLV can also carry multiple sub-TLVs that need to be announced. This application embodiment defines a pfc-mechanism sub-TLV to carry PFC mechanism information, and this sub-TLV is carried in the Extended IS Reachability TLV.

[0104] Furthermore, the allocation results of the headroom cache space and the selection results of the PFC mechanism can be sent to the controller via Netconf notification. NETCONF can be defined using the data modeling language (Yet Another Next Generation, YANG).

[0105] Figure 7 shows a schematic diagram of the data flow control device provided in an embodiment of this application. The device 700 includes: a determining module 701, used to determine the first cache requirement of each port for priority-based flow control (PFC); an allocation module 702, used to allocate header cache space to each port based on the first cache requirement and a preset allocation strategy; the determining module 701 is also used to determine the PFC flow control mode of each port according to the header cache space allocated to each port; and a control module 703, used to control the flow of each port through the PFC flow control mode corresponding to each port.

[0106] In this embodiment, the first buffer requirement of each port for Priority-Based Flow Control (PFC) is determined. Then, based on the first buffer requirement and a preset allocation strategy, header buffer space is allocated to each port. Finally, the PFC flow control method for each port is determined according to the allocated header buffer space, and the traffic of each port is controlled using the corresponding PFC flow control method. Thus, header buffer space is allocated to each port according to its actual PFC buffer requirement, thereby satisfying the header buffer space requirements of each port. Furthermore, a suitable PFC mechanism is selected based on the allocated header buffer space for the current port. Therefore, the technical solution of this embodiment can allocate reasonable resource space to ports and configure appropriate PFC mechanisms for each port, thereby providing optimal lossless flow control and transmission performance with limited header buffer space resources, reducing the limitations of PFC mechanisms in long-distance communication.

[0107] In one example, the determining module 701 is further configured to determine the second cache requirement of each port based on the first cache requirement; if the head cache space allocated to the port is greater than the second cache requirement, the PFC flow control mode of the port is determined to be the PFC speed control mode, which is used to indicate that the flow rate of the port is reduced when the port is congested; if the head cache space allocated to the port is equal to the second cache requirement, the PFC flow control mode of the port is determined to be the PFC standard control mode, which is used to indicate that the flow of the port is stopped when the port is congested; if the head cache space allocated to the port is greater than or equal to the first cache requirement and less than the second cache requirement, the PFC flow control mode of the port is determined to be the PFC intermittent braking mode, which is used to indicate that the flow of the port is stopped when the port is congested and at predefined intervals when the port is not congested.

[0108] In one instance, the determination module 701 is also used to determine the first buffer requirement of the port based on the port bandwidth and one-way link latency.

[0109] In one instance, the determination module 701 is further configured to predict the future traffic rate and predicted traffic of the port based on the current traffic of the port; correct the port bandwidth of the port using the traffic rate and predicted traffic to obtain the actual port bandwidth; and determine the first buffer requirement of the port based on the actual port bandwidth and the one-way link delay of the port.

[0110] In one instance, the default allocation strategy is to enable PFC mechanism on as many ports as possible or to prioritize enabling PFC mechanism on high-priority ports.

[0111] In one instance, the default allocation strategy is to balance port priority with the number of ports with PFC enabled.

[0112] In one instance, the allocation module 702 is also used to determine the average header cache space based on the total header cache space and the number of ports; and to allocate header cache space to each port according to the first cache requirement, the average header cache space, and the priority.

[0113] In one example, the allocation module 702 is further configured to: if there is a first port whose first cache requirement is less than the average header cache space, prioritize allocating header cache space consistent with the first cache requirement to the first port; and allocate header cache space consistent with the first cache requirement to the second port in descending order of priority, where the second port is any of the ports other than the first port. It then determines whether there is any remaining first residual header cache space; if there is, allocate header cache space consistent with the first cache requirement to the first port and the second port in descending order of priority; if there is still remaining first residual header cache space, allocate the remaining first residual header cache space to the port with the highest priority.

[0114] In one instance, port priority is determined based on at least one of the following: port service type, port role, and port link length.

[0115] The device 700 provided in this application embodiment can execute the methods in the preceding method embodiments and realize the functions and beneficial effects of the methods in the preceding method embodiments, which will not be repeated here.

[0116] Figure 8 shows a schematic diagram of the hardware structure of the electronic device implementing the embodiments of this application. Referring to the figure, at the hardware level, the electronic device includes a processor, and may also include an internal bus, a network interface, and a memory. The memory may include RAM, such as high-speed random-access memory (RAM), or non-volatile memory, such as at least one disk storage device. Of course, the electronic device may also include other hardware required for other services.

[0117] The processor, network interface, and memory can be interconnected via an internal bus, which can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, this diagram uses only a single bidirectional arrow, but it does not imply that there is only one bus or one type of bus.

[0118] Memory is used to store programs. Programs may include program code, which includes computer operation instructions. Memory may include main memory and non-volatile memory, and it provides instructions and data to the processor.

[0119] The processor reads the corresponding computer program from non-volatile memory into memory and then runs it, forming a device for locating a specific user at the logical level. The processor executes the program stored in memory and is used to perform the method disclosed in the embodiment shown in Figure 1, and to achieve the functions and beneficial effects of the methods in the preceding method embodiments, which will not be repeated here.

[0120] The methods disclosed in the embodiments shown in Figure 1 of this application can be applied to a processor or implemented by a processor. The processor may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above methods can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software module can reside in a mature storage medium in the field, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0121] The electronic device can also execute the methods in the preceding method embodiments and achieve the functions and beneficial effects of the methods in the preceding method embodiments, which will not be repeated here.

[0122] Of course, in addition to software implementation, the electronic device of this application does not exclude other implementation methods, such as logic devices or a combination of hardware and software, etc. In other words, the execution subject of the following processing flow is not limited to each logic unit, but can also be hardware or logic devices.

[0123] This application also proposes a computer-readable storage medium that stores one or more programs. When executed by an electronic device including multiple applications, the one or more programs cause the electronic device to perform the methods disclosed in the embodiment shown in FIG1 and achieve the functions and beneficial effects of the methods in the foregoing method embodiments, which will not be repeated here.

[0124] The computer-readable storage media include read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0125] Furthermore, this application also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions, which, when executed by a computer, implement the following process: the method disclosed in the embodiment shown in FIG1 and implement the functions and beneficial effects of the methods in the preceding method embodiments, which will not be repeated here.

[0126] In summary, the above are merely preferred embodiments of this application and are not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

[0127] The systems, apparatus, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products having certain functions. A typical implementation device is a computer. A computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0128] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0129] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0130] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

Claims

1. A data flow control method, comprising: determining a first buffer requirement of each port for priority-based flow control (PFC) ; allocating a headroom space to each port based on the first buffer requirement and a preset allocation strategy; determining a PFC flow control mode of each port according to the headroom space allocated to each port; and controlling the flow of each port through the PFC flow control mode corresponding to each port. The determining of the PFC flow control mode of each port according to the headroom space allocated to each port comprises: determining a second buffer requirement of each port based on the first buffer requirement; determining the PFC flow control mode of the port as a speed regulation control mode of PFC if the headroom space allocated to the port is greater than the second buffer requirement, the speed regulation control mode being used to instruct to slow down the flow rate of the port when the port is congested; determining the PFC flow control mode of the port as a standard control mode of PFC if the headroom space allocated to the port is equal to the second buffer requirement, the standard control mode being used to instruct to stop the flow of the port when the port is congested; and determining the PFC flow control mode of the port as a point brake control mode of PFC if the headroom space allocated to the port is greater than or equal to the first buffer requirement and less than the second buffer requirement, the point brake control mode being used to instruct to stop the flow of the port when the port is congested and to stop the flow of the port at a predefined interval when the port is not congested. The determining of the first buffer requirement of each port for PFC comprises: determining the first buffer requirement of the port according to the port bandwidth of the port and the one-way link latency of the port. The determining of the first buffer requirement of each port for PFC comprises: predicting the flow rate and the predicted flow of the port in a future period according to the current flow of the port; correcting the port bandwidth of the port by using the flow rate and the predicted flow to obtain an actual port bandwidth; and determining the first buffer requirement of the port according to the actual port bandwidth and the one-way link latency of the port. The preset allocation strategy is to enable as many ports as possible to use the PFC mechanism or to ensure that high-priority ports use the PFC mechanism in priority.

2. The data flow control method of claim 1, wherein, The preset allocation strategy is to consider both the port priority and the number of ports using the PFC mechanism. The allocating of the headroom space to each port based on the first buffer requirement and the preset allocation strategy comprises: determining an average headroom space based on the total headroom space and the number of ports; and allocating the headroom space to each port according to the first buffer requirement, the average headroom space and the priority. The allocating of the headroom space to each port according to the first buffer requirement, the average headroom space and the priority comprises: ​ 3. The data flow control method of claim 1, wherein, ​ ​ 4. The data flow control method of claim 1, wherein, ​ ​ ​ ​ 5. The data traffic control method of any of claims 1-4, wherein, ​ 6. The data flow control method of any of claims 1-4, wherein, ​ 7. The data flow control method of claim 6, wherein, ​ ​ ​ 8. The data flow control method of claim 7, wherein, ​ if the first port exists and the first cache requirement is less than the first end of the average head cache space, allocating head cache space consistent with the first cache requirement to the first port as a priority; allocating head cache space consistent with the first cache requirement to the second port in turn according to the order from high to low of the priority, the second port being the rest of the ports except the first port; determining whether the total head cache space has a first remaining head cache space; if the first remaining head cache space exists, allocating head cache space consistent with the first cache requirement to the first port and the second port in turn according to the order from high to low of the priority; if the first remaining head cache space still exists, allocating the first remaining head cache space to the port with the highest priority.

9. The data flow control method of claim 5 or 6, wherein, The priority of the port is determined according to at least one of the following: a service type of the port, a role of the port, a link length of the port.

10. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the computer program, when executed by the processor, implementing the steps of the data flow control method according to any one of claims 1-9.

11. A computer program product comprising a computer program, the computer program, when executed by a processor, implementing the steps of the data flow control method according to any one of claims 1-9.

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