Display substrate and manufacturing method therefor, and display device

Abstract

A display substrate and a manufacturing method therefor, and a display device, relating to, but not limited to the technical field of display. The display substrate comprises a base (101), an active layer (6), a first gate (8), and at least one source / drain; the active layer (6) is disposed on the base (101); the first gate (8) is provided on the side of the active layer (6) away from the base (101); the at least one source / drain is provided on the side of the first gate (8) away from the base (101); at least one via hole is formed between the active layer (6) and the at least one source / drain; the at least one source / drain is connected to the active layer (6) by means of the at least one via hole; the display substrate further comprises at least one light-blocking structure; the at least one light-blocking structure is provided on the side of the active layer (6) close to the base (101); and the orthographic projection of the at least one light-blocking structure on the base (101) includes the orthographic projection of the at least one via hole on the base (101). The size of the light-blocking structures is reduced to ensure the aperture ratio of the display device.

Description

Display substrate, preparation method thereof and display device

[0001] The present application claims priority to the Chinese patent application No. 202411047554.7, filed on July 31, 2024, and entitled "Display substrate, preparation method thereof and display device", the content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of display, in particular to a display substrate, a preparation method thereof and a display device. BACKGROUND

[0003] Micro Organic Light-Emitting Diode (Micro-OLED) is a micro display developed in recent years, and silicon-based OLED is one of them. Silicon-based OLED not only can realize active addressing of pixels, but also can realize preparation of pixel driving circuit structure on silicon-based substrate, which is beneficial to reduce system volume and realize light weight. Silicon-based OLED is prepared by mature Complementary Metal Oxide Semiconductor (CMOS) integrated circuit process, has the advantages of small volume, high resolution (Pixels Per Inch, PPI), high refresh rate, etc., and is widely used in Virtual Reality (VR) or Augmented Reality (AR) near-eye display field. SUMMARY

[0004] The following is a summary of the subject matter of the detailed description herein. This summary is not intended to limit the scope of the claims.

[0005] The present application provides a display substrate, comprising a substrate, an active layer, a first gate electrode and at least one source / drain electrode, the active layer is arranged on the substrate, the first gate electrode is arranged on the side of the active layer away from the substrate, the at least one source / drain electrode is arranged on the side of the first gate electrode away from the substrate, at least one via hole is arranged between the active layer and the at least one source / drain electrode, the at least one source / drain electrode is connected with the active layer through the at least one via hole, and the display substrate further comprises at least one light shielding structure, the at least one light shielding structure is arranged on the side of the active layer close to the substrate, and the orthographic projection of the at least one light shielding structure on the substrate contains the orthographic projection of the at least one via hole on the substrate.

[0006] Optionally, the at least one source-drain electrode includes a signal line as a first pole, the at least one via hole includes a first via hole, the first via hole is arranged between the active layer and the signal line, the signal line is connected with the active layer through the first via hole, and the at least one light shielding structure includes a first light shielding structure, and the first light shielding structure contains the first via hole in the orthographic projection of the substrate.

[0007] Optionally, the first via hole has a first width, and the first light shielding structure has a second width, and the first width and the second width satisfy the following formula: the difference between the second width and the first width is equal to 2 times the average deviation, the first width is the maximum size of the first via hole in the first direction, the second width is the minimum size of the first light shielding structure in the first direction, the average deviation is 0.4 microns to 0.6 microns, and the first direction is a direction perpendicular to the signal line.

[0008] Optionally, the first light shielding structure has a first interval with the edge of the first via hole, the first interval is greater than or equal to 0.1 microns and less than or equal to 1 microns, and the first interval is the minimum distance between the edge of the first light shielding structure on one side of the first direction in the orthographic projection of the substrate and the edge of the first via hole on one side of the first direction in the orthographic projection of the substrate, or the first interval is the minimum distance between the edge of the first light shielding structure on the opposite side of the first direction in the orthographic projection of the substrate and the edge of the first via hole on the opposite side of the first direction in the orthographic projection of the substrate, and the first direction is a direction perpendicular to the signal line.

[0009] Optionally, the at least one source-drain electrode further includes a second pole, the at least one via hole further includes a second via hole, the second pole is arranged on the side of the first pole away from the substrate, the second via hole is arranged between the active layer and the second pole, the second pole is connected with the active layer through the second via hole, and the at least one light shielding structure further includes a second light shielding structure, and the second light shielding structure contains the second via hole in the orthographic projection of the substrate.

[0010] Optionally, the second light shielding structure and the first light shielding structure are located in the same film layer and adopt the same material.

[0011] Optionally, the first light shielding structure is located on the side of the second light shielding structure close to the substrate.

[0012] Optionally, the second light shielding structure serves as a second gate pole, and the orthographic projection of the second gate pole on the substrate overlaps with the orthographic projection of the active layer on the substrate.

[0013] Optionally, the at least one light-shielding structure has a reflectivity of visible light greater than or equal to 80%.

[0014] Optionally, the at least one light-shielding structure comprises a substrate and at least one micro-nano structure disposed on the substrate close to the base, the at least one micro-nano structure protrudes towards the base, and the at least one micro-nano structure is configured to totally reflect incident light towards the base.

[0015] Optionally, the shape of the at least one micro-nano structure comprises a conical shape.

[0016] Optionally, further comprising a dielectric layer disposed on the at least one light-shielding structure close to the base, the dielectric layer has at least one micro-groove disposed therein, the at least one micro-groove is disposed one-to-one corresponding to the at least one micro-nano structure, the at least one micro-nano structure fills the corresponding micro-groove, and the contact interface between the at least one micro-nano structure and the corresponding micro-groove serves as a total reflection interface.

[0017] Optionally, the thickness of the at least one light-shielding structure is less than or equal to 1000 angstroms.

[0018] The present application also provides a preparation method of a display substrate, comprising:

[0019] forming at least one light-shielding structure on a base,

[0020] forming an active layer on the side of the at least one light-shielding structure away from the base;

[0021] forming a first gate electrode on the side of the active layer away from the base;

[0022] forming at least one source / drain electrode on the side of the first gate electrode away from the base, at least one via hole is disposed between the active layer and the at least one source / drain electrode, the at least one source / drain electrode is connected to the active layer through the at least one via hole, and the orthographic projection of the at least one light-shielding structure on the base contains the orthographic projection of the at least one via hole on the base.

[0023] The present application also provides a display device comprising any one of the display substrates described above.

[0024] Other aspects can become apparent after reading and understanding the accompanying drawings and detailed description. BRIEF DESCRIPTION OF DRAWINGS

[0025] The accompanying drawings are used to provide an understanding of the technical solutions of the present application, and constitute a part of the specification, and are used together with the embodiments of the present application to explain the technical solutions of the present application, and do not constitute a limitation on the technical solutions of the present application.

[0026] FIG. 1 is a schematic diagram of a planar structure of a via and a trace in a display device;

[0027] FIG. 2 is a schematic diagram of a planar structure of a via and a trace in a display device;

[0028] FIG. 3 is a schematic diagram of a cross-sectional structure of a display device;

[0029] FIG. 4 is a schematic diagram of a planar structure of a display device;

[0030] FIG. 5 is a schematic diagram of a cross-sectional structure of a display substrate according to an embodiment of the present disclosure;

[0031] FIG. 6 is a schematic diagram of a cross-sectional structure of another display substrate according to an embodiment of the present disclosure;

[0032] FIG. 7 is a schematic diagram of a cross-sectional structure of a first light-shielding structure of a display substrate according to an embodiment of the present disclosure;

[0033] FIG. 8 is a schematic diagram of a planar structure of a first light-shielding structure of a display substrate according to an embodiment of the present disclosure;

[0034] FIG. 9 is a schematic diagram of a positional relationship between a first light-shielding structure, a first signal line and a second signal line in a display substrate according to an embodiment of the present disclosure;

[0035] FIG. 10 is a schematic diagram of a positional relationship between a first light-shielding structure and a first via in a display substrate according to an embodiment of the present disclosure;

[0036] FIG. 11 is a schematic diagram of another positional relationship between a first light-shielding structure and a first via in a display substrate according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0037] In order to make the objects, technical solutions and advantages of the present disclosure clearer, below the embodiments of the present disclosure will be described in detail with reference to the drawings. It should be noted that the embodiments can be implemented in at least two different forms. Those skilled in the art can easily understand that the manner and content can be changed into various forms without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the content described in the following embodiments. The embodiments in the present disclosure and the features in the embodiments can be combined with each other arbitrarily without conflict.

[0038] The scale of the drawings in this disclosure can be used as a reference in the actual process, but is not limited thereto. For example, the width-length ratio of the channel, the thickness and spacing of each film layer, and the width and spacing of each signal line can be adjusted as needed. The number of pixels in the display substrate and the number of sub-pixels in each pixel are also not limited to the number shown in the drawings. The drawings described in this disclosure are only schematic diagrams, and one embodiment of this disclosure is not limited to the shapes or values shown in the drawings.

[0039] The ordinal numbers "first", "second", "third" and the like in this specification are used to avoid confusion among components, and are not intended to be limiting in terms of number.

[0040] In this specification, in order to facilitate the description and simplify the description, the words indicating the orientation or positional relationship such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like are used to describe the positional relationship of the components with reference to the drawings, and are not intended to indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on this disclosure. The positional relationship of the components is appropriately changed according to the direction of describing each component. Therefore, it is not limited to the words described in the specification, and can be appropriately changed according to the situation.

[0041] In this specification, unless otherwise explicitly specified and limited, the terms "mount", "connected", "connected" should be understood broadly. For example, it can be fixedly connected, or detachably connected, or integrally connected; it can be mechanically connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate, or the communication between two elements. For those skilled in the art, the specific meaning of the above terms in this disclosure can be understood according to the specific circumstances.

[0042] In this specification, a transistor refers to an element including at least a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to a region where current mainly flows.

[0043] In this specification, the first electrode can be a drain electrode, and the second electrode can be a source electrode, or the first electrode can be a source electrode, and the second electrode can be a drain electrode. In the case of using a transistor with opposite polarity or in the case of changing the direction of current in the circuit operation, the functions of "source electrode" and "drain electrode" are sometimes exchanged with each other. Therefore, in this specification, "source electrode" and "drain electrode" can be exchanged with each other, and "source terminal" and "drain terminal" can be exchanged with each other.

[0044] In the present specification, "electrically connected" includes a case where elements are connected through an element having some electrical action. The element having some electrical action is not particularly limited as long as it can transmit and receive an electrical signal between the elements to be connected. Examples of the element having some electrical action include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, and another element having some function.

[0045] In the present specification, "parallel" means a state where an angle formed between two straight lines is greater than or equal to -10° and less than or equal to 10°, and thus a state where the angle is greater than or equal to -5° and less than or equal to 5° is also included. In addition, "perpendicular" means a state where an angle formed between two straight lines is greater than or equal to 80° and less than or equal to 100°, and thus a state where the angle is greater than or equal to 85° and less than or equal to 95° is also included.

[0046] In the present specification, "film" and "layer" can be interchanged with each other. For example, "a conductive layer" can be replaced with "a conductive film". Similarly, "an insulating film" can be replaced with "an insulating layer".

[0047] In the present specification, a triangle, a rectangle, a trapezoid, a pentagon, or a hexagon is not strictly a triangle, a rectangle, a trapezoid, a pentagon, or a hexagon, and can be an approximately triangle, a rectangle, a trapezoid, a pentagon, or a hexagon. There can be some small deformation due to a tolerance, a rounded corner, a rounded side, or the like.

[0048] In the present disclosure, "about" means not strictly limited to a boundary, and allows a value within a range of process and measurement error.

[0049] FIG. 1 is a schematic diagram of a planar structure of a via and a wiring in a display device. As shown in FIG. 1, in a display device with a pixel density greater than or equal to 1200 ppi, for example, a liquid crystal display device with a pixel density of 1400 ppi or 2100 ppi, the array substrate of the display device connects different film layers through a wiring 2' in a via 1' of an insulating layer. For example, the active layer can be connected to the source-drain electrode of the SD layer through the wiring 2' in the via 1' of the inter-layer dielectric layer above the active layer. The wiring 2' extends along the sidewall of the via 1' in the via 1', and the topography of the wiring 2' is substantially the same as that of the via 1'. For example, the shape of the via 1' is oval, and the shape of the wiring 2' is oval.

[0050] When the light of the array substrate passes through the gap between the trace 2' and the sidewall of the via 1', the polarization direction of the S-wave is parallel to the extension direction of the trace, and the polarization direction does not change. The polarization direction of the P-wave is perpendicular to the extension direction of the trace 2', and the surface plasmon polariton (SPP) effect occurs on the surface of the trace 2'. The SPP effect changes the polarization direction of the light, and the polarized light generated by the lower polarizer is depolarized. The depolarized light cannot be completely cut off after passing through the upper polarizer, resulting in a light leakage phenomenon at the via 1' in the full dark picture (brightness of 0) of the display device. The SPP effect is a phenomenon that the light produces collective oscillation with the free electrons on the metal surface when passing through the interface between the medium and the metal.

[0051] FIG. 2 is a schematic diagram of a planar structure of a via and a trace in a display device. As shown in FIG. 2, the black matrix 3' (BM) in the color film substrate of the display device is located on the side of the SD layer away from the substrate, and the black matrix 3' (BM) can be used to shield the via 1'. However, when the pixel density of the display device is greater than or equal to 1400 ppi, as the pixel density increases, the distance between adjacent sub-pixels 4' decreases, the density of the via 1' increases, and the light leakage of the via 1' increases linearly. Shielding the via 1' with the black matrix 3' (BM) will cause the black matrix 3' (BM) to extend into the sub-pixel 4' area, reducing the aperture ratio of the display device and reducing the display brightness of the display device.

[0052] The display substrate provided by the embodiments of the present disclosure includes a substrate, an active layer, a first gate, at least one source / drain electrode, and at least one via. The active layer is arranged on the substrate. The first gate is arranged on the side of the active layer away from the substrate. The at least one source / drain electrode is arranged on the side of the first gate away from the substrate. The at least one via is arranged between the active layer and the at least one source / drain electrode. The at least one source / drain electrode is connected to the active layer through the at least one via. The display substrate further includes at least one light shielding structure. The at least one light shielding structure is arranged on the side of the active layer close to the substrate. The orthographic projection of the at least one light shielding structure on the substrate contains the orthographic projection of the at least one via on the substrate.

[0053] FIG. 3 is a schematic diagram of a cross-sectional structure of a display device. As shown in FIG. 3, the display device can include a first substrate 100 and a second substrate 200 arranged oppositely, and a liquid crystal layer 300 arranged between the first substrate 100 and the second substrate 200. The first substrate 100 can include a first structure layer 102 arranged on the side of a first substrate 10 facing the second substrate 200. The second substrate 200 can include a second structure layer 202 arranged on the side of a second substrate 201 facing the first substrate 100.

[0054] Optionally, the first substrate 100 can be an array substrate, the first structure layer 102 can include gate lines, data lines, thin film transistors, pixel electrodes and common electrodes; the second substrate 200 can be a color filter substrate, and the second structure layer 202 can include filter layers and black matrices (BM). The liquid crystal layer 300 can include at least two liquid crystal molecules with dielectric anisotropy. In response to an electric field applied between the array substrate and the color filter substrate, the liquid crystal molecules can rotate in a predetermined direction between the array substrate and the color filter substrate, thereby allowing or blocking the transmission of light.

[0055] FIG. 4 is a schematic diagram of a planar structure of a display device. As shown in FIG. 4, the display device can include at least two pixel units P arranged in a matrix manner, at least one of the at least two pixel units P including a first sub-pixel P1 emitting first color light, a second sub-pixel P2 emitting second color light and a third sub-pixel P3 emitting third color light, the three sub-pixels each including a thin film transistor, a pixel electrode and a common electrode.

[0056] Optionally, the first sub-pixel P1 can be a red sub-pixel emitting red (R) light, the second sub-pixel P2 can be a green sub-pixel emitting green (G) light, and the third sub-pixel P3 can be a blue sub-pixel emitting blue (B) light, the shape of the sub-pixels in the pixel unit can be rectangular, diamond, pentagonal or hexagonal, etc., and the sub-pixels in the pixel unit can be arranged in a horizontal parallel, vertical parallel or triangular manner, which is not limited in the present disclosure. Optionally, the pixel unit can include four sub-pixels, which is not limited in the present disclosure.

[0057] Figure 5 is a schematic diagram of a cross-sectional structure of a display substrate according to an embodiment of the present disclosure. Optionally, as shown in Figure 5, the display substrate according to an embodiment of the present disclosure includes a substrate 101, a buffer layer 1 disposed on the substrate 101, a first insulating layer 2 disposed on a side of the buffer layer 1 distal from the substrate 101, a first conductive layer disposed on a side of the first insulating layer 2 distal from the substrate 101, a second insulating layer 5 disposed on a side of the first conductive layer distal from the substrate 101, an active layer 6 disposed on a side of the second insulating layer 5 distal from the substrate 101, a third insulating layer 7 disposed on a side of the active layer 6 distal from the substrate 101, a second conductive layer disposed on a side of the third insulating layer 7 distal from the substrate 101, a fourth insulating layer 9 disposed on a side of the second conductive layer distal from the substrate 101, a third conductive layer disposed on a side of the fourth insulating layer 9 distal from the substrate 101, a fifth insulating layer 11 disposed on a side of the third conductive layer distal from the substrate 101, a fourth conductive layer disposed on a side of the fifth insulating layer 11 distal from the substrate 101, a first organic medium layer 13 disposed on a side of the fourth conductive layer distal from the substrate 101, a fifth conductive layer disposed on a side of the first organic medium layer 13 distal from the substrate 101, a sixth insulating layer 15 disposed on a side of the fifth conductive layer distal from the substrate 101, a sixth conductive layer disposed on a side of the sixth insulating layer 15 distal from the substrate 101, a seventh conductive layer disposed on a side of the sixth conductive layer distal from the substrate 101, a seventh insulating layer 18 disposed on a side of the seventh conductive layer distal from the substrate 101, and an eighth conductive layer disposed on a side of the seventh insulating layer 18 distal from the substrate 101. The first insulating layer 2 can serve as a first gate insulating layer, the second insulating layer 5 can serve as a first interlayer dielectric layer, the third insulating layer 7 can serve as a second gate insulating layer, the fourth insulating layer 9 can serve as a second interlayer dielectric layer, the fifth insulating layer 11 can serve as a third interlayer dielectric layer, the sixth insulating layer 15 can serve as a first passivation layer, and the seventh insulating layer 18 can serve as a second passivation layer.

[0058] Optionally, the first conductive layer can include the first light shielding structure 3 and the second light shielding structure 4, both of which are located on the side of the active layer 6 close to the substrate 101. The second conductive layer can include the first gate 8, which is located on the side of the active layer 6 away from the substrate 101. The third conductive layer can include the first pole 10, which is located on the side of the active layer 6 away from the substrate 101 and connected to the active layer 6. The fourth conductive layer can include the second pole 12, which is located on the side of the first pole 10 away from the substrate 101 and connected to the active layer 6. The fifth conductive layer can include the first electrode 14, which is located on the side of the second pole 12 away from the substrate 101. The sixth conductive layer can include the second electrode 16, which is located on the side of the first electrode 14 away from the substrate 101 and connected to the second pole 12. The seventh conductive layer can include the third electrode 17, which is located on the side of the second electrode 16 away from the substrate 101 and connected to the second electrode 16. The eighth conductive layer can include the fourth electrode 19, which is located on the side of the third electrode 17 away from the substrate 101. Among them, the third electrode 17 can serve as a pixel electrode, and the fourth electrode 19 can serve as a common electrode, and the second electrode 16 is connected to the second pole 12 and the third electrode 17 respectively.

[0059] Optionally, a first via hole 31 is arranged between one end of the active layer 6 and the first pole 10, the first via hole 31 extends along a direction perpendicular to the substrate 101, and the first via hole 31 extends from the surface of the fourth insulating layer 9 away from the substrate 101, along the direction close to the substrate 101, successively penetrates the fourth insulating layer 9 and the third insulating layer 7, and extends to the surface of the active layer 6 away from the substrate 101, exposing the active layer 6, and the first pole 10 is connected to the active layer 6 through the first via hole 31.

[0060] Optionally, the first light shielding structure 3 is located on the side of the active layer 6 close to the substrate 101, and the orthographic projection of the first light shielding structure 3 on the substrate 101 overlaps with the orthographic projection of the active layer 6 on the substrate 101. The orthographic projection of the first light shielding structure 3 on the substrate 101 contains the orthographic projection of the first via hole 31 on the substrate 101.

[0061] Optionally, the reflectivity of the first light shielding structure 3 to visible light can be greater than or equal to 80%, and the first light shielding structure 3 is configured to reflect the incident visible light towards the substrate direction, so that the first light shielding structure 3 can block the light from entering the first via hole 31, thereby avoiding light leakage at the first via hole 31.

[0062] Optionally, the material of the first light shielding structure 3 can include metal, for example, molybdenum.

[0063] Optionally, the first light-shielding structure 3 has a thickness less than or equal to 1000 angstroms. Here, the thickness of the first light-shielding structure 3 is the average dimension of the first light-shielding structure 3 in the direction perpendicular to the substrate 101.

[0064] Optionally, a second via 32 is arranged between the other end of the active layer 6 and the second electrode 12, the second via 32 extends in the direction perpendicular to the substrate 101, the second via 32 extends from the surface of the fifth insulating layer 11 away from the substrate 101, extends in the direction close to the substrate 101, sequentially penetrates the fifth insulating layer 11, the fourth insulating layer 9 and the third insulating layer 7, and extends to the surface of the active layer 6 away from the substrate 101 to expose the active layer 6, and the second electrode 12 is connected to the active layer 6 through the second via 32.

[0065] Optionally, the second light-shielding structure 4 is located on the side of the active layer 6 close to the substrate 101, and the orthographic projection of the second light-shielding structure 4 on the substrate 101 overlaps with the orthographic projection of the active layer 6 on the substrate 101. The orthographic projection of the second light-shielding structure 4 on the substrate 101 contains the orthographic projection of the second via 32 on the substrate 101.

[0066] Optionally, the reflectivity of the second light-shielding structure 4 to visible light can be greater than or equal to 80%, and the second light-shielding structure 4 is configured to reflect the incident visible light towards the substrate direction, so that the second light-shielding structure 4 can shield the light from entering the second via 32, thereby avoiding light leakage at the second via 32.

[0067] Optionally, the material of the second light-shielding structure 4 can include metal, for example, molybdenum.

[0068] Optionally, the second light-shielding structure 4 has a thickness less than or equal to 1000 angstroms. Here, the thickness of the second light-shielding structure 4 is the average dimension of the second light-shielding structure 4 in the direction perpendicular to the substrate 101.

[0069] Optionally, the second light-shielding structure 4 can serve as a second gate electrode, and the second light-shielding structure 4 and the first gate electrode 8 form a double-gate structure.

[0070] Optionally, the first light-shielding structure 3 and the second light-shielding structure 4 are located in the same film layer, are made of the same material, and are prepared by the same preparation process.

[0071] In some embodiments, the first light-shielding structure and the second light-shielding structure can be made of the same or different materials and prepared by different preparation processes.

[0072] Optionally, the first gate electrode 8 is located on the side of the active layer 6 away from the substrate 101, and the orthographic projection of the first gate electrode 8 on the substrate 101 is located in the orthographic projection of the active layer 6 on the substrate 101.

[0073] Optionally, the display substrate further comprises a third via hole 33 extending along a direction perpendicular to the substrate 101, the third via hole 33 extending from a surface of the first organic medium layer 13 away from the substrate 101, along a direction close to the substrate 101, penetrating the first organic medium layer 13, and extending to a surface of the second electrode 12 away from the substrate 101 to expose the second electrode 12, the second electrode 16 being connected to the second electrode 12 through the third via hole 33.

[0074] Optionally, at least part of a first stack layer formed by the first electrode 14, the sixth insulating layer 15 and the second electrode 16 covers a sidewall of one side of the third via hole 33, and the second electrode 16 is connected to the exposed second electrode 12 and the third electrode 17, respectively. At least part of a second stack layer formed by the first electrode 14 and the sixth insulating layer 15 covers a sidewall of the other side of the third via hole 33.

[0075] Optionally, the display substrate further comprises a second organic medium layer 20 filling the third via hole 33, and the second organic medium layer 20 covering the first stack layer and the second stack layer on the sidewall of the third via hole 33.

[0076] The display substrate shields the first via hole 31 and the second via hole 32 through the first light shielding structure 3 and the second light shielding structure 4, respectively, to avoid light leakage at the first via hole 31 and the second via hole 32.

[0077] Compared with a scheme of shielding the via hole by a black matrix, the first light shielding structure and the second light shielding structure can avoid light leakage of the first via hole and the second via hole, improve the display effect of the display device, and reduce the power consumption of the backlight. The finite differential time domain method is used to simulate the display substrate, the film layer stack structure and the material parameters of the sub-pixel are set by using the Lumerical optical simulation software, the propagation of electromagnetic waves between the film layers in the pixel structure is simulated, and the results of the electric field, the magnetic field direction, the intensity, the polarization direction, etc. are calculated.

[0078] FIG. 6 is a schematic diagram of a cross-sectional structure of another display substrate according to an embodiment of the present disclosure. Optionally, as shown in FIG. 6, the structure of the display substrate according to the embodiment of the present disclosure is generally the same as that shown in FIG. 5, and the difference is that the first light shielding structure 3 and the second light shielding structure 4 of the display substrate according to the embodiment of the present disclosure can be located in different film layers, and the first light shielding structure 3 is arranged on the side of the second light shielding structure 4 close to the substrate 101. For example, the first light shielding structure 3 is arranged on the substrate 101, and the buffer layer 1 covers the first light shielding structure 3.

[0079] FIG. 7 is a schematic view of a cross-sectional structure of a first light shielding structure of a display substrate according to an embodiment of the present disclosure. The first light shielding structure shown in FIG. 7 can be the first light shielding structure in FIG. 5. Optionally, as shown in FIG. 7, the first light shielding structure 3 can include a substrate 3-2 and at least one micro-nano structure 3-1 disposed on the substrate 3-2 close to the base and integrated with the substrate 3-2. The at least one micro-nano structure 3-1 protrudes towards the base. A first insulating layer 2 is disposed on the substrate 3-2 close to the base, and the first insulating layer 2 has at least one micro groove, which is arranged one-to-one with the at least one micro-nano structure 3-1, and the micro-nano structure 3-1 fills the corresponding micro groove. The contact interface between the micro-nano structure 3-1 and the first insulating layer 2 serves as a total reflection interface, and the visible light Li incident on the first light shielding structure 3 is reflected towards the base.

[0080] Optionally, the first insulating layer 2 has a first refractive index n1, and the micro-nano structure 3-1 has a second refractive index n2. The first refractive index n1 is greater than the second refractive index n2, and the visible light Li is totally reflected at the contact interface between the micro-nano structure 3-1 and the first insulating layer 2.

[0081] Optionally, the first light shielding structure 3 can include an inorganic material, for example, silicon oxide.

[0082] Optionally, the shape of the micro-nano structure 3-1 includes a conical shape, the micro-nano structure 3-1 includes a side surface, the extension line of the side surface of the micro-nano structure 3-1 has an included angle m1 with the plane where the base 101 is located, and the visible light Li has a total reflection angle m2 at the contact interface between the micro-nano structure 3-1 and the first insulating layer 2, wherein the included angle m1 is greater than or equal to the total reflection angle m2. The total reflection angle m2 = arcsin(n2 / n1), n1 is the first refractive index n1 of the first insulating layer 2, and n2 is the second refractive index n2 of the micro-nano structure 3-1.

[0083] Optionally, the material of the first insulating layer 2 can include silicon nitride, the first refractive index n1 of the first insulating layer 2 is 1.95, the material of the micro-nano structure 3-1 can include silicon oxide, and the second refractive index n2 of the micro-nano structure 3-1 is 1.47. For example, according to the above formula, the total reflection angle m2 of the visible light Li at the contact interface between the micro-nano structure 3-1 and the first insulating layer 2 is 48°, and the included angle m1 between the extension line of the side surface of the micro-nano structure 3-1 and the plane where the base 101 is located is greater than or equal to 48°, so that the light incident on the micro-nano structure 3-1 can be reflected towards the base.

[0084] Optionally, the micro-nano structure 3-1 can be formed by an exposure process or a nano-imprinting process. The number of the micro-nano structure 3-1 is determined by the size of the light-shielding structure required and the size of the micro-nano structure 3-1, which is determined by the depth of the micro-nano structure 3-1 and the film thickness of the first insulating layer 2.

[0085] Optionally, the second light-shielding structure of the display substrate can be substantially the same as the first light-shielding structure shown in FIG. 7, which will not be described herein again.

[0086] FIG. 8 is a schematic plan view of a first light-shielding structure of a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in FIG. 8 can be a schematic plan view of the first light-shielding structure in FIG. 7. Optionally, as shown in FIG. 8, the first light-shielding structure 3 of the display substrate according to an embodiment of the present disclosure includes at least two micro-nano structures 3-1, the at least two micro-nano structures 3-1 are arranged along a first direction D1, and the at least two micro-nano structures 3-1 are arranged along a second direction D2. The first direction D1 and the second direction D2 are both parallel to the substrate, and the first direction D1 and the second direction D2 intersect with each other, for example, the first direction D1 and the second direction D2 are perpendicular to each other.

[0087] Optionally, the second light-shielding structure of the display substrate can be substantially the same as the first light-shielding structure shown in FIG. 8, which will not be described herein again.

[0088] FIG. 9 is a schematic view of the positional relationship between a first light-shielding structure, a first signal line and a second signal line in a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in FIG. 9 can be the first light-shielding structure in FIG. 5. Optionally, as shown in FIG. 9, the first conductive layer of the display substrate according to an embodiment of the present disclosure can include the first light-shielding structure 3, a second light-shielding structure and a first signal line 51, the first signal line 51 extends along the first direction D1 and is arranged at intervals along the second direction D2, and the first signal line 51 is connected to the second light-shielding structure as a whole. The first light-shielding structure 3, the second light-shielding structure and the first signal line 51 are located in the same film layer and are made of the same material by the same preparation process.

[0089] In some embodiments, the first light-shielding structure and the first signal line can be made of the same or different materials by different preparation processes.

[0090] Optionally, the third conductive layer of the display substrate in the embodiments of the present disclosure can include the first electrode 10 and a second signal line 52, the second signal line 52 extends along the second direction D2 and is arranged at intervals along the first direction D1, the first direction D1 can be a direction perpendicular to the second signal line 52, and the second signal line 52 is connected to the first electrode 10 in an integrated manner, that is, the second signal line 52 serves as the first electrode 10 of the present disclosure. The first electrode 10 and the second signal line 52 are located in the same film layer and are made of the same material by the same preparation process.

[0091] In some embodiments, the second light shielding structure can be made of the same or different material as the second signal line by different preparation processes.

[0092] FIG. 10 is a schematic diagram of the positional relationship between a first light shielding structure and a first via in a display substrate according to an embodiment of the present disclosure. The first light shielding structure shown in FIG. 10 can be the first light shielding structure in FIG. 5. Optionally, as shown in FIG. 10, the third conductive layer of the display substrate in the embodiments of the present disclosure can include the first electrode 10 and the second signal line 52, the second signal line 52 extends along the second direction D2 and is arranged at intervals along the first direction D1, and the second signal line 52 is connected to the first electrode 10 in an integrated manner. The first light shielding structure 3 is located on the side of the first electrode 10 close to the substrate, the shape of the first light shielding structure 3 includes a rectangle, the shape of the first via 31 includes a rectangle, and the orthographic projection of the first light shielding structure 3 on the substrate contains the orthographic projection of the first via 31 on the substrate.

[0093] Optionally, the first via 31 can have a first width a, and the first light shielding structure 3 can have a second width b, and the first width a and the second width b satisfy the following formula:

[0094] Second width b-first width a=2*average deviation c.

[0095] Wherein, the first width a is the maximum dimension of the first via 31 in the first direction D1; the second width b is the minimum dimension of the first light shielding structure 3 in the first direction D1, the average deviation c can be about 0.4 microns to 0.6 microns, for example, the average deviation c can be about 0.5 microns.

[0096] Optionally, the process for preparing the first light shielding structure 3 and the first via 31 can have a process deviation b1 and a positioning deviation c1, and the average deviation c can be the root mean square of the process deviation b1 and the positioning deviation c1, that is:

[0097] Average deviation

[0098] Optionally, the first distance L between the edge of the first light-shielding structure 3 and the edge of the first via hole 31 in the display substrate can be greater than or equal to 0.1 microns and less than or equal to 1 micron. The first distance L can be the minimum distance between the edge of the first light-shielding structure 3 on one side of the first direction D1 in the orthographic projection of the base and the edge of the first via hole 31 on one side of the first direction D1 in the orthographic projection of the base, or the first distance L can be the minimum distance between the edge of the first light-shielding structure 3 on the opposite side of the first direction D1 in the orthographic projection of the base and the edge of the first via hole 31 on the opposite side of the first direction D1 in the orthographic projection of the base.

[0099] Compared with the scheme of shielding the via hole by the black matrix, the size of the black matrix needs to consider the alignment deviation between the color film substrate and the array substrate, and the vertical distance between the black matrix and the via hole, and other factors, so the size of the black matrix is larger than the size of the first light-shielding structure in the display substrate of the present embodiment.

[0100] Optionally, taking the pixel density of the display device as an example, the display substrate has a deviation mean value c of about 0.5 microns, the first width a of the first via hole 31 is 1.9 microns, and according to the above formula, the second width b of the first light-shielding structure 3 is 2.9 microns. In comparison, the width of the black matrix is about 3.9 microns.

[0101] The display substrate of the present embodiment shields the first via hole 31 by the first light-shielding structure 3, which can reduce the deviation caused by process alignment, has a smaller size than the black matrix, and can ensure the aperture ratio of the display device.

[0102] In some embodiments, the shape of the first light-shielding structure can include other shapes, for example, the shape of the first light-shielding structure can include a triangle, a circle, an ellipse, a trapezoid, a parallelogram, and other polygons such as a pentagon, a hexagon, and the like.

[0103] Figure 11 is a schematic diagram showing the positional relationship between another first light-shielding structure and a first via in a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in Figure 11 can be the first light-shielding structure in Figure 5. Optionally, as shown in Figure 11, the third conductive layer of the display substrate according to an embodiment of the present disclosure may include a first electrode 10 and a second signal line 52. The second signal line 52 extends along a second direction D2 and is spaced apart along a first direction D1. The second signal line 52 is integrally connected to the first electrode 10. The first light-shielding structure 3 is located on the side of the first electrode 10 near the substrate. The shape of the first light-shielding structure 3 includes a strip shape. The first light-shielding structure 3 extends along the second direction D2, and its extension direction is approximately the same as that of the second signal line 52. The shape of the first via 31 includes a rectangle. At least two first vias 31 are spaced apart along the second direction D2. The orthographic projection of a first light-shielding structure 3 onto the substrate includes the orthographic projection of at least two first vias 31 spaced apart along the second direction D2 onto the substrate.

[0104] This disclosure also provides a display device, which includes the aforementioned display substrate. The display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator, and the embodiments of the present invention are not limited thereto.

[0105] This disclosure also provides a method for preparing a display substrate, comprising:

[0106] At least one light-shielding structure is formed on the substrate.

[0107] An active layer is formed on the side of the at least one light-shielding structure away from the substrate;

[0108] A first gate is formed on the side of the active layer away from the substrate;

[0109] At least one source / drain electrode is formed on the side of the first gate away from the substrate; at least one via is provided between the active layer and the at least one source / drain electrode, and the at least one source / drain electrode is connected to the active layer through the at least one via; the orthogonal projection of the at least one light-shielding structure on the substrate includes the orthogonal projection of the at least one via on the substrate.

[0110] The present application describes a number of embodiments, but the description is exemplary rather than limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described in the present application. Although a number of possible combinations of features have been set forth in the appended figures and discussed above, many other combinations of the disclosed features are possible. Unless specifically intended otherwise, any feature or element of any embodiment can be used in combination with any other feature or element of any other embodiment, or in replacement of any other feature or element in any other embodiment.

[0111] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed herein can also be combined with any conventional features or elements to form unique inventive solutions that are within the scope of the claims. Any feature or element of any embodiment can also be combined with features or elements from other inventive solutions to form another unique inventive solution that is within the scope of the claims. Therefore, it is to be understood that any feature shown and / or discussed in the present application can be implemented alone or in any appropriate combination. Accordingly, the embodiments are not to be restricted, except as by the appended claims and their equivalents. Moreover, various modifications and changes can be made within the scope of the following claims.

[0112] Furthermore, in describing representative embodiments, the specification can have presented the method and / or process as a particular sequence of steps. However, to the extent that the method or process depends on the particular order of steps, this description should not be construed as limiting unless specifically so stated. Other steps can be performed in between described steps without departing from the scope of the present application. Thus, the particular order of the steps presented is not a limitation. The specification is not a limitation. The claims should not be limited to the steps in the order that they are presented.

Claims

1. A display substrate, comprising a substrate, an active layer, a first gate electrode and at least one source / drain electrode, the active layer is disposed on the substrate, the first gate electrode is disposed on a side of the active layer away from the substrate, the at least one source / drain electrode is disposed on a side of the first gate electrode away from the substrate, at least one via hole is disposed between the active layer and the at least one source / drain electrode, the at least one source / drain electrode is connected with the active layer through the at least one via hole, the display substrate further comprises at least one light shielding structure, the at least one light shielding structure is disposed on a side of the active layer close to the substrate, and a projection of the at least one light shielding structure on the substrate contains a projection of the at least one via hole on the substrate. 2.The display substrate of claim 1, wherein, The at least one source / drain electrode comprises a signal line as a first pole, the at least one via hole comprises a first via hole, the first via hole is disposed between the active layer and the signal line, the signal line is connected with the active layer through the first via hole, the at least one light shielding structure comprises a first light shielding structure, and a projection of the first light shielding structure on the substrate contains a projection of the first via hole on the substrate. 3.The display substrate of claim 2, wherein, The first via hole has a first width, the first light shielding structure has a second width, the first width and the second width satisfy the following formula: a difference between the second width and the first width is equal to 2 times of an average of deviations, the first width is a maximum size of the first via hole in a first direction, the second width is a minimum size of the first light shielding structure in the first direction, the average of deviations is 0.4 microns to 0.6 microns, and the first direction is a direction perpendicular to the signal line. 4.The display substrate of claim 2, wherein, An edge of the first light shielding structure and an edge of the first via hole have a first spacing, the first spacing is greater than or equal to 0.1 microns and less than or equal to 1 micron, wherein the first spacing is a minimum distance between an edge of the first light shielding structure on one side of a first direction in a projection of the first light shielding structure on the substrate and an edge of the first via hole on one side of the first direction in a projection of the first via hole on the substrate, or the first spacing is a minimum distance between an edge of the first light shielding structure on the other side of the first direction in the projection of the first light shielding structure on the substrate and an edge of the first via hole on the other side of the first direction in the projection of the first via hole on the substrate, and the first direction is a direction perpendicular to the signal line. 5.The display substrate of claim 2, wherein, The at least one source / drain electrode further comprises a second pole, the at least one via hole further comprises a second via hole, the second pole is disposed on a side of the first pole away from the substrate, the second via hole is disposed between the active layer and the second pole, the second pole is connected with the active layer through the second via hole, and the at least one light shielding structure further comprises a second light shielding structure, and a projection of the second light shielding structure on the substrate contains a projection of the second via hole on the substrate. 6.The display substrate of claim 5, wherein, The second light shielding structure and the first light shielding structure are located in the same film layer and adopt the same material. 7.The display substrate of claim 5, wherein, The first light shielding structure is located on a side of the second light shielding structure close to the substrate. 8.The display substrate of claim 5, wherein, The second light-shielding structure is a second gate electrode, and a normal projection of the second gate electrode on the substrate overlaps with a normal projection of the active layer on the substrate. 9.The display substrate according to any one of claims 1 to 8, wherein The at least one light-shielding structure has a reflectivity of visible light greater than or equal to 80%.

10. The display substrate according to any one of claims 1 to 8, wherein The at least one light-shielding structure comprises a substrate and at least one micro-nano structure disposed on the substrate close to the substrate, the at least one micro-nano structure protrudes towards the substrate, and the at least one micro-nano structure is configured to totally reflect incident light towards the substrate. 11.The display substrate of claim 10, wherein, The shape of the at least one micro-nano structure comprises a conical shape.

12. The display substrate of claim 10, further comprising a dielectric layer disposed on the at least one light-shielding structure close to the substrate, the dielectric layer has at least one micro groove disposed therein, the at least one micro groove is disposed one-to-one corresponding to the at least one micro-nano structure, the at least one micro-nano structure fills the corresponding micro groove, and a contact interface between the at least one micro-nano structure and the corresponding micro groove serves as a total reflection interface.

13. The display substrate according to any one of claims 1 to 8, wherein The thickness of the at least one light-shielding structure is less than or equal to 1000 angstroms.

14. A method for manufacturing a display substrate, comprising: forming at least one light-shielding structure on a substrate, forming an active layer on a side of the at least one light-shielding structure away from the substrate; forming a first gate electrode on a side of the active layer away from the substrate; forming at least one source / drain electrode on a side of the first gate electrode away from the substrate; forming at least one via hole between the active layer and the at least one source / drain electrode, the at least one source / drain electrode is connected to the active layer through the at least one via hole; and a normal projection of the at least one light-shielding structure on the substrate contains a normal projection of the at least one via hole on the substrate.

15. A display device comprising the display substrate of any one of claims 1 to 13.

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