Solar cell and preparation method therefor, and photovoltaic module

Abstract

The present application relates to the technical field of photovoltaics. Disclosed are a solar cell and a preparation method thereof, and a photovoltaic module, which solve the problem of the part of an N-type doped layer and a P-type doped layer that is close to an edge of a cell sheet having a relatively large hidden danger in terms of defects and a relatively high risk of electric leakage. The solar cell comprises: a substrate and a current-collecting layer. The current-collecting layer is arranged on a first surface of the substrate and comprises a plurality of first current-collecting portions and second current-collecting portions which are arranged at intervals in a first direction and extend in a second direction. There is a first isolation region between every adjacent first current-collecting portion and second current-collecting portion, the first surface has a first side and a second side opposite to each other in the second direction, there is a second isolation region between the boundary of the first current-collecting portion that is close to the first side and the first side, there is a third isolation region between the boundary of the second current-collecting portion that is close to the first side and the first side, and the width of the second isolation region and / or the third isolation region in the second direction is greater than the width of the first isolation region in the first direction.

Description

Solar cell, preparation method thereof and photovoltaic module

[0001] The present application claims priority to the Chinese patent application No. 202411026939.5, filed on July 30, 2024, and entitled "Solar cell, preparation method thereof and photovoltaic module". TECHNICAL FIELD

[0002] The present application relates to the technical field of solar cells, and in particular to a solar cell, a preparation method thereof and a photovoltaic module. BACKGROUND

[0003] A solar cell is a device that converts solar energy into electricity through the photoelectric effect or photochemical effect. The solar cell generally includes a semiconductor substrate and a metal grid.

[0004] In the prior art, the solar cell has an N-type doped layer and a P-type doped layer. The part of the N-type doped layer and the P-type doped layer close to the edge of the cell has a larger defect risk and a higher risk of electric leakage. SUMMARY

[0005] The present application aims to provide a solar cell, a preparation method thereof and a photovoltaic module, which can reduce the risk of electric leakage and reduce the safety risk.

[0006] To achieve the above-mentioned purpose, in a first aspect, the present application provides a solar cell. The solar cell includes a substrate and a current collecting layer. The substrate includes opposite first and second surfaces, and the current collecting layer is disposed on the first surface and includes a plurality of first current collecting portions and a plurality of second current collecting portions. The first and second current collecting portions are alternately and spacedly arranged in a first direction and extend in a second direction, and the first and second directions are orthogonal. The first and second current collecting portions have a first separation zone therebetween, the first surface has a first edge and a second edge oppositely disposed along the second direction, the first current collecting portion has a boundary adjacent to the first edge, and the boundary and the first edge have a second separation zone therebetween, the second current collecting portion has a boundary adjacent to the first edge, and the boundary and the first edge have a third separation zone therebetween, and the width of the second separation zone and / or the third separation zone in the second direction is greater than the width of the first separation zone in the first direction.

[0007] Compared with the prior art, the solar cell provided by the application has a second isolation region between the boundary of the first current collecting part adjacent to the first edge and the first edge, so that the second isolation region separates the boundary of the first current collecting part adjacent to the first edge from the first edge, thereby facilitating suppression of electric leakage. Further, the third isolation region is between the boundary of the second current collecting part adjacent to the first edge and the first edge, so that the third isolation region separates the boundary of the second current collecting part adjacent to the first edge from the first edge, thereby facilitating suppression of electric leakage. Further, since the edge of the cell sheet has more defects and more existing recombination centers, the isolation between the collecting region and the edge of the cell sheet needs to be relatively large, and the first isolation region is PN isolation, which is already small enough to improve the surface utilization rate of the cell sheet, so the second isolation region and / or the third isolation region are specially made to have a width in the second direction greater than the width of the first isolation region in the first direction.

[0008] In an implementation manner, the current collecting layer is a transparent conductive layer.

[0009] In the case of the above technical solution, the transparent conductive layer has high conductivity, can timely guide the collected carriers out, and reduces the recombination rate of the carriers. Further, the transparent conductive layer can not only improve the current collecting capacity of the solar cell, but also can be used as an anti-reflection film to improve the light absorption rate of the solar cell. In addition, the transparent conductive layer has passivation performance. In addition, as described above, the first current collecting part and the second current collecting part are insulated by the first isolation region, which physically insulates the first current collecting part and the second current collecting part. Specifically, the first current collecting part is ohmically connected to the first electrode, and the second current collecting part is ohmically connected to the second electrode, so the transparent conductive layers of the two parts cannot be directly electrically connected, that is, the transparent conductive layers of the two parts must be physically insulated, that is, not in contact.

[0010] In an implementation manner, the first surface further includes an annular conductor layer surrounding the current collecting layer. The annular conductor layer has a fourth isolation region between the inner boundary adjacent to the first edge of the annular conductor layer and the boundary of the first current collecting part adjacent to the first edge; and / or, the annular conductor layer has a fifth isolation region between the inner boundary adjacent to the first edge of the annular conductor layer and the boundary of the second current collecting part adjacent to the first edge. The fourth isolation region and / or the fifth isolation region have a width in the second direction greater than the width of the first isolation region in the first direction.

[0011] Since there are more defects in the edge region of the solar cell, if the edge region is not effectively isolated, it will cause the solar cell to leak, the conversion efficiency of the cell to be reduced, and the photovoltaic module to generate hot spot effect, affecting the performance of the photovoltaic module. Therefore, in the case of adopting the technical solution, not only can the first current collecting part and the second current collecting part be further separated from the first side to further reduce the risk of leakage and reduce the safety hazard. At the same time, it can also improve the conversion efficiency of the cell, reduce or avoid the hot spot effect of the photovoltaic module, so as to ensure the performance of the photovoltaic module.

[0012] In an implementation manner, the annular conductor layer comprises a first annular conductor part and a second annular conductor part; the first annular conductor part is in direct contact with the substrate, and the second annular conductor part is not in direct contact with the substrate. The second annular conductor part is located between the first annular conductor part and the fourth isolation region; or, the second annular conductor part is located between the first annular conductor part and the fifth isolation region.

[0013] In the case of adopting the technical solution, the first annular conductor part can further ensure the electrical isolation effect of the edge, prevent the edge from transmitting the hidden crack to the inside of the solar cell, and ensure the quality of the solar cell.

[0014] In an implementation manner, a doped semiconductor layer is arranged between the annular conductor layer and the substrate. That is, the boundary of the annular conductor layer close to the first side is substantially flush with the boundary of the doped semiconductor layer. The doped semiconductor layer can be a first doped semiconductor layer or a second doped semiconductor layer with a doping polarity opposite to that of the first doped semiconductor layer, or a stack of the two. In this way, arranging the doped semiconductor layer at the edge position of the cell sheet for passivation can reduce the surface defects at the edge position and reduce the minority carrier recombination at the edge position, thereby improving the electrical performance of the edge.

[0015] In an implementation manner, the solar cell further comprises a grid line arranged on the current collecting layer, and the grid line is located on the first current collecting part and the second current collecting part respectively. The minimum distance between the end of the grid line close to the first side and the second isolation region and / or the third isolation region in the second direction is L1, and the minimum distance between the grid line and the first isolation region in the first direction is L2, L1 is greater than L2.

[0016] In the case of adopting the technical solution, since L1 is greater than L2, it can be ensured that the grid line can collect the current in the width of the first current collecting part or the second current collecting part, while considering the current collection at both ends (i.e. the end close to the first side or the second side). Since the defects at the edge position of the cell sheet are larger, the recombination center is more, and the leakage is larger, L1 needs to be set larger to prevent the minority carriers from recombining at the end.

[0017] In an implementation, L1 is greater than or equal to 100 microns and less than or equal to 500 microns. In this case, the grid lines can effectively collect the current, and the grid lines can be prevented from being too close to the second isolation region and / or the third isolation region to cause leakage.

[0018] In an implementation, L2 is greater than or equal to 50 microns and less than or equal to 400 microns. In this case, the grid lines can effectively collect the current, and the grid lines can be prevented from being too close to the first isolation region to cause leakage.

[0019] In an implementation, the first surface further includes a third side between the first side and the second side, one end of the third side is connected to the end of the first side through a first chamfer, and the other end of the third side is connected to the end of the second side through a second chamfer. The first current collection part adjacent to the boundary of the first chamfer and / or the second chamfer is a chamfer edge; and / or, the second current collection part adjacent to the boundary of the first chamfer and / or the second chamfer is a chamfer edge.

[0020] In the case of the above technical solution, the chamfer edge can effectively prevent the solar cell from being broken and cracked during the process.

[0021] In an implementation, the length of the first current collection part adjacent to the first chamfer and the second chamfer is less than the length of the remaining first current collection parts; and / or, the length of the second current collection part adjacent to the first chamfer and the second chamfer is less than the length of the remaining second current collection parts.

[0022] In the case of the above technical solution, the defects near the first chamfer and the second chamfer of the first current collection part and / or the second current collection part can be isolated, so as to improve the quality of the solar cell.

[0023] In an implementation, the first surface of the substrate has a plurality of recessed regions corresponding to the plurality of first current collection parts, respectively, and a plurality of flat regions corresponding to the plurality of second current collection parts, respectively. Or, the first surface of the substrate has a plurality of recessed regions corresponding to the plurality of first current collection parts, respectively, and a flat region corresponding to the annular conductor layer.

[0024] In the case of the above technical solution, the recessed region can at least partially stagger the first current collection part and the second current collection part along the thickness direction of the substrate, and the electrode structures located in the first current collection part and the second current collection part can be at least partially staggered along the thickness direction of the substrate, thereby reducing the risk of leakage.

[0025] In the case of the above technical solution, the recessed region can at least partially stagger the first current collection part and the second current collection part along the thickness direction of the substrate, and the electrode structures located in the first current collection part and the second current collection part can be at least partially staggered along the thickness direction of the substrate, thereby reducing the risk of leakage.

[0026] In an implementation, the concave region is formed with a first texture structure, and the first texture structure comprises a pyramid-shaped nap structure.

[0027] In the above technical solution, the first texture structure comprises a pyramid-shaped nap structure, which is conducive to increasing the surface area of the concave region, improving the light-trapping effect of the concave region, and facilitating more light to be refracted into the substrate through the concave region and utilized by the substrate. In addition, the first current collecting part has a portion located on the concave region, and the side of the portion of the first current collecting part formed on the concave region and away from the substrate also undulates with the concave region. That is, the side of the portion of the first current collecting part formed on the concave region and away from the substrate also has substantially the same undulating topography as the concave region. Therefore, when the concave region is formed with the first texture structure, the side of the portion of the first current collecting part formed on the concave region and away from the substrate also has corresponding uneven features, which is conducive to increasing the surface area of the side of the portion of the first current collecting part formed on the concave region and away from the substrate, further conducive to increasing the contact area of the first current collecting part and the corresponding electrode, conducive to reducing the contact resistance between the first current collecting part and the corresponding electrode, and further improving the working performance of the solar cell.

[0028] In an implementation, the flat region has a shape of a base of a pyramid.

[0029] In the above technical solution, the concave region has a height difference between the regions on both sides of the concave region, and the first texture structure is formed on the concave region, which can effectively protect the first current collecting part with the first texture structure from process damage.

[0030] In an implementation, the inclined side wall is formed with a second texture structure, and the second texture structure comprises a prism structure, and the prism structure is inclined along a direction gradually approaching the flat region adjacent to the concave region.

[0031] In the above technical solution, the prism structure can increase the reflection of light toward the bottom surface of the concave region, thereby increasing the absorption of light.

[0032] In an implementation, the top end of the prism structure away from the substrate has a pyramid, and the top of the pyramid is lower than the surface of the flat region.

[0033] In the above technical solution, the flat region provides a smooth transition interface for the formation of the annular conductor layer and / or the second current collecting part, which is conducive to increasing the formation thickness of the annular conductor layer and / or the second current collecting part on the flat region, and makes the shape retention of the annular conductor layer and / or the second current collecting part better.

[0034] In an implementation, the solar cell further includes: a first doped semiconductor layer and a second doped semiconductor layer disposed on the first surface of the substrate, the first doped semiconductor layer and the second doped semiconductor layer having opposite conductive types. The first current collecting portion covers a portion of the first doped semiconductor layer, the first doped semiconductor layer having an overlapping portion extending to cover a portion of the second doped semiconductor layer, and the second current collecting portion covers a portion of the overlapping portion and a portion of the second doped semiconductor layer.

[0035] In an implementation, the solar cell further includes: a first doped semiconductor layer and a second doped semiconductor layer disposed on the first surface of the substrate, the first doped semiconductor layer and the second doped semiconductor layer having opposite conductive types. The first current collecting portion covers a portion of the first doped semiconductor layer, the first doped semiconductor layer having an overlapping portion extending to cover a portion of the second doped semiconductor layer, and the second current collecting portion covers a portion of the overlapping portion and a portion of the second doped semiconductor layer.

[0036] With the above technical solution, the first doped semiconductor layer and the second doped semiconductor layer can effectively split the carriers, which is conducive to the formation of photoelectric current.

[0037] In an implementation, the first doped semiconductor layer includes a doped amorphous silicon layer and / or a doped microcrystalline silicon layer; and the second doped semiconductor layer includes a doped polysilicon layer.

[0038] With the above technical solution, the second doped semiconductor layer includes a doped polysilicon layer. In this case, compared with the doped amorphous silicon layer, the doped polysilicon layer has higher carrier transport characteristics, so when the second doped semiconductor layer is a doped polysilicon layer, the carrier recombination rate can be further reduced, which is conducive to improving the photoelectric conversion efficiency of the solar cell.

[0039] In an implementation, the first isolation region has a width in the first direction greater than or equal to 40 microns and less than or equal to 80 microns.

[0040] In an implementation, the fourth isolation region has a width in the second direction greater than or equal to 80 microns and less than or equal to 200 microns, and the fifth isolation region has a width in the second direction greater than or equal to 80 microns and less than or equal to 200 microns. Since the edge region of the solar cell has a large leakage, a larger isolation space is required. The width of the fourth isolation region and the fifth isolation region can be in a range that can fully utilize the active region of the edge while ensuring electrical isolation, so as to improve the photoelectric conversion efficiency; and / or, the width of the fourth isolation region in the second direction is equal to the width of the fifth isolation region in the second direction; and / or, the ratio of the width of the fourth isolation region in the second direction and / or the width of the fifth isolation region in the second direction to the width of the first isolation region in the first direction is greater than or equal to 1.5 and less than or equal to 3. Since the passivation effect of the edge region of the solar cell is poor, the influence of the edge region on the open-circuit voltage, the pseudo fill factor, and other electrical performance parameters related to passivation can be effectively isolated by using the above technical solutions, so as to improve the cell conversion efficiency of the solar cell. Further, considering that the first isolation region is located between the first current collecting part and the second current collecting part, and the first isolation region requires a narrow width, screen printing needs to be printed along a certain direction. If the etching paste printing opening of the fourth isolation region and / or the fifth isolation region is too narrow (i.e., the width of the fourth isolation region and / or the fifth isolation region in the second direction is too small), it is easy to cause the fourth isolation region and / or the fifth isolation region to be printed with a broken grid, resulting in ineffective isolation of the fourth isolation region and / or the fifth isolation region, thereby causing the solar cell to leak, reducing the cell conversion efficiency, and causing the photovoltaic module to have a hot spot effect, which affects the performance of the photovoltaic module. Therefore, by using the above technical solutions, not only can the risk of leakage be further reduced and the safety hazard be reduced, but also the cell conversion efficiency can be improved, the hot spot effect of the photovoltaic module can be reduced or avoided, and the performance of the photovoltaic module can be ensured.

[0041] In an implementation, the width of the overlapping part in the first direction is greater than or equal to 60 microns and less than or equal to 140 microns.

[0042] By using the above technical solutions, if the width of the overlapping part is too large, the width of the first doped semiconductor layer and the second doped semiconductor layer is reduced, and the collection of carriers is reduced. If the width of the overlapping part is too small, due to the error caused by the precision of screen printing, the solar cell may be disabled due to incomplete isolation.

[0043] In an implementation, the width of the laminated structure in the second direction is greater than or equal to 100 microns and less than or equal to 500 microns.

[0044] Compared with the first doped semiconductor layer or the second doped semiconductor layer located at the second ring-shaped conductor part, the passivation effect of the second ring-shaped conductor part can be effectively improved, the probability of damage to the solar cell by the clamp during the process can be reduced, and the quality of the solar cell can be ensured.

[0045] In an implementation manner, the width of the second ring-shaped conductor part along the second direction is greater than or equal to 50 microns and less than or equal to 400 microns.

[0046] In the actual manufacturing process, the paste can be prevented from being printed on the screen printing table due to the too-narrow etching paste (i.e., the too-small width of the second ring-shaped conductor part), so that the production capacity of the solar cell mass production can be improved.

[0047] In an implementation manner, the height difference between the second current collecting part and the first current collecting part is greater than the height difference between the second ring-shaped conductor part and the second current collecting part; and / or, the height difference between the second ring-shaped conductor part and the first current collecting part is greater than the height difference between the second ring-shaped conductor part and the second current collecting part.

[0048] In the above technical solution, when the second doped semiconductor layer is formed on the first surface of the substrate, and the doping type of the second doped semiconductor layer is the same as that of the substrate, the second doped semiconductor layer is a multi-carrier, and therefore, the recombination problem at the fifth isolation region does not need to be considered. However, the recombination problem at the first isolation region and the fourth isolation region needs to be considered, and therefore, the height difference at the first isolation region and the fourth isolation region is large, so as to reduce the probability of recombination of the multi-carriers in the first doped semiconductor layer.

[0049] In a second aspect, the present application further provides a preparation method of a solar cell. The preparation method of the solar cell comprises:

[0050] providing a substrate, the substrate comprising opposite first and second surfaces;

[0051] forming a current collecting layer on the first surface of the substrate;

[0052] The current collecting layer comprises a plurality of first current collecting parts and a plurality of second current collecting parts; the first current collecting parts and the second current collecting parts are arranged alternately and spaced along a first direction and extend along a second direction, the first direction and the second direction being orthogonal; and the adjacent first current collecting part and the second current collecting part have a first isolation region therebetween.

[0053] The first surface has a first edge and a second edge oppositely arranged along the second direction, a second isolation region is between a boundary of the first current collecting part closest to the first edge and the first edge, and a third isolation region is between a boundary of the second current collecting part closest to the first edge and the first edge; a width of the second isolation region and / or the third isolation region in the second direction is greater than a width of the first isolation region in the first direction.

[0054] Compared with the prior art, the preparation method of the solar cell provided in the application has the same beneficial effects as the solar cell of the first aspect, which will not be repeated here.

[0055] In an implementation manner, forming the current collecting layer on the first surface of the substrate comprises:

[0056] forming a current collecting material layer on the first surface of the substrate in a whole layer;

[0057] removing the current collecting material layer at a position corresponding to the first isolation region to form the current collecting layer comprising the plurality of first current collecting parts and the plurality of second current collecting parts.

[0058] In a third aspect, the application further provides a photovoltaic module. The photovoltaic module comprises a plurality of the solar cells of the first aspect or a plurality of the solar cells prepared by the preparation method of the second aspect. An encapsulation layer covers surfaces of the plurality of solar cells, and a cover plate covers surfaces of the encapsulation layer away from the solar cells.

[0059] Compared with the prior art, the photovoltaic module provided in the application has the same beneficial effects as the solar cell of the first aspect or the same beneficial effects as the solar cell prepared by the preparation method of the second aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0060] The accompanying drawings, which are included to provide a further understanding of the application and constitute a part of this application, illustrate certain illustrative embodiments of the application and together with the description serve to explain the application. In the drawings:

[0061] FIG. 1 is a top view of a solar cell in an embodiment of the application;

[0062] FIG. 2 is an enlarged schematic view of part of the structure of FIG. 1 in an embodiment of the application;

[0063] FIG. 3 is a first kind of sectional view of A1-A2 direction in FIG. 2 in an embodiment of the application;

[0064] FIG. 4 is a second kind of sectional view of A1-A2 direction in FIG. 2 in an embodiment of the application;

[0065] Fig. 5 is a first cross-sectional view of B1-B2 direction in Fig. 2 according to an embodiment of the present application;

[0066] Fig. 6 is a second cross-sectional view of B1-B2 direction in Fig. 2 according to an embodiment of the present application;

[0067] Fig. 7 is a first cross-sectional view of C1-C2 direction in Fig. 2 according to an embodiment of the present application;

[0068] Fig. 8 is a second cross-sectional view of C1-C2 direction in Fig. 2 according to an embodiment of the present application;

[0069] Fig. 9 is a partial enlarged schematic view of a top view of a solar cell including a grid line according to an embodiment of the present application;

[0070] Fig. 10 is a partial enlarged schematic view of a top view of another solar cell including a grid line according to an embodiment of the present application;

[0071] Fig. 11 is an SEM view of a partial structure in a solar cell according to an embodiment of the present application;

[0072] Fig. 12 is an enlarged schematic view of a partial structure in Fig. 11 according to an embodiment of the present application;

[0073] Fig. 13 is a schematic view of a prism structure according to an embodiment of the present application.

[0074] Reference signs: 1 - substrate, 10 - first side, 11 - second side, 12 - third side, 13 - first chamfer, 14 - second chamfer; 2 - current collecting layer, 20 - first current collecting part, 21 - second current collecting part; 3 - first isolation region, 4 - second isolation region, 5 - third isolation region, 6 - ring conductor layer, 60 - first ring conductor part, 61 - second ring conductor part, 7 - fourth isolation region, 8 - fifth isolation region, 90 - grid line, 91 - prism structure, 910 - pyramid, 92 - first doped semiconductor layer, 93 - second doped semiconductor layer, 94 - first passivation layer, 95 - second passivation layer, 96 - plane, 97 - pyramid textured structure. DETAILED DESCRIPTION

[0075] In order to make the technical problems solved by the present application, the technical solutions and the beneficial effects clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0076] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0077] In addition, the terms "first", "second", "third", etc. are used herein only to describe different instances, and are not used to indicate or imply relative importance or a number of indicated technical features. Thus, features defined with "first", "second", etc. can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly and specifically limited.

[0078] In the description of the present application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", etc. indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and thus cannot be understood as limiting the present application, which does not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation.

[0079] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connection" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integral connection; it can be mechanical connection, or electrical connection; it can be direct connection, or indirect connection through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0080] In order to solve the above technical problems, in a first aspect, the embodiments of the present application provide a solar cell. Referring to FIGS. 1 to 8, the solar cell comprises a substrate 1 and a current collecting layer 2. The substrate 1 comprises opposite first and second surfaces, and the current collecting layer 2 is arranged on the first surface and comprises a plurality of first current collecting portions 20 and a plurality of second current collecting portions 21. The first and second current collecting portions 20 and 21 are arranged alternately and spaced along a first direction A and extend along a second direction B, and the first and second directions A and B are orthogonal. The first and second current collecting portions 20 and 21 have a first isolation region 3 therebetween, the first surface has a first edge 10 and a second edge 11 arranged oppositely along the second direction B, and the first current collecting portion 20 has a second isolation region 4 between a boundary thereof adjacent to the first edge 10 and the first edge 10. The second current collecting portion 21 has a third isolation region 5 between a boundary thereof adjacent to the first edge 10 and the first edge 10, and the second and / or third isolation regions 4 and 5 have a width in the second direction B greater than a width of the first isolation region 3 in the first direction A.

[0081] The first surface and the second surface of the substrate can be of the same shape or different shape. In the embodiments of the present application, the first surface and the second surface are of the same shape. For example, the first surface or the second surface can be square, rectangular, rounded square, circular, or the like.

[0082] The substrate can be a semiconductor substrate. For example, the substrate can be a substrate of silicon, germanium-silicon, germanium, gallium arsenide, or any other semiconductor material.

[0083] The substrate can be an intrinsic conductive substrate, an N-type conductive substrate, or a P-type conductive substrate. Preferably, the substrate is a P-type conductive substrate or an N-type conductive substrate. Compared with the intrinsic conductive substrate, the P-type conductive substrate or the N-type conductive substrate has better conductivity, so that the solar cell prepared finally has lower bulk resistivity, thereby improving the efficiency of the solar cell. For example, the substrate is an N-type silicon substrate. Compared with the P-type conductive substrate, the N-type silicon substrate has the advantages of high minority carrier lifetime, no light decay, and good weak light performance.

[0084] It should be understood that the first surface is a back light surface, and the second surface is a light receiving surface. The light receiving surface (i.e., the second surface) of the substrate can be a flat surface, or the light receiving surface of the substrate can be a textured surface. The textured surface has a light trapping effect, so that when the light receiving surface of the substrate is a textured surface, the reflectivity of the light receiving surface can be reduced, which is conducive to making more light be refracted into the substrate from the light receiving surface and be absorbed by the substrate, thereby improving the photoelectric conversion efficiency of the solar cell.

[0085] Referring to FIGS. 1-8, in the solar cell provided by the embodiments of the present application, the boundary of the first current collecting part 20 adjacent to the first edge 10 and the first edge 10 has a second isolation zone 4, and at this time, the second isolation zone 4 separates the boundary of the first current collecting part 20 adjacent to the first edge 10 and the first edge 10, so as to facilitate the suppression of electric leakage. Further, the boundary of the second current collecting part 21 adjacent to the first edge 10 and the first edge 10 has a third isolation zone 5, and at this time, the third isolation zone 5 separates the boundary of the second current collecting part 21 adjacent to the first edge 10 and the first edge 10, so as to facilitate the suppression of electric leakage. Still further, since the edge of the cell has more defects and more existing recombination centers, it is necessary to make the isolation between the current collecting part and the edge of the cell relatively large, and the first isolation zone is PN isolation, which has been set small enough to improve the surface utilization rate of the cell. Therefore, the embodiments of the present application make the width of the second isolation zone 4 and / or the third isolation zone 5 in the second direction B greater than the width of the first isolation zone 3 in the first direction A, and at this time, the first current collecting part 20 and the second current collecting part 21 can be further separated from the first edge 10, so as to reduce the risk of electric leakage and reduce the safety hazard.

[0086] The first, second and third isolation regions are regions without electron / hole collection, which do not contribute to the current, and thus do not generate and collect photocurrent.

[0087] As a possible implementation, referring to FIG. 2, the width of the first isolation region 3 in the first direction A is greater than or equal to 40 microns and less than or equal to 80 microns. For example, the width of the first isolation region 3 in the first direction A can be 40 microns, 45 microns, 50 microns, 55 microns, 60 microns, 65 microns, 70 microns, 75 microns or 80 microns, etc.

[0088] As a possible implementation, the current collection layer is a transparent conductive layer. For example, the transparent conductive layer can be composed of one or more of ITO (indium tin oxide) layer, ITiO (titanium tin oxide) layer, IWO (tungsten tin oxide) layer and ICO (cerium tin oxide) layer.

[0089] In the case of the above technical solution, the transparent conductive layer has high conductivity, which can timely guide the collected carriers out and reduce the carrier recombination rate. Further, the transparent conductive layer not only improves the current collection capability of the solar cell, but also serves as an anti-reflection film to improve the light absorption rate of the solar cell. In addition, the transparent conductive layer has passivation performance. In addition, as described above, the first current collection part and the second current collection part are insulated by the first isolation region, which physically insulates the first current collection part and the second current collection part. Specifically, because the first current collection part is ohmically connected to the first electrode, and the second current collection part is ohmically connected to the second electrode, the transparent conductive layers of the two parts cannot be directly electrically connected, i.e. they must be physically insulated, i.e. not in contact.

[0090] As a possible implementation, referring to FIGS. 1-8, the first surface further comprises a ring-shaped conductor layer 6 surrounding the current collection layer 2. The ring-shaped conductor layer 6 has a fourth isolation region 7 between the inner boundary of the ring-shaped conductor layer 6 close to the first edge 10 and the boundary of the first current collection part 20 close to the first edge 10; and / or, the ring-shaped conductor layer 6 has a fifth isolation region 8 between the inner boundary of the ring-shaped conductor layer 6 close to the first edge 10 and the boundary of the second current collection part 21 close to the first edge 10. The width of the fourth isolation region 7 and / or the fifth isolation region 8 in the second direction B is greater than the width of the first isolation region 3 in the first direction A.

[0091] Since the edge region of the solar cell has more defects, if the edge region is not effectively isolated, it will cause the solar cell to leak, the conversion efficiency of the cell to be reduced, and the photovoltaic module to generate hot spot effect, affecting the performance of the photovoltaic module. Therefore, in the case of adopting the technical scheme, the first current collecting part and the second current collecting part can be further separated from the first edge to further reduce the risk of leakage and reduce the safety hazard. At the same time, the conversion efficiency of the cell can be improved, and the hot spot effect of the photovoltaic module can be reduced or avoided to ensure the performance of the photovoltaic module.

[0092] In an optional manner, referring to FIGS. 5-8, the annular conductor layer 6 includes a first annular conductor part 60 and a second annular conductor part 61, the first annular conductor part 60 is in direct contact with the substrate 1, and the second annular conductor part 61 is not in direct contact with the substrate 1. The second annular conductor part 61 is located between the first annular conductor part 60 and the fourth isolation region 7; or, the second annular conductor part 61 is located between the first annular conductor part 60 and the fifth isolation region 8.

[0093] In the case of adopting the technical scheme, the first annular conductor part can further ensure the electrical isolation effect of the edge, prevent the edge from transmitting the hidden cracks to the inside of the solar cell, and ensure the quality of the solar cell.

[0094] Although the annular conductor layer 6 shown in the figure includes the first annular conductor part 60 and the second annular conductor part 61. But in another embodiment, the annular conductor layer 6 can also be formed on the doped semiconductor layer, which can be at least one of the first doped semiconductor layer 92 and the second doped semiconductor layer 93. That is, the boundary of the annular conductor layer 6 close to the first edge is substantially flush with the boundary of the doped semiconductor layer, which can be the first doped semiconductor layer 92 or the second doped semiconductor layer 93 opposite to the first doped semiconductor layer 92 in doping polarity, or a stack of the two. In this way, the doped semiconductor layer is provided at the edge position of the cell sheet to be passivated, which can reduce the surface defects at the edge position and reduce the minority carrier recombination at the edge position, thereby improving the electrical performance of the edge.

[0095] In an optional manner, the annular conductor layer is a transparent conductive layer.

[0096] In an optional mode, referring to FIG. 2, the width of the fourth isolation region 7 in the second direction B and the width of the fifth isolation region 8 in the second direction B are both greater than or equal to 80 microns and less than or equal to 200 microns. For example, the width of the fourth isolation region 7 in the second direction B or the width of the fifth isolation region 8 in the second direction B can be 80 microns, 90 microns, 100 microns, 120 microns, 150 microns, 160 microns, 190 microns, or 200 microns, etc. Since the edge region of the solar cell has a large leakage current, a larger isolation space needs to be set, and the width range of the fourth isolation region and the fifth isolation region can fully utilize the active area of the edge while ensuring electrical isolation, so as to improve the photoelectric conversion efficiency.

[0097] The size relationship between the width value of the fourth isolation region in the second direction and the width value of the fifth isolation region in the second direction can be set according to actual conditions. In an optional mode, the width of the fourth isolation region in the second direction is equal to the width of the fifth isolation region in the second direction.

[0098] In an optional mode, the ratio of the width of the fourth isolation region in the second direction and / or the width of the fifth isolation region in the second direction to the width of the first isolation region in the first direction is greater than or equal to 1.5 and less than or equal to 3.

[0099] Since the passivation effect of the edge region of the solar cell is poor, the influence of the edge region on the open-circuit voltage, pseudo fill factor, and other electrical performance parameters related to passivation can be effectively isolated by using the above technical solution, so as to improve the cell conversion efficiency of the solar cell. Further, considering that the first isolation region is located between the first current collecting part and the second current collecting part, and the first isolation region requires a narrow width, screen printing needs to be printed along a certain direction. If the etching paste (such as oxalic acid or phosphoric acid system) printing opening of the fourth isolation region and / or the fifth isolation region is too narrow (i.e., the width of the fourth isolation region and / or the fifth isolation region in the second direction is too small), it is easy to cause the fourth isolation region and / or the fifth isolation region to print a broken grid, resulting in ineffective isolation of the fourth isolation region and / or the fifth isolation region, thereby causing the solar cell to leak, reducing the cell conversion efficiency, and causing the photovoltaic module to produce a hot spot effect, affecting the performance of the photovoltaic module. Therefore, by using the above technical solution, not only can the risk of leakage be further reduced and the safety hazard be reduced. At the same time, the cell conversion efficiency can be improved, and the hot spot effect of the photovoltaic module can be reduced or avoided, so as to ensure the performance of the photovoltaic module.

[0100] In an alternative, referring to Figs. 5-8, the width W1 of the second ring-shaped conductor portion 61 in the second direction is greater than or equal to 50 microns and less than or equal to 400 microns. For example, the width W1 of the second ring-shaped conductor portion 61 can be 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns, 140 microns, 150 microns, 160 microns, 170 microns, 180 microns, 190 microns, 200 microns, 230 microns, 260 microns, 280 microns, 300 microns, 310 microns, 320 microns, 350 microns, 380 microns, 400 microns, etc.

[0101] With the above technical solution, in actual production, the paste can be prevented from being printed onto the screen printing table due to the too-narrow etching paste (i.e., the too-small width of the second ring-shaped conductor portion), so as to improve the production capacity of the solar cell mass production.

[0102] In an alternative, referring to Figs. 3-8, the height difference between the second current collecting portion 21 and the first current collecting portion 20 is greater than the height difference between the second ring-shaped conductor portion 61 and the second current collecting portion 21; and / or, the height difference between the second ring-shaped conductor portion 61 and the first current collecting portion 20 is greater than the height difference between the second ring-shaped conductor portion 61 and the second current collecting portion 21.

[0103] With the above technical solution, when the first surface of the substrate 1 is formed with the second doped semiconductor layer 93, and the doped type of the second doped semiconductor layer 93 is the same as that of the substrate 1, the second doped semiconductor layer 93 is a multi-carrier, so that the recombination problem at the fifth isolation region 8 does not need to be considered. However, the recombination problem at the first isolation region 3 and the fourth isolation region 7 needs to be considered, so that the height difference at the first isolation region 3 and the fourth isolation region 7 is large, so as to reduce the probability of the multi-carrier recombination in the first doped semiconductor layer.

[0104] Figures 1 and 2 show that the annular conductor layer 6 is a continuous annular structure, and the first current collecting part 20 has the fourth isolation region 7 from the annular conductor layer 6, and the second current collecting part 21 has the fifth isolation region 8 from the annular conductor layer 6. However, in another embodiment, the annular conductor layer 6 can be discontinuous, and only has the fourth isolation region 7 from the first current collecting part 20, and the annular conductor layer 6 is broken by the second current collecting part 21. In this case, the first current collecting part 20 can extend to the first edge 10 or the second edge 11 of the substrate, and the end of the first current collecting part 20 near the first edge 10 is closer to the edge of the substrate than the fourth isolation region 7. When the annular conductor layer 6 is a discontinuous annular structure, which is broken by the first current collecting part 20, the first doped semiconductor layer 92 at the bottom of the first current collecting part 20 is continuous and formed on the substrate 1, and does not form a laminated structure with the second doped semiconductor layer 93.

[0105] Alternatively, the annular conductor layer 6 only has the fifth isolation region 8 from the second current collecting part 21, and the annular conductor layer 6 is broken by the first current collecting part 20. In this case, the second current collecting part 21 can extend to the first edge 10 or the second edge 11 of the substrate, and the end of the second current collecting part 21 near the first edge 10 is closer to the edge of the substrate than the fifth isolation region 8. When the annular conductor layer 6 is a discontinuous annular structure, which is broken by the second current collecting part 21, the second doped semiconductor layer 93 at the bottom of the second current collecting part 21 is continuous and formed on the substrate 1, and does not form a laminated structure with the first doped semiconductor layer 92.

[0106] Preferably, the annular conductor layer 6 is broken by the second current collecting part 21, and the second doped semiconductor layer 93 under the second current collecting part 21 has the same doping type as the substrate 1, for example, both can be N-type doped. Because the second doped semiconductor layer 93 has the same doping type as the substrate 1, and is close to the edge of the solar cell, the carriers in the second doped semiconductor layer 93 are majority carriers, which do not increase the recombination efficiency of minority carriers.

[0107] As a possible implementation, referring to FIG. 9, the solar cell further comprises a grid line 90 disposed on the current collecting layer, the grid line 90 being located on the first current collecting part 20 and the second current collecting part 21 respectively. The minimum distance between the end of the grid line 90 close to the first side and the second isolation region 4 and / or the third isolation region 5 in the second direction B is L1, and the minimum distance between the grid line and the first isolation region in the first direction is L2, L1 being greater than L2. Since L1 is greater than L2, the grid line 90 can collect the current in the width of the first current collecting part 20 or the second current collecting part 21, while taking into account the current collection at both ends (i.e. the end close to the first side 10 or the second side 11). Since the edge position of the cell sheet has a large defect and a large number of recombination centers, and the leakage is also large, L1 needs to be set to be large to prevent the recombination of minority carriers at the end.

[0108] In an optional manner, referring to FIG. 9, L1 is greater than or equal to 100 microns and less than or equal to 500 microns. For example, L1 can be 100 microns, 120 microns, 180 microns, 200 microns, 220 microns, 260 microns, 300 microns, 350 microns, 400 microns, 480 microns or 500 microns, etc. At this time, the effective collection of current by the grid line 90 can be ensured, and the leakage caused by the grid line 90 being too close to the second isolation region 4 and / or the third isolation region 5 can be prevented.

[0109] In an optional manner, referring to FIG. 9, the minimum distance L2 between the grid line 90 and the first isolation region 3 in the first direction A is greater than or equal to 50 microns and less than or equal to 400 microns. For example, L2 can be 50 microns, 100 microns, 120 microns, 180 microns, 200 microns, 220 microns, 260 microns, 300 microns, 320 microns, 350 microns, 380 microns or 400 microns, etc. At this time, the effective collection of current by the grid line 90 can be ensured, and the leakage caused by the grid line 90 being too close to the first isolation region 3 can be prevented.

[0110] As a possible implementation, referring to FIG. 1 and FIG. 10, the first surface further comprises a third side 12 between the first side 10 and the second side 11.

[0111] In an optional manner, referring to FIG. 1, the third side 12 is perpendicular to the first side 10 and the second side 11 respectively.

[0112] In another alternative, referring to FIG. 10, one end of the third edge 12 is connected to the end of the first edge 10 by the first chamfer 13, and the other end of the third edge 12 is connected to the end of the second edge 11 by the second chamfer 14. The boundary of the first current collecting portion 20 adjacent to the first chamfer 13 and / or the second chamfer 14 is a chamfered edge; and / or, the boundary of the second current collecting portion 21 adjacent to the first chamfer 13 and / or the second chamfer 14 is a chamfered edge. The chamfered edge can effectively prevent the solar cell from being broken or cracked during the manufacturing process.

[0113] In an alternative, referring to FIG. 10, the length of the first current collecting portion 20 adjacent to the first chamfer 13 and the second chamfer 14 is less than the length of the remaining first current collecting portion 20; and / or, the length of the second current collecting portion 21 adjacent to the first chamfer 13 and the second chamfer 14 is less than the length of the remaining second current collecting portion 21.

[0114] In the case of using the above technical solutions, the defects of the first current collecting portion 20 and / or the second current collecting portion 21 near the first chamfer 13 and the second chamfer 14 can be isolated, so as to improve the quality of the solar cell.

[0115] In an alternative, referring to FIG. 10, when the solar cell further comprises the grid lines 90, the minimum distance L3 between the end of the grid line 90 adjacent to the first chamfer 13 and the second chamfer 14 and the end of the first current collecting portion 20 corresponding to the grid line 90 in the second direction B is less than the minimum distance L4 between the end of the grid line 90 away from the first chamfer 13 and the second chamfer 14 and the end of the first current collecting portion 20 corresponding to the grid line 90 in the second direction B. Or, when the solar cell further comprises the grid lines, the minimum distance between the end of the grid line adjacent to the first chamfer and the second chamfer and the end of the second current collecting portion corresponding to the grid line in the second direction is less than the minimum distance between the end of the grid line away from the first chamfer and the second chamfer and the end of the second current collecting portion corresponding to the grid line in the second direction.

[0116] In an alternative, referring to FIG. 10, the chamfered edge of the first current collecting portion 20 and / or the second current collecting portion 21 adjacent to the first chamfer 13 is a bevel edge, which gradually inclines from the direction away from the third edge 12 to the direction close to the first chamfer 13. The chamfered edge of the first current collecting portion 20 and / or the second current collecting portion 21 adjacent to the second chamfer 14 is a bevel edge, which gradually inclines from the direction away from the third edge 12 to the direction close to the second chamfer 14.

[0117] In the above technical solution, the sharp corner position of the bevel is away from the third side 12, which can prevent the sharp corner position of the bevel from being cracked due to stress concentration. Further, the area between the first current collecting part 20 and the first chamfer 13 and / or the second chamfer 14 or the area between the second current collecting part 21 and the first chamfer 13 and / or the second chamfer 14 can be larger, so as to disperse the stress in the area between the first current collecting part 20 and the first chamfer 13 and / or the second chamfer 14 or the stress in the area between the second current collecting part 21 and the first chamfer 13 and / or the second chamfer 14, thereby preventing stress concentration and reducing the occurrence of cracks.

[0118] As a possible implementation, referring to FIGS. 3 and 4, the first surface of the substrate 1 has a plurality of recessed regions corresponding to the plurality of first current collecting parts 20 respectively, and a plurality of flat regions corresponding to the plurality of second current collecting parts 21 respectively. Alternatively, referring to FIGS. 5 and 6, the first surface of the substrate 1 has a plurality of recessed regions corresponding to the plurality of first current collecting parts 20 respectively, and a flat region corresponding to the annular conductor layer 6. In the direction from the first surface to the second surface, the recessed regions are recessed compared to the flat regions, and the adjacent recessed regions and flat regions have inclined side walls.

[0119] In the above technical solution, the presence of the recessed regions can at least partially stagger the first current collecting parts 20 and the second current collecting parts 21 in the thickness direction of the substrate 1, which is conducive to at least partially staggering the electrode structures in the first current collecting parts 20 and the second current collecting parts 21 in the thickness direction of the substrate 1, thereby reducing the risk of electric leakage.

[0120] In an optional manner, referring to FIG. 11, the recessed regions are formed with a first texture structure, and the first texture structure includes a pyramid-shaped velvet structure 97.

[0121] In the technical solution, the first texture structure includes a pyramid-shaped texture structure, which is beneficial to increase the surface area of the recessed area, improve the light trapping effect of the recessed area, and allow more light to be refracted into the base through the recessed area and be utilized by the base. In addition, the first current collecting part has a portion on the recessed area, and the side of the portion of the first current collecting part formed on the recessed area and away from the base also undulates with the recessed area. That is, the side of the portion of the first current collecting part formed on the recessed area and away from the base also has a substantially same undulating topography as the recessed area. Therefore, when the recessed area is formed with the first texture structure, the side of the portion of the first current collecting part formed on the recessed area and away from the base also has corresponding uneven characteristics, which is beneficial to increase the surface area of the side of the portion of the first current collecting part formed on the recessed area and away from the base, further increase the contact area of the first current collecting part and the corresponding electrode, reduce the contact resistance between the first current collecting part and the corresponding electrode, and further improve the working performance of the solar cell.

[0122] In an optional mode, the flat area has a shape of a base of a pyramid.

[0123] In the technical solution, the recessed area has a height difference between the areas on both sides of the recessed area, and the recessed area is formed with the first texture structure, which can effectively protect the first current collecting part with the first texture structure from process damage.

[0124] In an optional mode, the inclined side wall is formed with a second texture structure, and the second texture structure includes a prism structure. Referring to FIGS. 3 to 6 and FIG. 12, the second texture structure includes a prism structure 91, and the prism structure 91 is inclined along a direction gradually approaching the flat area adjacent to the recessed area.

[0125] In the technical solution, the prism structure can increase the reflection of light toward the bottom surface of the recessed area, thereby increasing the absorption of light.

[0126] In an optional mode, referring to FIGS. 3 to 6, FIG. 12 and FIG. 13, the top end of the prism structure 91 away from the base 1 has a pyramid 910, and the top of the pyramid 910 is lower than the surface of the flat area.

[0127] In the technical solution, the flat area provides a smooth transition interface for the formation of the annular conductor layer and / or the second current collecting part, which is beneficial to increase the formation thickness of the annular conductor layer and / or the second current collecting part on the flat area, and make the shape retention of the annular conductor layer and / or the second current collecting part better.

[0128] The solar cell further comprises a first doped semiconductor layer and a second doped semiconductor layer arranged on the first surface. The first doped semiconductor layer and the second doped semiconductor layer are described below according to different regions.

[0129] In a first example, referring to FIG. 3, the solar cell further comprises a first doped semiconductor layer 92 and a second doped semiconductor layer 93 arranged on the first surface of the substrate 1, and the first doped semiconductor layer 92 and the second doped semiconductor layer 93 are of opposite conductive types. The first current collecting part 20 covers part of the first doped semiconductor layer 92, the first doped semiconductor layer 92 has an overlapping part extending to part of the second doped semiconductor layer 93, and the second current collecting part 21 covers part of the overlapping part and part of the second doped semiconductor layer 93.

[0130] In a second example, referring to FIGS. 5 and 7, the solar cell further comprises a second doped semiconductor layer 93 and a first doped semiconductor layer 92 arranged on the first surface, and the second annular conductor part 61 has a laminated structure of the second doped semiconductor layer 93 and the first doped semiconductor layer 92 between the substrate, and the first doped semiconductor layer 92 and the second doped semiconductor layer 93 are of opposite conductive types.

[0131] In the above technical solution, the first doped semiconductor layer 92 and the second doped semiconductor layer 93 can effectively split the carriers, which is conducive to the formation of photoelectric current.

[0132] In the above two examples, in terms of material, the first doped semiconductor layer comprises a doped amorphous silicon layer and / or a doped microcrystalline silicon layer. It should be noted that the microcrystal in the material of the doped microcrystalline silicon layer is a limitation of the grain size of the silicon material. Specifically, the microcrystalline silicon material refers to a silicon material with a grain size of nanometer level. The second doped semiconductor layer comprises a doped polysilicon layer. In this case, compared with the doped amorphous silicon layer, the doped polysilicon layer has higher carrier transport characteristics, so when the second doped semiconductor layer is a doped polysilicon layer, the carrier recombination rate can be further reduced, which is conducive to improving the photoelectric conversion efficiency of the solar cell.

[0133] In terms of conductive type, the first doped semiconductor layer is of N type, and the second doped semiconductor layer is of P type. Or, the first doped semiconductor layer is of P type, and the second doped semiconductor layer is of N type.

[0134] In the embodiments of the present application, the second doped semiconductor layer has the same doping type as the substrate. In some examples, when the substrate is an N-type substrate, the first doped semiconductor layer can be a P-type first doped semiconductor layer, and the second doped semiconductor layer can be an N-type second doped semiconductor layer. Or, when the substrate is a P-type substrate, the first doped semiconductor layer can be an N-type first doped semiconductor layer, and the second doped semiconductor layer can be a P-type second doped semiconductor layer. For example, the substrate is an N-type silicon substrate, the first doped semiconductor layer is a boron-doped P-type first doped semiconductor layer, and the second doped semiconductor layer is a phosphorus-doped N-type second doped semiconductor layer. At this time, since the region heavily doped with phosphorus has a greater solubility for metal impurities, the phosphorus in the second doped semiconductor layer can provide phosphorus gettering passivation for the first doped semiconductor layer, thereby improving the cell efficiency.

[0135] From the aspect of the forming position, referring to FIGS. 3-6, the first doped semiconductor layer 92 can be directly formed on the first surface of the substrate 1 and extend to cover part of the second doped semiconductor layer 93. As shown in FIGS. 7 and 8, the first doped semiconductor layer 92 can cover the second doped semiconductor layer 93 formed on the first surface. Alternatively, as shown in FIGS. 3-8, the solar cell further comprises a first passivation layer 94. As shown in FIGS. 3-6, the first passivation layer 94 is located between the substrate 1 and the first doped semiconductor layer 92 and extends between the first doped semiconductor layer 92 and the second doped semiconductor layer 93. And / or, as shown in FIGS. 7 and 8, the first passivation layer 94 is located between the first doped semiconductor layer 92 and the second doped semiconductor layer 93. The first passivation layer 94 and the first doped semiconductor layer 92 can constitute a passivated contact structure, which has excellent interface passivation effect and can realize selective collection of carriers, thereby reducing the carrier recombination rate of the substrate 1 and further improving the photoelectric conversion efficiency of the solar cell. The material of the first passivation layer 94 can be determined according to the material of the first doped semiconductor layer 92. For example, when the first doped semiconductor layer 92 comprises a doped amorphous silicon layer, the first passivation layer 94 comprises an intrinsic amorphous silicon layer. The thickness of the first passivation layer 94 can be set according to actual needs, which is not specifically limited herein.

[0136] As shown in FIGS. 3-8, the second doped semiconductor layer can be directly formed on the first surface of the substrate. Alternatively, as shown in FIGS. 3-8, the solar cell further comprises a second passivation layer 95. The second passivation layer 95 is disposed on the substrate 1, and the second doped semiconductor layer 93 covers the second passivation layer 95. The second passivation layer 95 and the second doped semiconductor layer 93 can form a passivation contact structure, have excellent interface passivation effect, and can realize selective collection of carriers, reduce the carrier recombination rate of the substrate 1, and further improve the photoelectric conversion efficiency of the solar cell. The material of the second passivation layer 95 can be determined according to the material of the second doped semiconductor layer 93. For example, when the second doped semiconductor layer 93 comprises a doped polysilicon layer, the second passivation layer 95 is a tunneling passivation layer. Preferably, the material of the second passivation layer 95 can be silicon oxide. Alternatively, when the second doped semiconductor layer 93 comprises a doped amorphous silicon layer or a doped microcrystalline silicon layer, the second passivation layer 95 is an intrinsic amorphous silicon layer. The thickness of the second passivation layer 95 can be set according to actual needs, and is not specifically limited here.

[0137] At this time, the solar cell provided by the embodiment of the present application is a hybrid HBC (Hetero-Junction Back Contact) cell, and HBC is a back contact heterojunction solar cell. One pole of the hybrid HBC cell is a heterojunction passivation structure composed of the first passivation layer and the first doped semiconductor layer, and the other pole is a tunneling oxide passivation structure composed of the second passivation layer and the second doped semiconductor layer.

[0138] In combination with the foregoing description, the width of the first isolation region in the first direction is greater than or equal to 40 microns and less than or equal to 80 microns. In the case of adopting the above technical solution, the width of the first isolation region in the first direction can be avoided to be too large, so as to avoid the width of the first doped semiconductor layer and the second doped semiconductor layer being too small, thereby ensuring the collection of carriers. Further, the width of the first isolation region in the first direction can be avoided to be too small, so as to avoid the problem that the current silk screen printing engineering capability cannot be met, resulting in that the solar cell cannot be completely isolated and fails.

[0139] In an optional manner, referring to FIGS. 3 and 4, the width W2 of the overlapping portion in the first direction is greater than or equal to 60 microns and less than or equal to 140 microns. For example, the width W2 can be 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns or 140 microns, etc. If the overlapping portion is set to be too large, the width of the first doped semiconductor layer and the second doped semiconductor layer will be reduced, and the collection of carriers will be reduced. If the overlapping portion is set to be too small, due to the error caused by the current silk screen printing precision, it can be caused that the solar cell cannot be completely isolated and fails.

[0140] As a possible implementation, referring to FIGS. 5-8, the width W3 of the stacked structure along the second direction is greater than or equal to 100 microns and less than or equal to 500 microns. For example, the width W3 can be 100 microns, 130 microns, 180 microns, 200 microns, 230 microns, 250 microns, 280 microns, 300 microns, 320 microns, 350 microns, 380 microns, 400 microns, 430 microns, 450 microns, 480 microns, or 500 microns, etc.

[0141] With the above technical solution, compared to forming the first doped semiconductor layer 92 or the second doped semiconductor layer 93 on the second ring conductor portion 61, the passivation effect of the second ring conductor portion 61 can be effectively improved, the probability of damage to the solar cell by the clamp during the process can be reduced, and the quality of the solar cell can be ensured.

[0142] As a possible implementation, referring to FIG. 12, the at least partial first surface corresponding to the first isolation region 3 is a plane 96, and the plane is flush with the first surface corresponding to the second current collecting portion 21. The plane is only covered with the first doped semiconductor layer 92, and is not covered with the second doped semiconductor layer 93.

[0143] As a possible implementation, the at least partial first surface corresponding to the fourth isolation region is a plane, and the plane is flush with the first surface corresponding to the ring conductor region. The plane is only covered with the first doped semiconductor layer, and is not covered with the second doped semiconductor layer.

[0144] In a second aspect, the embodiments of the present application further provide a preparation method of a solar cell. Referring to FIGS. 1-13, the preparation method of the solar cell can include:

[0145] First, a substrate 1 is provided, which includes opposite first and second surfaces. The related description of the substrate 1 can refer to the description in the first aspect, which will not be repeated here.

[0146] In actual application, the substrate is polished and cleaned first. The specific steps of polishing and cleaning can refer to the prior art, which will not be specifically limited here.

[0147] Next, a second doped semiconductor material layer is formed on the first surface of the substrate. For example, a chemical vapor deposition process can be used to form a semiconductor material layer on the first surface. Then, the semiconductor material layer is doped to form a second doped semiconductor material layer on the first surface.

[0148] Next, a mask layer is formed on the second doped semiconductor material layer. The material of the mask layer can be one or more of silicon nitride, silicon oxynitride, silicon oxide, silicon oxycarbide, or intrinsic silicon. The method of forming the mask layer includes one or more of plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, catalytic chemical vapor deposition (Cat-CVD), or atomic layer deposition (ALD).

[0149] Next, the mask layer and the second doped semiconductor material layer are processed using a laser process. Under the protection of the mask layer, part of the second doped semiconductor material layer is removed, and the remaining part of the second doped semiconductor material layer forms the second doped semiconductor layer.

[0150] In addition, in the case where the solar cell further includes a second passivation layer, after providing a substrate, before forming the second doped semiconductor layer, the method of manufacturing the solar cell includes forming a second passivation layer on the first surface of the substrate, the second passivation layer corresponding to the second doped semiconductor layer. The material and thickness of the second passivation layer can be referred to the description in the first aspect, and will not be described in detail here.

[0151] For example, before forming the second doped semiconductor layer, a deposition and etching process can be used to form the second passivation layer only at the positions that meet the actual requirements. Alternatively, before forming the second doped semiconductor layer, a deposition process is used to form the second passivation layer on the first surface, and then after removing the unnecessary second doped semiconductor layer under the protection of the mask layer, a corresponding etching process is used to remove the exposed second passivation layer under the protection of the mask layer, and only the part of the second passivation layer corresponding to the second doped semiconductor layer is retained. It should be noted that the method of forming the second passivation layer includes one or more of plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, catalytic chemical vapor deposition (Cat-CVD), or atomic layer deposition (ALD).

[0152] It should be noted that when part of the second doped semiconductor layer and part of the second passivation layer are removed, part of the first surface of the substrate forms a recessed area. The description of the recessed area can be referred to the first aspect, and will not be described in detail here.

[0153] Next, the mask layer is removed.

[0154] Next, the first doped semiconductor layer 92 and the second doped semiconductor layer 93 are formed, and the conductive type of the first doped semiconductor layer 92 is opposite to that of the second doped semiconductor layer 93.

[0155] For example, a process such as chemical vapor deposition (e.g., one or more of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, catalytic chemical vapor deposition (Cat-CVD), or atomic layer deposition (ALD)) can be used to form a layer of semiconductor material over the first surface. The layer of semiconductor material can then be doped to form a first doped semiconductor material layer over the first surface. A laser ablation process can then be used to ablate portions of the first doped semiconductor material layer to form a first doped semiconductor layer that covers the first surface of the substrate and portions of the second doped semiconductor layer. It should be noted that the location of the first doped semiconductor layer is not limited to the above, and can be determined according to actual needs.

[0156] In addition, in the case where the solar cell further comprises a first passivation layer, after the second doped semiconductor layer is formed, before the first doped semiconductor layer is formed, the method for manufacturing the solar cell further comprises: forming a first passivation layer corresponding to the first doped semiconductor layer. For example, before the first doped semiconductor layer is formed, a deposition and etching process can be used to form a first passivation layer that covers only the location that meets the actual needs. Alternatively, after the second doped semiconductor layer is formed, a deposition process can be used to form a first passivation layer that is disposed over the first surface, and then a laser process can be used to remove the unnecessary first doped semiconductor material layer. Subsequently, a corresponding laser process can be used to remove the unnecessary first passivation layer.

[0157] Next, a current collecting layer 2 is formed on the first surface of the substrate 1;

[0158] The current collecting layer 2 comprises a plurality of first current collecting portions 20 and a plurality of second current collecting portions 21. The first current collecting portions 20 and the second current collecting portions 21 are arranged alternately and spaced apart along a first direction A and extend along a second direction B. The first direction A and the second direction B are orthogonal to each other. The first current collecting portions 20 and the second current collecting portions 21 have a first separation region 3 between adjacent first current collecting portions 20 and second current collecting portions 21. The first surface has a first edge 10 and a second edge 11 arranged oppositely along the second direction B. The first current collecting portions 20 have a second separation region 4 between the edge adjacent to the first edge 10 and the first edge 10. The second current collecting portions 21 have a third separation region 5 between the edge adjacent to the first edge 10 and the first edge 10. The width of the second separation region 4 and / or the third separation region 5 along the second direction B is greater than the width of the first separation region 3 along the first direction A.

[0159] In an alternative way, the step of forming a current collecting layer on the first surface of the substrate can comprise:

[0160] A layer of current collecting material is formed over the first surface of the substrate; for example, a layer of current collecting material is formed over the first surface of the substrate, the first doped semiconductor layer, and the second doped semiconductor layer.

[0161] Then, the current collecting material layer at the position corresponding to the first isolation region and at least part of the current collecting material layer located in the second and third isolation regions are removed to form a current collecting layer including a plurality of first current collecting portions and a plurality of second current collecting portions.

[0162] In the same step of forming the first isolation region 3, a ring-shaped conductor layer 6 surrounding the current collecting layer 2 is formed;

[0163] The fourth isolation region 7 is between the inner boundary of the ring-shaped conductor layer 6 close to the first side 10 and the boundary of the first current collecting portion 20 close to the first side 10, and the fifth isolation region 8 is between the inner boundary of the ring-shaped conductor layer 6 close to the first side 10 and the boundary of the second current collecting portion 21 close to the first side 10. The width of the fourth isolation region 7 and / or the fifth isolation region 8 in the second direction B is greater than the width of the first isolation region 3 in the first direction A.

[0164] For example, if the ring-shaped conductor layer and the current collecting layer are made of the same material, the current collecting material layer located in the ring-shaped region of the fourth and fifth isolation regions is removed in combination with the process of forming the current collecting layer in the previous step to simultaneously form the ring-shaped conductor layer surrounding the current collecting layer and the current collecting layer. If the ring-shaped conductor layer and the current collecting layer are made of different materials, the current collecting material layer located in the second and third isolation regions is completely removed, and then the ring-shaped conductor layer is deposited between the edge of the substrate and the ring-shaped region of the fourth and fifth isolation regions.

[0165] Next, electrode paste is printed on the current collecting layer located on the first and second doped semiconductor layers to form a first electrode electrically connected to the first doped semiconductor layer and a second electrode electrically connected to the second doped semiconductor layer.

[0166] Compared with the prior art, the preparation method of the solar cell provided by the embodiments of the present application has the same beneficial effects as the solar cell of the first aspect, which will not be repeated here.

[0167] In a third aspect, the embodiments of the present application further provide a photovoltaic module. The photovoltaic module includes a plurality of solar cells of the first aspect or a plurality of solar cells prepared by the preparation method of the second aspect. An encapsulation layer covers the surface of the plurality of solar cells, and a cover plate covers the surface of the encapsulation layer away from the solar cells.

[0168] Compared with the prior art, the photovoltaic module provided by the embodiments of the present application has the same beneficial effects as the solar cell of the first aspect or the same beneficial effects as the solar cell prepared by the preparation method of the second aspect, which will not be repeated here.

[0169] In the description of the above-mentioned embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0170] The above description is merely illustrative of the application and is not intended to limit the scope of the application that is defined by the appended claims.

Claims

1. A solar cell, characterized by, The solar cell comprises: a substrate comprising a first surface and a second surface opposite to each other; a current collecting layer disposed on the first surface and comprising a plurality of first current collecting portions and a plurality of second current collecting portions; the first current collecting portions and the second current collecting portions are arranged alternately and spacedly along a first direction and extend along a second direction, the first direction and the second direction being orthogonal to each other; a first separation region is provided between adjacent first current collecting portions and second current collecting portions; the first surface has a first edge and a second edge disposed opposite to each other along the second direction; a second separation region is provided between a boundary of the first current collecting portions adjacent to the first edge and the first edge; a third separation region is provided between a boundary of the second current collecting portions adjacent to the first edge and the first edge; a width of the second separation region and / or the third separation region in the second direction is greater than a width of the first separation region in the first direction.

2. The solar cell according to claim 1, characterized in that, The current collecting layer is a transparent conductive layer.

3. The solar cell according to claim 1, characterized in that, The solar cell further comprises a ring-shaped conductor layer surrounding the current collecting layer on the first surface; a fourth separation region is provided between an inner boundary of the ring-shaped conductor layer adjacent to the first edge and a boundary of the first current collecting portions adjacent to the first edge; and / or, a fifth separation region is provided between the inner boundary of the ring-shaped conductor layer adjacent to the first edge and a boundary of the second current collecting portions adjacent to the first edge; a width of the fourth separation region and / or the fifth separation region in the second direction is greater than the width of the first separation region in the first direction.

4. The solar cell according to claim 3, characterized in that, The ring-shaped conductor layer comprises a first ring-shaped conductor portion and a second ring-shaped conductor portion; the first ring-shaped conductor portion is in direct contact with the substrate, and the second ring-shaped conductor portion is not in direct contact with the substrate; the second ring-shaped conductor portion is located between the first ring-shaped conductor portion and the fourth separation region; or, the second ring-shaped conductor portion is located between the first ring-shaped conductor portion and the fifth separation region.

5. The solar cell of claim 3, wherein A doped semiconductor layer is provided between the ring-shaped conductor layer and the substrate.

6. The solar cell of claim 1, wherein The solar cell further comprises a grid line disposed on the current collecting layer; the grid line is located on the first current collecting portion and the second current collecting portion, respectively; a minimum distance between an end portion of the grid line adjacent to the first edge and the second separation region and / or the third separation region in the second direction is L1; a minimum distance between the grid line and the first separation region in the first direction is L2; L1 is greater than L2.

7. The solar cell according to claim 6, characterized in that, L1 is greater than or equal to 100 microns and less than or equal to 500 microns; L2 is greater than or equal to 50 microns and less than or equal to 400 microns.

8. The solar cell according to claim 1 or 6, characterized in that, The first surface further comprises a third edge located between the first edge and the second edge; one end of the third edge is connected to an end portion of the first edge through a first chamfer; the other end of the third edge is connected to an end portion of the second edge through a second chamfer; a boundary of the first current collecting portion adjacent to the first chamfer and / or the second chamfer is a chamfered edge; and / or, a boundary of the second current collecting portion adjacent to the first chamfer and / or the second chamfer is a chamfered edge.

9. The solar cell of claim 8, wherein, A length of the first current collecting portion adjacent to the first and second chamfers is less than a length of the rest of the first current collecting portion; and / or, a length of the second current collecting portion adjacent to the first and second chamfers is less than a length of the rest of the second current collecting portion.

10. The solar cell of claim 3, wherein The first surface of the substrate has a plurality of recessed regions arranged corresponding to the plurality of first current collecting portions respectively, and a plurality of flat regions arranged corresponding to the plurality of second current collecting portions respectively; Or, the first surface of the substrate has a plurality of recessed regions arranged corresponding to the plurality of first current collecting portions respectively, and a flat region arranged corresponding to the annular conductor layer respectively; Wherein, along a direction from the first surface to the second surface, the recessed regions are recessed compared to the flat regions; adjacent recessed regions and flat regions have inclined side walls.

11. The solar cell of claim 10, wherein, The recessed regions are formed with a first texture structure; the first texture structure comprises a pyramid type velvet structure; The flat regions are in the shape of a pyramid base.

12. The solar cell of claim 10, wherein, The inclined side walls are formed with a second texture structure; the second texture structure comprises a prism type structure; the prism type structure is inclined along a direction gradually approaching the flat region adjacent to the recessed region.

13. The solar cell of claim 12, wherein, The prism type structure has a pyramid at a top end away from the substrate, a top of the pyramid is lower than a surface of the flat region.

14. The solar cell of claim 3, wherein, The solar cell further comprises: a first doped semiconductor layer and a second doped semiconductor layer arranged on the first surface of the substrate; the first doped semiconductor layer and the second doped semiconductor layer have opposite conductive types; The first current collecting portion covers part of the first doped semiconductor layer; The first doped semiconductor layer has an overlapping portion extending to cover part of the second doped semiconductor layer; The second current collecting portion covers part of the overlapping portion and part of the second doped semiconductor layer.

15. The solar cell of claim 4, wherein, The solar cell further comprises: a first doped semiconductor layer and a second doped semiconductor layer arranged on the first surface, the second annular conductor portion and the substrate have a laminated structure of the second doped semiconductor layer and the first doped semiconductor layer; the first doped semiconductor layer and the second doped semiconductor layer have opposite conductive types.

16. The solar cell according to claim 14 or 15, characterized in that, The first doped semiconductor layer comprises a doped amorphous silicon layer and / or a doped microcrystalline silicon layer; the second doped semiconductor layer comprises a doped polycrystalline silicon layer.

17. The solar cell of claim 1, wherein, The width of the first isolation region in the first direction is greater than or equal to 40 microns and less than or equal to 80 microns.

18. The solar cell of claim 3, wherein, The width of the fourth isolation region in the second direction and the width of the fifth isolation region in the second direction are both greater than or equal to 80 microns and less than or equal to 200 microns; And / or, the width of the fourth isolation region in the second direction is equal to the width of the fifth isolation region in the second direction; And / or, the ratio of the width of the fourth isolation region in the second direction and / or the width of the fifth isolation region in the second direction to the width of the first isolation region in the first direction is greater than or equal to 1.5 and less than or equal to 3.

19. The solar cell of claim 14, wherein, The width of the overlapping portion along the first direction is greater than or equal to 60 microns and less than or equal to 140 microns.

20. The solar cell of claim 15, wherein, The width of the stack structure along the second direction is greater than or equal to 100 microns and less than or equal to 500 microns.

21. The solar cell of claim 4, wherein, The width of the second annular conductor portion along the second direction is greater than or equal to 50 microns and less than or equal to 400 microns.

22. The solar cell of claim 4, wherein, The height difference between the second current collecting portion and the first current collecting portion is greater than the height difference between the second annular conductor portion and the second current collecting portion. The height difference between the second annular conductor portion and the first current collecting portion is greater than the height difference between the second annular conductor portion and the second current collecting portion.

23. A method for preparing a solar cell, characterized in that, Comprising: providing a substrate, the substrate comprising opposite first and second surfaces; forming a current collecting layer on the first surface of the substrate; wherein the current collecting layer comprises a plurality of first current collecting portions and a plurality of second current collecting portions; the first current collecting portions and the second current collecting portions are arranged alternately and spacedly along a first direction and extend along a second direction, the first direction and the second direction being orthogonal; and a first separation region is between adjacent first current collecting portions and second current collecting portions; the first surface has a first edge and a second edge disposed oppositely along the second direction, a boundary of the first current collecting portion closest to the first edge has a second separation region from the first edge, and a boundary of the second current collecting portion closest to the first edge has a third separation region from the first edge; and the width of the second separation region and / or the third separation region in the second direction is greater than the width of the first separation region in the first direction.

24. The method of producing a solar cell according to claim 23, wherein The forming a current collecting layer on the first surface of the substrate comprises: forming a current collecting material layer on the first surface of the substrate; removing the current collecting material layer at positions corresponding to the first separation region to form the current collecting layer comprising a plurality of first current collecting portions and a plurality of second current collecting portions.

25. A photovoltaic module, characterized by, Comprising: a plurality of solar cells as claimed in any one of claims 1-22, or solar cells prepared by the method as claimed in claim 23 or 24; an encapsulation layer covering surfaces of the plurality of solar cells; a cover plate covering surfaces of the encapsulation layer away from the solar cells.

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