Semiconductor device with improved cooling as well as components and methods for achieving same

The semiconductor device design with a frame member and fluid-tight cavity addresses coolant access issues, enhancing cooling efficiency and reliability by minimizing edge hotspots and ensuring uniform heat transfer.

WO2026032723A1PCT designated stage Publication Date: 2026-02-12CORINTIS SA
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Patent Information

Application Number
PCT/EP2025/071256
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-06
Filing Date
2025-07-23
Publication Date
2026-02-12

AI Technical Summary

Technical Problem

Current semiconductor cooling solutions obstruct coolant access to the semiconductor die surface, leading to localized hotspots and inefficient heat transfer, particularly at the edges, which can compromise device performance and reliability.

Method used

A semiconductor device design featuring a frame member enclosing the die arrangement with a fluid-tight lid, a cavity for coolant access, and a sealant to ensure uniform cooling across the die surface, minimizing edge obstruction and enhancing thermal conductivity.

Benefits of technology

The design improves cooling efficiency by allowing coolant access to nearly the entire die surface, reducing temperature gradients and enhancing reliability under high-pressure conditions, while maintaining structural integrity and leak resistance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention concerns a semiconductor device (100), comprising: a substrate (12); a die arrangement (10) comprising at least one semiconductor die (66), the die arrangement (10) having an underside (14) facing the substrate (12) and an upper side (16) facing away from the substrate (12); a frame member (20) extending around the die arrangement (10) in a frame-like manner; a lid member (26) that is connected to the frame member (20) in a fluid-tight manner and a section of which faces towards the upper side (16) of the die arrangement (10); a cavity (30) in which a coolant is receivable to cool the die arrangement (10). The invention also concerns a frame member (20) for configuring such a semiconductor device (100) as well as methods manufacturing and operating such a semiconductor device (100).
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Description

[0001] Semiconductor Device with improved cooling as well as Components and

[0002] Methods for achieving same

[0003] The invention relates to the field of a semiconductor devices and in particular to the cooling of such semiconductor devices. More specifically, a semiconductor device is disclosed as well as a ring member for configuring such a semiconductor device as well as methods in connection with a semiconductor device.

[0004] Background

[0005] In semiconductor devices, heat management is a significant contributor to improving performance. Overheating of a semiconductor device typically negatively impacts device performance, efficiency and reliability: High temperatures lead to an increase in leakage currents, which result in power losses and an increase in sheet resistance due to self-heating degradation. Higher device temperature and temperature swings can be directly correlated to a reduction in the mean time before failure. In addition to silicon logic devices, such as central processing units (CPUs), graphics processing units (GPUs), tensor processing units (TPUs), field programmable gate arrays (FPGAs) and other application-specific integrated circuits (ASICs), this trend of rising heat fluxes and their negative impact on performance and reliability also holds for power electronic, optoelectronics and RF electronics, on silicon and other semiconductors such as GaAs, SiC, GaN, etc. Any of these examples are exemplary embodiments and can use cases of a semiconductor device disclosed herein.

[0006] Direct contact of a liquid coolant with a semiconductor die of a semiconductor device can enhance heat extraction. This typically requires providing a leak-proof package around the die. A common benchmark is burst pressure, with semiconductor devices needing to withstand at least five times to ten times the operational pressure, typically up to 1 bar, thus requiring a burst pressure of at least 10 bar. The device must also endure extensive thermal cycling and contain leaks to prevent damage to surrounding equipment.

[0007] Current solutions often use a semiconductor die's top surface to seal with a coolantproviding lid, requiring a wide contact area (at least 0.25 mm, ideally 1 mm).

[0008] The present application seeks to further improve the cooling of semiconductor devices

[0009] July 23, 2025 1 / 31 CR0005P-WQ compared to what is presently achievable by known solutions.

[0010] Details of invention

[0011] This object is achieved by the subject matter of the independent claims. Advantageous embodiments are defined in the dependent claims, in this description and in the Figures.

[0012] An observation underlying the present invention is that the above-mentioned contact areas of the known solutions tend to locally obstruct a cooling medium from accessing a surface of a semiconductor die. Specifically, it has been observed that such an obstruction may create potential hotspots close to the edges of a semiconductor die. In order to improve cooling, an access to the entire die surface would be ideal to limit such hotspots, especially at the edges of GPU / CPU architectures. If cooling is hindered in the above explained manner, a 1 D heat transfer problem can express the temperature rise at the respectively uncooled edges. The temperature rise (dT) is calculated as dT = ql2 / 2kh, where q is heat flux, k is thermal conductivity, h is die thickness, and I is edge length. For a heat flux of 100 W / cm2, a 1 mm edge (in particular an edge width), a die thickness of 0.5 mm, and thermal conductivity of 130 W / mK, the temperature rise is 7.7°C for a 1 mm edge and 17°C for a 1 .5 mm edge. Minimizing the temperature rise to less than 1 °C would require that the uncooled edge becomes less than 0.4 mm wide. However, a gasket or adhesive that is under 1 mm wide and that would still enable the lid-die-connections known from the prior art becomes unreliable at high pressures of the cooling fluid.

[0013] To address these issues, a semiconductor device is disclosed, e.g. a GPU (Graphics Processing Unit) or CPU (central processing unit), the device comprising: a substrate, e.g. a PCB (printed circuit board); a die arrangement comprising at least one semiconductor die, the die arrangement having an underside facing the substrate and an upper side facing away from the substrate; a frame member extending around the die arrangement in a frame-like manner; a lid member that is connected to the frame member in a fluid-tight manner and a section of which faces towards the upper side of the die arrangement; and a cavity in which a coolant is receivable to cool the die arrangement.

[0014] Terms such as liquid, fluid, coolant may be used interchangeably in the following. They

[0015] July 23, 2025 2 / 31 CR0005P-WQ may each refer to the fluid that is received in and / or guided and in particular pumped through the cavity for achieving a cooling of the die arrangement.

[0016] The frame member may e.g. enclose or encircle an outer circumference of the die arrangement and / or extend around the die arrangement when viewed from above and looking at its upper side. The frame member may have an opening, in particular formed by a through-hole, in which the semiconductor die is arranged. The frame member may have a ring-shape, wherein this is not limited to circular shapes, but may e.g. also include rectangular or polygonal shapes. In consequence, the frame member may also be referred to as a ring member.

[0017] The frame member may comprise or consist of e.g. a metallic material or a polymer. Nonlimiting examples of metals include stainless steel, copper, nickel or nickel alloys, chromium or titanium. Non-limiting examples of polymers include EPDM (Ethylene Propylene Diene Monomer), FKM (Fluoroelastomer, such as Viton A, Viton GF, Viton ETP), FEP (Fluorinated Ethylene Propylene), PTFE (Polytetrafluoroethylene), Polypropylene, Polyvinylidene fluoride or polyvinylidene difluoride, Ethylene propylene rubber, Polyethylene, Acrylonitrile butadiene rubber, polysulfone, high-density polyethylene, Polytetrafluoroethylene polypropylene copolymer, Perfluoro alkoxy alkanes, Polyphenylene Sulfide e.g. with added glass fibers, polyphenylene oxide, polyphenylsulfone or polyether ether ketone.

[0018] The cavity can comprise a number of fluidically connected sections, e.g. forming a sequence and / or network of hollow spaces within the semiconductor device. In at least a first section of the cavity, the fluid is preferably in direct contact with the die. An optional section of the cavity formed in the frame member and / or the first lid member may define a fluid inlet and / or fluid outlet for guiding fluid to and from said first section of the cavity, respectively.

[0019] According to an embodiment, at least a section of the cavity is formed in the frame member and / or in the lid member. This increases the available degrees of freedom for guiding coolant to and away from the die arrangement.

[0020] According to an embodiment, the fluid-tight connection between the frame member and the lid member comprises an O-ring and / or another seal member, in particular a ring - shaped seal member. Generally, the fluid tightness may be upheld at least up to a

[0021] July 23, 2025 3 / 31 CR0005P-WQ defined threshold of an internal pressure (absolute pressure), e.g. up to at least 1 bar, 2 bar, 5 bar, 7 bar or 10 bar. The fluid tight connection may form one of a plurality of fluid tight sealing barriers as is further disclosed in the following. The frame member and the lid member may be clamped or maybe otherwise mechanically secured to one another, while pressing the seal member in between them. Additionally or alternatively, the frame member and the lid member may be adhered to one another under a mechanical pressure with the seal member being received in between them.

[0022] Additionally or alternatively, the frame member is connected to the substrate in a fluid- tight manner. This connection may form another fluid-tight barrier decreasing the risk of fluid leaking out of the cavity.

[0023] The fluid tight connection between the frame member and the substrate may comprise an O-ring or another seal member, in particular a ring-shaped seal member. The frame member and substrate may e.g. be connected to one another according to one of the examples described above in connection with the fluid tight connection between the frame member and the lid member.

[0024] According to an embodiment, a space between the frame member and the die arrangement is at least partially filled with a sealant. The space can e.g. extend in between an outer circumferential face of the die arrangement and an inner circumferential face of the frame member. The outer circumferential face of the die arrangement may connect the underside and the upper side of the die. Accordingly, the space may have a frame- or ring-type shape.

[0025] The sealant may increase fluid tightness. It may fill the space, e.g. at least up to a certain height, thereby closing a gap between the frame member and the die arrangement as defined by the space. It can e.g. comprise silicone or epoxy or another kind of adhesive that can be dispensed and cured in place. Further alternatively, it can be a silicone paste sealant that is compatible with the cooling fluid, an EPDM (Ethylene Propylene Diene Monomer) expanded foam or ePTFE (expanded PTFE, Polytetrafluoroethylene). Further alternatively, it can comprise an epoxy material or any of the polymer materials listed above in connection with the frame member. Further alternatively, the sealant may be a compressible foam that creates a leak-tight seal, in particular a closed-cell foam. Generally, the sealant may comprise or be made of a

[0026] July 23, 2025 4 / 31 different material then at least the substrate and / or the frame member.

[0027] In one embodiment, the sealant contacts the substrate. For example, it may contact each of the substrate, the frame member and the semiconductor die, thereby improving fluid tightness.

[0028] According to one example, the upper side of the die arrangement is unobstructed by the frame member, i.e. is obstructed in 0% of its area, or is at most obstructed in up to 20 % of its area, or at most obstructed in up to 10 % of its area or at most obstructed in up to 7 % of its area, or at most obstructed in up to 5 % of its area. In other words, the upper side of the die arrangement can be fully uncovered by the frame member or the frame member may not overlap said upper side. Alternatively, the upper side of the die arrangement may at most be covered in up to 20% of its area (or at most 10% or at most 7% or at most 5%) by the frame member or, in other words, the frame member may only overlap the upper side of the die arrangement in e.g. up to 20%, up to 10 %, up to 7% or up to 5% of said upper side’s area. This means that the entire or at least the vast majority of the surface area of said upper side is accessible by the coolant. This may in particular apply to outer edge regions of said upper side. In cases in which the upper sider of the die arrangement is fully uncovered by the frame member, the frame member can be spaced from the upper side of the die arrangement, while being arranged at the same level. Thus, at the level of the upper side of the die arrangement a surrounding free space can be formed which can be considered or can constitute an additional upper side free space accessible by the coolant. The additional upper side free space area can be less than 10 % of the area of the upper side of the die arrangement, or less than 8 % thereof, or less than 5 % thereof, or less than 3 % thereof. In an embodiment, the upper side of the die arrangement is at most obstructed in up to 20 % of its area and has an upper side free space of less than 10 % of the area of the upper side of the die arrangement, or at most obstructed in up to 10 % of its area and has an upper side free space of less than 8 % of the area of the upper side of the die arrangement, or at most obstructed in up to 7 % of its area and has an upper side free space of less than 5 % of the area of the upper side of the die arrangement, or at most obstructed in up to 5 % of its area and has an upper side free space of less than 3 % of the area of the upper side of the die arrangement, or is unobstructed by the frame member, i.e. is obstructed in 0% of its area, and has no upper side free space,

[0029] July 23, 2025 5 / 31 i.e. 0 % of the area of the upper side of the die arrangement. Free space can be filled with sealant.

[0030] By such arrangements the effective surface that is accessible by coolant can be substantially extended compared to known prior art assemblies. By this, cooling capacity can be increased.

[0031] The above may also apply in cases where the die arrangement comprises a plurality of separate semiconductor dies, i.e. a set of dies as detailed below. In such a case, the upper side may comprise the upper sides of said respective plurality. This may in particular also include the upper sides of those semiconductor dies that comprise and form outer edge regions of the entire die arrangement.

[0032] In one example, the frame member may entirely remain at a distance to the die arrangement. The cavity may have a lower side that includes and / or that is at least partially bounded by the upper side of the die arrangement. This lower side of the cavity may also at least partially the delimited by the frame member. In one example, a surface area of said lower side is larger than the upper side of the die arrangement, in other words, the upper side of the die arrangement and a section of the frame member may jointly define a surface area which delimits the cavity.

[0033] This means that close to the upper side of the die arrangement, cooling fluid may be present that does not come into immediate contact with the upper side. This cooling fluid may remain in regions of the surface area of the above-discussed lower side extending beyond and / or outside of the upper side of the die arrangement. Such a volume of cooling fluid may act as a reservoir of cooling fluid directly adjacent to the upper side of the die arrangement. Additionally or alternatively, the extended surface area may provide a space for positioning a gasket or another seal member close to the upper side of the die arrangement, in particular without overlapping with and / or obstructing said upper side.

[0034] According to a further example, an average width of an outer edge region of the upper side of the die arrangement that is obstructed, preferably by the frame member, is less than 1 mm and in particular less than 0.05 mm. It may be 0 mm. The width may be measured orthogonally to an outer circumferential face of the die arrangement and / or orthogonally to and inner circumferential face of the frame member. To improve

[0035] July 23, 2025 6 / 31 uniformity of cooling, the width may be substantially constant along all edges of the upper side or, in other words, within the entire outer edge region.

[0036] According to a further example, the die arrangement has an outer circumferential face connecting the upper side and the underside and defining an outer boundary of the die arrangement. The outer circumferential face of the die arrangement may face towards an inner circumferential face of the frame member. Additionally or alternatively, the outer circumferential face of the die arrangement may contact a sealant that also contacts the substrate and / or the frame member. Any of these examples may define structural relative arrangements between the devices components that help to improve sealing.

[0037] According to a further embodiment the die arrangement extends in a cross-sectional volume of the semiconductor device and comprises all semiconductor components and / or all semiconductor materials within said cross-sectional volume. The crosssection may e.g. extend and parallel to the upper side of the semiconductor device and parallel to the lid and / or in parallel to the substrate. In other words, this embodiment may include that the die arrangement is the only semiconductor entity within the semiconductor device. Additionally or alternatively, the die arrangement may be the only die arrangement of the semiconductor device.

[0038] In one example, the die arrangement and / or the semiconductor device as a whole comprises only a single semiconductor die. Alternatively, the die arrangement may comprise a set of semiconductor dies. Put differently, it may be sub-divided into and / or formed out of a plurality of e.g. functionally and / or structurally separate dies, such as in the form of plural chiplets.

[0039] In one embodiment, the frame member comprises a region adjacent to the die arrangement and that is flush with the upper side of the die arrangement. This may result in the definition of a joint and / or extended surface area as discussed above. In one embodiment, the adjacent region and the upper side can form a common and in particular a continuous surface area, so that there may be no or at least not a substantial gap between said adjacent region and the upper side. For example, according to one embodiment at least a section of said adjacent region contacts or abuts the die arrangement. This may be advantageous for various reasons, such as

[0040] July 23, 2025 7 / 31 improving fluid tightness between the adjacent region and upper side, enabling a heat transfer from the upper side to the adjacent region or generally improving compactness of the overall device.

[0041] According to a further example, the frame member has an inner circumferential face facing an outer circumferential face of the die arrangement, wherein a first section of said inner circumferential face contacts or abuts or is closer to the die arrangement (i.e. closer than the below second section), preferably the outer circumferential face of the die arrangement, and wherein a second section of said inner circumferential face remains at a distance to said outer circumferential face of the die arrangement. This way, a space of the above defined kind may be defined in between the die arrangement in the frame member in which e.g. a sealant can be received. This sealant may at least partially be covered by the first section of the inner circumferential face which may help to improve protection of the sealant e.g. from the coolant. The first section of the inner circumferential face is an example of the above-discussed adjacent region.

[0042] In one embodiment, the frame member has an inner circumferential face facing an outer circumferential face of the die arrangement, wherein at least a portion of the inner circumferential face is angled relative to and in particular angled towards the outer circumferential face of the die arrangement. For example, this portion may be slanted and / or define a taper. This may help to improve structural integrity of in particular the first section of the inner circumferential face of the frame member.

[0043] In one example, the frame member has a first region that is connected to the substrate and a second region that faces towards the substrate but is arranged at a distance thereto. This way, a space in between the frame member and the substrate may be defined, in particular wherein said space is at least partially enclosed by the frame member. This space may e.g. be used to receive and / or protect a sealant. Additionally or alternatively, this space may be used as follows: The semiconductor device may further comprises at least one electronic component, preferably a SMD (surfacemounted device), at least a part of which is arranged in between the second region of the frame member and the substrate. Given that the frame member may generally be a stiff member, it may thus provide structural protection for said electronic component.

[0044] Additionally or alternatively, the above-discussed second region of the frame member

[0045] July 23, 2025 8 / 31 may rest against a supporting member that is supported by the substrate. This may help to prevent bending of the frame member and in particular of its second section, thus improving rigidity of the overall device. The supporting member may also be referred to and / or may be configured as a stiffener ring. It may have a ring-shaped or frame-like design. Accordingly, it may surround at least a section of an outer circumference of the frame member and / or enclose part of the frame member. Any of the frame member and the semiconductor device may be received in an opening and / or in a free space within the supporting member.

[0046] According to a further example, the second region and the supporting member are connected in a fluid-tight manner, wherein this fluid-tight connection comprises an 0- ring and / or another seal member. This way, a further barrier against coolant leaking out of the device may be defined.

[0047] According to a further example, the cavity comprises at least one section configured to guide coolant so that it impinges at least partially on the upper side of the die arrangement. Additionally or alternatively, the cavity may comprise a free space, such as a gap, above the upper side of the die arrangement. Coolant may be guided through a section of the cavity and into said free space, so as to in particular directly impinge on the upper side of the die arrangement. This may reduce the length of a fluid path of the coolant until reaching the die arrangement, thereby improving cooling efficiency.

[0048] According to a further example, the cavity comprises at least one section configured to guide coolant towards the semiconductor die, e.g. an inlet, and at least one section configured to guide coolant away from the semiconductor die, e.g. an outlet, at least one of the inlet and the outlet may be located at a distance to an outer edge region of the upper side of the die arrangement of less than 10 mm and in particular of less than 0,01 mm. This may e.g. concern a shortest distance between the respective sections and an adjacent portion of the edge region. Put differently, the inlet and / or the outlet may be positioned close to outer edges of the upper side of the die arrangement, so as to guide coolant in close proximity to or directly towards and / or along said outer edges. From there, the coolant may e.g. continue to flow along the upper side of the semiconductor device and / or into internal channels comprised by the semiconductor device.

[0049] July 23, 2025 9 / 31 In one embodiment, at least one section of the cavity is formed in the die arrangement. This section may also be referred to and / or may be configured as a coolant channel within the die arrangement, in particular an internal coolant channel. Accordingly, coolant may enter into the die arrangement, e.g. instead of and / or in addition to impinging on the upper side, to promote internal cooling of the die arrangement. An inlet of the at least one section may be located at a distance to an outer edge of the upper side of the die arrangement of less than 10 mm and in particular of less than 0,01 mm. This may e.g. concern a shortest distance between an outer circumference of the opening and an adjacent portion of the edge region.

[0050] In one embodiment, the semiconductor device further comprises a first inner lid member that has a first side that faces towards and in particular contacts or abuts the upper side of the die arrangement and a second side that faces towards and in particular contacts or abuts the lid member.

[0051] In this context, the first inner lid member may comprise and / or may define at least a section of the cavity, in particular wherein said section fluidically connects one section of the cavity formed in the lid member and another section of the cavity formed in the die arrangement. Put differently, coolant channels may extend through and / or across the inner lid member, said coolant channels forming part of the cavity.

[0052] Inlets and / or outlets can in this case be positioned close to edges of the die, which allows positioning cooling channels inside the die close to the edges, too, while still being reliably supplied with coolant. In other words, such a configuration allows cooling and accessing channels at the edges of the die arrangement. This can be advantageous to address hot spots located close to the edges and thus improves cooling in a reliable way.

[0053] In one embodiment, the first inner lid member is configured to fluidically seal the cavity with respect to the sealant between the die arrangement and the frame member. This may help to improve longevity of the sealant.

[0054] In one embodiment, the semiconductor device comprises second inner lid member that has a first side that faces towards and in particular contacts or abuts the upper side of the die arrangement and a second side that faces towards and in particular contacts or abuts the lid member, wherein the first inner lid member is received in a cut-out in the

[0055] July 23, 2025 10 / 31 second inner lid member, in other words, the second inner lid member may have an opening which it encloses e.g. in a frame-or ring-like manner. The first inner lid member, which may e.g. be a substantially massive plate-shaped member, may be received and / or inserted into said opening.

[0056] In connection with the above embodiment comprising a first and second inner lid member, at least one of the following may further be provided:

[0057] • the first and / or second inner lid member is a gasket;

[0058] • the second inner lid member defines and / or comprises at least a section of the cavity, in particular wherein said section fluidical ly connects one section of the cavity formed in the lid member and another section of the cavity formed in the die arrangement. Put differently, the section may be a cooling channel extending through the second inner lid member;

[0059] • the second inner lid member is free of any section of the cavity. Put differently, no coolant may be guided through any channels in the second inner lid member;

[0060] • the first inner lid member is made from a more rigid material compared to the second inner lid member, in particular wherein the rigidity of the first inner lid member is closer to the rigidity of the frame member and / or the lid member than to the rigidity of the second inner lid member. The rigidity may e.g. be quantified as an elastic modulus. In one example, the second inner lid member may be at least 1 ,5 or at least twice as rigid as the first in a lid member.

[0061] • the second inner lid member surrounds the second inner lid member in a framelike manner;

[0062] • the second inner lid member contacts the frame member;

[0063] • the first inner lid member remains at a distance to the frame member.

[0064] • the first inner lid member and / or the second inner lid member extend laterally beyond the upper side of the die arrangement.

[0065] Any of the above-listed examples may help to improve fluid tightness and / or cooling efficiency.

[0066] In one more precise example, the coolant passes along the interfaces between the gasket and die / hard roof to reach the channels in the die, but not necessarily through some channel formed in the gasket. Thus, fresh coolant can be fed straight to the channels etched inside the die. In an example comprising an arrangement with chiplets

[0067] July 23, 2025 11 / 31 and a die, when coolant is directly fed to the chiplets first, then by means of the gasket cutout and its shape exit flow can be guided from the chiplets and towards the inlet of the die. Then the outlet flow from the die can exit the gasket and can be collected by an injection head or the top lid.

[0068] The invention also concerns a semiconductor device, comprising: a substrate; a die arrangement having an underside facing the substrate and an upper side facing away from the substrate; a receiving space in which the die arrangement is accommodated so that an upper side of the die arrangement is fully unobstructed in the receiving space, or at most obstructed in up to 10 % of its area or at most obstructed in up to 5 % of its area, wherein a coolant for cooling the die arrangement is receivable in the receiving space. This semiconductor device may comprise any of the further features discussed in connection with the previous semiconductor device of this invention.

[0069] Receiving coolant in the receiving space may e.g. include receiving coolant in a section of the receiving space that remains as a free space above the upper side of the die arrangement. Additionally or alternatively, receiving coolant in the receiving space may e.g. include receiving coolant in inner channels of the die arrangement, wherein the die arrangement as such and thereby the inner channels are located in the receiving space

[0070] The invention also concerns a semiconductor device, comprising: a substrate; a die arrangement having an underside facing the substrate and an upper side facing away from the substrate; a receiving space in which the die arrangement is accommodated so that an upper side of the die arrangement is fully unobstructed in the receiving space, or at most obstructed in up to 10 % of its area or at most obstructed in up to 5 % of its area, in particular wherein a coolant for cooling the die arrangement is receivable in the receiving space, and wherein at least one of the following is further provided:

[0071] • The receiving space is configured to remain fluid-tight with respect to fluid pressures of the coolant of at least 1 bar and in particular of at least 5 bar or at least 10 bar. This may also hold true in connection with the initially described semiconductor devices or with respect to any semiconductor devices of this

[0072] July 23, 2025 12 / 31 invention;

[0073] • An average width of an outer edge region of the upper side of the die arrangement that is obstructed is smaller than 1 mm and in particular smaller than 0.05 mm. Similar to above, the width may be measured orthogonally to an outer circumferential face of the die arrangement;

[0074] • The die arrangement comprises at least one cooling channel, wherein an inlet of said cooling channel is located at a distance to an outer edge region of the upper side of the die arrangement of less than 20 mm and in particular of less than 10 mm or less than 5 mm;

[0075] • The semiconductor device is configured to directly extract heat from at least a portion of an outer edge region of the upper side of the die arrangement. This may include a capability of bringing the coolant into direct contact with said outer edge region. As a general aspect of this disclosure, said outer edge region may represent and / or include an outermost edge and / or an outermost boundary of the upper side of the die arrangement.

[0076] The semiconductor device may comprise any of the further features discussed in connection with the initially defined semiconductor device always any other semiconductor device of this invention.

[0077] The semiconductor devices according to any of the aspects disclosed herein may generally be accessible for maintenance and / or repair. In other words, the semiconductor devices may be reworkable. This may include a capability of being opened and / or disassembled and / or the die arrangement being accessible. This may be possible without destruction of the semiconductor device and / or with the semiconductor device being capable of being fully reassembled and reusable once the maintenance and / or repair has been completed. The maintenance and / or repair may e.g. include checking on and / or replacing and / or reworking any of the sealants and / or fluid tight connections disclosed herein.

[0078] The invention also concerns a frame member for configuring a semiconductor device according to any aspects disclosed herein. This frame member may comprise any of the features discussed above e.g. in connection with the initially discussed semiconductor device of this invention (i.e. the semiconductor device of claim 1 and the related dependent claims).

[0079] July 23, 2025 13 / 31 The invention also concerns a method for manufacturing a semiconductor device, the method comprising: arranging a die arrangement comprising at least one semiconductor die, so that an underside of the die arrangement faces a substrate and an upper side of the die arrangement faces away from the substrate; arranging a frame member so as to extend around the die arrangement in a framelike manner; connecting a lid member to the frame member in a fluid-tight manner and so that a section of the lid member faces towards the upper side of the die arrangement and further so that a cavity is created in which a coolant is receivable to cool the die arrangement.

[0080] The invention also concerns a method for operating a semiconductor device according to any of the aspects disclosed herein, the method comprising at least one of:

[0081] • guiding coolant inside the cavity so that it contacts at least 90 % of the upper side’s area of the die arrangement or at least 95 % of said the upper side’s area. In one example, the coolant may contact the entire area of the upper side and / or even adjacent regions of the frame member or of other adjacent components. This may also be described as the coolant contacting more than 100% of the upper side’s area. Coolant can, in addition to the upper side’s surface area, contact free space around the upper side surface area of the die arrangement (i.e. the upper side free space area).

[0082] • guiding coolant inside the cavity so that it contacts the upper side of the die arrangement in at least one region that this spaced apart from an outer edge of said upper side by at most 1 mm and in particular by at most 0.05 mm.

[0083] The methods may comprise any further features to manufacture or operate a semiconductor device according to any of the aspects disclosed herein. Any examples of and discussions on features of the semiconductor devices may equally apply to the related features of the methods.

[0084] July 23, 2025 14 / 31

[0085] Exemplary embodiments of the invention will be discussed in the following with reference to the attached schematic figures. Same features may be assigned same reference signs throughout the figures.

[0086] Figure 1 shows a partial configuration of a semiconductor device according to an embodiment of this invention.

[0087] Figures 2a-e each show a part of a semiconductor device according to various embodiments of the invention and especially show various configurations of a frame member.

[0088] Figures 3a-j each show a part of a semiconductor device according to further embodiments of the invention.

[0089] Figures 4a-d each show a part of a semiconductor device according to further embodiments of the invention, partially with showing various configurations of an inner lid member.

[0090] Figures 5a-e each show a semiconductor device according to further embodiments of the invention.

[0091] Figures 6a-b show a semiconductor device according to a further embodiment of the invention in a partially assembled (Figure 6a) and in a fully assembled state (Figure 6b).

[0092] Examples

[0093] Figure 1 shows a basic configuration of a die arrangement 10 being disposed on an upper surface of a substrate 12, wherein this configuration can be integrated into and / or can be comprised by a semiconductor device according to embodiments of this invention. Figure 1 , much like the remaining Figures in this disclosure, can be understood to represent a sectional view. A sectional plane may extend orthogonally to the upper surface of the substrate 12 and / or through a geometric center of the die arrangement 10.

[0094] July 23, 2025 15 / 31 The die arrangement 10 may comprise or be made of e.g. silicon. It has an upper side facing 16 away from the substrate 12 and a lower side 14, also referred to as an underside, facing towards the substrate 12. The upper side 16 and the lower side 14 extend parallel to one another and / or parallel to an upper surface of the substrate 12 on which the die arrangement 10 is arranged. The upper side 16 and the lower side 14 are connected by a circumferential face 18 of the die arrangement 10. The circumferential face 18 extends at an angle to the substrate 12 and in particular orthogonally thereto. The shape of the die arrangement 10 is not limited. It may e.g. be formed as a rectangular block.

[0095] In the following, reference is briefly made to Figure 5A in order to discuss further components of a semiconductor device 100 according to an exemplary embodiment. This embodiment comprises the basic configuration of Figure 1 . In Figure 5A, the substrate 12 and the die arrangement 10 can again be seen. Further, a frame member 20 is shown which encloses a space 21 together with part of the upper surface of the substrate 12 and the circumferential face 18 of the die arrangement 10. This space 21 can accommodate the below-discussed meniscus as well as a sealant 24 which defines a first fluid tight barrier. This will be discussed in further detail below.

[0096] The semiconductor device 10 further comprises a lid 26 as well as a fluid tight connection 28 between the frame member 20 and the lid 26. The frame member 20, the lid 26 and the upper surface of the substrate 12 delimit a receiving space 35 of the semiconductor device 100 in which the die arrangement 10 is received. The semiconductor device 100 also comprises a cavity 30 in which a liquid coolant can be received. In the exemplary embodiment of Figure 5A, sections of said cavity 30 extend along the upper side 16 of the die arrangement 10. Further, an inlet section 31 and an outlet section 33 extend through the lid member 26 and join the section of the cavity 30 extending along the upper side 16 of the die arrangement 10. Accordingly, coolant can be guided to the semiconductor device 100 via the inlet 31 , stream along the upper side 16 of the die arrangement 10 while extracting heat therefrom and stream out of the semiconductor device 10 via the outlet 33. Further details on and embodiments of this concept as well as on the example of Figure 5A are discussed here below.

[0097] Figure 5a also includes a height axis H. In one example, the semiconductor device 100 may be configured with rotational symmetry about said height axis H, e.g. apart from the

[0098] July 23, 2025 16 / 31 below discussed SMDs 58. Alternatively, there may be at least one non-illustrated plane of symmetry comprising said height axis H and in particular at least two such planes.

[0099] Referring back to Figure 1 , the die arrangement 10 is typically attached to the substrate 12 using non-illustrated solder bumps. In order to protect these solder bumps, e.g. from coolant or other influences, an underfill epoxy 13 is optionally dispensed to fill up the voids between the die arrangement 10 and the substrate 2. The dispensing of the underfill epoxy 13 creates a meniscus to which the reference sign 13 points in Figure 1. The meniscus can vary from device to device depending on the processing conditions. The meniscus may generally define a curved and / or a concave surface. It may form an obstacle that prevents cooling structures from being arranged in direct contact with the outer circumferential face 18 of the die arrangement 10.

[0100] Figures 2a-e are partial views of semiconductor devices 100 according to embodiments of the invention. In each of these Figures, a different configuration of a frame member 20 is shown. Referring to Figure 2A, the frame member 20, which is a rigid metallic member or a rigid plastic member, is attached to the upper surface of the substrate 12. A first face or an underside 36 (in Figure 2a a lower face) of the frame member 20 is attached to the substrate 12, e.g. via solder bumps or an adhesive. An upper second face 38 faces away from the upper surface of the substrate 12. An O-ring groove 40 is disposed in said second face 38. The O-ring groove 40 is configured to receive a non-illustrated O-ring full ceiling against the non-illustrated lid 26 (see Figure 5a). The O-ring groove 40 has a closed circumference, e.g. resembling a circumferential shape of the die arrangement 10.

[0101] The frame member 20 further comprises an outer circumferential face 42 facing away from the die arrangement 10 and an inner circumferential face 44 facing the die arrangement 10 and specifically its outer circumferential face 18. The frame member 20 generally encloses the outer circumferential face 18 or, in other words, extends along all outer circumferential sides of the semiconductor device 10. For example, the frame member 20 has a central opening 46 about which the frame member 20 extends in a ring-or frame-like manner. The die arrangement 10 may at least partially be received in said opening 46. The opening 46 may be closed by the upper surface of the substrate 12 on one side, see Figure 2a.

[0102] July 23, 2025 17 / 31 The inner circumferential face 44 of the frame member 20 has a first section 48 and a second section 50. The first section 48 is closer to the outer circumferential face 18 of the die arrangement 10 then the second section 50. The respective distances may be measured in a plane extending in parallel to the upper surface of the substrate 12 and / or orthogonally to the height axis H depicted in Figure 5A. In consequence, the space 21 as explained with reference to Figure 5A is defined in which a sealant 22 according to any of the previously disclosed examples is received.

[0103] The sealant 22 creates a first fluid tight barrier. It e.g. prevents liquid form entering the space 21 in between the die arrangement 10 and the upper surface of the substrate 12. Also, it prevents liquid from leaking along the underside 36 of the frame member 20. Providing this sealant 22 also takes into account that the previously explained meniscus of the underfill epoxy 13 (see Figure 1 ) obstructs a direct contact between the frame member 20 and die arrangement 10 at least in a lower section of the die’s outer circumferential face 18.

[0104] In Figure 2a, the frame member 20 does not overlap with an upper side 16 of the die arrangement 10. In other words, set upper side 16 is fully unobstructed by the frame member 10. As will be discussed with respect to the following figures, said upper side 16 is also not covered and / or obstructed by any other components, but is fully accessible by a coolant. This improves cooling efficiency and reduces a risk of local heat spots along said upper side 16. Moreover, it enables a significant and particular a direct cooling via a direct contact with a coolant in outer edge regions 17 of the upper side 16. These outer edge regions 17 may form an outer boundary and / or a circumference of the upper side 16. In particular, they may form a boundary between the upper side 16 and the circumferential face 18.

[0105] Further, it is noted that the upper side 16 of the die arrangement 10 is not flush with the upper side 38 of the frame member 20. In particular when viewed along the nonillustrated height axis H (see Figure 5a), said upper side 16 is somewhat retracted and / or lowered compared to the upper side 38 of the frame member 20. This creates a free space above and along the upper side 16 of the die arrangement 10 in which, for example, coolant can be received.

[0106] Figure 2b shows a further embodiment of the frame member 20, wherein the frame

[0107] July 23, 2025 18 / 31 member 20 partially overlaps with the outer edge regions 17 of the die’s upper side 16. This is implemented by the first section 48 of the inner circumferential face 44 of the frame member 20 extending over and / or opposite to said outer edge regions 17. Yet, the extent of the overlap, i.e. a width W of a covered outer edge region 17, can be reduced to any of the previously disclosed dimensions.

[0108] Figure 2c shows a further embodiment of the frame member 20, wherein the first section 48 of the inner circumferential face 44 of the frame member 20 is adjacent to and / or in contact with upper part of the outer circumferential face 18 of the die arrangement 10. Further, the upper side 38 of the frame member 20 comprises an adjacent region 40 (i.e. adjacent to the die arrangement 10 and in particular to its upper side 16) which is flush with the upper side 16. This adjacent region 40 can be the part of a cavity 30 as e.g. explained with respect to in Figure 5a and in which coolant can be received. Specifically, this adjacent region 40 may delimit a volume of the cavity 30 in which coolant can be received and / or may provide a surface area for supporting a gasket or the like.

[0109] For example, a non-illustrated gasket can be placed on said adjacent region 40 without obstructing the outer edge regions 17 of the die’s upper side 16. The adjacent region 40 may e.g. be dimensioned as to fully support a minimum wall thickness of a respective gasket, i.e. may have a width that is at least as large as said minimum wall thickness. The minimum wall thickness may be defined by a ability to achieve a threshold burst pressure. The gasket may generally serve to define a further fluid tight barrier in close proximity to the cavity 30 and / or directly bounding part of said cavity 30.

[0110] Figure 2d shows a further embodiment of the frame member 20 whose inner circumferential face 44 is tapered or, with other words, is angled or slanted towards the die’s outer circumferential face 18. In this case, the first section 48 is supported by a larger volume of material of the frame member 20 compared to the previous figures. This increases structural integrity.

[0111] In Figure 2e, a further embodiment of the frame member 20 is shown in which the inner circumferential face 44 remains at a constant distance to the die’s outer circumferential face 18. This means that the space 21 between the frame member 20 and die arrangement 10 and more specifically between the respective inner circumferential face

[0112] July 23, 2025 19 / 31 CR0005P-WQ

[0113] 44 and die’s outer circumferential face 18 is no longer covered by the frame member 20. Instead, this space 21 is exposed which may also be referred to as and / or may result in an exposed gap. A sealant 22 in the space 21 is flush with the upper side 16 of the die arrangement 10. This can e.g. be done by dispensing a liquid sealant and scraping the residue using a tool before curing.

[0114] Further embodiments of in particular the frame member 20 are discussed in the following with respect to Figures 3a-j. Figure 3a resembles the basic configuration of Figure 1. Figure 3b resembles the configuration of Figure 2a wherein an additional fluid tight connection is formed between the underside 36 of the frame member 20 and the upper surface of the substrate 12. In the shown example, an O-ring groove 54 is defined in and along said underside 36 and receives an O-ring 56. This O-ring 56 contacts and seals against the upper surface of substrate 12 to define a further fluid tight barrier, in particular in addition to the sealant 22.

[0115] Figure 3c is a view for explaining the possibility to position one or more surface mounted devices (SMD) 58 adjacent to the die arrangement 10. Examples for SMDs can be Intel Xeon 8370C, AMD MI250s GPU, A100 Nvidia GPU, or GH200 Nvidia.

[0116] Figure 3d adds a frame member 20 according to a further embodiment to the configuration of Figure 3c. This frame member 20 again defines a space 21 for receiving a sealant 22 and generally encloses and partially shields the die arrangement 10 from the surroundings. Further, it comprises a first region 60 that is connected to the upper surface of the substrate 12 and a second region 62 that remains at a distance to the substrate 12. The second region 62 may be defined by an / or may result from providing a recess in the underside 36 of the frame member 20. The distance between the second region 62 and the substrate 12 may in particular extend orthogonally to the upper surface of the substrate 12 and / or along the height axis H as depicted in Figure 5a. Differently put, the second region 62 may be lifted further away from the substrate 12 than the first region 60. Also, the second region 62 is positioned at a greater distance to the die arrangement 10 and in particular faces away therefrom compared to the first region 60. Still further, the first region 60 may be in contact with the sealant 22, whereas the second region 22 is located at a distance from and / or faces away from the sealant 22. As a result of this arrangement, a free space 64 is defined below of the second region 62 and specifically in between said second region 62 and

[0117] July 23, 2025 20 / 31 the upper surface of the substrate 12. The surface mounted devices 58 are received in said space 64. They are thus at least partially covered and / or shielded by the second region 62 of the frame member 20.

[0118] In the previous figures, the die arrangement 10 was, without any intention of limitation, depicted as one solid block. Indeed, the die arrangement 10 can comprise only one single semiconductor die and / or one single semiconductor chip. It is also clear that generally and / or when viewed in a cross-section plane of the semiconductor device 100, such as the exemplary plane E in Figure 3b, the die arrangement 10 comprises all semiconductor materials of the semiconductor device 100.

[0119] Figure 3e shows another example in which the die arrangement 10 comprises a number of dies 66 which may also be referred to as chiplets. In a generally known manner, these may be disposed on an interposer 68 and may be separated from one another by an encapsulant. The latter is either to be configured of a material that is suitable for being contacted by the coolant. Alternatively, a non-illustrated protective layer can be installed on the upper side 16 to seal the encapsulant. For example, by electronic coating spray or coating can be used to create a hydrophobic coating if needed in certain applications. Figure 3f adds a frame member 20 to the configuration of Figure 3e. By way of example, this frame member 20 is configured similarly to the frame member 20 of Figure 3d.

[0120] Figure 3g also shows a multi-die die arrangement 10 similar to Figures 3e-f. In this case, a central gap G is provided in the die arrangement 10 separating at least two of the dies 66. This central gap G can for example be provided for pick and place alignment or due to electronic or packaging constraints. Figure 3h adds a frame member 20 to the view of Figure 3g. It can be seen that a cover 68 is also provided which covers the gap G. This cover 68 can be comprised by the frame member 20. The gap G can be filled with a sealant it is made from a material according to any of the examples disclosed herein.

[0121] Figure 3i as a view similar to Figure 3g and comprises a supporting member 70 which has a frame- or ring-like configuration. The supporting member 70 fully encloses the outer circumferential face 18 of the die arrangement 10. In the shown example, SMDs 58 are arranged in a gap between the die arrangement 10 and supporting member 70.

[0122] July 23, 2025 21 / 31 Figure 3j adds a frame member 20 2 the view of Figure 3i. The frame member 20 is similar to the examples of Figures 3d, 3f and 3h in that it comprises a second region 62 that is lifted off of the upper surface of the substrate 12. A section of said second region 62 and specifically of its face facing the substrate 12 rests against an upper side of the supporting member 70. As indicated by an O-ring groove 72 in said face, a fluid tight connection may be formed in the area of contact between the frame member 20 and supporting member 70. This way, a further fluid tight barrier can be defined for preventing a leakage of coolant out of the semiconductor device 100 and into the surroundings. It is noted that in Figure 3jithere still remains a space below of the second region 62 for housing the SMDs 58.

[0123] In the following, the further embodiments of Figures 4a-d are discussed. Figure 4a illustrates a configuration that is essentially similar to Figure 2a but with a slightly higher frame member 20 (e.g. when measuring the height along the height axis H indicated in Figure 5a). In this example, the die arrangement 10 comprises an inner coolant channel 74. This coolant channel 74 extends between at least two openings 76 in the upper side 16 of the die arrangement 10. These openings 76 are positioned very close to and / or our at least partially comprised by outer edge regions 17 of the upper side 16. This helps to increase cooling efficiency at the edges of the die arrangement 10.

[0124] Figure 4b is a view similar to Figure 4a but adds a first inner lid member 78. This first inner lid member 78 extends along and in particular covers the upper side 16 of the die arrangement 10. In the shown example, the entire area of the upper side 16 is covered by the first inner lid member 78. Accordingly, the first lid inner member 78 has a first side 80 that contacts the upper side 16 of the die arrangement 10. Also, it has a second side 82 that faces a non-illustrated lid 26 of the overall semiconductor device 100 (see Figure 5a). For example, a first layer of stainless steel sheet metal of about 0.15mm thickness can be provided that defines port connections. A gasket creating the sealing can then be placed on top of it. Thus, it can be ensured that the gasket doesn't sag into the channels when a compressive force is applied over the gasket to create the sealing.

[0125] The first inner lid member 78 comprises fluid channels 84 formed by through holes, wherein said fluid channels 84 define sections of the cavity 30 of the overall semiconductor device 100. Specifically, these fluid channels 84 are located opposite to and / or are in fluidic connection with the inner fluid channel 74 of the die arrangement

[0126] July 23, 2025 22 / 31 10. They may thus form a fluidic connection between said inner fluid channel 74 and the inlet 31 and outlet 33 formed in a lid 26 as illustrated in Figure 5a. For example, the first inner lid member 78 can have slits allowing fluid reaching directly the die channels.

[0127] Figure 4c shows a further embodiment comprising a frame member 20 that is comparable to the one of Figure 2c. Accordingly, the frame member 20 comprises the previously discussed adjacent regions 40. These are used as a support surface and / or as a seat for an inner lid member 78 which has an extended length compared to the example of Figure 4b. Such a configuration enables - even though not necessarily depicted accordingly in Figure 4c - that the fluid channels 84 of the first inner lid member 78 can be even more accurately positioned opposite to the openings 76 of the inner channel 74 of the die arrangement 10 and / or can be positioned closer to the outer edge regions 17 of said die arrangement 10.

[0128] In Figure 4b, such positionings may be limited because there has to remain a minimum distance of said fluid channels 84 to an outer edge of the first inner lid member 78 for reasons of manufacturing. With the configuration of Figure 4c, cooling of the outer edge regions 17 of the die arrangement 10 can further be improved.

[0129] Figure 4d is comparable to Figure 4c especially with respect to the frame member 20. In this case, however, the first inner lid member 78 has dimensions similar to Figure 4b. Further, a second inner lid member 86 is provided and encloses and / or surrounds the first inner lid member 78. Said second inner lid member 86 is a gasket, in particular an elastomeric gasket, whereas the first inner lid member 78 is a rigid member, such as a metallic plate. The second inner lid member 86 may provide an improved sealing effect due to its flexible nature. The first inner lid member 78, on the other hand, may prevent an obstruction of the openings 76 of the inner channel 74 of the die arrangement 10, e.g. due to being inherently incapable of sagging into said openings 76.

[0130] As depicted, the first inner lid member 78 may extend along the upper side 16 of the die arrangement 10 and at least until or even slightly beyond a position of the openings 76. The second inner lid member 86 may rest against the adjacent region 40 of the frame member 20 and may optionally the located opposite to the outer edge regions 17 of the die arrangement 10. It is to be understood that when operating under pressure and / or when generally being pressed by a lid 26 as indicated in Figure 5a, the second inner lid

[0131] July 23, 2025 23 / 31 member 86 may laterally expand. The rigid first inner lid member 78 provides a controlled way to define and in particular guide or limit this expansion.

[0132] Figures 5a-e show embodiments of a fully assembled semiconductor device 100 according to different examples of this invention.

[0133] A structural description of Figure 5a has already been included further above. In this embodiment, a fluid streaming through the cavity 30 can directly impinge on the upper side 16 of the die arrangement 10 and in particular come into contact with the entire surface area of said upper side 16. At the same time, the semiconductor device 100 is leak tight by way any combination of the various sealing measures and / or fluid tight barriers defined herein. By way of example, Figure 5a specifically illustrates the fluid tight connection 28 between the lid 26 and frame member 20 as well as the sealant 22 between the die arrangement 10, frame member 20 and substrate 12.

[0134] Figure 5b depicts a configuration similar to Figure 5a while also adding a first inner lid member 78 as discussed above with respect to Figures 4a-d.

[0135] Figure 5c depicts a configuration similar to Figure 5b wherein a first inner lid member 78 has a more extended length similar to Figure 4c. Optionally, this first inner lid member 78 is made of a flexible material and is in particular a sheet-like gasket. It can be compressed between the die arrangement 10 and the lid 26 to create an additional protective layer, thereby further preventing coolant from coming into direct contact with the sealant 22.

[0136] Figure 5d depicts a configuration similar to Figure 5b, but wherein a combination of a first and second lid member 78, 86 according to Figure 4c is provided.

[0137] Figure 5e depicts a configuration similar to Figure 5d with an additional fluid tight connection between the frame member 20 and substrate 12 comprising the O-ring groove 54 and O-ring 56 of Figure 3b.

[0138] Figure 6a shows a configuration where a first inner lid member 78 has multiple fluid channels 84 which are not only positioned close to the outer edge regions 17 of the upper side 16 of the die arrangement 10. Rather, they are also based opposite to more central areas of the upper side 16. The lid 26 as depicted in Figure 6b can have a

[0139] July 23, 2025 24 / 31 respectively branched inlet 31 and outlet 33 to connect to each of these fluid channels 84 of the first inner lid member 78. This configuration may help to reduce pressure drop, improve temperature uniformity along the upper side 16 and increase heat transfer along the upper side 16.

[0140] July 23, 2025 25 / 31

Claims

Claims1. Semiconductor device (100), comprising: a substrate (12); a die arrangement (10) comprising at least one semiconductor die (66), the die arrangement (10) having an underside (14) facing the substrate (12) and an upper side (16) facing away from the substrate (12); a frame member (20) extending around the die arrangement (10) in a frame-like manner; a lid member (26) that is connected to the frame member (20) in a fluid-tight manner and a section of which faces towards the upper side (16) of the die arrangement (10); a cavity (30) in which a coolant is receivable to cool the die arrangement (10).

2. Semiconductor device (100) according to claim 1 , wherein at least a section of the cavity (30) is formed in the frame member (20) and / or in the lid member (26).

3. Semiconductor device (100) according to claim 1 or 2, wherein the fluid-tight connection between the frame member (20) and the lid member (26) comprises an O-ring and / or another seal member.

4. Semiconductor device (100) according to any of the previous claims, wherein the frame member (20) is connected to the substrate (12) in a fluid-tight manner.

5. Semiconductor device (100) according to claim 4, wherein the fluid tight connection between the frame member (20) and the substrate (12) comprises an O-ring (56) or another seal member.

6. Semiconductor device (100) according to any of the previous claims, wherein a space (21) between the frame member (20) and the die arrangement (10) is at least partially filled with a sealant (22).

7. Semiconductor device (100) according to claim 6, wherein the sealant (22) contacts the substrate (12).

8. Semiconductor device (100) according to any of the previous claims, wherein the upper side (16) of the die arrangement (10) is unobstructed by the frame member (20) or at most obstructed in up to 10 % of its area, or at most obstructed in up to 7 % of its area, or at most obstructed in up to 5 % of its area.July 23, 2025 26 / 319. Semiconductor device (100) according to any of the previous claims, wherein an average width (W) of an outer edge region (17) of the upper side (16) of the die arrangement (10) that is obstructed, preferably by the frame member (20), is less than 1 mm and in particular less than 0.05 mm.

10. Semiconductor device (100) according to any of the previous claims, wherein the die arrangement (10) has an outer circumferential face (18) connecting the upper side (16) and the underside (14) and defining an outer boundary of the die arrangement (10), wherein: the outer circumferential face (18) of the die arrangement (10) faces towards an inner circumferential face (44) of the frame member (20); and / or the outer circumferential face (18) of the die arrangement (10) contacts a sealant (22) that also contacts the substrate (12) and / or the frame member (20).

11. Semiconductor device (100) according to any of the previous claims, wherein the die arrangement (10) extends in a cross-sectional volume of the semiconductor device (100) and comprises all semiconductor components and / or all semiconductor materials within said cross- sectional volume, in particular wherein the die arrangement (10) only comprises a single semiconductor die (66) or comprises a set of semiconductor dies (66).

12. Semiconductor device (100) according to any of the previous claims, wherein the frame member (20) comprises a region (40) adjacent to the die arrangement (10) and that is flush with the upper side (16) of the die arrangement (10).

13. Semiconductor device (100) according to 12, wherein at least a section of said adjacent region (40) contacts or abuts the die arrangement (10).

14. Semiconductor device (100) according to any of the previous claims, wherein the frame member (20) has an inner circumferential face (44) facing an outer circumferential face (18) of the die arrangement (10), wherein a first section (48) of said inner circumferential face (44) contacts or abuts or is closer to the die arrangement (10), preferably the outer circumferential face (18) of the die arrangement (10), and wherein a second section (50) of said inner circumferential face (44) remains at a distance to said outer circumferential face (18) of the die arrangement (10).

15. Semiconductor device (100) according to any of the previous claims, wherein the frame member (20) has an inner circumferential face (44) facing an outer circumferential face (18) of the die arrangement (10), wherein at least a portion of the inner circumferential face (44) is angled relative to and in particular angled towards the outer circumferential face (18) of the die arrangement (10).July 23, 2025 27 / 3116. Semiconductor device (100) according to any of the previous claims, wherein the frame member (20) has a first region (60) that is connected to the substrate (12) and a second region (62) that faces towards the substrate (12) but is arranged at a distance thereto.

17. Semiconductor device (100) according to claim 16, further comprising at least one electronic component (58), preferably a surface-mounted device, at least a part of which is arranged in between the second region (62) of the frame member (20) and the substrate (12).

18. Semiconductor device (100) according to claim 16 or 17, wherein the second region (62) rests against a supporting member (70) that is supported by the substrate (12).

19. Semiconductor device (100) according to claim 18, wherein the second region (62) and the supporting member (70) are connected in a fluid-tight manner, wherein this fluid-tight connection comprises an O-ring and / or another seal member.

20. Semiconductor device (100) according to any of the previous claims, wherein the cavity (30) comprises at least one section (31) configured to guide coolant so that it impinges at least partially on the upper side (16) of the die arrangement (10).

21. Semiconductor device (100) according to any of the previous claims, wherein at least one section (74) of the cavity (30) is formed in the die arrangement (10), in particular wherein an inlet (76) of said section (74) is located at a distance to an outer edge (17) of the upper side (16) of the die arrangement (10) of less than 10 mm and in particular of less than 0.01.

22. Semiconductor device (100) according to any of the previous claims, further comprising a first inner lid member (76) that has a first side (80) that faces towards and in particular contacts or abuts the upper side (16) of the die arrangement (10) and a second side (82) that faces towards and in particular contacts or abuts the lid member (26).

23. Semiconductor device (100) according to claim 22, wherein the first inner lid member (76) comprises at least a section (84) of the cavity (30), in particular wherein said section (84) fluidically connects one section (31, 33) of the cavity (30) formed in the lid member (26) and another section (74) of the cavity (30) formed in the die arrangement (10).

24. Semiconductor device (100) according to claim 22 or 23, wherein the first inner lid member (76) is configured to fluidically seal the cavity (30) with respect to the sealant (22) of any of claims 6 and 7.July 23, 2025 28 / 3125. Semiconductor device (100) according to any of claims 22 to 24, further comprising a second inner lid member (86) that has a first side that faces towards and in particular contacts or abuts the upper side (16) of the die arrangement (10) and a second side that faces towards and in particular contacts or abuts the lid member (26), wherein the first inner lid member (78) is received in a cut-out in the second inner lid member (86).

26. Semiconductor device (100) according to claim 25, wherein at least one of the following is further provided:• the first inner lid member (78) is a gasket;• the second inner lid member (86) comprises at least a section of the cavity (30), in particular wherein said section fluidically connects one section (31) of the cavity (30) formed in the lid member (26) and another section (74) of the cavity (30) formed in the die arrangement (10);• the second inner lid member (78) is free of any section of the cavity (30);• the first inner lid member (78) is made from a more rigid material compared to the second inner lid member (86), in particular wherein the rigidity of the first inner lid member (78) is closer to the rigidity of the frame member (20) and / or the lid member (26) than to the rigidity of the second inner lid member (86);• the second inner lid member (86) surrounds the first inner lid member (78) in a framelike manner;• the second inner lid member (86) contacts the frame member (20);• the first inner lid member (78) remains at a distance to the frame member (20);• the first inner lid member (78) and / or the second inner lid member (86) extend laterally beyond the upper side (16) of the die arrangement (10).

27. Semiconductor device (100), comprising: a substrate (12); a die arrangement (10) having an underside (14) facing the substrate (12) and an upper side (16) facing away from the substrate (12); a receiving space (35) in which the die arrangement (10) is accommodated so that an upper side (16) of the die arrangement (10) is fully unobstructed in the receiving space (35), or at most obstructed in up to 10 % of its area or at most obstructed in up to 5 % of its area, wherein a coolant for cooling the die arrangement (10) is receivable in the receiving space (35).

28. Semiconductor device (100) according to claim 27, wherein the receiving space (35) is configured to remain fluid-tight with respect to fluid pressures of the coolant of at least 1 bar andJuly 23, 2025 29 / 31in particular of at least 5 bar or at least 10 bar.

29. Semiconductor device (100) according to claim 27 or 28, wherein an average width (W) of an outer edge region (17) of the upper side (16) of the die arrangement (10) that is obstructed is smaller than 1 mm and in particular smaller than 0.05 mm.

30. Semiconductor device (100) according to any of claims 28 to 29, wherein the die arrangement (10) comprises at least one cooling channel (74), wherein an inlet (76) of said cooling channel (74) is located at a distance to an outer edge region (17) of the upper side (16) of the die arrangement (10) of less than 20 mm and in particular of less than 10 mm or less than 5 mm.

31. Semiconductor device (100) according to any of claims 27 to 29, wherein the semiconductor device (100) is configured to directly extract heat from at least a portion of an outer edge region (17) of the upper side (16) of the die arrangement (10).

32. A frame member (20) for configuring a semiconductor device (100) according to any of the above claims.

33. A method for manufacturing a semiconductor device (100), the method comprising: arranging a die arrangement (10) comprising at least one semiconductor die (66), so that an underside (14) of the die arrangement (10) faces a substrate (12) and an upper side (16) of the die arrangement (10) faces away from the substrate (12); arranging a frame member (20) so as to extend around the die arrangement (10) in a frame-like manner; connecting a lid member (26) to the frame member (20) in a fluid-tight manner and so that a section of the lid member (26) faces towards the upper side (16) of the die arrangement (10) and further so that a cavity (30) is created in which a coolant is receivable to cool the die arrangement (10).

34. A method for operating a semiconductor device (100) according to any of claims 1-31 , the method comprising at least one of:• guiding coolant inside the cavity (30) so that it contacts at least 90 % of the upper side’s area of the die arrangement (10) or at least 95 % of said the upper side’s area;• guiding coolant inside the cavity (30) so that it contacts the upper side (16) of the die arrangement (10) in at least one region that this spaced apart from an outer edge of said upper side (16) by at most 1 mm and in particular by at most 0.05 mm.July 23, 2025 30 / 31

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