Quantum computing assembly comprising at least one quantum chip module and an input-output structure

Abstract

The present disclosure relates to a quantum computing assembly comprising one or more than one quantum chip module comprising a patterned layer forming at least part of a quantum computing circuit component and comprising an electrically conductive material and an input-output structure comprising at least one substantially rigid input-output element with at least one transmission line formed on or in the input-output element. The at least one quantum chip module of the quantum computing assembly furthermore comprises at least one connector element electrically connected to the patterned layer and the input-output structure comprises at least one connector counter-element electrically connected to the transmission line, wherein the connector element and the connector counter-element are configured to detachably engage one another to thereby form an electrical connection between the quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.

Description

QUANTUM COMPUTING ASSEMBUY COMPRISING AT EEAST ONE QUANTUM CHIP MODUEE AND AN INPUT-OUTPUT STRUCTURETECHNICAL FIELD

[0001] The present disclosure relates to the field of quantum computing. More specifically, the present disclosure relates to a quantum computing assembly comprising one or more than one quantum chip module and an input-output structure that are detachably connectable to one another.BACKGROUND

[0002] Quantum computing is a relatively novel form of computing that exploits the principles of quantum mechanics to perform computations. In contrast to traditional computing, in which information is stored using bytes that may assume a binary value of "0" or " 1 ", quantum computing utilises quantum bits or "qubits" that may assume a value that is a superposition of the two fundamental quantum states |0) and | 1).

[0003] In recent decades, a plurality of different qubits has been developed that differ from one another with respect to their fundamental approach to quantum computing. These qubits include e.g. photonic qubits, trapped ion qubits, qubits based on neutral atoms and superconducting qubits.

[0004] Superconducting qubits, in particular transmons, are known for their relatively low sensitivity to (charge) noise, high controllability, and manufacturability using well-known techniques from the semiconductor industry. Consequently, superconducting qubits have received considerable interest from researchers and are currently viewed as the most scalable type of qubit most suitable for constructing large scale quantum computing systems.

[0005] Superconducting qubits are typically connected to various transmission lines or busses for facilitating control and coupling of these qubits, and to read their quantum states. These transmission lines include drive lines for manipulating the quantum states of qubits, coupling busses for facilitating interactions between different qubits, and readout lines used for determining the quantum states of qubits. Certain types of superconducting qubits may moreover comprise additional transmission lines,such as a flux bias line fortuning the qubit frequency of a qubit. The qubit frequency refers to the energy levels at which a given qubit transitions between its two fundamental states |0) and 11).

[0006] The here above-described transmission lines typically extend from the qubit to the edge of a chip on which the qubit is arranged, where they connect to various types of peripheral equipment via lateral wire bonds. As chips increase in surface area, the number of qubits that may be comprised by such a chip likewise increases. However, a quadratic increase of the surface area of a (square or rectangular) quantum chip results in a merely linear increase of the dimensions of its sides. As quantum computing systems scale upwards and comprise ever increasing numbers of qubits, routing the transmission lines becomes increasingly challenging due to the spatial limitations near the edges of the chip.

[0007] Indeed, the scaling of superconducting quantum computing systems poses severe challenges to the effective routing of transmission lines, be they transmission lines between different one or more qubits comprised by the same qubit plane and / or quantum chip comprising one or more qubits and / or different one or more qubits comprised by different qubit planes and / or quantum chips each comprising one or more qubits. The scaling also effects the routing between one or more qubits and further components that may be used for performing and / or controlling quantum computations and to register the result thereof, such as e.g. control and / or readout components, such as flux bias lines and / or microwave drive lines and / or feed lines. In particular, as qubit planes comprise an ever-increasing number of qubits, said qubits being required to be subject to manipulation, control, and / or read-out, as well as being required to be able to exchange signals, as part of quantum computation, it becomes an ever greater challenge to rout signals between different one or more qubits, as well as between different one or more qubits and further quantum computing and / or quantum circuit components, such as control and / or readout components.

[0008] A further limitation with respect to the scalability of superconducting quantum computing systems relates to their manufacturing. Superconducting qubits are typically manufactured using techniques from the semiconductor industry that are well understood and have been thoroughly developed. Nevertheless, it is inevitable that at times a fraction of the manufactured qubits on a given quantum chip is faulty or defective. In certain cases, this will result in a sub-optimal quantum chip ofwhich one or more qubits is disabled, reducing its computational power. In other cases, the quantum chip is entirely dysfunctional and must be discarded.

[0009] The probability of one or more qubits (or other quantum computing circuit components) of a quantum chip being faulty increases as the number of components increases. A further complication unique to the field of superconducting qubits is that some of these manufacturing faults can only be identified when the quantum chip is cooled to its operating temperature of 10 to 20 millikelvin (mK), which further convolutes fault identification and correction.

[0010] The fact that the probability of a quantum chip comprising one or more faulty qubits and / or other quantum computing circuit components increases as the number of components increases poses further challenges to the routing of transmission lines, as transmission lines may be required to be routed in such a manner that the faultiness of qubits and / or other quantum circuit components may be at least partly mitigated thereby, e.g. by connecting a greater number of pairs of, on the one hand, one or more qubits and / or other quantum computing circuit components and, on the other hand, further one or more qubits and / or further other quantum computing circuit components.

[0011] Notwithstanding the above, even qubits that are manufactured free of manufacturing faults may degrade over the course of their lifetime, affecting their performance. Several factors are known to contribute to the degradation of superconducting qubits. Material degradation, for example, affects the materials used to fabricate superconducting qubits, such as the thin films of superconducting metals and insulators in Josephson junctions. This degradation can result from exposure to the environment (even under controlled conditions), the accumulation of defects, or the stress and strain from thermal cycling (repeated cooling and heating of the quantum chip). A further factor that may contribute to the degradation of superconducting qubits are high-energy particles, such as cosmic rays or background radiation. These particles can induce single-event upsets or gradually create defects in the crystal structure of the materials used in the superconducting qubits. Moreover, the interfaces and surfaces of the materials in superconducting qubits can, over time, increasingly introduce unwanted noise and loss mechanisms. This may be the result of e.g. oxides that naturally form on metal surfaces. These surface irregularities and contaminants can lead to decreased quantum coherence (i.e. the ability of the qubit to retain its quantum state) over time. Defects at material interfaces can trap electric charges, which canfluctuate and cause noise, affecting the operation of the superconducting qubit and leading to degradation of its quantum properties.

[0012] A partial solution to the above-described challenges is provided by WO2023152308A1, which discloses a quantum computing apparatus comprising a patterned layer which comprises an electrically conductive material and forms multiple qubits, adjacent and parallel to a substrate layer, such that the substrate layer and the patterned layer form a layer stack. The quantum computing apparatus further comprises an interposer comprising a rigid connection element mechanically connected to the layer stack, wherein the connection element is substantially planar and positioned in a plane that is nonparallel to the plane in which the substrate layer is formed, and wherein the connection element comprises a conductive element, preferably a transmission line, formed on or in the connection element for providing an electrical connection to the patterned layer. WO2023152308A1, however, does not solve the problem of manufacturing imperfections and / or degradation of quantum chips and / or further components used for quantum computing. Indeed, notwithstanding the advantages provided by an interposer, integrating quantum chips in a quantum computing assembly with an interposer does not provide for optimal means to repair defects and / or replace faulty, damaged, and / or degraded quantum chips and / or further components used for quantum computations. Repairing and / or replacing quantum chips in the system disclosed in WO2023152308A1 is difficult without inducing at least some deformation, damage, and / or destruction of at least some parts of the system. Further, WO2023152308A1 does not solve completely the problem of increased complexity of routing in scaling quantum computing systems. Indeed, the necessity of combining an interposer with quantum chips comprising qubits may exacerbate the routing complexity due to the fact that the footprint of components comprised by the interposer may not overlap with the footprint of components, such as qubits, comprised by the quantum chip. This may result in problems with functionally coupling the interposer with the quantum chip, Due to the complexity of properly aligning an interposer with one or more quantum chips, the complexity of proper routing may be increased even further, as there may arise the need to rout signals between one or more components comprised by one or more quantum chips and one or more components comprised by an interposer due to a misalignment between the one or more quantum chips and the interposer. Further, while signals may be routed over short transversal distancesin the interposer, signals can only be routed along the planes of the connection elements comprised by the interposer while routing along the direction perpendicular to the planes of the connection elements comprised by the interposer is typically not possible.

[0013] US20170213143A1 discloses a technique related to an assembly for a quantum computing device. A quantum bus plane includes a first set of recesses. A readout plane includes a second set of recesses. A block is positioned to hold the readout plane opposite the quantum bus plane, such that the first set of recesses opposes the second set of recesses. A plurality of qubit chips are included where each has a first end positioned in the first set of recesses and has a second end positioned in the second set of recesses. This configuration is implemented n order to be able to run a quantum surface code. The qubit chips comprise only single qubits and, as such, do not provide for a solution to the above-described challenges, particularly for a quantum computing system comprising qubit chips and / or a qubit plane comprising more than one qubit. Moreover, US20170213143A dopes not provide a solution that provides the scalability required for practically useful quantum computation. Further, US20170213143A1 does not provide for a way in which to solve or even mitigate the issue of faulty and / or defective qubits and / or other quantum computing circuit components. Indeed, a qubit chip being defective would severely disrupt the surface code which this quantum computing system is designed to run. Replacing one or more such qubits requires disconnecting all qubit chips from the quantum bus plane and / or the readout plane, removing the faulty qubit chip from the readout plane and / or the quantum bus plane, placing another qubit chip in the readout plane and / or the quantum bus plane, and inserting all qubit chips into the quantum bus plane and / or the readout plane. Due to the free-standing qubit chips which vertically extend for some distance, it is extremely difficult to simultaneously align all qubit chips with the quantum bus plane and the readout plane, let alone remove and replace one or more qubit chips, without exerting some lateral force on the vertical qubit chips which would misalign at least one of the qubit chips with the quantum bus plane and / or the readout plane and / or destroy the qubit chip and / or the recess in the quantum bus plane and / or the readout plane wherein a qubit chip is inserted. Indeed, the vertical extension of the qubit chips leads to a leverage effect whereby the misaligning and destructive forces arising from even a minor lateral force are exacerbated. Further,US20170213143A1 does not provide for a means to solve the problem of increased routing complexityin quantum computing systems as they continue to scale up in size and / or number of components. Indeed, the essentially bi -planar configuration of US20170213143 Al with vertical qubit chips between a quantum bus plane and a quantum readout plane provides a fixed way to connect components on the quantum bus plane and readout plane without a means for implementing a different configuration of connecting components on and quantum bus plane and / or the readout plane and / or further devices and / or components to which signals may be routed as part of a quantum computation.SUMMARY

[0014] The object of the present disclosure and invention is to provide a means with which one or more, or possibly others, of the here above-described limitations of comparable devices known in the art is obviated or abated.

[0015] This object is achieved with a quantum computing assembly in accordance with a first aspect of the present disclosure. The quantum computing assembly comprises a quantum chip module comprising a patterned layer forming at least part of a quantum computing circuit component and comprising an electrically conductive material, such that the patterned layer comprises a plurality of superconducting qubits. The quantum computing assembly ay comprise an input-output structure comprising at least one substantially rigid input-output element with a transmission line formed on or in the input-output element. The at least one quantum chip module furthermore comprises a connector element electrically connected to the patterned layer. The input-output structure comprises at least one connector counter-element electrically connected to the transmission line, wherein the connector element and the connector counter-element are configured to detachably engage one another to thereby form an electrical connection between the quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.

[0016] The here above-described quantum computing assembly advantageously facilitates electrically connecting the quantum computing circuit component of the quantum chip modules to microwave drives, flux bias lines, readout lines, input-output feedlines, coupling busses and the like, in a scalable manner. The number of quantum computing circuit components may be increased by increasing the number of quantum chip modules, without being constrained by the above-describedspatial limitations that occur when increased numbers of quantum computing circuit components are arranged on a single chip (module).

[0017] A further advantage of the above-described quantum computing assembly is that, if any one of the quantum computing circuit components is found to be defective, the quantum chip module comprising said defective circuit component may be easily disconnected from the input-output structure and replaced with a non-defective quantum chip module. Quantum chip modules with a degraded performance may likewise be replaced in this manner. The proposed quantum computing assembly is therefore particularly advantageous for post-manufacturing fault identification and correction, and has an overall increased lifecycle.

[0018] In a preferred embodiment of the quantum computing assembly, the quantum chip module may be configured to be coupled to and decoupled from the input-output structure without damage to the connector elements and / or the connector counter-elements. The connector elements and counterconnector elements may be configured to detachably engage one another to couple the quantum chip module with the input-output structure without requiring (de)soldering, or deposition / removal of additional conductive material. The connector elements and counter-connector elements are configured to engage one another to couple the quantum chip module (110) with the input-output structure (120) in a detachable manner without requiring destructive connection and / or deconnection techniques to establish and / or disestablish an electrical connection.

[0019] In a further preferred embodiment of the quantum computing assembly, detachably engaging the connector element and the connector counter-element may refer to the fact that the connector element may be engaged to a first connector counter-element , subsequently disengaged from said first connecter counter-element , and subsequently engaged to a second connector counter-element, preferably be repeatedly engaged and disengaged for at least 2 times, more preferably at least 5 times, even more preferably at least 20 times, most preferably at least 50 times, with one or more substantially without damage, destruction, and / or permanent deformation of the connector element, preferably without damage, destruction, and / or permanent deformation of the any further component and / or element comprised by the quantum computing assembly, most preferably without damage, destruction, and / or permanent deformation of the connector counter-element.

[0020] In a further preferred embodiment of the quantum computing assembly, the connector element and the connector counter-element together define a, preferably self-aligning, detachable coupling structure. In these embodiments, at least one of the connector element and the connector counterelement comprises a protrusion, a recess, a soldering bump, and / or a connection pin. The connector element and / or connector counter-element may comprise a superconducting material, or coating, from a group of superconducting materials, said group comprising at least aluminium, niobium, titanium, indium, molybdenum-rhenium, niobium nitride, niobium titanium nitride and tantalum. At least one of the connector element and the connector counter-element may be spring-loaded and / or may formed as a spring, preferably wherein a spring element of said connector element and / or connector counterelement may selected from a group of spring elements, said group comprising at least a helical spring, a volute spring, a wave spring, a leaf spring, and an airbridge.

[0021] Connector elements or connector counter-elements that are spring-loaded or are formed as a spring ensure that, in an assembled state of the quantum computing assembly, good electrical connectivity is maintained between the connector elements and the connector counter-elements. A further advantage of such connector elements and connector counter-elements is that the quantum chip module may be connected and disconnected from the input-output structure many times with reduced risk of damage occurring to either component.

[0022] In a further preferred embodiment of the quantum computing assembly, the transmission line formed on or in the input-output element comprises a geometry from a group of geometries, said group comprising a coplanar waveguide, a microstrip and a stripline geometry. The transmission line is furthermore preferably configured to convey microwave signals. The transmission line may be formed on or in the input-output element using one or more of lithography, deep reactive etching, photoablation, atomic layer deposition, evaporation, molecular-beam epitaxy and sputtering. Preferably, the transmission line may comprise at least one functional element, wherein the functional element preferably comprises at least one of a filter, an attenuator, a DC-block, an IR-filter, a tuneable coupler, a directional coupler, a circulator, an isolator, and / or an amplifier. Preferably, the transmission line may be a functional transmission line, more preferably wherein the functional transmission line is one or more of a microwave drive line, a flux bias line, and / or a feed line.

[0023] In a further preferred embodiment of the quantum computing assembly, the at least one inputoutput structure comprises a plurality of connector elements and the at least one quantum chip module comprises a plurality of connector counter-elements. The connector elements and the connector counterelements are arranged to align with the plurality of connector elements, in an assembled state of the quantum computing assembly. Preferably, the plurality of connector elements and the plurality of connector counter-elements are arranged in respective grid formations. At least one connector element among the plurality of connector elements may be connected, via an associated connector counterelement, to a signal carrying transmission line of the input-output structure. A plurality of connector elements adjacent to said connector elements may be connected, via respective associated connector counter-elements, to at least one grounded bus of the input-output structure.

[0024] In a further preferred embodiment of the quantum computing assembly, at least one connector element among the plurality of connector elements is connected, via an associated connector counterelement, to a signal carrying transmission line of the input-output structure. In these embodiments, a plurality of connector elements adjacent said connector elements are connected, via respective associated connector counter-elements, to at one grounded transmission line of the input-output structure.

[0025] In a further preferred embodiment of the quantum computing assembly, the input-output structure further comprises at least one additional input-output element arranged parallel to the inputoutput element, wherein the additional input-output element comprises at least one additional transmission line formed on or in the input-output element. In these embodiments, the quantum computing assembly preferably further comprises at least one transverse transmission line extending from the transmission line of the input-output element to the additional transmission line of the parallelly arranged additional input-output element, preferably through one or more vias.

[0026] In a further preferred embodiment of the quantum computing assembly, the input-output structure may further comprise a spacer arranged parallel to the input-output element, wherein preferably the spacer is arranged between the input-output element and the additional input-output element.

[0027] In a further preferred embodiment of the quantum computing assembly, the input-output structure furthermore comprises a routing plane positioned in a non-parallel plane of the plane in which the input-output element is formed. The routing plane comprises a plurality of routing lines and the at least one connector counter-element is connected to one of the plurality of routing lines. In more preferred embodiments, the transverse transmission line is arranged external of the routing plane.

[0028] In a further preferred embodiment of the quantum computing assembly, the input-output structure may further comprise a routing plane positioned in a plane non-parallel to a plane in which the input-output element is formed. The routing plane may comprise a plurality of routing lines and at least one connector counter-element may be connected to one of the plurality of routing lines. Preferably, the transverse transmission line may be arranged external of the routing plane.

[0029] In a further preferred embodiment of the quantum computing assembly, the input-output structure may further comprise a routing plane comprising a routing line and preferably positioned in a plane non-parallel to a plane in which the input-output element is formed. The routing line may comprise a first end and a second end different from the first end. The first end may be connected, preferably electrically connected, to the connector element and / or to the quantum circuit component, and the second end is connected, preferably electrically connected, to the connector counter-element and / or to a component, preferably a transmission line (122), comprised by the input-output element. In a more preferred embodiment, the second end may be disposed at a position displaced with respect to the first end by a finite distance along a direction parallel to the plane in which the routing plane is positioned. Preferably, the finite distance may be at least 0.5 mm, preferably at least 1 mm, more preferably at least 2 mm, most preferably for at least 4 mm. Preferably, the finite distance may be at least a number of times the spatial extension of a quantum circuit component, preferably a qubit, or at least a number of times the spatial extension between two quantum circuit components, preferably qubits, comprised by the quantum chip module, the number being at least 0.5, preferably at least 1, more preferably at least 2, most preferably at least 4.

[0030] In a further preferred embodiment of the quantum computing assembly, the quantum computing assembly may further comprise a housing with a plurality of, preferably thermally conductive, side walls enclosing the quantum computing assembly. The housing may further comprisea removeable lid configured to restrict movement of the at least one quantum chip module relative to the input-output structure in an assembled state of the quantum computing assembly. The quantum chip module and the input-output structure may further comprise interlocking, selectively releasable fastening means.

[0031] In a further preferred embodiment of the quantum computing assembly, the connector element and the connector counter-element are configured, in an assembled state of the quantum computing assembly, to define one or more of a galvanic, inductive and capacitive electrical connection. Further, one or both of the connector element and the connector counter-element may comprise indium, gallium, tin, an alloy comprising indium, gallium and / or tin, or combinations thereof.

[0032] In accordance with a second aspect of the present disclosure, the above stated object is achieved with an input-output structure comprising at least one substantially rigid input-output element and a transmission line formed on or in the input-output element for providing an electrical connection to a patterned layer of a quantum chip module. The input-output structure may further comprise at least one connector counter-element electrically connected to the transmission line and configured to detachably engage a corresponding connector element of said quantum chip module, to thereby form an electrical connection between a quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.

[0033] In accordance with a third aspect of the present disclosure, the above stated object is achieved with a quantum chip module comprising a patterned layer forming at least part of a quantum computing circuit component and comprising an electrically conductive material. The quantum chip module may furthermore comprise at least one connector element electrically connected to the patterned layer. The connector element may be configured to detachably engage a corresponding connector counter-element of an input-output structure, to thereby form an electrical connection between the quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.

[0034] In accordance with a fourth aspect ofthe present disclosure, the above stated object is achieved with a routing plane which may be adapted for routing one or more signals of a quantum chip module.The routing plane may comprise a substrate with a first surface and a second surface substantiallyopposite and parallel to the first surface, a first connection point comprised by the first surface or the second surface, and a second connection point comprised by the first surface or the second surface. The second connection point may be disposed at a position displaced with respect to the first connection point by a finite distance along a direction parallel to the first surface. The routing plane may further comprise a routing line. The routing line may comprise a first end and a second end different from the first end, wherein the first end may be connected to the first connection point and the second end may be connected to the second connection point, such that the routing line may serve to electrically couple the first connection point and the second connection point.

[0035] In a further preferred embodiment of the routing plane, the first connection point may be configured to be connected, preferably in a detachable manner, to a first component, and the second connection point may be configured to be connected, preferably in a detachable manner, to a second component. The first and / or second component may be a component comprised by the quantum chip module, preferably a connector element, more preferably a connector element of a quantum assembly according to a quantum computing assembly according to the first aspect of the present disclosure. Further, the first and / or second component may be a component comprised by an input-output element, preferably a transmission line and / or a counter-connector element comprised by an input-output element, more preferably a counter-connector element of a quantum assembly to the first aspect of the present disclosure. The routing line may be configured to transmit signals the first component and the second component.

[0036] In a further preferred embodiment of the routing plane, the finite distance may be at least 0.5 mm, preferably at least 1 mm, more preferably at least 2 mm, most preferably for at least 4 mm. Further, the finite distance may be at least a number of times the spatial extension of a quantum circuit component, preferably a qubit, or at least a number of times the spatial extension between two quantum circuit components, preferably qubits, comprised by a quantum chip module, the number being at least0.5, preferably at least 1, more preferably at least 2, most preferably at least 4.

[0037] Lastly, in accordance with a sixth aspect of the present disclosure, the above stated object is achieved with a method for assembling a computing assembly according to any one of here above embodiments.BRIEF DESCRIPTION OF THE DRAWING

[0038] The embodiments outlined here above are described here below with reference to the appended drawing, in which:

[0039] FIG. 1A shows a schematic of an exemplary embodiment of a quantum computing assembly comprising a plurality of quantum chip modules detachably connected to an input-output structure;

[0040] FIG. IB shows a top-down perspective of the quantum computing assembly of FIG. 1 A;

[0041] FIG. 1C shows a side perspective of the quantum computing assembly of FIG. 1A and FIG. IB;

[0042] FIG. 2A shows a schematic of a quantum computing assembly comprising spacers in accordance with various embodiments;

[0043] FIG. 2B shows a detailed view of the quantum computing assembly of FIG. 2A;

[0044] FIG. 3 depicts an example of a connector element and / or a connector counter-element in accordance with various embodiments;

[0045] FIG. 4A shows a frontal perspective of a schematic of a quantum computing assembly in accordance with further embodiments;

[0046] FIG. 4B shows a side perspective of the quantum computing assembly of FIG. 4A;

[0047] FIG. 5A shows a perspective view of a schematic of a quantum computing assembly in accordance with further preferred embodiments;

[0048] FIG. 5B shows a detail of the quantum computing assembly of FIG. 5A;

[0049] FIG. 5C shows a top-down view of a further detail of the quantum computing assembly of FIG. 5A and FIG. 5B;

[0050] FIG. 6A shows an alternative embodiment of a quantum computing assembly comprising more than one input-output structure;

[0051] FIG. 6B shows a yet alternative embodiment of a quantum computing assembly comprising more than one input-output structure and a plurality of chip modules;

[0052] FIG. 7 shows a perspective view of schematic depiction of a quantum computing assembly in accordance with further preferred embodiments;

[0053] FIG. 8 shows a perspective view of a schematic depiction of a quantum computing assembly in accordance with further preferred embodiments;

[0054] FIG. 9A shows a perspective view of a schematic depiction of a quantum computing assembly in accordance with further preferred embodiments;

[0055] FIG. 9B and FIG. 9C show a detailed views of an exemplary embodiment of a fastening means of the quantum computing assembly of FIG. 9A in disengaged and engaged states, respectively; and

[0056] FIG. 10 shows a circuit schematic of a quantum computing system comprising a quantum computing assembly according to certain embodiments.DETAILED DESCRIPTION

[0057] Here below, exemplary embodiments are described with reference to the appended drawing. It will be appreciated that these embodiments do not to limit the scope of the sought after protection, which is defined by the appended claims.

[0058] In the description here below, the term "conductive material" should be understood as relating to any material that allows the flow of electrical charge therethrough in any direction. The term as used in the present disclosure includes metals, electrolytes, superconductors, semiconductors, plasmas, graphite and conductive polymers, unless specified otherwise

[0059] Moreover, the phrases "electrically connected" and "electrical connection" should be understood as relating to any electrical connection that may be made inductively, capacitively and / or galvanically, between two structures or circuitry components.

[0060] FIG. 1A, IB and 1C schematically depict an exemplary embodiment of a quantum computing assembly 100. The quantum computing assembly 100 comprises a plurality of quantum chip modules 110 and an input-output structure 120. The quantum chip modules 110 may be detachably connected or coupled to the input-output structure 120 of the quantum computing assembly 100.

[0061] Each of the quantum chip modules 110 comprises one or more quantum computing circuit component 111. The computing circuit components 111 are preferably superconducting qubits. Each quantum computing circuit component 111 may moreover be connected to one or more of a microwavedrive, a flux bias line, a readout line, an electrically grounded line and an input-output feedline via the input-output structure 120.

[0062] The input-output structure 120 comprises a plurality of rigid, preferably planar input-output elements 121. Each input-output element 121 comprises a plurality of transmission lines 122. The inputoutput elements 121 are arranged parallel to one another and the plurality input-output elements 121 preferably extend along a substantial portion of the footprint of the quantum chip modules 110. The input-output elements 121, in an assembled state of the quantum computing assembly 100, may be positioned in a non-parallel plane of the plane in which the patterned layer 112 of the at least one quantum chip module 111 is formed. Nevertheless, the present disclosure is not limited thereto and the at least one input-output element 121 may be positioned substantially parallel to the at least one quantum chip module 110, in accordance with various embodiments.

[0063] Each of the input-output elements may comprise and / or may be substantially formed by silicon, sapphire, beryllium oxide, aluminium nitride, quarts, and / or any other dielectric material.

[0064] One or more of the input-output elements 121 comprised by the input-output structure 120, e.g. one or more transmission lines 122 comprised by an input-output element 121, may comprise one or more functional elements. Said functional elements may comprise a filter, an IR filter, an attenuator, a DC-block, a directional coupler, a tuneable coupler, a circulator, an isolator, a tuneable coupler, and / or an amplifier. Said one or more functional elements may serve to perform certain functions, such as driving, filtering, signal isolation, etc.

[0065] One or more functional elements may comprise substantially classical functional elements, in the sense of functional elements that do not require a quantum effect for their operation and / or which be applied in a context wherein substantially no quantum effects are present. Said classical functional elements may comprise e.g. a filter.

[0066] One or more functional elements may further comprise substantially quantum mechanical functional elements, in the sense of functional elements that require a quantum effect for their operation and / or which are applied in a context wherein substantially some quantum effects are present. Said quantum mechanical functional elements may comprise e.g. a tuneable coupler. Tuneable couplers may comprise a Josephson junction, which depends on a quantum mechanical effect for its operation.

[0067] Having one or more input-output elements 121 comprise a functional element may be advantageous e.g. as the function or functions performed by the one or more functional elements may be performed in relatively close proximity to a quantum chip module 110 and / or one or more quantum circuit components 111, such as superconducting qubits, comprised by the quantum chip module 110, allowing for an efficient, high quality integration of various components and / or functions used for performing quantum computations while minimizing the spatial volume required for such components and / or functional elements performing one or more functions.

[0068] One or more transmission lines 122 comprised by the input-output structure 120 may be configured to perform a certain function. For example, one or more transmission lines 122 comprised by the input-output structure 120 may be microwave drive lines, flux bias lines, and / or feed lines. A transmission line 122 performing such a function, such as a microwave drive line, a flux bias line, and / or a feed line, may be referred to as a functional transmission line. Functional transmission lines may be configured to perform a particular function in order to perform the requisite control, read-out, and / or signal conditioning operations for performing quantum computations. Functional transmission lines may be functionally grouped together in the sense that one or more input-output elements 121 substantially comprise a plurality of a particular type of functional transmission line, the types of functional transmission lines comprising drive lines, flux bias lines, and / or feed lines: this is described in more detail with reference to FIG. 7 below.

[0069] The transmission lines 122 generally extend along the input-output structure 120 in a vertical direction substantially perpendicular to a plane in which the quantum chip modules 110 are arranged. The transmission lines 122 may comprise a conductive or superconductive material disposed on a dielectric substrate. This conductive or superconductive material is preferably applied to form a coplanar waveguide, stripline or microstrip configuration for facilitating the propagation of microwave signals.

[0070] The input-output structure 120 may moreover comprise a connection plane 130 facilitating detachable connectivity of the input-output structure 120 with each of the quantum chip modules 110 of the quantum computing assembly 100.

[0071] Each of the quantum chip modules 110 comprises a substrate layer and a patterned layer 112 arranged on top of the substrate layer. The substrate layer may, for example, comprise silicon, sapphire, beryllium oxide, aluminium nitride, quarts, or any other dielectric material. The patterned layer 112 comprises a fdm of superconducting material such as aluminium, niobium, niobium nitride or niobium titanium nitride. This fdm is applied to the substrate layer and subsequently partially removed to define a predetermined pattern that at least partially defines the quantum computing circuit components 111 and / or electrical connections extending therefrom. The film of superconducting material may be applied to the substrate using any application technique known in the art (e.g. atomic layer deposition, sputtering, evaporation) and then partially removed using a lithography process.

[0072] The quantum computing assembly may further comprise multiple quantum chip modules 110 which are comprised by a stacked structure or stack, wherein the stack may be formed in a direction perpendicular to a plane in which the patterned layer 112 of a quantum chip module 110 in the stack is formed. A single layer in the stack may comprise by a single quantum chip module 110 and / or a single layer in the stack may comprise multiple quantum chip modules 110. The stack may comprise layers, said layers comprising quantum chip modules 110 and / or other subtrates with one or more patterned layers 112, which may serve to mitigate unwanted interference and / or interactions between, on the one hand, one or more quantum chip modules 110 and / or quantum circuit components 111 comprised thereby and, on the other hand, the input-output structure 120 and transmission lines 122 comprised thereby and / or further components that may be comprised by the quantum computing assembly 100. Mitigating unwanted interference and / or interactions may serve to prevent unwanted disruption of the state of the quantum computing assembly 100, such as of the quantum state of one or more superconducting qubits comprised by one or more quantum chip modules 110, e.g. in order to ensure that quantum computations can be performed without being disrupted and possibly being prevented entirely.

[0073] The footprint of a quantum chip module 110 may refer to the spatial surface area occupied by the quantum chip module 110 in the plane in which the patterned layer 112 of the quantum chip module 110 is formed. For a first layer in the stack and a second layer in the stack different from the first layer, the footprints of one or more quantum chip modules 110 in the first layer may be substantially the sameas the footprints of one or more quantum chip modules 110 in the second layer, or the footprints of one or more quantum chip modules 110 in the first layer may be substantially different from the footprints of one or more quantum chip modules 110 in the second layer. For example, the stack may comprise a first layer comprising one or more first quantum chip modules 110 and a second layer comprising one or more second quantum chip modules 110, wherein the footprint of one or more of the second quantum chip modules may be comprised within the footprint of one or more of the first quantum chip modules 110 and / or wherein the footprint of one or more of the first quantum chip modules 110 may be substantially equal to the footprint of one or more of the second quantum chip modules 110. Further, the footprints of the first quantum chip modules 110 and the second quantum chip modules 110 may be arranged in such a manner that the footprint of at least one of the first quantum chip modules 110 substantially overlaps with at least a part of the footprint of more than one of the second quantum chip modules 110 and / or the footprints of the first quantum chip modules 110 and the second quantum chip modules 110 may be arranged in such a manner that the footprint of at least one of the second quantum chip modules 110 substantially overlaps with at least a part of the footprint of more than one of the first quantum chip modules. By allowing for arranging the footprint of the first quantum chip modules 110 arranged on a first layer of the stack and second quantum chip modules 110 arranged on a second layer of the stack to overlap in a variety of ways, there is provided a flexibility and wide variety of design choices that may improve the freedom of connecting and integrating various components comprised by the quantum computing assembly 100.

[0074] In embodiments wherein a stack comprising at least two layers, with at least one of the layers comprising one or more quantum chip modules 110, is formed, a means for vertical transmission of signals through the stack, e.g. a means for transmission of signals between one or more quantum chip modules 110 and / or further layers and / or components comprised by the stack, may be provided. Said means for vertical transmission of signals through the stack may comprise a through-silicon via.

[0075] In embodiments, multiple quantum chip modules 110 may be arranged in a substantially single planar surface, for example, if multiple quantum chip modules 110 are comprised by a single layer of a stack comprising two or more quantum chip modules 110. One or more of the sides and / or edges of one or more quantum chip modules 110 may be in close proximity to one or more sides and / oredges of another quantum chip modules 110 and / or further layers and / or components comprised by a stack. For example, multiple quantum chip modules 110 may be comprised by a single layer in a stack of quantum chip modules 110, said quantum chip modules 110 may be arranged such that at least a part and / or some of their sides and / or edges may be in close proximity.

[0076] Signals may be transmitted laterally between quantum chip modules 110 arranged in a substantially single planar surface and / or having sides and / or edges in close proximity by creating a lateral connection between two or more quantum chip modules 110. Lateral transmission of signals may refer to transmission of signals in a direction parallel to a plane in which the patterned layer 112 of at least one of the quantum chip modules 110 is formed. Signals may be transmitted laterally by creating a lateral connection between one or more quantum circuit components 111 comprised by said quantum chip modules 110, most preferably between qubits. Such lateral connection may be implemented with the use of wirebonds and / or other suitable means of creating a lateral connection between quantum chip modules 110.

[0077] The quantum chip modules 110 each moreover comprise a plurality of connector elements 115 that are preferably arranged on a bottom side opposite the quantum computing circuit components 111. The connector elements 115 are electrically connected to one or more of the quantum computing circuit components 111 of the quantum chip modules 110, for example by means of through-chip vias.

[0078] In an assembled state of the quantum computing assembly 100, the connector elements 115 of the quantum chip modules 110 form electrical connections with connector counter-elements 125 arranged on the connection plane 130. The connector counter-elements 125 are in turn electrically connected to the transmission lines 122 of the input-output elements 121, for example using through- chip vias that extend through the connection plane 130 of the input-output structure 120.

[0079] The pairs of connector elements 115 and the counter-elements 125 each define a detachable coupling structure. The detachable coupling structure is preferably self-aligning during assembly of the quantum computing assembly 100. In accordance with various embodiments, one or both of the connector elements 115 and the connector counter-elements 125 may comprise a protrusion, a recess, a soldering bump, and / or a connection pin for coupling with the other of the connector element 115 and the connector counter-element 125. The connector elements 115 and counter-connector elements 125are configured to engage one another to couple the quantum chip modules 110 with the input-output structure 120 in a detachable manner, without requiring (potentially) destructive connection techniques such as (de)soldering, or deposition / removal of additional conductive material to establish an electrical connection.

[0080] In some embodiments, the connector element 115 and connector counter-element 125 may be detachably engaged. Said detachable engagement may serve to form an electrical connection between the quantum computing circuit component 111 of the at least one quantum chip module 110 and a transmission line 122 comprised by the input-output structure 120. Detachably engaging the connector element 115 and the connector counter-element 125 may refer to the fact that the connector element 115 and the connector counter-element 125 may be engaged, subsequently disengaged, and subsequently engaged again substantially without damage and / or destruction and / or permanent deformation of the connector element 115, preferably the connector counter-element 125, and / or any component and / or element comprised by the connector element 115, preferably the connector counterelement, and / or any further component and / or element comprised by the quantum computing assembly.

[0081] The connector element 115 and a first connector counter-element 125 may be in a first disengaged configuration when the connector element 115 and the connector counter-element 125 are not engaged; subsequently, the connector element 115 and the first connector counter-element 125 may be put into an engaged configuration by engaging the connector element 115 and the first connector counter-element 125; subsequently, the connector element 115 and a second connector counter-element 125 may be put into a second disengaged configuration by disengaging the connector element 115 and the second connector counter-element 125, wherein the second connector counter-element 125 may be the same connector counter-element 125 as the first connector counter-element 125 or the second connector counter-element 125 may be a different connector counter-element 125 than the first connector counter-element 125. Detachably engaging the connector element 115 and connector counterelement 125 may refer to the fact that the second disengaged configuration of the connector element 115 is substantially the same as the first disengaged configuration. Preferably, the second configuration being substantially the same as the first configuration refers to the fact that the connector element 115 and / or any component and / or element comprised by the connector element 115 and / or comprised bythe quantum chip module 110 in the second disengaged configuration are not deformed and / or damaged and / or destroyed with respect to the first disengaged configuration, more preferably so that the connector element 115 may be engaged to a connector counter-element 125 and disengaged from said connector counter-element 125, most preferably repeatedly engaged to and disengaged from one or more connector counter-elements 125, without the connector element 115 and / or any component and / or element comprised by the connector element 115 and / or and / or comprised by the quantum chip module in the second disengaged configuration being deformed and / or damaged and / or destroyed with respect to the first disengaged configuration.

[0082] The quantum chip modules 110 may be coupled and decoupled to / from the input-output structure 120 many times without damage to either the connector elements 115 or the connector counter elements 125. Damage to either of these components 115, 125 may stem from fatigue, i.e. the forming of microscopic cracks that expand slightly every time the quantum chip modules 110 are connected or disconnected to / from the input-output structure 120. Over time, these microscopic cracks may result in a poor electrical coupling between the quantum chip modules 110 and the input-output structure 120.

[0083] To prevent the above, in accordance with various embodiments at least one of the connector elements 115 and the counter-connector elements 125 is spring-loaded and / or comprises a spring element. In these embodiments, the connector elements 115 and / or the connector counter-elements 125 may comprise a spring-loaded connector pin (see for example the embodiment of FIG. 3) or may itself be formed as a spring. In the schematic representations of the quantum computing assembly 100 of FIG.1A to FIG. 1C, this is depicted by the coil spring-shaped connector elements with reference numeral 115. The connector elements 115 and / orthe connector counter-element 125 may comprise, for example, helical spring, a volute spring, a wave spring or a leaf spring.

[0084] Having spring-loaded connector elements 115 and / or connector counter-elements 125 may serve to improve alignment of one or more of the quantum chip modules 110, connection plane 130, routing plane, and / orthe input-output structure 120, wherein the routing plane will be described in more detail with respect to FIG. 7 and FIG. 11 below. Alignment may refer to preventing unwanted tilt of one or more of the quantum chip modules 110, connection plane 130, routing plane, and / or the inputoutput structure 120, in the sense that one or more of the quantum chip modules 110, connection plane130 and routing plane are positioned in one or more planes which are substantially parallel and / or that an input-output element 121 comprised by the input-output structure 120 is positioned in a plane nonparallel to a plane in which one or of the quantum chip modules 110, connection plane 130, and / or routing plane are formed. In particular, as springs, when compressed, exert a spring force, said spring force may serve to align one or more of the quantum chip modules 110 in a plane parallel to the patterned layer 112, connection plane 130, and / or routing plane, and / or in a plane non-parallel to the input-output structure 120, by exerting an excess force when undergoing an excess compression due to misalignment thereof. The alignment induced by springs may be improved by positioning the springs in an evenly spread and / or regular structure, such that the spring force exerted by the springs is substantially evenly spread across a surface of one or more of the quantum chip modules 110, connection plane 130, and / or routing plane, and / or across a side and / or edge of the input-output structure 120, when aligned, e.g. when the connection plane 130 and the surface of one or more of the quantum chip modules 110 are substantially parallel.

[0085] The counter-elements 125 are formed by superconducting protrusions formed of a superconducting material such as aluminium, niobium, niobium nitride and niobium titanium nitride.

[0086] The quantum computing circuit components 111 of the quantum chip modules 110 are thus detachably connected to the transmission lines 122 of the input-output elements 121 via the connector elements 115 and the connector counter-elements 125. Damage to the connector elements 115 and / or the connector counter-elements 125 - which may result from material fatigue or poor alignment of the quantum chip modules 110 and the input-output structure 120 during assembly - is effectively prevented on account at least one of the connector elements 115 and the connector counter-elements 125 being spring-loaded or otherwise comprising a spring element.

[0087] It is noted here that in further alternative embodiments, the connector elements 115 and the connector counter-elements 125 may comprise a recess and a protrusion with neither comprising a spring nor being spring -loaded. In these embodiments, one or both of the connector elements 115 and the connector counter-elements 125 may comprise a conductive material with a relatively low melting point, such as indium, gallium, tin, an alloy comprising indium, gallium and / or tin, or combinations thereof.

[0088] A connector element 115 or connector counter-element 125 comprising one of these conductive materials may heat treated, for example by means of a heat gun. Heating the connector element 115 or connector counter-element 125 in this manner results in the conductive material softening and the microscopic cracks being filled in. As such, the aforementioned connection problems stemming from the formation of these microscopic cracks may be redressed or prevented entirely.

[0089] Still referring to FIG. 1A to 1C, the connector elements 115 and the connector counterelements 125 are preferably arranged in respective, complementary grid formations. In accordance with various embodiments, arranging the connector elements 115 and connector counter-elements 125 in this manner may fulfil several functions with respect to microwave hygiene.

[0090] Firstly, in accordance with preferred embodiments the connector elements 115 and connectorcounter elements 125 are arranged at or within a specific intermediate distance to neighbouring connector elements 115 and connector-counter elements 125. In these embodiments, this positioning of the connector elements 115 and connector-counter elements 125 prevents the intermediate spaces in between the connector elements 115 and connector-counter elements 125 from functioning as resonant cavities at the frequencies utilised by the quantum computing assembly 100. Preferably, the intermediate distance between neighbouring connector elements 115 or connector counter-elements 125 is 600 fm or less, more preferably 300 fm or less, and most preferably 50 fm or less.

[0091] Secondly, at least some of the connector elements 115 and the connector counter-elements 125 may be connected to at least one grounded element of transmission line 122 of the input-output structure 120. In these embodiments, a signal transmission line 122 of the input-output structure 120 is enclosed by neighbouring transmission lines 122 that are connected to an electrical ground. The grounded element of transmission lines 122 may thus form an electromagnetic shield around the signal carrying transmission line 122, which shields the signal carrying transmission line from external electromagnetic interference. Such a configuration is further elucidated here below with reference to FIG. 5C.

[0092] Referring now to FIG. 2A and FIG. 2B, a quantum computing assembly 200 in accordance with various embodiments comprises an input-output structure 220 with spacers 245 interposed between the input-output elements 221. Each of the spacers 245 preferably comprises a planar bodycorresponding to the dimensions of the input-output elements 221. The spacers 245 are preferably stiff to contribute to the overall rigidity of the input-output structure 220 and comprise a predefined thickness to ensure proper alignment of each of the connector counter-elements 225 with the corresponding connector elements of the quantum chip module 210.

[0093] The spacers 245 preferably comprise a dielectric material that does not interfere with the electrical signals propagating through the transmission lines 222 of the input-output elements 221 and quantum chip modules 210, such as silicone. Each input-output element 221 may be associated with one or more spacers 245, with the input-output elements 221 and the spacers 245 preferably being arranged alternately. The spacers 245 may be fixated to neighbouring input-output elements 121, for example by means of an adhesive, soldering or welding.

[0094] In the embodiment of FIG. 2A and FIG. 2B, the connector counter-elements 225 are arranged on the connection plane 230 and each comprise a spring element. Said spring element may be embodied by a e.g. leaf spring or an airbridge of the type commonly used in microwave engineering, as is schematically depicted in FIG. 2A and FIG. 2B. Alternatively, the connector counter-elements 225 may comprise helical spring, a volute spring, a wave spring, and / or one of the conductive materials described here above with reference to FIG. 1A to 1C, including tantalum.

[0095] The connector counter-elements 225 may detachably engage corresponding connector elements comprised by the quantum chip modules 210. While not clearly distinguishable in either FIG. 2A or 2B, in various embodiments said connector elements may comprise a protrusion, a recess, a (superconductive bump, or a connector pin. The connector elements may moreover be spring-loaded, comprise a spring and / or comprise any of the materials stated here above with reference to FIG. 1A to IC and FIG. 3.

[0096] FIG. 3 depicts an example of a spring -loaded element 300 that, in accordance with various embodiments, may embody a spring-loaded connector element 115, 215 or a spring-loaded connector counter-element 125, 225. The spring-loaded element 300 comprises a rigid body 310 forming a connector pin of a conductive material capable of facilitating the propagation of electrical signals, in particular microwave signals.

[0097] The body 310 of the spring-loaded element 300 furthermore comprises a flange 315 that is preferably integrally formed with the body 310. A helical spring 320 abuts the lower side of the flange 315. The connector element 300 may be arranged partially embedded in a quantum chip module 110, 210 or input-output structure 120, 220 with at least part of the body 310 protruding outwardly therefrom . The flange 315 may serve to retain the element 300 in the quantum chip module 110, 210 or inputoutput structure 120, 220 in which the element 300 is embedded. The body 310 and / orthe helical spring 320 of the element 300 is preferably a superconducting material such as aluminium, niobium, niobium nitride, niobium titanium nitride or tantalum. Alternatively, the body 310 and / or the spring element 320 may be provided with a coating of one of these materials. It is also possible to form the body 310 and / or the spring element 320 from a superconducting material and to coat the body 310 and / or the spring element 320 with a non-superconducting (i.e. normal conductive) material, such as gold. In these embodiments, the non-superconducting coating may be applied with a sufficiently reduced thickness for the proximity effect (Holm-Meissner effect) to occur.

[0098] FIG. 4A and 4B schematically depict an example of a quantum computing assembly 400 in accordance with various embodiments. The quantum computing assembly 400 is depicted in an assembled state with a plurality of quantum chip modules 410 detachably connected to the input-output structure 420. Like the embodiment depicted in FIG. 2A and FIG. 2B, the quantum computing assembly 400 of FIG. 4 comprises a connection plane 430 with spring -loaded connector counter-elements 425 that form electrical connections to the connector elements 415 of the quantum chip modules 410. Spacers 445 are arranged in between the input-output elements 445.

[0099] In contrast with the foregoing embodiments, the input-output structure 420 depicted in FIG. 4 furthermore comprises a plurality transverse transmission lines 460. The transverse transmission lines 460 are connected to transmission lines 422 of the input-output elements 421 and extend through the spacers 445, preferably by means of vias.

[0100] In embodiments, one or more input-output elements 421 and / or transmission lines 422 comprised by the input-output structure 420 may be directly and / or indirectly connected to a routing plane and / or a connection plane 430 and / or a quantum chip module 410. A direct and / or indirect connection between one or more input-output elements 421 and a routing plane and / or a connectionplane 430 and / or a quantum chip module 410 may be established using e.g. a through-silicon via. Establishing one or more connections between one or more input-output elements 421 and one or more a routing planes is described in more detail with reference to FIG. 7 below. A direct and / or indirect connection between one or more input-output elements 421 and a patterned layer and / or to a connection plane 430 and / or to a routing plane

[0101] The transverse transmission lines 460 may advantageously increase the degrees of freedom with which routing to and from the quantum chip modules 410 via the transmission lines may be performed. The inclusion of the transverse transmission lines 460 may therefore contribute to resolving the routing issue stemming from the spatial limitations associated with quantum chips having increased numbers of qubits, as described here above. Moreover, some of the vertical transmission lines 422 of different input-output elements 421 may shorted to a common ground by means of the transverse transmission lines 460. Also, in embodiments in which the quantum computing circuit components of the quantum chip modules 410 are qubits, more than one of these qubits may be connected to each other (not shown) via the transverse transmission lines 460. The transverse transmission lines 460 may moreover facilitate coupling between quantum computing circuit components of the quantum chip modules 410 coupled to one another by means of the transverse transmission lines 460.

[0102] Referring now to FIG. 4B, In accordance with various embodiments the transmission lines 422 of the connector elements 421 may comprise at least one functional element 465. The functional elements 465 may be any element that interacts with, or processes, a signal propagating through the transmission lines 422 of the input-input structure 420. The functional elements 465 may include any element of a group of elements that comprises at least one of a filter, an attenuator, a DC-block, an IR filter, a directional coupler, a transmission line, a circulator and an amplifier as the functional element. The functional elements 465 may be arranged in relatively close proximity to the quantum computing circuit components of the quantum chip modules 410, which at least for certain types of functional elements 465 is advantageous and may be associated with e.g. decreased signal losses and improved noise suppression.

[0103] FIG. 5A and FIG. 5B schematically depict a quantum computing assembly 500 in accordance with yet further preferred embodiments. In contrast to the embodiments of the quantum computingassemblies 100, 200, 400 of the foregoing figures, the quantum computing assembly 500 depicted in FIG. 5 A and 5B does not comprise a connection plane.

[0104] Referring now to FIG. 5A, the quantum computing assembly 500 comprises and input-output structure with input-output elements 521 and spacers 545. The spacers 545 are under dimensioned relative to the input-output elements 521 resulting in the input-output elements 521 to protrude relative to the spacers 545 at the top near the interface with the quantum chip modules 510.

[0105] Referring now to FIG. 5B, the input-output elements 521 each comprise a plurality of protruding tabs 527. The transmission lines 522 of the input-output structure 520 extend vertically upward along the protruding tabs 527 and debouch into respective connector counter-elements 525 arranged on top surfaces of the protruding tabs 527. In the embodiment of FIG. 5A and 5B, the connector counter-elements 525 are embodied by conductive (solder) bumps. Alternatively, the connector counter-elements may be spring-loaded or comprise a spring as described here above with reference to the foregoing figures. The counter-element 525 may comprise any one or more of the conductive materials described here above with reference to the foregoing figures.

[0106] In an assembled state of the quantum computing assembly 500, the spring -loaded connector elements 515 of the one or more quantum chip modules 510 abut respective corresponding connector counter-elements 525, thereby forming an electrical connection between the quantum computing circuit components 511 and the transmission lines 522 forming the transmission lines of the input-output elements 521. The spacers 545 and the tabs 527 of the input-output elements 521 are preferably dimensioned such that the grid-like arrangement of the connector counter-elements 525 may be aligned with the respective grid-like arrangement of the connector elements 515.

[0107] FIG. 5C shows a top-down detail of the input-output structure 520 of FIG. 5A and 5B. From FIG. 5C, it can be discerned that the connector counter-elements 525 are arranged in a grid-like arrangement corresponding to a grid-like arrangement of the connector elements 515 on each of the quantum chip modules 510. Each of the connector counter-elements 525 preferably comprises a flat or concave top surface which a corresponding connector element 515 may engage.

[0108] The centrally arranged connector counter-element 525' may be a signal connector counterelement 525' and the neighbouring connector counter-elements 525 are connected to an electrical ground.

[0109] The neighbouring connector counter-elements 525 may electromagnetically shield the centrally arranged connector counter-element 525' and thereby prevent the occurrence of electromagnetic crosstalk between the centrally arranged connector counter-element 525' and peripheral equipment or other circuit components. As such, the arrangement of the connector counter-elements may advantageously improve microwave hygiene and thereby the operation of the quantum computing assembly.

[0110] Moreover, in various embodiments an intermediate distance between each of the connector counter-elements 525, 525' is preferably 700 fm or less, more preferably 300 fm or less, and most preferably 50 fm or less; or otherwise be dimensioned in consideration of one or more signal frequencies that may be utilised by the quantum computing assembly 500. In these embodiments, a yet further increased degree of microwave hygiene may be achieved because standing waves that may form within these intermediate spaces are pushed to higher frequencies.

[0111] It will be appreciated that various features described here above in accordance with foregoing embodiments may be combined or integrated with the quantum computing assembly 500 of FIG. 5 A to 5C. These include e.g. the transverse transmission line and / or the functional elements 465 of the embodiment shown in FIG. 4.

[0112] FIG. 6A and Fig. 6B show alternative embodiments of a quantum computing assembly 600 in accordance with the present disclosure.

[0113] In contrast to the foregoing embodiments, the quantum computing assembly 600 of FIG. 6A comprises no less than two input-output structures 620 that are detachably connected to a single quantum chip module 610 comprising a plurality of quantum computing circuitry components 611, such as superconducting qubits.

[0114] Although not shown in FIG. 6A for the sake of intelligibility of the drawing, the quantum computing assembly 600 may comprise any one of the connector elements and connector counter-elements described here above with reference to the embodiments of the quantum computing assembly depicted in FIG. 1 to 5C. As such, the quantum chip module 610 is detachably connected to both of the input-output structures 620 situated on the left-handed and right-handed sides of FIG. 6A.

[0115] It is also possible that both input-output structures 620 are detachably connected to two or more quantum chip modules 610, which is the case for the embodiment of the quantum computing assembly 600 depicted in FIG. 6B. In FIG. 6B, the input-output structure 620 on the left-handed side of the figure is detachably connected to the quantum chip module 610 arranged on the left and the centrally arranged quantum chip module 610. Similarly, the input-output structure 620 on the right-handed side of the figure is detachably connected to the centrally arranged quantum chip module 610 and to the quantum chip module 610 arranged on the right.

[0116] It will be appreciated that the embodiments of FIG. 6A and 6B - as well those of the foregoing and following figures - are merely exemplary, and that the scope of the present disclosure is not limited to quantum computing assemblies 600 any number of input-output structures 620 or quantum chip modules 610.

[0117] FIG. 7 shows a schematic of a quantum computing assembly 700 in accordance with various embodiments. Again, the quantum computing assembly 700 comprises a plurality of quantum chip modules 710 that each comprise qubits 612 and are detachably connectable to an input-output structure 720. The input-output structure 720 comprises a plurality of input-output elements 721 with transmission lines 722 and spacers 745 arranged between the input-output elements 721.

[0118] The quantum computing assembly 700 of FIG. 7 moreover comprises a routing plane 732 arranged in between the plurality of input-output elements 721 and the connection plane 730. The routing plane 732 electrically connects the busses forming the transmission lines 722 of the input-output elements 721 with the connector counter-elements 725 of the connection plane 730 via a plurality of routing lines 733, preferably using vias. The routing plane 732 may be arranged substantially parallel to a plane in which each of the chip modules 710 are arranged in an assembled state of the quantum computing assembly 700. The routing lines 733 may extend in any vertical or horizontal direction within the plane of the routing plane 732. The routing plane 732 may thus facilitate long distance routing between circuit components - including between qubits - that are arranged at a distance from one anotheror are comprised by different quantum chip modules 710. Also, the routing lines 733 of the routing plane 732 may connect circuit components with distant transmission lines 722 of the input-output structure 720. For example, a circuit component 711 located on the quantum chip module 710 on the left-hand side of FIG. 7 may be connected to a transmission line 722 on the right-hand side via the routing plane routing plane 732. In some embodiments, at least some of the transmission lines of the routing plane 732 may be connected to an electrical ground.

[0119] The routing plane 732 may comprise a substrate with a first surface and a second surface substantially generally opposite and parallel to the first surface. The substrate may comprise silicon, sapphire, beryllium oxide, aluminium nitride, quarts, and / or any other dielectric material.

[0120] A routing plane 732, such as a routing plane 732 comprised by an input-output structure 720, may be positioned in a plane non-parallel to a plane in which one or more of the input-output elements 721 is formed.

[0121] The routing plane may comprise one or more routing lines 733. Routing lines 733 may extend for a finite distance along a direction parallel to the plane in which the routing plane 732 is formed. Routing lines 733 may be transmission lines configured to transmit signals though the routing plane 732, including in directions parallel to the first surface and / or the second surface of the routing plane 732. Routing signals may refer to transmission of signals by one or more routing lines 733 comprised by a routing plane 732.

[0122] In embodiments, one or more input-output elements 721 and / or transmission lines 422 comprised by the input-output structure 720 may be directly and / or indirectly connected to a routing plane 732, connection plane 730, and / or a quantum chip module 710. Directly and / or indirectly connecting one or more input-output elements 721 comprised by an input-output structure 720 to a routing plane 732 may enable routing of signals from one or more components comprised by the one or more input-output elements 721, such as one or more transmission line 722 comprised by one or more input-output elements 721, to one or more components comprised by the routing plane 732 and / or one or more components comprised by e.g. a connection plane 730 and / or a quantum chip module 710, such as a qubit comprised by a quantum chip module 710. By connecting one or more input-output elements721 comprised by an input-output structure 720 to a routing plane 732, signals may be routed betweencomponents comprised by one or more input-output elements 721 and components comprised by e.g. a connection plane 730 and / or quantum chip module 710 via the routing plane 732.

[0123] The routing line 733 may comprise a first end and a second end different from the first end. The first end and / or second end may be connected, preferably electrically connected, to a connector element 715 and / or to a quantum circuit component 711, and the first and / or second end may be connected to the connector counter-element 725 and / or to a component, preferably a transmission line 722, comprised by an input-output element 720.

[0124] The second end of the routing line 733 may be disposed at a position displaced with respect to the first end by a finite distance along a direction parallel to the plane in which the routing plane 732 is positioned. The finite distance may be is at least [distance in mm and perhaps in e.g. ‘radius’ of a qubit] .

[0125] The routing plane 732 may comprise a first connection point comprised by the first surface or the second surface. The routing plane 732 may further comprise a second connection point comprised by the first surface or the second surface. The second connection point may be disposed at a position displaced with respect to the first connection point by a finite distance along a direction parallel to the first surface and / or the second surface. The first end of the routing line 733 may be connected to the first connection point and the second end of the routing 733 may be connected to the second connection point, wherein said connection may serve to electrically couple the first connection point and the second connection point.

[0126] One or more routing lines 733 may be transmission lines configured to transmit signals, wherein signals may be transmitted between one or more quantum circuit components 711 comprised by one or more quantum chip modules 710, and / or signals may be transmitted between, on the one hand, one or more quantum circuit components 711 comprised by one or more quantum chip modules 710 and, on the other hand, one or more components, such as transmission lines 722, comprised by one or more input-out elements 721 comprised by one or more input-output structures 720, and / or signals may be transmitted between two or more components, such as transmission lines 722, comprised by one or more input-out elements 721 comprised by one or more input-output structures 720.

[0127] A routing line 733 may be a transmission line be configured to transmit signals between, on the one hand, one or more first components and, one the other hand, one or more second components. For example, a routing line 733 may be configured to transmit signals between, on the one hand, a single component, such as a first quantum circuit component 711 or a first transmission line 722 and, on the other hand, a single component, such as a second quantum circuit component 711 or a second transmission line 722. Further, a routing line 733 may be configured to transmit signals between, on the one hand, a single component, such as a first quantum circuit component 711 or a first transmission line 722 and, on the other hand, a plurality of components, such as a plurality of second quantum circuit components 711 or a plurality of second routing lines 722. Further, a routing line 733 may be configured to transmit signals between, on the one hand, a plurality of components, such as a plurality of first quantum circuit components 711 or a plurality of first routing lines 722 and, on the other hand, a plurality of components, such as a plurality of second quantum circuit components 711 or a plurality of second routing lines 722.

[0128] Two or more routing lines 733 comprises by a routing plane 732 may be configured to cross over each other at a cross-over, which may refer to the fact that the position along a plane parallel to the first surface and / or the second surface of the routing plane 732 of a first routing line 733 comprised by the routing plane 732 may be substantially the same as the position along a plane parallel to the first surface and / or the second surface of the routing plane 732 of a second routing line 733 comprised by the routing plane 732. Preferably, the position perpendicular to a plane parallel to the first surface and / or the second surface of the routing plane 732 of the first routing line 733 comprised by the routing plane 732 may be substantially different from the position perpendicular to a plane parallel to the first surface and / or the second surface of the routing plane 732 of a second routing line 733 comprised by the routing plane 732, so that the first routing line 733 and the second routing line 733 may cross over each other at the crossover substantially without the first routing line 733 and the second routing line 733 intersecting.

[0129] One or more routing planes 732 comprised by the quantum computing assembly 700 may be configured to allow for routing signals to and from functional elements, e.g. functional elements comprised by one or more input-output elements 721 comprised by the input-output structure 700, suchas a filter, an IR filter, an attenuator, a DC-block, a directional coupler, a tuneable coupler, a circulator, an isolator, a tuneable coupler, and / or an amplifier.

[0130] One or more routing planes 732 may be configured to allow for routing signals to and from functional transmission lines that may be functionally grouped together on one or more input-output elements 721 comprised by an input-output structure 720. A functional transmission line may be a transmission line configured to perform a specific function, examples including a microwave drive line, a feed line, and / or a flux bias line, as is explained with reference to FIG. 1 above. Functional transmission lines may be grouped together on one or more input-output elements 721 in the sense that one or more input-output elements may comprise substantially a particular type of functional transmission line, the types of functional transmission lines including microwave drive lines, feed lines, or flux bias lines. Grouping functional transmission lines on one or more input-output elements 721 allows manufacturing standardized input-output elements 721 substantially comprising a particular type of functional transmission line, which may serve to lower manufacturing costs, improve yield and quality, and make optimal use of the space available on input-output elements.

[0131] If an input-output element substantially comprises a single type of functional transmission line, the footprint of said functional transmission lines may not overlap with the footprint of one or more quantum circuit components 711 to which the functional transmission lines should connect and / or to and from which signals should be sent with the use of said functional transmission lines. One or more routing planes 732 may then be used to connect between, on the one hand, one or more functional transmission lines which have been functionally grouped on one or more input-output elements 721 and, on the other hand, one or more further components to which the functional transmission lines should be connected, e.g. one or more quantum circuit components 711 comprised by one or more quantum chip modules 710. In this manner, signals may be routed to and / or from an input-output structure 720, e.g. a substantially standardized input-output structure 720 with functionally grouped functional transmission lines, from and / or to further components comprised by the quantum computing assembly 700, e.g. from and / or to one or more quantum circuit components 711 comprised by one or more quantum chip modules 710. One ormore routing planes 732 may thus be configured to efficiently rout signals between, on the one hand, e.g. a substantially standardized input-output structure 720 and,on the other hand, one or more quantum circuit components 711 comprised by one or more quantum chip modules 710, including quantum chip modules 710 which may be non-standardized and / or designed in a particular manner to serve the quantum computational needs of the user.

[0132] In the embodiment of the quantum computing assembly 700, the routing plane 732 is fixedly connected to the input-output elements 721 of the input-output structure, preferably through vias and / or soldering. However, the present disclosure is not limited thereto. In accordance with various alternative embodiments, the routing plane 732 may be connected to said input-output elements 721 in a detachable manner. In these embodiments, additional connector elements (not shown) may be disposed on a bottom surface of the routing plane 732 that detachably engage corresponding additional connector counterelements (not shown) disposed on the input-output elements 721, resulting in a connection structure similar to the connection structure between the quantum chip modules and the input-output structure described here above. The additional connector elements and additional connector counter-elements may comprise, for example, recesses, bumps, springs and / or spring-loaded elements, or any combination thereof.

[0133] Moreover, in yet further alternative embodiments more than one routing plane 732 may be provided, to form a stack of two or more routing planes 732 that greatly increases the degrees of freedom with which routing between the transmission lines 722 and the circuit components 711 can be performed. In some embodiments, these routing planes 732 are fixedly connected to one another. Alternatively, the multiple routing planes 732 may comprise connector elements and connector counterelements such that they are detachably connected to one another as described here above. In embodiments wherein the routing plane 732 is combined with the transverse transmission lines 460 of the embodiment of the embodiment of FIG. 4, the transverse transmission lines 460 may be arranged externally of the routing plane 732.

[0134] In embodiments wherein a stack comprising two or more routing planes 732 is formed, the stack may be formed in a direction normal to a surface of one of the routing planes 732 on which one or more superconducting qubits are formed. In embodiments wherein a stack of two or more routing planes 732 is formed, a means for vertical transmission of signals through the stack of two or more routing planes 732, i.e. a means for transmission of signals between one or more routing planes 732comprised by the stack, may be provided. Said means for vertical transmission of signals through the stack of two or more routing planes 732 may comprise a through-silicon via.

[0135] In embodiments wherein a stack comprising two or more routing planes 732 is formed, a single layer in the stack may comprise a single routing plane 732 and / or a single layer in the stack may comprise multiple routing planes 732. The stack may comprise layers, said layers comprising routing planes 732 and / or other semiconductor layers, which may serve to mitigate unwanted interference and / or interactions between, on the one hand, one or more routing planes 732 and / or routing lines 733 comprised thereby and, on the other hand, the input-output structure 720 and transmission lines 722 comprised thereby, one or more quantum chip modules 710 and quantum circuit components 711 comprised thereby, and / or further components that may be comprised by the quantum computing assembly 700. Mitigating unwanted interference and / or interactions may serve to prevent unwanted disruption of the state of the quantum computing assembly, such as of the quantum state of one or more superconducting qubits comprised by one or more quantum chip modules 110, e.g. to ensure that quantum computations can be performed without being disrupted and possibly being prevented entirely.

[0136] The footprint of a routing plane 732 may refer to the spatial surface area occupied by the quantum chip module 710 in a plane parallel to the first surface and / or the second surface of the routing plane 732. For a first layer in the stack and a second layer in the stack different from the first layer, the footprints of one or more routing planes 732 in the first layer may be substantially the same as the footprints of one or more routing planes 732 in the second layer, or the footprints of one or more routing planes 732 in the first layer may be substantially different from the footprints of one or more routing planes 732 in the second layer. For example, the stack may comprise a first layer comprising one or more first routing planes 732 and a second layer different from the first layer and comprising one or more second routing planes 732, wherein the footprint of one or more of the second routing planes 732 may be comprised within the footprint of one or more of the first routing planes 732 and / or wherein the footprint of one or more of the first routing planes 732 may be substantially equal to the footprint of one or more of the second routing planes 732. Further, the footprints of the first routing planes 732 and the second routing planes 732 may be arranged in such a manner that the footprint of at least one of the first routing planes 732 substantially overlaps with at least a part of the footprint of more than one ofthe second routing planes 732 and / or the footprints of the first routing planes 732 and the second routing planes 732 may be arranged in such a manner that the footprint of at least one of the second routing planes 732 substantially overlaps with at least a part of the footprint of more than one of the first routing planes 732. By allowing for arranging the footprint of the first routing planes 732 arranged on a first layer of the stack and second routing planes 732 arranged on a second layer of the stack to overlap in a variety of ways, there is provided a flexibility and wide variety of design choices that may improve the freedom of connecting and integrating various components comprised by the quantum computing assembly 700.

[0137] In an assembled state of the quantum computing assembly 700, the footprint of, on the one hand, one or more routing planes 732, possibly comprised by a stack comprising one or more routing planes 732 and, on the other hand, one or more quantum chip modules 710, possibly comprised by a stack comprising one or more routing planes 710, may and / or may not substantially overlap. With reference to FIG. 7, the footprint of the routing plane 732 substantially overlaps with the combined footprint of the four quantum chip modules 710 indicated in FIG. 7, such that the footprint of each of the four quantum chip modules 710 occupies one of the four rectangular quadrants comprised by the footprint of the routing plane 732.

[0138] In general, the footprints of one or more of the routing planes 732 may be substantially equal to the footprints of one or more of the quantum chip modules 710 and / or footprints of one or more of the routing planes 732 may be substantially different from the footprints of one or more of the quantum chip modules 710. In embodiments, the footprint of one or more routing planes 732 may be comprised within the footprint of one or more quantum chip modules 710 and / or the footprint of one or more quantum chip modules 710 may be comprised within the footprint of one or more routing planes 732. Further, the footprints of the one or more routing planes 732 and the footprints of one or more quantum chip modules 710 may be arranged in such a manner that the footprint of at least one of the routing planes 732 substantially overlaps with at least a part of the footprint of more than one of the quantum chip modules 710 and / or the footprints of the one or more routing planes 732 and the quantum chip modules 710 may be arranged in such a manner that the footprint of at least one of the quantum chipmodules substantially overlaps with at least a part of the footprint of more than one of the routing planes 732.

[0139] A footprint of an input-output structure 720 may refer to the spatial surface area occupied by the input-output structure 720 in a plane non-parallel to a plane which an input-output element 721 comprised by the input-output structure is formed, preferably in a plane perpendicular to a plane in which the input-output element 721 is formed and / or in a plane parallel to the first surface and / or the second surface of a routing plane 732. In an assembled state of the quantum computing assembly 700, the footprint of, on the one hand, one or more routing planes 732, possibly comprised by a stack comprising one or more routing planes 732 and, on the other hand, one or more input-output structures 720, may and / or may not substantially overlap.

[0140] In general, the footprints of one or more of the routing planes 732 may be substantially equal to the footprints of one or more of the input-output structure 720 and / or footprints of one or more of the routing planes 732 may be substantially different from the footprints of one or more of the input-output structure 720. In embodiments, the footprint of one or more routing planes 732 may be comprised within the footprint of one or more input-output structure 720 and / or the footprint of one or more input-output structure 720 may be comprised within the footprint of one or more routing planes 732. Further, the footprints of the one or more routing planes 732 and the footprints of one or more input-output structure 720 may be arranged in such a manner that the footprint of at least one of the routing planes 732 substantially overlaps with at least a part of the footprint of more than one of the input-output structure 720 and / or the footprints of the one or more routing planes 732 and the input-output structure 720 may be arranged in such a manner that the footprint of at least one of the quantum chip modules substantially overlaps with at least a part of the footprint of more than one of the routing planes 732.

[0141] In embodiments wherein a stack comprising at least two layers, with at least one of the layers comprising one or more routing planes 732, is formed, a means for vertical transmission of signals through the stack, i.e. a means for transmission of signals between one or more routing planes 732 and / or further layers and / or components comprised by the stack, may be provided. Said means for vertical transmission of signals through the stack may comprise a through-silicon via.

[0142] In embodiments, multiple routing planes 732 may be arranged in a substantially single planar surface, for example, if multiple routing planes 732 are comprised by a single layer of a stack comprising two or more routing planes 732. One or more of the sides and / or edges of one or more routing planes 732 may be in close proximity to one or more sides and / or edges of another one or more routing planes 732 and / or further layers and / or components comprised by a stack. For example, multiple routing planes 732 may be comprised by a single layer in a stack comprising routing planes 732, said routing planes 732 and may be arranged such that at least a part and / or some of their sides and / or edges may be in relatively close proximity to each other.

[0143] Signals may be transmitted laterally between two or more routing planes 732 and / or between one or more routing planes 732 and one or more further layer and / or components arranged in a substantially single planar surface and / or having sides and / or edges in close proximity. Lateral transmission of signals may refer to transmission of signals in a direction parallel to the first surface and / or the second surface of at least one of the routing planes 732. Signals may be transmitted laterally by creating a lateral connection between two or more routing planes 732 and / or between one or more routing planes 732 and one or more further layer and / or. Such lateral connection may be implemented with the use of wirebonds and / or other suitable means of creating a lateral connection between routing planes 732.

[0144] One or more routing planes 732 may comprise one or more functional elements. Said functional elements may comprise a filter, an IR filter, an attenuator, a DC-block, a directional coupler, a tuneable coupler, a transmission line, a circulator, an isolator, a drive line, a flux bias line, and / or an amplifier. Said one or more functional elements may serve to perform certain functions, such as driving, filtering, signal isolation, etc. Having one or more routing planes 732 comprise a functional element may be advantageous e.g. as the function or functions performed by the one or more functional elements may be performed in relatively close proximity to a quantum chip module 710 and / or one or more quantum circuit components 711, such as superconducting qubits, comprised by the quantum chip module 710. Having a routing plane 732 comprise a functional element may help reduce the length of transmission lin connecting a quantum circuit component 711 and a functional element to which it is connected, which may e.g. reduce disturbances that occur more frequently in longer transmission line,such as unwanted interaction with the environment and. or the occurrence of standing waves in the transmission lines.

[0145] When disposing one or more functional elements on a routing plane 732, such functional elements may be configured such that they occupy a reduced spatial volume. In particular, functional elements may be comprised by and / or integrated into one or more routing planes 732 using lithographic methods, which allows components to be constructed at smaller sizes and / or in such a manner that they occupy reduced spatial volume as compared to using individual, bulky components not comprised by and / or integrated into a routing plane. Having one or more routing planes comprise one or more functional elements thus allows integrating a larger number of functional components at close proximity to quantum circuit components 711, allowing for an efficient, high quality integration of functional elements the spatial volume required for functional elements.

[0146] A filter comprised by one or more routing planes 732 may serve to filter out unwanted signals and / or noise at relatively close proximity to one or more quantum chip modules 710 and / or the quantum circuit components 711 comprised thereby. Disposing one or more filters on one or more routing planes 732 may be used for efficiently integrating filtering of unwanted signal and / or noise so as to e.g. prevent quantum circuit components 711 from being disturbed and thereby disrupting a quantum computation and / or preventing it from being performed.

[0147] One or more tuneable couplers comprised by a one or more routing planes 732 may serve to establish a connection between two or more quantum circuit component 711, such as superconducting qubits, comprised by one or more quantum chip modules 710. A connection between superconducting qubits implemented with the use of a tuneable coupler may serve to allow one or more first quantum circuit components 711 and one or more second quantum circuit components 711 to exchange signals and / or interact with each other whilst bypassing further quantum circuit components 711 that may be disposed in between the one or more first and the one or more second quantum circuit components 711. The one or more first quantum circuit components 711 and the one or more second quantum circuit components 711 may be disposed on the same quantum chip module 710 and / or the one or more first quantum circuit components 711 and the one or more second quantum circuit components 711 may be disposed on different quantum chip modules 710. Establishing a connection between the one or morefirst and the one or more second quantum circuit components 711 using one or more tuneable couplers allows quantum circuit components 711 to be connected and / or interact with each other with greater flexibility, allowing for more efficient means for performing quantum computations, e.g. by precluding the need to perform additional operations, such as quantum swap gates, which may cost additional resources and introduce additional errors, in order to allow one or more first quantum circuit components 711 and one or more second quantum circuit components 711 to exchange signals and / or interact with each other.

[0148] The routing plane 732 may be fixedly connected to the connection plane 730 and / or the inputoutput elements 721, for example by means of soldering, welding or application of an adhesive. The connector counter-elements 725 are preferably connected to the routing lines 733 using through-chip vias.

[0149] In the above -de scribed embodiments, at least one of the connector elements and the connector counter- is spring-loaded, comprises a spring element and / or comprises indium, gallium, tin or an alloy comprising indium, gallium and / or tin. In these embodiments, electrical coupling between the connector elements and connector counter-elements may be improved further by exerting a downward force on each of the quantum chip modules in the direction of the input-output structure. This results in the quantum chip modules being pressed against the input-output structure, resulting in improved electrical coupling. FIG. 8 and FIG. 9A to FIG. 9C illustrate additional exemplary embodiments of a quantum computing assembly with improved electrical coupling.

[0150] Referring now to FIG. 8, a quantum computing assembly 800 according to various embodiments comprises a plurality of quantum chip modules 810 comprising circuitry components 811, wherein the quantum chip modules 810 are detachably connected to an input-output structure via respective connector elements and connector counter-elements. It will be appreciated that any of the connector elements and connector counter-elements may be embodied as described here above with reference to the foregoing figures.

[0151] In FIG. 8, the input-output structure of the quantum computing assembly 800 is occluded by a housing 801 with a plurality of side walls 802 that at least partially enclose the input-output structure.The sidewalls 802 of the housing 801 are preferably made of a highly thermally conductive materialsuch as copper, and may optionally be coated with a protective coating. When the quantum computing assembly 800 is placed within a cryostat and cooled to its operating temperature within the mK range, heat dissipates from the quantum computing assembly 800 via the sidewalls 802 of the housing 801. As such, the housing 801 may aid in the cooling of the quantum computing assembly 800.

[0152] The housing 801 moreover comprises a lid 803 that may arrangeable on top of the sidewalls 802 and fixated using fastening means 905. The lid 803 is preferably made from the same highly thermally conductive material of the side walls 802 of the housing 801, such that the lid 803 may contribute to the dissipation of heat when the quantum computing assembly 800 is cooled to its operating temperature. The sidewalls 802 and the lid 803 may moreover shield the quantum computing assembly 800 from its environment, thereby protecting it from e.g. electromagnetic interference, which may otherwise interfere with the operation of the quantum computing assembly 800.

[0153] In an assembled state of the quantum computing assembly 800 as depicted in FIG. 8, the quantum chip modules 810 are coupled to the input-output structure and the lid 803 is arranged on the sidewalls 802 of the housing 801. In this assembled state, the lid 803 exerts a downward force on each of the quantum chip modules 810 directed toward the input-output structure. The lid 803 therefore ensures adequate electrical coupling between the quantum chip modules 810 and the input-output structure in the assembled of the quantum computing assembly 800, while simultaneously still allowing for quantum chip modules 810 to be selectively detached from the quantum computing assembly 800 as described here above.

[0154] FIG. 9A shows a schematic of a quantum computing assembly 900 in accordance with various embodiments. The embodiment of the quantum computing assembly 900 comprises a plurality of quantum chip modules 910, with each quantum chip module 910 comprising a plurality of quantum computing circuit components 1011. The quantum chip modules 910 are detachably connected to an input-output structure enclosed by thermally conductive sidewalls 902 of a housing 901.

[0155] Each of the quantum chip modules 910 comprises a plurality of protruding tabs 908 that are preferably arranged along respective peripheries of the quantum chip modules 910. The protruding tabs 908 may also be connected to, or integrated with, a respective chip packaging (not shown) of each of the quantum chip modules 910.

[0156] The quantum computing assembly 900 moreover comprises a retaining element 905. The retaining element 905 comprises a plurality counter-tabs 909 configured to engage each of the tabs 908 of the quantum chip modules 910, in an assembled state of the quantum computing assembly 900. In this assembled state, the tabs 908 and counter-tabs 909 engage one another to press the quantum chip modules 910 downward against the input-output structure. As such, improved electrical coupling between the quantum chip modules 910 and the input-output structure via the connector elements and connector counter-elements is achieved.

[0157] FIG. 9B and FIG. 9C show a detail of an example of a fastening means 909 tab 909 and a counter-tab 908 in disengaged and engaged states, respectively. The tab 908 and counter-tab 909 preferably comprise interlocking shapes and preferably exhibit a degree of flexibility allowing for the tabs 909 and counter-tabs 908 to be selectively brought into engaged and disengaged states. In accordance with various exemplary embodiments, each tab 908 may comprise a latch 1007 arranged on a far end of the tab 908. When one of the quantum chip modules 910 is connected to the input-output structure, the tab 909 and counter-tab 908 flex and slide past one another until the latch 1007 engages with, and locks onto, the latch 1006 of the counter-tab 909.

[0158] Each of the tabs 908 and counter-tabs 909 may be made from, for example, a polymer, metal or a composite material. The retaining element 905 may be arrangeable on the side walls 902 of the housing 901 of the quantum computing assembly 900 and fixedly mounted thereon using fastening means.

[0159] It will be appreciated that various modifications may be made to the retaining element 905 shown in FIG. 9B and 9C, without departing from the broader underlying technical teaching disclosed here. For example, the positioning of the tabs 908 and counter-tabs 909 may be reversed and / or comprise alternative shapes. It is moreover, for example, conceivable that the retaining element 905 is integrated with the input-output structure of the quantum computing assembly 900. In such embodiments, the tabs 909 may be arranged on, and upwardly extend from, a connection plane, a spacer or input-output element as described here above with reference to the foregoing figures.

[0160] The various above-described embodiments of a quantum computing assembly may be comprised by an overarching quantum computing system that additionally comprises various auxiliarydevices for performing quantum computations. FIG. 10 shows a non-limitative exemplary schematic of such a quantum computing system in accordance with various embodiments.

[0161] The quantum computing system 1050 is at least partially arranged within a dilution refrigerator 1070 that comprises different temperature regions. These temperature regions are indicated by the vertical dashed lines in FIG. 10. The coolest temperature region having a temperature of only a few mK is situated at the right-handed side of FIG. 10 and houses at least one quantum circuitry component 1011. The quantum circuitry component 1011 may be one of multiple quantum circuitry components 1011 comprised by a quantum chip module in accordance with the present disclosure. The quantum computing system 1050 may comprise multiple quantum chip modules. The quantum circuitry component 1011 is preferably a superconducting qubit that is connected to a drive line 1012, a feedline 1013 and a flux bias line 1014.

[0162] The quantum circuitry component 1011 is connected to an isolator 1015 that prevents reflected signals from propagating back to the sensitive quantum circuitry component 1011. Moreover, a directional coupler 1071 and a parametric amplifier 1083 are arranged downstream of the isolator 1015.

[0163] The parametric amplifier 1083 is configured to amplify a signal emitted by the circuitry component 1011 using parametric amplification based on a pump signal. The pump signal is emitted by a pump 1039 that is connected to the directional coupler 1071, preferably via a plurality of filters 1041, 1042, 1043. At the parametric amplifier 1071, the signal emitted by the circuitry component 1011 and the pump signal non-linearly interact with one another, resulting in a transfer of energy from the pump signal to the signal circuitry component 1011 and thereby in amplification of the latter.

[0164] Further isolators 1025, 1035 and a low / high pass filter 1008 are arranged downstream of the parametric amplifier 938, followed by additional (non-parametric) amplifiers 1007, 1017. The additional amplifiers may, for example, be high-electron-mobility transistors (HEMTs). The additional amplifiers 1007, 1017 are in turn connected to a sensor 1006 configured to measure the amplified signal emitted by the circuit component 1011 to, for example, infer a quantum state of the circuit component 1011.

[0165] In FIG. 10, reference numeral 1000 indicates some of the components of the quantum computing system 1050 that may be comprised by the quantum computing assembly of the foregoingfigure. For example, the quantum circuit components 1011 may be comprised by any one of the quantum chip modules of the here above elucidated embodiments. Moreover, various components of the quantum computing assembly 1050 may be comprised by the quantum computing assembly of the embodiments depicted in the foregoing figures. For example, the filters 1041, 1042, 1043, the isolators 1015, 1025, 1035, the directional coupler 1071 and the parametric amplifier 1083 may each constitute functional elements 465 which, in accordance with the embodiment of the quantum computing assembly 400 shown in FIG. 4, may be included in the input-output structure 420.

[0166] FIG. 11 shows a routing plane 1132 according to an embodiment. The routing plane 1132 comprises a substrate with a first surface 1141 and a second surface 1142 substantially opposite and parallel to the first surface 1141. The substrate of the routing plane 1132 may comprise silicon, sapphire, beryllium oxide, aluminium nitride, quartz, and / or any other, preferably dielectric, material.

[0167] A routing plane may be constructed to have a sufficient spatial extension in a direction orthogonal to the first surface and / or the second surface and / or may comprise materials and / or layers that may help prevent one or more routing lines 1133 and / or further components comprised by the routing plane 1133 to be subjected to unwanted disruption and / or interaction with further components comprised by e.g. the routing plane 1132, a quantum chip modules, and / or an input-output element. This may help prevent unwanted effects such as qubit decoherence. What constitutes the sufficient spatial extension in this context depends on factors including the interaction strength, presence of unwanted signals e.g. due to interaction with the environment, and / or material comprised by the routing plane 1132, etc.

[0168] The first surface 1141 and / or the second surface 1142 may comprise a first connection point 1151. The first surface 1141 and / or the second surface 1142 may further comprise a second connection point 1152. The second connection point 1152 may be disposed at a position displaced with respect to the first connection point 1151 by a finite distance 1161 along a direction parallel to the first surface 1141.

[0169] A second connection point 1152 comprised by the second surface 1142 may also be disposed at a position that is substantially not displaced with respect to a first connection point 1151 comprised by the first surface 1141 by a finite distance along a direction parallel to the first surface 1141. Indeed,the second connection point 1152 comprised by the second surface 1142 may be disposed at a position that is substantially the same as the position of the first connection point 1151 comprised by the first surface 1141 along a direction parallel to the first surface 1141.

[0170] The routing plane 1132 may further comprise one or more routing lines 1133. A routing line 1133 comprised by a routing plane 1132 may comprise a first end and a second end. The first end of the routing line 1133 may be connected to the first connection point 1151 and the second end of the routing line 1133 may be connected to the second connection point 1152, so as to couple, preferably electrically couple, the first connection point 1151 and the second connection point 1152.

[0171] One or more routing lines 1133 may comprise two or more first ends, wherein each of said to or more first ends may be connected to a first connection point 1151. Further, one or more routing lines 1133 may comprise two or more second ends, wherein each of said to or more second ends may be connected to a second connection point 1152. A routing line 1133 may thus couple, preferably electrically couple, one first end to two or more second ends, and / or couple two or more first ends to one second ends, and / or couple two or more first ends to two or more second ends.

[0172] A first connection point 1151 may be configured to be connected, preferably in a detachable manner, to a first component, and a second connection point 1152 may be configured to be connected, preferably in a detachable manner, to a second component. The first and / or second component may be a component comprised by a quantum chip module, preferably a connector element comprised by the quantum chip module. Further, the first and / or second component may be a component comprised by an input-output element, preferably a transmission line and / or a counter-connector element comprised by the input-output element.

[0173] By connecting the first end of a routing line 1133 to a first connection point 1151, the first connection point 1151 being connected to a first component, and connecting the second end of a routing line 1133 to a second connection point 1152, the second connection point 1152 being connected to a second component, a routing line 1133 may be configured to electrically couple and / or transmit signals between the first component and the second component. In this manner, the routing line 1133 may be configured to transmit signals between, one the one hand, one or more components comprised by one or more quantum chip modules and / or comprised by one or more input-output elements, and, on theother hand, one or more further components comprised by one or more quantum chip modules and / or comprised by one or more input-output elements. In this manner, the routing plane 1133 can provide the routing, wherein routing refers to transmission of signals in a direction parallel to the first surface 1141 and / or the second surface 1142, between components comprised by quantum chip modules and / or comprised by input-output elements.

[0174] The finite distance 1161 for which a routing line 1133 extends can - but need not - take different values for different routing lines 1133. When routing between a first component and a second component, preferably wherein the first component is comprised by a quantum chip module, e.g. is a quantum circuit component comprised thereby, and the second component is comprised by an inputoutput structure, e.g. is a transmission line comprised thereby, e.g. a functional transmission line functionally grouped on an input-output element comprised by the input-output structure, the distance 1161 may be at least 0.5 mm (millimeter), preferably at least 1 mm, more preferably at least 2 mm, most preferably for at least 4 mm, for at least one first connection point one first connection point 1151 to which a first end comprised by the routing line 1133 is connected and at least one second connection point 1152 to which a second end comprised by the routing line 1133 is connected. The finite distance 1161 may be at least a number of times the spatial extension of a quantum circuit component, preferably a qubit, or at least a number of times the spatial extension between two quantum circuit components, preferably qubits, comprised by a quantum chip module, wherein said number may be at least 0.5, preferably at least 1, more preferably at least 2, most preferably at least 4, for at least one first connection point 1151 and at least one second connection point 1152. The finite distance 1161 may be of such an order of magnitude as this may be a typical distance along a direction parallel to the first and / or second surface 1141, 1142 of a routing plane 1132 comprising the routing line 1133, between a quantum circuit component comprised by a quantum chip module and a transmission line comprised by an input-output structure, e.g. a functional transmission line functionally grouped on an input-output element comprised by the input-output structure.

[0175] When routing between a first component and a second component, preferably wherein the first component is comprised by a first quantum chip module, e.g. is a quantum circuit component comprised thereby, and the second component is comprised by a second quantum chip module, e.g. isa quantum circuit component comprised thereby, wherein the first and second quantum chip modules may or may not be the same quantum chip module, preferably wherein the first quantum chip modules is not the same as the second quantum chip module, the distance 1161 may be at least 0.25 cm (centimeter), preferably at least 0.5 cm, more preferably at least 1 cm, most preferably for at least 2 cm, for at least one first connection point 1151 to which a first end comprised by the routing line 1133 is connected and at least one second connection point 1152 to which a second end comprised by the routing line 1133 is connected. The finite distance 1161 may be at least a number of times the spatial extension of a quantum circuit component, preferably a qubit, or at least a number of times the spatial extension between two quantum circuit components, preferably qubits, comprised by the first and / or the second quantum chip module, wherein the number may be at least 5, preferably at least 10, more preferably at least 20, most preferably at least 40, for at least one first connection point 1151 to which a first end comprised by the routing line 1133 is connected and at least one second connection point 1152 to which a second end comprised by the routing line 1133 is connected. The finite distance 1161 may be of such an order of magnitude as this may be a typical distance along a direction parallel to the first and / or second surface 1141, 1142 of a routing plane 1132 comprising the routing line 1133, between a quantum circuit component comprised by a first quantum chip module and a quantum circuit component comprised by a second quantum chip module, preferably wherein the first quantum chip modules is not the same as the second quantum chip module. This allows establishing connections between e.g. qubits comprised by different quantum chip modules and over relatively long distances, increasing the flexibility with which quantum circuit components can be connected and e.g. be made to interact and / or exchange signals as part of a quantum computation.

[0176] For a routing line comprising a first end connected to a first connection point 1151 comprised by the first surface 1141 and comprising a second end connected to a second connection point 1152 comprised by the second surface, a means for extending the routing line from the first surface 1141 to the second surface 1142, referred to as a vertical extension means, may be provided. Such a vertical extension means for extending the routing line 1133 from the first surface 1141 to the second surface 1142 may comprise a through-silicon via, and / or any other suitable means therefor. The vertical extension means may be disposed at a position along a direction parallel to the first surface 1141 that issubstantially the same as the position of the first connection point 1151 and / or the second connection point 1152 along a direction parallel to the first surface 1141. The vertical extension means may be substantially connected to the first connection point 1151 and / or vertical extension means may be substantially connected to the second connection point 1152 and / or vertical extension means may be not connected to either of the first connection point 1152 and the second connection point 1152. Further, the vertical extension means may be disposed at a position along a direction parallel to the first surface 1141 that is substantially not the same as the position of the first connection point 1151 and / or the second connection point 1152 along a direction parallel to the first surface 1141. Indeed, the vertical extension means may be disposed at a position displaced with respect to the first connection point 1151 and the second connection point 1152 by a finite distance 1161 along a direction parallel to the first surface 1141 and / or the second surface 1142.

[0177] It will be appreciated that the skilled person may combine various features of the here above described exemplary embodiments. For example, it is entirely conceivable that one may combine the routing plane 732 of the embodiment of FIG. 7 with the configuration of the input-output elements 521 depicted in FIG. 5A and FIG. 5B. Optionally, this may be further combined with the spacers 445 comprising transverse transmission lines 460 and / or the functional elements 465 of the embodiment of FIG. 4. The here above-described embodiments should therefore not be construed as limiting the scope of the sought-after protection, which is defined solely by the features as defined in the appended claims and, at least in certain jurisdictions, their equivalents.

[0178] The following paragraphs denote a number of clauses forming part of the invention.

[0179] Clause 1. A quantum computing assembly, comprising: one or more than one quantum chip module comprising a patterned layer forming at least part of a quantum computing circuit component and comprising an electrically conductive material; and at least one input-output structure comprising at least one rigid input-output element with at least one transmission line formed on or in the inputoutput element, wherein the at least one quantum chip module furthermore comprises at least one connector element electrically connected to the patterned layer; the input-output structure comprises at least one connector counter-element electrically connected to the transmission line; and wherein the connector element and the connector counter-element are configured to detachably engage one anotherto thereby form an electrical connection between the quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.

[0180] Clause 2. The quantum computing assembly of clause 1, wherein the input-output element of the input-output structure is substantially planar and positioned in a plane non-parallel of a plane in which the patterned layer of the at least one quantum chip module is formed, in an assembled state of the quantum computing assembly.

[0181] Clause 3. The quantum computing assembly of clause 1 or 2, wherein the connector element and the connector counter-element together define a, preferably self-aligning, detachable coupling structure; and wherein at least one of the connector element and the connector counter-element comprises a protrusion, a recess, a soldering bump and / or a connection pin.

[0182] Clause 4. The quantum computing assembly of any one of the foregoing clauses, wherein at least one of the connector element and the connector counter-element is spring-loaded and / or is formed as a spring.

[0183] Clause 5. The quantum computing assembly of clause 4, wherein a spring element of said connector element and / or connector counter-element is selected from a group of spring elements, said group comprising at least a helical spring, a volute spring, a wave spring, a leaf spring, and an airbridge .

[0184] Clause 6. The quantum computing assembly of any one of the foregoing clauses, wherein the connector element and / or connector counter-element comprises a superconducting material, or coating, from a group of superconducting materials, said group comprising at least aluminium, niobium, titanium, indium, molybdenum -rhenium, niobium nitride, niobium titanium nitride and tantaal.

[0185] Clause 7. The quantum computing assembly of any one of the foregoing clauses, wherein the transmission line formed on or in the input-output element comprises a geometry from a group of geometries, said group comprising a coplanar waveguide, a microstrip and a stripline geometry; and wherein the transmission line is preferably configured to convey microwave signals.

[0186] Clause 8. The quantum computing assembly of any one of the foregoing clauses, wherein the transmission line is formed on or in the input-output element using one or more of lithography, deep reactive etching, photoablation, atomic layer deposition, evaporation, molecular-beam epitaxy and sputtering.

[0187] Clause 9. The quantum computing assembly of any one of the foregoing clauses, wherein the at least one input-output structure comprises a plurality of connector elements and the at least one quantum chip module comprises a plurality of connector counter-elements arranged to align with the plurality of connector elements, in an assembled state of the quantum computing assembly.

[0188] Clause 10. The quantum computing assembly of clause 9, wherein the plurality of connector elements and the plurality of connector counter-elements are arranged in respective grid formations.

[0189] Clause 11. The quantum computing assembly of clause 10, wherein at least one connector element among the plurality of connector elements is connected, via an associated connector counterelement, to a signal carrying transmission line of the input-output structure; and a plurality of connector elements adjacent said connector elements are connected, via respective associated connector counterelements, to at least one grounded bus of the input-output structure.

[0190] Clause 12. The quantum computing assembly of any one of the foregoing clauses, wherein the input-output structure further comprises: at least one additional input-output element arranged parallel to the input-output element, wherein the additional input-output element comprises at least one additional transmission line formed on or in the input-output element; and at least one transverse transmission line extending from the transmission line of the input-output element to the additional transmission line of the parallelly arranged additional input-output element, preferably through one or more vias.

[0191] Clause 13. The quantum computing assembly of any one of the foregoing clauses, wherein the input-output structure furthermore comprises a routing plane positioned in a plane non-parallel of a plane in which the input-output element is formed, wherein the routing plane comprises a plurality of routing lines and the at least one connector counter-element is connected to one of the plurality of routing lines.

[0192] Clause 14. The quantum computing assembly of clauses 12 and 13, wherein the transverse transmission line is arranged external of the routing plane.

[0193] Clause 15. The quantum computing element of any one of the foregoing clauses, wherein the input-output structure further comprises a spacer arranged parallel to the input-output element.

[0194] Clause 16. The quantum computing element of clauses 12 and 15, wherein the spacer is arranged between the input-output element and the additional input-output element; and the transverse transmission line extends from the transmission line of the input-output element to the additional transmission line of additional input-output element through the spacer.

[0195] Clause 17. The quantum computing assembly of any one of the foregoing clauses, wherein the at least one transmission line comprises at least one functional element, wherein the functional element preferably comprises at least one of a filter, an attenuator, a DC-block, an IR-filter, a directional coupler, a transmission line, a circulator and an amplifier.

[0196] Clause 18. The quantum computing assembly of any one of the foregoing clauses, further comprising a housing with a plurality of, preferably thermally conductive, side walls enclosing the quantum computing assembly; and a removeable lid, wherein the removeable lid is configured to restrict movement of the at least one quantum chip module relative to the input-output structure in an assembled state of the quantum computing assembly.

[0197] Clause 19. The quantum computing assembly of any one of the foregoing clauses, wherein the quantum chip module and the input-output structure comprise interlocking, selectively releasable fastening means.

[0198] Clause 20. The quantum computing assembly any one of the foregoing clauses, wherein the connector element and the connector counter-element are configured, in an assembled state of the quantum computing assembly, to define one or more of a galvanic, inductive and capacitive electrical connection.

[0199] Clause 21. The quantum computing assembly of any one of the foregoing clauses, wherein one or both of the connector element and the connector counter-element comprises indium, gallium, tin, an alloy comprising indium, gallium and / or tin, or combinations thereof.

[0200] Clause 22. A quantum computing system comprising a quantum computing assembly according to any one of the foregoing clauses 1 - 21.

[0201] Clause 23. An input-output structure comprising at least one substantially rigid input-output element and a transmission line formed on or in the input-output element for providing an electrical connection to a patterned layer of a quantum chip module, wherein the input-output structure furthercomprises at least one connector counter-element electrically connected to the transmission line and configured to detachably engage a corresponding connector element of said quantum chip module, to thereby form an electrical connection between a quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.

[0202] Clause 24. A quantum chip module comprising a patterned layer forming at least part of a quantum computing circuit component and comprising an electrically conductive material; wherein the quantum chip module furthermore comprises at least one connector element electrically connected to the patterned layer; and wherein the connector element is configured to detachably engage a corresponding connector counter-element of an input-output structure, to thereby form an electrical connection between a quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.

[0203] Clause 25. A method for performing a quantum computation using a quantum computing assembly according to any one of the foregoing clauses 1 - 21.

[0204] Clause 26. A method for assembling a quantum computing assembly according to any one of the foregoing clauses 1 - 21.

Claims

-53-CLAIMS1. A quantum computing assembly (100), comprising: a quantum chip module (110) comprising a patterned layer (112) forming at least part of a quantum computing circuit component (111) and comprising an electrically conductive material, wherein the patterned layer (112) comprises a plurality of superconducting qubits; and an input-output structure (120) comprising at least one rigid input-output element (121) with a transmission line (122) formed on or in the input-output element (121), wherein the at least one quantum chip module (110) furthermore comprises a connector element (115) electrically connected to the patterned layer (112); the input-output structure (120) comprises a connector counter-element (125) electrically connected to the transmission line (122); and wherein the connector element (115) and the connector counter-element (125) are configured to detachably engage one another to thereby form an electrical connection between the quantum computing circuit component (111) of the at least one quantum chip module (110) and the transmission line (122) of the input-output structure (120).

2. The quantum computing assembly (100) of claim 1, wherein the quantum chip module (110) is configured to be coupled to and decoupled from the input-output structure (120) without damage to the connector elements (115) and / or the connector counter elements (125); and / or wherein the connector elements (115) and counter-connector elements (125) are configured to detachably engage one another to couple the quantum chip module (110) with the input-output structure (120) without requiring (de)soldering, or deposition / removal of additional conductive material; and / or wherein the connector elements (115) and counter-connector elements (125) are configured to engage one another to couple the quantum chip module (110) with the input-output structure (120) in a detachable manner without requiring destructive connection and / or deconnection techniques to establish and / or disestablish an electrical connection.-54-3. The quantum computing assembly (100) of any of the preceding claims, wherein detachably engaging the connector element (115) and the connector counter-element (125) refers to the fact that the connector element (115) may be engaged to a first connector counter-element (125), subsequently disengaged from said first connecter counter-element (125), and subsequently engaged to a second connector counter-element, preferably be repeatedly engaged and disengaged for at least 2 times, more preferably at least 5 times, even more preferably at least 20 times, most preferably at least 50 times, with one or more substantially without damage, destruction, and / or permanent deformation of the connector element (115), preferably without damage, destruction, and / or permanent deformation of the any further component and / or element comprised by the quantum computing assembly (100), most preferably without damage, destruction, and / or permanent deformation of the connector counterelement (125).

4. The quantum computing assembly (100) of any one of the preceding claims, wherein the connector element (115) and the connector counter-element (125) together define a, preferably selfaligning, detachable coupling structure; and / or wherein at least one of the connector element (115) and the connector counter-element (125) comprises a protrusion, a recess, a soldering bump, and / or a connection pin; and / or wherein the connector element (115) and / or connector counter-element (125) comprise a superconducting material, or coating, from a group of superconducting materials, said group comprising at least aluminium, niobium, titanium, indium, molybdenum-rhenium, niobium nitride, niobium titanium nitride and tantalum; and / or wherein at least one of the connector element (115) and the connector counter-element (125) is spring-loaded and / or is formed as a spring, preferably wherein a spring element of said connector element and / or connector counter-element is selected from a group of spring elements, said group comprising at least a helical spring, a volute spring, a wave spring, a leaf spring, and an airbridge.

5. The quantum computing assembly (100) of any one of the preceding claims, wherein the transmission line (122) formed on or in the input-output element (121) comprises a geometry from a-55- group of geometries, said group comprising a coplanar waveguide, a microstrip and a stripline geometry; and wherein the transmission line (122) is preferably configured to convey microwave signals; and / or wherein the transmission line (122) is formed on or in the input-output element (121) using one or more of lithography, deep reactive etching, photoablation, atomic layer deposition, evaporation, molecular-beam epitaxy and sputtering, wherein preferably the at least one transmission line (122) comprises at least one functional element, wherein the functional element preferably comprises at least one of a filter, an attenuator, a DC-block, an IR-filter, a tuneable coupler, a directional coupler, a circulator, an isolator, and / or an amplifier; and / or wherein preferably the at least one transmission line is a functional transmission line, more preferably wherein the functional transmission line is one or more of a microwave drive line, a flux bias line, and / or a feed line.

6. The quantum computing assembly (100) of any one of the preceding claims, wherein the at least one input-output structure (120) comprises a plurality of connector elements (115) and the at least one quantum chip module (110) comprises a plurality of connector counter-elements (125) arranged to align with the plurality of connector elements (115), in an assembled state of the quantum computing assembly (100), preferably wherein the plurality of connector elements (115) and the plurality of connector counter-elements (125) are arranged in respective grid formations; and / or wherein at least one connector element (115) among the plurality of connector elements (115) is connected, via an associated connector counter-element (125), to a signal carrying transmission line of the input-output structure (120); and / or a plurality of connector elements (115) adjacent to said connector elements (115) are connected, via respective associated connector counter-elements (125), to at least one grounded bus of the input-output structure (120).-56-7. The quantum computing assembly (100) of any one of the preceding claims, wherein the input-output structure (120) further comprises at least one additional input-output element (121) arranged parallel to the input-output element (121), wherein the additional input-output element (121) comprises at least one additional transmission line (122) formed on or in the input-output element (121), preferably further comprising at least one transverse transmission line (460) extending from the transmission line (122) of the input-output element (120) to the additional transmission line (122) of the parallelly arranged additional input-output element (121), preferably through one or more vias.

8. The quantum computing assembly (100) of any one of the preceding claims, wherein the input-output structure (120) further comprises a spacer (245) arranged parallel to the input-output element (121), wherein preferably the spacer (245) is arranged between the inputoutput element (121) and the additional input-output element (121.

9. The quantum computing assembly (100) of any one of the preceding claims, wherein the input-output structure (120) further comprises a routing plane (732) positioned in a plane non-parallel to a plane in which the input-output element (121) is formed, wherein the routing plane (732) comprises a plurality of routing lines (733) and the at least one connector counter-element (125) is connected to one of the plurality of routing lines (122), wherein preferably the transverse transmission line (460) is arranged external of the routing plane (732).

10. The quantum computing assembly (100) of any one of claims 1-8, wherein the input-output structure (120) further comprises a routing plane (732) comprising a routing line (733) and preferably positioned in a plane non-parallel to a plane in which the input-output element (121) is formed, the routing line (733) comprising a first end and a second end different from the first end, wherein the first end is connected, preferably electrically connected, to the connector element (115) and / or to the quantum circuit component (111), and the second end is connected, preferably electrically connected, to the connector counter-element (125) and / or to a component, preferably a transmission line (122), comprised by the input-output element (121).

11. The quantum computing assembly (100) of claim 10, wherein the second end is disposed at a position displaced with respect to the first end by a finite distance (1161) along a direction parallel to the plane in which the routing plane (732) is positioned, wherein preferably: the finite distance (1161) at least 0.5 mm, preferably at least 1 mm, more preferably at least 2 mm, most preferably for at least 4 mm; and / or the finite distance (1161) is at least a number of times the spatial extension of a quantum circuit component, preferably a qubit, or at least a number of times the spatial extension between two quantum circuit components, preferably qubits, comprised by a quantum chip module, the number being at least 0.5, preferably at least 1, more preferably at least 2, most preferably at least 4.

12. The quantum computing assembly (100) of any one of the preceding claims, wherein the quantum computing assembly (100) further comprises: a housing (801) with a plurality of, preferably thermally conductive, side walls (802) enclosing the quantum computing assembly (100), and a removeable lid, wherein the removeable lid (803) is configured to restrict movement of the at least one quantum chip module (110) relative to the input-output structure (120) in an assembled state of the quantum computing assembly (100); and / or wherein the quantum chip module (110) and the input-output structure (120) comprise interlocking, selectively releasable fastening means.

13. The quantum computing assembly (100) any one of the preceding claims, wherein the connector element (115) and the connector counter-element (125) are configured, in an assembled state of the quantum computing assembly (100), to define one or more of a galvanic, inductive and capacitive electrical connection; and / or wherein one or both of the connector element (115) and the connector counter-element (125) comprises indium, gallium, tin, an alloy comprising indium, gallium and / or tin, or combinations thereof.

14. An input-output structure (120) comprising at least one substantially rigid input-output element (121) and a transmission line ( 122) formed on or in the input-output element ( 121 ) for providing an electrical connection to a patterned layer (112) of a quantum chip module (110), wherein the input-output structure (120) further comprises at least one connector counterelement (125) electrically connected to the transmission line (122) and configured to detachably engage a corresponding connector element (115) of said quantum chip module (110), to thereby form an electrical connection between a quantum computing circuit component ( 111) of the at least one quantum chip module (110) and the transmission line (122) of the input-output structure (120).

15. A quantum chip module (110) comprising a patterned layer (112) forming at least part of a quantum computing circuit component (111) and comprising an electrically conductive material; wherein the quantum chip module (110) furthermore comprises at least one connector element (115) electrically connected to the patterned layer (112); and wherein the connector element (115) is configured to detachably engage a corresponding connector counter-element (125) of an input-output structure (120), to thereby form an electrical connection between a quantum computing circuit component (111) of the at least one quantum chip module (110) and the transmission line (122) of the input-output structure (120).

16. A routing plane (732), adapted for routing one or more signals of a quantum chip module (110), the routing plane (732) comprising: a substrate with a first surface (1141) and a second surface (1142) substantially opposite and parallel to the first surface (1141); a first connection point (1151) comprised by the first surface (1141) or the second surface (1142); a second connection point (1152) comprised by the first surface (1141) or the second surface (1142), wherein the second connection point (1152) is disposed at a position displaced with respect to the first connection point (1151) by a finite distance (1161) along a direction parallel to the first surface(1141);-59- a routing line (733), wherein the routing line (733) comprises a first end and a second end different from the first end, wherein the first end is connected to the first connection point (1151) and the second end is connected to the second connection point (1152) so as to electrically couple the first connection point (1151) and the second connection point (1152).

17. The routing plane (732) of claim 16, wherein the first connection point (1151) is configured to be connected, preferably in a detachable manner, to a first component, and the second connection point (1152) is configured to be connected, preferably in a detachable manner, to a second component, wherein the first and / or second component is a component comprised by the quantum chip module (110), preferably a connector element (115), more preferably a connector element (115) of a quantum assembly (100) according to any one of claims 1-13; and / or wherein the first and / or second component is a component comprised by an input-output element (120), preferably a transmission line (122) and / or a counter-connector element (125) comprised by an input-output element (121), more preferably a counter-connector element (125) of a quantum assembly (100) according to any one of claims 1-13, wherein the routing line (733) is configured to transmit signals the first component and the second component.

18. The routing plane (732) of claim 16 or claim 17, wherein: the finite distance (1161) is at least 0.5 mm, preferably at least 1 mm, more preferably at least 2 mm, most preferably for at least 4 mm; and / or the finite distance (1161) is at least a number of times the spatial extension of a quantum circuit component, preferably a qubit, or at least a number of times the spatial extension between two quantum circuit components, preferably qubits, comprised by a quantum chip module, the number being at least 0.5, preferably at least 1, more preferably at least 2, most preferably at least 4.

19. The quantum assembly of any one of claims 9-13, wherein the routing plane is the routing plane of any one of claims 16-18.

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