Method for manufacturing computing device

Abstract

This method for manufacturing a computing device is provided with a first step of detaching a first device and a second device from a mother board having a first connector to which the first device is connected and a second connector to which the second device is connected, and a second step of connecting, after the first step, the first device and the second device to the first connector and to the second connector, respectively, via a relay board. The relay board receives first data from the first connector, transmits the received first data to the first device, receives second data from the first device without going through the mother board, and transmits the received second data to the second device without going through the mother board.

Description

Method for making a computing device

[0001] The present invention relates to a method for making a computing device.

[0002] A computing device is known in which devices such as accelerators and network interface cards (NICs) suitable for specific computing tasks are connected to a motherboard on which a processor such as a CPU is mounted in order to expand the functionality of a computer (Patent Document 1).

[0003] Japanese Patent Application Publication No. 10-4247

[0004] When multiple devices are connected to a motherboard and data is transferred from one device to another, the data usually passes through the motherboard, causing a bottleneck in the data transfer to the motherboard, slowing down the device's operation speed and preventing the device from fully utilizing its capabilities.

[0005] An object of the present invention is to provide a computing device that reduces the decrease in device operation speed during data transfer between devices.

[0006] In order to solve the above problem, a method for manufacturing a computing device according to the present invention includes a first step of removing a first device and a second device from a motherboard having a first connector to which the first device is connected and a second connector to which the second device is connected, and a second step of connecting the first device and the second device to the first connector and the second connector, respectively, via an intermediate board, wherein the intermediate board receives first data from the first connector, transmits the received first data to the first device, receives second data from the first device without going through the motherboard, and transmits the received second data to the second device without going through the motherboard.

[0007] According to the above configuration, a computing device can be obtained in which the decrease in device operating speed during data transfer between devices is reduced.

[0008] FIG. 1 is an exploded perspective view of a computing device according to an embodiment of the present invention. FIG. 2 is an exploded perspective view of a relay board. FIG. 3 is a perspective view of the interior of the computing device. FIG. 4 is a perspective view of the interior of a computing device according to a comparative example. FIG. 5 is a flowchart showing a manufacturing procedure for a computing device. FIG. 6 is a diagram showing the configuration of a computing device. FIG. 7 is a perspective view of a relay board according to a modified example. FIG. 8 is a perspective view of an extension board according to a modified example. FIG. 9 is a plan view of an extension board according to a modified example. FIG. 10 is a perspective view of a relay board according to a modified example. FIG. 11 is a cross-sectional view showing a state when a card edge is inserted into a card edge connector. FIG. 12 is a schematic top view of a flexible substrate of a relay board when unfolded. FIG. 13 is a schematic bottom view of a flexible substrate of a relay board when unfolded. FIG. 14 is a diagram explaining a method of folding a flexible substrate. FIG. 15 is a diagram explaining a method of forming a flexible substrate.

[0009] A computing device according to this embodiment and its modifications will be described below. In each drawing, only some of the same elements may be labeled with reference numerals.

[0010] As shown in FIG. 1 , a computing device 10 according to this embodiment includes a motherboard 20, a relay board 30, devices 41 and 42, a housing 50, two device fixing portions 60, a cover 70, and a plurality of screws 80. In the following description, the thickness direction of the motherboard 20 is referred to as the up-down direction. The direction perpendicular to the up-down direction is referred to as the left-right direction, and the direction perpendicular to both the up-down direction and the left-right direction is referred to as the front-rear direction. The computing device 10 is configured as a functionally expanded device by connecting devices 41 and 42 to the motherboard 20, which is the motherboard of a server computer in a data center. Functional expansion includes adding new functions and improving the performance of functions.

[0011] The motherboard 20 has processors 21B and 21C such as CPUs (Central Processing Units) and connectors 22B to 22K, and various processes are executed by the processors 21B and 21C.

[0012] The motherboard 20 includes a first board 21 and a second board 22 connected to the first board 21. Although the first board 21 is sometimes called the motherboard and the second board 22 is sometimes called the daughterboard, the term "motherboard" used here refers to the motherboard and one or more boards, such as daughterboards, connected to the motherboard. Of course, the motherboard 20 may consist of only the motherboard.

[0013] The first board 21 includes a printed wiring board 21A, processors 21B and 21C, random access memories (RAMs) 21D and 21E, a storage device 21F, and a read-only memory (ROM) 21G. The printed wiring board 21A is, for example, a multilayer wiring board. Components 21B to 21G are mounted on the printed wiring board 21A. Mounting methods include, for example, soldering or connection via a predetermined slot or connector (the same applies to other mounting methods). Upon startup, the processors 21B and 21C execute a basic input / output system (BIOS) pre-stored in the ROM 21G, and then execute a program stored in the storage device 21F. The programs executed include applications for performing desired processing, an operating system (OS), firmware, drivers for operating the devices 41 and 42, and a computing platform. The RAM 21D functions as the main memory for the processor 21B, and the RAM 21E functions as the main memory for the processor 21C. The storage 21F is a non-volatile storage device such as an SSD (Solid State Drive). In addition to storing the programs, the storage 21F also stores various data used when the programs are executed. Other electronic components (not shown) are also mounted on the printed wiring board 21A as appropriate.

[0014] The second board 22 includes a printed wiring board 22A and ten connectors 22B to 22K mounted on the printed wiring board 22A. The printed wiring board 21A is, for example, a multi-layer wiring board. The eight connectors 22B to 22K are aligned in the left-right direction. The connectors 22B to 22K are configured as card edge connectors into which a card edge is inserted from above. Other electronic components (not shown) are also mounted on the printed wiring board 22A as appropriate.

[0015] The processor 21B communicates with the destinations connected to the connectors 22B to 22F, and the processor 21C communicates with the destinations connected to the connectors 22G to 22K.

[0016] The relay board 30 connects the motherboard 20 to the devices 41 and 42, and relays data sent and received between these devices. The relay board 30 can also be thought of as a switch that distributes data to its destination. The relay board 30 includes connection boards 31 and 32 and an expansion board 33.

[0017] The connection boards 31 and 32 are formed in a plate shape and are configured to electrically connect the motherboard 20 (second board 22) and the expansion board 33. The connection boards 31 and 32 are arranged side by side in the left-right direction with their thickness direction oriented in the left-right direction. The lower end of the connection board 31 forms a card edge that is inserted into and connected to connector 22B. The lower end of the connection board 32 forms a card edge that is inserted into and connected to connector 22C. The upper end of the connection board 31 forms a card edge that is inserted into and connected to connector 33B (described later) of the expansion board 33. The upper end of the connection board 32 forms a card edge that is inserted into and connected to connector 33C (described later) of the expansion board 33.

[0018] The connection boards 31 and 32 are configured to transmit information (electrical signals) between the motherboard 20 (second board 22) and the expansion board 33. As shown in FIG. 2 , the connection board 31 includes a board body 31A and a 16-lane wiring pattern 31B printed on the board body 31A and extending in the vertical direction. The connection board 32 includes a board body 32A and a 16-lane wiring pattern 32B printed on the board body 32A and extending in the vertical direction. The wiring patterns 31B and 32B each include upper and lower electrodes formed on the upper and lower card edges, respectively, and linear wiring connecting these upper and lower electrodes.

[0019] The extension board 33 extends the relay function of the relay board 30. The extension board 33 includes a printed wiring board 33A, connectors 33B to 33E, a relay circuit 33F, and a clock circuit 33G.

[0020] The printed wiring board 33A is formed, for example, from a multi-layer wiring board. The printed wiring board 33A is mounted with connectors 33B to 33E, a relay circuit 33F, and a clock circuit 33G. The connectors 33B to 33E are each formed as a card edge connector having a shape similar to that of the connectors 22B to 22K.

[0021] Connectors 33B and 33C are mounted on the lower surface, which is the lower main surface, of printed wiring board 33A. Connectors 33D and 33E are mounted on the upper surface, which is the upper main surface, of printed wiring board 33A. Connector 33B is positioned so as to overlap connector 33D when viewed from above. Connector 33C is positioned so as to overlap connector 33E when viewed from above.

[0022] The card edge at the upper end of the connection board 31 connected to connector 22B of the second board 22 is inserted from below into connector 33B and connected. When viewed from the top-bottom direction, connector 33B overlaps connector 22B. The card edge at the upper end of the connection board 32 connected to connector 22C is inserted from below into connector 33C and connected. When viewed from the top-bottom direction, connector 33C overlaps connector 22C. Through these connections, the extension board 33 and the second board 22 are connected via the connection boards 31 and 32.

[0023] Card edges 41A and 42A protruding downward of the devices 41 and 42 are inserted from above into the connectors 32D and 32E, respectively, to connect them. This connection connects the extension board 33 to the devices 41 and 42. The devices 41 and 42 will be described later.

[0024] The relay circuit 33F is composed of a switch circuit (for example, a switch IC (Integrated Circuit)) that switches the destination of data, and is connected to the connectors 33B to 33E and the clock circuit 33G via a wiring pattern (not shown) printed on the printed wiring board 33A. The relay circuit 33F operates at the frequency of a clock signal that is generated by the clock circuit 33G and input to the relay circuit 33F.

[0025] The relay circuit 33F transfers data from the motherboard 20 (such as the processor 21B) to either the device 41 or the device 42. Furthermore, the relay circuit 33F transfers data from the device 41 to either the motherboard 20 or the device 42. The relay circuit 33F transfers data from the device 42 to either the motherboard 20 or the device 41. The address of the transfer destination is stored, for example, in the header of the data to be transferred, and the relay circuit 33F transfers the data to the device at the address in the header.

[0026] The relay circuit 33F also operates as a relay circuit that relays control signals (e.g., reset signals) from the motherboard 20 (processor 21B) to each of the devices 41 and 42. This ensures that resetting from the motherboard 20 is possible even when the relay board 30 is installed. The circuit that relays data and the circuit that relays control signals may be arranged separately, but even in this case, both circuits are collectively referred to as the relay circuit 33F.

[0027] 1 are accelerators that improve the performance of the computing device 10. The devices 41 and 42 are devices that operate by having circuits that specialize in performing specific processing, such as a graphics processing unit (GPU), an application specific integrated circuit (ASIC), or a field programmable gate array (FPGA). The devices 41 and 42 may be the same type of device or different types of devices. At least one of the devices 41 and 42 may be a NIC for communicating with another server computer.

[0028] As described above, the devices 41 and 42 have card edges 41A and 42A protruding from their lower ends. The card edges 41A and 42A are inserted into and connected to the connectors 33D and 33E of the extension board 33. The device 41 has a fixing piece 41B that is fixed to the rear end upper surface 51 of the housing 50 via a device fixing part 60. The device 42 has a fixing piece 42B that is fixed to the rear end upper surface 51 of the housing 50 via another device fixing part 60. The fixing pieces 41B and 41B and the device fixing part 60 will be described later.

[0029] The housing 50 is formed in a box shape with an opening at the top. The housing 50 accommodates the motherboard 20, the relay board 30 connected to the motherboard 20, and the devices 41 and 42 connected to the relay board 30. Screw holes 52B to 52K are formed on the rear end top surface 51 of the housing 50. The screw holes 52B to 52K are provided at positions corresponding to the connectors 22B to 22K, respectively. The screw holes 52B to 52K will be described later.

[0030] Each device fixing portion 60 includes a spacer 61, a nut 62, and a screw 63. The spacer 61 includes two plate-shaped members facing each other in the vertical direction and a plate-shaped member extending in the vertical direction connected to the front ends of each plate-shaped member, and is formed with a generally U-shaped cross section. The nut 62 includes a male threaded portion 62A and a female threaded portion 62B extending upward from the male threaded portion 62A, having a larger diameter than the male threaded portion 62A, and having a screw hole opening on its upper surface. The male threaded portion 62A of the nut 62 passes through a through-hole in the plate-shaped member below the spacer 61 and threads into the screw hole 52B or 52C in the rear end upper surface 51 of the housing 50. This tightens and fixes the spacer 61 to the rear end upper surface 51 of the housing 50. To facilitate rotation of the nut 62, the outer circumferential surface of the female threaded portion 62B may be hexagonal. Furthermore, a screw 63 passes through the through-hole of the upper plate-like member of the spacer 61 and the through-hole of the fixing piece 41B or 41B, and is threaded into the female thread portion 62B. As a result, the fixing pieces 41B and 41B are fixed by each device fixing portion 60 as shown in FIG. 3, and the devices 41 and 42 connected to the connectors 33D and 33E, respectively, are positioned.

[0031] As a modification of each device fixing portion 60, the length of the screw 63 may be increased and a cylindrical member may be used instead of the nut 62. The cylindrical member is disposed between two plate-like members that face each other in the vertical direction of the spacer 61. The screw 63 passes through the through-holes in the upper and lower plate-like members of the spacer 61, the through-hole in the fixing piece 41B or 41B, and the interior of the cylindrical member, and threads into the screw hole 52B or 52C. This also allows each device fixing portion 60 to fix the fixing pieces 41B and 41B, thereby positioning the devices 41 and 42.

[0032] The lid 70 is fixed to the housing 50 by four screws 80 that are screwed into four screw holes provided in the square top corners of the housing 50. In this way, the devices 41 and 42 are covered by the lid 70.

[0033] In this embodiment, as shown in FIG. 4 , initially, card edges 41A and 42A (see FIG. 1) of devices 41 and 42 are connected to connectors 22B (see FIG. 1) and 22C of motherboard 20 without relay board 30. Computing device 10 is fabricated by adding relay board 30 to a computing device configured in this manner. In this case, before relay board 30 is added, devices 41 and 42 connected to connectors 22B and 22C are fixed to housing 50 by their fixing pieces 41B and 42B. Specifically, devices 41 and 42 are fixed to housing 50 by fastening fixing pieces 41B and 42B to housing 50 with screws 91 that engage with screw holes 52B and 52C (see FIG. 1) of housing 50.

[0034] A method for manufacturing the computing device 10 will now be described with reference to Figure 5. Here, because devices are connected to connectors 22B and 22C, processor 21B connected to connectors 22B-22F is primarily in operation, but if a device is connected to any of connectors 22G-22K, processor 21C also executes the following process. Note that in the following process, there may be a device connected directly to a connector without using relay board 30. In such a case, the following process is also applied to that device (however, no relay board is installed).

[0035] First, the processor 21B deletes the drivers for the devices 41 and 42 and the computing platform such as cuda (step S11), and then the processor 21B shuts down the computing device 10 (step S12).

[0036] After the shutdown, the worker removes the devices 41 and 42 from the housing 50 and the motherboard (i.e., connectors 22B and 22C), and connects the relay board 30 and the devices 41 and 42 to the motherboard 20 (step S13). After removing the devices 41 and 42, the connecting boards 31 and 32 of the relay board 30 are inserted from above into the connectors 22B and 22C. Then, the expansion board 33 is placed on top of the connecting boards 31 and 32, and the tops of the connecting boards 31 and 32 are inserted into the connectors 33B and 33C of the expansion board 33. Furthermore, the card edges 41A and 42A of the devices 41 and 42 are inserted into the connectors 33D and 33E of the expansion board 33. At this time, the devices 41 and 42 are pressed from above. Since the set of connectors 22B, 33B, and 33D and the set of connectors 22C, 33C, and 33E are in the same position when viewed from above and overlap each other, by pressing devices 41 and 42 from above, the pressing force is effectively transmitted downward without being dispersed, and the card edges are inserted smoothly and firmly into the connectors. By attaching devices 41 and 41, devices 41 and 42 are connected to connectors 22B and 22C via relay board 30.

[0037] The processor 21B then powers on the computing device 10 (step S14). After powering on, the startup sequence of the computing device 10 runs, and the processors 21B and 21C sequentially start the BIOS, initialize the hardware, and scan for devices connected to the connectors 22B to 22K (step S15). After detecting the devices, the processor 21B sends a reset signal (step S16). The reset signal is input to the devices 41 and 42 via the relay circuit 33F of the relay board 30, resetting them. This refreshes the devices 41 and 42.

[0038] The processor 21B then executes an initialization process for the devices 41 and 42 (step S17). The processor 21B, the devices 41 and 42, and the relay circuit 33F then establish an interconnect (e.g., PCIe) link (step S18). The OS is then started (step S19). Upon completion, the computing device 10 is ready for external login. The processor 21B then downloads and installs device drivers for operating the devices 41 and 42 and a corresponding computing platform, such as CUDA, from an external device (e.g., a terminal in a data center) (step S20).

[0039] After the installation, the processor 21B loads the device drivers and computing platform, enabling the devices 41 and 42 to communicate with the OS (step S21). The processor 21B also installs firmware (obtained externally at any time) that enables inter-device communication in the devices 41 and 42 (step S22). Note that the installed program may be any program that enables inter-device communication, and is not limited to firmware. This enables the devices 41 and 42 to communicate via the relay board 30. Note that the order of steps S21 and S22 may be reversed. Furthermore, the processor 21B can install and execute an application that measures latency and communication speed, such as . / p2pBandwidthLatencyTest. The performance results of this application can be compared between the legacy server and the new computing device 10 to confirm that the upgrade was successful.

[0040] As explained above, simply by introducing the relay board 30 into an existing server, it is possible to realize a function update such as device-to-device communication, thereby reducing the number of steps and enabling function expansion at low cost. Also, by installing a program in the devices 41 and 42 that enables device-to-device communication (direct data transfer) for sending and receiving data without going through the motherboard 20, device-to-device communication via the relay board 30 is realized.

[0041] In this embodiment, the operating speed of the relay board 30 (particularly the relay circuit 33F) and the devices 41 and 42 is faster than the operating speed of the motherboard 20. As an example, assume that the motherboard 20 is a PCI Express Gen 3.0-compatible product. Assume that the relay board 30 and the devices 41 and 42 are PCI Express Gen 4.0-compatible products. These products may also be CXL (Compute Express Link)-compatible products. Even in this case, the motherboard 20 is assumed to be an older generation. In this case, the second board 22 of the motherboard 20 may be a Supermicro server 4028GR-TR board with the model number X9DRG-O-PCIE. Furthermore, in this case, a Broadcom PEX88032 may be used as the relay circuit. The frequency (clock frequency) of the clock signal generated by the clock circuit 33G is 200 MHz, which is PCI Express Gen 4.0-compatible. The motherboard clock frequency is 100 MHz, compatible with PCI Express Gen 3.0. Furthermore, devices 41 and 42 may be NVIDIA A100 GPA or AMD Alveo U250. Connectors 22B-22L and 33B-33E, configured as card edge connectors (also called edge connector sockets), and the card edges connected to them when inserted into these slots, are configured to comply with the dimensions specified by PCI-SIG (PCI Special Interest Group). Each of these has 16 lanes.

[0042] In the above case, data communication between the motherboard 20 and the relay board 30 is performed at the communication speed (clock frequency 100 MHz) of PCI EXPRESS Gen 3.0 of the motherboard 20, which is the older generation of PCI EXPRESS. Data communication between the relay board 30 and the device 41 or 42 is performed at the communication speed (clock frequency 400 MHz) of PCI EXPRESS Gen 4.0 because both are PCI EXPRESS Gen 4.0 compatible.

[0043] For example, when processing data (e.g., image data) input from an external source, the motherboard 20 (specifically, the processor 21B) may cause the device 41 or 42 to process the data or data resulting from processing the data. For example, when causing the device 41 to perform processing, the motherboard 20 transmits the data to the relay board 30 via the connector 22B. At this time, the address of the device 41 is set in the header of the data, for example. The transmitted data is input from the connection board 31 to the relay circuit 33F. The relay circuit 33F, for example, analyzes the address assigned to the header of the data and transfers the data to the device 41 via the connector 33D. Note that, as described above, the device 41 was originally connected to the connector 22B, and the device 42 was originally connected to the connector 22C. Therefore, as shown by the dashed arrows in FIG. 6 , the relay circuit 33F may transfer data from the connector 22B to the device 41 and data from the connector 22C to the device 42.

[0044] As shown by the solid arrows in FIG. 6 , data may be transmitted and received between device 41 and device 42. This data transmission and reception is inter-device communication, which is implemented by firmware. A specific example of inter-device communication is data processed by device 41 and then processed by device 42. The processed data is returned from device 42 to the motherboard 20 via the relay board 30 and connector 22C. In this manner, data transmission and reception between devices 41 and 42 is achieved only through the relay board 30, without the intervention of the motherboard 20. This reduces the waiting time associated with data transmission and reception between devices 41 and 42, and reduces the decrease in device operating speed during data transfer between devices. This allows devices 41 and 42 to fully utilize their capabilities. In particular, in this embodiment, the operating speed of the motherboard 20 is slower than the operating speeds of devices 41 and 42 and relay board 30, thereby achieving the aforementioned significant effect. For example, device communication is achieved at PCI EXPRESS 4.0 communication speeds regardless of the motherboard's PCI EXPRESS generation, reducing degradation in device operating speed. The relay circuit 33F may include a transfer circuit that directly reads data from the memory of the device 41 (or 42) and transfers it to the PCIe connector 33E (or 33D) to which the other device 42 (or 41) is connected. The relay circuit 33F may, for example, analyze the memory access pattern of the device 41 (or 42) and optimize the amount and order of data sent to the connector 33E (or 33D). This may efficiently utilize the PCIe bandwidth and improve data transfer speeds.

[0045] Even if the operating speed of the motherboard 20 is fast, the data transfer time is reduced because the data does not pass through the motherboard 20. Therefore, even if the operating speed of the motherboard 20 is fast, as described above, when data is sent and received between the devices 41 and 42, the data does not pass through the motherboard 20, so that the decrease in the operating speed of the devices during data transfer between the devices is reduced.

[0046] The shape of the relay board 30 is not limited to the above. Modified examples of the relay board will be described below.

[0047] The relay board 130 shown in FIG. 7 includes an extension board 133 in which the printed wiring board 33A is divided into two printed wiring boards 133AA and 133AB, and the two are electrically connected by a flexible substrate 139. This configuration allows the relay board 130 to be applied to connectors 22B-22K that are not adjacent to each other but are spaced apart. The flexible substrate 139 may be connected to the printed wiring boards 133AA and 133AB via connectors. A circuit for relaying control signals and / or a clock circuit may be provided on each of the printed wiring boards 133AA and 133AB. In this modification, the relay board 130 can transmit data received from the device 41 to the device 42 via the flexible substrate 139 and the printed wiring board 133AB. Again, no motherboard is required.

[0048] An expansion board 233 according to another modification shown in FIG. 8 is equipped with an optical transceiver 239 based on, for example, 200G QSFP-DD, connected to a relay circuit 33F via signal and control lines (not shown). The optical transceiver 239 is connected to the optical transceiver 239 of another expansion board 233 via an optical fiber F. The other expansion board 233 can be used in another computing device 1000. This allows the relay board to communicate with other relay boards installed in the other computing device and transmit data from the other relay board to the device 41 or 42 without going through the motherboard 20. Therefore, multiple computing devices can have multiple tiers of relay boards, and it is possible to add a function that enables communication between multiple devices under each relay board. This enables connections beyond the confines of the computing device's housing, achieving further expandability. In this modification, in the manufacturing method for the computing device 10 described above, a communication platform for communication between computing devices is installed after the OS is started. Since communication between computing devices may require a different protocol than communication within a computing device, a communication platform must be installed. For example, CXL (Compute Express Link) is a suitable protocol. Firmware installed on devices 41 and 42 must also be compatible with communication between computing devices.

[0049] An extension board 333 according to another modified example shown in FIG. 9 is configured to be connected to both outer connectors 22B-22D and connectors 22H-22K (FIG. 1) of connectors 22B-22K on motherboard 20 via a connection board (a board having the same structure as connection board 31, etc.; the same applies below). Because of this configuration, a notch 333K is formed in printed wiring board 333A of extension board 333 so as not to interfere with connectors 22E and 22F (or devices directly connected to these) that are not connected. In FIG. 9, elements indicated by solid lines are mounted on the front surface of printed wiring board 333A, and elements indicated by dotted lines are mounted on the back surface.

[0050] The expansion board 333 includes eight sets of units U corresponding to the connectors 22B to 22D and the connectors 22H to 22K, respectively. Each unit U includes a connector 333B, a connector 333C, an FPGA 333D, and an optical transceiver 333E. The connector 333B is a card edge connector or the like to which a device consisting of an accelerator or NIC similar to the devices 41 and 42 is connected. The connector 333C is arranged in one-to-one correspondence with the connector 333B. The positional relationship between these is the same as that between the connectors 33B and 33D in FIG. 2. Each connector 333C is connected to the connectors 22B to 22D and the connectors 22H to 22K, respectively, via a connection board. Data from the device connected to the connector 333B is converted into an optical signal by the FPGA 333D and the optical transceiver 333E and transmitted to the control loop 333R on the back side. The control loop 333R is made of, for example, an optical fiber or a polymer optical waveguide embedded in the printed wiring board 333A.

[0051] The expansion board 333 includes four relay circuits 333G, such as switches, provided for each pair of units U, and a clock circuit 333H that supplies the same clock signal as described above to the relay circuits 333G. The relay circuits 333G are connected to the connectors 333B or FPGAs 33D of the corresponding units U, and have the same function as the relay circuits 33F, switching the destination of data transfer. However, the relay circuits 333G are also connected to each other by wiring (not shown), allowing data transfer between the relay circuits 333G. This configuration also enables data exchange between devices connected to connectors 22B-22D on the processor 21B side and devices connected to connectors 22H-22K on the processor 21C side.

[0052] The expansion board 333 includes an optical switch 333S (e.g., an optical switch composed of MEMS and mirrors) located along the control loop 333R. The optical switch 333S functions to form a ring around the control loop 333R or to separate a portion of the ring and connect it to the outside. The expansion board 333 also includes an optical connector 333P connected to the control loop 333R and also connected to the outside. The optical connector 333P enables optical connection to other computing devices. For example, in the case of a control loop, it can span eight FPGAs within a single computing device, or by connecting two computing devices via external ports, it can span up to 16 FPGAs, expanding the computing device to have various control functions. Similarly, if the relay circuit 333G is designed, including software, to connect the 16 subordinate devices to the relay circuit 333G, data transfer between even more expanded devices is possible. Furthermore, if the aforementioned external connections can be expanded to other devices, even more complex control and additional device connectivity becomes possible. Although an optical connector is used as the external port, an electrical connector may be used if the transmission distance is not a problem.

[0053] Next, a relay board 530, which is another modification of the relay board 30, will be described with reference to FIG. 10 . The relay board 30 includes flexible boards 531 and 532 and an expansion board 533. The expansion board 533 includes a printed wiring board 533A and a relay circuit 33F and a clock circuit 33G mounted on the printed wiring board 533A. The descriptions of the relay circuit 33F and the clock circuit 33G are the same as those above. The expansion board 533 includes notches 533AA and 533AB, through which the card edges 41A and 42A of the devices 41 and 42 pass, respectively, at positions corresponding to the connectors 22B and 22C of the motherboard 20 ( FIG. 1 ) to which the relay board 30 is connected.

[0054] Flexible substrates 531 and 532 are disposed within the notches 533AA and 533AB. The flexible substrate 532 has folds (see the dashed lines in FIGS. 12 and 13 ). As shown in FIG. 11 , when the card edge 42A of the device 42 is inserted into the connector 22C, the flexible substrate 532 is sandwiched between the card edge 42A and the connector 22C. When the flexible substrate 532 is unfolded, the surface facing downward is referred to as the lower surface Ds, and the surface facing upward is referred to as the upper surface Us. The lower surface Ds contacts the connector 22C, more specifically, the electrodes E1 and E2 within the connector 22C. The upper surface Us contacts the card edge 42A, more specifically, the electrodes E3 and E4 of the card edge 42A.

[0055] 12 , the flexible substrate 532 has on its upper surface Us a plurality of electrodes E14 that respectively come into contact with a plurality of electrodes E4 used when the card edge 42A receives data when the card edge 42A is inserted into the connector 22C. Ends of the plurality of electrodes E14 are respectively connected to a plurality of wirings L14 provided on a printed wiring board 533A of the extension substrate 533. When transmitting data to the device 42, the extension substrate 533 transmits the data via the electrodes E14.

[0056] The flexible substrate 532 has, on its upper surface Us, a plurality of electrodes E13 that respectively contact a plurality of electrodes E3 used when the card edge 42A transmits data when the card edge 42A is inserted into the connector 22C. The flexible substrate 532 further includes a plurality of electro-optical conversion elements EO1 connected to the plurality of electrodes E13, converting electrical signals transmitted during data transmission into optical signals, and a plurality of optical waveguides O1 for transmitting the converted optical signals. The flexible substrate 532 further includes a plurality of photoelectric conversion elements OE1 connected to the plurality of optical waveguides O1, converting optical signals into electrical signals, and an electrode E15 for transmitting the converted electrical signals. The electrodes E15 are respectively connected to a plurality of wiring lines L15 provided on the printed wiring board 533A of the extension substrate 533. Data transmitted via the wiring lines L15 is input to the relay circuit 33F.

[0057] 13 , the flexible substrate 532 has, on its underside Ds, a plurality of electrodes E11 that respectively come into contact with a plurality of electrodes E1 used when the connector 22C receives data when the card edge 42A is inserted into the connector 22C. The plurality of electrodes E11 are respectively connected to a plurality of wirings L11 provided on a printed wiring board 533A of the extension substrate 533. The extension substrate 533 transmits data to the connector 22C via the electrodes E11. This allows data to be supplied to the motherboard 20.

[0058] The flexible substrate 532 has, on its underside Ds, a plurality of electrodes E12 that respectively contact a plurality of electrodes E2 used when the connector 22C transmits data when the card edge 42A is inserted into the connector 22C. The flexible substrate 532 further includes a plurality of electro-optical conversion elements EO2 connected to the plurality of electrodes E12, converting electrical signals used during data transmission into optical signals, and a plurality of optical waveguides O2 for transmitting the optical signals converted by the electro-optical conversion elements EO2. The flexible substrate 532 further includes a plurality of photoelectric conversion elements OE2 connected to the plurality of optical waveguides O2, converting optical signals into electrical signals, and electrodes E16 for transmitting the converted electrical signals. The electrodes E16 are respectively connected to a plurality of wiring lines L16 provided on the printed wiring board 533A of the extension substrate 533. Data transmitted from the connector 22C via the wiring lines L16 is input to the relay circuit 33F.

[0059] The wiring L11 and electrode E11, the wiring L14 and electrode E14, the wiring L15 and electrode E15, and the wiring L16 and electrode E16 may be connected in any manner. For example, the printed wiring board 533A may be a multi-layer substrate, and an electrode provided on the upper surface Us may be connected to a wiring provided on the lower surface of any layer. Furthermore, an electrode provided on the lower surface Ds may be connected to a wiring provided on the upper surface of any layer. The portions beyond the dashed dotted lines in FIGS. 11 and 12 overlap with the layers and are used for connection. Furthermore, as a connection method, any connector into which the portions beyond the dashed dotted lines in FIGS. 11 and 12 are inserted may be mounted on the printed wiring board 533A.

[0060] The above-described structure also applies to the flexible substrate 531. Other descriptions of the relay board 530 are similar to those above. The number of electrodes such as the electrode E11 may be any number that complies with existing standards, such as 82. The flexible substrates 531 and 532 are provided with signal lines and power supply lines as appropriate.

[0061] With the above-described configuration, relay board 30 of this modified example receives data from connector 22B (or 22C) on the underside of flexible substrate 531 (or 532) and outputs the received data to card edge 41A (or 42A) from the upper surface of flexible substrate 531 (or 532). More specifically, this data is supplied to extension substrate 533 via a transmission path, passes through relay circuit 533F, passes through the transmission path on the upper surface of flexible substrate 531 or 532, and is supplied to card edge 41A (or 42A).

[0062] The relay board 30 receives data from the card edge 41A (or 42A) on the upper surface of the flexible substrate 531 (or 532) and outputs the received data to the card edge 42A (or 41A) from the upper surface of the flexible substrate 532 (or 531). More specifically, the data is supplied to the extension substrate 533 via a transmission path on the upper surface of the flexible substrate 531 or 532, and is supplied from the extension substrate 533 to the card edge 42A (or 41A) via a transmission path on the upper surface of the flexible substrate 532 or 531.

[0063] Although an optical transmission path is used in the above, the transmission paths formed on the flexible substrates 531 and 532 may all be electrical wiring without photoelectric conversion. In such a case, at least a portion of the flexible substrates 531 and / or 532 may be configured to include an electromagnetic shielding material. This has the advantage of being able to shield the electrical signals from electromagnetic noise to a certain extent.

[0064] 12 and 13, by replacing part of the wiring with an optical transmission line consisting of an opto-electrical conversion unit and an optical waveguide, it is possible to eliminate the disadvantage of significant deterioration in the frequency characteristics of the electrical signal, and to solve the problem that can occur with electrical connections, such as the inability to receive signals due to signal degradation when using high-speed signals.In addition, the electromagnetic shielding material described above is also unnecessary.

[0065] The insertion port of a card edge connector is typically 1.8 mm thick, and the card edge of a device is typically 1.57 mm thick. Therefore, the thickness of the flexible substrates 531 and 532 interposed between the inner surface of the connector and the card edge must be 0.115 mm (the difference in dimensions divided by 2) or less. In this example, a thin, double-sided flexible substrate with a thickness of 0.081 mm is used. The folds in the flexible substrates 531 and 532 are formed, for example, using fold-forming molds K1 and K2, as shown in FIG. 14 . The folds extend along the longitudinal direction of the connectors 22B and 22C. The folds are fixed by heating during fold formation. The folds facilitate positioning of the flexible substrates 531 and 532 when inserted into the connector. The horizontal positioning of the flexible substrates 531 and 532 is achieved by providing holes in the flexible substrates 531 and 532 that correspond to the key notches in the card edge.

[0066] For example, the combination of the photoelectric conversion element OE2, the electro-optical conversion element EO2, and the optical waveguide O2 can be formed by any desired alignment. For example, a crimping device and an adhesive supply are used to crimp the transmitter (electro-optical conversion element) onto a power supply printed circuit board to establish electrical contact, while driving the transmitter to output optical output (continuous light). The end face of the fiber, which has undergone end face processing, is brought close to the optical output portion, and a test light receiver, for example, of a spatial optical system, is attached to the opposite side of the optical fiber, i.e., the end face of the optical fiber connected to the receiver. The end face of the fiber on the transmitter side is moved and aligned, and when the optical coupling is optimal, i.e., when the photocurrent of the test light receiver is maximized, an adhesive such as epoxy is supplied from an adhesive supply to fix the positions of the end face of the fiber on the transmitter side and the transmitter. Then, while the fixed transmitter side continues to output light, an optical receiver (photoelectric conversion element) is brought close to the end face of the optical fiber on the receiving side. The optical receiver is then electrically connected to the power supply printed circuit board by crimping from above using a crimper and adhesive supplier, and power is supplied to it. In this state, the optical fiber end face on the receiver side is moved while monitoring the photocurrent at the receiver, and when the photocurrent peaks, adhesive such as epoxy is poured from the adhesive supplier to fix the position.

[0067] 15, the combination of the photoelectric conversion element OE2, electro-optical conversion element EO2, and optical waveguide O2 formed above is fixed by soldering the photoelectric conversion element OE2 and the electro-optical conversion element EO2 to power supply pad positions on the flexible substrate 532. Thereafter, the unfixed optical waveguide (optical fiber) O2 is fixed to the flexible substrate 532 with epoxy tape or the like. By repeating these steps, the flexible substrate 532 and the like are formed.

[0068] According to this modification, the flexible substrate is inserted into the connector, eliminating the need for the connection substrate 31. In the above embodiment, the height of the device 41 increases when the relay board 30 is installed due to the presence of the connection substrate 31, but according to this modification, this increase in height can be suppressed.

[0069] The present invention is not limited to the above-described embodiments and modifications. For example, the present invention includes various modifications to the above-described embodiments and modifications that can be understood by a person skilled in the art within the scope of the technical concept of the present invention. The configurations listed in the above-described embodiments and modifications can be combined as appropriate within a range that does not cause contradictions. In addition, any of the above-described configurations can be deleted.

[0070] (Supplementary Notes) Configurations that are examples of the above-described embodiments and modifications are shown below. Only any partial configuration of the above-described embodiments and modifications may be applied to each supplementary note. Also, parts of each supplementary note may be combined. (Supplementary Note 1) A method for manufacturing a computing device, comprising: a first step of removing a first device and a second device from a motherboard having a first connector to which the first device is connected and a second connector to which a second device is connected; and a second step, after the first step, of connecting the first device and the second device to the first connector and the second connector via a relay board, respectively, wherein the relay board receives first data from the first connector and transmits the received first data to the first device, receives second data from the first device without passing through the motherboard, and transmits the received second data to the second device without passing through the motherboard. (Supplementary Note 2) The method for producing a computing device according to Supplementary Note 1, further comprising a third step of, after the second step, the motherboard sending a reset signal to the first device and the second device via the relay board. (Supplementary Note 3) The method for producing a computing device according to Supplementary Note 1 or 2, further comprising a fourth step of installing a program in the first device and the second device that enables the first device to directly transfer data to the second device.(Supplementary Note 4) The motherboard has a first card edge connector and a second card edge connector, The first device has a first card edge, The second device has a second card edge, The relay board comprises: A first plate-shaped connection board having a first end to be inserted and connected to the first card edge connector and a second end opposite the first end, A second plate-shaped connection board having a first end to be inserted and connected to the second card edge connector and a second end opposite the first end, A third card edge connector into which the second end of the first connection board is inserted and connected, A fourth card edge connector into which the second end of the second connection board is inserted and connected, A wiring board having a first main surface on which the third card edge connector and the fourth card edge connector are mounted and a second main surface opposite the first main surface, A fifth card edge connector mounted on the second main surface of the wiring board and into which the first card edge is inserted and connected, a sixth card edge connector mounted on the second main surface of the wiring board and into which the second card edge is inserted and connected, and a relay circuit mounted on the wiring board and configured to output the first data input from the first card edge connector to the third card edge connector via the first connection board to at least one of the fifth card edge connector and the sixth card edge connector, and to output the second data input from the first card edge via the fifth card edge connector to the sixth card edge connector. (Supplementary Note 5) The method for manufacturing a computing device described in Supplementary Note 4, wherein the first card edge connector, the third card edge connector, and the fifth card edge connector are arranged in overlapping positions when viewed from the thickness direction of the motherboard, and the second card edge connector, the fourth card edge connector, and the sixth card edge connector are arranged in overlapping positions when viewed from the thickness direction.(Supplementary Note 6) The motherboard has a first card edge connector and a second card edge connector, The first device has a first card edge inserted into the first card edge connector, The second device has a second card edge inserted into the second card edge connector, The relay board comprises: a first flexible substrate sandwiched between the first card edge and the first card edge connector, and having a first surface in contact with the first card edge and a second surface opposite to the first surface in contact with the first card edge connector, and a second flexible substrate sandwiched between the second card edge and the second card edge connector, and having a first surface in contact with the second card edge and a second surface opposite to the first surface in contact with the second card edge connector, The relay board receives the first data from the first card edge connector by the second surface of the first flexible substrate, and outputs the received first data from the first surface of the first flexible substrate to the first card edge, The method for manufacturing a computing device according to any one of Supplements 1 to 5, wherein the second data from the first card edge is received by the first surface of the first flexible substrate, and the received second data is output from the first surface of the second flexible substrate to the second card edge. (Supplementary Note 7) The method for manufacturing a computing device according to Supplementary Note 6, wherein at least one of the first flexible substrate and the second flexible substrate comprises an optical wave guide that transmits the first data or the second data by an optical signal. (Supplementary Note 8) The method for manufacturing a computing device according to Supplementary Note 6, further comprising a fifth step of forming a fold in a portion of the first flexible substrate that is to be inserted into the first card edge connector, the fold extending along the longitudinal direction of the first card edge connector.

[0071] 10... computing device, 20... motherboard, 21... first board, 21A... printed wiring board, 21B to 21C... processor, 21D to 21E... RAM, 21F... storage, 21G... ROM, 22... second board, 22A... printed wiring board, 22B to 22L... connector, 30... relay board, 31... connection board, 31A... board main body, 31B... wiring pattern, 32... connection board, 32A... board main body, 32B... wiring pattern, 32D to 32E... Connector, 33... extension board, 33A... printed wiring board, 33B to 33E... connectors, 33F... relay circuit, 33G... clock circuit, 41... device, 41A... card edge, 41B... fixing piece, 42... device, 42A... card edge, 42B... fixing piece, 50... housing, 51... rear end upper surface, 52B to 52K... screw holes, 60... device fixing portion, 61... spacer, 62... nut, 62A... male thread portion, 62B... female thread portion, 63... screw, 70... cover, 80... screw , 91...screw, 130...relay board, 133...extension board, 133AA...printed wiring board, 133AB...printed wiring board, 139...flexible board, 233...extension board, 239...optical transceiver, 333...extension board, 333A...printed wiring board, 333B to 333C...connector, 333E...optical transceiver, 333G...relay circuit, 333H...clock circuit, 333P...optical connector, 333R...control loop, 333S...optical switch, 530...relay Board, 531-532...flexible substrate, 533...extension substrate, 533A...printed wiring board, 533F...relay circuit, 1000...computing device, Ds...bottom surface, E1-E4...electrodes, E11-E16...electrodes, EO1-EO2...electrical-optical conversion elements, K1-K2...mold, L11...wiring, L14-L16...wiring, NIC...network interface card, O1-O2...optical waveguide, OE1-OE2...photoelectric conversion elements, U...unit, Us...top surface.

Claims

1. A method for manufacturing a computing device, comprising: a first step of removing a first device and a second device from a motherboard having a first connector to which the first device is connected and a second connector to which a second device is connected; and a second step after the first step of connecting the first device and the second device to the first connector and the second connector via an relay board, respectively, wherein the relay board receives first data from the first connector and transmits the received first data to the first device, receives second data from the first device without going through the motherboard, and transmits the received second data to the second device without going through the motherboard.

2. The method for manufacturing a computing device according to claim 1, further comprising a third step after the second step, in which the motherboard sends a reset signal to the first device and the second device via the relay board.

3. The method of claim 1, further comprising a fourth step of installing a program on the first device and the second device that enables the first device to transfer data directly to the second device.

4. The motherboard has a first card edge connector and a second card edge connector, the first device has a first card edge, the second device has a second card edge, the relay board comprises: a first plate-shaped connection board having a first end inserted and connected to the first card edge connector and a second end opposite the first end, a second plate-shaped connection board having a first end inserted and connected to the second card edge connector and a second end opposite the first end, a third card edge connector into which the second end of the first connection board is inserted and connected, a fourth card edge connector into which the second end of the second connection board is inserted and connected, a wiring board having a first main surface on which the third card edge connector and the fourth card edge connector are mounted and a second main surface opposite the first main surface, and a fifth card edge connector mounted on the second main surface of the wiring board and into which the first card edge is inserted and connected.

2. The method for manufacturing a computing device according to claim 1, further comprising: a sixth card edge connector mounted on the second main surface of the wiring board and into which the second card edge is inserted and connected; and a relay circuit mounted on the wiring board and configured to output the first data input from the first card edge connector to the third card edge connector via the first connection board to at least one of the fifth card edge connector and the sixth card edge connector, and to output the second data input from the first card edge via the fifth card edge connector to the sixth card edge connector.

5. A method for manufacturing a computing device as described in claim 4, wherein the first card edge connector, the third card edge connector, and the fifth card edge connector are arranged in positions that overlap when viewed from the thickness direction of the motherboard, and the second card edge connector, the fourth card edge connector, and the sixth card edge connector are arranged in positions that overlap when viewed from the thickness direction.

6. The motherboard has a first card edge connector and a second card edge connector, the first device has a first card edge inserted into the first card edge connector, the second device has a second card edge inserted into the second card edge connector, the relay board comprises: a first flexible substrate sandwiched between the first card edge and the first card edge connector, and having a first surface in contact with the first card edge and a second surface opposite to the first surface in contact with the first card edge connector, and a second flexible substrate sandwiched between the second card edge and the second card edge connector, and having a first surface in contact with the second card edge and a second surface opposite to the first surface in contact with the second card edge connector, the relay board receives the first data from the first card edge connector by the second surface of the first flexible substrate and outputs the received first data from the first surface of the first flexible substrate to the first card edge, 2. The method of claim 1, further comprising receiving the second data from the first card edge by the first surface of the first flexible substrate, and outputting the received second data from the first surface of the second flexible substrate to the second card edge.

7. The method of claim 6, wherein at least one of the first flexible substrate and the second flexible substrate comprises an optical wave guide that transmits the first data or the second data by an optical signal.

8. The method for manufacturing a computing device according to claim 6, further comprising a fifth step of forming a fold in the portion of the first flexible substrate that is to be inserted into the first card edge connector, the fold extending along the longitudinal direction of the first card edge connector.

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