Metallized structures formed using metal organic decomposition ink films and methods for preparing the same

Abstract

Materials and methods for metallizing target substrates and metallized structures formed according to these methods are provided. The methods generally involve the formation of a conductive seed layer on a target substrate. The conductive seed layer is formed using a conductive ink composition that is converted to a conductive metallic film on the target substrate. The conductive metallic film is then metallized using standard additive techniques such as electroplating. The methods can further include masking and unmasking steps and optional etching of the metallized surface to generate conductive patterned structures. Also provided are metallized structures that comprise a conductive seed layer on the target substrate and a metallized layer on the conductive seed layer. In some cases, the metallized structures are prepared according to the disclosed methods.

Description

Patent Application 3611-00-026W01METALLIZED STRUCTURES FORMED USING METAL ORGANIC DECOMPOSITION INK FILMS AND METHODS FOR PREPARING THE SAMEField of the Invention

[0001] The present disclosure relates generally to novel materials and methods for metallizing a target substrate, in particular methods including the step of seeding the target substrate with a conductive film prepared from a metal organic decomposition (MOD) ink. The disclosure also relates to novel metalized structures that are formed according to the disclosed materials and methods.Background of the Invention

[0002] Components of electronic or opto-electronic systems, such as for example Integrated Circuits (ICs) like data and / or signal processors (microprocessors, CPUs, DSPs, ASICs), photodetectors, and semiconductor lasers, are usually packaged in a supporting case, and then assembled into a circuit board (e.g., a printed circuit board, or PCB). The packaging performs the double function of providing a mechanical support for the IC as well as a functional (electrical) interconnection between the different systems’ components. There is an ongoing need in the electronics industry to provide increased functionality in increasingly smaller devices. While most of the effort has been focused on decreasing the footprint of electronic components on a circuit board, more recent efforts have focused on stacking components thereby occupying the space above and below the board instead of occupying surface area of the board. Further, there is an ongoing need for packages comprising multiple components, which can be serially connected, while minimizing the footprint of the package on the circuit board.

[0003] Additive manufacturing techniques, including electroplating, electroless plating, thin-film deposition techniques, lithography, advanced printing techniques, and the like,are becoming increasingly important in the fabrication of modern electronics. For example, the ability to deposit thick (i.e., significantly greater than 1 micron) and dense metallic structures over large areas by electroplating is crucial to many aspects of such fabrication, from the preparation of printed circuit board (PCB) substrates to wafer metallization. Traditionally, the electroplating process is complex and resource-intensive, and it typically requires numerous steps to complete. For example, a substrate or interface used in the electroplating process typically begins as an insulator, whether organic or inorganic in nature. The substrate is typically cleaned, coated, and activated in a catalyst bath, and then subjected to electroless deposition to achieve a thin (typically less than 1 micron) metal film. This film can then serve as an electrically-conductive seed layer for the generation of a dense, electroplated metal layer. The electroplated layer can also be directed in the form of photo resist to create high resolution or complex patterns whereby the resist can be removed, leaving behind the pure metallic traces. The conductive material deposited using traditional electroplating processes can be a variety of metals, including copper, nickel, gold, and the like, but copper is most commonly used, due to its desirable electrical properties.

[0004] The traditional plating process is extremely water intensive and creates several chemical residues that create environmental concerns from metal ions and metallic impurities in the process effluents as well as potentially carcinogenic organic moieties that are used in the reduction process specifically for electroless plating. Furthermore, the thin metal layer seeded on the substrate by electroless deposition process is traditionally palladium, which is both expensive and rare.

[0005] For example, U.S. Patent No. 8,628,818 discloses exemplary semi-additive processes using a precursor composition comprising catalytic palladium. The precursor is deposited onto a target substrate to form an active palladium layer. The active palladium is disposed in minute amounts on the surface and does not form a conductive layer by itself but facilitates subsequent deposition of a metal onto the surface to form a conductive layer. After masking, the conductive layer can be plated with additional metal to form conductive lines of the desired thickness. The mask layer can then be removed, and the exposed thin conductive layer etched, to generate the desired conductive pattern.

[0006] PCT International Publication No. WO2013 / 128449 A2 discloses printing formulations for printed electronics comprising metal precursors. The formulationsinclude metal precursors in the form of metal salt nanoparticles that are dispersed in a medium and metal complexes that are dissolved in a medium. The metallic patterns formed from these formulations are not sufficiently stable or conductive in standard electroplating solutions, however, and cannot be used directly for electroplating. Instead, they must be metallized using electroless deposition methods.

[0007] There is thus a need for improved materials and methods for the additive manufacture of electronics, in particular the metallization of target substrates, as well as metallized target structures prepared using the improved materials and methods.Summary of the Invention

[0008] In some aspects, the techniques described herein relate to a metallized structure including: a substrate; a conductive seed layer on a surface of the substrate, wherein the conductive seed layer is formed by applying a conductive ink to the surface of the substrate; and an electroplated conductive layer on the conductive seed layer.

[0009] In some aspects, the techniques described herein relate to a metallized structure, wherein the conductive seed layer includes a film made from a metal organic decomposition (MOD) ink.

[0010] In some aspects, the techniques described herein relate to a metallized structure, wherein the MOD ink includes a metal salt.

[0011] In some aspects, the techniques described herein relate to a metallized structure, wherein the metal salt is a silver metal salt, a copper metal salt, a nickel metal salt, an indium metal salt, a gold metal salt, a palladium metal salt, a platinum metal salt, an alloy material of these metals as main component, or a combination of these metal salts.

[0012] In some aspects, the techniques described herein relate to a metallized structure, wherein the MOD ink is applied by spray coating, slot die coating, spin coating, dip coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, dispenser, or electrohydrodynamic printing.

[0013] In some aspects, the techniques described herein relate to a metallized structure, wherein the conductive ink is a nanoparticulate ink, a microparticulate ink, a carbon ink, a copper sulfate ink, a conductive polymer ink, or a metal complex conductive ink.

[0014] In some aspects, the techniques described herein relate to a metallized structure, wherein the conductive seed layer is adherent and stable enough for direct plating.

[0015] In some aspects, the techniques described herein relate to a metallized structure, wherein the substrate displays a 3-dimensional shape, optionally wherein the substrate displays vias, bumps, a metal wrap, or passive components for filtering.

[0016] In some aspects, the techniques described herein relate to a metallized structure, wherein the substrate is a semiconductor substrate, an electrically conductive substrate, or an electrically insulative substrate.

[0017] In some aspects, the techniques described herein relate to a metallized structure, wherein the electrically conductive substrate further includes graphite, a conductive polymer, a halide crystal, aluminum, copper, gold, silver, titanium, nickel, an alloy of these metals, or a combination thereof.

[0018] In some aspects, the techniques described herein relate to a metallized structure, wherein the semiconductor substrate or the electrically insulative substrate further includes silicon, epoxy, glass, organic, organic build-up film, Ajinomoto build-up film (ABF), glass-reinforced epoxy laminate (FR4), polyimide, gallium arsenide, sapphire, silicon carbide, galium oxide, diamond, galium nitrate, indium phosphide, gallium phosphide, or a combination thereof.

[0019] In some aspects, the techniques described herein relate to a metallized structure, wherein the MOD ink is applied to the surface of the substrate in an ambient atmosphere.

[0020] In some aspects, the techniques described herein relate to a metallized structure, wherein the MOD ink further includes a silane adhesion promoter.

[0021] In some aspects, the techniques described herein relate to a metallized structure, wherein the MOD ink is applied to the surface of the substrate at an elevated temperature.

[0022] In some aspects, the techniques described herein relate to a metallized structure, wherein the substrate includes a semiconductor chip, an epoxy molding compound, a chip encapsulating material, or a combination thereof.

[0023] In some aspects, the techniques described herein relate to a metallized structure, wherein the semiconductor chip is a silicon wafer, a gallium wafer, a gallium arsenide wafer, or an indium wafer.

[0024] In some aspects, the techniques described herein relate to a metallized structure, wherein the electroplated conductive layer further includes a mask layer.

[0025] In some aspects, the techniques described herein relate to a metallized structure, wherein the mask layer is partially removed.

[0026] In some aspects, the techniques described herein relate to a metallized structure, wherein the conductive seed layer is partially etched.

[0027] In some aspects, the techniques described herein relate to a metallized structure, wherein the conductive seed layer has a resistance of no more than 5 Ohms per square, no more than 2 Ohms per square, no more than 1 Ohm per square, or no more than 0.5 Ohms per square.

[0028] In some aspects, the techniques described herein relate to a metallized structure, wherein the conductive seed layer has a thickness of from about 0.003 pm to about 5 pm.

[0029] In some aspects, the techniques described herein relate to a metallized structure, wherein the electroplated conductive layer displays a peel strength of at least 3 pounds per linear inch.

[0030] In some aspects, the techniques described herein relate to a multi-metallized structure including: a substrate; a conductive seed layer on a surface of the substrate, wherein the conductive seed layer is formed by applying a conductive ink to the surface of the substrate; a first metallic layer on the conductive seed layer; and a second metallic layer on the first metallic layer.

[0031] In some aspects, the techniques described herein relate to a multi-metallized structure, wherein the multi-metallized structure is a land grid array structure, a ball grid array structure, or a flip-chip ball grid array structure.

[0032] In some aspects, the techniques described herein relate to a multi-metallized structure, wherein the first metallic layer includes nickel and the second metallic layer includes gold.

[0033] In some aspects, the techniques described herein relate to a multidevice electronic assembly including a plurality of metallized structures, as described herein, wherein the plurality of multi-metallized structures are electrically coupled.

[0034] In some aspects, the techniques described herein relate to a multidevice electronic assembly, wherein the plurality of multi -metallized structures are electrically coupled by soldering.

[0035] In some aspects, the techniques described herein relate to a method for preparing a metallized structure including the steps of: providing a substrate for metallizing; applying a conductive ink to the substrate; converting the conductive ink into a conductiveseed layer on the substrate; and metallizing the conductive seed layer with a conductive material to form a metallized structure.

[0036] In some aspects, the techniques described herein relate to a method, wherein the conductive ink is applied by spray coating, slot die coating, spin coating, dip coating, roll- to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, dispenser, or electrohydrodynamic printing.Brief Description of the Drawings

[0037] FIG. 1 shows an exemplary semi-additive process flow for electroplating a target surface seeded with a conductive layer prepared using a MOD conductive ink.

[0038] FIG. 2 graphically illustrates typical steps used in an ink semi-additive process (iSAP) with a metal-organic decomposition (MOD) ink.

[0039] FIG. 3A graphically illustrates the coating of a metal conductive ink on a target substrate and the optional curing of the coated substrate in an oven.

[0040] FIG. 3B provides another graphic illustration of the spray coating process.

[0041] FIG. 3C provides a graphic illustration of the spin coating process.

[0042] FIG. 3D shows a process flow for the preparation of a flexible copper clad laminate (FCCL) using the instant methods.

[0043] FIG. 4A provides a graphic illustration of a metallized structure prepared according to the methods described herein using a MOD ink film conductive seed layer.

[0044] FIG. 4B shows a scanning electron microscopic (SEM) image of a target surface (substrate) that was coated with a silver complex conductive ink seed layer and subsequently electroplated with a copper trace. Each layer is labeled.

[0045] FIGs. 5A-5B show scanning electron microscopic (SEM) images of exemplary target surfaces electroplated according to the methods disclosed herein.

[0046] FIGs. 6 and 7 show the characteristics of seed layers formed on target substrates using silver complex conductive inks.

[0047] FIGs. 8A-8D show electroplating conditions and peel strength results for target substrates electroplated according to the methods of the application.

[0048] FIGs. 9A-9B show the characteristics of electroplated copper structures prepared according to methods of the disclosure using copper complex conductive inks to form the conductive seed layers.

[0049] FIG. 10 shows silicon wafers spin-coated with a copper conductive seed layer.Detailed Description of the Invention

[0050] The current disclosure addresses the need for improved materials and methods for the metallization of target substrates, including novel methods that seed the target substrate with a conductive layer prior to the metallization step or steps. More specifically, the target substrates are coated with a thin, highly-conductive metallic layer that adheres well to the target surface, that can act as a highly-conductive pathway for the subsequent metallization step or steps, and that provides a stable base layer for the subsequent deposition of a metallic layer or layers by the metallization process. The methods disclosed herein are particularly useful in copper electroplating applications, which are used, for example, in the manufacture of electrical and electronic devices. The methods are also particularly useful in the manufacture of PCBs with extremely fine conductive patterns.

[0051] The disclosure also provides metallized target structures comprising a conductive seed layer on a target surface and an electroplated conductive layer on the conductive seed layer. In these metallized target structures, the conductive seed layer is preferably formed by applying a conductive ink to the target substrate prior to a metallization step, such as an electroplating step.

[0052] In traditional PCB fabrication methods, a thick layer of conductive material, for example a copper foil material, is first applied to a base dielectric material, and the laminated material is then patterned and etched to remove the unnecessary conductive material in a “subtractive” process. The remaining conductive material provides the pattern for the electrical circuit. These methods are known to be highly energy- and reagent-intensive and can involve the use and generation of toxic agents. Subtractive processes are also becoming less and less suitable for use in the manufacture of modem electronic devices, as semiconductor sizes decrease, and as the corresponding package substrate sizes and related PCB feature sizes also decrease according to similar scaling factors. Conventional subtractive processes result in trace widths ranging from about 30 pm to about 200 pm. The patterned features generated according to subtractive methods, for example patterned conductive lines and the patterned spaces between the patterned conductive lines, can be, for example, about 40 pm wide.

[0053] More recent alternative “additive” methods for the fabrication of PCBs have been adapted from the integrated circuit (IC) industry, where patterned electrical circuits are formed by plating a thicker layer of conductive material on the surface of a thin, conductive or catalytic, “seed” layer.

[0054] In a fully additive process, which can be used to pattern a metal onto the surface of a dimensional target substrate, an electroless metal solution is plated onto a patterned catalytic material on the surface of the substrate. Although the plated metal circuits do not necessarily need to be processed further, the cost of the process is high, and the current outputs through the plated metal circuits are low.

[0055] In a semi-additive process (SAP), which is now more commonly used in the fabrication of PCBs, a thin conductive seed or base layer is first formed across the entire surface of a dielectric or other base material by a chemical or physical process (e.g., electroless deposition, physical vapor deposition (PVD), or chemical vapor deposition (CVD)). A patterned resist layer is then formed on the surface of the conductive seed layer, and a circuit or residual conductive layer of thicker metal is formed on the surface of the seed layer by electroplating. The resist layer and the exposed seed layer are then removed to leave a precise circuit or pattern of thicker metal. Semi-additive processes can result in trace widths ranging from about 10 pm to about 30 pm. Patterned features (lines and spaces) generated according to these methods can be, for example, about 15 pm wide.

[0056] In a modified semi-additive process (mSAP), which has recently been used in the fabrication of high-volume circuit boards, such as those used in smart phones, the seed layer is formed on the surface of the dielectric or other base material, either by laminating a thicker layer of copper foil onto the dielectric layer and etching it back or by laminating a thin layer of copper foil bound to a thicker layer of copper foil and peeling off the thicker layer of copper. The seed layer is then patterned and electroplated as described above for the semi-additive process. Modified semi-additive processes can result in trace widths ranging from about 20 pm to about 80 pm. Patterned features (lines and spaces) generated according to mSAP methods can be, for example, about 20 pm wide.

[0057] A key difference between the SAP and mSAP methods is the starting conductive layer. SAP has a thinner starting conductive layer thickness, often ten times thinner, so the etching step used to remove the seed layer can be much faster than that used in mSAP.The starting conductive layer mSAP is a foil conductive layer, which can in some cases impact the trace and space feature size.

[0058] A sputtered conductive layer can also be used as the seed layer in some circumstances, but such approaches often require a tie layer to promote adhesion, which can be problematic in the final step. The sputtering process is also expensive and does not effectively plate vias.

[0059] The electroless plating steps described above, which may also be referred to as auto-catalytic plating or chemical plating, are non-galvanic plating methods that typically involve several simultaneous reactions. They can be used to target surfaces seeded, for example, with compositions comprising a catalytic palladium (see, e.g. , U.S. Patent No. 8,628,818) or a copper complex ink (see, e.g., Asahi Copper Complex Ink (CCI-3301) (asahisolder.com / product / copper-ink / ). Such seed layers may not themselves be sufficiently conductive, adherent, or stable to serve as seed layers for direct electroplating reactions, but they can provide suitable surfaces for electroless deposition. The electroless depositions occur in aqueous solution, typically without the use of an external source of electrical power. Instead, the plating reactions are accomplished by the use of chemical reducing agents to generate conductive metals on the surface of the target structure. Commonly used electroless plating methods include electroless copper plating and electroless nickel plating.

[0060] As mentioned above, electroless deposition can be used to form seed layers for use in SAP, but it can be difficult to achieve suitable adhesion and insulation between fine pitch circuitries. Specifically, electroless deposition is not typically used for trace widths less than about 20 pm. In contrast, the conductive inks used in the iSAP and other approaches of the instant disclosure result in seed layers that display strong adhesiveness to a resin substrate, good thin-film thickness distribution, high conductivity, low porosity, and good film formation in and around via holes. They enable fast etching of thin cathode layers, provide receptive surfaces for electroplating and other types of metallization, are environmentally friendly, and rely on aldehyde-free chemistry. The seed layers are also stable to the conditions used to electroplate printed electronics. The seed layers can therefore be electroplated directly, without the need for an electroless deposition step. The use of iSAP can result in trace widths of from about 0.4 pm to about 10 pm. Patterned features (lines and spaces) generated according to the iSAP methods can be as low asabout 0.5 pm wide. The metallized target structures prepared according to these methods exhibit improved performance and properties, as will be disclosed in more detail below.

[0061] The conductive seed layers used to form the metallized target structures of the instant disclosure are preferably generated using a conductive ink composition that can be applied with high uniformity to a target surface. Any suitable conductive ink composition can be used to generate the conductive seed layer. For example, the conductive ink composition can be a nanoparticulate ink, a microparticulate ink, a carbon ink, a copper sulfate ink, a conductive polymer ink, or a metal complex or MOD ink. The conductive ink composition is preferably a metal complex or MOD ink.

[0062] Metal organic decomposition (MOD) inks or metal complex inks present a promising complimentary or even alternative to PVD using an ambiently processable spray coating process. The MOD ink chemistry mixed with the physics of mass transfer from the cloud of aerosolized ink allows for even sidewall coverage on a 5-sided package with densely packed semiconductor packages (100-200 micron spacing compared to 2 mm spacing with PVD) without implementing specialty fixturing or stage movements while using 100’s of times less power and significantly less water than either PVD or plating processes. The MOD inks unique ability to achieve near bulk conductivity also allows for no sacrifice in EMI shielding performance. These features make for an extremely viable alternative to current process techniques while allowing a far more environmentally friendly process at a reduced equipment cost and greater throughput.

[0063] The MOD inks used to form the conductive seed layers of the methods and metallized target structures disclosed herein can comprise any suitable metal. Exemplary metallic inks can be, for example, silver, copper, palladium, gold, platinum, indium, or nickel inks. In preferred embodiments, however, the conductive ink is a copper ink or a silver ink. In some embodiments, the conductive ink does not comprise palladium.

[0064] The target substrates used in forming the conductive seed layers are preferably heated to a slightly elevated temperature prior to application of the conductive ink composition. On contact with the heated surface, the conductive ink composition rapidly decomposes to form a highly-conductive film that is tightly attached to the target surface. In some embodiments, the seed layer formed from the conductive ink composition can be the target for metallization without further modification. In some embodiments, however, the seed layer can be further processed by a “curing” step. For example, curing the seedlayer at an elevated temperature can remove any remaining volatile components of the ink and thus improve its physical and / or electrical properties of the surface. In some cases, the seed layer can be subjected to plasma treatment, for example a CF4 plasma treatment, an O2 plasma treatment, or a combination of CF4 and O2 plasma treatment, in order to improve the chemical or physical properties of the surface. Seed layers are typically further heated after the plasma treatment in order to remove any volatile residues.

[0065] As will be described in more detail below, the just-described materials and methods can eliminate several process steps that are typically required in traditional metallization methods, thus greatly simplifying the process. The methods can also eliminate the use of significant amounts of the water that is typically used in traditional metallization methods, for example electroplating methods, thus greatly reducing the environmental damage and cost of water treatment needed in the traditional approaches. Although the conductive seed layer can, in principle, be made of a conductive ink comprising any suitable metal, copper ink compositions provide advantages due to the compatibility of a copper seed layer with subsequent metallized copper layers, and silver ink compositions provide advantages due to the ease of handling and stability of these inks and the high conductivity of silver seed layers. Use of copper or silver seed layers can also simplify the etching process, since etchants for these metals are well known and widely used in the industry. Etching of other seed layer materials, such as etching of seed layers containing catalytic palladium, can require stronger conditions.

[0066] FIG. 1 shows an exemplary process flow for the semi-additive formation of a conductive pattern using a conductive seed layer formed by the deposition of a conductive ink on a target surface. As shown, the seed layer formed from the conductive ink can be further treated using traditional fabrication techniques, including the steps of printing a removable mask over the seeded target surface according to the negative of a desired pattern, electroplating dense conductive lines according to the exposed pattern, removing the mask layer, and etching the base conductive seed layer. Advantageously, however, the use of a printable conductive ink to form a conductive layer on the target surface can in some cases allow a user to form a desired patterned conductive trace in the first deposition step by an inkjet or other suitable printing technique. The desired conductive trace can then be built up directly by electroplating the printed conductive seed layer, thuseliminating the need for the masking, demasking, and etching steps of the process shown in FIG. 1.

[0067] FIG. 2 graphically illustrates the steps typically involved in an ink semi-additive process (iSAP). In the first step, a suitable conductive ink composition is applied to a target surface to form a conductive seed layer on the target surface. This step can be performed, for example, by the spray coating of a metal-organic decomposition (MOD) ink on the target surface. The target surface is preferably the surface of a target substrate that is associated with a heated platen, for example as shown in FIG. 3A, so that the conductive ink is converted into a conductive seed layer as the ink contacts the target surface. The conductive seed layer can optionally be cured at an elevated temperature, or by other means, for example as also shown in FIG. 3A. The curing step can advantageously remove residual solvents or other volatile agents from the seed layer prior to electroplating. The MOD ink film can be applied by any suitable method, including spray coating (FIG. 3B) and spin coating (FIG. 3C).

[0068] FIG. 3D illustrates use of the disclosed methods of metallization to form circuits on a flexible polyimide (PI) substrate. Such approaches can be used for the direct, patterned metallization of printed circuit boards (PCBs) or laminates. They can achieve strong adhesion to hydrophobic surfaces for ultra-high frequency electronics applications. The resulting metal complex layers have desirable properties (i.e., high conductivity, no binders) that can serve as effective “seed layers” for downstream electroplating or e-less plating. These methods achieve cost savings and process simplicity in, for example, flexible copper clad laminate (FCCL) and other types of traditional PCB and flexible PCB manufacturing compared to known methods.

[0069] The initial ink deposition step in iSAP distinguishes this process from other additive processes currently used in the electronics industry to form conductive seed layers on target substrates prior to metallization, for example the processes used in the manufacture of printed circuit boards with fine pitch circuitries. Specifically, the iSAP ink deposition step replaces the use of etched metal foils, ultrathin metal foils, electroless metal plating, physical vapor deposition (PVD) or chemical vapor deposition (CVD), and catalytic inks comprising palladium. Advantages of the iSAP approach over traditional additive or semi-additive processing (SAP) methods for the fabrication of electronic circuitry include the high adhesion of the seed layer on smooth surfaces, the fast etching ofthe thin cathode seed layer, the receptive surface of the seed layer for the metallization, the environmentally friendly process due to the absence of aldehydes, and the efficient coverage of via walls. In the case of MOD inks comprising copper or silver, known and widely-used etchants are available to remove the residual seed layer in the last step of the process.

[0070] In some cases the seed layer can be subjected to a post-treatment step to improve the surface for subsequent metallization. For example, the seed layer can be subjected to a plasma treatment step, for example, an O2 plasma post-treatment step, a CF4 plasma posttreatment step, or a combination of an O2 plasma and a CF4 plasma post-treatment step. The post-treated surface can be subjected to an additional bake after the plasma treatment in order to remove any remaining residues and to improve the visual appearance of the seed layer. These steps are not shown in FIGs. 1 or 2.

[0071] After the conductive seed layer has been applied to the target surface, the surface can be laminated, for example, with a dry film photo resist (DFR), as shown in step 2 of FIG. 2. The laminated surface can then be patterned, for example by photoresist exposure to light through a suitable mask, as shown in step 3 of FIG. 2, and developed, as shown in step 4 of FIG. 2. The exposed seed layer can then be metallized, for example by a copper plating step, as shown in step 5 of FIG. 2. Following the metallization step, the remaining DFR can be stripped, as shown in step 6 of FIG. 2, and the exposed seed layer can be flash etched, as shown in step 7 of FIG. 2 to complete the process and reveal the final highly conductive structure.

[0072] In some embodiments, a patterned conductive seed layer is formed on a target substrate by applying a conductive ink to the target substrate in a desired pattern. After converting the conductive ink into a patterned conductive seed layer, the patterned conductive seed layer is metallized with a conductive material to form a patterned metallized structure. In these embodiments, the patterned metallized structure is preferably formed without the need for any masking, de-masking, or etching steps.

[0073] The conductive features of the metallized structures that are generated according to the iSAP methods can have significantly higher resolution than those prepared according to known techniques. For example, in some embodiments these metallized structures can comprise a plurality of patterned conductive lines wherein at least one patterned conductive line has a width of no more than 10 pm, no more than 5 pm, no morethan 2 pm, no more than 1 pm, no more than 0.5 pm, or even narrower. Preferably at least one patterned conductive line has a width of no more than 1 pm. In some embodiments, these electroplated target surfaces can comprise a plurality of patterned spaces between the patterned conductive lines wherein at least one patterned space has a width of no more than 10 pm, no more than 5 pm, no more than 2 pm, no more than 1 pm, no more than 0.5 pm, or even narrower. Preferably at least one patterned space has a width of no more than 1 pm.

[0074] In some metallized structure embodiments, the conductive seed layer does not comprise a conductive foil. In some metallized structure embodiments, the conductive seed layer does not comprise a layer formed by electroless deposition. In some metallized structure embodiments, the conductive seed layer does not comprise a layer formed by physical vapor deposition. In some metallized structure embodiments, the conductive seed layer does not comprise a layer formed by chemical vapor deposition. In some metallized structure embodiments, the conductive seed layer does not comprise palladium.Methods for Electroplating using a Conductive Seeded Target Surface

[0075] According to one aspect, the current disclosure provides novel methods for electroplating a target substrate. These methods can include, for example, the steps of providing a target substrate for electroplating, applying a conductive ink to the target substrate, converting the conductive ink into a conductive seed layer on the target surface, and electroplating the conductive seed layer with a conductive material to form an electroplated structure.

[0076] The target substrate used in the methods can be any suitable substrate having a surface that is compatible with the treatment steps. The target surface is typically an exposed surface of a suitable non-conducting substrate. Where the conductive ink is converted to a conductive seed layer by a heat treatment, the target surface is preferably capable of being heated to a threshold temperature that is sufficient to convert the conductive ink to the conductive seed layer in a reasonable time. Since the threshold temperature necessary to form a conductive seed layer from the conductive inks typically used in these methods is low, most materials suitable for use in the subsequent electroplating steps are also suitable for use as target surfaces for the conductive seed layer. The target surface should be suitably adherent, both for the conductive ink itself and for the conductive seed layer formed from the ink. The target surface, and anyunderlying target substrate, is preferably not sensitive to the components of the conductive ink compositions used in the process, for example any of the solvents or reactive agents present in the conductive ink. The target surface, and any underlying target substrate, is also preferably compatible with the conditions used in the subsequent electroplating step or steps.

[0077] Exemplary target substrates can be organic substrates or inorganic substrates, for example, glass, metal, or silicon substrates. More specifically, target substrates can comprise, without limitation, polyimide, epoxy with glass reinforcement, buildup films with no reinforcement, glass, silicon, passivated metals, bare metals, ceramics, engineered plastics, or three-dimensional (3D)-printable materials. An exemplary buildup film is Ajinomoto Build-up Film® (ABF).

[0078] In some embodiments, the target substrate is a semiconductor substrate, an electrically conductive substrate, or an electrically insulative substrate. More specifically, the electrically conductive substrate can further comprise graphite, a conductive polymer, a halide crystal, aluminum, copper, gold, silver, titanium, nickel, an alloy of these metals, or a combination thereof. In other more specific embodiments, the semiconductor substrate or the electrically insulative substrate further comprises silicon, epoxy, glass, organic, organic build-up film, Ajinomoto build-up film (ABF), glass-reinforced epoxy laminate (FR4), polyimide, gallium arsenide, sapphire, silicon carbide, galium oxide, diamond, galium nitrate, indium phosphide, gallium phosphide, or a combination thereof.

[0079] In some embodiments, the target substrate comprises a semiconductor chip, an epoxy molding compound, a chip encapsulating material, or a combination thereof. More specifically, the semiconductor chip can be a silicon wafer, a gallium wafer, a gallium arsenide wafer, or an indium wafer.

[0080] In some embodiments, the target substrate can display a 3-dimensional shape. More specifically, the target substrate can display vias, bumps, a metal wrap, or passive components for filtering.

[0081] The target surface, and any underlying target substrate, can be associated with a heat source, so that the target surface can be heated to, or above, a threshold temperature prior to application of the conductive ink to the surface. In some embodiments, the target surface, and any underlying target substrate, is in direct physical contact with the heat source. In other embodiments, the target surface, and any underlying target substrate, isheated through space by a heat source that is not in direct physical contact with the target surface or underlying substrate. Examples of heat sources include an IR lamp, an oven, a platen, or a heated substrate.

[0082] As just described, in some embodiments, the instant methods include the step of heating the target surface to a threshold temperature. More specifically, the target surface is heated to a threshold temperature of at least about 80° C. In some embodiments, the target surface is heated to a threshold temperature of about 250 °C or less, of about 230 °C or less, of about 210 °C or less, of about 200 °C or less, of about 190 °C, of about 180 °C or less, of about 170 °C or less, of about 160 °C, of about 150 °C or less, of about 140 °C or less, of about 130 °C or less, of about 120 °C or less, of about 1 10 °C or less, or even of about 90 °C or less. The threshold temperature reflects the temperature required to convert the conductive ink to a conductive seed layer. In other words, at the threshold temperature, the conductive ink forms a conductive structure upon application to the heated target surface.

[0083] In some embodiments, the conductive ink is cured by photo activation, for example by irradiation of the conductive ink on the target surface. More specifically, the irradiating step can be performed by exposing the conductive ink to a light source at a wavelength from about 100 nm to about 1500 nm. In some embodiments, the irradiating step can be performed by exposing the conductive ink to a light source such as a Xenon lamp, an IR lamp, or a laser at a wavelength from about 100 nm to about 1000 nm. In some embodiments, the irradiating step can be performed by exposing the conductive ink to a light source at a wavelength from about 100 nm to about 700 nm. In some embodiments, the irradiating step can be performed by exposing the conductive ink to a light source at a wavelength from about 100 nm to about 500 nm. In some embodiments, the irradiating step can be performed by exposing the conductive ink to a light source at a wavelength from about 100 nm to about 300 nm. In some embodiments, the irradiating step can be performed by exposing the conductive ink to a light source at a wavelength of about 100 nm, about 200 nm, about 300 nm, about 400 nm, about 500 nm, about 600 nm, about 700 nm, about 800 nm, about 900 nm, or about 1000 nm.

[0084] In some embodiments, the conductive ink is applied by slot die coating, spin coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating,3D printing, dispenser, or electrohydrodynamic printing. More specifically, the ink can be applied by inkjet printing, dip coating, or spray coating. In preferred embodiments, the ink is applied by inkjet printing so that a patterned conductive seed layer of suitable design can be formed on the target surface. In other preferred embodiments, the ink is applied by spray coating so that large areas of a target surface can be covered uniformly and consistently by the conductive ink.

[0085] In some embodiments, the conductive ink is applied under ambient pressure. In other embodiments, the conductive ink is applied under a reduced pressure.

[0086] In some embodiments, the conductive ink is applied by a spray coating tool. In more specific embodiments, the spray coating tool comprises a moveable spray head. In other specific embodiments, the conductive ink is applied by a spray coating tool without moving the target surface.

[0087] In some embodiments, the four-point resistance of the conductive seed layer formed on the target surface is measured. In some embodiments, the four-point resistance of the conductive seed layer is about 10 Ohm or less. In some embodiments, the four- point resistance of the conductive seed layer is about 1 Ohm or less. In some embodiments, the four-point resistance of the conductive seed layer is about 500 mOhm or less, is about 300 mOhm or less, is about 100 mOhm or less, is about 30 mOhm or less, or is even lower.

[0088] In some embodiments, the resistivity of the conductive seed layer formed on the target surface is measured. Suitable resistivities can be, for example, from about 2 to about 5 pOhm-cm, from about 4 to about 9 Ohm-cm, or even from about 28 to about 42 pOhm-cm.

[0089] In some embodiments, the electrical conductivity of the conductive seed layer formed on the target surface is measured. In some embodiments, the electrical conductivity of the conductive seed layer is about 1x1 O’6Ohm-cm or greater. In some embodiments, the electrical conductivity of the conductive seed layer is from about IxlO-6Ohm-cm to about 8xl0-4Ohm-cm. In some embodiments, the electrical conductivity of the conductive seed layer is from about 3x1 O'6Ohm-cm to about 6x1 O'6Ohm-cm. In some embodiments, the electrical conductivity of the conductive seed layer is at least about IxlO-6Ohm-cm, about 2x1 O'6Ohm-cm, about 3xl0-6Ohm-cm, about 4x1 O'6Ohm-cm, about 5xl0-6Ohm-cm, about 6xl0-6Ohm-cm, about 7xl0-6Ohm-cm, about 8xl0-6Ohm-cm, about 9x10‘6Ohm-cm, about 1 x1 O'5Ohm-cm, about 2x1 O'5Ohm-cm, about 3x1 O'5Ohm-cm, about 4xl0-5Ohm-cm, about 5xl0-5Ohm-cm, about 6xl0-5Ohm-cm, about 7xl0"sOhm-cm, about 8x10sOhm-cm, about 9x10sOhm-cm, about IxlO4Ohm-cm, about 2x104Ohm-cm, about 3x104Ohm-cm, about 4x104Ohm-cm, about 5x104Ohm- cm, about 6xl04Ohm-cm, or about 7xl04Ohm-cm. In some embodiments, the electrical conductivity of the conductive seed layer is at most about 8xl0-4Ohm-cm, 7xl0-4Ohm- cm, about 6xl04Ohm-cm, about 5xl0-4Ohm-cm, about 4xl0-4Ohm-cm, about 3xl04Ohm-cm, about 2xl04Ohm-cm, or about IxlO4Ohm-cm, about 9x10sOhm-cm, about 8x10sOhm-cm, about 7x10sOhm-cm, about 6x10sOhm-cm, about 5x10sOhm-cm, about 4x10sOhm-cm, about 3x10sOhm-cm, about 2x10sOhm-cm, about IxlO-5Ohm- cm, about 9xl0-6Ohm-cm, about 8xl0-6Ohm-cm, about 7x1 O’6Ohm-cm, about 6xl0-6Ohm-cm, about 5xl0-6Ohm-cm, about 4xl0-6Ohm-cm, about 3xl0-6Ohm-cm, or about 2x106Ohm-cm.

[0090] The electrical conductivity of the conductive seed layer formed on the target surface using the above methods may in some embodiments be expressed in terms of sheet resistance (z'.e., bulk resistivity divided by thickness) in units of Ohms per square (also referred to as Ohms / square or OPS). For example, in some embodiments, the resistance of the conductive seed layer is no more than 10 Ohms per square, no more than 5 Ohms per square, no more than 3 Ohms per square, no more than 2 Ohms per square, no more than 1 Ohm per square, no more than 0.5 Ohms per square, or even lower. Preferably, the resistance of the conductive seed layer is no more than 5 Ohms per square.

[0091] The methods of the instant disclosure can be used to form conductive seed layers having high levels of bulk metal. Specifically, in some embodiments, the conductive seed layer formed on the target surface has a bulk metal content of at least 1 %. In more specific embodiments, the conductive seed layer has a bulk metal content of at least 2%, at least 5%, at least 10%, at least 15%, at least 20%, or even higher.

[0092] The conductive seed layer formed on the target surface can in some embodiments be at least about 0.003 pm thick, at least about 0.005 pm thick, at least about 0.01 pm thick, at least about 0.02 pm thick, at least about 0.05 pm thick, at least about 0.1 pm thick, at least about 0.2 pm thick, at least about 0.5 pm thick, at least about 1 pm thick, at least about 2 pm thick, at least about 3 pm thick, at least about 4 pm thick, at least about 5 pm thick, at least about 8 pm thick, at least about 10 pm thick, at least about 20 pm thick,or even thicker. Tn some embodiments, the conductive seed layer formed on the target surface can be no more than about 200 pm thick, no more than about 100 pm thick, no more than about 50 pm thick, no more than about 20 m thick, no more than about 10 pm thick, no more than about 8 pm thick, no more than about 5 pm thick, no more than about 2 pm thick, no more than about 1 pm thick, no more than about 0.5 pm thick, no more than about 0.2 pm thick, not more than about 0.1 pm thick, no more than about 0.05 pm thick, no more than about 0.02 pm thick, no more than about 0.01 pm thick, or even thinner. In some embodiments, the conductive seed layer formed on the target surface can be from about 0.003 pm thick to about 0. 1 pm thick, from about 0.003 pm thick to about 0.5 pm thick, from about 0.003 pm thick to about 1 pm thick, from about 0.003 pm thick to about 5 pm thick, from about 0.5 pm thick to about 10 pm thick, or from about 1 pm thick to about 5 pm thick. The thickness of the conductive seed layer formed on the target surface can in some embodiments have a deviation in thickness of no more than about 30%, no more than about 20%, no more than about 10%, or even no more than about 5%.

[0093] In some embodiments, the conductive seed layer does not comprise a conductive foil. In some embodiments, the conductive seed layer does not comprise a layer formed by electroless deposition. In some embodiments, the conductive seed layer does not comprise a layer formed by physical vapor deposition. In some embodiments, the conductive seed layer does not comprise a layer formed by chemical vapor deposition. In some embodiments, the conductive seed layer does not comprise palladium.

[0094] In one specific embodiment, a silver acetate based metal complex ink composition is spray coated on a target substrate that has been preheated to 150 °C. The ink immediately cures upon contact with the heated surface of the target substrate to create an adherent conductive silver seed layer. The target substrate, comprising the conductive seed silver layer, is then placed in a sulfuric acid copper plating bath whereby a dense layer of high purity (>99.99wt%) copper is deposited to create a uniform metallic structure.

[0095] In another specific embodiment, a copper formate based metal complex ink composition is spray coated on a target substrate that has been preheated to 150 °C in ambient atmosphere. The ink immediately converts to metallic copper upon deposition at this temperature. The coated target substrate is placed into a copper plating bath whereby a high purity electroplated copper layer is applied.

[0096] The electroplating of the conductive seed layer can be performed by any suitable method using any suitable metal, as is understood by those of ordinary skill in the art. For example, the electroplating can be performed as described in Nikolova et al. (2009) “Reliable Acid Copper Plating for Metallization of PCB”, IPC APEX Expo 2009, which is incorporated herein by reference in its entirety for all purposes. In preferred embodiments, the conductive material used in the electroplating step is copper.

[0097] In some embodiments, the peel strength of a target surface that has been electroplated according to the above-described methods is measured. In embodiments, the peel strength of the electroplated surface is at least 0.1 pounds per linear inch. More specifically, the peel strength of the electroplated surface is at least 0.5 pounds per linear inch. Even more specifically, the peel strength of the electroplated surface is at least 1 pound per linear inch. Preferably, the peel strength of the electroplated surface is at least 3 pounds per linear inch and can be, for example, in the range of 2-4 pounds per linear inch. The peel strength can be measured, for example, as outlined in IPC-TM-650 TEST METHODS MANUAL, number 2.4.9, “Peel Strength, Flexible Printed Wiring Materials”.Conductive Ink Compositions

[0098] Conductive ink compositions suitable for use in forming conductive seed layers according to the methods described herein include any ink composition that is capable of forming a conductive layer on a target surface rapidly, ideally at low temperature, and ideally under ambient atmospheric conditions. Such compositions, which will also be referred to as “conductive inks” or “inks”, include nanoparticulate inks, microparticulate inks, carbon inks, copper sulfate inks, conductive polymer inks, and metal complex conductive inks (or metal-organic decomposition (MOD) inks). Many of these inks are known in the art but have not previously been used for these purposes.

[0099] Accordingly, in some embodiments, the conductive ink composition used in the instant methods is any of the above-described conductive inks.

[0100] In more specific embodiments, the conductive ink composition used in the instant methods is a metal complex conductive ink composition. The metal complex conductive ink composition can comprise any suitable metal, but preferably it comprises silver, copper, palladium, gold, platinum, indium, or nickel. More preferably, the metal complex conductive ink composition comprises silver or copper.

[0101] For example, ink compositions prepared from silver metal precursors have been described in PCT International Publication No. WO2013 / 096664A1, which is incorporated herein by reference in its entirety. Further metal complex conductive ink compositions comprising silver metal precursors are described, for example, in PCT International Publication Nos. WO2015 / 160938A1 and WO2023 / 168452A2, in PCT International Application No. PCT / US2023 / 086353, filed December 29, 2023, and in U.S. Application No. 63 / 622,489, filed January 18, 2024, each of which is incorporated herein by reference in its entirety. Metal complex conductive ink compositions comprising copper are described, for example, in PCT International Publication No. WO2018 / 118460A1, which is incorporated herein by reference in its entirety. Metal complex conductive ink compositions comprising palladium are described, for example, in PCT International Publication No. WO2019 / 028435A1, metal complex conductive ink compositions comprising gold are described, for example, in PCT International Publication Nos.WO2019 / 028436A1, WO2023 / 215849A2, and W02024 / 006882A2, and metal complex conductive ink compositions comprising platinum are described, for example, in PCT International Application No. PCT / US2023 / 073121, filed August 30, 2023. Each of these disclosures is incorporated herein by reference in its entirety for all purposes.

[0102] In some embodiments, the metal complex conductive ink composition is a particle-free conductive ink composition. A particle-free conductive ink composition is preferably one that does not include any particles at a diameter of greater than about 10 nm. In some embodiments, a particle-free ink composition is one that has less than about 1% particles, preferably less than about 0.1% particles.

[0103] The conductive ink compositions used in the instant methods preferably possess low viscosity, so that they are compatible with a broad range of application techniques, including slot die coating, spin coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen-printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, and electrohydrodynamic printing. In particular, the inks may be compatible with inkjet printing, dip coating, and spray coating. The conductive structures formed from the ink compositions using the disclosed methods are preferably highly conductive at room temperature and preferably achieve bulk conductivity upon decomposition at mild temperatures (e.g., in some cases at less than about 100 °C). Finally, the ink compositions preferably remain stable at roomtemperature for months without particle precipitation. They are also preferably stable to the process by which they are applied to the target surface, so they do not form significant amounts of a conductive seed layer until they are in full contact with the heated target surface.

[0104] As just described, the conductive ink composition of the instant methods preferably have a desired viscosity. In some embodiments, the desired viscosity is obtained using a micro VISC viscometer. In some embodiments, the conductive ink composition has a viscosity from about 50 centipoise to about 1000 centipoise. In some embodiments, the conductive ink composition has a viscosity from about 5 centipoise to about 50 centipoise. In some embodiments, the conductive ink composition has a viscosity from about 10 centipoise to about 40 centipoise. In some embodiments, the conductive ink composition has a viscosity from about 20 centipoise to about 30 centipoise. In some embodiments, the conductive ink composition has a viscosity from about 18 centipoise to about 20 centipoise. In some embodiments, the conductive ink composition has a viscosity of about 18, about 19, or about 20 centipoise. In some embodiments, the conductive ink composition has a viscosity of at least about 5 centipoise, about 10 centipoise, about 20 centipoise, about 30 centipoise, about 40 centipoise, about 50 centipoise, about 60 centipoise, about 70 centipoise, about 80 centipoise, about 90 centipoise, about 100 centipoise, about 200 centipoise, about 300 centipoise, about 400 centipoise, about 500 centipoise, about 600 centipoise, about 700 centipoise, about 800 centipoise, or about 900 centipoise. In some embodiments, the conductive ink composition has a viscosity of at most about 1000 centipoise, about 900 centipoise, about 800 centipoise, about 700 centipoise, about 600 centipoise, about 500 centipoise, about 400 centipoise, about 300 centipoise, about 200 centipoise, about 100 centipoise, about 90 centipoise, about 80 centipoise, about 70 centipoise, about 60 centipoise, about 50 centipoise, about 40 centipoise, about 30 centipoise, about 20 centipoise, or about 10 centipoise.

[0105] In some embodiments, the viscosity of the conductive ink composition is adjusted based upon the amount of dissolving agent used. In some embodiments, the viscosity of the complex is adjusted based upon the type of dissolving agent used. For example, in embodiments where the dissolving agent comprises limonene and terpineol, an increase in the percentage of terpineol in the conductive ink composition can increasethe viscosity of the ink. In some embodiments, the viscosity of silver complex can he tuned from less than 5 centipoise with a large proportion of limonene to 50 centipoise with a large portion of terpineol. Unless otherwise indicated, all viscosity values are for samples at room temperature.

[0106] In some embodiments, the ink compositions of the instant methods have a concentration of about 0.1-50 weight percent metal salt of the ink composition. In some embodiments, the ink compositions of the instant methods have a concentration of about 0.1-40 weight percent metal salt of the ink composition. In some embodiments, the ink compositions have a concentration of about 1-30 weight percent metal salt of the ink composition. In some embodiments, the ink compositions have a concentration of about 1-20 weight percent metal salt of the ink composition. In some embodiments, the ink compositions have a concentration of about 1-10 weight percent metal salt of the ink composition. In some embodiments, the ink compositions have a concentration of about 5-15 weight percent metal salt of the ink composition. In some embodiments, the ink compositions have a concentration of about 0.1 weight percent, about 0.2 weight percent, about 0.3 weight percent, about 0.4 weight percent, about 0.5 weight percent, about 0.6 weight percent, about 0.7 weight percent, about 0.8 weight percent, about 0.9 weight percent, about 1 weight percent, about 2 weight percent, about 3 weight percent, about 4 weight percent, about 5 weight percent, about 6 weight percent, about 7 weight percent, about 8 weight percent, about 9 weight percent, about 10 weight percent, about 11 weight percent, about 12 weight percent, about 13 weight percent, about 14 weight percent, about 15 weight percent, about 16 weight percent, about 17 weight percent, about 18 weight percent, about 19 weight percent, or about 20 weight percent metal of the ink composition.

[0107] In some embodiments, the ink compositions of the instant methods have a concentration of at least about 0.1 weight percent, about 0.2 weight percent, about 0.3 weight percent, about 0.4 weight percent, about 0.5 weight percent, about 0.6 weight percent, about 0.7 weight percent, about 0.8 weight percent, about 0.9 weight percent, 1 weight percent, about 2 weight percent, about 3 weight percent, about 4 weight percent, about 5 weight percent, about 6 weight percent, about 7 weight percent, about 8 weight percent, about 9 weight percent, about 10 weight percent, about 11 weight percent, about 12 weight percent, about 13 weight percent, about 14 weight percent, about 15 weight percent, about 16 weight percent, about 17 weight percent, about 18 weight percent, about19 weight percent, or about 20 weight percent metal salt of the ink composition. In some embodiments, the ink compositions have a concentration of at most about 40 weight percent, about 39 weight percent, about 38 weight percent, about 37 weight percent, about 36 weight percent, about 35 weight percent, about 34 weight percent, about 33 weight percent, about 32 weight percent, 31 weight percent, about 30 weight percent, about 29 weight percent, about 28 weight percent, about 27 weight percent, about 26 weight percent, about 25 weight percent, about 24 weight percent, about 23 weight percent, about 22 weight percent, about 21 weight percent, about 20 weight percent, about 19 weight percent, about 18 weight percent, about 17 weight percent, about 16 weight percent, about 15 weight percent, about 14 weight percent, about 1 weight percent, or about 12 weight percent metal salt of the ink composition.

[0108] In some embodiments, the ink compositions of the instant methods have a concentration of about 0. 1-50 weight percent metal complex of the ink composition. In some embodiments, the ink compositions of the instant methods have a concentration of about 0.1-40 weight percent metal complex of the ink composition. In some embodiments, the ink compositions have a concentration of about 1-30 weight percent metal complex of the ink composition. In some embodiments, the ink compositions have a concentration of about 1 -20 weight percent metal complex of the ink composition. In some embodiments, the ink compositions have a concentration of about 1-10 weight percent metal complex of the ink composition. In some embodiments, the ink compositions have a concentration of about 5-15 weight percent metal complex of the ink composition. In some embodiments, the ink compositions have a concentration of about 0.1 weight percent, about 0.2 weight percent, about 0.3 weight percent, about 0.4 weight percent, about 0.5 weight percent, about 0.6 weight percent, about 0.7 weight percent, about 0.8 weight percent, about 0.9 weight percent, 1 weight percent, about 2 weight percent, about 3 weight percent, about 4 weight percent, about 5 weight percent, about 6 weight percent, about 7 weight percent, about 8 weight percent, about 9 weight percent, about 10 weight percent, about 11 weight percent, about 12 weight percent, about 13 weight percent, about 14 weight percent, about 15 weight percent, about 16 weight percent, about 17 weight percent, about 18 weight percent, about 19 weight percent, or about 20 weight percent metal complex of the ink composition.

[0109] In some embodiments, the ink compositions of the instant methods comprise an adhesion promoter. Exemplary adhesion promoters are described in PCT International Publication No. WO2023 / 168452A2 and in PCT International Application No.PCT / US2023 / 086353, filed December 29, 2023, the disclosures of which are incorporated by reference herein for all purposes.Optional Curing of the Seed Laver

[0110] In preferred embodiments, the metal complex conductive ink forms a conductive seed layer on the heated target surface at the threshold temperature without a further processing step. In some embodiments, however, the methods include an additional optional step of curing or baking the seed layer at an elevated temperature. The curing or baking step can, for example, remove undesirable volatile components from the seed layer that may not be fully released during the spray coating or printing process. Such residual agents can include, for example, volatile solvents or other volatile components of the conductive ink. In some cases, such residual agents can compromise the structural or functional properties of the seed layer, and the curing or baking step may accordingly improve those properties by release of the residual agent.

[0111] For example, in some embodiments, the optional curing step is performed at a temperature of about 250 °C or less. In some embodiments, the optional curing step is performed at a temperature of about 240 °C or less, about 230 °C or less, about 220 °C or less, about 210 °C or less, about 200 °C or less, about 190 °C or less, about 180 °C or less, about 170 °C or less, about 160 °C or less, about 150 °C or less, about 140 °C or less, about 130 °C or less, about 120 °C or less, about 110 °C or less, about 100 °C or less, about 90 °C or less, about 80 °C or less, or about 70 °C or less. In some embodiments, the optional curing step is performed using a heat source. Examples of heat sources include an IR lamp, oven, or a heated substrate.

[0112] In some embodiments, the curing or baking step is performed for at least 5 minutes, at least 10 minutes, at least 20 minutes, at least 30 minutes, at least 60 minutes, or even longer. In some embodiments, the curing or baking step is performed for no more than 60 minutes, no more than 30 minutes, no more than 20 minutes, no more than 10 minutes, no more than 5 minutes, or even shorter.

[0113] In some embodiments, the optional curing step is performed by exposing the seed layer to a light source at a wavelength from about 100 nm to about 1500 nm. In someembodiments, the curing step is performed by exposing the seed layer to a light source such as a Xenon lamp, an IR lamp, or a laser at a wavelength from about 100 nm to about 1000 nm. In some embodiments, the curing step is performed by exposing the seed layer to a light source at a wavelength from about 100 nm to about 700 nm. In some embodiments, the curing step is performed by exposing the seed layer to a light source at a wavelength from about 100 nm to about 500 nm. In some embodiments, the curing step is performed by exposing the seed layer to a light source at a wavelength from about 100 nm to about 300 nm. In some embodiments, the curing step is performed by exposing the seed layer to a light source at a wavelength of about 100 nm, about 200 nm, about 300 nm, about 400 nm, about 500 nm, about 600 nm, about 700 nm, about 800 nm, about 900 nm, or about 1000 nm.

[0114] In some embodiments, the optional curing step is performed by a combination of heating the seed layer, for example at any of the above-listed temperatures, and exposing the seed layer to a light source, for example at any of the above-listed wavelengths.Electroplated Structures

[0115] The disclosure provides in another aspect electroplated structures formed according to the methods described above. In some embodiments, these electroplated structures comprise: a conductive seed layer on a target substrate, and an electroplated conductive layer on the conductive seed layer, wherein the conductive seed layer is formed by applying a conductive ink to the target substrate.

[0116] In some embodiments, the electroplated structures are prepared by heating the target substrate to a threshold temperature prior to applying the conductive ink to the target surface. More specifically, the target substrate is heated to a threshold temperature of at least about 80° C. In some embodiments, the target substrate is heated to a threshold temperature of about 250 °C or less, of about 230 °C or less, of about 210 °C or less, of about 200 °C or less, of about 190 °C, of about 180 °C or less, of about 170 °C or less, of about 160 °C, of about 150 °C or less, of about 140 °C or less, of about 130 °C or less, of about 120 °C or less, of about 110 °C or less, or even of about 90 °C or less.

[0117] In some embodiments, the conductive ink is converted into the conductive seed layer without a further processing step.

[0118] Tn some embodiments, the conductive ink is converted into the conductive seed layer upon contacting the target substrate.

[0119] In some embodiments, the conductive ink is converted into the conductive seed layer by irradiating the target substrate.

[0120] In some embodiments, the conductive ink is a nanoparticulate ink, a microparticulate ink, a carbon ink, a copper sulfate ink, a conductive polymer ink, or a metal complex conductive ink.

[0121] In some embodiments, the conductive ink is a metal complex conductive ink.

[0122] In some embodiments, the conductive ink comprises silver, copper, palladium, gold, platinum, indium, or nickel.

[0123] In some embodiments, the conductive ink comprises a copper salt or a silver salt.

[0124] In some embodiments, the conductive ink comprises a dissolving agent and / or an adhesion promoter.

[0125] In some embodiments, the conductive ink is applied by slot die coating, spin coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, dispenser, or electrohydrodynamic printing. More specifically, the conductive ink is applied by inkjet printing, dip coating, or spray coating.

[0126] In some embodiments, the conductive seed layer has a resistance of no more than 5 Ohms per square, no more than 2 Ohms per square, no more than 1 Ohm per square, or no more than 0.5 Ohms per square.

[0127] In some embodiments, the conductive seed layer has a bulk metal content of at least 1%.

[0128] In some embodiments, the conductive seed layer has a film density of at least about 80%.

[0129] In some embodiments, the target substrate is a non-conducting substrate.

[0130] In some embodiments, the conductive seed layer is at least about 0.003 pm thick, at least about 0.005 pm thick, at least about 0.01 pm thick, at least about 0.02 pm thick, at least about 0.05 pm thick, at least about 0.1 pm thick, at least about 0.2 pm thick, at least about 0.5 pm thick, at least about 1 pm thick, at least about 2 pm thick, at least about 3 pm thick, at least about 4 pm thick, at least about 5 pm thick, at least about 8 pm thick, at least about 10 pm thick, at least about 20 pm thick, or even thicker. In someembodiments, the conductive seed layer formed on the target substrate can be no more than about 200 pm thick, no more than about 100 pm thick, no more than about 50 pm thick, no more than about 20 pm thick, no more than about 10 pm thick, no more than about 8 pm thick, no more than about 5 pm thick, or even thinner. In some embodiments, the conductive seed layer formed on the target substrate can be from about 0.003 pm thick to about 5 pm thick, from about 0.5 pm thick to about 10 pm thick, or from about 1 pm thick to about 5 pm thick.

[0131] In some embodiments, the electroplated structures comprise a plurality of patterned conductive lines, wherein at least one patterned conductive line has a width of no more than 10 pm, no more than 5 pm, no more than 2 pm, no more than 1 pm, no more than 0.5 pm, or even narrower. Preferably at least one patterned conductive line has a width of no more than 1 pm. In some embodiments, the electroplated structures comprise a plurality of patterned spaces between the patterned conductive lines wherein at least one patterned conductive space has a width of no more than 10 pm, no more than 5 pm, no more than 2 pm, no more than 1 pm, no more than 0.5 pm, or even narrower. Preferably at least one patterned space has a width of no more than 1 pm.

[0132] In some embodiments, the conductive seed layer of the electroplated structure does not comprise a conductive foil.

[0133] In some embodiments, the conductive seed layer of the electroplated structure does not comprise a layer formed by electroless deposition. More specifically, in some embodiments, the conductive seed layer of the electroplated structure does not comprise electroless copper, electroless gold, or electroless palladium. Even more specifically, the electroplated structure does not comprise electroless palladium.

[0134] In some embodiments, the conductive seed layer does not comprise a layer formed by physical vapor deposition. In some embodiments, the conductive seed layer does not comprise a layer formed by chemical vapor deposition. In some embodiments, the conductive seed layer does not comprise a layer formed by electroless deposition. In some embodiments, the conductive seed layer does not comprise palladium.

[0135] In some embodiments, the electroplated structure further comprises a mask layer.

[0136] In some embodiments, the mask layer is at least partially removed.

[0137] In some embodiments, the conductive seed layer is at least partially etched. More specifically, the conductive seed layer can be at least partially etched by a wet (chemical) etchant and / or by a dry etchant such as plasma etching or laser ablation.

[0138] In some embodiments, the methods for electroplating a target substrate, and the electroplated structures prepared according to the methods, can be described as reflected in the following numbered paragraphs:1. A method for electroplating a target surface comprising the steps of: providing a target surface for electroplating; applying a conductive ink to the target surface; converting the conductive ink into a conductive seed layer on the target surface; electroplating the conductive seed layer with a conductive material to form an electroplated target surface.2. The method of paragraph 1 , wherein the target surface is heated to a threshold temperature prior to applying the conductive ink to the target surface.3. The method of paragraph 2, wherein the threshold temperature is at least about 80 °C.4. The method of paragraph 3, wherein the threshold temperature is about 250 °C or less.5. The method of paragraph 2, wherein the conductive ink is converted into the conductive seed layer at the threshold temperature without a further processing step.6. The method of paragraph 2, wherein the conductive ink is converted into the conductive seed layer upon contacting the target surface.7. The method of paragraph 1 , further comprising the step of irradiating the target surface to convert the conductive ink into the conductive seed layer.8. The method of paragraph 1 , wherein the conductive ink is a nanoparticulate ink, a microparticulate ink, a carbon ink, a copper sulfate ink, a conductive polymer ink, or a metal complex conductive ink.9. The method of paragraph 8, wherein the conductive ink is a metal complex conductive ink.10. The method of paragraph 1 , wherein the conductive ink comprises a copper salt or a silver salt.11 . The method of paragraph 1 , wherein the conductive ink comprises a dissolving agent.12. The method of paragraph 1, wherein the conductive ink comprises an adhesion promoter.13. The method of paragraph 1 , wherein the conductive ink is applied by slot die coating, spin coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, dispenser, or electrohydrodynamic printing.14. The method of paragraph 1 , wherein the conductive ink is applied by inkjet printing, dip coating, or spray coating.15. The method of paragraph 14, wherein the conductive ink is applied by spray coating.16. The method of paragraph 1 , wherein the conductive ink is applied to the target surface in an ambient atmosphere,17. The method of paragraph 1 , further comprising the step of curing the conductive seed layer at an elevated temperature.18. The method of paragraph 1 , wherein the conductive seed layer has a resistance of no more than 5 Ohms per square, no more than 2 Ohms per square, no more than 1 Ohm per square, or no more than 0.5 Ohms per square,19. The method of paragraph 1 , wherein the conductive seed layer has a bulk metal content of at least 1%.20. The method of paragraph 1 , wherein the conductive seed layer has a film density of at least about 80%.21. The method of paragraph 1, wherein the target surface is a non-conducting surface,22. The method of paragraph 1 , wherein the conductive seed layer has a thickness of from about 0.003 pm to about 5 pm.23. The method of paragraph 1 , further comprising the step of applying a mask layer to the conductive seed layer prior to the electroplating step.24. The method of paragraph 23, further comprising the step of removing at least a portion of the mask layer.25. The method of paragraph 24, further comprising the step of etching the conductive seed layer.26. The method of paragraph 1 , wherein the electroplated target surface comprises a plurality of patterned conductive lines, wherein at least one patterned conductive line has a width of no more than 10 pm.27. The method of paragraph 1 , wherein the electroplated target surface comprises a plurality of patterned spaces, wherein at least one patterned space has a width of no more than 10 pm.28. The method of paragraph 1 , wherein the target surface is a glass surface, a metal surface, or a silicon surface.29. The method of paragraph 1 , wherein the target surface comprises polyimide, epoxy with glass reinforcement, a buildup film with no reinforcement, glass, silicon, a passivated metal, a bare metal, a ceramic, an engineered plastic, or a three-dimensional printable material.30. An electroplated target surface prepared using the method of any one of paragraphs 1-29.31. An electroplated target surface comprising: a conductive seed layer on a target surface, and an electroplated conductive layer on the conductive seed layer, wherein the conductive seed layer is formed by applying a conductive ink to the target surface.32. The electroplated target surface of paragraph 31, wherein the target surface is heated to a threshold temperature prior to applying the conductive ink to the target surface.33. The electroplated target surface of paragraph 32, wherein the threshold temperature is at least about 80 °C.34. The electroplated target surface of paragraph 33, wherein the threshold temperature is about 250 °C or less.35. The electroplated target surface of paragraph 32, wherein the conductive ink is converted into the conductive seed layer without a further processing step.36. The electroplated target surface of paragraph 32, wherein the conductive ink is converted into the conductive seed layer upon contacting the target surface.37. The electroplated target surface of paragraph 31, wherein the conductive ink is converted into the conductive seed layer by irradiating the target surface.38. The electroplated target surface of paragraph 31 , wherein the conductive ink is a nanoparticulate ink, a microparticulate ink, a carbon ink, a copper sulfate ink, a conductive polymer ink, or a metal complex conductive ink.39. The electroplated target surface of paragraph 38, wherein the conductive ink is a metal complex conductive ink.40. The electroplated target surface of paragraph 31 , wherein the conductive ink comprises a copper salt or a silver salt.41. The electroplated target surface of paragraph 31, wherein the conductive ink comprises a dissolving agent.42. The electroplated target surface of paragraph 31 , wherein the conductive ink comprises an adhesion promoter.43. The electroplated target surface of paragraph 31, wherein the conductive ink is applied by slot die coating, spin coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, dispenser, or electrohydrodynamic printing.44. The electroplated target surface of paragraph 31 , wherein the conductive ink is applied by inkjet printing, dip coating, or spray coating.45. The electroplated target surface of paragraph 44, wherein the conductive ink is applied by spray coating.46. The electroplated target surface of paragraph 31 , wherein the conductive ink is applied to the target surface in an ambient atmosphere.47. The electroplated target surface of paragraph 31 , wherein the conductive seed layer is cured at an elevated temperature.48. The electroplated target surface of paragraph 31 , wherein the conductive seed layer has a resistance of no more than 5 Ohms per square, no more than 2 Ohms per square, no more than 1 Ohm per square, or no more than 0.5 Ohms per square.49. The electroplated target surface of paragraph 31 , wherein the conductive seed layer has a bulk metal content of at least 1%.50. The electroplated target surface of paragraph 31 , wherein the conductive seed layer has a film density of at least about 80%.51 . The electroplated target surface of paragraph 31 , wherein the target surface is a non-conducting surface.52. The electroplated target surface of paragraph 31 , wherein the conductive seed layer has a thickness of from about 0.003 pm to about 5 pm.53. The electroplated target surface of paragraph 31 , wherein the electroplated target surface further comprises a mask layer.54. The electroplated target surface of paragraph 53, wherein the mask layer is partially removed.55. The electroplated target surface of paragraph 54, wherein the conductive seed layer is partially etched.56. The electroplated target surface of paragraph 31, wherein the electroplated target surface comprises a plurality of patterned conductive lines, wherein at least one patterned conductive line has a width of no more than 10 pm.57. The electroplated target surface of paragraph 31 , wherein the electroplated target surface comprises a plurality of patterned spaces, wherein at least one patterned space has a width of no more than 10 pm.58. The electroplated target surface of paragraph 31, wherein the conductive seed layer does not comprise a conductive foil.59. The electroplated target surface of paragraph 31 , wherein the conductive seed layer does not comprise a layer formed by electroless deposition.60. The electroplated target surface of paragraph 31 , wherein the conductive seed layer does not comprise a layer formed by physical vapor deposition.61. The electroplated target surface of paragraph 31 , wherein the conductive seed layer does not comprise a layer formed by chemical vapor deposition.62. The electroplated target surface of paragraph 31 , wherein the conductive seed layer does not comprise palladium.63. The electroplated target surface of paragraph 31, wherein the target surface is a glass surface, a metal surface, or a silicon surface.64. The electroplated target surface of paragraph 31 , wherein the target surface comprises polyimide, epoxy with glass reinforcement, a buildup film with no reinforcement, glass, silicon, a passivated metal, a bare metal, a ceramic, an engineered plastic, or a three-dimensional printable material.Multi-Metallized Structures

[0139] According to another aspect, the disclosure provides multi-metallized structures that can be prepared using materials and methods described above. The multi-metallized structures are typically used in forming electrical connections on PCBs and other electronic devices. They typically comprise a conductive seed layer of copper, silver, or another suitable metal, on the surface of a non-conductive substrate, such as any of the non-conductive target substrates described above. The conductive seed layer is coated with a first metallic layer, and the first metallic layer is subsequently coated with a second metallic layer. The first and second metallic layers are preferably formed through redox reactions, such as through electroless plating reactions.

[0140] The conductive seed layer of the multi-metallized structures is formed using a metal complex conductive ink, for example any of the metal complex conductive inks described above. Preferably, the conductive seed layer is formed using a metal complex conductive ink comprising silver or copper. The metal complex conductive ink is applied to the substrate by a suitable printing process. In preferred embodiments, the ink is applied by inkjet printing, so that a patterned conductive seed layer of suitable design can be formed on the target surface.

[0141] The first metallic layer preferably comprises nickel, and the second metallic layer preferably comprises gold. Multi-metallized structures comprising a conductive seed layer formed from a metal complex ink and where the first metallic layer is nickel and second metallic layer is gold can be used in the manufacture of electronic devices, such as PCBs, that are normally prepared by plating copper contacts and through-holes using electroless nickel immersion gold (ENIG or Eni / IAU), as would be understood by those of ordinary skill in the art.

[0142] In some embodiments, the just-described multi-metallized structure is a land grid array (LG A) structure, a ball grid array (BGA) structure, or a flip-chip ball grid array structure. Such structures are commonly used in the packaging of electronic devices, for example in the mounting of microprocessors to PCBs, as is understood by those of ordinary skill in the art.Multidevice Electronic Assemblies

[0143] According to yet another aspect, the disclosure provides multidevice electronic assemblies comprising a plurality of the above-described multi-metallized structures. Themetallized structures can be electrically connected to one another, for example by soldering the multi-metallized portions of the structures at the appropriate locations.

[0144] The multidevice electronic assemblies disclosed herein a preferably assembled at high density. One method to increase device density in multidevice electronic assemblies is to stack semiconductor dies vertically. Multiple stacked dies can be combined into a single package in this manner with a very small surface area or “footprint” on the substrate or PCB.

[0145] Multidevice electronic assemblies, for example multi-chip modules (MCMs) can be packaged in a variety of forms. For example, they can use pre-packaged integrated circuits (TCs) on small PCBs in order to mimic the package footprint of an existing chip package. In other cases, they can integrate multiple chip dies on a high density interconnection (HDI) substrate. Such multidevice electronic assemblies can be prepared by the electrical coupling of any of the above-described multi-metallized structures to one another, for example by soldering the structures at desired locations, as would be understood by those of ordinary skill in the art.

[0146] It will be readily apparent to one of ordinary skill in the relevant arts that other suitable modifications and adaptations to the compositions and methods described herein may be made without departing from the scope of the invention or any embodiment thereof. Having now described the present invention in detail, the same will be more clearly understood by reference to the following Examples, which are included herewith for purposes of illustration only and are not intended to be limiting of the invention.EXAMPLESElectroplating Target Surfaces Seeded with Metal Complex Conductive Inks

[0147] Target surfaces on a target substrate can be seeded for subsequent electroplating using a particle-free, metal complex conductive ink, for example, on a substrate that is preheated to approximately 150 °C to 200 °C. The metal complex conductive ink is sprayed on the surface of the preheated substrate and is rapidly converted to a metallic film on contact with the heated surface. Film thicknesses of 0.5-2 pm are ideally formed, so that the seed layer is both sufficiently adhesive to the substrate and sufficiently conductive for the subsequent electroplating steps. The process is performed in an ambient environment. The metallic film formed from the conductive ink can be furthercured at an elevated temperature, if desired, to remove any remaining volatile components of the ink and to improve other characteristics of the seed layer.

[0148] FIG. 4A graphically illustrates a metallized structure prepared according to the methods described herein using a conductive seed layer prepared from a MOD ink. The illustration highlights the strong chemical bonding between the seed layer film and the electroplated layer. FIG. 4B shows an exemplary SEM image of a printed circuit board (PCB) substrate that was seeded using a silver complex conductive ink and electroplated according to the methods disclosed herein. Specifically, the surface of the PCB substrate was heated to a threshold temperature and then spray coated with a silver complex conductive ink to form the silver conductive seed layer. A copper layer was then electroplated on the silver seed layer using standard plating conditions. Each layer has been labeled.

[0149] FIGs. 5A-5B show additional exemplary SEM images of conductive structures formed by electroplating a copper layer on the surface of a silver seed layer that was prepared by spray coating a silver complex conductive ink on the surface of a target substrate that was heated above a low threshold temperature. The substrate is oriented to the top of the images shown in these figures. The thickness of each layer at various locations was measured for each sample from the SEM image, as indicated for each figure. As shown, the silver seed layer was on the order of 1-2 pm thick, and the plated copper layer was on the order of 25-40 pm thick.

[0150] FIGs. 6 and 7 provide further properties of exemplary silver seed layers formed on an Ajinomoto Build-Up Film (ABF) substrate. The substrate was coated on each side with a silver complex conductive ink containing 19.9 wt% silver acetate, 30.82 wt% octylamine, 20.31 wt% cyclopentylamine, 17.95 wt% H2O, 5.26 wt% ammonium formate (50% in H2O), and either 1.0 wt% (FIG. 6) or 0.5 wt% (FIG. 7) N-(2-aminoethyl)-3- aminopropyltrimethoxysilane (Gelest SIA 591.1 ) as an adhesion promoter. The coated materials were either subjected to a post-treatment step (as described above) or not, as indicated in the right column. Images of each seeded substrate are shown in the upper panels, and the measured four-point resistance (mOhm), estimated thickness (pm), and peel strength (gf / 10 mm or Ib / inch) for each sample is also shown.

[0151] FIGs. 8A-8D show the preparation and properties of a silver-seeded ABF substrate (samples 6A and 6B from FIG. 7) that was electroplated with copper. FIG. 8Ashows the plating conditions used. FIG. 8B shows front and back images of the silver- seeded, copper-plated ABF substrates. Samples shown on the right side of each image were used in peel tests with 1 cm wide strips. FIG. 8C shows an exemplary peel test, and FIG. 8D shows the results of an exemplary peel test using a Force Sensor Model FSO5-5 (Mark- 10 Corporation; Copiague, NY), with a pull speed of 254 mm / min.

[0152] FIGs. 9A-9B show the properties of exemplary conductive structures formed by electroplating a copper layer on the surface of a copper seed layer. The copper conductive ink used to form the seed layer in the conductive structures described in FIG. 9A comprised 17.9 wt% copper(II) formate tetrahydrate, 7.45 wt% amino-2-propanol, 7.45 wt% 2-(methylamino)ethanol, 49.2 wt% diethylformamide, 5 wt% hexanoic acid, 10 wt% ethylene glycol butyl ether, and 3 wt% ethylene glycol phenyl ether. The deposition conditions, curing conditions, and physical and electrical properties of these structures are also shown in FIG. 9A.

[0153] The copper conductive ink used to form the seed layer in the conductive structure shown in FIG. 9B comprised 17.9 wt% copper(II) formate tetrahydrate, 14.9 wt% amino- 2-propanol, 62.2 wt% 3-methyl-2-buten-l-ol, and 5 wt% hexanoic acid.

[0154] FIG. 10 shows three exemplary 6-inch silicon wafers that were spin coated with a copper MOD ink to form a copper conductive seed layer.

[0155] All patents, patent publications, and other published references mentioned herein are hereby incorporated by reference in their entireties as if each had been individually and specifically incorporated by reference herein.

[0156] While specific examples have been provided, the above description is illustrative and not restrictive. Any one or more of the features of the previously described embodiments can be combined in any manner with one or more features of any other embodiments in the present invention. Furthermore, many variations of the invention will become apparent to those skilled in the art upon review of the specification. The scope of the invention should, therefore, be determined by reference to the appended claims, along with their full scope of equivalents.

Claims

What is Claimed is:

1. A metallized structure comprising: a substrate; a conductive seed layer on a surface of the substrate, wherein the conductive seed layer is formed by applying a conductive ink to the surface of the substrate; and an electroplated conductive layer on the conductive seed layer.

2. The metallized structure of claim 1 , wherein the conductive seed layer comprises a film made from a metal organic decomposition (MOD) ink.

3. The metallized structure of claim 2, wherein the MOD ink comprises a metal salt.

4. The metallized structure of claim 3, wherein the metal salt is a silver metal salt, a copper metal salt, a nickel metal salt, an indium metal salt, a gold metal salt, a palladium metal salt, a platinum metal salt, an alloy material of these metals as main component, or a combination of these metal salts.

5. The metallized structure of claim 2, wherein the MOD ink is applied by spray coating, slot die coating, spin coating, dip coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, dispenser, or electrohydrodynamic printing.

6. The metallized structure of claim 1 , wherein the conductive ink is a nanoparticulate ink, a microparticulate ink, a carbon ink, a copper sulfate ink, a conductive polymer ink, or a metal complex conductive ink.

7. The metallized structure of claim 1, wherein the conductive seed layer is adherent and stable enough for direct plating.

8. The metallized structure of claim 1 , wherein the substrate displays a 3-dimensional shape, optionally wherein the substrate displays vias, bumps, a metal wrap, or passive components for filtering.

9. The metallized structure of claim 1 , wherein the substrate is a semiconductor substrate, an electrically conductive substrate, or an electrically insulative substrate.

10. The metallized structure of claim 9, wherein the electrically conductive substrate further comprises graphite, a conductive polymer, a halide crystal, aluminum, copper, gold, silver, titanium, nickel, an alloy of these metals, or a combination thereof.1 1 . The metallized structure of claim 9, wherein the semiconductor substrate or the electrically insulative substrate further comprises silicon, epoxy, glass, organic, organic build-up film, Ajinomoto build-up film (ABF), glass-reinforced epoxy laminate (FR4), polyimide, gallium arsenide, sapphire, silicon carbide, galium oxide, diamond, galium nitrate, indium phosphide, gallium phosphide, or a combination thereof.

12. The metallized structure of claim 2, wherein the MOD ink is applied to the surface of the substrate in an ambient atmosphere.

13. The metallized structure of claim 2, wherein the MOD ink further comprises a silane adhesion promoter.

14. The metallized structure of claim 2, wherein the MOD ink is applied to the surface of the substrate at an elevated temperature.

15. The metallized structure of claim 1, wherein the substrate comprises a semiconductor chip, an epoxy molding compound, a chip encapsulating material, or a combination thereof.

16. The metallized structure of claim 15, wherein the semiconductor chip is a silicon wafer, a gallium wafer, a gallium arsenide wafer, or an indium wafer.

17. The metallized structure of claim 1 , wherein the electroplated conductive layer further comprises a mask layer.

18. The metallized structure of claim 17, wherein the mask layer is partially removed.

19. The metallized structure of claim 1 , wherein the conductive seed layer is partially etched.

20. The metallized structure of claim 1, wherein the conductive seed layer has a resistance of no more than 5 Ohms per square, no more than 2 Ohms per square, no more than 1 Ohm per square, or no more than 0.5 Ohms per square.

21. The metallized structure of claim 1 , wherein the conductive seed layer has a thickness of from about 0.003 pm to about 5 pm.

22. The metallized structure of claim 1 , wherein the electroplated conductive layer displays a peel strength of at least 3 pounds per linear inch.

23. A multi-metallized structure comprising: a substrate; a conductive seed layer on a surface of the substrate, wherein the conductive seed layer is formed by applying a conductive ink to the surface of the substrate;a first metallic layer on the conductive seed layer; and a second metallic layer on the first metallic layer.

24. The multi-metallized structure of claim 23, wherein the multi-metallized structure is a land grid array structure, a ball grid array structure, or a flip-chip ball grid array structure.

25. The multi-metallized structure of claim 23, wherein the first metallic layer comprises nickel and the second metallic layer comprises gold.

26. A multidevice electronic assembly comprising a plurality of the multi-metallized structures of claim 23, wherein the plurality of multi-metallized structures are electrically coupled.

27. The multidevice electronic assembly of claim 26, wherein the plurality of multimetallized structures are electrically coupled by soldering.

28. A method for preparing a metallized structure comprising the steps of: providing a substrate for metallizing; applying a conductive ink to the substrate; converting the conductive ink into a conductive seed layer on the substrate; and metallizing the conductive seed layer with a conductive material to form a metallized structure.

29. The method of claim 28, wherein the conductive ink is applied by spray coating, slot die coating, spin coating, dip coating, roll-to-roll printing, including gravure, flexography, rotary screen printing, screen printing, aerosol jet printing, inkjet printing, airbrushing, Mayer rod coating, flood coating, 3D printing, dispenser, or electrohydrodynamic printing.

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